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fb1d9738 JB |
1 | /************************************************************************** |
2 | * | |
3 | * Copyright © 2009 VMware, Inc., Palo Alto, CA., USA | |
4 | * All Rights Reserved. | |
5 | * | |
6 | * Permission is hereby granted, free of charge, to any person obtaining a | |
7 | * copy of this software and associated documentation files (the | |
8 | * "Software"), to deal in the Software without restriction, including | |
9 | * without limitation the rights to use, copy, modify, merge, publish, | |
10 | * distribute, sub license, and/or sell copies of the Software, and to | |
11 | * permit persons to whom the Software is furnished to do so, subject to | |
12 | * the following conditions: | |
13 | * | |
14 | * The above copyright notice and this permission notice (including the | |
15 | * next paragraph) shall be included in all copies or substantial portions | |
16 | * of the Software. | |
17 | * | |
18 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
19 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
20 | * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL | |
21 | * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, | |
22 | * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR | |
23 | * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE | |
24 | * USE OR OTHER DEALINGS IN THE SOFTWARE. | |
25 | * | |
26 | **************************************************************************/ | |
27 | ||
28 | #include "vmwgfx_kms.h" | |
29 | ||
56d1c78d | 30 | |
fb1d9738 JB |
31 | /* Might need a hrtimer here? */ |
32 | #define VMWGFX_PRESENT_RATE ((HZ / 60 > 0) ? HZ / 60 : 1) | |
33 | ||
6abff3c7 JB |
34 | |
35 | struct vmw_clip_rect { | |
36 | int x1, x2, y1, y2; | |
37 | }; | |
38 | ||
39 | /** | |
40 | * Clip @num_rects number of @rects against @clip storing the | |
41 | * results in @out_rects and the number of passed rects in @out_num. | |
42 | */ | |
43 | void vmw_clip_cliprects(struct drm_clip_rect *rects, | |
44 | int num_rects, | |
45 | struct vmw_clip_rect clip, | |
46 | SVGASignedRect *out_rects, | |
47 | int *out_num) | |
48 | { | |
49 | int i, k; | |
50 | ||
51 | for (i = 0, k = 0; i < num_rects; i++) { | |
52 | int x1 = max_t(int, clip.x1, rects[i].x1); | |
53 | int y1 = max_t(int, clip.y1, rects[i].y1); | |
54 | int x2 = min_t(int, clip.x2, rects[i].x2); | |
55 | int y2 = min_t(int, clip.y2, rects[i].y2); | |
56 | ||
57 | if (x1 >= x2) | |
58 | continue; | |
59 | if (y1 >= y2) | |
60 | continue; | |
61 | ||
62 | out_rects[k].left = x1; | |
63 | out_rects[k].top = y1; | |
64 | out_rects[k].right = x2; | |
65 | out_rects[k].bottom = y2; | |
66 | k++; | |
67 | } | |
68 | ||
69 | *out_num = k; | |
70 | } | |
71 | ||
fb1d9738 JB |
72 | void vmw_display_unit_cleanup(struct vmw_display_unit *du) |
73 | { | |
74 | if (du->cursor_surface) | |
75 | vmw_surface_unreference(&du->cursor_surface); | |
76 | if (du->cursor_dmabuf) | |
77 | vmw_dmabuf_unreference(&du->cursor_dmabuf); | |
78 | drm_crtc_cleanup(&du->crtc); | |
79 | drm_encoder_cleanup(&du->encoder); | |
80 | drm_connector_cleanup(&du->connector); | |
81 | } | |
82 | ||
83 | /* | |
84 | * Display Unit Cursor functions | |
85 | */ | |
86 | ||
87 | int vmw_cursor_update_image(struct vmw_private *dev_priv, | |
88 | u32 *image, u32 width, u32 height, | |
89 | u32 hotspotX, u32 hotspotY) | |
90 | { | |
91 | struct { | |
92 | u32 cmd; | |
93 | SVGAFifoCmdDefineAlphaCursor cursor; | |
94 | } *cmd; | |
95 | u32 image_size = width * height * 4; | |
96 | u32 cmd_size = sizeof(*cmd) + image_size; | |
97 | ||
98 | if (!image) | |
99 | return -EINVAL; | |
100 | ||
101 | cmd = vmw_fifo_reserve(dev_priv, cmd_size); | |
102 | if (unlikely(cmd == NULL)) { | |
103 | DRM_ERROR("Fifo reserve failed.\n"); | |
104 | return -ENOMEM; | |
105 | } | |
106 | ||
107 | memset(cmd, 0, sizeof(*cmd)); | |
108 | ||
109 | memcpy(&cmd[1], image, image_size); | |
110 | ||
111 | cmd->cmd = cpu_to_le32(SVGA_CMD_DEFINE_ALPHA_CURSOR); | |
112 | cmd->cursor.id = cpu_to_le32(0); | |
113 | cmd->cursor.width = cpu_to_le32(width); | |
114 | cmd->cursor.height = cpu_to_le32(height); | |
115 | cmd->cursor.hotspotX = cpu_to_le32(hotspotX); | |
116 | cmd->cursor.hotspotY = cpu_to_le32(hotspotY); | |
117 | ||
118 | vmw_fifo_commit(dev_priv, cmd_size); | |
119 | ||
120 | return 0; | |
121 | } | |
122 | ||
6a91d97e JB |
123 | int vmw_cursor_update_dmabuf(struct vmw_private *dev_priv, |
124 | struct vmw_dma_buffer *dmabuf, | |
125 | u32 width, u32 height, | |
126 | u32 hotspotX, u32 hotspotY) | |
127 | { | |
128 | struct ttm_bo_kmap_obj map; | |
129 | unsigned long kmap_offset; | |
130 | unsigned long kmap_num; | |
131 | void *virtual; | |
132 | bool dummy; | |
133 | int ret; | |
134 | ||
135 | kmap_offset = 0; | |
136 | kmap_num = (width*height*4 + PAGE_SIZE - 1) >> PAGE_SHIFT; | |
137 | ||
138 | ret = ttm_bo_reserve(&dmabuf->base, true, false, false, 0); | |
139 | if (unlikely(ret != 0)) { | |
140 | DRM_ERROR("reserve failed\n"); | |
141 | return -EINVAL; | |
142 | } | |
143 | ||
144 | ret = ttm_bo_kmap(&dmabuf->base, kmap_offset, kmap_num, &map); | |
145 | if (unlikely(ret != 0)) | |
146 | goto err_unreserve; | |
147 | ||
148 | virtual = ttm_kmap_obj_virtual(&map, &dummy); | |
149 | ret = vmw_cursor_update_image(dev_priv, virtual, width, height, | |
150 | hotspotX, hotspotY); | |
151 | ||
152 | ttm_bo_kunmap(&map); | |
153 | err_unreserve: | |
154 | ttm_bo_unreserve(&dmabuf->base); | |
155 | ||
156 | return ret; | |
157 | } | |
158 | ||
159 | ||
fb1d9738 JB |
160 | void vmw_cursor_update_position(struct vmw_private *dev_priv, |
161 | bool show, int x, int y) | |
162 | { | |
163 | __le32 __iomem *fifo_mem = dev_priv->mmio_virt; | |
164 | uint32_t count; | |
165 | ||
166 | iowrite32(show ? 1 : 0, fifo_mem + SVGA_FIFO_CURSOR_ON); | |
167 | iowrite32(x, fifo_mem + SVGA_FIFO_CURSOR_X); | |
168 | iowrite32(y, fifo_mem + SVGA_FIFO_CURSOR_Y); | |
169 | count = ioread32(fifo_mem + SVGA_FIFO_CURSOR_COUNT); | |
170 | iowrite32(++count, fifo_mem + SVGA_FIFO_CURSOR_COUNT); | |
171 | } | |
172 | ||
173 | int vmw_du_crtc_cursor_set(struct drm_crtc *crtc, struct drm_file *file_priv, | |
174 | uint32_t handle, uint32_t width, uint32_t height) | |
175 | { | |
176 | struct vmw_private *dev_priv = vmw_priv(crtc->dev); | |
fb1d9738 JB |
177 | struct vmw_display_unit *du = vmw_crtc_to_du(crtc); |
178 | struct vmw_surface *surface = NULL; | |
179 | struct vmw_dma_buffer *dmabuf = NULL; | |
180 | int ret; | |
181 | ||
bfb89928 DV |
182 | /* |
183 | * FIXME: Unclear whether there's any global state touched by the | |
184 | * cursor_set function, especially vmw_cursor_update_position looks | |
185 | * suspicious. For now take the easy route and reacquire all locks. We | |
186 | * can do this since the caller in the drm core doesn't check anything | |
187 | * which is protected by any looks. | |
188 | */ | |
189 | mutex_unlock(&crtc->mutex); | |
190 | drm_modeset_lock_all(dev_priv->dev); | |
191 | ||
baa91d64 | 192 | /* A lot of the code assumes this */ |
bfb89928 DV |
193 | if (handle && (width != 64 || height != 64)) { |
194 | ret = -EINVAL; | |
195 | goto out; | |
196 | } | |
baa91d64 | 197 | |
fb1d9738 | 198 | if (handle) { |
a5d0f576 VS |
199 | struct ttm_object_file *tfile = vmw_fpriv(file_priv)->tfile; |
200 | ||
e7ac9211 JB |
201 | ret = vmw_user_lookup_handle(dev_priv, tfile, |
202 | handle, &surface, &dmabuf); | |
203 | if (ret) { | |
204 | DRM_ERROR("failed to find surface or dmabuf: %i\n", ret); | |
bfb89928 DV |
205 | ret = -EINVAL; |
206 | goto out; | |
fb1d9738 JB |
207 | } |
208 | } | |
209 | ||
e7ac9211 JB |
210 | /* need to do this before taking down old image */ |
211 | if (surface && !surface->snooper.image) { | |
212 | DRM_ERROR("surface not suitable for cursor\n"); | |
213 | vmw_surface_unreference(&surface); | |
bfb89928 DV |
214 | ret = -EINVAL; |
215 | goto out; | |
e7ac9211 JB |
216 | } |
217 | ||
fb1d9738 JB |
218 | /* takedown old cursor */ |
219 | if (du->cursor_surface) { | |
220 | du->cursor_surface->snooper.crtc = NULL; | |
221 | vmw_surface_unreference(&du->cursor_surface); | |
222 | } | |
223 | if (du->cursor_dmabuf) | |
224 | vmw_dmabuf_unreference(&du->cursor_dmabuf); | |
225 | ||
226 | /* setup new image */ | |
227 | if (surface) { | |
228 | /* vmw_user_surface_lookup takes one reference */ | |
229 | du->cursor_surface = surface; | |
230 | ||
231 | du->cursor_surface->snooper.crtc = crtc; | |
232 | du->cursor_age = du->cursor_surface->snooper.age; | |
233 | vmw_cursor_update_image(dev_priv, surface->snooper.image, | |
234 | 64, 64, du->hotspot_x, du->hotspot_y); | |
235 | } else if (dmabuf) { | |
fb1d9738 JB |
236 | /* vmw_user_surface_lookup takes one reference */ |
237 | du->cursor_dmabuf = dmabuf; | |
238 | ||
6a91d97e JB |
239 | ret = vmw_cursor_update_dmabuf(dev_priv, dmabuf, width, height, |
240 | du->hotspot_x, du->hotspot_y); | |
fb1d9738 JB |
241 | } else { |
242 | vmw_cursor_update_position(dev_priv, false, 0, 0); | |
bfb89928 DV |
243 | ret = 0; |
244 | goto out; | |
fb1d9738 JB |
245 | } |
246 | ||
da7653d6 TH |
247 | vmw_cursor_update_position(dev_priv, true, |
248 | du->cursor_x + du->hotspot_x, | |
249 | du->cursor_y + du->hotspot_y); | |
fb1d9738 | 250 | |
bfb89928 DV |
251 | ret = 0; |
252 | out: | |
253 | drm_modeset_unlock_all(dev_priv->dev); | |
254 | mutex_lock(&crtc->mutex); | |
255 | ||
256 | return ret; | |
fb1d9738 JB |
257 | } |
258 | ||
259 | int vmw_du_crtc_cursor_move(struct drm_crtc *crtc, int x, int y) | |
260 | { | |
261 | struct vmw_private *dev_priv = vmw_priv(crtc->dev); | |
262 | struct vmw_display_unit *du = vmw_crtc_to_du(crtc); | |
263 | bool shown = du->cursor_surface || du->cursor_dmabuf ? true : false; | |
264 | ||
265 | du->cursor_x = x + crtc->x; | |
266 | du->cursor_y = y + crtc->y; | |
267 | ||
dac35663 DV |
268 | /* |
269 | * FIXME: Unclear whether there's any global state touched by the | |
270 | * cursor_set function, especially vmw_cursor_update_position looks | |
271 | * suspicious. For now take the easy route and reacquire all locks. We | |
272 | * can do this since the caller in the drm core doesn't check anything | |
273 | * which is protected by any looks. | |
274 | */ | |
275 | mutex_unlock(&crtc->mutex); | |
276 | drm_modeset_lock_all(dev_priv->dev); | |
277 | ||
fb1d9738 | 278 | vmw_cursor_update_position(dev_priv, shown, |
da7653d6 TH |
279 | du->cursor_x + du->hotspot_x, |
280 | du->cursor_y + du->hotspot_y); | |
fb1d9738 | 281 | |
dac35663 DV |
282 | drm_modeset_unlock_all(dev_priv->dev); |
283 | mutex_lock(&crtc->mutex); | |
284 | ||
fb1d9738 JB |
285 | return 0; |
286 | } | |
287 | ||
288 | void vmw_kms_cursor_snoop(struct vmw_surface *srf, | |
289 | struct ttm_object_file *tfile, | |
290 | struct ttm_buffer_object *bo, | |
291 | SVGA3dCmdHeader *header) | |
292 | { | |
293 | struct ttm_bo_kmap_obj map; | |
294 | unsigned long kmap_offset; | |
295 | unsigned long kmap_num; | |
296 | SVGA3dCopyBox *box; | |
297 | unsigned box_count; | |
298 | void *virtual; | |
299 | bool dummy; | |
300 | struct vmw_dma_cmd { | |
301 | SVGA3dCmdHeader header; | |
302 | SVGA3dCmdSurfaceDMA dma; | |
303 | } *cmd; | |
2ac86371 | 304 | int i, ret; |
fb1d9738 JB |
305 | |
306 | cmd = container_of(header, struct vmw_dma_cmd, header); | |
307 | ||
308 | /* No snooper installed */ | |
309 | if (!srf->snooper.image) | |
310 | return; | |
311 | ||
312 | if (cmd->dma.host.face != 0 || cmd->dma.host.mipmap != 0) { | |
313 | DRM_ERROR("face and mipmap for cursors should never != 0\n"); | |
314 | return; | |
315 | } | |
316 | ||
317 | if (cmd->header.size < 64) { | |
318 | DRM_ERROR("at least one full copy box must be given\n"); | |
319 | return; | |
320 | } | |
321 | ||
322 | box = (SVGA3dCopyBox *)&cmd[1]; | |
323 | box_count = (cmd->header.size - sizeof(SVGA3dCmdSurfaceDMA)) / | |
324 | sizeof(SVGA3dCopyBox); | |
325 | ||
2ac86371 | 326 | if (cmd->dma.guest.ptr.offset % PAGE_SIZE || |
fb1d9738 JB |
327 | box->x != 0 || box->y != 0 || box->z != 0 || |
328 | box->srcx != 0 || box->srcy != 0 || box->srcz != 0 || | |
2ac86371 | 329 | box->d != 1 || box_count != 1) { |
fb1d9738 | 330 | /* TODO handle none page aligned offsets */ |
2ac86371 JB |
331 | /* TODO handle more dst & src != 0 */ |
332 | /* TODO handle more then one copy */ | |
333 | DRM_ERROR("Cant snoop dma request for cursor!\n"); | |
334 | DRM_ERROR("(%u, %u, %u) (%u, %u, %u) (%ux%ux%u) %u %u\n", | |
335 | box->srcx, box->srcy, box->srcz, | |
336 | box->x, box->y, box->z, | |
337 | box->w, box->h, box->d, box_count, | |
338 | cmd->dma.guest.ptr.offset); | |
fb1d9738 JB |
339 | return; |
340 | } | |
341 | ||
342 | kmap_offset = cmd->dma.guest.ptr.offset >> PAGE_SHIFT; | |
343 | kmap_num = (64*64*4) >> PAGE_SHIFT; | |
344 | ||
345 | ret = ttm_bo_reserve(bo, true, false, false, 0); | |
346 | if (unlikely(ret != 0)) { | |
347 | DRM_ERROR("reserve failed\n"); | |
348 | return; | |
349 | } | |
350 | ||
351 | ret = ttm_bo_kmap(bo, kmap_offset, kmap_num, &map); | |
352 | if (unlikely(ret != 0)) | |
353 | goto err_unreserve; | |
354 | ||
355 | virtual = ttm_kmap_obj_virtual(&map, &dummy); | |
356 | ||
2ac86371 JB |
357 | if (box->w == 64 && cmd->dma.guest.pitch == 64*4) { |
358 | memcpy(srf->snooper.image, virtual, 64*64*4); | |
359 | } else { | |
360 | /* Image is unsigned pointer. */ | |
361 | for (i = 0; i < box->h; i++) | |
362 | memcpy(srf->snooper.image + i * 64, | |
363 | virtual + i * cmd->dma.guest.pitch, | |
364 | box->w * 4); | |
365 | } | |
366 | ||
fb1d9738 JB |
367 | srf->snooper.age++; |
368 | ||
369 | /* we can't call this function from this function since execbuf has | |
370 | * reserved fifo space. | |
371 | * | |
372 | * if (srf->snooper.crtc) | |
373 | * vmw_ldu_crtc_cursor_update_image(dev_priv, | |
374 | * srf->snooper.image, 64, 64, | |
375 | * du->hotspot_x, du->hotspot_y); | |
376 | */ | |
377 | ||
378 | ttm_bo_kunmap(&map); | |
379 | err_unreserve: | |
380 | ttm_bo_unreserve(bo); | |
381 | } | |
382 | ||
383 | void vmw_kms_cursor_post_execbuf(struct vmw_private *dev_priv) | |
384 | { | |
385 | struct drm_device *dev = dev_priv->dev; | |
386 | struct vmw_display_unit *du; | |
387 | struct drm_crtc *crtc; | |
388 | ||
389 | mutex_lock(&dev->mode_config.mutex); | |
390 | ||
391 | list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) { | |
392 | du = vmw_crtc_to_du(crtc); | |
393 | if (!du->cursor_surface || | |
394 | du->cursor_age == du->cursor_surface->snooper.age) | |
395 | continue; | |
396 | ||
397 | du->cursor_age = du->cursor_surface->snooper.age; | |
398 | vmw_cursor_update_image(dev_priv, | |
399 | du->cursor_surface->snooper.image, | |
400 | 64, 64, du->hotspot_x, du->hotspot_y); | |
401 | } | |
402 | ||
403 | mutex_unlock(&dev->mode_config.mutex); | |
404 | } | |
405 | ||
406 | /* | |
407 | * Generic framebuffer code | |
408 | */ | |
409 | ||
fb1d9738 JB |
410 | /* |
411 | * Surface framebuffer code | |
412 | */ | |
413 | ||
414 | #define vmw_framebuffer_to_vfbs(x) \ | |
415 | container_of(x, struct vmw_framebuffer_surface, base.base) | |
416 | ||
417 | struct vmw_framebuffer_surface { | |
418 | struct vmw_framebuffer base; | |
419 | struct vmw_surface *surface; | |
22ee861c | 420 | struct vmw_dma_buffer *buffer; |
3a939a5e TH |
421 | struct list_head head; |
422 | struct drm_master *master; | |
fb1d9738 JB |
423 | }; |
424 | ||
425 | void vmw_framebuffer_surface_destroy(struct drm_framebuffer *framebuffer) | |
426 | { | |
3a939a5e | 427 | struct vmw_framebuffer_surface *vfbs = |
fb1d9738 | 428 | vmw_framebuffer_to_vfbs(framebuffer); |
3a939a5e TH |
429 | struct vmw_master *vmaster = vmw_master(vfbs->master); |
430 | ||
431 | ||
432 | mutex_lock(&vmaster->fb_surf_mutex); | |
433 | list_del(&vfbs->head); | |
434 | mutex_unlock(&vmaster->fb_surf_mutex); | |
fb1d9738 | 435 | |
3a939a5e | 436 | drm_master_put(&vfbs->master); |
fb1d9738 | 437 | drm_framebuffer_cleanup(framebuffer); |
3a939a5e | 438 | vmw_surface_unreference(&vfbs->surface); |
90ff18bc | 439 | ttm_base_object_unref(&vfbs->base.user_obj); |
fb1d9738 | 440 | |
3a939a5e | 441 | kfree(vfbs); |
fb1d9738 JB |
442 | } |
443 | ||
56d1c78d | 444 | static int do_surface_dirty_sou(struct vmw_private *dev_priv, |
90ff18bc | 445 | struct drm_file *file_priv, |
56d1c78d | 446 | struct vmw_framebuffer *framebuffer, |
56d1c78d JB |
447 | unsigned flags, unsigned color, |
448 | struct drm_clip_rect *clips, | |
bd49ae46 JB |
449 | unsigned num_clips, int inc, |
450 | struct vmw_fence_obj **out_fence) | |
56d1c78d | 451 | { |
c6ca8391 | 452 | struct vmw_display_unit *units[VMWGFX_NUM_DISPLAY_UNITS]; |
6abff3c7 JB |
453 | struct drm_clip_rect *clips_ptr; |
454 | struct drm_clip_rect *tmp; | |
c6ca8391 | 455 | struct drm_crtc *crtc; |
56d1c78d | 456 | size_t fifo_size; |
c6ca8391 JB |
457 | int i, num_units; |
458 | int ret = 0; /* silence warning */ | |
459 | int left, right, top, bottom; | |
56d1c78d JB |
460 | |
461 | struct { | |
462 | SVGA3dCmdHeader header; | |
463 | SVGA3dCmdBlitSurfaceToScreen body; | |
464 | } *cmd; | |
c6ca8391 | 465 | SVGASignedRect *blits; |
56d1c78d | 466 | |
c6ca8391 JB |
467 | num_units = 0; |
468 | list_for_each_entry(crtc, &dev_priv->dev->mode_config.crtc_list, | |
469 | head) { | |
470 | if (crtc->fb != &framebuffer->base) | |
471 | continue; | |
472 | units[num_units++] = vmw_crtc_to_du(crtc); | |
473 | } | |
474 | ||
c6ca8391 JB |
475 | BUG_ON(!clips || !num_clips); |
476 | ||
6abff3c7 JB |
477 | tmp = kzalloc(sizeof(*tmp) * num_clips, GFP_KERNEL); |
478 | if (unlikely(tmp == NULL)) { | |
479 | DRM_ERROR("Temporary cliprect memory alloc failed.\n"); | |
480 | return -ENOMEM; | |
481 | } | |
482 | ||
c6ca8391 | 483 | fifo_size = sizeof(*cmd) + sizeof(SVGASignedRect) * num_clips; |
90ff18bc | 484 | cmd = kzalloc(fifo_size, GFP_KERNEL); |
56d1c78d | 485 | if (unlikely(cmd == NULL)) { |
90ff18bc | 486 | DRM_ERROR("Temporary fifo memory alloc failed.\n"); |
6abff3c7 JB |
487 | ret = -ENOMEM; |
488 | goto out_free_tmp; | |
56d1c78d JB |
489 | } |
490 | ||
6abff3c7 JB |
491 | /* setup blits pointer */ |
492 | blits = (SVGASignedRect *)&cmd[1]; | |
493 | ||
494 | /* initial clip region */ | |
c6ca8391 JB |
495 | left = clips->x1; |
496 | right = clips->x2; | |
497 | top = clips->y1; | |
498 | bottom = clips->y2; | |
499 | ||
f0c8a652 JB |
500 | /* skip the first clip rect */ |
501 | for (i = 1, clips_ptr = clips + inc; | |
502 | i < num_clips; i++, clips_ptr += inc) { | |
c6ca8391 JB |
503 | left = min_t(int, left, (int)clips_ptr->x1); |
504 | right = max_t(int, right, (int)clips_ptr->x2); | |
505 | top = min_t(int, top, (int)clips_ptr->y1); | |
506 | bottom = max_t(int, bottom, (int)clips_ptr->y2); | |
56d1c78d JB |
507 | } |
508 | ||
c6ca8391 | 509 | /* only need to do this once */ |
c6ca8391 JB |
510 | cmd->header.id = cpu_to_le32(SVGA_3D_CMD_BLIT_SURFACE_TO_SCREEN); |
511 | cmd->header.size = cpu_to_le32(fifo_size - sizeof(cmd->header)); | |
512 | ||
56d1c78d JB |
513 | cmd->body.srcRect.left = left; |
514 | cmd->body.srcRect.right = right; | |
515 | cmd->body.srcRect.top = top; | |
516 | cmd->body.srcRect.bottom = bottom; | |
517 | ||
c6ca8391 | 518 | clips_ptr = clips; |
c6ca8391 | 519 | for (i = 0; i < num_clips; i++, clips_ptr += inc) { |
6abff3c7 JB |
520 | tmp[i].x1 = clips_ptr->x1 - left; |
521 | tmp[i].x2 = clips_ptr->x2 - left; | |
522 | tmp[i].y1 = clips_ptr->y1 - top; | |
523 | tmp[i].y2 = clips_ptr->y2 - top; | |
c6ca8391 JB |
524 | } |
525 | ||
526 | /* do per unit writing, reuse fifo for each */ | |
527 | for (i = 0; i < num_units; i++) { | |
528 | struct vmw_display_unit *unit = units[i]; | |
6abff3c7 JB |
529 | struct vmw_clip_rect clip; |
530 | int num; | |
531 | ||
532 | clip.x1 = left - unit->crtc.x; | |
533 | clip.y1 = top - unit->crtc.y; | |
534 | clip.x2 = right - unit->crtc.x; | |
535 | clip.y2 = bottom - unit->crtc.y; | |
c6ca8391 JB |
536 | |
537 | /* skip any crtcs that misses the clip region */ | |
6abff3c7 JB |
538 | if (clip.x1 >= unit->crtc.mode.hdisplay || |
539 | clip.y1 >= unit->crtc.mode.vdisplay || | |
540 | clip.x2 <= 0 || clip.y2 <= 0) | |
c6ca8391 JB |
541 | continue; |
542 | ||
6abff3c7 JB |
543 | /* |
544 | * In order for the clip rects to be correctly scaled | |
545 | * the src and dest rects needs to be the same size. | |
546 | */ | |
547 | cmd->body.destRect.left = clip.x1; | |
548 | cmd->body.destRect.right = clip.x2; | |
549 | cmd->body.destRect.top = clip.y1; | |
550 | cmd->body.destRect.bottom = clip.y2; | |
551 | ||
552 | /* create a clip rect of the crtc in dest coords */ | |
553 | clip.x2 = unit->crtc.mode.hdisplay - clip.x1; | |
554 | clip.y2 = unit->crtc.mode.vdisplay - clip.y1; | |
555 | clip.x1 = 0 - clip.x1; | |
556 | clip.y1 = 0 - clip.y1; | |
557 | ||
c6ca8391 JB |
558 | /* need to reset sid as it is changed by execbuf */ |
559 | cmd->body.srcImage.sid = cpu_to_le32(framebuffer->user_handle); | |
c6ca8391 JB |
560 | cmd->body.destScreenId = unit->unit; |
561 | ||
6abff3c7 JB |
562 | /* clip and write blits to cmd stream */ |
563 | vmw_clip_cliprects(tmp, num_clips, clip, blits, &num); | |
c6ca8391 | 564 | |
6abff3c7 JB |
565 | /* if no cliprects hit skip this */ |
566 | if (num == 0) | |
567 | continue; | |
c6ca8391 | 568 | |
bd49ae46 JB |
569 | /* only return the last fence */ |
570 | if (out_fence && *out_fence) | |
571 | vmw_fence_obj_unreference(out_fence); | |
c6ca8391 | 572 | |
6abff3c7 JB |
573 | /* recalculate package length */ |
574 | fifo_size = sizeof(*cmd) + sizeof(SVGASignedRect) * num; | |
575 | cmd->header.size = cpu_to_le32(fifo_size - sizeof(cmd->header)); | |
c6ca8391 | 576 | ret = vmw_execbuf_process(file_priv, dev_priv, NULL, cmd, |
bd49ae46 | 577 | fifo_size, 0, NULL, out_fence); |
c6ca8391 JB |
578 | |
579 | if (unlikely(ret != 0)) | |
580 | break; | |
581 | } | |
56d1c78d | 582 | |
6abff3c7 | 583 | |
90ff18bc | 584 | kfree(cmd); |
6abff3c7 JB |
585 | out_free_tmp: |
586 | kfree(tmp); | |
56d1c78d | 587 | |
90ff18bc | 588 | return ret; |
5deb65cf | 589 | } |
fb1d9738 JB |
590 | |
591 | int vmw_framebuffer_surface_dirty(struct drm_framebuffer *framebuffer, | |
02b00162 | 592 | struct drm_file *file_priv, |
fb1d9738 JB |
593 | unsigned flags, unsigned color, |
594 | struct drm_clip_rect *clips, | |
595 | unsigned num_clips) | |
596 | { | |
597 | struct vmw_private *dev_priv = vmw_priv(framebuffer->dev); | |
3a939a5e | 598 | struct vmw_master *vmaster = vmw_master(file_priv->master); |
fb1d9738 JB |
599 | struct vmw_framebuffer_surface *vfbs = |
600 | vmw_framebuffer_to_vfbs(framebuffer); | |
fb1d9738 | 601 | struct drm_clip_rect norect; |
5deb65cf | 602 | int ret, inc = 1; |
fb1d9738 | 603 | |
3a939a5e TH |
604 | if (unlikely(vfbs->master != file_priv->master)) |
605 | return -EINVAL; | |
606 | ||
01e81419 JB |
607 | /* Require ScreenObject support for 3D */ |
608 | if (!dev_priv->sou_priv) | |
609 | return -EINVAL; | |
610 | ||
3a939a5e TH |
611 | ret = ttm_read_lock(&vmaster->lock, true); |
612 | if (unlikely(ret != 0)) | |
613 | return ret; | |
614 | ||
fb1d9738 JB |
615 | if (!num_clips) { |
616 | num_clips = 1; | |
617 | clips = &norect; | |
618 | norect.x1 = norect.y1 = 0; | |
619 | norect.x2 = framebuffer->width; | |
620 | norect.y2 = framebuffer->height; | |
621 | } else if (flags & DRM_MODE_FB_DIRTY_ANNOTATE_COPY) { | |
622 | num_clips /= 2; | |
623 | inc = 2; /* skip source rects */ | |
624 | } | |
625 | ||
c5c42360 | 626 | ret = do_surface_dirty_sou(dev_priv, file_priv, &vfbs->base, |
01e81419 | 627 | flags, color, |
bd49ae46 | 628 | clips, num_clips, inc, NULL); |
fb1d9738 | 629 | |
3a939a5e | 630 | ttm_read_unlock(&vmaster->lock); |
fb1d9738 JB |
631 | return 0; |
632 | } | |
633 | ||
634 | static struct drm_framebuffer_funcs vmw_framebuffer_surface_funcs = { | |
635 | .destroy = vmw_framebuffer_surface_destroy, | |
636 | .dirty = vmw_framebuffer_surface_dirty, | |
fb1d9738 JB |
637 | }; |
638 | ||
d3216a0c | 639 | static int vmw_kms_new_framebuffer_surface(struct vmw_private *dev_priv, |
3a939a5e | 640 | struct drm_file *file_priv, |
d3216a0c TH |
641 | struct vmw_surface *surface, |
642 | struct vmw_framebuffer **out, | |
643 | const struct drm_mode_fb_cmd | |
644 | *mode_cmd) | |
fb1d9738 JB |
645 | |
646 | { | |
647 | struct drm_device *dev = dev_priv->dev; | |
648 | struct vmw_framebuffer_surface *vfbs; | |
d3216a0c | 649 | enum SVGA3dSurfaceFormat format; |
3a939a5e | 650 | struct vmw_master *vmaster = vmw_master(file_priv->master); |
fb1d9738 JB |
651 | int ret; |
652 | ||
01e81419 JB |
653 | /* 3D is only supported on HWv8 hosts which supports screen objects */ |
654 | if (!dev_priv->sou_priv) | |
655 | return -ENOSYS; | |
656 | ||
d3216a0c TH |
657 | /* |
658 | * Sanity checks. | |
659 | */ | |
660 | ||
e7ac9211 JB |
661 | /* Surface must be marked as a scanout. */ |
662 | if (unlikely(!surface->scanout)) | |
663 | return -EINVAL; | |
664 | ||
d3216a0c TH |
665 | if (unlikely(surface->mip_levels[0] != 1 || |
666 | surface->num_sizes != 1 || | |
667 | surface->sizes[0].width < mode_cmd->width || | |
668 | surface->sizes[0].height < mode_cmd->height || | |
669 | surface->sizes[0].depth != 1)) { | |
670 | DRM_ERROR("Incompatible surface dimensions " | |
671 | "for requested mode.\n"); | |
672 | return -EINVAL; | |
673 | } | |
674 | ||
675 | switch (mode_cmd->depth) { | |
676 | case 32: | |
677 | format = SVGA3D_A8R8G8B8; | |
678 | break; | |
679 | case 24: | |
680 | format = SVGA3D_X8R8G8B8; | |
681 | break; | |
682 | case 16: | |
683 | format = SVGA3D_R5G6B5; | |
684 | break; | |
685 | case 15: | |
686 | format = SVGA3D_A1R5G5B5; | |
687 | break; | |
f01b7ba0 MD |
688 | case 8: |
689 | format = SVGA3D_LUMINANCE8; | |
690 | break; | |
d3216a0c TH |
691 | default: |
692 | DRM_ERROR("Invalid color depth: %d\n", mode_cmd->depth); | |
693 | return -EINVAL; | |
694 | } | |
695 | ||
696 | if (unlikely(format != surface->format)) { | |
697 | DRM_ERROR("Invalid surface format for requested mode.\n"); | |
698 | return -EINVAL; | |
699 | } | |
700 | ||
fb1d9738 JB |
701 | vfbs = kzalloc(sizeof(*vfbs), GFP_KERNEL); |
702 | if (!vfbs) { | |
703 | ret = -ENOMEM; | |
704 | goto out_err1; | |
705 | } | |
706 | ||
fb1d9738 JB |
707 | if (!vmw_surface_reference(surface)) { |
708 | DRM_ERROR("failed to reference surface %p\n", surface); | |
80f0b5af DV |
709 | ret = -EINVAL; |
710 | goto out_err2; | |
fb1d9738 JB |
711 | } |
712 | ||
713 | /* XXX get the first 3 from the surface info */ | |
d3216a0c | 714 | vfbs->base.base.bits_per_pixel = mode_cmd->bpp; |
01f2c773 | 715 | vfbs->base.base.pitches[0] = mode_cmd->pitch; |
d3216a0c TH |
716 | vfbs->base.base.depth = mode_cmd->depth; |
717 | vfbs->base.base.width = mode_cmd->width; | |
718 | vfbs->base.base.height = mode_cmd->height; | |
fb1d9738 | 719 | vfbs->surface = surface; |
90ff18bc | 720 | vfbs->base.user_handle = mode_cmd->handle; |
3a939a5e | 721 | vfbs->master = drm_master_get(file_priv->master); |
3a939a5e TH |
722 | |
723 | mutex_lock(&vmaster->fb_surf_mutex); | |
3a939a5e TH |
724 | list_add_tail(&vfbs->head, &vmaster->fb_surf); |
725 | mutex_unlock(&vmaster->fb_surf_mutex); | |
726 | ||
fb1d9738 JB |
727 | *out = &vfbs->base; |
728 | ||
80f0b5af DV |
729 | ret = drm_framebuffer_init(dev, &vfbs->base.base, |
730 | &vmw_framebuffer_surface_funcs); | |
731 | if (ret) | |
732 | goto out_err3; | |
733 | ||
fb1d9738 JB |
734 | return 0; |
735 | ||
736 | out_err3: | |
80f0b5af | 737 | vmw_surface_unreference(&surface); |
fb1d9738 JB |
738 | out_err2: |
739 | kfree(vfbs); | |
740 | out_err1: | |
741 | return ret; | |
742 | } | |
743 | ||
744 | /* | |
745 | * Dmabuf framebuffer code | |
746 | */ | |
747 | ||
748 | #define vmw_framebuffer_to_vfbd(x) \ | |
749 | container_of(x, struct vmw_framebuffer_dmabuf, base.base) | |
750 | ||
751 | struct vmw_framebuffer_dmabuf { | |
752 | struct vmw_framebuffer base; | |
753 | struct vmw_dma_buffer *buffer; | |
754 | }; | |
755 | ||
756 | void vmw_framebuffer_dmabuf_destroy(struct drm_framebuffer *framebuffer) | |
757 | { | |
758 | struct vmw_framebuffer_dmabuf *vfbd = | |
759 | vmw_framebuffer_to_vfbd(framebuffer); | |
760 | ||
761 | drm_framebuffer_cleanup(framebuffer); | |
762 | vmw_dmabuf_unreference(&vfbd->buffer); | |
90ff18bc | 763 | ttm_base_object_unref(&vfbd->base.user_obj); |
fb1d9738 JB |
764 | |
765 | kfree(vfbd); | |
766 | } | |
767 | ||
5deb65cf JB |
768 | static int do_dmabuf_dirty_ldu(struct vmw_private *dev_priv, |
769 | struct vmw_framebuffer *framebuffer, | |
5deb65cf JB |
770 | unsigned flags, unsigned color, |
771 | struct drm_clip_rect *clips, | |
772 | unsigned num_clips, int increment) | |
773 | { | |
774 | size_t fifo_size; | |
775 | int i; | |
776 | ||
777 | struct { | |
778 | uint32_t header; | |
779 | SVGAFifoCmdUpdate body; | |
780 | } *cmd; | |
781 | ||
782 | fifo_size = sizeof(*cmd) * num_clips; | |
783 | cmd = vmw_fifo_reserve(dev_priv, fifo_size); | |
784 | if (unlikely(cmd == NULL)) { | |
785 | DRM_ERROR("Fifo reserve failed.\n"); | |
786 | return -ENOMEM; | |
787 | } | |
788 | ||
789 | memset(cmd, 0, fifo_size); | |
790 | for (i = 0; i < num_clips; i++, clips += increment) { | |
791 | cmd[i].header = cpu_to_le32(SVGA_CMD_UPDATE); | |
792 | cmd[i].body.x = cpu_to_le32(clips->x1); | |
793 | cmd[i].body.y = cpu_to_le32(clips->y1); | |
794 | cmd[i].body.width = cpu_to_le32(clips->x2 - clips->x1); | |
795 | cmd[i].body.height = cpu_to_le32(clips->y2 - clips->y1); | |
796 | } | |
797 | ||
798 | vmw_fifo_commit(dev_priv, fifo_size); | |
799 | return 0; | |
800 | } | |
801 | ||
c6ca8391 JB |
802 | static int do_dmabuf_define_gmrfb(struct drm_file *file_priv, |
803 | struct vmw_private *dev_priv, | |
804 | struct vmw_framebuffer *framebuffer) | |
56d1c78d | 805 | { |
64fc9944 | 806 | int depth = framebuffer->base.depth; |
56d1c78d | 807 | size_t fifo_size; |
c6ca8391 | 808 | int ret; |
56d1c78d JB |
809 | |
810 | struct { | |
811 | uint32_t header; | |
812 | SVGAFifoCmdDefineGMRFB body; | |
813 | } *cmd; | |
56d1c78d | 814 | |
64fc9944 JB |
815 | /* Emulate RGBA support, contrary to svga_reg.h this is not |
816 | * supported by hosts. This is only a problem if we are reading | |
817 | * this value later and expecting what we uploaded back. | |
818 | */ | |
819 | if (depth == 32) | |
820 | depth = 24; | |
821 | ||
c6ca8391 | 822 | fifo_size = sizeof(*cmd); |
56d1c78d JB |
823 | cmd = kmalloc(fifo_size, GFP_KERNEL); |
824 | if (unlikely(cmd == NULL)) { | |
825 | DRM_ERROR("Failed to allocate temporary cmd buffer.\n"); | |
826 | return -ENOMEM; | |
827 | } | |
828 | ||
829 | memset(cmd, 0, fifo_size); | |
830 | cmd->header = SVGA_CMD_DEFINE_GMRFB; | |
831 | cmd->body.format.bitsPerPixel = framebuffer->base.bits_per_pixel; | |
64fc9944 | 832 | cmd->body.format.colorDepth = depth; |
56d1c78d | 833 | cmd->body.format.reserved = 0; |
01f2c773 | 834 | cmd->body.bytesPerLine = framebuffer->base.pitches[0]; |
90ff18bc | 835 | cmd->body.ptr.gmrId = framebuffer->user_handle; |
56d1c78d JB |
836 | cmd->body.ptr.offset = 0; |
837 | ||
56d1c78d | 838 | ret = vmw_execbuf_process(file_priv, dev_priv, NULL, cmd, |
bb1bd2f4 | 839 | fifo_size, 0, NULL, NULL); |
56d1c78d JB |
840 | |
841 | kfree(cmd); | |
842 | ||
843 | return ret; | |
844 | } | |
845 | ||
c6ca8391 JB |
846 | static int do_dmabuf_dirty_sou(struct drm_file *file_priv, |
847 | struct vmw_private *dev_priv, | |
848 | struct vmw_framebuffer *framebuffer, | |
c6ca8391 JB |
849 | unsigned flags, unsigned color, |
850 | struct drm_clip_rect *clips, | |
bd49ae46 JB |
851 | unsigned num_clips, int increment, |
852 | struct vmw_fence_obj **out_fence) | |
c6ca8391 JB |
853 | { |
854 | struct vmw_display_unit *units[VMWGFX_NUM_DISPLAY_UNITS]; | |
855 | struct drm_clip_rect *clips_ptr; | |
856 | int i, k, num_units, ret; | |
857 | struct drm_crtc *crtc; | |
858 | size_t fifo_size; | |
859 | ||
860 | struct { | |
861 | uint32_t header; | |
862 | SVGAFifoCmdBlitGMRFBToScreen body; | |
863 | } *blits; | |
864 | ||
865 | ret = do_dmabuf_define_gmrfb(file_priv, dev_priv, framebuffer); | |
866 | if (unlikely(ret != 0)) | |
867 | return ret; /* define_gmrfb prints warnings */ | |
868 | ||
869 | fifo_size = sizeof(*blits) * num_clips; | |
870 | blits = kmalloc(fifo_size, GFP_KERNEL); | |
871 | if (unlikely(blits == NULL)) { | |
872 | DRM_ERROR("Failed to allocate temporary cmd buffer.\n"); | |
873 | return -ENOMEM; | |
874 | } | |
875 | ||
876 | num_units = 0; | |
877 | list_for_each_entry(crtc, &dev_priv->dev->mode_config.crtc_list, head) { | |
878 | if (crtc->fb != &framebuffer->base) | |
879 | continue; | |
880 | units[num_units++] = vmw_crtc_to_du(crtc); | |
881 | } | |
882 | ||
883 | for (k = 0; k < num_units; k++) { | |
884 | struct vmw_display_unit *unit = units[k]; | |
885 | int hit_num = 0; | |
886 | ||
887 | clips_ptr = clips; | |
888 | for (i = 0; i < num_clips; i++, clips_ptr += increment) { | |
889 | int clip_x1 = clips_ptr->x1 - unit->crtc.x; | |
890 | int clip_y1 = clips_ptr->y1 - unit->crtc.y; | |
891 | int clip_x2 = clips_ptr->x2 - unit->crtc.x; | |
892 | int clip_y2 = clips_ptr->y2 - unit->crtc.y; | |
6abff3c7 | 893 | int move_x, move_y; |
c6ca8391 JB |
894 | |
895 | /* skip any crtcs that misses the clip region */ | |
896 | if (clip_x1 >= unit->crtc.mode.hdisplay || | |
897 | clip_y1 >= unit->crtc.mode.vdisplay || | |
898 | clip_x2 <= 0 || clip_y2 <= 0) | |
899 | continue; | |
900 | ||
6abff3c7 JB |
901 | /* clip size to crtc size */ |
902 | clip_x2 = min_t(int, clip_x2, unit->crtc.mode.hdisplay); | |
903 | clip_y2 = min_t(int, clip_y2, unit->crtc.mode.vdisplay); | |
904 | ||
905 | /* translate both src and dest to bring clip into screen */ | |
906 | move_x = min_t(int, clip_x1, 0); | |
907 | move_y = min_t(int, clip_y1, 0); | |
908 | ||
909 | /* actual translate done here */ | |
c6ca8391 JB |
910 | blits[hit_num].header = SVGA_CMD_BLIT_GMRFB_TO_SCREEN; |
911 | blits[hit_num].body.destScreenId = unit->unit; | |
6abff3c7 JB |
912 | blits[hit_num].body.srcOrigin.x = clips_ptr->x1 - move_x; |
913 | blits[hit_num].body.srcOrigin.y = clips_ptr->y1 - move_y; | |
914 | blits[hit_num].body.destRect.left = clip_x1 - move_x; | |
915 | blits[hit_num].body.destRect.top = clip_y1 - move_y; | |
c6ca8391 JB |
916 | blits[hit_num].body.destRect.right = clip_x2; |
917 | blits[hit_num].body.destRect.bottom = clip_y2; | |
918 | hit_num++; | |
919 | } | |
920 | ||
921 | /* no clips hit the crtc */ | |
922 | if (hit_num == 0) | |
923 | continue; | |
924 | ||
bd49ae46 JB |
925 | /* only return the last fence */ |
926 | if (out_fence && *out_fence) | |
927 | vmw_fence_obj_unreference(out_fence); | |
928 | ||
c6ca8391 JB |
929 | fifo_size = sizeof(*blits) * hit_num; |
930 | ret = vmw_execbuf_process(file_priv, dev_priv, NULL, blits, | |
bd49ae46 | 931 | fifo_size, 0, NULL, out_fence); |
c6ca8391 JB |
932 | |
933 | if (unlikely(ret != 0)) | |
934 | break; | |
935 | } | |
936 | ||
937 | kfree(blits); | |
938 | ||
939 | return ret; | |
940 | } | |
941 | ||
fb1d9738 | 942 | int vmw_framebuffer_dmabuf_dirty(struct drm_framebuffer *framebuffer, |
02b00162 | 943 | struct drm_file *file_priv, |
fb1d9738 JB |
944 | unsigned flags, unsigned color, |
945 | struct drm_clip_rect *clips, | |
946 | unsigned num_clips) | |
947 | { | |
948 | struct vmw_private *dev_priv = vmw_priv(framebuffer->dev); | |
3a939a5e | 949 | struct vmw_master *vmaster = vmw_master(file_priv->master); |
5deb65cf JB |
950 | struct vmw_framebuffer_dmabuf *vfbd = |
951 | vmw_framebuffer_to_vfbd(framebuffer); | |
fb1d9738 | 952 | struct drm_clip_rect norect; |
5deb65cf | 953 | int ret, increment = 1; |
fb1d9738 | 954 | |
3a939a5e TH |
955 | ret = ttm_read_lock(&vmaster->lock, true); |
956 | if (unlikely(ret != 0)) | |
957 | return ret; | |
958 | ||
df1c93ba | 959 | if (!num_clips) { |
fb1d9738 JB |
960 | num_clips = 1; |
961 | clips = &norect; | |
962 | norect.x1 = norect.y1 = 0; | |
963 | norect.x2 = framebuffer->width; | |
964 | norect.y2 = framebuffer->height; | |
965 | } else if (flags & DRM_MODE_FB_DIRTY_ANNOTATE_COPY) { | |
966 | num_clips /= 2; | |
967 | increment = 2; | |
968 | } | |
969 | ||
56d1c78d | 970 | if (dev_priv->ldu_priv) { |
c5c42360 | 971 | ret = do_dmabuf_dirty_ldu(dev_priv, &vfbd->base, |
56d1c78d JB |
972 | flags, color, |
973 | clips, num_clips, increment); | |
974 | } else { | |
975 | ret = do_dmabuf_dirty_sou(file_priv, dev_priv, &vfbd->base, | |
c5c42360 | 976 | flags, color, |
bd49ae46 | 977 | clips, num_clips, increment, NULL); |
56d1c78d | 978 | } |
fb1d9738 | 979 | |
3a939a5e | 980 | ttm_read_unlock(&vmaster->lock); |
5deb65cf | 981 | return ret; |
fb1d9738 JB |
982 | } |
983 | ||
984 | static struct drm_framebuffer_funcs vmw_framebuffer_dmabuf_funcs = { | |
985 | .destroy = vmw_framebuffer_dmabuf_destroy, | |
986 | .dirty = vmw_framebuffer_dmabuf_dirty, | |
fb1d9738 JB |
987 | }; |
988 | ||
497a3ff9 JB |
989 | /** |
990 | * Pin the dmabuffer to the start of vram. | |
991 | */ | |
fb1d9738 JB |
992 | static int vmw_framebuffer_dmabuf_pin(struct vmw_framebuffer *vfb) |
993 | { | |
994 | struct vmw_private *dev_priv = vmw_priv(vfb->base.dev); | |
995 | struct vmw_framebuffer_dmabuf *vfbd = | |
996 | vmw_framebuffer_to_vfbd(&vfb->base); | |
997 | int ret; | |
998 | ||
56d1c78d JB |
999 | /* This code should not be used with screen objects */ |
1000 | BUG_ON(dev_priv->sou_priv); | |
d7e1958d | 1001 | |
fb1d9738 JB |
1002 | vmw_overlay_pause_all(dev_priv); |
1003 | ||
d991ef03 | 1004 | ret = vmw_dmabuf_to_start_of_vram(dev_priv, vfbd->buffer, true, false); |
fb1d9738 | 1005 | |
fb1d9738 JB |
1006 | vmw_overlay_resume_all(dev_priv); |
1007 | ||
316ab13a JB |
1008 | WARN_ON(ret != 0); |
1009 | ||
fb1d9738 JB |
1010 | return 0; |
1011 | } | |
1012 | ||
1013 | static int vmw_framebuffer_dmabuf_unpin(struct vmw_framebuffer *vfb) | |
1014 | { | |
1015 | struct vmw_private *dev_priv = vmw_priv(vfb->base.dev); | |
1016 | struct vmw_framebuffer_dmabuf *vfbd = | |
1017 | vmw_framebuffer_to_vfbd(&vfb->base); | |
1018 | ||
1019 | if (!vfbd->buffer) { | |
1020 | WARN_ON(!vfbd->buffer); | |
1021 | return 0; | |
1022 | } | |
1023 | ||
d991ef03 | 1024 | return vmw_dmabuf_unpin(dev_priv, vfbd->buffer, false); |
fb1d9738 JB |
1025 | } |
1026 | ||
d3216a0c TH |
1027 | static int vmw_kms_new_framebuffer_dmabuf(struct vmw_private *dev_priv, |
1028 | struct vmw_dma_buffer *dmabuf, | |
1029 | struct vmw_framebuffer **out, | |
1030 | const struct drm_mode_fb_cmd | |
1031 | *mode_cmd) | |
fb1d9738 JB |
1032 | |
1033 | { | |
1034 | struct drm_device *dev = dev_priv->dev; | |
1035 | struct vmw_framebuffer_dmabuf *vfbd; | |
d3216a0c | 1036 | unsigned int requested_size; |
fb1d9738 JB |
1037 | int ret; |
1038 | ||
d3216a0c TH |
1039 | requested_size = mode_cmd->height * mode_cmd->pitch; |
1040 | if (unlikely(requested_size > dmabuf->base.num_pages * PAGE_SIZE)) { | |
1041 | DRM_ERROR("Screen buffer object size is too small " | |
1042 | "for requested mode.\n"); | |
1043 | return -EINVAL; | |
1044 | } | |
1045 | ||
c337ada7 JB |
1046 | /* Limited framebuffer color depth support for screen objects */ |
1047 | if (dev_priv->sou_priv) { | |
1048 | switch (mode_cmd->depth) { | |
1049 | case 32: | |
1050 | case 24: | |
1051 | /* Only support 32 bpp for 32 and 24 depth fbs */ | |
1052 | if (mode_cmd->bpp == 32) | |
1053 | break; | |
1054 | ||
1055 | DRM_ERROR("Invalid color depth/bbp: %d %d\n", | |
1056 | mode_cmd->depth, mode_cmd->bpp); | |
1057 | return -EINVAL; | |
1058 | case 16: | |
1059 | case 15: | |
1060 | /* Only support 16 bpp for 16 and 15 depth fbs */ | |
1061 | if (mode_cmd->bpp == 16) | |
1062 | break; | |
1063 | ||
1064 | DRM_ERROR("Invalid color depth/bbp: %d %d\n", | |
1065 | mode_cmd->depth, mode_cmd->bpp); | |
1066 | return -EINVAL; | |
1067 | default: | |
1068 | DRM_ERROR("Invalid color depth: %d\n", mode_cmd->depth); | |
1069 | return -EINVAL; | |
1070 | } | |
1071 | } | |
1072 | ||
fb1d9738 JB |
1073 | vfbd = kzalloc(sizeof(*vfbd), GFP_KERNEL); |
1074 | if (!vfbd) { | |
1075 | ret = -ENOMEM; | |
1076 | goto out_err1; | |
1077 | } | |
1078 | ||
fb1d9738 JB |
1079 | if (!vmw_dmabuf_reference(dmabuf)) { |
1080 | DRM_ERROR("failed to reference dmabuf %p\n", dmabuf); | |
80f0b5af DV |
1081 | ret = -EINVAL; |
1082 | goto out_err2; | |
fb1d9738 JB |
1083 | } |
1084 | ||
d3216a0c | 1085 | vfbd->base.base.bits_per_pixel = mode_cmd->bpp; |
01f2c773 | 1086 | vfbd->base.base.pitches[0] = mode_cmd->pitch; |
d3216a0c TH |
1087 | vfbd->base.base.depth = mode_cmd->depth; |
1088 | vfbd->base.base.width = mode_cmd->width; | |
1089 | vfbd->base.base.height = mode_cmd->height; | |
56d1c78d JB |
1090 | if (!dev_priv->sou_priv) { |
1091 | vfbd->base.pin = vmw_framebuffer_dmabuf_pin; | |
1092 | vfbd->base.unpin = vmw_framebuffer_dmabuf_unpin; | |
1093 | } | |
2fcd5a73 | 1094 | vfbd->base.dmabuf = true; |
fb1d9738 | 1095 | vfbd->buffer = dmabuf; |
90ff18bc | 1096 | vfbd->base.user_handle = mode_cmd->handle; |
fb1d9738 JB |
1097 | *out = &vfbd->base; |
1098 | ||
80f0b5af DV |
1099 | ret = drm_framebuffer_init(dev, &vfbd->base.base, |
1100 | &vmw_framebuffer_dmabuf_funcs); | |
1101 | if (ret) | |
1102 | goto out_err3; | |
1103 | ||
fb1d9738 JB |
1104 | return 0; |
1105 | ||
1106 | out_err3: | |
80f0b5af | 1107 | vmw_dmabuf_unreference(&dmabuf); |
fb1d9738 JB |
1108 | out_err2: |
1109 | kfree(vfbd); | |
1110 | out_err1: | |
1111 | return ret; | |
1112 | } | |
1113 | ||
1114 | /* | |
1115 | * Generic Kernel modesetting functions | |
1116 | */ | |
1117 | ||
1118 | static struct drm_framebuffer *vmw_kms_fb_create(struct drm_device *dev, | |
1119 | struct drm_file *file_priv, | |
308e5bcb | 1120 | struct drm_mode_fb_cmd2 *mode_cmd2) |
fb1d9738 JB |
1121 | { |
1122 | struct vmw_private *dev_priv = vmw_priv(dev); | |
1123 | struct ttm_object_file *tfile = vmw_fpriv(file_priv)->tfile; | |
1124 | struct vmw_framebuffer *vfb = NULL; | |
1125 | struct vmw_surface *surface = NULL; | |
1126 | struct vmw_dma_buffer *bo = NULL; | |
90ff18bc | 1127 | struct ttm_base_object *user_obj; |
308e5bcb | 1128 | struct drm_mode_fb_cmd mode_cmd; |
fb1d9738 JB |
1129 | int ret; |
1130 | ||
308e5bcb JB |
1131 | mode_cmd.width = mode_cmd2->width; |
1132 | mode_cmd.height = mode_cmd2->height; | |
1133 | mode_cmd.pitch = mode_cmd2->pitches[0]; | |
1134 | mode_cmd.handle = mode_cmd2->handles[0]; | |
248dbc23 | 1135 | drm_fb_get_bpp_depth(mode_cmd2->pixel_format, &mode_cmd.depth, |
308e5bcb JB |
1136 | &mode_cmd.bpp); |
1137 | ||
d3216a0c TH |
1138 | /** |
1139 | * This code should be conditioned on Screen Objects not being used. | |
1140 | * If screen objects are used, we can allocate a GMR to hold the | |
1141 | * requested framebuffer. | |
1142 | */ | |
1143 | ||
8a783896 | 1144 | if (!vmw_kms_validate_mode_vram(dev_priv, |
1a464cbb LT |
1145 | mode_cmd.pitch, |
1146 | mode_cmd.height)) { | |
d3216a0c | 1147 | DRM_ERROR("VRAM size is too small for requested mode.\n"); |
d9826409 | 1148 | return ERR_PTR(-ENOMEM); |
d3216a0c TH |
1149 | } |
1150 | ||
90ff18bc TH |
1151 | /* |
1152 | * Take a reference on the user object of the resource | |
1153 | * backing the kms fb. This ensures that user-space handle | |
1154 | * lookups on that resource will always work as long as | |
1155 | * it's registered with a kms framebuffer. This is important, | |
1156 | * since vmw_execbuf_process identifies resources in the | |
1157 | * command stream using user-space handles. | |
1158 | */ | |
1159 | ||
308e5bcb | 1160 | user_obj = ttm_base_object_lookup(tfile, mode_cmd.handle); |
90ff18bc TH |
1161 | if (unlikely(user_obj == NULL)) { |
1162 | DRM_ERROR("Could not locate requested kms frame buffer.\n"); | |
1163 | return ERR_PTR(-ENOENT); | |
1164 | } | |
1165 | ||
d3216a0c TH |
1166 | /** |
1167 | * End conditioned code. | |
1168 | */ | |
1169 | ||
e7ac9211 JB |
1170 | /* returns either a dmabuf or surface */ |
1171 | ret = vmw_user_lookup_handle(dev_priv, tfile, | |
4cf73129 | 1172 | mode_cmd.handle, |
e7ac9211 | 1173 | &surface, &bo); |
fb1d9738 | 1174 | if (ret) |
e7ac9211 JB |
1175 | goto err_out; |
1176 | ||
1177 | /* Create the new framebuffer depending one what we got back */ | |
1178 | if (bo) | |
1179 | ret = vmw_kms_new_framebuffer_dmabuf(dev_priv, bo, &vfb, | |
4cf73129 | 1180 | &mode_cmd); |
e7ac9211 JB |
1181 | else if (surface) |
1182 | ret = vmw_kms_new_framebuffer_surface(dev_priv, file_priv, | |
4cf73129 | 1183 | surface, &vfb, &mode_cmd); |
e7ac9211 JB |
1184 | else |
1185 | BUG(); | |
1186 | ||
1187 | err_out: | |
1188 | /* vmw_user_lookup_handle takes one ref so does new_fb */ | |
1189 | if (bo) | |
1190 | vmw_dmabuf_unreference(&bo); | |
1191 | if (surface) | |
1192 | vmw_surface_unreference(&surface); | |
fb1d9738 JB |
1193 | |
1194 | if (ret) { | |
1195 | DRM_ERROR("failed to create vmw_framebuffer: %i\n", ret); | |
90ff18bc | 1196 | ttm_base_object_unref(&user_obj); |
cce13ff7 | 1197 | return ERR_PTR(ret); |
90ff18bc TH |
1198 | } else |
1199 | vfb->user_obj = user_obj; | |
fb1d9738 JB |
1200 | |
1201 | return &vfb->base; | |
1202 | } | |
1203 | ||
e6ecefaa | 1204 | static const struct drm_mode_config_funcs vmw_kms_funcs = { |
fb1d9738 | 1205 | .fb_create = vmw_kms_fb_create, |
fb1d9738 JB |
1206 | }; |
1207 | ||
2fcd5a73 JB |
1208 | int vmw_kms_present(struct vmw_private *dev_priv, |
1209 | struct drm_file *file_priv, | |
1210 | struct vmw_framebuffer *vfb, | |
1211 | struct vmw_surface *surface, | |
1212 | uint32_t sid, | |
1213 | int32_t destX, int32_t destY, | |
1214 | struct drm_vmw_rect *clips, | |
1215 | uint32_t num_clips) | |
1216 | { | |
c6ca8391 | 1217 | struct vmw_display_unit *units[VMWGFX_NUM_DISPLAY_UNITS]; |
6abff3c7 | 1218 | struct drm_clip_rect *tmp; |
c6ca8391 | 1219 | struct drm_crtc *crtc; |
2fcd5a73 | 1220 | size_t fifo_size; |
c6ca8391 JB |
1221 | int i, k, num_units; |
1222 | int ret = 0; /* silence warning */ | |
203dc220 | 1223 | int left, right, top, bottom; |
2fcd5a73 JB |
1224 | |
1225 | struct { | |
1226 | SVGA3dCmdHeader header; | |
1227 | SVGA3dCmdBlitSurfaceToScreen body; | |
1228 | } *cmd; | |
1229 | SVGASignedRect *blits; | |
1230 | ||
c6ca8391 JB |
1231 | num_units = 0; |
1232 | list_for_each_entry(crtc, &dev_priv->dev->mode_config.crtc_list, head) { | |
1233 | if (crtc->fb != &vfb->base) | |
1234 | continue; | |
1235 | units[num_units++] = vmw_crtc_to_du(crtc); | |
1236 | } | |
1237 | ||
2fcd5a73 JB |
1238 | BUG_ON(surface == NULL); |
1239 | BUG_ON(!clips || !num_clips); | |
1240 | ||
6abff3c7 JB |
1241 | tmp = kzalloc(sizeof(*tmp) * num_clips, GFP_KERNEL); |
1242 | if (unlikely(tmp == NULL)) { | |
1243 | DRM_ERROR("Temporary cliprect memory alloc failed.\n"); | |
1244 | return -ENOMEM; | |
1245 | } | |
1246 | ||
2fcd5a73 JB |
1247 | fifo_size = sizeof(*cmd) + sizeof(SVGASignedRect) * num_clips; |
1248 | cmd = kmalloc(fifo_size, GFP_KERNEL); | |
1249 | if (unlikely(cmd == NULL)) { | |
1250 | DRM_ERROR("Failed to allocate temporary fifo memory.\n"); | |
6abff3c7 JB |
1251 | ret = -ENOMEM; |
1252 | goto out_free_tmp; | |
2fcd5a73 JB |
1253 | } |
1254 | ||
203dc220 JB |
1255 | left = clips->x; |
1256 | right = clips->x + clips->w; | |
1257 | top = clips->y; | |
1258 | bottom = clips->y + clips->h; | |
1259 | ||
1260 | for (i = 1; i < num_clips; i++) { | |
1261 | left = min_t(int, left, (int)clips[i].x); | |
1262 | right = max_t(int, right, (int)clips[i].x + clips[i].w); | |
1263 | top = min_t(int, top, (int)clips[i].y); | |
1264 | bottom = max_t(int, bottom, (int)clips[i].y + clips[i].h); | |
1265 | } | |
1266 | ||
c6ca8391 | 1267 | /* only need to do this once */ |
2fcd5a73 | 1268 | memset(cmd, 0, fifo_size); |
2fcd5a73 | 1269 | cmd->header.id = cpu_to_le32(SVGA_3D_CMD_BLIT_SURFACE_TO_SCREEN); |
6abff3c7 JB |
1270 | |
1271 | blits = (SVGASignedRect *)&cmd[1]; | |
2fcd5a73 | 1272 | |
203dc220 JB |
1273 | cmd->body.srcRect.left = left; |
1274 | cmd->body.srcRect.right = right; | |
1275 | cmd->body.srcRect.top = top; | |
1276 | cmd->body.srcRect.bottom = bottom; | |
2fcd5a73 | 1277 | |
2fcd5a73 | 1278 | for (i = 0; i < num_clips; i++) { |
6abff3c7 JB |
1279 | tmp[i].x1 = clips[i].x - left; |
1280 | tmp[i].x2 = clips[i].x + clips[i].w - left; | |
1281 | tmp[i].y1 = clips[i].y - top; | |
1282 | tmp[i].y2 = clips[i].y + clips[i].h - top; | |
2fcd5a73 JB |
1283 | } |
1284 | ||
c6ca8391 JB |
1285 | for (k = 0; k < num_units; k++) { |
1286 | struct vmw_display_unit *unit = units[k]; | |
6abff3c7 JB |
1287 | struct vmw_clip_rect clip; |
1288 | int num; | |
1289 | ||
1290 | clip.x1 = left + destX - unit->crtc.x; | |
1291 | clip.y1 = top + destY - unit->crtc.y; | |
1292 | clip.x2 = right + destX - unit->crtc.x; | |
1293 | clip.y2 = bottom + destY - unit->crtc.y; | |
c6ca8391 JB |
1294 | |
1295 | /* skip any crtcs that misses the clip region */ | |
6abff3c7 JB |
1296 | if (clip.x1 >= unit->crtc.mode.hdisplay || |
1297 | clip.y1 >= unit->crtc.mode.vdisplay || | |
1298 | clip.x2 <= 0 || clip.y2 <= 0) | |
c6ca8391 JB |
1299 | continue; |
1300 | ||
6abff3c7 JB |
1301 | /* |
1302 | * In order for the clip rects to be correctly scaled | |
1303 | * the src and dest rects needs to be the same size. | |
1304 | */ | |
1305 | cmd->body.destRect.left = clip.x1; | |
1306 | cmd->body.destRect.right = clip.x2; | |
1307 | cmd->body.destRect.top = clip.y1; | |
1308 | cmd->body.destRect.bottom = clip.y2; | |
1309 | ||
1310 | /* create a clip rect of the crtc in dest coords */ | |
1311 | clip.x2 = unit->crtc.mode.hdisplay - clip.x1; | |
1312 | clip.y2 = unit->crtc.mode.vdisplay - clip.y1; | |
1313 | clip.x1 = 0 - clip.x1; | |
1314 | clip.y1 = 0 - clip.y1; | |
1315 | ||
c6ca8391 JB |
1316 | /* need to reset sid as it is changed by execbuf */ |
1317 | cmd->body.srcImage.sid = sid; | |
c6ca8391 JB |
1318 | cmd->body.destScreenId = unit->unit; |
1319 | ||
6abff3c7 JB |
1320 | /* clip and write blits to cmd stream */ |
1321 | vmw_clip_cliprects(tmp, num_clips, clip, blits, &num); | |
c6ca8391 | 1322 | |
6abff3c7 JB |
1323 | /* if no cliprects hit skip this */ |
1324 | if (num == 0) | |
1325 | continue; | |
c6ca8391 | 1326 | |
6abff3c7 JB |
1327 | /* recalculate package length */ |
1328 | fifo_size = sizeof(*cmd) + sizeof(SVGASignedRect) * num; | |
1329 | cmd->header.size = cpu_to_le32(fifo_size - sizeof(cmd->header)); | |
c6ca8391 | 1330 | ret = vmw_execbuf_process(file_priv, dev_priv, NULL, cmd, |
bb1bd2f4 | 1331 | fifo_size, 0, NULL, NULL); |
c6ca8391 JB |
1332 | |
1333 | if (unlikely(ret != 0)) | |
1334 | break; | |
1335 | } | |
2fcd5a73 JB |
1336 | |
1337 | kfree(cmd); | |
6abff3c7 JB |
1338 | out_free_tmp: |
1339 | kfree(tmp); | |
2fcd5a73 JB |
1340 | |
1341 | return ret; | |
1342 | } | |
1343 | ||
1344 | int vmw_kms_readback(struct vmw_private *dev_priv, | |
1345 | struct drm_file *file_priv, | |
1346 | struct vmw_framebuffer *vfb, | |
1347 | struct drm_vmw_fence_rep __user *user_fence_rep, | |
1348 | struct drm_vmw_rect *clips, | |
1349 | uint32_t num_clips) | |
1350 | { | |
1351 | struct vmw_framebuffer_dmabuf *vfbd = | |
1352 | vmw_framebuffer_to_vfbd(&vfb->base); | |
1353 | struct vmw_dma_buffer *dmabuf = vfbd->buffer; | |
1354 | struct vmw_display_unit *units[VMWGFX_NUM_DISPLAY_UNITS]; | |
1355 | struct drm_crtc *crtc; | |
1356 | size_t fifo_size; | |
1357 | int i, k, ret, num_units, blits_pos; | |
1358 | ||
1359 | struct { | |
1360 | uint32_t header; | |
1361 | SVGAFifoCmdDefineGMRFB body; | |
1362 | } *cmd; | |
1363 | struct { | |
1364 | uint32_t header; | |
1365 | SVGAFifoCmdBlitScreenToGMRFB body; | |
1366 | } *blits; | |
1367 | ||
1368 | num_units = 0; | |
1369 | list_for_each_entry(crtc, &dev_priv->dev->mode_config.crtc_list, head) { | |
1370 | if (crtc->fb != &vfb->base) | |
1371 | continue; | |
1372 | units[num_units++] = vmw_crtc_to_du(crtc); | |
1373 | } | |
1374 | ||
1375 | BUG_ON(dmabuf == NULL); | |
1376 | BUG_ON(!clips || !num_clips); | |
1377 | ||
1378 | /* take a safe guess at fifo size */ | |
1379 | fifo_size = sizeof(*cmd) + sizeof(*blits) * num_clips * num_units; | |
1380 | cmd = kmalloc(fifo_size, GFP_KERNEL); | |
1381 | if (unlikely(cmd == NULL)) { | |
1382 | DRM_ERROR("Failed to allocate temporary fifo memory.\n"); | |
1383 | return -ENOMEM; | |
1384 | } | |
1385 | ||
1386 | memset(cmd, 0, fifo_size); | |
1387 | cmd->header = SVGA_CMD_DEFINE_GMRFB; | |
1388 | cmd->body.format.bitsPerPixel = vfb->base.bits_per_pixel; | |
1389 | cmd->body.format.colorDepth = vfb->base.depth; | |
1390 | cmd->body.format.reserved = 0; | |
01f2c773 | 1391 | cmd->body.bytesPerLine = vfb->base.pitches[0]; |
90ff18bc | 1392 | cmd->body.ptr.gmrId = vfb->user_handle; |
2fcd5a73 JB |
1393 | cmd->body.ptr.offset = 0; |
1394 | ||
1395 | blits = (void *)&cmd[1]; | |
1396 | blits_pos = 0; | |
1397 | for (i = 0; i < num_units; i++) { | |
1398 | struct drm_vmw_rect *c = clips; | |
1399 | for (k = 0; k < num_clips; k++, c++) { | |
1400 | /* transform clip coords to crtc origin based coords */ | |
1401 | int clip_x1 = c->x - units[i]->crtc.x; | |
1402 | int clip_x2 = c->x - units[i]->crtc.x + c->w; | |
1403 | int clip_y1 = c->y - units[i]->crtc.y; | |
1404 | int clip_y2 = c->y - units[i]->crtc.y + c->h; | |
1405 | int dest_x = c->x; | |
1406 | int dest_y = c->y; | |
1407 | ||
1408 | /* compensate for clipping, we negate | |
1409 | * a negative number and add that. | |
1410 | */ | |
1411 | if (clip_x1 < 0) | |
1412 | dest_x += -clip_x1; | |
1413 | if (clip_y1 < 0) | |
1414 | dest_y += -clip_y1; | |
1415 | ||
1416 | /* clip */ | |
1417 | clip_x1 = max(clip_x1, 0); | |
1418 | clip_y1 = max(clip_y1, 0); | |
1419 | clip_x2 = min(clip_x2, units[i]->crtc.mode.hdisplay); | |
1420 | clip_y2 = min(clip_y2, units[i]->crtc.mode.vdisplay); | |
1421 | ||
1422 | /* and cull any rects that misses the crtc */ | |
1423 | if (clip_x1 >= units[i]->crtc.mode.hdisplay || | |
1424 | clip_y1 >= units[i]->crtc.mode.vdisplay || | |
1425 | clip_x2 <= 0 || clip_y2 <= 0) | |
1426 | continue; | |
1427 | ||
1428 | blits[blits_pos].header = SVGA_CMD_BLIT_SCREEN_TO_GMRFB; | |
1429 | blits[blits_pos].body.srcScreenId = units[i]->unit; | |
1430 | blits[blits_pos].body.destOrigin.x = dest_x; | |
1431 | blits[blits_pos].body.destOrigin.y = dest_y; | |
1432 | ||
1433 | blits[blits_pos].body.srcRect.left = clip_x1; | |
1434 | blits[blits_pos].body.srcRect.top = clip_y1; | |
1435 | blits[blits_pos].body.srcRect.right = clip_x2; | |
1436 | blits[blits_pos].body.srcRect.bottom = clip_y2; | |
1437 | blits_pos++; | |
1438 | } | |
1439 | } | |
1440 | /* reset size here and use calculated exact size from loops */ | |
1441 | fifo_size = sizeof(*cmd) + sizeof(*blits) * blits_pos; | |
1442 | ||
1443 | ret = vmw_execbuf_process(file_priv, dev_priv, NULL, cmd, fifo_size, | |
bb1bd2f4 | 1444 | 0, user_fence_rep, NULL); |
2fcd5a73 JB |
1445 | |
1446 | kfree(cmd); | |
1447 | ||
1448 | return ret; | |
1449 | } | |
1450 | ||
fb1d9738 JB |
1451 | int vmw_kms_init(struct vmw_private *dev_priv) |
1452 | { | |
1453 | struct drm_device *dev = dev_priv->dev; | |
1454 | int ret; | |
1455 | ||
1456 | drm_mode_config_init(dev); | |
1457 | dev->mode_config.funcs = &vmw_kms_funcs; | |
3bef3572 JB |
1458 | dev->mode_config.min_width = 1; |
1459 | dev->mode_config.min_height = 1; | |
7e71f8a5 JB |
1460 | /* assumed largest fb size */ |
1461 | dev->mode_config.max_width = 8192; | |
1462 | dev->mode_config.max_height = 8192; | |
fb1d9738 | 1463 | |
56d1c78d JB |
1464 | ret = vmw_kms_init_screen_object_display(dev_priv); |
1465 | if (ret) /* Fallback */ | |
1466 | (void)vmw_kms_init_legacy_display_system(dev_priv); | |
fb1d9738 JB |
1467 | |
1468 | return 0; | |
1469 | } | |
1470 | ||
1471 | int vmw_kms_close(struct vmw_private *dev_priv) | |
1472 | { | |
1473 | /* | |
1474 | * Docs says we should take the lock before calling this function | |
1475 | * but since it destroys encoders and our destructor calls | |
1476 | * drm_encoder_cleanup which takes the lock we deadlock. | |
1477 | */ | |
1478 | drm_mode_config_cleanup(dev_priv->dev); | |
c0d18316 JB |
1479 | if (dev_priv->sou_priv) |
1480 | vmw_kms_close_screen_object_display(dev_priv); | |
1481 | else | |
1482 | vmw_kms_close_legacy_display_system(dev_priv); | |
fb1d9738 JB |
1483 | return 0; |
1484 | } | |
1485 | ||
1486 | int vmw_kms_cursor_bypass_ioctl(struct drm_device *dev, void *data, | |
1487 | struct drm_file *file_priv) | |
1488 | { | |
1489 | struct drm_vmw_cursor_bypass_arg *arg = data; | |
1490 | struct vmw_display_unit *du; | |
1491 | struct drm_mode_object *obj; | |
1492 | struct drm_crtc *crtc; | |
1493 | int ret = 0; | |
1494 | ||
1495 | ||
1496 | mutex_lock(&dev->mode_config.mutex); | |
1497 | if (arg->flags & DRM_VMW_CURSOR_BYPASS_ALL) { | |
1498 | ||
1499 | list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) { | |
1500 | du = vmw_crtc_to_du(crtc); | |
1501 | du->hotspot_x = arg->xhot; | |
1502 | du->hotspot_y = arg->yhot; | |
1503 | } | |
1504 | ||
1505 | mutex_unlock(&dev->mode_config.mutex); | |
1506 | return 0; | |
1507 | } | |
1508 | ||
1509 | obj = drm_mode_object_find(dev, arg->crtc_id, DRM_MODE_OBJECT_CRTC); | |
1510 | if (!obj) { | |
1511 | ret = -EINVAL; | |
1512 | goto out; | |
1513 | } | |
1514 | ||
1515 | crtc = obj_to_crtc(obj); | |
1516 | du = vmw_crtc_to_du(crtc); | |
1517 | ||
1518 | du->hotspot_x = arg->xhot; | |
1519 | du->hotspot_y = arg->yhot; | |
1520 | ||
1521 | out: | |
1522 | mutex_unlock(&dev->mode_config.mutex); | |
1523 | ||
1524 | return ret; | |
1525 | } | |
1526 | ||
0bef23f9 | 1527 | int vmw_kms_write_svga(struct vmw_private *vmw_priv, |
d7e1958d | 1528 | unsigned width, unsigned height, unsigned pitch, |
6558429b | 1529 | unsigned bpp, unsigned depth) |
fb1d9738 | 1530 | { |
d7e1958d JB |
1531 | if (vmw_priv->capabilities & SVGA_CAP_PITCHLOCK) |
1532 | vmw_write(vmw_priv, SVGA_REG_PITCHLOCK, pitch); | |
1533 | else if (vmw_fifo_have_pitchlock(vmw_priv)) | |
1534 | iowrite32(pitch, vmw_priv->mmio_virt + SVGA_FIFO_PITCHLOCK); | |
1535 | vmw_write(vmw_priv, SVGA_REG_WIDTH, width); | |
1536 | vmw_write(vmw_priv, SVGA_REG_HEIGHT, height); | |
6558429b | 1537 | vmw_write(vmw_priv, SVGA_REG_BITS_PER_PIXEL, bpp); |
0bef23f9 MD |
1538 | |
1539 | if (vmw_read(vmw_priv, SVGA_REG_DEPTH) != depth) { | |
1540 | DRM_ERROR("Invalid depth %u for %u bpp, host expects %u\n", | |
1541 | depth, bpp, vmw_read(vmw_priv, SVGA_REG_DEPTH)); | |
1542 | return -EINVAL; | |
1543 | } | |
1544 | ||
1545 | return 0; | |
d7e1958d | 1546 | } |
fb1d9738 | 1547 | |
d7e1958d JB |
1548 | int vmw_kms_save_vga(struct vmw_private *vmw_priv) |
1549 | { | |
7c4f7780 TH |
1550 | struct vmw_vga_topology_state *save; |
1551 | uint32_t i; | |
1552 | ||
fb1d9738 JB |
1553 | vmw_priv->vga_width = vmw_read(vmw_priv, SVGA_REG_WIDTH); |
1554 | vmw_priv->vga_height = vmw_read(vmw_priv, SVGA_REG_HEIGHT); | |
7c4f7780 | 1555 | vmw_priv->vga_bpp = vmw_read(vmw_priv, SVGA_REG_BITS_PER_PIXEL); |
d7e1958d JB |
1556 | if (vmw_priv->capabilities & SVGA_CAP_PITCHLOCK) |
1557 | vmw_priv->vga_pitchlock = | |
7c4f7780 | 1558 | vmw_read(vmw_priv, SVGA_REG_PITCHLOCK); |
d7e1958d | 1559 | else if (vmw_fifo_have_pitchlock(vmw_priv)) |
7c4f7780 TH |
1560 | vmw_priv->vga_pitchlock = ioread32(vmw_priv->mmio_virt + |
1561 | SVGA_FIFO_PITCHLOCK); | |
1562 | ||
1563 | if (!(vmw_priv->capabilities & SVGA_CAP_DISPLAY_TOPOLOGY)) | |
1564 | return 0; | |
fb1d9738 | 1565 | |
7c4f7780 TH |
1566 | vmw_priv->num_displays = vmw_read(vmw_priv, |
1567 | SVGA_REG_NUM_GUEST_DISPLAYS); | |
1568 | ||
029e50bf TH |
1569 | if (vmw_priv->num_displays == 0) |
1570 | vmw_priv->num_displays = 1; | |
1571 | ||
7c4f7780 TH |
1572 | for (i = 0; i < vmw_priv->num_displays; ++i) { |
1573 | save = &vmw_priv->vga_save[i]; | |
1574 | vmw_write(vmw_priv, SVGA_REG_DISPLAY_ID, i); | |
1575 | save->primary = vmw_read(vmw_priv, SVGA_REG_DISPLAY_IS_PRIMARY); | |
1576 | save->pos_x = vmw_read(vmw_priv, SVGA_REG_DISPLAY_POSITION_X); | |
1577 | save->pos_y = vmw_read(vmw_priv, SVGA_REG_DISPLAY_POSITION_Y); | |
1578 | save->width = vmw_read(vmw_priv, SVGA_REG_DISPLAY_WIDTH); | |
1579 | save->height = vmw_read(vmw_priv, SVGA_REG_DISPLAY_HEIGHT); | |
1580 | vmw_write(vmw_priv, SVGA_REG_DISPLAY_ID, SVGA_ID_INVALID); | |
30c78bb8 TH |
1581 | if (i == 0 && vmw_priv->num_displays == 1 && |
1582 | save->width == 0 && save->height == 0) { | |
1583 | ||
1584 | /* | |
1585 | * It should be fairly safe to assume that these | |
1586 | * values are uninitialized. | |
1587 | */ | |
1588 | ||
1589 | save->width = vmw_priv->vga_width - save->pos_x; | |
1590 | save->height = vmw_priv->vga_height - save->pos_y; | |
1591 | } | |
7c4f7780 | 1592 | } |
30c78bb8 | 1593 | |
fb1d9738 JB |
1594 | return 0; |
1595 | } | |
1596 | ||
1597 | int vmw_kms_restore_vga(struct vmw_private *vmw_priv) | |
1598 | { | |
7c4f7780 TH |
1599 | struct vmw_vga_topology_state *save; |
1600 | uint32_t i; | |
1601 | ||
fb1d9738 JB |
1602 | vmw_write(vmw_priv, SVGA_REG_WIDTH, vmw_priv->vga_width); |
1603 | vmw_write(vmw_priv, SVGA_REG_HEIGHT, vmw_priv->vga_height); | |
7c4f7780 | 1604 | vmw_write(vmw_priv, SVGA_REG_BITS_PER_PIXEL, vmw_priv->vga_bpp); |
d7e1958d JB |
1605 | if (vmw_priv->capabilities & SVGA_CAP_PITCHLOCK) |
1606 | vmw_write(vmw_priv, SVGA_REG_PITCHLOCK, | |
1607 | vmw_priv->vga_pitchlock); | |
1608 | else if (vmw_fifo_have_pitchlock(vmw_priv)) | |
1609 | iowrite32(vmw_priv->vga_pitchlock, | |
1610 | vmw_priv->mmio_virt + SVGA_FIFO_PITCHLOCK); | |
fb1d9738 | 1611 | |
7c4f7780 TH |
1612 | if (!(vmw_priv->capabilities & SVGA_CAP_DISPLAY_TOPOLOGY)) |
1613 | return 0; | |
1614 | ||
1615 | for (i = 0; i < vmw_priv->num_displays; ++i) { | |
1616 | save = &vmw_priv->vga_save[i]; | |
1617 | vmw_write(vmw_priv, SVGA_REG_DISPLAY_ID, i); | |
1618 | vmw_write(vmw_priv, SVGA_REG_DISPLAY_IS_PRIMARY, save->primary); | |
1619 | vmw_write(vmw_priv, SVGA_REG_DISPLAY_POSITION_X, save->pos_x); | |
1620 | vmw_write(vmw_priv, SVGA_REG_DISPLAY_POSITION_Y, save->pos_y); | |
1621 | vmw_write(vmw_priv, SVGA_REG_DISPLAY_WIDTH, save->width); | |
1622 | vmw_write(vmw_priv, SVGA_REG_DISPLAY_HEIGHT, save->height); | |
1623 | vmw_write(vmw_priv, SVGA_REG_DISPLAY_ID, SVGA_ID_INVALID); | |
1624 | } | |
1625 | ||
fb1d9738 JB |
1626 | return 0; |
1627 | } | |
d8bd19d2 | 1628 | |
e133e737 TH |
1629 | bool vmw_kms_validate_mode_vram(struct vmw_private *dev_priv, |
1630 | uint32_t pitch, | |
1631 | uint32_t height) | |
1632 | { | |
1633 | return ((u64) pitch * (u64) height) < (u64) dev_priv->vram_size; | |
1634 | } | |
1635 | ||
1c482ab3 JB |
1636 | |
1637 | /** | |
1638 | * Function called by DRM code called with vbl_lock held. | |
1639 | */ | |
7a1c2f6c TH |
1640 | u32 vmw_get_vblank_counter(struct drm_device *dev, int crtc) |
1641 | { | |
1642 | return 0; | |
1643 | } | |
626ab771 | 1644 | |
1c482ab3 JB |
1645 | /** |
1646 | * Function called by DRM code called with vbl_lock held. | |
1647 | */ | |
1648 | int vmw_enable_vblank(struct drm_device *dev, int crtc) | |
1649 | { | |
1650 | return -ENOSYS; | |
1651 | } | |
1652 | ||
1653 | /** | |
1654 | * Function called by DRM code called with vbl_lock held. | |
1655 | */ | |
1656 | void vmw_disable_vblank(struct drm_device *dev, int crtc) | |
1657 | { | |
1658 | } | |
1659 | ||
626ab771 JB |
1660 | |
1661 | /* | |
1662 | * Small shared kms functions. | |
1663 | */ | |
1664 | ||
1665 | int vmw_du_update_layout(struct vmw_private *dev_priv, unsigned num, | |
1666 | struct drm_vmw_rect *rects) | |
1667 | { | |
1668 | struct drm_device *dev = dev_priv->dev; | |
1669 | struct vmw_display_unit *du; | |
1670 | struct drm_connector *con; | |
626ab771 JB |
1671 | |
1672 | mutex_lock(&dev->mode_config.mutex); | |
1673 | ||
1674 | #if 0 | |
6ea77d13 TH |
1675 | { |
1676 | unsigned int i; | |
1677 | ||
1678 | DRM_INFO("%s: new layout ", __func__); | |
1679 | for (i = 0; i < num; i++) | |
1680 | DRM_INFO("(%i, %i %ux%u) ", rects[i].x, rects[i].y, | |
1681 | rects[i].w, rects[i].h); | |
1682 | DRM_INFO("\n"); | |
1683 | } | |
626ab771 JB |
1684 | #endif |
1685 | ||
1686 | list_for_each_entry(con, &dev->mode_config.connector_list, head) { | |
1687 | du = vmw_connector_to_du(con); | |
1688 | if (num > du->unit) { | |
1689 | du->pref_width = rects[du->unit].w; | |
1690 | du->pref_height = rects[du->unit].h; | |
1691 | du->pref_active = true; | |
cd2b89e7 TH |
1692 | du->gui_x = rects[du->unit].x; |
1693 | du->gui_y = rects[du->unit].y; | |
626ab771 JB |
1694 | } else { |
1695 | du->pref_width = 800; | |
1696 | du->pref_height = 600; | |
1697 | du->pref_active = false; | |
1698 | } | |
1699 | con->status = vmw_du_connector_detect(con, true); | |
1700 | } | |
1701 | ||
1702 | mutex_unlock(&dev->mode_config.mutex); | |
1703 | ||
1704 | return 0; | |
1705 | } | |
1706 | ||
b5ec427e JB |
1707 | int vmw_du_page_flip(struct drm_crtc *crtc, |
1708 | struct drm_framebuffer *fb, | |
1709 | struct drm_pending_vblank_event *event) | |
1710 | { | |
1711 | struct vmw_private *dev_priv = vmw_priv(crtc->dev); | |
1712 | struct drm_framebuffer *old_fb = crtc->fb; | |
1713 | struct vmw_framebuffer *vfb = vmw_framebuffer_to_vfb(fb); | |
f5869a83 | 1714 | struct drm_file *file_priv ; |
b5ec427e JB |
1715 | struct vmw_fence_obj *fence = NULL; |
1716 | struct drm_clip_rect clips; | |
1717 | int ret; | |
1718 | ||
f5869a83 AC |
1719 | if (event == NULL) |
1720 | return -EINVAL; | |
1721 | ||
b5ec427e JB |
1722 | /* require ScreenObject support for page flipping */ |
1723 | if (!dev_priv->sou_priv) | |
1724 | return -ENOSYS; | |
1725 | ||
f5869a83 | 1726 | file_priv = event->base.file_priv; |
b5ec427e JB |
1727 | if (!vmw_kms_screen_object_flippable(dev_priv, crtc)) |
1728 | return -EINVAL; | |
1729 | ||
1730 | crtc->fb = fb; | |
1731 | ||
1732 | /* do a full screen dirty update */ | |
1733 | clips.x1 = clips.y1 = 0; | |
1734 | clips.x2 = fb->width; | |
1735 | clips.y2 = fb->height; | |
1736 | ||
1737 | if (vfb->dmabuf) | |
1738 | ret = do_dmabuf_dirty_sou(file_priv, dev_priv, vfb, | |
1739 | 0, 0, &clips, 1, 1, &fence); | |
1740 | else | |
1741 | ret = do_surface_dirty_sou(dev_priv, file_priv, vfb, | |
1742 | 0, 0, &clips, 1, 1, &fence); | |
1743 | ||
1744 | ||
1745 | if (ret != 0) | |
1746 | goto out_no_fence; | |
1747 | if (!fence) { | |
1748 | ret = -EINVAL; | |
1749 | goto out_no_fence; | |
1750 | } | |
1751 | ||
1752 | ret = vmw_event_fence_action_queue(file_priv, fence, | |
1753 | &event->base, | |
1754 | &event->event.tv_sec, | |
1755 | &event->event.tv_usec, | |
1756 | true); | |
1757 | ||
1758 | /* | |
1759 | * No need to hold on to this now. The only cleanup | |
1760 | * we need to do if we fail is unref the fence. | |
1761 | */ | |
1762 | vmw_fence_obj_unreference(&fence); | |
1763 | ||
1764 | if (vmw_crtc_to_du(crtc)->is_implicit) | |
1765 | vmw_kms_screen_object_update_implicit_fb(dev_priv, crtc); | |
1766 | ||
1767 | return ret; | |
1768 | ||
1769 | out_no_fence: | |
1770 | crtc->fb = old_fb; | |
1771 | return ret; | |
1772 | } | |
1773 | ||
1774 | ||
626ab771 JB |
1775 | void vmw_du_crtc_save(struct drm_crtc *crtc) |
1776 | { | |
1777 | } | |
1778 | ||
1779 | void vmw_du_crtc_restore(struct drm_crtc *crtc) | |
1780 | { | |
1781 | } | |
1782 | ||
1783 | void vmw_du_crtc_gamma_set(struct drm_crtc *crtc, | |
1784 | u16 *r, u16 *g, u16 *b, | |
1785 | uint32_t start, uint32_t size) | |
1786 | { | |
1787 | struct vmw_private *dev_priv = vmw_priv(crtc->dev); | |
1788 | int i; | |
1789 | ||
1790 | for (i = 0; i < size; i++) { | |
1791 | DRM_DEBUG("%d r/g/b = 0x%04x / 0x%04x / 0x%04x\n", i, | |
1792 | r[i], g[i], b[i]); | |
1793 | vmw_write(dev_priv, SVGA_PALETTE_BASE + i * 3 + 0, r[i] >> 8); | |
1794 | vmw_write(dev_priv, SVGA_PALETTE_BASE + i * 3 + 1, g[i] >> 8); | |
1795 | vmw_write(dev_priv, SVGA_PALETTE_BASE + i * 3 + 2, b[i] >> 8); | |
1796 | } | |
1797 | } | |
1798 | ||
1799 | void vmw_du_connector_dpms(struct drm_connector *connector, int mode) | |
1800 | { | |
1801 | } | |
1802 | ||
1803 | void vmw_du_connector_save(struct drm_connector *connector) | |
1804 | { | |
1805 | } | |
1806 | ||
1807 | void vmw_du_connector_restore(struct drm_connector *connector) | |
1808 | { | |
1809 | } | |
1810 | ||
1811 | enum drm_connector_status | |
1812 | vmw_du_connector_detect(struct drm_connector *connector, bool force) | |
1813 | { | |
1814 | uint32_t num_displays; | |
1815 | struct drm_device *dev = connector->dev; | |
1816 | struct vmw_private *dev_priv = vmw_priv(dev); | |
cd2b89e7 | 1817 | struct vmw_display_unit *du = vmw_connector_to_du(connector); |
626ab771 JB |
1818 | |
1819 | mutex_lock(&dev_priv->hw_mutex); | |
1820 | num_displays = vmw_read(dev_priv, SVGA_REG_NUM_DISPLAYS); | |
1821 | mutex_unlock(&dev_priv->hw_mutex); | |
1822 | ||
cd2b89e7 TH |
1823 | return ((vmw_connector_to_du(connector)->unit < num_displays && |
1824 | du->pref_active) ? | |
626ab771 JB |
1825 | connector_status_connected : connector_status_disconnected); |
1826 | } | |
1827 | ||
1828 | static struct drm_display_mode vmw_kms_connector_builtin[] = { | |
1829 | /* 640x480@60Hz */ | |
1830 | { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 25175, 640, 656, | |
1831 | 752, 800, 0, 480, 489, 492, 525, 0, | |
1832 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, | |
1833 | /* 800x600@60Hz */ | |
1834 | { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 40000, 800, 840, | |
1835 | 968, 1056, 0, 600, 601, 605, 628, 0, | |
1836 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, | |
1837 | /* 1024x768@60Hz */ | |
1838 | { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 65000, 1024, 1048, | |
1839 | 1184, 1344, 0, 768, 771, 777, 806, 0, | |
1840 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, | |
1841 | /* 1152x864@75Hz */ | |
1842 | { DRM_MODE("1152x864", DRM_MODE_TYPE_DRIVER, 108000, 1152, 1216, | |
1843 | 1344, 1600, 0, 864, 865, 868, 900, 0, | |
1844 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, | |
1845 | /* 1280x768@60Hz */ | |
1846 | { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 79500, 1280, 1344, | |
1847 | 1472, 1664, 0, 768, 771, 778, 798, 0, | |
1848 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, | |
1849 | /* 1280x800@60Hz */ | |
1850 | { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 83500, 1280, 1352, | |
1851 | 1480, 1680, 0, 800, 803, 809, 831, 0, | |
1852 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, | |
1853 | /* 1280x960@60Hz */ | |
1854 | { DRM_MODE("1280x960", DRM_MODE_TYPE_DRIVER, 108000, 1280, 1376, | |
1855 | 1488, 1800, 0, 960, 961, 964, 1000, 0, | |
1856 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, | |
1857 | /* 1280x1024@60Hz */ | |
1858 | { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 108000, 1280, 1328, | |
1859 | 1440, 1688, 0, 1024, 1025, 1028, 1066, 0, | |
1860 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, | |
1861 | /* 1360x768@60Hz */ | |
1862 | { DRM_MODE("1360x768", DRM_MODE_TYPE_DRIVER, 85500, 1360, 1424, | |
1863 | 1536, 1792, 0, 768, 771, 777, 795, 0, | |
1864 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, | |
1865 | /* 1440x1050@60Hz */ | |
1866 | { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 121750, 1400, 1488, | |
1867 | 1632, 1864, 0, 1050, 1053, 1057, 1089, 0, | |
1868 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, | |
1869 | /* 1440x900@60Hz */ | |
1870 | { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 106500, 1440, 1520, | |
1871 | 1672, 1904, 0, 900, 903, 909, 934, 0, | |
1872 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, | |
1873 | /* 1600x1200@60Hz */ | |
1874 | { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 162000, 1600, 1664, | |
1875 | 1856, 2160, 0, 1200, 1201, 1204, 1250, 0, | |
1876 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, | |
1877 | /* 1680x1050@60Hz */ | |
1878 | { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 146250, 1680, 1784, | |
1879 | 1960, 2240, 0, 1050, 1053, 1059, 1089, 0, | |
1880 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, | |
1881 | /* 1792x1344@60Hz */ | |
1882 | { DRM_MODE("1792x1344", DRM_MODE_TYPE_DRIVER, 204750, 1792, 1920, | |
1883 | 2120, 2448, 0, 1344, 1345, 1348, 1394, 0, | |
1884 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, | |
1885 | /* 1853x1392@60Hz */ | |
1886 | { DRM_MODE("1856x1392", DRM_MODE_TYPE_DRIVER, 218250, 1856, 1952, | |
1887 | 2176, 2528, 0, 1392, 1393, 1396, 1439, 0, | |
1888 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, | |
1889 | /* 1920x1200@60Hz */ | |
1890 | { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 193250, 1920, 2056, | |
1891 | 2256, 2592, 0, 1200, 1203, 1209, 1245, 0, | |
1892 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, | |
1893 | /* 1920x1440@60Hz */ | |
1894 | { DRM_MODE("1920x1440", DRM_MODE_TYPE_DRIVER, 234000, 1920, 2048, | |
1895 | 2256, 2600, 0, 1440, 1441, 1444, 1500, 0, | |
1896 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, | |
1897 | /* 2560x1600@60Hz */ | |
1898 | { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 348500, 2560, 2752, | |
1899 | 3032, 3504, 0, 1600, 1603, 1609, 1658, 0, | |
1900 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, | |
1901 | /* Terminate */ | |
1902 | { DRM_MODE("", 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0) }, | |
1903 | }; | |
1904 | ||
1543b4dd TH |
1905 | /** |
1906 | * vmw_guess_mode_timing - Provide fake timings for a | |
1907 | * 60Hz vrefresh mode. | |
1908 | * | |
1909 | * @mode - Pointer to a struct drm_display_mode with hdisplay and vdisplay | |
1910 | * members filled in. | |
1911 | */ | |
1912 | static void vmw_guess_mode_timing(struct drm_display_mode *mode) | |
1913 | { | |
1914 | mode->hsync_start = mode->hdisplay + 50; | |
1915 | mode->hsync_end = mode->hsync_start + 50; | |
1916 | mode->htotal = mode->hsync_end + 50; | |
1917 | ||
1918 | mode->vsync_start = mode->vdisplay + 50; | |
1919 | mode->vsync_end = mode->vsync_start + 50; | |
1920 | mode->vtotal = mode->vsync_end + 50; | |
1921 | ||
1922 | mode->clock = (u32)mode->htotal * (u32)mode->vtotal / 100 * 6; | |
1923 | mode->vrefresh = drm_mode_vrefresh(mode); | |
1924 | } | |
1925 | ||
1926 | ||
626ab771 JB |
1927 | int vmw_du_connector_fill_modes(struct drm_connector *connector, |
1928 | uint32_t max_width, uint32_t max_height) | |
1929 | { | |
1930 | struct vmw_display_unit *du = vmw_connector_to_du(connector); | |
1931 | struct drm_device *dev = connector->dev; | |
1932 | struct vmw_private *dev_priv = vmw_priv(dev); | |
1933 | struct drm_display_mode *mode = NULL; | |
1934 | struct drm_display_mode *bmode; | |
1935 | struct drm_display_mode prefmode = { DRM_MODE("preferred", | |
1936 | DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED, | |
1937 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, | |
1938 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) | |
1939 | }; | |
1940 | int i; | |
1941 | ||
1942 | /* Add preferred mode */ | |
1943 | { | |
1944 | mode = drm_mode_duplicate(dev, &prefmode); | |
1945 | if (!mode) | |
1946 | return 0; | |
1947 | mode->hdisplay = du->pref_width; | |
1948 | mode->vdisplay = du->pref_height; | |
1543b4dd | 1949 | vmw_guess_mode_timing(mode); |
55bde5b2 | 1950 | |
626ab771 JB |
1951 | if (vmw_kms_validate_mode_vram(dev_priv, mode->hdisplay * 2, |
1952 | mode->vdisplay)) { | |
1953 | drm_mode_probed_add(connector, mode); | |
55bde5b2 JB |
1954 | } else { |
1955 | drm_mode_destroy(dev, mode); | |
1956 | mode = NULL; | |
1957 | } | |
626ab771 | 1958 | |
55bde5b2 JB |
1959 | if (du->pref_mode) { |
1960 | list_del_init(&du->pref_mode->head); | |
1961 | drm_mode_destroy(dev, du->pref_mode); | |
626ab771 | 1962 | } |
55bde5b2 JB |
1963 | |
1964 | /* mode might be null here, this is intended */ | |
1965 | du->pref_mode = mode; | |
626ab771 JB |
1966 | } |
1967 | ||
1968 | for (i = 0; vmw_kms_connector_builtin[i].type != 0; i++) { | |
1969 | bmode = &vmw_kms_connector_builtin[i]; | |
1970 | if (bmode->hdisplay > max_width || | |
1971 | bmode->vdisplay > max_height) | |
1972 | continue; | |
1973 | ||
1974 | if (!vmw_kms_validate_mode_vram(dev_priv, bmode->hdisplay * 2, | |
1975 | bmode->vdisplay)) | |
1976 | continue; | |
1977 | ||
1978 | mode = drm_mode_duplicate(dev, bmode); | |
1979 | if (!mode) | |
1980 | return 0; | |
1981 | mode->vrefresh = drm_mode_vrefresh(mode); | |
1982 | ||
1983 | drm_mode_probed_add(connector, mode); | |
1984 | } | |
1985 | ||
d41025c0 JB |
1986 | /* Move the prefered mode first, help apps pick the right mode. */ |
1987 | if (du->pref_mode) | |
1988 | list_move(&du->pref_mode->head, &connector->probed_modes); | |
1989 | ||
626ab771 JB |
1990 | drm_mode_connector_list_update(connector); |
1991 | ||
1992 | return 1; | |
1993 | } | |
1994 | ||
1995 | int vmw_du_connector_set_property(struct drm_connector *connector, | |
1996 | struct drm_property *property, | |
1997 | uint64_t val) | |
1998 | { | |
1999 | return 0; | |
2000 | } | |
cd2b89e7 TH |
2001 | |
2002 | ||
2003 | int vmw_kms_update_layout_ioctl(struct drm_device *dev, void *data, | |
2004 | struct drm_file *file_priv) | |
2005 | { | |
2006 | struct vmw_private *dev_priv = vmw_priv(dev); | |
2007 | struct drm_vmw_update_layout_arg *arg = | |
2008 | (struct drm_vmw_update_layout_arg *)data; | |
2009 | struct vmw_master *vmaster = vmw_master(file_priv->master); | |
2010 | void __user *user_rects; | |
2011 | struct drm_vmw_rect *rects; | |
2012 | unsigned rects_size; | |
2013 | int ret; | |
2014 | int i; | |
2015 | struct drm_mode_config *mode_config = &dev->mode_config; | |
2016 | ||
2017 | ret = ttm_read_lock(&vmaster->lock, true); | |
2018 | if (unlikely(ret != 0)) | |
2019 | return ret; | |
2020 | ||
2021 | if (!arg->num_outputs) { | |
2022 | struct drm_vmw_rect def_rect = {0, 0, 800, 600}; | |
2023 | vmw_du_update_layout(dev_priv, 1, &def_rect); | |
2024 | goto out_unlock; | |
2025 | } | |
2026 | ||
2027 | rects_size = arg->num_outputs * sizeof(struct drm_vmw_rect); | |
bab9efc2 XW |
2028 | rects = kcalloc(arg->num_outputs, sizeof(struct drm_vmw_rect), |
2029 | GFP_KERNEL); | |
cd2b89e7 TH |
2030 | if (unlikely(!rects)) { |
2031 | ret = -ENOMEM; | |
2032 | goto out_unlock; | |
2033 | } | |
2034 | ||
2035 | user_rects = (void __user *)(unsigned long)arg->rects; | |
2036 | ret = copy_from_user(rects, user_rects, rects_size); | |
2037 | if (unlikely(ret != 0)) { | |
2038 | DRM_ERROR("Failed to get rects.\n"); | |
2039 | ret = -EFAULT; | |
2040 | goto out_free; | |
2041 | } | |
2042 | ||
2043 | for (i = 0; i < arg->num_outputs; ++i) { | |
bab9efc2 XW |
2044 | if (rects[i].x < 0 || |
2045 | rects[i].y < 0 || | |
2046 | rects[i].x + rects[i].w > mode_config->max_width || | |
2047 | rects[i].y + rects[i].h > mode_config->max_height) { | |
cd2b89e7 TH |
2048 | DRM_ERROR("Invalid GUI layout.\n"); |
2049 | ret = -EINVAL; | |
2050 | goto out_free; | |
2051 | } | |
2052 | } | |
2053 | ||
2054 | vmw_du_update_layout(dev_priv, arg->num_outputs, rects); | |
2055 | ||
2056 | out_free: | |
2057 | kfree(rects); | |
2058 | out_unlock: | |
2059 | ttm_read_unlock(&vmaster->lock); | |
2060 | return ret; | |
2061 | } |