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hwmon: (w83627hf) Drop the force_addr module parameter
[mirror_ubuntu-bionic-kernel.git] / drivers / hwmon / w83627hf.c
CommitLineData
1da177e4
LT		 1/*
2 w83627hf.c - Part of lm_sensors, Linux kernel modules for hardware
3 monitoring
4 Copyright (c) 1998 - 2003 Frodo Looijaard <frodol@dds.nl>,
5 Philip Edelbrock <phil@netroedge.com>,
6 and Mark Studebaker <mdsxyz123@yahoo.com>
7 Ported to 2.6 by Bernhard C. Schrenk <clemy@clemy.org>
787c72b1 8 Copyright (c) 2007 Jean Delvare <khali@linux-fr.org>
1da177e4
LT		 9
10 This program is free software; you can redistribute it and/or modify
11 it under the terms of the GNU General Public License as published by
12 the Free Software Foundation; either version 2 of the License, or
13 (at your option) any later version.
14
15 This program is distributed in the hope that it will be useful,
16 but WITHOUT ANY WARRANTY; without even the implied warranty of
17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 GNU General Public License for more details.
19
20 You should have received a copy of the GNU General Public License
21 along with this program; if not, write to the Free Software
22 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
23*/
24
25/*
26 Supports following chips:
27
28 Chip #vin #fanin #pwm #temp wchipid vendid i2c ISA
29 w83627hf 9 3 2 3 0x20 0x5ca3 no yes(LPC)
30 w83627thf 7 3 3 3 0x90 0x5ca3 no yes(LPC)
31 w83637hf 7 3 3 3 0x80 0x5ca3 no yes(LPC)
c2db6ce1 32 w83687thf 7 3 3 3 0x90 0x5ca3 no yes(LPC)
1da177e4
LT		 33 w83697hf 8 2 2 2 0x60 0x5ca3 no yes(LPC)
34
35 For other winbond chips, and for i2c support in the above chips,
36 use w83781d.c.
37
38 Note: automatic ("cruise") fan control for 697, 637 & 627thf not
39 supported yet.
40*/
41
42#include <linux/module.h>
43#include <linux/init.h>
44#include <linux/slab.h>
45#include <linux/jiffies.h>
787c72b1 46#include <linux/platform_device.h>
943b0830 47#include <linux/hwmon.h>
07584c76 48#include <linux/hwmon-sysfs.h>
303760b4 49#include <linux/hwmon-vid.h>
943b0830 50#include <linux/err.h>
9a61bf63 51#include <linux/mutex.h>
d27c37c0 52#include <linux/ioport.h>
b9acb64a 53#include <linux/acpi.h>
6055fae8 54#include <linux/io.h>
1da177e4
LT		 55#include "lm75.h"
56
787c72b1 57static struct platform_device *pdev;
d27c37c0
JD		 58
59#define DRVNAME "w83627hf"
60enum chips { w83627hf, w83627thf, w83697hf, w83637hf, w83687thf };
61
1da177e4
LT		 62static u8 force_i2c = 0x1f;
63module_param(force_i2c, byte, 0);
64MODULE_PARM_DESC(force_i2c,
65 "Initialize the i2c address of the sensors");
66
1da177e4
LT		 67static int init = 1;
68module_param(init, bool, 0);
69MODULE_PARM_DESC(init, "Set to zero to bypass chip initialization");
70
67b671bc
JD		 71static unsigned short force_id;
72module_param(force_id, ushort, 0);
73MODULE_PARM_DESC(force_id, "Override the detected device ID");
74
1da177e4
LT		 75/* modified from kernel/include/traps.c */
76static int REG; /* The register to read/write */
77#define DEV 0x07 /* Register: Logical device select */
78static int VAL; /* The value to read/write */
79
80/* logical device numbers for superio_select (below) */
81#define W83627HF_LD_FDC 0x00
82#define W83627HF_LD_PRT 0x01
83#define W83627HF_LD_UART1 0x02
84#define W83627HF_LD_UART2 0x03
85#define W83627HF_LD_KBC 0x05
86#define W83627HF_LD_CIR 0x06 /* w83627hf only */
87#define W83627HF_LD_GAME 0x07
88#define W83627HF_LD_MIDI 0x07
89#define W83627HF_LD_GPIO1 0x07
90#define W83627HF_LD_GPIO5 0x07 /* w83627thf only */
91#define W83627HF_LD_GPIO2 0x08
92#define W83627HF_LD_GPIO3 0x09
93#define W83627HF_LD_GPIO4 0x09 /* w83627thf only */
94#define W83627HF_LD_ACPI 0x0a
95#define W83627HF_LD_HWM 0x0b
96
97#define DEVID 0x20 /* Register: Device ID */
98
99#define W83627THF_GPIO5_EN 0x30 /* w83627thf only */
100#define W83627THF_GPIO5_IOSR 0xf3 /* w83627thf only */
101#define W83627THF_GPIO5_DR 0xf4 /* w83627thf only */
102
c2db6ce1
JD		 103#define W83687THF_VID_EN 0x29 /* w83687thf only */
104#define W83687THF_VID_CFG 0xF0 /* w83687thf only */
105#define W83687THF_VID_DATA 0xF1 /* w83687thf only */
106
1da177e4
LT		 107static inline void
108superio_outb(int reg, int val)
109{
110 outb(reg, REG);
111 outb(val, VAL);
112}
113
114static inline int
115superio_inb(int reg)
116{
117 outb(reg, REG);
118 return inb(VAL);
119}
120
121static inline void
122superio_select(int ld)
123{
124 outb(DEV, REG);
125 outb(ld, VAL);
126}
127
128static inline void
129superio_enter(void)
130{
131 outb(0x87, REG);
132 outb(0x87, REG);
133}
134
135static inline void
136superio_exit(void)
137{
138 outb(0xAA, REG);
139}
140
141#define W627_DEVID 0x52
142#define W627THF_DEVID 0x82
143#define W697_DEVID 0x60
144#define W637_DEVID 0x70
c2db6ce1 145#define W687THF_DEVID 0x85
1da177e4
LT		 146#define WINB_ACT_REG 0x30
147#define WINB_BASE_REG 0x60
148/* Constants specified below */
149
ada0c2f8
PV		 150/* Alignment of the base address */
151#define WINB_ALIGNMENT ~7
1da177e4 152
ada0c2f8
PV		 153/* Offset & size of I/O region we are interested in */
154#define WINB_REGION_OFFSET 5
155#define WINB_REGION_SIZE 2
156
787c72b1
JD		 157/* Where are the sensors address/data registers relative to the region offset */
158#define W83781D_ADDR_REG_OFFSET 0
159#define W83781D_DATA_REG_OFFSET 1
1da177e4
LT		 160
161/* The W83781D registers */
162/* The W83782D registers for nr=7,8 are in bank 5 */
163#define W83781D_REG_IN_MAX(nr) ((nr < 7) ? (0x2b + (nr) * 2) : \
164 (0x554 + (((nr) - 7) * 2)))
165#define W83781D_REG_IN_MIN(nr) ((nr < 7) ? (0x2c + (nr) * 2) : \
166 (0x555 + (((nr) - 7) * 2)))
167#define W83781D_REG_IN(nr) ((nr < 7) ? (0x20 + (nr)) : \
168 (0x550 + (nr) - 7))
169
2ca2fcd1
JC		 170/* nr:0-2 for fans:1-3 */
171#define W83627HF_REG_FAN_MIN(nr) (0x3b + (nr))
172#define W83627HF_REG_FAN(nr) (0x28 + (nr))
1da177e4 173
df48ed80
JC		 174#define W83627HF_REG_TEMP2_CONFIG 0x152
175#define W83627HF_REG_TEMP3_CONFIG 0x252
176/* these are zero-based, unlike config constants above */
177static const u16 w83627hf_reg_temp[] = { 0x27, 0x150, 0x250 };
178static const u16 w83627hf_reg_temp_hyst[] = { 0x3A, 0x153, 0x253 };
179static const u16 w83627hf_reg_temp_over[] = { 0x39, 0x155, 0x255 };
1da177e4
LT		 180
181#define W83781D_REG_BANK 0x4E
182
183#define W83781D_REG_CONFIG 0x40
4a1c4447
YM		 184#define W83781D_REG_ALARM1 0x459
185#define W83781D_REG_ALARM2 0x45A
186#define W83781D_REG_ALARM3 0x45B
1da177e4 187
1da177e4
LT		 188#define W83781D_REG_BEEP_CONFIG 0x4D
189#define W83781D_REG_BEEP_INTS1 0x56
190#define W83781D_REG_BEEP_INTS2 0x57
191#define W83781D_REG_BEEP_INTS3 0x453
192
193#define W83781D_REG_VID_FANDIV 0x47
194
195#define W83781D_REG_CHIPID 0x49
196#define W83781D_REG_WCHIPID 0x58
197#define W83781D_REG_CHIPMAN 0x4F
198#define W83781D_REG_PIN 0x4B
199
200#define W83781D_REG_VBAT 0x5D
201
202#define W83627HF_REG_PWM1 0x5A
203#define W83627HF_REG_PWM2 0x5B
1da177e4 204
a95a5ed8
DG		 205static const u8 W83627THF_REG_PWM_ENABLE[] = {
206 0x04, /* FAN 1 mode */
207 0x04, /* FAN 2 mode */
208 0x12, /* FAN AUX mode */
209};
210static const u8 W83627THF_PWM_ENABLE_SHIFT[] = { 2, 4, 1 };
211
c2db6ce1
JD		 212#define W83627THF_REG_PWM1 0x01 /* 697HF/637HF/687THF too */
213#define W83627THF_REG_PWM2 0x03 /* 697HF/637HF/687THF too */
214#define W83627THF_REG_PWM3 0x11 /* 637HF/687THF too */
1da177e4 215
c2db6ce1 216#define W83627THF_REG_VRM_OVT_CFG 0x18 /* 637HF/687THF too */
1da177e4
LT		 217
218static const u8 regpwm_627hf[] = { W83627HF_REG_PWM1, W83627HF_REG_PWM2 };
219static const u8 regpwm[] = { W83627THF_REG_PWM1, W83627THF_REG_PWM2,
220 W83627THF_REG_PWM3 };
221#define W836X7HF_REG_PWM(type, nr) (((type) == w83627hf) ? \
07584c76 222 regpwm_627hf[nr] : regpwm[nr])
1da177e4 223
1550cb6d
COM		 224#define W83627HF_REG_PWM_FREQ 0x5C /* Only for the 627HF */
225
226#define W83637HF_REG_PWM_FREQ1 0x00 /* 697HF/687THF too */
227#define W83637HF_REG_PWM_FREQ2 0x02 /* 697HF/687THF too */
228#define W83637HF_REG_PWM_FREQ3 0x10 /* 687THF too */
229
230static const u8 W83637HF_REG_PWM_FREQ[] = { W83637HF_REG_PWM_FREQ1,
231 W83637HF_REG_PWM_FREQ2,
232 W83637HF_REG_PWM_FREQ3 };
233
234#define W83627HF_BASE_PWM_FREQ 46870
235
1da177e4
LT		 236#define W83781D_REG_I2C_ADDR 0x48
237#define W83781D_REG_I2C_SUBADDR 0x4A
238
239/* Sensor selection */
240#define W83781D_REG_SCFG1 0x5D
241static const u8 BIT_SCFG1[] = { 0x02, 0x04, 0x08 };
242#define W83781D_REG_SCFG2 0x59
243static const u8 BIT_SCFG2[] = { 0x10, 0x20, 0x40 };
244#define W83781D_DEFAULT_BETA 3435
245
246/* Conversions. Limit checking is only done on the TO_REG
247 variants. Note that you should be a bit careful with which arguments
248 these macros are called: arguments may be evaluated more than once.
249 Fixing this is just not worth it. */
250#define IN_TO_REG(val) (SENSORS_LIMIT((((val) + 8)/16),0,255))
251#define IN_FROM_REG(val) ((val) * 16)
252
253static inline u8 FAN_TO_REG(long rpm, int div)
254{
255 if (rpm == 0)
256 return 255;
257 rpm = SENSORS_LIMIT(rpm, 1, 1000000);
258 return SENSORS_LIMIT((1350000 + rpm * div / 2) / (rpm * div), 1,
259 254);
260}
261
262#define TEMP_MIN (-128000)
263#define TEMP_MAX ( 127000)
264
265/* TEMP: 0.001C/bit (-128C to +127C)
266 REG: 1C/bit, two's complement */
5bfedac0 267static u8 TEMP_TO_REG(long temp)
1da177e4
LT		 268{
269 int ntemp = SENSORS_LIMIT(temp, TEMP_MIN, TEMP_MAX);
270 ntemp += (ntemp<0 ? -500 : 500);
271 return (u8)(ntemp / 1000);
272}
273
274static int TEMP_FROM_REG(u8 reg)
275{
276 return (s8)reg * 1000;
277}
278
279#define FAN_FROM_REG(val,div) ((val)==0?-1:(val)==255?0:1350000/((val)*(div)))
280
281#define PWM_TO_REG(val) (SENSORS_LIMIT((val),0,255))
282
1550cb6d
COM		 283static inline unsigned long pwm_freq_from_reg_627hf(u8 reg)
284{
285 unsigned long freq;
286 freq = W83627HF_BASE_PWM_FREQ >> reg;
287 return freq;
288}
289static inline u8 pwm_freq_to_reg_627hf(unsigned long val)
290{
291 u8 i;
292 /* Only 5 dividers (1 2 4 8 16)
293 Search for the nearest available frequency */
294 for (i = 0; i < 4; i++) {
295 if (val > (((W83627HF_BASE_PWM_FREQ >> i) +
296 (W83627HF_BASE_PWM_FREQ >> (i+1))) / 2))
297 break;
298 }
299 return i;
300}
301
302static inline unsigned long pwm_freq_from_reg(u8 reg)
303{
304 /* Clock bit 8 -> 180 kHz or 24 MHz */
305 unsigned long clock = (reg & 0x80) ? 180000UL : 24000000UL;
306
307 reg &= 0x7f;
308 /* This should not happen but anyway... */
309 if (reg == 0)
310 reg++;
311 return (clock / (reg << 8));
312}
313static inline u8 pwm_freq_to_reg(unsigned long val)
314{
315 /* Minimum divider value is 0x01 and maximum is 0x7F */
316 if (val >= 93750) /* The highest we can do */
317 return 0x01;
318 if (val >= 720) /* Use 24 MHz clock */
319 return (24000000UL / (val << 8));
320 if (val < 6) /* The lowest we can do */
321 return 0xFF;
322 else /* Use 180 kHz clock */
323 return (0x80 | (180000UL / (val << 8)));
324}
325
1c138107
JD		 326#define BEEP_MASK_FROM_REG(val) ((val) & 0xff7fff)
327#define BEEP_MASK_TO_REG(val) ((val) & 0xff7fff)
1da177e4
LT		 328
329#define DIV_FROM_REG(val) (1 << (val))
330
331static inline u8 DIV_TO_REG(long val)
332{
333 int i;
334 val = SENSORS_LIMIT(val, 1, 128) >> 1;
abc01922 335 for (i = 0; i < 7; i++) {
1da177e4
LT		 336 if (val == 0)
337 break;
338 val >>= 1;
339 }
340 return ((u8) i);
341}
342
ed6bafbf
JD		 343/* For each registered chip, we need to keep some data in memory.
344 The structure is dynamically allocated. */
1da177e4 345struct w83627hf_data {
787c72b1
JD		 346 unsigned short addr;
347 const char *name;
1beeffe4 348 struct device *hwmon_dev;
9a61bf63 349 struct mutex lock;
1da177e4
LT		 350 enum chips type;
351
9a61bf63 352 struct mutex update_lock;
1da177e4
LT		 353 char valid; /* !=0 if following fields are valid */
354 unsigned long last_updated; /* In jiffies */
355
1da177e4
LT		 356 u8 in[9]; /* Register value */
357 u8 in_max[9]; /* Register value */
358 u8 in_min[9]; /* Register value */
359 u8 fan[3]; /* Register value */
360 u8 fan_min[3]; /* Register value */
df48ed80
JC		 361 u16 temp[3]; /* Register value */
362 u16 temp_max[3]; /* Register value */
363 u16 temp_max_hyst[3]; /* Register value */
1da177e4
LT		 364 u8 fan_div[3]; /* Register encoding, shifted right */
365 u8 vid; /* Register encoding, combined */
366 u32 alarms; /* Register encoding, combined */
367 u32 beep_mask; /* Register encoding, combined */
1da177e4 368 u8 pwm[3]; /* Register value */
a95a5ed8
DG		 369 u8 pwm_enable[3]; /* 1 = manual
370 2 = thermal cruise (also called SmartFan I)
371 3 = fan speed cruise */
1550cb6d 372 u8 pwm_freq[3]; /* Register value */
b26f9330
JD		 373 u16 sens[3]; /* 1 = pentium diode; 2 = 3904 diode;
374 4 = thermistor */
1da177e4 375 u8 vrm;
c2db6ce1 376 u8 vrm_ovt; /* Register value, 627THF/637HF/687THF only */
1da177e4
LT		 377};
378
787c72b1
JD		 379struct w83627hf_sio_data {
380 enum chips type;
381};
1da177e4 382
1da177e4 383
787c72b1 384static int w83627hf_probe(struct platform_device *pdev);
d0546128 385static int __devexit w83627hf_remove(struct platform_device *pdev);
787c72b1
JD		 386
387static int w83627hf_read_value(struct w83627hf_data *data, u16 reg);
388static int w83627hf_write_value(struct w83627hf_data *data, u16 reg, u16 value);
c09c5184 389static void w83627hf_update_fan_div(struct w83627hf_data *data);
1da177e4 390static struct w83627hf_data *w83627hf_update_device(struct device *dev);
787c72b1 391static void w83627hf_init_device(struct platform_device *pdev);
1da177e4 392
787c72b1 393static struct platform_driver w83627hf_driver = {
cdaf7934 394 .driver = {
87218842 395 .owner = THIS_MODULE,
d27c37c0 396 .name = DRVNAME,
cdaf7934 397 },
787c72b1
JD		 398 .probe = w83627hf_probe,
399 .remove = __devexit_p(w83627hf_remove),
1da177e4
LT		 400};
401
07584c76
JC		 402static ssize_t
403show_in_input(struct device *dev, struct device_attribute *devattr, char *buf)
404{
405 int nr = to_sensor_dev_attr(devattr)->index;
406 struct w83627hf_data *data = w83627hf_update_device(dev);
407 return sprintf(buf, "%ld\n", (long)IN_FROM_REG(data->in[nr]));
1da177e4 408}
07584c76
JC		 409static ssize_t
410show_in_min(struct device *dev, struct device_attribute *devattr, char *buf)
411{
412 int nr = to_sensor_dev_attr(devattr)->index;
413 struct w83627hf_data *data = w83627hf_update_device(dev);
414 return sprintf(buf, "%ld\n", (long)IN_FROM_REG(data->in_min[nr]));
415}
416static ssize_t
417show_in_max(struct device *dev, struct device_attribute *devattr, char *buf)
418{
419 int nr = to_sensor_dev_attr(devattr)->index;
420 struct w83627hf_data *data = w83627hf_update_device(dev);
421 return sprintf(buf, "%ld\n", (long)IN_FROM_REG(data->in_max[nr]));
1da177e4 422}
07584c76
JC		 423static ssize_t
424store_in_min(struct device *dev, struct device_attribute *devattr,
425 const char *buf, size_t count)
426{
427 int nr = to_sensor_dev_attr(devattr)->index;
428 struct w83627hf_data *data = dev_get_drvdata(dev);
429 long val = simple_strtol(buf, NULL, 10);
1da177e4 430
07584c76
JC		 431 mutex_lock(&data->update_lock);
432 data->in_min[nr] = IN_TO_REG(val);
433 w83627hf_write_value(data, W83781D_REG_IN_MIN(nr), data->in_min[nr]);
434 mutex_unlock(&data->update_lock);
435 return count;
436}
437static ssize_t
438store_in_max(struct device *dev, struct device_attribute *devattr,
439 const char *buf, size_t count)
440{
441 int nr = to_sensor_dev_attr(devattr)->index;
442 struct w83627hf_data *data = dev_get_drvdata(dev);
443 long val = simple_strtol(buf, NULL, 10);
1da177e4 444
07584c76
JC		 445 mutex_lock(&data->update_lock);
446 data->in_max[nr] = IN_TO_REG(val);
447 w83627hf_write_value(data, W83781D_REG_IN_MAX(nr), data->in_max[nr]);
448 mutex_unlock(&data->update_lock);
449 return count;
450}
451#define sysfs_vin_decl(offset) \
452static SENSOR_DEVICE_ATTR(in##offset##_input, S_IRUGO, \
453 show_in_input, NULL, offset); \
454static SENSOR_DEVICE_ATTR(in##offset##_min, S_IRUGO|S_IWUSR, \
455 show_in_min, store_in_min, offset); \
456static SENSOR_DEVICE_ATTR(in##offset##_max, S_IRUGO|S_IWUSR, \
457 show_in_max, store_in_max, offset);
458
459sysfs_vin_decl(1);
460sysfs_vin_decl(2);
461sysfs_vin_decl(3);
462sysfs_vin_decl(4);
463sysfs_vin_decl(5);
464sysfs_vin_decl(6);
465sysfs_vin_decl(7);
466sysfs_vin_decl(8);
1da177e4
LT		 467
468/* use a different set of functions for in0 */
469static ssize_t show_in_0(struct w83627hf_data *data, char *buf, u8 reg)
470{
471 long in0;
472
473 if ((data->vrm_ovt & 0x01) &&
c2db6ce1
JD		 474 (w83627thf == data->type || w83637hf == data->type
475 || w83687thf == data->type))
1da177e4
LT		 476
477 /* use VRM9 calculation */
478 in0 = (long)((reg * 488 + 70000 + 50) / 100);
479 else
480 /* use VRM8 (standard) calculation */
481 in0 = (long)IN_FROM_REG(reg);
482
483 return sprintf(buf,"%ld\n", in0);
484}
485
a5099cfc 486static ssize_t show_regs_in_0(struct device *dev, struct device_attribute *attr, char *buf)
1da177e4
LT		 487{
488 struct w83627hf_data *data = w83627hf_update_device(dev);
489 return show_in_0(data, buf, data->in[0]);
490}
491
a5099cfc 492static ssize_t show_regs_in_min0(struct device *dev, struct device_attribute *attr, char *buf)
1da177e4
LT		 493{
494 struct w83627hf_data *data = w83627hf_update_device(dev);
495 return show_in_0(data, buf, data->in_min[0]);
496}
497
a5099cfc 498static ssize_t show_regs_in_max0(struct device *dev, struct device_attribute *attr, char *buf)
1da177e4
LT		 499{
500 struct w83627hf_data *data = w83627hf_update_device(dev);
501 return show_in_0(data, buf, data->in_max[0]);
502}
503
a5099cfc 504static ssize_t store_regs_in_min0(struct device *dev, struct device_attribute *attr,
1da177e4
LT		 505 const char *buf, size_t count)
506{
787c72b1 507 struct w83627hf_data *data = dev_get_drvdata(dev);
1da177e4
LT		 508 u32 val;
509
510 val = simple_strtoul(buf, NULL, 10);
511
9a61bf63 512 mutex_lock(&data->update_lock);
1da177e4
LT		 513
514 if ((data->vrm_ovt & 0x01) &&
c2db6ce1
JD		 515 (w83627thf == data->type || w83637hf == data->type
516 || w83687thf == data->type))
1da177e4
LT		 517
518 /* use VRM9 calculation */
2723ab91
YM		 519 data->in_min[0] =
520 SENSORS_LIMIT(((val * 100) - 70000 + 244) / 488, 0,
521 255);
1da177e4
LT		 522 else
523 /* use VRM8 (standard) calculation */
524 data->in_min[0] = IN_TO_REG(val);
525
787c72b1 526 w83627hf_write_value(data, W83781D_REG_IN_MIN(0), data->in_min[0]);
9a61bf63 527 mutex_unlock(&data->update_lock);
1da177e4
LT		 528 return count;
529}
530
a5099cfc 531static ssize_t store_regs_in_max0(struct device *dev, struct device_attribute *attr,
1da177e4
LT		 532 const char *buf, size_t count)
533{
787c72b1 534 struct w83627hf_data *data = dev_get_drvdata(dev);
1da177e4
LT		 535 u32 val;
536
537 val = simple_strtoul(buf, NULL, 10);
538
9a61bf63 539 mutex_lock(&data->update_lock);
1da177e4
LT		 540
541 if ((data->vrm_ovt & 0x01) &&
c2db6ce1
JD		 542 (w83627thf == data->type || w83637hf == data->type
543 || w83687thf == data->type))
1da177e4
LT		 544
545 /* use VRM9 calculation */
2723ab91
YM		 546 data->in_max[0] =
547 SENSORS_LIMIT(((val * 100) - 70000 + 244) / 488, 0,
548 255);
1da177e4
LT		 549 else
550 /* use VRM8 (standard) calculation */
551 data->in_max[0] = IN_TO_REG(val);
552
787c72b1 553 w83627hf_write_value(data, W83781D_REG_IN_MAX(0), data->in_max[0]);
9a61bf63 554 mutex_unlock(&data->update_lock);
1da177e4
LT		 555 return count;
556}
557
558static DEVICE_ATTR(in0_input, S_IRUGO, show_regs_in_0, NULL);
559static DEVICE_ATTR(in0_min, S_IRUGO | S_IWUSR,
560 show_regs_in_min0, store_regs_in_min0);
561static DEVICE_ATTR(in0_max, S_IRUGO | S_IWUSR,
562 show_regs_in_max0, store_regs_in_max0);
563
07584c76
JC		 564static ssize_t
565show_fan_input(struct device *dev, struct device_attribute *devattr, char *buf)
566{
567 int nr = to_sensor_dev_attr(devattr)->index;
568 struct w83627hf_data *data = w83627hf_update_device(dev);
569 return sprintf(buf, "%ld\n", FAN_FROM_REG(data->fan[nr],
570 (long)DIV_FROM_REG(data->fan_div[nr])));
571}
572static ssize_t
573show_fan_min(struct device *dev, struct device_attribute *devattr, char *buf)
574{
575 int nr = to_sensor_dev_attr(devattr)->index;
576 struct w83627hf_data *data = w83627hf_update_device(dev);
577 return sprintf(buf, "%ld\n", FAN_FROM_REG(data->fan_min[nr],
578 (long)DIV_FROM_REG(data->fan_div[nr])));
1da177e4 579}
1da177e4 580static ssize_t
07584c76
JC		 581store_fan_min(struct device *dev, struct device_attribute *devattr,
582 const char *buf, size_t count)
1da177e4 583{
07584c76 584 int nr = to_sensor_dev_attr(devattr)->index;
787c72b1 585 struct w83627hf_data *data = dev_get_drvdata(dev);
07584c76 586 u32 val = simple_strtoul(buf, NULL, 10);
1da177e4 587
9a61bf63 588 mutex_lock(&data->update_lock);
07584c76 589 data->fan_min[nr] = FAN_TO_REG(val, DIV_FROM_REG(data->fan_div[nr]));
2ca2fcd1 590 w83627hf_write_value(data, W83627HF_REG_FAN_MIN(nr),
07584c76 591 data->fan_min[nr]);
1da177e4 592
9a61bf63 593 mutex_unlock(&data->update_lock);
1da177e4
LT		 594 return count;
595}
07584c76
JC		 596#define sysfs_fan_decl(offset) \
597static SENSOR_DEVICE_ATTR(fan##offset##_input, S_IRUGO, \
598 show_fan_input, NULL, offset - 1); \
599static SENSOR_DEVICE_ATTR(fan##offset##_min, S_IRUGO | S_IWUSR, \
600 show_fan_min, store_fan_min, offset - 1);
1da177e4 601
07584c76
JC		 602sysfs_fan_decl(1);
603sysfs_fan_decl(2);
604sysfs_fan_decl(3);
1da177e4 605
07584c76
JC		 606static ssize_t
607show_temp(struct device *dev, struct device_attribute *devattr, char *buf)
608{
609 int nr = to_sensor_dev_attr(devattr)->index;
610 struct w83627hf_data *data = w83627hf_update_device(dev);
df48ed80
JC		 611
612 u16 tmp = data->temp[nr];
613 return sprintf(buf, "%ld\n", (nr) ? (long) LM75_TEMP_FROM_REG(tmp)
614 : (long) TEMP_FROM_REG(tmp));
1da177e4 615}
1da177e4 616
07584c76
JC		 617static ssize_t
618show_temp_max(struct device *dev, struct device_attribute *devattr,
619 char *buf)
620{
621 int nr = to_sensor_dev_attr(devattr)->index;
622 struct w83627hf_data *data = w83627hf_update_device(dev);
df48ed80
JC		 623
624 u16 tmp = data->temp_max[nr];
625 return sprintf(buf, "%ld\n", (nr) ? (long) LM75_TEMP_FROM_REG(tmp)
626 : (long) TEMP_FROM_REG(tmp));
1da177e4 627}
1da177e4 628
07584c76
JC		 629static ssize_t
630show_temp_max_hyst(struct device *dev, struct device_attribute *devattr,
631 char *buf)
632{
633 int nr = to_sensor_dev_attr(devattr)->index;
634 struct w83627hf_data *data = w83627hf_update_device(dev);
df48ed80
JC		 635
636 u16 tmp = data->temp_max_hyst[nr];
637 return sprintf(buf, "%ld\n", (nr) ? (long) LM75_TEMP_FROM_REG(tmp)
638 : (long) TEMP_FROM_REG(tmp));
07584c76 639}
1da177e4 640
07584c76
JC		 641static ssize_t
642store_temp_max(struct device *dev, struct device_attribute *devattr,
643 const char *buf, size_t count)
644{
645 int nr = to_sensor_dev_attr(devattr)->index;
646 struct w83627hf_data *data = dev_get_drvdata(dev);
647 long val = simple_strtol(buf, NULL, 10);
df48ed80 648 u16 tmp = (nr) ? LM75_TEMP_TO_REG(val) : TEMP_TO_REG(val);
1da177e4 649
07584c76 650 mutex_lock(&data->update_lock);
df48ed80
JC		 651 data->temp_max[nr] = tmp;
652 w83627hf_write_value(data, w83627hf_reg_temp_over[nr], tmp);
07584c76
JC		 653 mutex_unlock(&data->update_lock);
654 return count;
655}
656
657static ssize_t
658store_temp_max_hyst(struct device *dev, struct device_attribute *devattr,
659 const char *buf, size_t count)
660{
661 int nr = to_sensor_dev_attr(devattr)->index;
662 struct w83627hf_data *data = dev_get_drvdata(dev);
663 long val = simple_strtol(buf, NULL, 10);
df48ed80 664 u16 tmp = (nr) ? LM75_TEMP_TO_REG(val) : TEMP_TO_REG(val);
07584c76
JC		 665
666 mutex_lock(&data->update_lock);
df48ed80
JC		 667 data->temp_max_hyst[nr] = tmp;
668 w83627hf_write_value(data, w83627hf_reg_temp_hyst[nr], tmp);
07584c76
JC		 669 mutex_unlock(&data->update_lock);
670 return count;
671}
672
673#define sysfs_temp_decl(offset) \
674static SENSOR_DEVICE_ATTR(temp##offset##_input, S_IRUGO, \
df48ed80 675 show_temp, NULL, offset - 1); \
07584c76 676static SENSOR_DEVICE_ATTR(temp##offset##_max, S_IRUGO|S_IWUSR, \
df48ed80 677 show_temp_max, store_temp_max, offset - 1); \
07584c76 678static SENSOR_DEVICE_ATTR(temp##offset##_max_hyst, S_IRUGO|S_IWUSR, \
df48ed80 679 show_temp_max_hyst, store_temp_max_hyst, offset - 1);
07584c76
JC		 680
681sysfs_temp_decl(1);
682sysfs_temp_decl(2);
683sysfs_temp_decl(3);
1da177e4 684
1da177e4 685static ssize_t
a5099cfc 686show_vid_reg(struct device *dev, struct device_attribute *attr, char *buf)
1da177e4
LT		 687{
688 struct w83627hf_data *data = w83627hf_update_device(dev);
689 return sprintf(buf, "%ld\n", (long) vid_from_reg(data->vid, data->vrm));
690}
691static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid_reg, NULL);
1da177e4
LT		 692
693static ssize_t
a5099cfc 694show_vrm_reg(struct device *dev, struct device_attribute *attr, char *buf)
1da177e4 695{
90d6619a 696 struct w83627hf_data *data = dev_get_drvdata(dev);
1da177e4
LT		 697 return sprintf(buf, "%ld\n", (long) data->vrm);
698}
699static ssize_t
a5099cfc 700store_vrm_reg(struct device *dev, struct device_attribute *attr, const char *buf, size_t count)
1da177e4 701{
787c72b1 702 struct w83627hf_data *data = dev_get_drvdata(dev);
1da177e4
LT		 703 u32 val;
704
705 val = simple_strtoul(buf, NULL, 10);
706 data->vrm = val;
707
708 return count;
709}
710static DEVICE_ATTR(vrm, S_IRUGO | S_IWUSR, show_vrm_reg, store_vrm_reg);
1da177e4
LT		 711
712static ssize_t
a5099cfc 713show_alarms_reg(struct device *dev, struct device_attribute *attr, char *buf)
1da177e4
LT		 714{
715 struct w83627hf_data *data = w83627hf_update_device(dev);
716 return sprintf(buf, "%ld\n", (long) data->alarms);
717}
718static DEVICE_ATTR(alarms, S_IRUGO, show_alarms_reg, NULL);
1da177e4 719
e3604c62
JD		 720static ssize_t
721show_alarm(struct device *dev, struct device_attribute *attr, char *buf)
722{
723 struct w83627hf_data *data = w83627hf_update_device(dev);
724 int bitnr = to_sensor_dev_attr(attr)->index;
725 return sprintf(buf, "%u\n", (data->alarms >> bitnr) & 1);
726}
727static SENSOR_DEVICE_ATTR(in0_alarm, S_IRUGO, show_alarm, NULL, 0);
728static SENSOR_DEVICE_ATTR(in1_alarm, S_IRUGO, show_alarm, NULL, 1);
729static SENSOR_DEVICE_ATTR(in2_alarm, S_IRUGO, show_alarm, NULL, 2);
730static SENSOR_DEVICE_ATTR(in3_alarm, S_IRUGO, show_alarm, NULL, 3);
731static SENSOR_DEVICE_ATTR(in4_alarm, S_IRUGO, show_alarm, NULL, 8);
732static SENSOR_DEVICE_ATTR(in5_alarm, S_IRUGO, show_alarm, NULL, 9);
733static SENSOR_DEVICE_ATTR(in6_alarm, S_IRUGO, show_alarm, NULL, 10);
734static SENSOR_DEVICE_ATTR(in7_alarm, S_IRUGO, show_alarm, NULL, 16);
735static SENSOR_DEVICE_ATTR(in8_alarm, S_IRUGO, show_alarm, NULL, 17);
736static SENSOR_DEVICE_ATTR(fan1_alarm, S_IRUGO, show_alarm, NULL, 6);
737static SENSOR_DEVICE_ATTR(fan2_alarm, S_IRUGO, show_alarm, NULL, 7);
738static SENSOR_DEVICE_ATTR(fan3_alarm, S_IRUGO, show_alarm, NULL, 11);
739static SENSOR_DEVICE_ATTR(temp1_alarm, S_IRUGO, show_alarm, NULL, 4);
740static SENSOR_DEVICE_ATTR(temp2_alarm, S_IRUGO, show_alarm, NULL, 5);
741static SENSOR_DEVICE_ATTR(temp3_alarm, S_IRUGO, show_alarm, NULL, 13);
742
1c138107
JD		 743static ssize_t
744show_beep_mask(struct device *dev, struct device_attribute *attr, char *buf)
745{
746 struct w83627hf_data *data = w83627hf_update_device(dev);
747 return sprintf(buf, "%ld\n",
748 (long)BEEP_MASK_FROM_REG(data->beep_mask));
1da177e4 749}
1da177e4
LT		 750
751static ssize_t
1c138107
JD		 752store_beep_mask(struct device *dev, struct device_attribute *attr,
753 const char *buf, size_t count)
1da177e4 754{
787c72b1 755 struct w83627hf_data *data = dev_get_drvdata(dev);
1c138107 756 unsigned long val;
1da177e4
LT		 757
758 val = simple_strtoul(buf, NULL, 10);
759
9a61bf63 760 mutex_lock(&data->update_lock);
1da177e4 761
1c138107
JD		 762 /* preserve beep enable */
763 data->beep_mask = (data->beep_mask & 0x8000)
764 | BEEP_MASK_TO_REG(val);
765 w83627hf_write_value(data, W83781D_REG_BEEP_INTS1,
766 data->beep_mask & 0xff);
767 w83627hf_write_value(data, W83781D_REG_BEEP_INTS3,
768 ((data->beep_mask) >> 16) & 0xff);
787c72b1 769 w83627hf_write_value(data, W83781D_REG_BEEP_INTS2,
1c138107 770 (data->beep_mask >> 8) & 0xff);
1da177e4 771
9a61bf63 772 mutex_unlock(&data->update_lock);
1da177e4
LT		 773 return count;
774}
775
1c138107
JD		 776static DEVICE_ATTR(beep_mask, S_IRUGO | S_IWUSR,
777 show_beep_mask, store_beep_mask);
1da177e4 778
e3604c62
JD		 779static ssize_t
780show_beep(struct device *dev, struct device_attribute *attr, char *buf)
781{
782 struct w83627hf_data *data = w83627hf_update_device(dev);
783 int bitnr = to_sensor_dev_attr(attr)->index;
784 return sprintf(buf, "%u\n", (data->beep_mask >> bitnr) & 1);
785}
786
787static ssize_t
788store_beep(struct device *dev, struct device_attribute *attr,
789 const char *buf, size_t count)
790{
791 struct w83627hf_data *data = dev_get_drvdata(dev);
792 int bitnr = to_sensor_dev_attr(attr)->index;
793 unsigned long bit;
794 u8 reg;
795
796 bit = simple_strtoul(buf, NULL, 10);
797 if (bit & ~1)
798 return -EINVAL;
799
800 mutex_lock(&data->update_lock);
801 if (bit)
802 data->beep_mask |= (1 << bitnr);
803 else
804 data->beep_mask &= ~(1 << bitnr);
805
806 if (bitnr < 8) {
807 reg = w83627hf_read_value(data, W83781D_REG_BEEP_INTS1);
808 if (bit)
809 reg |= (1 << bitnr);
810 else
811 reg &= ~(1 << bitnr);
812 w83627hf_write_value(data, W83781D_REG_BEEP_INTS1, reg);
813 } else if (bitnr < 16) {
814 reg = w83627hf_read_value(data, W83781D_REG_BEEP_INTS2);
815 if (bit)
816 reg |= (1 << (bitnr - 8));
817 else
818 reg &= ~(1 << (bitnr - 8));
819 w83627hf_write_value(data, W83781D_REG_BEEP_INTS2, reg);
820 } else {
821 reg = w83627hf_read_value(data, W83781D_REG_BEEP_INTS3);
822 if (bit)
823 reg |= (1 << (bitnr - 16));
824 else
825 reg &= ~(1 << (bitnr - 16));
826 w83627hf_write_value(data, W83781D_REG_BEEP_INTS3, reg);
827 }
828 mutex_unlock(&data->update_lock);
829
830 return count;
831}
832
833static SENSOR_DEVICE_ATTR(in0_beep, S_IRUGO | S_IWUSR,
834 show_beep, store_beep, 0);
835static SENSOR_DEVICE_ATTR(in1_beep, S_IRUGO | S_IWUSR,
836 show_beep, store_beep, 1);
837static SENSOR_DEVICE_ATTR(in2_beep, S_IRUGO | S_IWUSR,
838 show_beep, store_beep, 2);
839static SENSOR_DEVICE_ATTR(in3_beep, S_IRUGO | S_IWUSR,
840 show_beep, store_beep, 3);
841static SENSOR_DEVICE_ATTR(in4_beep, S_IRUGO | S_IWUSR,
842 show_beep, store_beep, 8);
843static SENSOR_DEVICE_ATTR(in5_beep, S_IRUGO | S_IWUSR,
844 show_beep, store_beep, 9);
845static SENSOR_DEVICE_ATTR(in6_beep, S_IRUGO | S_IWUSR,
846 show_beep, store_beep, 10);
847static SENSOR_DEVICE_ATTR(in7_beep, S_IRUGO | S_IWUSR,
848 show_beep, store_beep, 16);
849static SENSOR_DEVICE_ATTR(in8_beep, S_IRUGO | S_IWUSR,
850 show_beep, store_beep, 17);
851static SENSOR_DEVICE_ATTR(fan1_beep, S_IRUGO | S_IWUSR,
852 show_beep, store_beep, 6);
853static SENSOR_DEVICE_ATTR(fan2_beep, S_IRUGO | S_IWUSR,
854 show_beep, store_beep, 7);
855static SENSOR_DEVICE_ATTR(fan3_beep, S_IRUGO | S_IWUSR,
856 show_beep, store_beep, 11);
857static SENSOR_DEVICE_ATTR(temp1_beep, S_IRUGO | S_IWUSR,
858 show_beep, store_beep, 4);
859static SENSOR_DEVICE_ATTR(temp2_beep, S_IRUGO | S_IWUSR,
860 show_beep, store_beep, 5);
861static SENSOR_DEVICE_ATTR(temp3_beep, S_IRUGO | S_IWUSR,
862 show_beep, store_beep, 13);
1c138107
JD		 863static SENSOR_DEVICE_ATTR(beep_enable, S_IRUGO | S_IWUSR,
864 show_beep, store_beep, 15);
e3604c62 865
1da177e4 866static ssize_t
07584c76 867show_fan_div(struct device *dev, struct device_attribute *devattr, char *buf)
1da177e4 868{
07584c76 869 int nr = to_sensor_dev_attr(devattr)->index;
1da177e4
LT		 870 struct w83627hf_data *data = w83627hf_update_device(dev);
871 return sprintf(buf, "%ld\n",
07584c76 872 (long) DIV_FROM_REG(data->fan_div[nr]));
1da177e4 873}
1da177e4
LT		 874/* Note: we save and restore the fan minimum here, because its value is
875 determined in part by the fan divisor. This follows the principle of
d6e05edc 876 least surprise; the user doesn't expect the fan minimum to change just
1da177e4
LT		 877 because the divisor changed. */
878static ssize_t
07584c76
JC		 879store_fan_div(struct device *dev, struct device_attribute *devattr,
880 const char *buf, size_t count)
1da177e4 881{
07584c76 882 int nr = to_sensor_dev_attr(devattr)->index;
787c72b1 883 struct w83627hf_data *data = dev_get_drvdata(dev);
1da177e4
LT		 884 unsigned long min;
885 u8 reg;
886 unsigned long val = simple_strtoul(buf, NULL, 10);
887
9a61bf63 888 mutex_lock(&data->update_lock);
1da177e4
LT		 889
890 /* Save fan_min */
891 min = FAN_FROM_REG(data->fan_min[nr],
892 DIV_FROM_REG(data->fan_div[nr]));
893
894 data->fan_div[nr] = DIV_TO_REG(val);
895
787c72b1 896 reg = (w83627hf_read_value(data, nr==2 ? W83781D_REG_PIN : W83781D_REG_VID_FANDIV)
1da177e4
LT		 897 & (nr==0 ? 0xcf : 0x3f))
898 | ((data->fan_div[nr] & 0x03) << (nr==0 ? 4 : 6));
787c72b1 899 w83627hf_write_value(data, nr==2 ? W83781D_REG_PIN : W83781D_REG_VID_FANDIV, reg);
1da177e4 900
787c72b1 901 reg = (w83627hf_read_value(data, W83781D_REG_VBAT)
1da177e4
LT		 902 & ~(1 << (5 + nr)))
903 | ((data->fan_div[nr] & 0x04) << (3 + nr));
787c72b1 904 w83627hf_write_value(data, W83781D_REG_VBAT, reg);
1da177e4
LT		 905
906 /* Restore fan_min */
907 data->fan_min[nr] = FAN_TO_REG(min, DIV_FROM_REG(data->fan_div[nr]));
2ca2fcd1 908 w83627hf_write_value(data, W83627HF_REG_FAN_MIN(nr), data->fan_min[nr]);
1da177e4 909
9a61bf63 910 mutex_unlock(&data->update_lock);
1da177e4
LT		 911 return count;
912}
913
07584c76
JC		 914static SENSOR_DEVICE_ATTR(fan1_div, S_IRUGO|S_IWUSR,
915 show_fan_div, store_fan_div, 0);
916static SENSOR_DEVICE_ATTR(fan2_div, S_IRUGO|S_IWUSR,
917 show_fan_div, store_fan_div, 1);
918static SENSOR_DEVICE_ATTR(fan3_div, S_IRUGO|S_IWUSR,
919 show_fan_div, store_fan_div, 2);
1da177e4 920
1da177e4 921static ssize_t
07584c76 922show_pwm(struct device *dev, struct device_attribute *devattr, char *buf)
1da177e4 923{
07584c76 924 int nr = to_sensor_dev_attr(devattr)->index;
1da177e4 925 struct w83627hf_data *data = w83627hf_update_device(dev);
07584c76 926 return sprintf(buf, "%ld\n", (long) data->pwm[nr]);
1da177e4
LT		 927}
928
929static ssize_t
07584c76
JC		 930store_pwm(struct device *dev, struct device_attribute *devattr,
931 const char *buf, size_t count)
1da177e4 932{
07584c76 933 int nr = to_sensor_dev_attr(devattr)->index;
787c72b1 934 struct w83627hf_data *data = dev_get_drvdata(dev);
07584c76 935 u32 val = simple_strtoul(buf, NULL, 10);
1da177e4 936
9a61bf63 937 mutex_lock(&data->update_lock);
1da177e4
LT		 938
939 if (data->type == w83627thf) {
940 /* bits 0-3 are reserved in 627THF */
07584c76 941 data->pwm[nr] = PWM_TO_REG(val) & 0xf0;
787c72b1 942 w83627hf_write_value(data,
1da177e4 943 W836X7HF_REG_PWM(data->type, nr),
07584c76 944 data->pwm[nr] |
787c72b1 945 (w83627hf_read_value(data,
1da177e4
LT		 946 W836X7HF_REG_PWM(data->type, nr)) & 0x0f));
947 } else {
07584c76 948 data->pwm[nr] = PWM_TO_REG(val);
787c72b1 949 w83627hf_write_value(data,
1da177e4 950 W836X7HF_REG_PWM(data->type, nr),
07584c76 951 data->pwm[nr]);
1da177e4
LT		 952 }
953
9a61bf63 954 mutex_unlock(&data->update_lock);
1da177e4
LT		 955 return count;
956}
957
07584c76
JC		 958static SENSOR_DEVICE_ATTR(pwm1, S_IRUGO|S_IWUSR, show_pwm, store_pwm, 0);
959static SENSOR_DEVICE_ATTR(pwm2, S_IRUGO|S_IWUSR, show_pwm, store_pwm, 1);
960static SENSOR_DEVICE_ATTR(pwm3, S_IRUGO|S_IWUSR, show_pwm, store_pwm, 2);
1da177e4 961
a95a5ed8
DG		 962static ssize_t
963show_pwm_enable(struct device *dev, struct device_attribute *devattr, char *buf)
964{
965 int nr = to_sensor_dev_attr(devattr)->index;
966 struct w83627hf_data *data = w83627hf_update_device(dev);
967 return sprintf(buf, "%d\n", data->pwm_enable[nr]);
968}
969
970static ssize_t
971store_pwm_enable(struct device *dev, struct device_attribute *devattr,
972 const char *buf, size_t count)
973{
974 int nr = to_sensor_dev_attr(devattr)->index;
975 struct w83627hf_data *data = dev_get_drvdata(dev);
976 unsigned long val = simple_strtoul(buf, NULL, 10);
977 u8 reg;
978
979 if (!val || (val > 3)) /* modes 1, 2 and 3 are supported */
980 return -EINVAL;
981 mutex_lock(&data->update_lock);
982 data->pwm_enable[nr] = val;
983 reg = w83627hf_read_value(data, W83627THF_REG_PWM_ENABLE[nr]);
984 reg &= ~(0x03 << W83627THF_PWM_ENABLE_SHIFT[nr]);
985 reg |= (val - 1) << W83627THF_PWM_ENABLE_SHIFT[nr];
986 w83627hf_write_value(data, W83627THF_REG_PWM_ENABLE[nr], reg);
987 mutex_unlock(&data->update_lock);
988 return count;
989}
990
991static SENSOR_DEVICE_ATTR(pwm1_enable, S_IRUGO|S_IWUSR, show_pwm_enable,
992 store_pwm_enable, 0);
993static SENSOR_DEVICE_ATTR(pwm2_enable, S_IRUGO|S_IWUSR, show_pwm_enable,
994 store_pwm_enable, 1);
995static SENSOR_DEVICE_ATTR(pwm3_enable, S_IRUGO|S_IWUSR, show_pwm_enable,
996 store_pwm_enable, 2);
997
1550cb6d 998static ssize_t
07584c76 999show_pwm_freq(struct device *dev, struct device_attribute *devattr, char *buf)
1550cb6d 1000{
07584c76 1001 int nr = to_sensor_dev_attr(devattr)->index;
1550cb6d
COM		 1002 struct w83627hf_data *data = w83627hf_update_device(dev);
1003 if (data->type == w83627hf)
1004 return sprintf(buf, "%ld\n",
07584c76 1005 pwm_freq_from_reg_627hf(data->pwm_freq[nr]));
1550cb6d
COM		 1006 else
1007 return sprintf(buf, "%ld\n",
07584c76 1008 pwm_freq_from_reg(data->pwm_freq[nr]));
1550cb6d
COM		 1009}
1010
1011static ssize_t
07584c76
JC		 1012store_pwm_freq(struct device *dev, struct device_attribute *devattr,
1013 const char *buf, size_t count)
1550cb6d 1014{
07584c76 1015 int nr = to_sensor_dev_attr(devattr)->index;
1550cb6d
COM		 1016 struct w83627hf_data *data = dev_get_drvdata(dev);
1017 static const u8 mask[]={0xF8, 0x8F};
1018 u32 val;
1019
1020 val = simple_strtoul(buf, NULL, 10);
1021
1022 mutex_lock(&data->update_lock);
1023
1024 if (data->type == w83627hf) {
07584c76 1025 data->pwm_freq[nr] = pwm_freq_to_reg_627hf(val);
1550cb6d 1026 w83627hf_write_value(data, W83627HF_REG_PWM_FREQ,
07584c76 1027 (data->pwm_freq[nr] << (nr*4)) |
1550cb6d 1028 (w83627hf_read_value(data,
07584c76 1029 W83627HF_REG_PWM_FREQ) & mask[nr]));
1550cb6d 1030 } else {
07584c76
JC		 1031 data->pwm_freq[nr] = pwm_freq_to_reg(val);
1032 w83627hf_write_value(data, W83637HF_REG_PWM_FREQ[nr],
1033 data->pwm_freq[nr]);
1550cb6d
COM		 1034 }
1035
1036 mutex_unlock(&data->update_lock);
1037 return count;
1038}
1039
07584c76
JC		 1040static SENSOR_DEVICE_ATTR(pwm1_freq, S_IRUGO|S_IWUSR,
1041 show_pwm_freq, store_pwm_freq, 0);
1042static SENSOR_DEVICE_ATTR(pwm2_freq, S_IRUGO|S_IWUSR,
1043 show_pwm_freq, store_pwm_freq, 1);
1044static SENSOR_DEVICE_ATTR(pwm3_freq, S_IRUGO|S_IWUSR,
1045 show_pwm_freq, store_pwm_freq, 2);
1550cb6d 1046
1da177e4 1047static ssize_t
07584c76
JC		 1048show_temp_type(struct device *dev, struct device_attribute *devattr,
1049 char *buf)
1da177e4 1050{
07584c76 1051 int nr = to_sensor_dev_attr(devattr)->index;
1da177e4 1052 struct w83627hf_data *data = w83627hf_update_device(dev);
07584c76 1053 return sprintf(buf, "%ld\n", (long) data->sens[nr]);
1da177e4
LT		 1054}
1055
1056static ssize_t
07584c76
JC		 1057store_temp_type(struct device *dev, struct device_attribute *devattr,
1058 const char *buf, size_t count)
1da177e4 1059{
07584c76 1060 int nr = to_sensor_dev_attr(devattr)->index;
787c72b1 1061 struct w83627hf_data *data = dev_get_drvdata(dev);
1da177e4
LT		 1062 u32 val, tmp;
1063
1064 val = simple_strtoul(buf, NULL, 10);
1065
9a61bf63 1066 mutex_lock(&data->update_lock);
1da177e4
LT		 1067
1068 switch (val) {
1069 case 1: /* PII/Celeron diode */
787c72b1
JD		 1070 tmp = w83627hf_read_value(data, W83781D_REG_SCFG1);
1071 w83627hf_write_value(data, W83781D_REG_SCFG1,
07584c76 1072 tmp | BIT_SCFG1[nr]);
787c72b1
JD		 1073 tmp = w83627hf_read_value(data, W83781D_REG_SCFG2);
1074 w83627hf_write_value(data, W83781D_REG_SCFG2,
07584c76
JC		 1075 tmp | BIT_SCFG2[nr]);
1076 data->sens[nr] = val;
1da177e4
LT		 1077 break;
1078 case 2: /* 3904 */
787c72b1
JD		 1079 tmp = w83627hf_read_value(data, W83781D_REG_SCFG1);
1080 w83627hf_write_value(data, W83781D_REG_SCFG1,
07584c76 1081 tmp | BIT_SCFG1[nr]);
787c72b1
JD		 1082 tmp = w83627hf_read_value(data, W83781D_REG_SCFG2);
1083 w83627hf_write_value(data, W83781D_REG_SCFG2,
07584c76
JC		 1084 tmp & ~BIT_SCFG2[nr]);
1085 data->sens[nr] = val;
1da177e4 1086 break;
b26f9330
JD		 1087 case W83781D_DEFAULT_BETA:
1088 dev_warn(dev, "Sensor type %d is deprecated, please use 4 "
1089 "instead\n", W83781D_DEFAULT_BETA);
1090 /* fall through */
1091 case 4: /* thermistor */
787c72b1
JD		 1092 tmp = w83627hf_read_value(data, W83781D_REG_SCFG1);
1093 w83627hf_write_value(data, W83781D_REG_SCFG1,
07584c76
JC		 1094 tmp & ~BIT_SCFG1[nr]);
1095 data->sens[nr] = val;
1da177e4
LT		 1096 break;
1097 default:
787c72b1 1098 dev_err(dev,
b26f9330
JD		 1099 "Invalid sensor type %ld; must be 1, 2, or 4\n",
1100 (long) val);
1da177e4
LT		 1101 break;
1102 }
1103
9a61bf63 1104 mutex_unlock(&data->update_lock);
1da177e4
LT		 1105 return count;
1106}
1107
07584c76
JC		 1108#define sysfs_temp_type(offset) \
1109static SENSOR_DEVICE_ATTR(temp##offset##_type, S_IRUGO | S_IWUSR, \
1110 show_temp_type, store_temp_type, offset - 1);
1da177e4 1111
07584c76
JC		 1112sysfs_temp_type(1);
1113sysfs_temp_type(2);
1114sysfs_temp_type(3);
1da177e4 1115
07584c76
JC		 1116static ssize_t
1117show_name(struct device *dev, struct device_attribute *devattr, char *buf)
787c72b1
JD		 1118{
1119 struct w83627hf_data *data = dev_get_drvdata(dev);
1120
1121 return sprintf(buf, "%s\n", data->name);
1122}
1123static DEVICE_ATTR(name, S_IRUGO, show_name, NULL);
1124
1125static int __init w83627hf_find(int sioaddr, unsigned short *addr,
1126 struct w83627hf_sio_data *sio_data)
1da177e4 1127{
d27c37c0 1128 int err = -ENODEV;
1da177e4
LT		 1129 u16 val;
1130
787c72b1
JD		 1131 static const __initdata char *names[] = {
1132 "W83627HF",
1133 "W83627THF",
1134 "W83697HF",
1135 "W83637HF",
1136 "W83687THF",
1137 };
1138
1da177e4
LT		 1139 REG = sioaddr;
1140 VAL = sioaddr + 1;
1141
1142 superio_enter();
67b671bc 1143 val = force_id ? force_id : superio_inb(DEVID);
787c72b1
JD		 1144 switch (val) {
1145 case W627_DEVID:
1146 sio_data->type = w83627hf;
1147 break;
1148 case W627THF_DEVID:
1149 sio_data->type = w83627thf;
1150 break;
1151 case W697_DEVID:
1152 sio_data->type = w83697hf;
1153 break;
1154 case W637_DEVID:
1155 sio_data->type = w83637hf;
1156 break;
1157 case W687THF_DEVID:
1158 sio_data->type = w83687thf;
1159 break;
e142e2a3
JD		 1160 case 0xff: /* No device at all */
1161 goto exit;
787c72b1 1162 default:
e142e2a3 1163 pr_debug(DRVNAME ": Unsupported chip (DEVID=0x%02x)\n", val);
d27c37c0 1164 goto exit;
1da177e4
LT		 1165 }
1166
1167 superio_select(W83627HF_LD_HWM);
1168 val = (superio_inb(WINB_BASE_REG) << 8) |
1169 superio_inb(WINB_BASE_REG + 1);
ada0c2f8 1170 *addr = val & WINB_ALIGNMENT;
d27c37c0
JD		 1171 if (*addr == 0) {
1172 printk(KERN_WARNING DRVNAME ": Base address not set, "
1173 "skipping\n");
1174 goto exit;
1da177e4 1175 }
1da177e4 1176
d27c37c0
JD		 1177 val = superio_inb(WINB_ACT_REG);
1178 if (!(val & 0x01)) {
1179 printk(KERN_WARNING DRVNAME ": Enabling HWM logical device\n");
1180 superio_outb(WINB_ACT_REG, val | 0x01);
1181 }
1182
1183 err = 0;
787c72b1
JD		 1184 pr_info(DRVNAME ": Found %s chip at %#x\n",
1185 names[sio_data->type], *addr);
d27c37c0
JD		 1186
1187 exit:
1da177e4 1188 superio_exit();
d27c37c0 1189 return err;
1da177e4
LT		 1190}
1191
07584c76
JC		 1192#define VIN_UNIT_ATTRS(_X_) \
1193 &sensor_dev_attr_in##_X_##_input.dev_attr.attr, \
1194 &sensor_dev_attr_in##_X_##_min.dev_attr.attr, \
e3604c62
JD		 1195 &sensor_dev_attr_in##_X_##_max.dev_attr.attr, \
1196 &sensor_dev_attr_in##_X_##_alarm.dev_attr.attr, \
1197 &sensor_dev_attr_in##_X_##_beep.dev_attr.attr
07584c76
JC		 1198
1199#define FAN_UNIT_ATTRS(_X_) \
1200 &sensor_dev_attr_fan##_X_##_input.dev_attr.attr, \
1201 &sensor_dev_attr_fan##_X_##_min.dev_attr.attr, \
e3604c62
JD		 1202 &sensor_dev_attr_fan##_X_##_div.dev_attr.attr, \
1203 &sensor_dev_attr_fan##_X_##_alarm.dev_attr.attr, \
1204 &sensor_dev_attr_fan##_X_##_beep.dev_attr.attr
07584c76
JC		 1205
1206#define TEMP_UNIT_ATTRS(_X_) \
1207 &sensor_dev_attr_temp##_X_##_input.dev_attr.attr, \
1208 &sensor_dev_attr_temp##_X_##_max.dev_attr.attr, \
1209 &sensor_dev_attr_temp##_X_##_max_hyst.dev_attr.attr, \
e3604c62
JD		 1210 &sensor_dev_attr_temp##_X_##_type.dev_attr.attr, \
1211 &sensor_dev_attr_temp##_X_##_alarm.dev_attr.attr, \
1212 &sensor_dev_attr_temp##_X_##_beep.dev_attr.attr
07584c76 1213
c1685f61
MH		 1214static struct attribute *w83627hf_attributes[] = {
1215 &dev_attr_in0_input.attr,
1216 &dev_attr_in0_min.attr,
1217 &dev_attr_in0_max.attr,
e3604c62
JD		 1218 &sensor_dev_attr_in0_alarm.dev_attr.attr,
1219 &sensor_dev_attr_in0_beep.dev_attr.attr,
07584c76
JC		 1220 VIN_UNIT_ATTRS(2),
1221 VIN_UNIT_ATTRS(3),
1222 VIN_UNIT_ATTRS(4),
1223 VIN_UNIT_ATTRS(7),
1224 VIN_UNIT_ATTRS(8),
1225
1226 FAN_UNIT_ATTRS(1),
1227 FAN_UNIT_ATTRS(2),
1228
1229 TEMP_UNIT_ATTRS(1),
1230 TEMP_UNIT_ATTRS(2),
c1685f61
MH		 1231
1232 &dev_attr_alarms.attr,
1c138107 1233 &sensor_dev_attr_beep_enable.dev_attr.attr,
c1685f61
MH		 1234 &dev_attr_beep_mask.attr,
1235
07584c76
JC		 1236 &sensor_dev_attr_pwm1.dev_attr.attr,
1237 &sensor_dev_attr_pwm2.dev_attr.attr,
787c72b1 1238 &dev_attr_name.attr,
c1685f61
MH		 1239 NULL
1240};
1241
1242static const struct attribute_group w83627hf_group = {
1243 .attrs = w83627hf_attributes,
1244};
1245
1246static struct attribute *w83627hf_attributes_opt[] = {
07584c76
JC		 1247 VIN_UNIT_ATTRS(1),
1248 VIN_UNIT_ATTRS(5),
1249 VIN_UNIT_ATTRS(6),
1250
1251 FAN_UNIT_ATTRS(3),
1252 TEMP_UNIT_ATTRS(3),
1253 &sensor_dev_attr_pwm3.dev_attr.attr,
1254
1255 &sensor_dev_attr_pwm1_freq.dev_attr.attr,
1256 &sensor_dev_attr_pwm2_freq.dev_attr.attr,
1257 &sensor_dev_attr_pwm3_freq.dev_attr.attr,
a95a5ed8
DG		 1258
1259 &sensor_dev_attr_pwm1_enable.dev_attr.attr,
1260 &sensor_dev_attr_pwm2_enable.dev_attr.attr,
1261 &sensor_dev_attr_pwm3_enable.dev_attr.attr,
1262
c1685f61
MH		 1263 NULL
1264};
1265
1266static const struct attribute_group w83627hf_group_opt = {
1267 .attrs = w83627hf_attributes_opt,
1268};
1269
787c72b1 1270static int __devinit w83627hf_probe(struct platform_device *pdev)
1da177e4 1271{
787c72b1
JD		 1272 struct device *dev = &pdev->dev;
1273 struct w83627hf_sio_data *sio_data = dev->platform_data;
1da177e4 1274 struct w83627hf_data *data;
787c72b1 1275 struct resource *res;
2ca2fcd1 1276 int err, i;
1da177e4 1277
787c72b1
JD		 1278 static const char *names[] = {
1279 "w83627hf",
1280 "w83627thf",
1281 "w83697hf",
1282 "w83637hf",
1283 "w83687thf",
1284 };
1285
1286 res = platform_get_resource(pdev, IORESOURCE_IO, 0);
1287 if (!request_region(res->start, WINB_REGION_SIZE, DRVNAME)) {
1288 dev_err(dev, "Failed to request region 0x%lx-0x%lx\n",
1289 (unsigned long)res->start,
1290 (unsigned long)(res->start + WINB_REGION_SIZE - 1));
1da177e4
LT		 1291 err = -EBUSY;
1292 goto ERROR0;
1293 }
1294
ba9c2e8d 1295 if (!(data = kzalloc(sizeof(struct w83627hf_data), GFP_KERNEL))) {
1da177e4
LT		 1296 err = -ENOMEM;
1297 goto ERROR1;
1298 }
787c72b1
JD		 1299 data->addr = res->start;
1300 data->type = sio_data->type;
1301 data->name = names[sio_data->type];
9a61bf63 1302 mutex_init(&data->lock);
9a61bf63 1303 mutex_init(&data->update_lock);
787c72b1 1304 platform_set_drvdata(pdev, data);
1da177e4 1305
1da177e4 1306 /* Initialize the chip */
787c72b1 1307 w83627hf_init_device(pdev);
1da177e4
LT		 1308
1309 /* A few vars need to be filled upon startup */
2ca2fcd1
JC		 1310 for (i = 0; i <= 2; i++)
1311 data->fan_min[i] = w83627hf_read_value(
1312 data, W83627HF_REG_FAN_MIN(i));
c09c5184 1313 w83627hf_update_fan_div(data);
1da177e4 1314
c1685f61 1315 /* Register common device attributes */
787c72b1 1316 if ((err = sysfs_create_group(&dev->kobj, &w83627hf_group)))
943b0830 1317 goto ERROR3;
1da177e4 1318
c1685f61 1319 /* Register chip-specific device attributes */
787c72b1 1320 if (data->type == w83627hf || data->type == w83697hf)
07584c76
JC		 1321 if ((err = device_create_file(dev,
1322 &sensor_dev_attr_in5_input.dev_attr))
1323 || (err = device_create_file(dev,
1324 &sensor_dev_attr_in5_min.dev_attr))
1325 || (err = device_create_file(dev,
1326 &sensor_dev_attr_in5_max.dev_attr))
e3604c62
JD		 1327 || (err = device_create_file(dev,
1328 &sensor_dev_attr_in5_alarm.dev_attr))
1329 || (err = device_create_file(dev,
1330 &sensor_dev_attr_in5_beep.dev_attr))
07584c76
JC		 1331 || (err = device_create_file(dev,
1332 &sensor_dev_attr_in6_input.dev_attr))
1333 || (err = device_create_file(dev,
1334 &sensor_dev_attr_in6_min.dev_attr))
1335 || (err = device_create_file(dev,
1336 &sensor_dev_attr_in6_max.dev_attr))
e3604c62
JD		 1337 || (err = device_create_file(dev,
1338 &sensor_dev_attr_in6_alarm.dev_attr))
1339 || (err = device_create_file(dev,
1340 &sensor_dev_attr_in6_beep.dev_attr))
07584c76
JC		 1341 || (err = device_create_file(dev,
1342 &sensor_dev_attr_pwm1_freq.dev_attr))
1343 || (err = device_create_file(dev,
1344 &sensor_dev_attr_pwm2_freq.dev_attr)))
c1685f61 1345 goto ERROR4;
1da177e4 1346
787c72b1 1347 if (data->type != w83697hf)
07584c76
JC		 1348 if ((err = device_create_file(dev,
1349 &sensor_dev_attr_in1_input.dev_attr))
1350 || (err = device_create_file(dev,
1351 &sensor_dev_attr_in1_min.dev_attr))
1352 || (err = device_create_file(dev,
1353 &sensor_dev_attr_in1_max.dev_attr))
e3604c62
JD		 1354 || (err = device_create_file(dev,
1355 &sensor_dev_attr_in1_alarm.dev_attr))
1356 || (err = device_create_file(dev,
1357 &sensor_dev_attr_in1_beep.dev_attr))
07584c76
JC		 1358 || (err = device_create_file(dev,
1359 &sensor_dev_attr_fan3_input.dev_attr))
1360 || (err = device_create_file(dev,
1361 &sensor_dev_attr_fan3_min.dev_attr))
1362 || (err = device_create_file(dev,
1363 &sensor_dev_attr_fan3_div.dev_attr))
e3604c62
JD		 1364 || (err = device_create_file(dev,
1365 &sensor_dev_attr_fan3_alarm.dev_attr))
1366 || (err = device_create_file(dev,
1367 &sensor_dev_attr_fan3_beep.dev_attr))
07584c76
JC		 1368 || (err = device_create_file(dev,
1369 &sensor_dev_attr_temp3_input.dev_attr))
1370 || (err = device_create_file(dev,
1371 &sensor_dev_attr_temp3_max.dev_attr))
1372 || (err = device_create_file(dev,
1373 &sensor_dev_attr_temp3_max_hyst.dev_attr))
e3604c62
JD		 1374 || (err = device_create_file(dev,
1375 &sensor_dev_attr_temp3_alarm.dev_attr))
1376 || (err = device_create_file(dev,
1377 &sensor_dev_attr_temp3_beep.dev_attr))
07584c76
JC		 1378 || (err = device_create_file(dev,
1379 &sensor_dev_attr_temp3_type.dev_attr)))
c1685f61
MH		 1380 goto ERROR4;
1381
787c72b1 1382 if (data->type != w83697hf && data->vid != 0xff) {
8a665a05
JD		 1383 /* Convert VID to voltage based on VRM */
1384 data->vrm = vid_which_vrm();
1385
787c72b1
JD		 1386 if ((err = device_create_file(dev, &dev_attr_cpu0_vid))
1387 || (err = device_create_file(dev, &dev_attr_vrm)))
c1685f61 1388 goto ERROR4;
8a665a05 1389 }
1da177e4 1390
787c72b1
JD		 1391 if (data->type == w83627thf || data->type == w83637hf
1392 || data->type == w83687thf)
07584c76
JC		 1393 if ((err = device_create_file(dev,
1394 &sensor_dev_attr_pwm3.dev_attr)))
c1685f61 1395 goto ERROR4;
1da177e4 1396
1550cb6d 1397 if (data->type == w83637hf || data->type == w83687thf)
07584c76
JC		 1398 if ((err = device_create_file(dev,
1399 &sensor_dev_attr_pwm1_freq.dev_attr))
1400 || (err = device_create_file(dev,
1401 &sensor_dev_attr_pwm2_freq.dev_attr))
1402 || (err = device_create_file(dev,
1403 &sensor_dev_attr_pwm3_freq.dev_attr)))
1550cb6d
COM		 1404 goto ERROR4;
1405
a95a5ed8
DG		 1406 if (data->type != w83627hf)
1407 if ((err = device_create_file(dev,
1408 &sensor_dev_attr_pwm1_enable.dev_attr))
1409 || (err = device_create_file(dev,
1410 &sensor_dev_attr_pwm2_enable.dev_attr)))
1411 goto ERROR4;
1412
1413 if (data->type == w83627thf || data->type == w83637hf
1414 || data->type == w83687thf)
1415 if ((err = device_create_file(dev,
1416 &sensor_dev_attr_pwm3_enable.dev_attr)))
1417 goto ERROR4;
1418
1beeffe4
TJ		 1419 data->hwmon_dev = hwmon_device_register(dev);
1420 if (IS_ERR(data->hwmon_dev)) {
1421 err = PTR_ERR(data->hwmon_dev);
c1685f61
MH		 1422 goto ERROR4;
1423 }
1da177e4
LT		 1424
1425 return 0;
1426
c1685f61 1427 ERROR4:
787c72b1
JD		 1428 sysfs_remove_group(&dev->kobj, &w83627hf_group);
1429 sysfs_remove_group(&dev->kobj, &w83627hf_group_opt);
943b0830 1430 ERROR3:
04a6217d 1431 platform_set_drvdata(pdev, NULL);
1da177e4
LT		 1432 kfree(data);
1433 ERROR1:
787c72b1 1434 release_region(res->start, WINB_REGION_SIZE);
1da177e4
LT		 1435 ERROR0:
1436 return err;
1437}
1438
787c72b1 1439static int __devexit w83627hf_remove(struct platform_device *pdev)
1da177e4 1440{
787c72b1
JD		 1441 struct w83627hf_data *data = platform_get_drvdata(pdev);
1442 struct resource *res;
1da177e4 1443
1beeffe4 1444 hwmon_device_unregister(data->hwmon_dev);
943b0830 1445
787c72b1
JD		 1446 sysfs_remove_group(&pdev->dev.kobj, &w83627hf_group);
1447 sysfs_remove_group(&pdev->dev.kobj, &w83627hf_group_opt);
04a6217d 1448 platform_set_drvdata(pdev, NULL);
943b0830 1449 kfree(data);
1da177e4 1450
787c72b1
JD		 1451 res = platform_get_resource(pdev, IORESOURCE_IO, 0);
1452 release_region(res->start, WINB_REGION_SIZE);
1453
1da177e4
LT		 1454 return 0;
1455}
1456
1457
d58df9cd
JD		 1458/* Registers 0x50-0x5f are banked */
1459static inline void w83627hf_set_bank(struct w83627hf_data *data, u16 reg)
1460{
1461 if ((reg & 0x00f0) == 0x50) {
1462 outb_p(W83781D_REG_BANK, data->addr + W83781D_ADDR_REG_OFFSET);
1463 outb_p(reg >> 8, data->addr + W83781D_DATA_REG_OFFSET);
1464 }
1465}
1466
1467/* Not strictly necessary, but play it safe for now */
1468static inline void w83627hf_reset_bank(struct w83627hf_data *data, u16 reg)
1469{
1470 if (reg & 0xff00) {
1471 outb_p(W83781D_REG_BANK, data->addr + W83781D_ADDR_REG_OFFSET);
1472 outb_p(0, data->addr + W83781D_DATA_REG_OFFSET);
1473 }
1474}
1475
787c72b1 1476static int w83627hf_read_value(struct w83627hf_data *data, u16 reg)
1da177e4 1477{
1da177e4
LT		 1478 int res, word_sized;
1479
9a61bf63 1480 mutex_lock(&data->lock);
1da177e4
LT		 1481 word_sized = (((reg & 0xff00) == 0x100)
1482 || ((reg & 0xff00) == 0x200))
1483 && (((reg & 0x00ff) == 0x50)
1484 || ((reg & 0x00ff) == 0x53)
1485 || ((reg & 0x00ff) == 0x55));
d58df9cd 1486 w83627hf_set_bank(data, reg);
787c72b1
JD		 1487 outb_p(reg & 0xff, data->addr + W83781D_ADDR_REG_OFFSET);
1488 res = inb_p(data->addr + W83781D_DATA_REG_OFFSET);
1da177e4
LT		 1489 if (word_sized) {
1490 outb_p((reg & 0xff) + 1,
787c72b1 1491 data->addr + W83781D_ADDR_REG_OFFSET);
1da177e4 1492 res =
787c72b1 1493 (res << 8) + inb_p(data->addr +
1da177e4
LT		 1494 W83781D_DATA_REG_OFFSET);
1495 }
d58df9cd 1496 w83627hf_reset_bank(data, reg);
9a61bf63 1497 mutex_unlock(&data->lock);
1da177e4
LT		 1498 return res;
1499}
1500
787c72b1 1501static int __devinit w83627thf_read_gpio5(struct platform_device *pdev)
1da177e4
LT		 1502{
1503 int res = 0xff, sel;
1504
1505 superio_enter();
1506 superio_select(W83627HF_LD_GPIO5);
1507
1508 /* Make sure these GPIO pins are enabled */
1509 if (!(superio_inb(W83627THF_GPIO5_EN) & (1<<3))) {
787c72b1 1510 dev_dbg(&pdev->dev, "GPIO5 disabled, no VID function\n");
1da177e4
LT		 1511 goto exit;
1512 }
1513
1514 /* Make sure the pins are configured for input
1515 There must be at least five (VRM 9), and possibly 6 (VRM 10) */
dd149c52 1516 sel = superio_inb(W83627THF_GPIO5_IOSR) & 0x3f;
1da177e4 1517 if ((sel & 0x1f) != 0x1f) {
787c72b1 1518 dev_dbg(&pdev->dev, "GPIO5 not configured for VID "
1da177e4
LT		 1519 "function\n");
1520 goto exit;
1521 }
1522
787c72b1 1523 dev_info(&pdev->dev, "Reading VID from GPIO5\n");
1da177e4
LT		 1524 res = superio_inb(W83627THF_GPIO5_DR) & sel;
1525
1526exit:
1527 superio_exit();
1528 return res;
1529}
1530
787c72b1 1531static int __devinit w83687thf_read_vid(struct platform_device *pdev)
c2db6ce1
JD		 1532{
1533 int res = 0xff;
1534
1535 superio_enter();
1536 superio_select(W83627HF_LD_HWM);
1537
1538 /* Make sure these GPIO pins are enabled */
1539 if (!(superio_inb(W83687THF_VID_EN) & (1 << 2))) {
787c72b1 1540 dev_dbg(&pdev->dev, "VID disabled, no VID function\n");
c2db6ce1
JD		 1541 goto exit;
1542 }
1543
1544 /* Make sure the pins are configured for input */
1545 if (!(superio_inb(W83687THF_VID_CFG) & (1 << 4))) {
787c72b1 1546 dev_dbg(&pdev->dev, "VID configured as output, "
c2db6ce1
JD		 1547 "no VID function\n");
1548 goto exit;
1549 }
1550
1551 res = superio_inb(W83687THF_VID_DATA) & 0x3f;
1552
1553exit:
1554 superio_exit();
1555 return res;
1556}
1557
787c72b1 1558static int w83627hf_write_value(struct w83627hf_data *data, u16 reg, u16 value)
1da177e4 1559{
1da177e4
LT		 1560 int word_sized;
1561
9a61bf63 1562 mutex_lock(&data->lock);
1da177e4
LT		 1563 word_sized = (((reg & 0xff00) == 0x100)
1564 || ((reg & 0xff00) == 0x200))
1565 && (((reg & 0x00ff) == 0x53)
1566 || ((reg & 0x00ff) == 0x55));
d58df9cd 1567 w83627hf_set_bank(data, reg);
787c72b1 1568 outb_p(reg & 0xff, data->addr + W83781D_ADDR_REG_OFFSET);
1da177e4
LT		 1569 if (word_sized) {
1570 outb_p(value >> 8,
787c72b1 1571 data->addr + W83781D_DATA_REG_OFFSET);
1da177e4 1572 outb_p((reg & 0xff) + 1,
787c72b1 1573 data->addr + W83781D_ADDR_REG_OFFSET);
1da177e4
LT		 1574 }
1575 outb_p(value & 0xff,
787c72b1 1576 data->addr + W83781D_DATA_REG_OFFSET);
d58df9cd 1577 w83627hf_reset_bank(data, reg);
9a61bf63 1578 mutex_unlock(&data->lock);
1da177e4
LT		 1579 return 0;
1580}
1581
787c72b1 1582static void __devinit w83627hf_init_device(struct platform_device *pdev)
1da177e4 1583{
787c72b1 1584 struct w83627hf_data *data = platform_get_drvdata(pdev);
1da177e4 1585 int i;
d27c37c0 1586 enum chips type = data->type;
1da177e4
LT		 1587 u8 tmp;
1588
1da177e4
LT		 1589 /* Minimize conflicts with other winbond i2c-only clients... */
1590 /* disable i2c subclients... how to disable main i2c client?? */
1591 /* force i2c address to relatively uncommon address */
787c72b1
JD		 1592 w83627hf_write_value(data, W83781D_REG_I2C_SUBADDR, 0x89);
1593 w83627hf_write_value(data, W83781D_REG_I2C_ADDR, force_i2c);
1da177e4
LT		 1594
1595 /* Read VID only once */
d27c37c0 1596 if (type == w83627hf || type == w83637hf) {
787c72b1
JD		 1597 int lo = w83627hf_read_value(data, W83781D_REG_VID_FANDIV);
1598 int hi = w83627hf_read_value(data, W83781D_REG_CHIPID);
1da177e4 1599 data->vid = (lo & 0x0f) | ((hi & 0x01) << 4);
d27c37c0 1600 } else if (type == w83627thf) {
787c72b1 1601 data->vid = w83627thf_read_gpio5(pdev);
d27c37c0 1602 } else if (type == w83687thf) {
787c72b1 1603 data->vid = w83687thf_read_vid(pdev);
1da177e4
LT		 1604 }
1605
1606 /* Read VRM & OVT Config only once */
d27c37c0 1607 if (type == w83627thf || type == w83637hf || type == w83687thf) {
1da177e4 1608 data->vrm_ovt =
787c72b1 1609 w83627hf_read_value(data, W83627THF_REG_VRM_OVT_CFG);
1da177e4
LT		 1610 }
1611
787c72b1 1612 tmp = w83627hf_read_value(data, W83781D_REG_SCFG1);
1da177e4
LT		 1613 for (i = 1; i <= 3; i++) {
1614 if (!(tmp & BIT_SCFG1[i - 1])) {
b26f9330 1615 data->sens[i - 1] = 4;
1da177e4
LT		 1616 } else {
1617 if (w83627hf_read_value
787c72b1 1618 (data,
1da177e4
LT		 1619 W83781D_REG_SCFG2) & BIT_SCFG2[i - 1])
1620 data->sens[i - 1] = 1;
1621 else
1622 data->sens[i - 1] = 2;
1623 }
1624 if ((type == w83697hf) && (i == 2))
1625 break;
1626 }
1627
1628 if(init) {
1629 /* Enable temp2 */
df48ed80 1630 tmp = w83627hf_read_value(data, W83627HF_REG_TEMP2_CONFIG);
1da177e4 1631 if (tmp & 0x01) {
787c72b1 1632 dev_warn(&pdev->dev, "Enabling temp2, readings "
1da177e4 1633 "might not make sense\n");
df48ed80 1634 w83627hf_write_value(data, W83627HF_REG_TEMP2_CONFIG,
1da177e4
LT		 1635 tmp & 0xfe);
1636 }
1637
1638 /* Enable temp3 */
1639 if (type != w83697hf) {
787c72b1 1640 tmp = w83627hf_read_value(data,
df48ed80 1641 W83627HF_REG_TEMP3_CONFIG);
1da177e4 1642 if (tmp & 0x01) {
787c72b1 1643 dev_warn(&pdev->dev, "Enabling temp3, "
1da177e4 1644 "readings might not make sense\n");
787c72b1 1645 w83627hf_write_value(data,
df48ed80 1646 W83627HF_REG_TEMP3_CONFIG, tmp & 0xfe);
1da177e4
LT		 1647 }
1648 }
1da177e4
LT		 1649 }
1650
1651 /* Start monitoring */
787c72b1
JD		 1652 w83627hf_write_value(data, W83781D_REG_CONFIG,
1653 (w83627hf_read_value(data,
1da177e4
LT		 1654 W83781D_REG_CONFIG) & 0xf7)
1655 | 0x01);
ef878b11
JD		 1656
1657 /* Enable VBAT monitoring if needed */
1658 tmp = w83627hf_read_value(data, W83781D_REG_VBAT);
1659 if (!(tmp & 0x01))
1660 w83627hf_write_value(data, W83781D_REG_VBAT, tmp | 0x01);
1da177e4
LT		 1661}
1662
c09c5184
JD		 1663static void w83627hf_update_fan_div(struct w83627hf_data *data)
1664{
1665 int reg;
1666
1667 reg = w83627hf_read_value(data, W83781D_REG_VID_FANDIV);
1668 data->fan_div[0] = (reg >> 4) & 0x03;
1669 data->fan_div[1] = (reg >> 6) & 0x03;
1670 if (data->type != w83697hf) {
1671 data->fan_div[2] = (w83627hf_read_value(data,
1672 W83781D_REG_PIN) >> 6) & 0x03;
1673 }
1674 reg = w83627hf_read_value(data, W83781D_REG_VBAT);
1675 data->fan_div[0] |= (reg >> 3) & 0x04;
1676 data->fan_div[1] |= (reg >> 4) & 0x04;
1677 if (data->type != w83697hf)
1678 data->fan_div[2] |= (reg >> 5) & 0x04;
1679}
1680
1da177e4
LT		 1681static struct w83627hf_data *w83627hf_update_device(struct device *dev)
1682{
787c72b1 1683 struct w83627hf_data *data = dev_get_drvdata(dev);
df48ed80 1684 int i, num_temps = (data->type == w83697hf) ? 2 : 3;
a95a5ed8 1685 int num_pwms = (data->type == w83697hf) ? 2 : 3;
1da177e4 1686
9a61bf63 1687 mutex_lock(&data->update_lock);
1da177e4
LT		 1688
1689 if (time_after(jiffies, data->last_updated + HZ + HZ / 2)
1690 || !data->valid) {
1691 for (i = 0; i <= 8; i++) {
1692 /* skip missing sensors */
1693 if (((data->type == w83697hf) && (i == 1)) ||
c2db6ce1 1694 ((data->type != w83627hf && data->type != w83697hf)
4a1c4447 1695 && (i == 5 || i == 6)))
1da177e4
LT		 1696 continue;
1697 data->in[i] =
787c72b1 1698 w83627hf_read_value(data, W83781D_REG_IN(i));
1da177e4 1699 data->in_min[i] =
787c72b1 1700 w83627hf_read_value(data,
1da177e4
LT		 1701 W83781D_REG_IN_MIN(i));
1702 data->in_max[i] =
787c72b1 1703 w83627hf_read_value(data,
1da177e4
LT		 1704 W83781D_REG_IN_MAX(i));
1705 }
2ca2fcd1
JC		 1706 for (i = 0; i <= 2; i++) {
1707 data->fan[i] =
1708 w83627hf_read_value(data, W83627HF_REG_FAN(i));
1709 data->fan_min[i] =
787c72b1 1710 w83627hf_read_value(data,
2ca2fcd1 1711 W83627HF_REG_FAN_MIN(i));
1da177e4 1712 }
07584c76 1713 for (i = 0; i <= 2; i++) {
787c72b1 1714 u8 tmp = w83627hf_read_value(data,
1da177e4
LT		 1715 W836X7HF_REG_PWM(data->type, i));
1716 /* bits 0-3 are reserved in 627THF */
1717 if (data->type == w83627thf)
1718 tmp &= 0xf0;
07584c76
JC		 1719 data->pwm[i] = tmp;
1720 if (i == 1 &&
1721 (data->type == w83627hf || data->type == w83697hf))
1da177e4
LT		 1722 break;
1723 }
1550cb6d
COM		 1724 if (data->type == w83627hf) {
1725 u8 tmp = w83627hf_read_value(data,
1726 W83627HF_REG_PWM_FREQ);
1727 data->pwm_freq[0] = tmp & 0x07;
1728 data->pwm_freq[1] = (tmp >> 4) & 0x07;
1729 } else if (data->type != w83627thf) {
1730 for (i = 1; i <= 3; i++) {
1731 data->pwm_freq[i - 1] =
1732 w83627hf_read_value(data,
1733 W83637HF_REG_PWM_FREQ[i - 1]);
1734 if (i == 2 && (data->type == w83697hf))
1735 break;
1736 }
1737 }
a95a5ed8
DG		 1738 if (data->type != w83627hf) {
1739 for (i = 0; i < num_pwms; i++) {
1740 u8 tmp = w83627hf_read_value(data,
1741 W83627THF_REG_PWM_ENABLE[i]);
1742 data->pwm_enable[i] =
1743 ((tmp >> W83627THF_PWM_ENABLE_SHIFT[i])
1744 & 0x03) + 1;
1745 }
1746 }
df48ed80
JC		 1747 for (i = 0; i < num_temps; i++) {
1748 data->temp[i] = w83627hf_read_value(
1749 data, w83627hf_reg_temp[i]);
1750 data->temp_max[i] = w83627hf_read_value(
1751 data, w83627hf_reg_temp_over[i]);
1752 data->temp_max_hyst[i] = w83627hf_read_value(
1753 data, w83627hf_reg_temp_hyst[i]);
1da177e4
LT		 1754 }
1755
c09c5184
JD		 1756 w83627hf_update_fan_div(data);
1757
1da177e4 1758 data->alarms =
787c72b1
JD		 1759 w83627hf_read_value(data, W83781D_REG_ALARM1) |
1760 (w83627hf_read_value(data, W83781D_REG_ALARM2) << 8) |
1761 (w83627hf_read_value(data, W83781D_REG_ALARM3) << 16);
1762 i = w83627hf_read_value(data, W83781D_REG_BEEP_INTS2);
1c138107 1763 data->beep_mask = (i << 8) |
787c72b1
JD		 1764 w83627hf_read_value(data, W83781D_REG_BEEP_INTS1) |
1765 w83627hf_read_value(data, W83781D_REG_BEEP_INTS3) << 16;
1da177e4
LT		 1766 data->last_updated = jiffies;
1767 data->valid = 1;
1768 }
1769
9a61bf63 1770 mutex_unlock(&data->update_lock);
1da177e4
LT		 1771
1772 return data;
1773}
1774
787c72b1
JD		 1775static int __init w83627hf_device_add(unsigned short address,
1776 const struct w83627hf_sio_data *sio_data)
1777{
1778 struct resource res = {
1779 .start = address + WINB_REGION_OFFSET,
1780 .end = address + WINB_REGION_OFFSET + WINB_REGION_SIZE - 1,
1781 .name = DRVNAME,
1782 .flags = IORESOURCE_IO,
1783 };
1784 int err;
1785
b9acb64a
JD		 1786 err = acpi_check_resource_conflict(&res);
1787 if (err)
1788 goto exit;
1789
787c72b1
JD		 1790 pdev = platform_device_alloc(DRVNAME, address);
1791 if (!pdev) {
1792 err = -ENOMEM;
1793 printk(KERN_ERR DRVNAME ": Device allocation failed\n");
1794 goto exit;
1795 }
1796
1797 err = platform_device_add_resources(pdev, &res, 1);
1798 if (err) {
1799 printk(KERN_ERR DRVNAME ": Device resource addition failed "
1800 "(%d)\n", err);
1801 goto exit_device_put;
1802 }
1803
2df6d811
JD		 1804 err = platform_device_add_data(pdev, sio_data,
1805 sizeof(struct w83627hf_sio_data));
1806 if (err) {
787c72b1
JD		 1807 printk(KERN_ERR DRVNAME ": Platform data allocation failed\n");
1808 goto exit_device_put;
1809 }
787c72b1
JD		 1810
1811 err = platform_device_add(pdev);
1812 if (err) {
1813 printk(KERN_ERR DRVNAME ": Device addition failed (%d)\n",
1814 err);
1815 goto exit_device_put;
1816 }
1817
1818 return 0;
1819
1820exit_device_put:
1821 platform_device_put(pdev);
1822exit:
1823 return err;
1824}
1825
1da177e4
LT		 1826static int __init sensors_w83627hf_init(void)
1827{
787c72b1
JD		 1828 int err;
1829 unsigned short address;
1830 struct w83627hf_sio_data sio_data;
1831
1832 if (w83627hf_find(0x2e, &address, &sio_data)
1833 && w83627hf_find(0x4e, &address, &sio_data))
1da177e4 1834 return -ENODEV;
1da177e4 1835
787c72b1
JD		 1836 err = platform_driver_register(&w83627hf_driver);
1837 if (err)
1838 goto exit;
1839
1840 /* Sets global pdev as a side effect */
1841 err = w83627hf_device_add(address, &sio_data);
1842 if (err)
1843 goto exit_driver;
1844
1845 return 0;
1846
1847exit_driver:
1848 platform_driver_unregister(&w83627hf_driver);
1849exit:
1850 return err;
1da177e4
LT		 1851}
1852
1853static void __exit sensors_w83627hf_exit(void)
1854{
787c72b1
JD		 1855 platform_device_unregister(pdev);
1856 platform_driver_unregister(&w83627hf_driver);
1da177e4
LT		 1857}
1858
1859MODULE_AUTHOR("Frodo Looijaard <frodol@dds.nl>, "
1860 "Philip Edelbrock <phil@netroedge.com>, "
1861 "and Mark Studebaker <mdsxyz123@yahoo.com>");
1862MODULE_DESCRIPTION("W83627HF driver");
1863MODULE_LICENSE("GPL");
1864
1865module_init(sensors_w83627hf_init);
1866module_exit(sensors_w83627hf_exit);
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