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1da177e4 | 1 | /* |
1da177e4 LT |
2 | * Copyright (C) 1998-2000 Michel Aubry, Maintainer |
3 | * Copyright (C) 1998-2000 Andrzej Krzysztofowicz, Maintainer | |
4 | * Copyright (C) 1999-2000 CJ, cjtsai@ali.com.tw, Maintainer | |
5 | * | |
6 | * Copyright (C) 1998-2000 Andre Hedrick (andre@linux-ide.org) | |
7 | * May be copied or modified under the terms of the GNU General Public License | |
ccd32e22 | 8 | * Copyright (C) 2002 Alan Cox |
1da177e4 | 9 | * ALi (now ULi M5228) support by Clear Zhang <Clear.Zhang@ali.com.tw> |
21b82477 | 10 | * Copyright (C) 2007 MontaVista Software, Inc. <source@mvista.com> |
3c8cc8df | 11 | * Copyright (C) 2007-2010 Bartlomiej Zolnierkiewicz |
1da177e4 LT |
12 | * |
13 | * (U)DMA capable version of ali 1533/1543(C), 1535(D) | |
14 | * | |
15 | ********************************************************************** | |
16 | * 9/7/99 --Parts from the above author are included and need to be | |
17 | * converted into standard interface, once I finish the thought. | |
18 | * | |
19 | * Recent changes | |
20 | * Don't use LBA48 mode on ALi <= 0xC4 | |
21 | * Don't poke 0x79 with a non ALi northbridge | |
22 | * Don't flip undefined bits on newer chipsets (fix Fujitsu laptop hang) | |
23 | * Allow UDMA6 on revisions > 0xC4 | |
24 | * | |
25 | * Documentation | |
26 | * Chipset documentation available under NDA only | |
27 | * | |
28 | */ | |
29 | ||
1da177e4 LT |
30 | #include <linux/module.h> |
31 | #include <linux/types.h> | |
32 | #include <linux/kernel.h> | |
33 | #include <linux/pci.h> | |
1da177e4 LT |
34 | #include <linux/ide.h> |
35 | #include <linux/init.h> | |
95ba8c17 | 36 | #include <linux/dmi.h> |
1da177e4 LT |
37 | |
38 | #include <asm/io.h> | |
39 | ||
ced3ec8a BZ |
40 | #define DRV_NAME "alim15x3" |
41 | ||
1da177e4 LT |
42 | /* |
43 | * ALi devices are not plug in. Otherwise these static values would | |
44 | * need to go. They ought to go away anyway | |
45 | */ | |
46 | ||
47 | static u8 m5229_revision; | |
48 | static u8 chip_is_1543c_e; | |
49 | static struct pci_dev *isa_dev; | |
50 | ||
293f18ad BZ |
51 | static void ali_fifo_control(ide_hwif_t *hwif, ide_drive_t *drive, int on) |
52 | { | |
53 | struct pci_dev *pdev = to_pci_dev(hwif->dev); | |
54 | int pio_fifo = 0x54 + hwif->channel; | |
55 | u8 fifo; | |
56 | int shift = 4 * (drive->dn & 1); | |
57 | ||
58 | pci_read_config_byte(pdev, pio_fifo, &fifo); | |
59 | fifo &= ~(0x0F << shift); | |
60 | fifo |= (on << shift); | |
61 | pci_write_config_byte(pdev, pio_fifo, fifo); | |
62 | } | |
63 | ||
1da177e4 | 64 | /** |
88b2b32b | 65 | * ali_set_pio_mode - set host controller for PIO mode |
e085b3ca | 66 | * @hwif: port |
26bcb879 | 67 | * @drive: drive |
21b82477 | 68 | * |
26bcb879 | 69 | * Program the controller for the given PIO mode. |
1da177e4 | 70 | */ |
26bcb879 | 71 | |
e085b3ca | 72 | static void ali_set_pio_mode(ide_hwif_t *hwif, ide_drive_t *drive) |
1da177e4 | 73 | { |
36501650 | 74 | struct pci_dev *dev = to_pci_dev(hwif->dev); |
cde727be | 75 | ide_drive_t *pair = ide_get_pair_dev(drive); |
30e5ee4d | 76 | int bus_speed = ide_pci_clk ? ide_pci_clk : 33; |
3c8cc8df | 77 | unsigned long T = 1000000 / bus_speed; /* PCI clock based */ |
1da177e4 | 78 | int port = hwif->channel ? 0x5c : 0x58; |
293f18ad | 79 | u8 unit = drive->dn & 1; |
3c8cc8df | 80 | struct ide_timing t; |
1da177e4 | 81 | |
e085b3ca | 82 | ide_timing_compute(drive, drive->pio_mode, &t, T, 1); |
cde727be BZ |
83 | if (pair) { |
84 | struct ide_timing p; | |
85 | ||
86 | ide_timing_compute(pair, pair->pio_mode, &p, T, 1); | |
5740345b BZ |
87 | ide_timing_merge(&p, &t, &t, |
88 | IDE_TIMING_SETUP | IDE_TIMING_8BIT); | |
cde727be BZ |
89 | if (pair->dma_mode) { |
90 | ide_timing_compute(pair, pair->dma_mode, &p, T, 1); | |
5740345b BZ |
91 | ide_timing_merge(&p, &t, &t, |
92 | IDE_TIMING_SETUP | IDE_TIMING_8BIT); | |
cde727be BZ |
93 | } |
94 | } | |
3c8cc8df BZ |
95 | |
96 | t.setup = clamp_val(t.setup, 1, 8) & 7; | |
5740345b BZ |
97 | t.act8b = clamp_val(t.act8b, 1, 8) & 7; |
98 | t.rec8b = clamp_val(t.rec8b, 1, 16) & 15; | |
3c8cc8df BZ |
99 | t.active = clamp_val(t.active, 1, 8) & 7; |
100 | t.recover = clamp_val(t.recover, 1, 16) & 15; | |
1da177e4 | 101 | |
1da177e4 LT |
102 | /* |
103 | * PIO mode => ATA FIFO on, ATAPI FIFO off | |
104 | */ | |
293f18ad | 105 | ali_fifo_control(hwif, drive, (drive->media == ide_disk) ? 0x05 : 0x00); |
3c8cc8df BZ |
106 | |
107 | pci_write_config_byte(dev, port, t.setup); | |
5740345b | 108 | pci_write_config_byte(dev, port + 1, (t.act8b << 4) | t.rec8b); |
3c8cc8df BZ |
109 | pci_write_config_byte(dev, port + unit + 2, |
110 | (t.active << 4) | t.recover); | |
21b82477 SS |
111 | } |
112 | ||
1da177e4 | 113 | /** |
2d5eaa6d BZ |
114 | * ali_udma_filter - compute UDMA mask |
115 | * @drive: IDE device | |
1da177e4 | 116 | * |
2d5eaa6d BZ |
117 | * Return available UDMA modes. |
118 | * | |
119 | * The actual rules for the ALi are: | |
1da177e4 LT |
120 | * No UDMA on revisions <= 0x20 |
121 | * Disk only for revisions < 0xC2 | |
63b1623e | 122 | * Not WDC drives on M1543C-E (?) |
1da177e4 | 123 | */ |
1da177e4 | 124 | |
2d5eaa6d | 125 | static u8 ali_udma_filter(ide_drive_t *drive) |
1da177e4 | 126 | { |
2d5eaa6d BZ |
127 | if (m5229_revision > 0x20 && m5229_revision < 0xC2) { |
128 | if (drive->media != ide_disk) | |
129 | return 0; | |
2db3dae5 | 130 | if (chip_is_1543c_e && |
4dde4492 | 131 | strstr((char *)&drive->id[ATA_ID_PROD], "WDC ")) |
2d5eaa6d | 132 | return 0; |
1da177e4 LT |
133 | } |
134 | ||
2d5eaa6d | 135 | return drive->hwif->ultra_mask; |
1da177e4 LT |
136 | } |
137 | ||
138 | /** | |
88b2b32b | 139 | * ali_set_dma_mode - set host controller for DMA mode |
8776168c | 140 | * @hwif: port |
88b2b32b | 141 | * @drive: drive |
1da177e4 LT |
142 | * |
143 | * Configure the hardware for the desired IDE transfer mode. | |
1da177e4 | 144 | */ |
f212ff28 | 145 | |
8776168c | 146 | static void ali_set_dma_mode(ide_hwif_t *hwif, ide_drive_t *drive) |
1da177e4 | 147 | { |
36501650 | 148 | struct pci_dev *dev = to_pci_dev(hwif->dev); |
8776168c | 149 | const u8 speed = drive->dma_mode; |
1da177e4 | 150 | u8 speed1 = speed; |
123995b9 | 151 | u8 unit = drive->dn & 1; |
1da177e4 LT |
152 | u8 tmpbyte = 0x00; |
153 | int m5229_udma = (hwif->channel) ? 0x57 : 0x56; | |
154 | ||
155 | if (speed == XFER_UDMA_6) | |
156 | speed1 = 0x47; | |
157 | ||
158 | if (speed < XFER_UDMA_0) { | |
159 | u8 ultra_enable = (unit) ? 0x7f : 0xf7; | |
160 | /* | |
161 | * clear "ultra enable" bit | |
162 | */ | |
163 | pci_read_config_byte(dev, m5229_udma, &tmpbyte); | |
164 | tmpbyte &= ultra_enable; | |
165 | pci_write_config_byte(dev, m5229_udma, tmpbyte); | |
166 | ||
a6fe837e BZ |
167 | /* |
168 | * FIXME: Oh, my... DMA timings are never set. | |
169 | */ | |
1da177e4 LT |
170 | } else { |
171 | pci_read_config_byte(dev, m5229_udma, &tmpbyte); | |
172 | tmpbyte &= (0x0f << ((1-unit) << 2)); | |
173 | /* | |
174 | * enable ultra dma and set timing | |
175 | */ | |
176 | tmpbyte |= ((0x08 | ((4-speed1)&0x07)) << (unit << 2)); | |
177 | pci_write_config_byte(dev, m5229_udma, tmpbyte); | |
178 | if (speed >= XFER_UDMA_3) { | |
179 | pci_read_config_byte(dev, 0x4b, &tmpbyte); | |
180 | tmpbyte |= 1; | |
181 | pci_write_config_byte(dev, 0x4b, tmpbyte); | |
182 | } | |
183 | } | |
1da177e4 LT |
184 | } |
185 | ||
1da177e4 | 186 | /** |
8a4a5738 | 187 | * ali_dma_check - DMA check |
1da177e4 | 188 | * @drive: target device |
22981694 | 189 | * @cmd: command |
1da177e4 LT |
190 | * |
191 | * Returns 1 if the DMA cannot be performed, zero on success. | |
192 | */ | |
193 | ||
8a4a5738 | 194 | static int ali_dma_check(ide_drive_t *drive, struct ide_cmd *cmd) |
1da177e4 LT |
195 | { |
196 | if (m5229_revision < 0xC2 && drive->media != ide_disk) { | |
22981694 | 197 | if (cmd->tf_flags & IDE_TFLAG_WRITE) |
1da177e4 LT |
198 | return 1; /* try PIO instead of DMA */ |
199 | } | |
8a4a5738 | 200 | return 0; |
1da177e4 LT |
201 | } |
202 | ||
203 | /** | |
204 | * init_chipset_ali15x3 - Initialise an ALi IDE controller | |
205 | * @dev: PCI device | |
1da177e4 LT |
206 | * |
207 | * This function initializes the ALI IDE controller and where | |
208 | * appropriate also sets up the 1533 southbridge. | |
209 | */ | |
a326b02b | 210 | |
2ed0ef54 | 211 | static int init_chipset_ali15x3(struct pci_dev *dev) |
1da177e4 LT |
212 | { |
213 | unsigned long flags; | |
214 | u8 tmpbyte; | |
b1489009 | 215 | struct pci_dev *north = pci_get_slot(dev->bus, PCI_DEVFN(0,0)); |
1da177e4 | 216 | |
44c10138 | 217 | m5229_revision = dev->revision; |
1da177e4 | 218 | |
b1489009 | 219 | isa_dev = pci_get_device(PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M1533, NULL); |
1da177e4 | 220 | |
1da177e4 LT |
221 | local_irq_save(flags); |
222 | ||
223 | if (m5229_revision < 0xC2) { | |
224 | /* | |
225 | * revision 0x20 (1543-E, 1543-F) | |
226 | * revision 0xC0, 0xC1 (1543C-C, 1543C-D, 1543C-E) | |
227 | * clear CD-ROM DMA write bit, m5229, 0x4b, bit 7 | |
228 | */ | |
229 | pci_read_config_byte(dev, 0x4b, &tmpbyte); | |
230 | /* | |
231 | * clear bit 7 | |
232 | */ | |
233 | pci_write_config_byte(dev, 0x4b, tmpbyte & 0x7F); | |
cad221aa BZ |
234 | /* |
235 | * check m1533, 0x5e, bit 1~4 == 1001 => & 00011110 = 00010010 | |
236 | */ | |
237 | if (m5229_revision >= 0x20 && isa_dev) { | |
238 | pci_read_config_byte(isa_dev, 0x5e, &tmpbyte); | |
239 | chip_is_1543c_e = ((tmpbyte & 0x1e) == 0x12) ? 1: 0; | |
240 | } | |
b1489009 | 241 | goto out; |
1da177e4 LT |
242 | } |
243 | ||
244 | /* | |
245 | * 1543C-B?, 1535, 1535D, 1553 | |
246 | * Note 1: not all "motherboard" support this detection | |
247 | * Note 2: if no udma 66 device, the detection may "error". | |
248 | * but in this case, we will not set the device to | |
249 | * ultra 66, the detection result is not important | |
250 | */ | |
251 | ||
252 | /* | |
253 | * enable "Cable Detection", m5229, 0x4b, bit3 | |
254 | */ | |
255 | pci_read_config_byte(dev, 0x4b, &tmpbyte); | |
256 | pci_write_config_byte(dev, 0x4b, tmpbyte | 0x08); | |
257 | ||
258 | /* | |
259 | * We should only tune the 1533 enable if we are using an ALi | |
260 | * North bridge. We might have no north found on some zany | |
261 | * box without a device at 0:0.0. The ALi bridge will be at | |
262 | * 0:0.0 so if we didn't find one we know what is cooking. | |
263 | */ | |
b1489009 AC |
264 | if (north && north->vendor != PCI_VENDOR_ID_AL) |
265 | goto out; | |
1da177e4 LT |
266 | |
267 | if (m5229_revision < 0xC5 && isa_dev) | |
268 | { | |
269 | /* | |
270 | * set south-bridge's enable bit, m1533, 0x79 | |
271 | */ | |
272 | ||
273 | pci_read_config_byte(isa_dev, 0x79, &tmpbyte); | |
274 | if (m5229_revision == 0xC2) { | |
275 | /* | |
276 | * 1543C-B0 (m1533, 0x79, bit 2) | |
277 | */ | |
278 | pci_write_config_byte(isa_dev, 0x79, tmpbyte | 0x04); | |
279 | } else if (m5229_revision >= 0xC3) { | |
280 | /* | |
281 | * 1553/1535 (m1533, 0x79, bit 1) | |
282 | */ | |
283 | pci_write_config_byte(isa_dev, 0x79, tmpbyte | 0x02); | |
284 | } | |
285 | } | |
cad221aa | 286 | |
b1489009 | 287 | out: |
cad221aa BZ |
288 | /* |
289 | * CD_ROM DMA on (m5229, 0x53, bit0) | |
290 | * Enable this bit even if we want to use PIO. | |
291 | * PIO FIFO off (m5229, 0x53, bit1) | |
292 | * The hardware will use 0x54h and 0x55h to control PIO FIFO. | |
293 | * (Not on later devices it seems) | |
294 | * | |
295 | * 0x53 changes meaning on later revs - we must no touch | |
296 | * bit 1 on them. Need to check if 0x20 is the right break. | |
297 | */ | |
298 | if (m5229_revision >= 0x20) { | |
299 | pci_read_config_byte(dev, 0x53, &tmpbyte); | |
300 | ||
301 | if (m5229_revision <= 0x20) | |
302 | tmpbyte = (tmpbyte & (~0x02)) | 0x01; | |
303 | else if (m5229_revision == 0xc7 || m5229_revision == 0xc8) | |
304 | tmpbyte |= 0x03; | |
305 | else | |
306 | tmpbyte |= 0x01; | |
307 | ||
308 | pci_write_config_byte(dev, 0x53, tmpbyte); | |
309 | } | |
b1489009 AC |
310 | pci_dev_put(north); |
311 | pci_dev_put(isa_dev); | |
1da177e4 LT |
312 | local_irq_restore(flags); |
313 | return 0; | |
314 | } | |
315 | ||
95ba8c17 BZ |
316 | /* |
317 | * Cable special cases | |
318 | */ | |
319 | ||
1855256c | 320 | static const struct dmi_system_id cable_dmi_table[] = { |
95ba8c17 BZ |
321 | { |
322 | .ident = "HP Pavilion N5430", | |
323 | .matches = { | |
324 | DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"), | |
8663fd6d | 325 | DMI_MATCH(DMI_BOARD_VERSION, "OmniBook N32N-736"), |
95ba8c17 BZ |
326 | }, |
327 | }, | |
03e6f489 DE |
328 | { |
329 | .ident = "Toshiba Satellite S1800-814", | |
330 | .matches = { | |
331 | DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"), | |
332 | DMI_MATCH(DMI_PRODUCT_NAME, "S1800-814"), | |
333 | }, | |
334 | }, | |
95ba8c17 BZ |
335 | { } |
336 | }; | |
337 | ||
338 | static int ali_cable_override(struct pci_dev *pdev) | |
339 | { | |
340 | /* Fujitsu P2000 */ | |
341 | if (pdev->subsystem_vendor == 0x10CF && | |
342 | pdev->subsystem_device == 0x10AF) | |
343 | return 1; | |
344 | ||
d151456a BZ |
345 | /* Mitac 8317 (Winbook-A) and relatives */ |
346 | if (pdev->subsystem_vendor == 0x1071 && | |
347 | pdev->subsystem_device == 0x8317) | |
348 | return 1; | |
349 | ||
95ba8c17 BZ |
350 | /* Systems by DMI */ |
351 | if (dmi_check_system(cable_dmi_table)) | |
352 | return 1; | |
353 | ||
354 | return 0; | |
355 | } | |
356 | ||
1da177e4 | 357 | /** |
ac95beed | 358 | * ali_cable_detect - cable detection |
1da177e4 LT |
359 | * @hwif: IDE interface |
360 | * | |
361 | * This checks if the controller and the cable are capable | |
362 | * of UDMA66 transfers. It doesn't check the drives. | |
1da177e4 LT |
363 | */ |
364 | ||
f454cbe8 | 365 | static u8 ali_cable_detect(ide_hwif_t *hwif) |
1da177e4 | 366 | { |
36501650 | 367 | struct pci_dev *dev = to_pci_dev(hwif->dev); |
95ba8c17 | 368 | u8 cbl = ATA_CBL_PATA40, tmpbyte; |
1da177e4 | 369 | |
1da177e4 LT |
370 | if (m5229_revision >= 0xC2) { |
371 | /* | |
95ba8c17 BZ |
372 | * m5229 80-pin cable detection (from Host View) |
373 | * | |
374 | * 0x4a bit0 is 0 => primary channel has 80-pin | |
375 | * 0x4a bit1 is 0 => secondary channel has 80-pin | |
376 | * | |
377 | * Certain laptops use short but suitable cables | |
378 | * and don't implement the detect logic. | |
1da177e4 | 379 | */ |
95ba8c17 BZ |
380 | if (ali_cable_override(dev)) |
381 | cbl = ATA_CBL_PATA40_SHORT; | |
382 | else { | |
383 | pci_read_config_byte(dev, 0x4a, &tmpbyte); | |
384 | if ((tmpbyte & (1 << hwif->channel)) == 0) | |
385 | cbl = ATA_CBL_PATA80; | |
386 | } | |
1da177e4 LT |
387 | } |
388 | ||
95ba8c17 | 389 | return cbl; |
1da177e4 LT |
390 | } |
391 | ||
03682411 | 392 | #ifndef CONFIG_SPARC64 |
1da177e4 LT |
393 | /** |
394 | * init_hwif_ali15x3 - Initialize the ALI IDE x86 stuff | |
395 | * @hwif: interface to configure | |
396 | * | |
397 | * Obtain the IRQ tables for an ALi based IDE solution on the PC | |
398 | * class platforms. This part of the code isn't applicable to the | |
03682411 | 399 | * Sparc systems. |
1da177e4 LT |
400 | */ |
401 | ||
c2f12589 | 402 | static void __devinit init_hwif_ali15x3 (ide_hwif_t *hwif) |
1da177e4 LT |
403 | { |
404 | u8 ideic, inmir; | |
405 | s8 irq_routing_table[] = { -1, 9, 3, 10, 4, 5, 7, 6, | |
406 | 1, 11, 0, 12, 0, 14, 0, 15 }; | |
407 | int irq = -1; | |
408 | ||
1da177e4 LT |
409 | if (isa_dev) { |
410 | /* | |
411 | * read IDE interface control | |
412 | */ | |
413 | pci_read_config_byte(isa_dev, 0x58, &ideic); | |
414 | ||
415 | /* bit0, bit1 */ | |
416 | ideic = ideic & 0x03; | |
417 | ||
418 | /* get IRQ for IDE Controller */ | |
419 | if ((hwif->channel && ideic == 0x03) || | |
420 | (!hwif->channel && !ideic)) { | |
421 | /* | |
422 | * get SIRQ1 routing table | |
423 | */ | |
424 | pci_read_config_byte(isa_dev, 0x44, &inmir); | |
425 | inmir = inmir & 0x0f; | |
426 | irq = irq_routing_table[inmir]; | |
427 | } else if (hwif->channel && !(ideic & 0x01)) { | |
428 | /* | |
429 | * get SIRQ2 routing table | |
430 | */ | |
431 | pci_read_config_byte(isa_dev, 0x75, &inmir); | |
432 | inmir = inmir & 0x0f; | |
433 | irq = irq_routing_table[inmir]; | |
434 | } | |
435 | if(irq >= 0) | |
436 | hwif->irq = irq; | |
437 | } | |
1da177e4 | 438 | } |
6d1cee44 AV |
439 | #else |
440 | #define init_hwif_ali15x3 NULL | |
03682411 | 441 | #endif /* CONFIG_SPARC64 */ |
1da177e4 LT |
442 | |
443 | /** | |
444 | * init_dma_ali15x3 - set up DMA on ALi15x3 | |
445 | * @hwif: IDE interface | |
b123f56e | 446 | * @d: IDE port info |
1da177e4 | 447 | * |
b123f56e | 448 | * Set up the DMA functionality on the ALi 15x3. |
1da177e4 LT |
449 | */ |
450 | ||
b123f56e BZ |
451 | static int __devinit init_dma_ali15x3(ide_hwif_t *hwif, |
452 | const struct ide_port_info *d) | |
1da177e4 | 453 | { |
b123f56e BZ |
454 | struct pci_dev *dev = to_pci_dev(hwif->dev); |
455 | unsigned long base = ide_pci_dma_base(hwif, d); | |
456 | ||
ebb00fb5 BZ |
457 | if (base == 0) |
458 | return -1; | |
459 | ||
460 | hwif->dma_base = base; | |
461 | ||
462 | if (ide_pci_check_simplex(hwif, d) < 0) | |
463 | return -1; | |
464 | ||
465 | if (ide_pci_set_master(dev, d->name) < 0) | |
b123f56e BZ |
466 | return -1; |
467 | ||
0ecdca26 | 468 | if (!hwif->channel) |
b123f56e BZ |
469 | outb(inb(base + 2) & 0x60, base + 2); |
470 | ||
471 | printk(KERN_INFO " %s: BM-DMA at 0x%04lx-0x%04lx\n", | |
472 | hwif->name, base, base + 7); | |
473 | ||
474 | if (ide_allocate_dma_engine(hwif)) | |
475 | return -1; | |
476 | ||
b123f56e | 477 | return 0; |
1da177e4 LT |
478 | } |
479 | ||
ac95beed BZ |
480 | static const struct ide_port_ops ali_port_ops = { |
481 | .set_pio_mode = ali_set_pio_mode, | |
482 | .set_dma_mode = ali_set_dma_mode, | |
483 | .udma_filter = ali_udma_filter, | |
484 | .cable_detect = ali_cable_detect, | |
485 | }; | |
486 | ||
f37afdac BZ |
487 | static const struct ide_dma_ops ali_dma_ops = { |
488 | .dma_host_set = ide_dma_host_set, | |
8a4a5738 | 489 | .dma_setup = ide_dma_setup, |
f37afdac | 490 | .dma_start = ide_dma_start, |
653bcf52 | 491 | .dma_end = ide_dma_end, |
f37afdac BZ |
492 | .dma_test_irq = ide_dma_test_irq, |
493 | .dma_lost_irq = ide_dma_lost_irq, | |
8a4a5738 | 494 | .dma_check = ali_dma_check, |
22117d6e | 495 | .dma_timer_expiry = ide_dma_sff_timer_expiry, |
592b5315 | 496 | .dma_sff_read_status = ide_dma_sff_read_status, |
5e37bdc0 BZ |
497 | }; |
498 | ||
85620436 | 499 | static const struct ide_port_info ali15x3_chipset __devinitdata = { |
ced3ec8a | 500 | .name = DRV_NAME, |
1da177e4 LT |
501 | .init_chipset = init_chipset_ali15x3, |
502 | .init_hwif = init_hwif_ali15x3, | |
503 | .init_dma = init_dma_ali15x3, | |
ac95beed | 504 | .port_ops = &ali_port_ops, |
3f023b01 | 505 | .dma_ops = &sff_dma_ops, |
4099d143 | 506 | .pio_mask = ATA_PIO5, |
5f8b6c34 BZ |
507 | .swdma_mask = ATA_SWDMA2, |
508 | .mwdma_mask = ATA_MWDMA2, | |
1da177e4 LT |
509 | }; |
510 | ||
511 | /** | |
512 | * alim15x3_init_one - set up an ALi15x3 IDE controller | |
513 | * @dev: PCI device to set up | |
514 | * | |
515 | * Perform the actual set up for an ALi15x3 that has been found by the | |
516 | * hot plug layer. | |
517 | */ | |
518 | ||
519 | static int __devinit alim15x3_init_one(struct pci_dev *dev, const struct pci_device_id *id) | |
520 | { | |
039788e1 | 521 | struct ide_port_info d = ali15x3_chipset; |
8ac2b42a | 522 | u8 rev = dev->revision, idx = id->driver_data; |
1da177e4 | 523 | |
28328307 BZ |
524 | /* don't use LBA48 DMA on ALi devices before rev 0xC5 */ |
525 | if (rev <= 0xC4) | |
526 | d.host_flags |= IDE_HFLAG_NO_LBA48_DMA; | |
527 | ||
528 | if (rev >= 0x20) { | |
529 | if (rev == 0x20) | |
530 | d.host_flags |= IDE_HFLAG_NO_ATAPI_DMA; | |
531 | ||
532 | if (rev < 0xC2) | |
533 | d.udma_mask = ATA_UDMA2; | |
534 | else if (rev == 0xC2 || rev == 0xC3) | |
535 | d.udma_mask = ATA_UDMA4; | |
536 | else if (rev == 0xC4) | |
537 | d.udma_mask = ATA_UDMA5; | |
538 | else | |
539 | d.udma_mask = ATA_UDMA6; | |
5e37bdc0 BZ |
540 | |
541 | d.dma_ops = &ali_dma_ops; | |
6d36b95f BZ |
542 | } else { |
543 | d.host_flags |= IDE_HFLAG_NO_DMA; | |
544 | ||
545 | d.mwdma_mask = d.swdma_mask = 0; | |
28328307 BZ |
546 | } |
547 | ||
8ac2b42a BZ |
548 | if (idx == 0) |
549 | d.host_flags |= IDE_HFLAG_CLEAR_SIMPLEX; | |
550 | ||
6cdf6eb3 | 551 | return ide_pci_init_one(dev, &d, NULL); |
1da177e4 LT |
552 | } |
553 | ||
554 | ||
9cbcc5e3 BZ |
555 | static const struct pci_device_id alim15x3_pci_tbl[] = { |
556 | { PCI_VDEVICE(AL, PCI_DEVICE_ID_AL_M5229), 0 }, | |
8ac2b42a | 557 | { PCI_VDEVICE(AL, PCI_DEVICE_ID_AL_M5228), 1 }, |
1da177e4 LT |
558 | { 0, }, |
559 | }; | |
560 | MODULE_DEVICE_TABLE(pci, alim15x3_pci_tbl); | |
561 | ||
a9ab09e2 | 562 | static struct pci_driver alim15x3_pci_driver = { |
1da177e4 LT |
563 | .name = "ALI15x3_IDE", |
564 | .id_table = alim15x3_pci_tbl, | |
565 | .probe = alim15x3_init_one, | |
8ee3f3b6 | 566 | .remove = ide_pci_remove, |
feb22b7f BZ |
567 | .suspend = ide_pci_suspend, |
568 | .resume = ide_pci_resume, | |
1da177e4 LT |
569 | }; |
570 | ||
82ab1eec | 571 | static int __init ali15x3_ide_init(void) |
1da177e4 | 572 | { |
a9ab09e2 | 573 | return ide_pci_register_driver(&alim15x3_pci_driver); |
1da177e4 LT |
574 | } |
575 | ||
8ee3f3b6 BZ |
576 | static void __exit ali15x3_ide_exit(void) |
577 | { | |
95964018 | 578 | pci_unregister_driver(&alim15x3_pci_driver); |
8ee3f3b6 BZ |
579 | } |
580 | ||
1da177e4 | 581 | module_init(ali15x3_ide_init); |
8ee3f3b6 | 582 | module_exit(ali15x3_ide_exit); |
1da177e4 | 583 | |
3c8cc8df | 584 | MODULE_AUTHOR("Michael Aubry, Andrzej Krzysztofowicz, CJ, Andre Hedrick, Alan Cox, Bartlomiej Zolnierkiewicz"); |
1da177e4 LT |
585 | MODULE_DESCRIPTION("PCI driver module for ALi 15x3 IDE"); |
586 | MODULE_LICENSE("GPL"); |