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1da177e4 LT |
1 | /* |
2 | * Copyright (c) 2004, 2005 Topspin Communications. All rights reserved. | |
cd4e8fb4 | 3 | * Copyright (c) 2005 Sun Microsystems, Inc. All rights reserved. |
2a1d9b7f | 4 | * Copyright (c) 2005 Mellanox Technologies. All rights reserved. |
1da177e4 LT |
5 | * |
6 | * This software is available to you under a choice of one of two | |
7 | * licenses. You may choose to be licensed under the terms of the GNU | |
8 | * General Public License (GPL) Version 2, available from the file | |
9 | * COPYING in the main directory of this source tree, or the | |
10 | * OpenIB.org BSD license below: | |
11 | * | |
12 | * Redistribution and use in source and binary forms, with or | |
13 | * without modification, are permitted provided that the following | |
14 | * conditions are met: | |
15 | * | |
16 | * - Redistributions of source code must retain the above | |
17 | * copyright notice, this list of conditions and the following | |
18 | * disclaimer. | |
19 | * | |
20 | * - Redistributions in binary form must reproduce the above | |
21 | * copyright notice, this list of conditions and the following | |
22 | * disclaimer in the documentation and/or other materials | |
23 | * provided with the distribution. | |
24 | * | |
25 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, | |
26 | * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF | |
27 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND | |
28 | * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS | |
29 | * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN | |
30 | * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN | |
31 | * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE | |
32 | * SOFTWARE. | |
33 | * | |
34 | * $Id: mthca_main.c 1396 2004-12-28 04:10:27Z roland $ | |
35 | */ | |
36 | ||
37 | #include <linux/config.h> | |
1da177e4 LT |
38 | #include <linux/module.h> |
39 | #include <linux/init.h> | |
40 | #include <linux/errno.h> | |
41 | #include <linux/pci.h> | |
42 | #include <linux/interrupt.h> | |
43 | ||
44 | #include "mthca_dev.h" | |
45 | #include "mthca_config_reg.h" | |
46 | #include "mthca_cmd.h" | |
47 | #include "mthca_profile.h" | |
48 | #include "mthca_memfree.h" | |
49 | ||
50 | MODULE_AUTHOR("Roland Dreier"); | |
51 | MODULE_DESCRIPTION("Mellanox InfiniBand HCA low-level driver"); | |
52 | MODULE_LICENSE("Dual BSD/GPL"); | |
53 | MODULE_VERSION(DRV_VERSION); | |
54 | ||
55 | #ifdef CONFIG_PCI_MSI | |
56 | ||
57 | static int msi_x = 0; | |
58 | module_param(msi_x, int, 0444); | |
59 | MODULE_PARM_DESC(msi_x, "attempt to use MSI-X if nonzero"); | |
60 | ||
61 | static int msi = 0; | |
62 | module_param(msi, int, 0444); | |
63 | MODULE_PARM_DESC(msi, "attempt to use MSI if nonzero"); | |
64 | ||
65 | #else /* CONFIG_PCI_MSI */ | |
66 | ||
67 | #define msi_x (0) | |
68 | #define msi (0) | |
69 | ||
70 | #endif /* CONFIG_PCI_MSI */ | |
71 | ||
72 | static const char mthca_version[] __devinitdata = | |
177214af | 73 | DRV_NAME ": Mellanox InfiniBand HCA driver v" |
1da177e4 LT |
74 | DRV_VERSION " (" DRV_RELDATE ")\n"; |
75 | ||
76 | static struct mthca_profile default_profile = { | |
e0f5fdca MT |
77 | .num_qp = 1 << 16, |
78 | .rdb_per_qp = 4, | |
79 | .num_cq = 1 << 16, | |
80 | .num_mcg = 1 << 13, | |
81 | .num_mpt = 1 << 17, | |
82 | .num_mtt = 1 << 20, | |
83 | .num_udav = 1 << 15, /* Tavor only */ | |
84 | .fmr_reserved_mtts = 1 << 18, /* Tavor only */ | |
85 | .uarc_size = 1 << 18, /* Arbel only */ | |
1da177e4 LT |
86 | }; |
87 | ||
88 | static int __devinit mthca_tune_pci(struct mthca_dev *mdev) | |
89 | { | |
90 | int cap; | |
91 | u16 val; | |
92 | ||
93 | /* First try to max out Read Byte Count */ | |
94 | cap = pci_find_capability(mdev->pdev, PCI_CAP_ID_PCIX); | |
95 | if (cap) { | |
96 | if (pci_read_config_word(mdev->pdev, cap + PCI_X_CMD, &val)) { | |
97 | mthca_err(mdev, "Couldn't read PCI-X command register, " | |
98 | "aborting.\n"); | |
99 | return -ENODEV; | |
100 | } | |
101 | val = (val & ~PCI_X_CMD_MAX_READ) | (3 << 2); | |
102 | if (pci_write_config_word(mdev->pdev, cap + PCI_X_CMD, val)) { | |
103 | mthca_err(mdev, "Couldn't write PCI-X command register, " | |
104 | "aborting.\n"); | |
105 | return -ENODEV; | |
106 | } | |
68a3c212 | 107 | } else if (!(mdev->mthca_flags & MTHCA_FLAG_PCIE)) |
1da177e4 LT |
108 | mthca_info(mdev, "No PCI-X capability, not setting RBC.\n"); |
109 | ||
110 | cap = pci_find_capability(mdev->pdev, PCI_CAP_ID_EXP); | |
111 | if (cap) { | |
112 | if (pci_read_config_word(mdev->pdev, cap + PCI_EXP_DEVCTL, &val)) { | |
113 | mthca_err(mdev, "Couldn't read PCI Express device control " | |
114 | "register, aborting.\n"); | |
115 | return -ENODEV; | |
116 | } | |
117 | val = (val & ~PCI_EXP_DEVCTL_READRQ) | (5 << 12); | |
118 | if (pci_write_config_word(mdev->pdev, cap + PCI_EXP_DEVCTL, val)) { | |
119 | mthca_err(mdev, "Couldn't write PCI Express device control " | |
120 | "register, aborting.\n"); | |
121 | return -ENODEV; | |
122 | } | |
68a3c212 | 123 | } else if (mdev->mthca_flags & MTHCA_FLAG_PCIE) |
1da177e4 LT |
124 | mthca_info(mdev, "No PCI Express capability, " |
125 | "not setting Max Read Request Size.\n"); | |
126 | ||
127 | return 0; | |
128 | } | |
129 | ||
130 | static int __devinit mthca_dev_lim(struct mthca_dev *mdev, struct mthca_dev_lim *dev_lim) | |
131 | { | |
132 | int err; | |
133 | u8 status; | |
134 | ||
135 | err = mthca_QUERY_DEV_LIM(mdev, dev_lim, &status); | |
136 | if (err) { | |
137 | mthca_err(mdev, "QUERY_DEV_LIM command failed, aborting.\n"); | |
138 | return err; | |
139 | } | |
140 | if (status) { | |
141 | mthca_err(mdev, "QUERY_DEV_LIM returned status 0x%02x, " | |
142 | "aborting.\n", status); | |
143 | return -EINVAL; | |
144 | } | |
145 | if (dev_lim->min_page_sz > PAGE_SIZE) { | |
146 | mthca_err(mdev, "HCA minimum page size of %d bigger than " | |
147 | "kernel PAGE_SIZE of %ld, aborting.\n", | |
148 | dev_lim->min_page_sz, PAGE_SIZE); | |
149 | return -ENODEV; | |
150 | } | |
151 | if (dev_lim->num_ports > MTHCA_MAX_PORTS) { | |
152 | mthca_err(mdev, "HCA has %d ports, but we only support %d, " | |
153 | "aborting.\n", | |
154 | dev_lim->num_ports, MTHCA_MAX_PORTS); | |
155 | return -ENODEV; | |
156 | } | |
157 | ||
cbd2981a MT |
158 | if (dev_lim->uar_size > pci_resource_len(mdev->pdev, 2)) { |
159 | mthca_err(mdev, "HCA reported UAR size of 0x%x bigger than " | |
160 | "PCI resource 2 size of 0x%lx, aborting.\n", | |
161 | dev_lim->uar_size, pci_resource_len(mdev->pdev, 2)); | |
162 | return -ENODEV; | |
163 | } | |
164 | ||
1da177e4 LT |
165 | mdev->limits.num_ports = dev_lim->num_ports; |
166 | mdev->limits.vl_cap = dev_lim->max_vl; | |
167 | mdev->limits.mtu_cap = dev_lim->max_mtu; | |
168 | mdev->limits.gid_table_len = dev_lim->max_gids; | |
169 | mdev->limits.pkey_table_len = dev_lim->max_pkeys; | |
170 | mdev->limits.local_ca_ack_delay = dev_lim->local_ca_ack_delay; | |
171 | mdev->limits.max_sg = dev_lim->max_sg; | |
efaae8f7 JM |
172 | mdev->limits.max_wqes = dev_lim->max_qp_sz; |
173 | mdev->limits.max_qp_init_rdma = dev_lim->max_requester_per_qp; | |
1da177e4 | 174 | mdev->limits.reserved_qps = dev_lim->reserved_qps; |
efaae8f7 | 175 | mdev->limits.max_srq_wqes = dev_lim->max_srq_sz; |
1da177e4 LT |
176 | mdev->limits.reserved_srqs = dev_lim->reserved_srqs; |
177 | mdev->limits.reserved_eecs = dev_lim->reserved_eecs; | |
77369ed3 | 178 | mdev->limits.max_desc_sz = dev_lim->max_desc_sz; |
efaae8f7 JM |
179 | /* |
180 | * Subtract 1 from the limit because we need to allocate a | |
181 | * spare CQE so the HCA HW can tell the difference between an | |
182 | * empty CQ and a full CQ. | |
183 | */ | |
184 | mdev->limits.max_cqes = dev_lim->max_cq_sz - 1; | |
1da177e4 LT |
185 | mdev->limits.reserved_cqs = dev_lim->reserved_cqs; |
186 | mdev->limits.reserved_eqs = dev_lim->reserved_eqs; | |
187 | mdev->limits.reserved_mtts = dev_lim->reserved_mtts; | |
188 | mdev->limits.reserved_mrws = dev_lim->reserved_mrws; | |
189 | mdev->limits.reserved_uars = dev_lim->reserved_uars; | |
190 | mdev->limits.reserved_pds = dev_lim->reserved_pds; | |
da6561c2 | 191 | mdev->limits.port_width_cap = dev_lim->max_port_width; |
0f69ce1e | 192 | mdev->limits.page_size_cap = ~(u32) (dev_lim->min_page_sz - 1); |
33033b79 | 193 | mdev->limits.flags = dev_lim->flags; |
1da177e4 LT |
194 | |
195 | /* IB_DEVICE_RESIZE_MAX_WR not supported by driver. | |
196 | May be doable since hardware supports it for SRQ. | |
197 | ||
198 | IB_DEVICE_N_NOTIFY_CQ is supported by hardware but not by driver. | |
199 | ||
200 | IB_DEVICE_SRQ_RESIZE is supported by hardware but SRQ is not | |
201 | supported by driver. */ | |
202 | mdev->device_cap_flags = IB_DEVICE_CHANGE_PHY_PORT | | |
203 | IB_DEVICE_PORT_ACTIVE_EVENT | | |
204 | IB_DEVICE_SYS_IMAGE_GUID | | |
205 | IB_DEVICE_RC_RNR_NAK_GEN; | |
206 | ||
207 | if (dev_lim->flags & DEV_LIM_FLAG_BAD_PKEY_CNTR) | |
208 | mdev->device_cap_flags |= IB_DEVICE_BAD_PKEY_CNTR; | |
209 | ||
210 | if (dev_lim->flags & DEV_LIM_FLAG_BAD_QKEY_CNTR) | |
211 | mdev->device_cap_flags |= IB_DEVICE_BAD_QKEY_CNTR; | |
212 | ||
213 | if (dev_lim->flags & DEV_LIM_FLAG_RAW_MULTI) | |
214 | mdev->device_cap_flags |= IB_DEVICE_RAW_MULTI; | |
215 | ||
216 | if (dev_lim->flags & DEV_LIM_FLAG_AUTO_PATH_MIG) | |
217 | mdev->device_cap_flags |= IB_DEVICE_AUTO_PATH_MIG; | |
218 | ||
219 | if (dev_lim->flags & DEV_LIM_FLAG_UD_AV_PORT_ENFORCE) | |
220 | mdev->device_cap_flags |= IB_DEVICE_UD_AV_PORT_ENFORCE; | |
221 | ||
222 | if (dev_lim->flags & DEV_LIM_FLAG_SRQ) | |
223 | mdev->mthca_flags |= MTHCA_FLAG_SRQ; | |
224 | ||
225 | return 0; | |
226 | } | |
227 | ||
228 | static int __devinit mthca_init_tavor(struct mthca_dev *mdev) | |
229 | { | |
230 | u8 status; | |
231 | int err; | |
232 | struct mthca_dev_lim dev_lim; | |
233 | struct mthca_profile profile; | |
234 | struct mthca_init_hca_param init_hca; | |
1da177e4 LT |
235 | |
236 | err = mthca_SYS_EN(mdev, &status); | |
237 | if (err) { | |
238 | mthca_err(mdev, "SYS_EN command failed, aborting.\n"); | |
239 | return err; | |
240 | } | |
241 | if (status) { | |
242 | mthca_err(mdev, "SYS_EN returned status 0x%02x, " | |
243 | "aborting.\n", status); | |
244 | return -EINVAL; | |
245 | } | |
246 | ||
247 | err = mthca_QUERY_FW(mdev, &status); | |
248 | if (err) { | |
249 | mthca_err(mdev, "QUERY_FW command failed, aborting.\n"); | |
250 | goto err_disable; | |
251 | } | |
252 | if (status) { | |
253 | mthca_err(mdev, "QUERY_FW returned status 0x%02x, " | |
254 | "aborting.\n", status); | |
255 | err = -EINVAL; | |
256 | goto err_disable; | |
257 | } | |
258 | err = mthca_QUERY_DDR(mdev, &status); | |
259 | if (err) { | |
260 | mthca_err(mdev, "QUERY_DDR command failed, aborting.\n"); | |
261 | goto err_disable; | |
262 | } | |
263 | if (status) { | |
264 | mthca_err(mdev, "QUERY_DDR returned status 0x%02x, " | |
265 | "aborting.\n", status); | |
266 | err = -EINVAL; | |
267 | goto err_disable; | |
268 | } | |
269 | ||
270 | err = mthca_dev_lim(mdev, &dev_lim); | |
aa2f9367 JM |
271 | if (err) { |
272 | mthca_err(mdev, "QUERY_DEV_LIM command failed, aborting.\n"); | |
273 | goto err_disable; | |
274 | } | |
1da177e4 LT |
275 | |
276 | profile = default_profile; | |
277 | profile.num_uar = dev_lim.uar_size / PAGE_SIZE; | |
278 | profile.uarc_size = 0; | |
ec34a922 RD |
279 | if (mdev->mthca_flags & MTHCA_FLAG_SRQ) |
280 | profile.num_srq = dev_lim.max_srqs; | |
1da177e4 LT |
281 | |
282 | err = mthca_make_profile(mdev, &profile, &dev_lim, &init_hca); | |
283 | if (err < 0) | |
284 | goto err_disable; | |
285 | ||
286 | err = mthca_INIT_HCA(mdev, &init_hca, &status); | |
287 | if (err) { | |
288 | mthca_err(mdev, "INIT_HCA command failed, aborting.\n"); | |
289 | goto err_disable; | |
290 | } | |
291 | if (status) { | |
292 | mthca_err(mdev, "INIT_HCA returned status 0x%02x, " | |
293 | "aborting.\n", status); | |
294 | err = -EINVAL; | |
295 | goto err_disable; | |
296 | } | |
297 | ||
1da177e4 LT |
298 | return 0; |
299 | ||
1da177e4 LT |
300 | err_disable: |
301 | mthca_SYS_DIS(mdev, &status); | |
302 | ||
303 | return err; | |
304 | } | |
305 | ||
306 | static int __devinit mthca_load_fw(struct mthca_dev *mdev) | |
307 | { | |
308 | u8 status; | |
309 | int err; | |
310 | ||
311 | /* FIXME: use HCA-attached memory for FW if present */ | |
312 | ||
313 | mdev->fw.arbel.fw_icm = | |
314 | mthca_alloc_icm(mdev, mdev->fw.arbel.fw_pages, | |
315 | GFP_HIGHUSER | __GFP_NOWARN); | |
316 | if (!mdev->fw.arbel.fw_icm) { | |
317 | mthca_err(mdev, "Couldn't allocate FW area, aborting.\n"); | |
318 | return -ENOMEM; | |
319 | } | |
320 | ||
321 | err = mthca_MAP_FA(mdev, mdev->fw.arbel.fw_icm, &status); | |
322 | if (err) { | |
323 | mthca_err(mdev, "MAP_FA command failed, aborting.\n"); | |
324 | goto err_free; | |
325 | } | |
326 | if (status) { | |
327 | mthca_err(mdev, "MAP_FA returned status 0x%02x, aborting.\n", status); | |
328 | err = -EINVAL; | |
329 | goto err_free; | |
330 | } | |
331 | err = mthca_RUN_FW(mdev, &status); | |
332 | if (err) { | |
333 | mthca_err(mdev, "RUN_FW command failed, aborting.\n"); | |
334 | goto err_unmap_fa; | |
335 | } | |
336 | if (status) { | |
337 | mthca_err(mdev, "RUN_FW returned status 0x%02x, aborting.\n", status); | |
338 | err = -EINVAL; | |
339 | goto err_unmap_fa; | |
340 | } | |
341 | ||
342 | return 0; | |
343 | ||
344 | err_unmap_fa: | |
345 | mthca_UNMAP_FA(mdev, &status); | |
346 | ||
347 | err_free: | |
348 | mthca_free_icm(mdev, mdev->fw.arbel.fw_icm); | |
349 | return err; | |
350 | } | |
351 | ||
352 | static int __devinit mthca_init_icm(struct mthca_dev *mdev, | |
353 | struct mthca_dev_lim *dev_lim, | |
354 | struct mthca_init_hca_param *init_hca, | |
355 | u64 icm_size) | |
356 | { | |
357 | u64 aux_pages; | |
358 | u8 status; | |
359 | int err; | |
360 | ||
361 | err = mthca_SET_ICM_SIZE(mdev, icm_size, &aux_pages, &status); | |
362 | if (err) { | |
363 | mthca_err(mdev, "SET_ICM_SIZE command failed, aborting.\n"); | |
364 | return err; | |
365 | } | |
366 | if (status) { | |
367 | mthca_err(mdev, "SET_ICM_SIZE returned status 0x%02x, " | |
368 | "aborting.\n", status); | |
369 | return -EINVAL; | |
370 | } | |
371 | ||
372 | mthca_dbg(mdev, "%lld KB of HCA context requires %lld KB aux memory.\n", | |
373 | (unsigned long long) icm_size >> 10, | |
374 | (unsigned long long) aux_pages << 2); | |
375 | ||
376 | mdev->fw.arbel.aux_icm = mthca_alloc_icm(mdev, aux_pages, | |
377 | GFP_HIGHUSER | __GFP_NOWARN); | |
378 | if (!mdev->fw.arbel.aux_icm) { | |
379 | mthca_err(mdev, "Couldn't allocate aux memory, aborting.\n"); | |
380 | return -ENOMEM; | |
381 | } | |
382 | ||
383 | err = mthca_MAP_ICM_AUX(mdev, mdev->fw.arbel.aux_icm, &status); | |
384 | if (err) { | |
385 | mthca_err(mdev, "MAP_ICM_AUX command failed, aborting.\n"); | |
386 | goto err_free_aux; | |
387 | } | |
388 | if (status) { | |
389 | mthca_err(mdev, "MAP_ICM_AUX returned status 0x%02x, aborting.\n", status); | |
390 | err = -EINVAL; | |
391 | goto err_free_aux; | |
392 | } | |
393 | ||
394 | err = mthca_map_eq_icm(mdev, init_hca->eqc_base); | |
395 | if (err) { | |
396 | mthca_err(mdev, "Failed to map EQ context memory, aborting.\n"); | |
397 | goto err_unmap_aux; | |
398 | } | |
399 | ||
400 | mdev->mr_table.mtt_table = mthca_alloc_icm_table(mdev, init_hca->mtt_base, | |
44ea6687 | 401 | MTHCA_MTT_SEG_SIZE, |
1da177e4 LT |
402 | mdev->limits.num_mtt_segs, |
403 | mdev->limits.reserved_mtts, 1); | |
404 | if (!mdev->mr_table.mtt_table) { | |
405 | mthca_err(mdev, "Failed to map MTT context memory, aborting.\n"); | |
406 | err = -ENOMEM; | |
407 | goto err_unmap_eq; | |
408 | } | |
409 | ||
410 | mdev->mr_table.mpt_table = mthca_alloc_icm_table(mdev, init_hca->mpt_base, | |
411 | dev_lim->mpt_entry_sz, | |
412 | mdev->limits.num_mpts, | |
413 | mdev->limits.reserved_mrws, 1); | |
414 | if (!mdev->mr_table.mpt_table) { | |
415 | mthca_err(mdev, "Failed to map MPT context memory, aborting.\n"); | |
416 | err = -ENOMEM; | |
417 | goto err_unmap_mtt; | |
418 | } | |
419 | ||
420 | mdev->qp_table.qp_table = mthca_alloc_icm_table(mdev, init_hca->qpc_base, | |
421 | dev_lim->qpc_entry_sz, | |
422 | mdev->limits.num_qps, | |
423 | mdev->limits.reserved_qps, 0); | |
424 | if (!mdev->qp_table.qp_table) { | |
425 | mthca_err(mdev, "Failed to map QP context memory, aborting.\n"); | |
426 | err = -ENOMEM; | |
427 | goto err_unmap_mpt; | |
428 | } | |
429 | ||
430 | mdev->qp_table.eqp_table = mthca_alloc_icm_table(mdev, init_hca->eqpc_base, | |
431 | dev_lim->eqpc_entry_sz, | |
432 | mdev->limits.num_qps, | |
433 | mdev->limits.reserved_qps, 0); | |
434 | if (!mdev->qp_table.eqp_table) { | |
435 | mthca_err(mdev, "Failed to map EQP context memory, aborting.\n"); | |
436 | err = -ENOMEM; | |
437 | goto err_unmap_qp; | |
438 | } | |
439 | ||
08aeb14e RD |
440 | mdev->qp_table.rdb_table = mthca_alloc_icm_table(mdev, init_hca->rdb_base, |
441 | MTHCA_RDB_ENTRY_SIZE, | |
442 | mdev->limits.num_qps << | |
443 | mdev->qp_table.rdb_shift, | |
444 | 0, 0); | |
445 | if (!mdev->qp_table.rdb_table) { | |
446 | mthca_err(mdev, "Failed to map RDB context memory, aborting\n"); | |
447 | err = -ENOMEM; | |
19272d43 | 448 | goto err_unmap_eqp; |
08aeb14e RD |
449 | } |
450 | ||
451 | mdev->cq_table.table = mthca_alloc_icm_table(mdev, init_hca->cqc_base, | |
ec34a922 RD |
452 | dev_lim->cqc_entry_sz, |
453 | mdev->limits.num_cqs, | |
454 | mdev->limits.reserved_cqs, 0); | |
1da177e4 LT |
455 | if (!mdev->cq_table.table) { |
456 | mthca_err(mdev, "Failed to map CQ context memory, aborting.\n"); | |
457 | err = -ENOMEM; | |
08aeb14e | 458 | goto err_unmap_rdb; |
1da177e4 LT |
459 | } |
460 | ||
ec34a922 RD |
461 | if (mdev->mthca_flags & MTHCA_FLAG_SRQ) { |
462 | mdev->srq_table.table = | |
463 | mthca_alloc_icm_table(mdev, init_hca->srqc_base, | |
464 | dev_lim->srq_entry_sz, | |
465 | mdev->limits.num_srqs, | |
466 | mdev->limits.reserved_srqs, 0); | |
467 | if (!mdev->srq_table.table) { | |
468 | mthca_err(mdev, "Failed to map SRQ context memory, " | |
469 | "aborting.\n"); | |
470 | err = -ENOMEM; | |
471 | goto err_unmap_cq; | |
472 | } | |
473 | } | |
474 | ||
1da177e4 LT |
475 | /* |
476 | * It's not strictly required, but for simplicity just map the | |
477 | * whole multicast group table now. The table isn't very big | |
478 | * and it's a lot easier than trying to track ref counts. | |
479 | */ | |
480 | mdev->mcg_table.table = mthca_alloc_icm_table(mdev, init_hca->mc_base, | |
481 | MTHCA_MGM_ENTRY_SIZE, | |
482 | mdev->limits.num_mgms + | |
483 | mdev->limits.num_amgms, | |
484 | mdev->limits.num_mgms + | |
485 | mdev->limits.num_amgms, | |
486 | 0); | |
487 | if (!mdev->mcg_table.table) { | |
488 | mthca_err(mdev, "Failed to map MCG context memory, aborting.\n"); | |
489 | err = -ENOMEM; | |
ec34a922 | 490 | goto err_unmap_srq; |
1da177e4 LT |
491 | } |
492 | ||
493 | return 0; | |
494 | ||
ec34a922 RD |
495 | err_unmap_srq: |
496 | if (mdev->mthca_flags & MTHCA_FLAG_SRQ) | |
497 | mthca_free_icm_table(mdev, mdev->srq_table.table); | |
498 | ||
1da177e4 LT |
499 | err_unmap_cq: |
500 | mthca_free_icm_table(mdev, mdev->cq_table.table); | |
501 | ||
08aeb14e RD |
502 | err_unmap_rdb: |
503 | mthca_free_icm_table(mdev, mdev->qp_table.rdb_table); | |
504 | ||
1da177e4 LT |
505 | err_unmap_eqp: |
506 | mthca_free_icm_table(mdev, mdev->qp_table.eqp_table); | |
507 | ||
508 | err_unmap_qp: | |
509 | mthca_free_icm_table(mdev, mdev->qp_table.qp_table); | |
510 | ||
511 | err_unmap_mpt: | |
512 | mthca_free_icm_table(mdev, mdev->mr_table.mpt_table); | |
513 | ||
514 | err_unmap_mtt: | |
515 | mthca_free_icm_table(mdev, mdev->mr_table.mtt_table); | |
516 | ||
517 | err_unmap_eq: | |
518 | mthca_unmap_eq_icm(mdev); | |
519 | ||
520 | err_unmap_aux: | |
521 | mthca_UNMAP_ICM_AUX(mdev, &status); | |
522 | ||
523 | err_free_aux: | |
524 | mthca_free_icm(mdev, mdev->fw.arbel.aux_icm); | |
525 | ||
526 | return err; | |
527 | } | |
528 | ||
aba7a22f MT |
529 | static void mthca_free_icms(struct mthca_dev *mdev) |
530 | { | |
531 | u8 status; | |
532 | ||
533 | mthca_free_icm_table(mdev, mdev->mcg_table.table); | |
534 | if (mdev->mthca_flags & MTHCA_FLAG_SRQ) | |
535 | mthca_free_icm_table(mdev, mdev->srq_table.table); | |
536 | mthca_free_icm_table(mdev, mdev->cq_table.table); | |
537 | mthca_free_icm_table(mdev, mdev->qp_table.rdb_table); | |
538 | mthca_free_icm_table(mdev, mdev->qp_table.eqp_table); | |
539 | mthca_free_icm_table(mdev, mdev->qp_table.qp_table); | |
540 | mthca_free_icm_table(mdev, mdev->mr_table.mpt_table); | |
541 | mthca_free_icm_table(mdev, mdev->mr_table.mtt_table); | |
542 | mthca_unmap_eq_icm(mdev); | |
543 | ||
544 | mthca_UNMAP_ICM_AUX(mdev, &status); | |
545 | mthca_free_icm(mdev, mdev->fw.arbel.aux_icm); | |
546 | } | |
547 | ||
1da177e4 LT |
548 | static int __devinit mthca_init_arbel(struct mthca_dev *mdev) |
549 | { | |
550 | struct mthca_dev_lim dev_lim; | |
551 | struct mthca_profile profile; | |
552 | struct mthca_init_hca_param init_hca; | |
1da177e4 LT |
553 | u64 icm_size; |
554 | u8 status; | |
555 | int err; | |
556 | ||
557 | err = mthca_QUERY_FW(mdev, &status); | |
558 | if (err) { | |
559 | mthca_err(mdev, "QUERY_FW command failed, aborting.\n"); | |
560 | return err; | |
561 | } | |
562 | if (status) { | |
563 | mthca_err(mdev, "QUERY_FW returned status 0x%02x, " | |
564 | "aborting.\n", status); | |
565 | return -EINVAL; | |
566 | } | |
567 | ||
568 | err = mthca_ENABLE_LAM(mdev, &status); | |
569 | if (err) { | |
570 | mthca_err(mdev, "ENABLE_LAM command failed, aborting.\n"); | |
571 | return err; | |
572 | } | |
573 | if (status == MTHCA_CMD_STAT_LAM_NOT_PRE) { | |
574 | mthca_dbg(mdev, "No HCA-attached memory (running in MemFree mode)\n"); | |
575 | mdev->mthca_flags |= MTHCA_FLAG_NO_LAM; | |
576 | } else if (status) { | |
577 | mthca_err(mdev, "ENABLE_LAM returned status 0x%02x, " | |
578 | "aborting.\n", status); | |
579 | return -EINVAL; | |
580 | } | |
581 | ||
582 | err = mthca_load_fw(mdev); | |
583 | if (err) { | |
584 | mthca_err(mdev, "Failed to start FW, aborting.\n"); | |
585 | goto err_disable; | |
586 | } | |
587 | ||
588 | err = mthca_dev_lim(mdev, &dev_lim); | |
589 | if (err) { | |
590 | mthca_err(mdev, "QUERY_DEV_LIM command failed, aborting.\n"); | |
591 | goto err_stop_fw; | |
592 | } | |
593 | ||
594 | profile = default_profile; | |
595 | profile.num_uar = dev_lim.uar_size / PAGE_SIZE; | |
596 | profile.num_udav = 0; | |
ec34a922 RD |
597 | if (mdev->mthca_flags & MTHCA_FLAG_SRQ) |
598 | profile.num_srq = dev_lim.max_srqs; | |
1da177e4 LT |
599 | |
600 | icm_size = mthca_make_profile(mdev, &profile, &dev_lim, &init_hca); | |
601 | if ((int) icm_size < 0) { | |
602 | err = icm_size; | |
603 | goto err_stop_fw; | |
604 | } | |
605 | ||
606 | err = mthca_init_icm(mdev, &dev_lim, &init_hca, icm_size); | |
607 | if (err) | |
608 | goto err_stop_fw; | |
609 | ||
610 | err = mthca_INIT_HCA(mdev, &init_hca, &status); | |
611 | if (err) { | |
612 | mthca_err(mdev, "INIT_HCA command failed, aborting.\n"); | |
613 | goto err_free_icm; | |
614 | } | |
615 | if (status) { | |
616 | mthca_err(mdev, "INIT_HCA returned status 0x%02x, " | |
617 | "aborting.\n", status); | |
618 | err = -EINVAL; | |
619 | goto err_free_icm; | |
620 | } | |
621 | ||
1da177e4 LT |
622 | return 0; |
623 | ||
624 | err_free_icm: | |
aba7a22f | 625 | mthca_free_icms(mdev); |
1da177e4 LT |
626 | |
627 | err_stop_fw: | |
628 | mthca_UNMAP_FA(mdev, &status); | |
629 | mthca_free_icm(mdev, mdev->fw.arbel.fw_icm); | |
630 | ||
631 | err_disable: | |
632 | if (!(mdev->mthca_flags & MTHCA_FLAG_NO_LAM)) | |
633 | mthca_DISABLE_LAM(mdev, &status); | |
634 | ||
635 | return err; | |
636 | } | |
637 | ||
2e8b981c MT |
638 | static void mthca_close_hca(struct mthca_dev *mdev) |
639 | { | |
640 | u8 status; | |
641 | ||
642 | mthca_CLOSE_HCA(mdev, 0, &status); | |
643 | ||
644 | if (mthca_is_memfree(mdev)) { | |
aba7a22f | 645 | mthca_free_icms(mdev); |
2e8b981c MT |
646 | |
647 | mthca_UNMAP_FA(mdev, &status); | |
648 | mthca_free_icm(mdev, mdev->fw.arbel.fw_icm); | |
649 | ||
650 | if (!(mdev->mthca_flags & MTHCA_FLAG_NO_LAM)) | |
651 | mthca_DISABLE_LAM(mdev, &status); | |
652 | } else | |
653 | mthca_SYS_DIS(mdev, &status); | |
654 | } | |
655 | ||
1da177e4 LT |
656 | static int __devinit mthca_init_hca(struct mthca_dev *mdev) |
657 | { | |
2e8b981c MT |
658 | u8 status; |
659 | int err; | |
660 | struct mthca_adapter adapter; | |
661 | ||
d10ddbf6 | 662 | if (mthca_is_memfree(mdev)) |
2e8b981c | 663 | err = mthca_init_arbel(mdev); |
1da177e4 | 664 | else |
2e8b981c MT |
665 | err = mthca_init_tavor(mdev); |
666 | ||
667 | if (err) | |
668 | return err; | |
669 | ||
670 | err = mthca_QUERY_ADAPTER(mdev, &adapter, &status); | |
671 | if (err) { | |
672 | mthca_err(mdev, "QUERY_ADAPTER command failed, aborting.\n"); | |
673 | goto err_close; | |
674 | } | |
675 | if (status) { | |
676 | mthca_err(mdev, "QUERY_ADAPTER returned status 0x%02x, " | |
677 | "aborting.\n", status); | |
678 | err = -EINVAL; | |
679 | goto err_close; | |
680 | } | |
681 | ||
682 | mdev->eq_table.inta_pin = adapter.inta_pin; | |
683 | mdev->rev_id = adapter.revision_id; | |
684 | memcpy(mdev->board_id, adapter.board_id, sizeof mdev->board_id); | |
685 | ||
686 | return 0; | |
687 | ||
688 | err_close: | |
689 | mthca_close_hca(mdev); | |
690 | return err; | |
1da177e4 LT |
691 | } |
692 | ||
693 | static int __devinit mthca_setup_hca(struct mthca_dev *dev) | |
694 | { | |
695 | int err; | |
696 | u8 status; | |
697 | ||
698 | MTHCA_INIT_DOORBELL_LOCK(&dev->doorbell_lock); | |
699 | ||
700 | err = mthca_init_uar_table(dev); | |
701 | if (err) { | |
702 | mthca_err(dev, "Failed to initialize " | |
703 | "user access region table, aborting.\n"); | |
704 | return err; | |
705 | } | |
706 | ||
707 | err = mthca_uar_alloc(dev, &dev->driver_uar); | |
708 | if (err) { | |
709 | mthca_err(dev, "Failed to allocate driver access region, " | |
710 | "aborting.\n"); | |
711 | goto err_uar_table_free; | |
712 | } | |
713 | ||
714 | dev->kar = ioremap(dev->driver_uar.pfn << PAGE_SHIFT, PAGE_SIZE); | |
715 | if (!dev->kar) { | |
716 | mthca_err(dev, "Couldn't map kernel access region, " | |
717 | "aborting.\n"); | |
718 | err = -ENOMEM; | |
719 | goto err_uar_free; | |
720 | } | |
721 | ||
722 | err = mthca_init_pd_table(dev); | |
723 | if (err) { | |
724 | mthca_err(dev, "Failed to initialize " | |
725 | "protection domain table, aborting.\n"); | |
726 | goto err_kar_unmap; | |
727 | } | |
728 | ||
729 | err = mthca_init_mr_table(dev); | |
730 | if (err) { | |
731 | mthca_err(dev, "Failed to initialize " | |
732 | "memory region table, aborting.\n"); | |
733 | goto err_pd_table_free; | |
734 | } | |
735 | ||
99264c1e | 736 | err = mthca_pd_alloc(dev, 1, &dev->driver_pd); |
1da177e4 LT |
737 | if (err) { |
738 | mthca_err(dev, "Failed to create driver PD, " | |
739 | "aborting.\n"); | |
740 | goto err_mr_table_free; | |
741 | } | |
742 | ||
743 | err = mthca_init_eq_table(dev); | |
744 | if (err) { | |
745 | mthca_err(dev, "Failed to initialize " | |
746 | "event queue table, aborting.\n"); | |
747 | goto err_pd_free; | |
748 | } | |
749 | ||
750 | err = mthca_cmd_use_events(dev); | |
751 | if (err) { | |
752 | mthca_err(dev, "Failed to switch to event-driven " | |
753 | "firmware commands, aborting.\n"); | |
754 | goto err_eq_table_free; | |
755 | } | |
756 | ||
757 | err = mthca_NOP(dev, &status); | |
758 | if (err || status) { | |
4ad81174 RD |
759 | mthca_err(dev, "NOP command failed to generate interrupt (IRQ %d), aborting.\n", |
760 | dev->mthca_flags & MTHCA_FLAG_MSI_X ? | |
761 | dev->eq_table.eq[MTHCA_EQ_CMD].msi_x_vector : | |
762 | dev->pdev->irq); | |
1da177e4 LT |
763 | if (dev->mthca_flags & (MTHCA_FLAG_MSI | MTHCA_FLAG_MSI_X)) |
764 | mthca_err(dev, "Try again with MSI/MSI-X disabled.\n"); | |
765 | else | |
766 | mthca_err(dev, "BIOS or ACPI interrupt routing problem?\n"); | |
767 | ||
768 | goto err_cmd_poll; | |
769 | } | |
770 | ||
771 | mthca_dbg(dev, "NOP command IRQ test passed\n"); | |
772 | ||
773 | err = mthca_init_cq_table(dev); | |
774 | if (err) { | |
775 | mthca_err(dev, "Failed to initialize " | |
776 | "completion queue table, aborting.\n"); | |
777 | goto err_cmd_poll; | |
778 | } | |
779 | ||
ec34a922 RD |
780 | err = mthca_init_srq_table(dev); |
781 | if (err) { | |
782 | mthca_err(dev, "Failed to initialize " | |
783 | "shared receive queue table, aborting.\n"); | |
784 | goto err_cq_table_free; | |
785 | } | |
786 | ||
1da177e4 LT |
787 | err = mthca_init_qp_table(dev); |
788 | if (err) { | |
789 | mthca_err(dev, "Failed to initialize " | |
790 | "queue pair table, aborting.\n"); | |
ec34a922 | 791 | goto err_srq_table_free; |
1da177e4 LT |
792 | } |
793 | ||
794 | err = mthca_init_av_table(dev); | |
795 | if (err) { | |
796 | mthca_err(dev, "Failed to initialize " | |
797 | "address vector table, aborting.\n"); | |
798 | goto err_qp_table_free; | |
799 | } | |
800 | ||
801 | err = mthca_init_mcg_table(dev); | |
802 | if (err) { | |
803 | mthca_err(dev, "Failed to initialize " | |
804 | "multicast group table, aborting.\n"); | |
805 | goto err_av_table_free; | |
806 | } | |
807 | ||
808 | return 0; | |
809 | ||
810 | err_av_table_free: | |
811 | mthca_cleanup_av_table(dev); | |
812 | ||
813 | err_qp_table_free: | |
814 | mthca_cleanup_qp_table(dev); | |
815 | ||
ec34a922 RD |
816 | err_srq_table_free: |
817 | mthca_cleanup_srq_table(dev); | |
818 | ||
1da177e4 LT |
819 | err_cq_table_free: |
820 | mthca_cleanup_cq_table(dev); | |
821 | ||
822 | err_cmd_poll: | |
823 | mthca_cmd_use_polling(dev); | |
824 | ||
825 | err_eq_table_free: | |
826 | mthca_cleanup_eq_table(dev); | |
827 | ||
828 | err_pd_free: | |
829 | mthca_pd_free(dev, &dev->driver_pd); | |
830 | ||
831 | err_mr_table_free: | |
832 | mthca_cleanup_mr_table(dev); | |
833 | ||
834 | err_pd_table_free: | |
835 | mthca_cleanup_pd_table(dev); | |
836 | ||
837 | err_kar_unmap: | |
838 | iounmap(dev->kar); | |
839 | ||
840 | err_uar_free: | |
841 | mthca_uar_free(dev, &dev->driver_uar); | |
842 | ||
843 | err_uar_table_free: | |
844 | mthca_cleanup_uar_table(dev); | |
845 | return err; | |
846 | } | |
847 | ||
848 | static int __devinit mthca_request_regions(struct pci_dev *pdev, | |
849 | int ddr_hidden) | |
850 | { | |
851 | int err; | |
852 | ||
853 | /* | |
854 | * We can't just use pci_request_regions() because the MSI-X | |
855 | * table is right in the middle of the first BAR. If we did | |
856 | * pci_request_region and grab all of the first BAR, then | |
857 | * setting up MSI-X would fail, since the PCI core wants to do | |
858 | * request_mem_region on the MSI-X vector table. | |
859 | * | |
860 | * So just request what we need right now, and request any | |
861 | * other regions we need when setting up EQs. | |
862 | */ | |
863 | if (!request_mem_region(pci_resource_start(pdev, 0) + MTHCA_HCR_BASE, | |
864 | MTHCA_HCR_SIZE, DRV_NAME)) | |
865 | return -EBUSY; | |
866 | ||
867 | err = pci_request_region(pdev, 2, DRV_NAME); | |
868 | if (err) | |
869 | goto err_bar2_failed; | |
870 | ||
871 | if (!ddr_hidden) { | |
872 | err = pci_request_region(pdev, 4, DRV_NAME); | |
873 | if (err) | |
874 | goto err_bar4_failed; | |
875 | } | |
876 | ||
877 | return 0; | |
878 | ||
879 | err_bar4_failed: | |
880 | pci_release_region(pdev, 2); | |
881 | ||
882 | err_bar2_failed: | |
883 | release_mem_region(pci_resource_start(pdev, 0) + MTHCA_HCR_BASE, | |
884 | MTHCA_HCR_SIZE); | |
885 | ||
886 | return err; | |
887 | } | |
888 | ||
889 | static void mthca_release_regions(struct pci_dev *pdev, | |
890 | int ddr_hidden) | |
891 | { | |
892 | if (!ddr_hidden) | |
893 | pci_release_region(pdev, 4); | |
894 | ||
895 | pci_release_region(pdev, 2); | |
896 | ||
897 | release_mem_region(pci_resource_start(pdev, 0) + MTHCA_HCR_BASE, | |
898 | MTHCA_HCR_SIZE); | |
899 | } | |
900 | ||
901 | static int __devinit mthca_enable_msi_x(struct mthca_dev *mdev) | |
902 | { | |
903 | struct msix_entry entries[3]; | |
904 | int err; | |
905 | ||
906 | entries[0].entry = 0; | |
907 | entries[1].entry = 1; | |
908 | entries[2].entry = 2; | |
909 | ||
910 | err = pci_enable_msix(mdev->pdev, entries, ARRAY_SIZE(entries)); | |
911 | if (err) { | |
912 | if (err > 0) | |
913 | mthca_info(mdev, "Only %d MSI-X vectors available, " | |
914 | "not using MSI-X\n", err); | |
915 | return err; | |
916 | } | |
917 | ||
918 | mdev->eq_table.eq[MTHCA_EQ_COMP ].msi_x_vector = entries[0].vector; | |
919 | mdev->eq_table.eq[MTHCA_EQ_ASYNC].msi_x_vector = entries[1].vector; | |
920 | mdev->eq_table.eq[MTHCA_EQ_CMD ].msi_x_vector = entries[2].vector; | |
921 | ||
922 | return 0; | |
923 | } | |
924 | ||
68a3c212 RD |
925 | /* Types of supported HCA */ |
926 | enum { | |
927 | TAVOR, /* MT23108 */ | |
928 | ARBEL_COMPAT, /* MT25208 in Tavor compat mode */ | |
929 | ARBEL_NATIVE, /* MT25208 with extended features */ | |
930 | SINAI /* MT25204 */ | |
931 | }; | |
932 | ||
933 | #define MTHCA_FW_VER(major, minor, subminor) \ | |
934 | (((u64) (major) << 32) | ((u64) (minor) << 16) | (u64) (subminor)) | |
935 | ||
936 | static struct { | |
937 | u64 latest_fw; | |
651eaac9 | 938 | u32 flags; |
68a3c212 | 939 | } mthca_hca_table[] = { |
6226bb57 | 940 | [TAVOR] = { .latest_fw = MTHCA_FW_VER(3, 4, 0), |
651eaac9 | 941 | .flags = 0 }, |
6226bb57 | 942 | [ARBEL_COMPAT] = { .latest_fw = MTHCA_FW_VER(4, 7, 400), |
651eaac9 EC |
943 | .flags = MTHCA_FLAG_PCIE }, |
944 | [ARBEL_NATIVE] = { .latest_fw = MTHCA_FW_VER(5, 1, 0), | |
945 | .flags = MTHCA_FLAG_MEMFREE | | |
946 | MTHCA_FLAG_PCIE }, | |
6226bb57 | 947 | [SINAI] = { .latest_fw = MTHCA_FW_VER(1, 0, 800), |
651eaac9 EC |
948 | .flags = MTHCA_FLAG_MEMFREE | |
949 | MTHCA_FLAG_PCIE | | |
950 | MTHCA_FLAG_SINAI_OPT } | |
68a3c212 RD |
951 | }; |
952 | ||
1da177e4 LT |
953 | static int __devinit mthca_init_one(struct pci_dev *pdev, |
954 | const struct pci_device_id *id) | |
955 | { | |
956 | static int mthca_version_printed = 0; | |
1da177e4 LT |
957 | int ddr_hidden = 0; |
958 | int err; | |
959 | struct mthca_dev *mdev; | |
960 | ||
961 | if (!mthca_version_printed) { | |
962 | printk(KERN_INFO "%s", mthca_version); | |
963 | ++mthca_version_printed; | |
964 | } | |
965 | ||
982245f0 AB |
966 | printk(KERN_INFO PFX "Initializing %s\n", |
967 | pci_name(pdev)); | |
1da177e4 | 968 | |
68a3c212 | 969 | if (id->driver_data >= ARRAY_SIZE(mthca_hca_table)) { |
982245f0 AB |
970 | printk(KERN_ERR PFX "%s has invalid driver data %lx\n", |
971 | pci_name(pdev), id->driver_data); | |
68a3c212 RD |
972 | return -ENODEV; |
973 | } | |
974 | ||
1da177e4 LT |
975 | err = pci_enable_device(pdev); |
976 | if (err) { | |
977 | dev_err(&pdev->dev, "Cannot enable PCI device, " | |
978 | "aborting.\n"); | |
979 | return err; | |
980 | } | |
981 | ||
982 | /* | |
983 | * Check for BARs. We expect 0: 1MB, 2: 8MB, 4: DDR (may not | |
984 | * be present) | |
985 | */ | |
986 | if (!(pci_resource_flags(pdev, 0) & IORESOURCE_MEM) || | |
987 | pci_resource_len(pdev, 0) != 1 << 20) { | |
177214af | 988 | dev_err(&pdev->dev, "Missing DCS, aborting.\n"); |
1da177e4 LT |
989 | err = -ENODEV; |
990 | goto err_disable_pdev; | |
991 | } | |
cbd2981a | 992 | if (!(pci_resource_flags(pdev, 2) & IORESOURCE_MEM)) { |
177214af | 993 | dev_err(&pdev->dev, "Missing UAR, aborting.\n"); |
1da177e4 LT |
994 | err = -ENODEV; |
995 | goto err_disable_pdev; | |
996 | } | |
997 | if (!(pci_resource_flags(pdev, 4) & IORESOURCE_MEM)) | |
998 | ddr_hidden = 1; | |
999 | ||
1000 | err = mthca_request_regions(pdev, ddr_hidden); | |
1001 | if (err) { | |
1002 | dev_err(&pdev->dev, "Cannot obtain PCI resources, " | |
1003 | "aborting.\n"); | |
1004 | goto err_disable_pdev; | |
1005 | } | |
1006 | ||
1007 | pci_set_master(pdev); | |
1008 | ||
1009 | err = pci_set_dma_mask(pdev, DMA_64BIT_MASK); | |
1010 | if (err) { | |
1011 | dev_warn(&pdev->dev, "Warning: couldn't set 64-bit PCI DMA mask.\n"); | |
1012 | err = pci_set_dma_mask(pdev, DMA_32BIT_MASK); | |
1013 | if (err) { | |
1014 | dev_err(&pdev->dev, "Can't set PCI DMA mask, aborting.\n"); | |
1015 | goto err_free_res; | |
1016 | } | |
1017 | } | |
1018 | err = pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK); | |
1019 | if (err) { | |
1020 | dev_warn(&pdev->dev, "Warning: couldn't set 64-bit " | |
1021 | "consistent PCI DMA mask.\n"); | |
1022 | err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK); | |
1023 | if (err) { | |
1024 | dev_err(&pdev->dev, "Can't set consistent PCI DMA mask, " | |
1025 | "aborting.\n"); | |
1026 | goto err_free_res; | |
1027 | } | |
1028 | } | |
1029 | ||
1030 | mdev = (struct mthca_dev *) ib_alloc_device(sizeof *mdev); | |
1031 | if (!mdev) { | |
1032 | dev_err(&pdev->dev, "Device struct alloc failed, " | |
1033 | "aborting.\n"); | |
1034 | err = -ENOMEM; | |
1035 | goto err_free_res; | |
1036 | } | |
1037 | ||
68a3c212 | 1038 | mdev->pdev = pdev; |
1da177e4 | 1039 | |
651eaac9 | 1040 | mdev->mthca_flags = mthca_hca_table[id->driver_data].flags; |
1da177e4 LT |
1041 | if (ddr_hidden) |
1042 | mdev->mthca_flags |= MTHCA_FLAG_DDR_HIDDEN; | |
1043 | ||
1044 | /* | |
1045 | * Now reset the HCA before we touch the PCI capabilities or | |
1046 | * attempt a firmware command, since a boot ROM may have left | |
1047 | * the HCA in an undefined state. | |
1048 | */ | |
1049 | err = mthca_reset(mdev); | |
1050 | if (err) { | |
1051 | mthca_err(mdev, "Failed to reset HCA, aborting.\n"); | |
1052 | goto err_free_dev; | |
1053 | } | |
1054 | ||
1055 | if (msi_x && !mthca_enable_msi_x(mdev)) | |
1056 | mdev->mthca_flags |= MTHCA_FLAG_MSI_X; | |
1057 | if (msi && !(mdev->mthca_flags & MTHCA_FLAG_MSI_X) && | |
1058 | !pci_enable_msi(pdev)) | |
1059 | mdev->mthca_flags |= MTHCA_FLAG_MSI; | |
1060 | ||
80fd8238 RD |
1061 | if (mthca_cmd_init(mdev)) { |
1062 | mthca_err(mdev, "Failed to init command interface, aborting.\n"); | |
1da177e4 LT |
1063 | goto err_free_dev; |
1064 | } | |
1065 | ||
1066 | err = mthca_tune_pci(mdev); | |
1067 | if (err) | |
80fd8238 | 1068 | goto err_cmd; |
1da177e4 LT |
1069 | |
1070 | err = mthca_init_hca(mdev); | |
1071 | if (err) | |
80fd8238 | 1072 | goto err_cmd; |
1da177e4 | 1073 | |
68a3c212 | 1074 | if (mdev->fw_ver < mthca_hca_table[id->driver_data].latest_fw) { |
87cfe323 | 1075 | mthca_warn(mdev, "HCA FW version %d.%d.%d is old (%d.%d.%d is current).\n", |
68a3c212 RD |
1076 | (int) (mdev->fw_ver >> 32), (int) (mdev->fw_ver >> 16) & 0xffff, |
1077 | (int) (mdev->fw_ver & 0xffff), | |
1078 | (int) (mthca_hca_table[id->driver_data].latest_fw >> 32), | |
1079 | (int) (mthca_hca_table[id->driver_data].latest_fw >> 16) & 0xffff, | |
1080 | (int) (mthca_hca_table[id->driver_data].latest_fw & 0xffff)); | |
1081 | mthca_warn(mdev, "If you have problems, try updating your HCA FW.\n"); | |
1082 | } | |
1083 | ||
1da177e4 LT |
1084 | err = mthca_setup_hca(mdev); |
1085 | if (err) | |
1086 | goto err_close; | |
1087 | ||
1088 | err = mthca_register_device(mdev); | |
1089 | if (err) | |
1090 | goto err_cleanup; | |
1091 | ||
1092 | err = mthca_create_agents(mdev); | |
1093 | if (err) | |
1094 | goto err_unregister; | |
1095 | ||
1096 | pci_set_drvdata(pdev, mdev); | |
1097 | ||
1098 | return 0; | |
1099 | ||
1100 | err_unregister: | |
1101 | mthca_unregister_device(mdev); | |
1102 | ||
1103 | err_cleanup: | |
1104 | mthca_cleanup_mcg_table(mdev); | |
1105 | mthca_cleanup_av_table(mdev); | |
1106 | mthca_cleanup_qp_table(mdev); | |
ec34a922 | 1107 | mthca_cleanup_srq_table(mdev); |
1da177e4 LT |
1108 | mthca_cleanup_cq_table(mdev); |
1109 | mthca_cmd_use_polling(mdev); | |
1110 | mthca_cleanup_eq_table(mdev); | |
1111 | ||
1112 | mthca_pd_free(mdev, &mdev->driver_pd); | |
1113 | ||
1114 | mthca_cleanup_mr_table(mdev); | |
1115 | mthca_cleanup_pd_table(mdev); | |
1116 | mthca_cleanup_uar_table(mdev); | |
1117 | ||
1118 | err_close: | |
1119 | mthca_close_hca(mdev); | |
1120 | ||
80fd8238 RD |
1121 | err_cmd: |
1122 | mthca_cmd_cleanup(mdev); | |
1da177e4 LT |
1123 | |
1124 | err_free_dev: | |
1125 | if (mdev->mthca_flags & MTHCA_FLAG_MSI_X) | |
1126 | pci_disable_msix(pdev); | |
1127 | if (mdev->mthca_flags & MTHCA_FLAG_MSI) | |
1128 | pci_disable_msi(pdev); | |
1129 | ||
1130 | ib_dealloc_device(&mdev->ib_dev); | |
1131 | ||
1132 | err_free_res: | |
1133 | mthca_release_regions(pdev, ddr_hidden); | |
1134 | ||
1135 | err_disable_pdev: | |
1136 | pci_disable_device(pdev); | |
1137 | pci_set_drvdata(pdev, NULL); | |
1138 | return err; | |
1139 | } | |
1140 | ||
1141 | static void __devexit mthca_remove_one(struct pci_dev *pdev) | |
1142 | { | |
1143 | struct mthca_dev *mdev = pci_get_drvdata(pdev); | |
1144 | u8 status; | |
1145 | int p; | |
1146 | ||
1147 | if (mdev) { | |
1148 | mthca_free_agents(mdev); | |
1149 | mthca_unregister_device(mdev); | |
1150 | ||
1151 | for (p = 1; p <= mdev->limits.num_ports; ++p) | |
1152 | mthca_CLOSE_IB(mdev, p, &status); | |
1153 | ||
1154 | mthca_cleanup_mcg_table(mdev); | |
1155 | mthca_cleanup_av_table(mdev); | |
1156 | mthca_cleanup_qp_table(mdev); | |
ec34a922 | 1157 | mthca_cleanup_srq_table(mdev); |
1da177e4 LT |
1158 | mthca_cleanup_cq_table(mdev); |
1159 | mthca_cmd_use_polling(mdev); | |
1160 | mthca_cleanup_eq_table(mdev); | |
1161 | ||
1162 | mthca_pd_free(mdev, &mdev->driver_pd); | |
1163 | ||
1164 | mthca_cleanup_mr_table(mdev); | |
1165 | mthca_cleanup_pd_table(mdev); | |
1166 | ||
1167 | iounmap(mdev->kar); | |
1168 | mthca_uar_free(mdev, &mdev->driver_uar); | |
1169 | mthca_cleanup_uar_table(mdev); | |
1da177e4 | 1170 | mthca_close_hca(mdev); |
80fd8238 | 1171 | mthca_cmd_cleanup(mdev); |
1da177e4 LT |
1172 | |
1173 | if (mdev->mthca_flags & MTHCA_FLAG_MSI_X) | |
1174 | pci_disable_msix(pdev); | |
1175 | if (mdev->mthca_flags & MTHCA_FLAG_MSI) | |
1176 | pci_disable_msi(pdev); | |
1177 | ||
1178 | ib_dealloc_device(&mdev->ib_dev); | |
1179 | mthca_release_regions(pdev, mdev->mthca_flags & | |
1180 | MTHCA_FLAG_DDR_HIDDEN); | |
1181 | pci_disable_device(pdev); | |
1182 | pci_set_drvdata(pdev, NULL); | |
1183 | } | |
1184 | } | |
1185 | ||
1186 | static struct pci_device_id mthca_pci_table[] = { | |
1187 | { PCI_DEVICE(PCI_VENDOR_ID_MELLANOX, PCI_DEVICE_ID_MELLANOX_TAVOR), | |
1188 | .driver_data = TAVOR }, | |
1189 | { PCI_DEVICE(PCI_VENDOR_ID_TOPSPIN, PCI_DEVICE_ID_MELLANOX_TAVOR), | |
1190 | .driver_data = TAVOR }, | |
1191 | { PCI_DEVICE(PCI_VENDOR_ID_MELLANOX, PCI_DEVICE_ID_MELLANOX_ARBEL_COMPAT), | |
1192 | .driver_data = ARBEL_COMPAT }, | |
1193 | { PCI_DEVICE(PCI_VENDOR_ID_TOPSPIN, PCI_DEVICE_ID_MELLANOX_ARBEL_COMPAT), | |
1194 | .driver_data = ARBEL_COMPAT }, | |
1195 | { PCI_DEVICE(PCI_VENDOR_ID_MELLANOX, PCI_DEVICE_ID_MELLANOX_ARBEL), | |
1196 | .driver_data = ARBEL_NATIVE }, | |
1197 | { PCI_DEVICE(PCI_VENDOR_ID_TOPSPIN, PCI_DEVICE_ID_MELLANOX_ARBEL), | |
1198 | .driver_data = ARBEL_NATIVE }, | |
68a3c212 RD |
1199 | { PCI_DEVICE(PCI_VENDOR_ID_MELLANOX, PCI_DEVICE_ID_MELLANOX_SINAI), |
1200 | .driver_data = SINAI }, | |
1201 | { PCI_DEVICE(PCI_VENDOR_ID_TOPSPIN, PCI_DEVICE_ID_MELLANOX_SINAI), | |
1202 | .driver_data = SINAI }, | |
1203 | { PCI_DEVICE(PCI_VENDOR_ID_MELLANOX, PCI_DEVICE_ID_MELLANOX_SINAI_OLD), | |
1204 | .driver_data = SINAI }, | |
1205 | { PCI_DEVICE(PCI_VENDOR_ID_TOPSPIN, PCI_DEVICE_ID_MELLANOX_SINAI_OLD), | |
1206 | .driver_data = SINAI }, | |
1da177e4 LT |
1207 | { 0, } |
1208 | }; | |
1209 | ||
1210 | MODULE_DEVICE_TABLE(pci, mthca_pci_table); | |
1211 | ||
1212 | static struct pci_driver mthca_driver = { | |
177214af | 1213 | .name = DRV_NAME, |
1da177e4 LT |
1214 | .id_table = mthca_pci_table, |
1215 | .probe = mthca_init_one, | |
1216 | .remove = __devexit_p(mthca_remove_one) | |
1217 | }; | |
1218 | ||
1219 | static int __init mthca_init(void) | |
1220 | { | |
1221 | int ret; | |
1222 | ||
1223 | ret = pci_register_driver(&mthca_driver); | |
1224 | return ret < 0 ? ret : 0; | |
1225 | } | |
1226 | ||
1227 | static void __exit mthca_cleanup(void) | |
1228 | { | |
1229 | pci_unregister_driver(&mthca_driver); | |
1230 | } | |
1231 | ||
1232 | module_init(mthca_init); | |
1233 | module_exit(mthca_cleanup); |