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a900845e KK |
1 | /* |
2 | * NETJet mISDN driver | |
3 | * | |
4 | * Author Karsten Keil <keil@isdn4linux.de> | |
5 | * | |
6 | * Copyright 2009 by Karsten Keil <keil@isdn4linux.de> | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify | |
9 | * it under the terms of the GNU General Public License version 2 as | |
10 | * published by the Free Software Foundation. | |
11 | * | |
12 | * This program is distributed in the hope that it will be useful, | |
13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | * GNU General Public License for more details. | |
16 | * | |
17 | * You should have received a copy of the GNU General Public License | |
18 | * along with this program; if not, write to the Free Software | |
19 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | |
20 | * | |
21 | */ | |
22 | ||
23 | #include <linux/module.h> | |
24 | #include <linux/pci.h> | |
25 | #include <linux/delay.h> | |
26 | #include <linux/mISDNhw.h> | |
5a0e3ad6 | 27 | #include <linux/slab.h> |
a900845e KK |
28 | #include "ipac.h" |
29 | #include "iohelper.h" | |
30 | #include "netjet.h" | |
31 | #include <linux/isdn/hdlc.h> | |
32 | ||
33 | #define NETJET_REV "2.0" | |
34 | ||
35 | enum nj_types { | |
36 | NETJET_S_TJ300, | |
37 | NETJET_S_TJ320, | |
38 | ENTERNOW__TJ320, | |
39 | }; | |
40 | ||
41 | struct tiger_dma { | |
42 | size_t size; | |
43 | u32 *start; | |
44 | int idx; | |
45 | u32 dmastart; | |
46 | u32 dmairq; | |
47 | u32 dmaend; | |
48 | u32 dmacur; | |
49 | }; | |
50 | ||
51 | struct tiger_hw; | |
52 | ||
53 | struct tiger_ch { | |
54 | struct bchannel bch; | |
55 | struct tiger_hw *nj; | |
56 | int idx; | |
57 | int free; | |
58 | int lastrx; | |
59 | u16 rxstate; | |
60 | u16 txstate; | |
61 | struct isdnhdlc_vars hsend; | |
62 | struct isdnhdlc_vars hrecv; | |
63 | u8 *hsbuf; | |
64 | u8 *hrbuf; | |
65 | }; | |
66 | ||
67 | #define TX_INIT 0x0001 | |
68 | #define TX_IDLE 0x0002 | |
69 | #define TX_RUN 0x0004 | |
70 | #define TX_UNDERRUN 0x0100 | |
71 | #define RX_OVERRUN 0x0100 | |
72 | ||
73 | #define LOG_SIZE 64 | |
74 | ||
75 | struct tiger_hw { | |
76 | struct list_head list; | |
77 | struct pci_dev *pdev; | |
78 | char name[MISDN_MAX_IDLEN]; | |
79 | enum nj_types typ; | |
80 | int irq; | |
81 | u32 irqcnt; | |
82 | u32 base; | |
83 | size_t base_s; | |
84 | dma_addr_t dma; | |
85 | void *dma_p; | |
86 | spinlock_t lock; /* lock HW */ | |
87 | struct isac_hw isac; | |
88 | struct tiger_dma send; | |
89 | struct tiger_dma recv; | |
90 | struct tiger_ch bc[2]; | |
91 | u8 ctrlreg; | |
92 | u8 dmactrl; | |
93 | u8 auxd; | |
94 | u8 last_is0; | |
95 | u8 irqmask0; | |
96 | char log[LOG_SIZE]; | |
97 | }; | |
98 | ||
99 | static LIST_HEAD(Cards); | |
100 | static DEFINE_RWLOCK(card_lock); /* protect Cards */ | |
101 | static u32 debug; | |
102 | static int nj_cnt; | |
103 | ||
104 | static void | |
105 | _set_debug(struct tiger_hw *card) | |
106 | { | |
107 | card->isac.dch.debug = debug; | |
108 | card->bc[0].bch.debug = debug; | |
109 | card->bc[1].bch.debug = debug; | |
110 | } | |
111 | ||
112 | static int | |
113 | set_debug(const char *val, struct kernel_param *kp) | |
114 | { | |
115 | int ret; | |
116 | struct tiger_hw *card; | |
117 | ||
118 | ret = param_set_uint(val, kp); | |
119 | if (!ret) { | |
120 | read_lock(&card_lock); | |
121 | list_for_each_entry(card, &Cards, list) | |
122 | _set_debug(card); | |
123 | read_unlock(&card_lock); | |
124 | } | |
125 | return ret; | |
126 | } | |
127 | ||
128 | MODULE_AUTHOR("Karsten Keil"); | |
129 | MODULE_LICENSE("GPL v2"); | |
130 | MODULE_VERSION(NETJET_REV); | |
131 | module_param_call(debug, set_debug, param_get_uint, &debug, S_IRUGO | S_IWUSR); | |
132 | MODULE_PARM_DESC(debug, "Netjet debug mask"); | |
133 | ||
134 | static void | |
135 | nj_disable_hwirq(struct tiger_hw *card) | |
136 | { | |
137 | outb(0, card->base + NJ_IRQMASK0); | |
138 | outb(0, card->base + NJ_IRQMASK1); | |
139 | } | |
140 | ||
141 | ||
142 | static u8 | |
143 | ReadISAC_nj(void *p, u8 offset) | |
144 | { | |
145 | struct tiger_hw *card = p; | |
146 | u8 ret; | |
147 | ||
148 | card->auxd &= 0xfc; | |
149 | card->auxd |= (offset >> 4) & 3; | |
150 | outb(card->auxd, card->base + NJ_AUXDATA); | |
151 | ret = inb(card->base + NJ_ISAC_OFF + ((offset & 0x0f) << 2)); | |
152 | return ret; | |
153 | } | |
154 | ||
155 | static void | |
156 | WriteISAC_nj(void *p, u8 offset, u8 value) | |
157 | { | |
158 | struct tiger_hw *card = p; | |
159 | ||
160 | card->auxd &= 0xfc; | |
161 | card->auxd |= (offset >> 4) & 3; | |
162 | outb(card->auxd, card->base + NJ_AUXDATA); | |
163 | outb(value, card->base + NJ_ISAC_OFF + ((offset & 0x0f) << 2)); | |
164 | } | |
165 | ||
166 | static void | |
167 | ReadFiFoISAC_nj(void *p, u8 offset, u8 *data, int size) | |
168 | { | |
169 | struct tiger_hw *card = p; | |
170 | ||
171 | card->auxd &= 0xfc; | |
172 | outb(card->auxd, card->base + NJ_AUXDATA); | |
173 | insb(card->base + NJ_ISAC_OFF, data, size); | |
174 | } | |
175 | ||
176 | static void | |
177 | WriteFiFoISAC_nj(void *p, u8 offset, u8 *data, int size) | |
178 | { | |
179 | struct tiger_hw *card = p; | |
180 | ||
181 | card->auxd &= 0xfc; | |
182 | outb(card->auxd, card->base + NJ_AUXDATA); | |
183 | outsb(card->base + NJ_ISAC_OFF, data, size); | |
184 | } | |
185 | ||
186 | static void | |
187 | fill_mem(struct tiger_ch *bc, u32 idx, u32 cnt, u32 fill) | |
188 | { | |
189 | struct tiger_hw *card = bc->bch.hw; | |
190 | u32 mask = 0xff, val; | |
191 | ||
192 | pr_debug("%s: B%1d fill %02x len %d idx %d/%d\n", card->name, | |
193 | bc->bch.nr, fill, cnt, idx, card->send.idx); | |
194 | if (bc->bch.nr & 2) { | |
195 | fill <<= 8; | |
196 | mask <<= 8; | |
197 | } | |
198 | mask ^= 0xffffffff; | |
199 | while (cnt--) { | |
200 | val = card->send.start[idx]; | |
201 | val &= mask; | |
202 | val |= fill; | |
203 | card->send.start[idx++] = val; | |
204 | if (idx >= card->send.size) | |
205 | idx = 0; | |
206 | } | |
207 | } | |
208 | ||
209 | static int | |
210 | mode_tiger(struct tiger_ch *bc, u32 protocol) | |
211 | { | |
212 | struct tiger_hw *card = bc->bch.hw; | |
213 | ||
214 | pr_debug("%s: B%1d protocol %x-->%x\n", card->name, | |
215 | bc->bch.nr, bc->bch.state, protocol); | |
216 | switch (protocol) { | |
217 | case ISDN_P_NONE: | |
218 | if (bc->bch.state == ISDN_P_NONE) | |
219 | break; | |
220 | fill_mem(bc, 0, card->send.size, 0xff); | |
221 | bc->bch.state = protocol; | |
222 | /* only stop dma and interrupts if both channels NULL */ | |
223 | if ((card->bc[0].bch.state == ISDN_P_NONE) && | |
224 | (card->bc[1].bch.state == ISDN_P_NONE)) { | |
225 | card->dmactrl = 0; | |
226 | outb(card->dmactrl, card->base + NJ_DMACTRL); | |
227 | outb(0, card->base + NJ_IRQMASK0); | |
228 | } | |
229 | test_and_clear_bit(FLG_HDLC, &bc->bch.Flags); | |
230 | test_and_clear_bit(FLG_TRANSPARENT, &bc->bch.Flags); | |
231 | bc->txstate = 0; | |
232 | bc->rxstate = 0; | |
233 | bc->lastrx = -1; | |
234 | break; | |
235 | case ISDN_P_B_RAW: | |
236 | test_and_set_bit(FLG_TRANSPARENT, &bc->bch.Flags); | |
237 | bc->bch.state = protocol; | |
238 | bc->idx = 0; | |
239 | bc->free = card->send.size/2; | |
240 | bc->rxstate = 0; | |
241 | bc->txstate = TX_INIT | TX_IDLE; | |
242 | bc->lastrx = -1; | |
243 | if (!card->dmactrl) { | |
244 | card->dmactrl = 1; | |
245 | outb(card->dmactrl, card->base + NJ_DMACTRL); | |
246 | outb(0x0f, card->base + NJ_IRQMASK0); | |
247 | } | |
248 | break; | |
249 | case ISDN_P_B_HDLC: | |
250 | test_and_set_bit(FLG_HDLC, &bc->bch.Flags); | |
251 | bc->bch.state = protocol; | |
252 | bc->idx = 0; | |
253 | bc->free = card->send.size/2; | |
254 | bc->rxstate = 0; | |
255 | bc->txstate = TX_INIT | TX_IDLE; | |
256 | isdnhdlc_rcv_init(&bc->hrecv, 0); | |
257 | isdnhdlc_out_init(&bc->hsend, 0); | |
258 | bc->lastrx = -1; | |
259 | if (!card->dmactrl) { | |
260 | card->dmactrl = 1; | |
261 | outb(card->dmactrl, card->base + NJ_DMACTRL); | |
262 | outb(0x0f, card->base + NJ_IRQMASK0); | |
263 | } | |
264 | break; | |
265 | default: | |
266 | pr_info("%s: %s protocol %x not handled\n", card->name, | |
267 | __func__, protocol); | |
268 | return -ENOPROTOOPT; | |
269 | } | |
270 | card->send.dmacur = inl(card->base + NJ_DMA_READ_ADR); | |
271 | card->recv.dmacur = inl(card->base + NJ_DMA_WRITE_ADR); | |
272 | card->send.idx = (card->send.dmacur - card->send.dmastart) >> 2; | |
273 | card->recv.idx = (card->recv.dmacur - card->recv.dmastart) >> 2; | |
274 | pr_debug("%s: %s ctrl %x irq %02x/%02x idx %d/%d\n", | |
275 | card->name, __func__, | |
276 | inb(card->base + NJ_DMACTRL), | |
277 | inb(card->base + NJ_IRQMASK0), | |
278 | inb(card->base + NJ_IRQSTAT0), | |
279 | card->send.idx, | |
280 | card->recv.idx); | |
281 | return 0; | |
282 | } | |
283 | ||
284 | static void | |
285 | nj_reset(struct tiger_hw *card) | |
286 | { | |
287 | outb(0xff, card->base + NJ_CTRL); /* Reset On */ | |
288 | mdelay(1); | |
289 | ||
290 | /* now edge triggered for TJ320 GE 13/07/00 */ | |
291 | /* see comment in IRQ function */ | |
292 | if (card->typ == NETJET_S_TJ320) /* TJ320 */ | |
293 | card->ctrlreg = 0x40; /* Reset Off and status read clear */ | |
294 | else | |
295 | card->ctrlreg = 0x00; /* Reset Off and status read clear */ | |
296 | outb(card->ctrlreg, card->base + NJ_CTRL); | |
297 | mdelay(10); | |
298 | ||
299 | /* configure AUX pins (all output except ISAC IRQ pin) */ | |
300 | card->auxd = 0; | |
301 | card->dmactrl = 0; | |
302 | outb(~NJ_ISACIRQ, card->base + NJ_AUXCTRL); | |
303 | outb(NJ_ISACIRQ, card->base + NJ_IRQMASK1); | |
304 | outb(card->auxd, card->base + NJ_AUXDATA); | |
305 | } | |
306 | ||
307 | static int | |
308 | inittiger(struct tiger_hw *card) | |
309 | { | |
310 | int i; | |
311 | ||
312 | card->dma_p = pci_alloc_consistent(card->pdev, NJ_DMA_SIZE, | |
313 | &card->dma); | |
314 | if (!card->dma_p) { | |
315 | pr_info("%s: No DMA memory\n", card->name); | |
316 | return -ENOMEM; | |
317 | } | |
318 | if ((u64)card->dma > 0xffffffff) { | |
319 | pr_info("%s: DMA outside 32 bit\n", card->name); | |
320 | return -ENOMEM; | |
321 | } | |
322 | for (i = 0; i < 2; i++) { | |
323 | card->bc[i].hsbuf = kmalloc(NJ_DMA_TXSIZE, GFP_KERNEL); | |
324 | if (!card->bc[i].hsbuf) { | |
325 | pr_info("%s: no B%d send buffer\n", card->name, i + 1); | |
326 | return -ENOMEM; | |
327 | } | |
328 | card->bc[i].hrbuf = kmalloc(NJ_DMA_RXSIZE, GFP_KERNEL); | |
329 | if (!card->bc[i].hrbuf) { | |
330 | pr_info("%s: no B%d recv buffer\n", card->name, i + 1); | |
331 | return -ENOMEM; | |
332 | } | |
333 | } | |
334 | memset(card->dma_p, 0xff, NJ_DMA_SIZE); | |
335 | ||
336 | card->send.start = card->dma_p; | |
337 | card->send.dmastart = (u32)card->dma; | |
338 | card->send.dmaend = card->send.dmastart + | |
339 | (4 * (NJ_DMA_TXSIZE - 1)); | |
340 | card->send.dmairq = card->send.dmastart + | |
341 | (4 * ((NJ_DMA_TXSIZE / 2) - 1)); | |
342 | card->send.size = NJ_DMA_TXSIZE; | |
343 | ||
344 | if (debug & DEBUG_HW) | |
345 | pr_notice("%s: send buffer phy %#x - %#x - %#x virt %p" | |
346 | " size %zu u32\n", card->name, | |
347 | card->send.dmastart, card->send.dmairq, | |
348 | card->send.dmaend, card->send.start, card->send.size); | |
349 | ||
350 | outl(card->send.dmastart, card->base + NJ_DMA_READ_START); | |
351 | outl(card->send.dmairq, card->base + NJ_DMA_READ_IRQ); | |
352 | outl(card->send.dmaend, card->base + NJ_DMA_READ_END); | |
353 | ||
354 | card->recv.start = card->dma_p + (NJ_DMA_SIZE / 2); | |
355 | card->recv.dmastart = (u32)card->dma + (NJ_DMA_SIZE / 2); | |
356 | card->recv.dmaend = card->recv.dmastart + | |
357 | (4 * (NJ_DMA_RXSIZE - 1)); | |
358 | card->recv.dmairq = card->recv.dmastart + | |
359 | (4 * ((NJ_DMA_RXSIZE / 2) - 1)); | |
360 | card->recv.size = NJ_DMA_RXSIZE; | |
361 | ||
362 | if (debug & DEBUG_HW) | |
363 | pr_notice("%s: recv buffer phy %#x - %#x - %#x virt %p" | |
364 | " size %zu u32\n", card->name, | |
365 | card->recv.dmastart, card->recv.dmairq, | |
366 | card->recv.dmaend, card->recv.start, card->recv.size); | |
367 | ||
368 | outl(card->recv.dmastart, card->base + NJ_DMA_WRITE_START); | |
369 | outl(card->recv.dmairq, card->base + NJ_DMA_WRITE_IRQ); | |
370 | outl(card->recv.dmaend, card->base + NJ_DMA_WRITE_END); | |
371 | return 0; | |
372 | } | |
373 | ||
374 | static void | |
375 | read_dma(struct tiger_ch *bc, u32 idx, int cnt) | |
376 | { | |
377 | struct tiger_hw *card = bc->bch.hw; | |
378 | int i, stat; | |
379 | u32 val; | |
380 | u8 *p, *pn; | |
381 | ||
382 | if (bc->lastrx == idx) { | |
383 | bc->rxstate |= RX_OVERRUN; | |
384 | pr_info("%s: B%1d overrun at idx %d\n", card->name, | |
385 | bc->bch.nr, idx); | |
386 | } | |
387 | bc->lastrx = idx; | |
388 | if (!bc->bch.rx_skb) { | |
389 | bc->bch.rx_skb = mI_alloc_skb(bc->bch.maxlen, GFP_ATOMIC); | |
390 | if (!bc->bch.rx_skb) { | |
391 | pr_info("%s: B%1d receive out of memory\n", | |
392 | card->name, bc->bch.nr); | |
393 | return; | |
394 | } | |
395 | } | |
396 | ||
397 | if (test_bit(FLG_TRANSPARENT, &bc->bch.Flags)) { | |
398 | if ((bc->bch.rx_skb->len + cnt) > bc->bch.maxlen) { | |
399 | pr_debug("%s: B%1d overrun %d\n", card->name, | |
400 | bc->bch.nr, bc->bch.rx_skb->len + cnt); | |
401 | skb_trim(bc->bch.rx_skb, 0); | |
402 | return; | |
403 | } | |
404 | p = skb_put(bc->bch.rx_skb, cnt); | |
405 | } else | |
406 | p = bc->hrbuf; | |
407 | ||
408 | for (i = 0; i < cnt; i++) { | |
409 | val = card->recv.start[idx++]; | |
410 | if (bc->bch.nr & 2) | |
411 | val >>= 8; | |
412 | if (idx >= card->recv.size) | |
413 | idx = 0; | |
414 | p[i] = val & 0xff; | |
415 | } | |
416 | pn = bc->hrbuf; | |
417 | next_frame: | |
418 | if (test_bit(FLG_HDLC, &bc->bch.Flags)) { | |
419 | stat = isdnhdlc_decode(&bc->hrecv, pn, cnt, &i, | |
420 | bc->bch.rx_skb->data, bc->bch.maxlen); | |
421 | if (stat > 0) /* valid frame received */ | |
422 | p = skb_put(bc->bch.rx_skb, stat); | |
423 | else if (stat == -HDLC_CRC_ERROR) | |
424 | pr_info("%s: B%1d receive frame CRC error\n", | |
425 | card->name, bc->bch.nr); | |
426 | else if (stat == -HDLC_FRAMING_ERROR) | |
427 | pr_info("%s: B%1d receive framing error\n", | |
428 | card->name, bc->bch.nr); | |
429 | else if (stat == -HDLC_LENGTH_ERROR) | |
430 | pr_info("%s: B%1d receive frame too long (> %d)\n", | |
431 | card->name, bc->bch.nr, bc->bch.maxlen); | |
432 | } else | |
433 | stat = cnt; | |
434 | ||
435 | if (stat > 0) { | |
436 | if (debug & DEBUG_HW_BFIFO) { | |
437 | snprintf(card->log, LOG_SIZE, "B%1d-recv %s %d ", | |
438 | bc->bch.nr, card->name, stat); | |
439 | print_hex_dump_bytes(card->log, DUMP_PREFIX_OFFSET, | |
440 | p, stat); | |
441 | } | |
442 | recv_Bchannel(&bc->bch, 0); | |
443 | } | |
444 | if (test_bit(FLG_HDLC, &bc->bch.Flags)) { | |
445 | pn += i; | |
446 | cnt -= i; | |
447 | if (!bc->bch.rx_skb) { | |
448 | bc->bch.rx_skb = mI_alloc_skb(bc->bch.maxlen, | |
449 | GFP_ATOMIC); | |
450 | if (!bc->bch.rx_skb) { | |
451 | pr_info("%s: B%1d receive out of memory\n", | |
452 | card->name, bc->bch.nr); | |
453 | return; | |
454 | } | |
455 | } | |
456 | if (cnt > 0) | |
457 | goto next_frame; | |
458 | } | |
459 | } | |
460 | ||
461 | static void | |
462 | recv_tiger(struct tiger_hw *card, u8 irq_stat) | |
463 | { | |
464 | u32 idx; | |
465 | int cnt = card->recv.size / 2; | |
466 | ||
467 | /* Note receive is via the WRITE DMA channel */ | |
468 | card->last_is0 &= ~NJ_IRQM0_WR_MASK; | |
469 | card->last_is0 |= (irq_stat & NJ_IRQM0_WR_MASK); | |
470 | ||
471 | if (irq_stat & NJ_IRQM0_WR_END) | |
472 | idx = cnt - 1; | |
473 | else | |
474 | idx = card->recv.size - 1; | |
475 | ||
476 | if (test_bit(FLG_ACTIVE, &card->bc[0].bch.Flags)) | |
477 | read_dma(&card->bc[0], idx, cnt); | |
478 | if (test_bit(FLG_ACTIVE, &card->bc[1].bch.Flags)) | |
479 | read_dma(&card->bc[1], idx, cnt); | |
480 | } | |
481 | ||
482 | /* sync with current DMA address at start or after exception */ | |
483 | static void | |
484 | resync(struct tiger_ch *bc, struct tiger_hw *card) | |
485 | { | |
486 | card->send.dmacur = inl(card->base | NJ_DMA_READ_ADR); | |
487 | card->send.idx = (card->send.dmacur - card->send.dmastart) >> 2; | |
488 | if (bc->free > card->send.size / 2) | |
489 | bc->free = card->send.size / 2; | |
490 | /* currently we simple sync to the next complete free area | |
491 | * this hast the advantage that we have always maximum time to | |
492 | * handle TX irq | |
493 | */ | |
494 | if (card->send.idx < ((card->send.size / 2) - 1)) | |
495 | bc->idx = (card->recv.size / 2) - 1; | |
496 | else | |
497 | bc->idx = card->recv.size - 1; | |
498 | bc->txstate = TX_RUN; | |
499 | pr_debug("%s: %s B%1d free %d idx %d/%d\n", card->name, | |
500 | __func__, bc->bch.nr, bc->free, bc->idx, card->send.idx); | |
501 | } | |
502 | ||
503 | static int bc_next_frame(struct tiger_ch *); | |
504 | ||
505 | static void | |
506 | fill_hdlc_flag(struct tiger_ch *bc) | |
507 | { | |
508 | struct tiger_hw *card = bc->bch.hw; | |
509 | int count, i; | |
510 | u32 m, v; | |
511 | u8 *p; | |
512 | ||
513 | if (bc->free == 0) | |
514 | return; | |
515 | pr_debug("%s: %s B%1d %d state %x idx %d/%d\n", card->name, | |
516 | __func__, bc->bch.nr, bc->free, bc->txstate, | |
517 | bc->idx, card->send.idx); | |
518 | if (bc->txstate & (TX_IDLE | TX_INIT | TX_UNDERRUN)) | |
519 | resync(bc, card); | |
520 | count = isdnhdlc_encode(&bc->hsend, NULL, 0, &i, | |
521 | bc->hsbuf, bc->free); | |
522 | pr_debug("%s: B%1d hdlc encoded %d flags\n", card->name, | |
523 | bc->bch.nr, count); | |
524 | bc->free -= count; | |
525 | p = bc->hsbuf; | |
526 | m = (bc->bch.nr & 1) ? 0xffffff00 : 0xffff00ff; | |
527 | for (i = 0; i < count; i++) { | |
528 | if (bc->idx >= card->send.size) | |
529 | bc->idx = 0; | |
530 | v = card->send.start[bc->idx]; | |
531 | v &= m; | |
532 | v |= (bc->bch.nr & 1) ? (u32)(p[i]) : ((u32)(p[i])) << 8; | |
533 | card->send.start[bc->idx++] = v; | |
534 | } | |
535 | if (debug & DEBUG_HW_BFIFO) { | |
536 | snprintf(card->log, LOG_SIZE, "B%1d-send %s %d ", | |
537 | bc->bch.nr, card->name, count); | |
538 | print_hex_dump_bytes(card->log, DUMP_PREFIX_OFFSET, p, count); | |
539 | } | |
540 | } | |
541 | ||
542 | static void | |
543 | fill_dma(struct tiger_ch *bc) | |
544 | { | |
545 | struct tiger_hw *card = bc->bch.hw; | |
546 | int count, i; | |
547 | u32 m, v; | |
548 | u8 *p; | |
549 | ||
550 | if (bc->free == 0) | |
551 | return; | |
552 | count = bc->bch.tx_skb->len - bc->bch.tx_idx; | |
553 | if (count <= 0) | |
554 | return; | |
555 | pr_debug("%s: %s B%1d %d/%d/%d/%d state %x idx %d/%d\n", card->name, | |
556 | __func__, bc->bch.nr, count, bc->free, bc->bch.tx_idx, | |
557 | bc->bch.tx_skb->len, bc->txstate, bc->idx, card->send.idx); | |
558 | if (bc->txstate & (TX_IDLE | TX_INIT | TX_UNDERRUN)) | |
559 | resync(bc, card); | |
560 | p = bc->bch.tx_skb->data + bc->bch.tx_idx; | |
561 | if (test_bit(FLG_HDLC, &bc->bch.Flags)) { | |
562 | count = isdnhdlc_encode(&bc->hsend, p, count, &i, | |
563 | bc->hsbuf, bc->free); | |
564 | pr_debug("%s: B%1d hdlc encoded %d in %d\n", card->name, | |
565 | bc->bch.nr, i, count); | |
566 | bc->bch.tx_idx += i; | |
567 | bc->free -= count; | |
568 | p = bc->hsbuf; | |
569 | } else { | |
570 | if (count > bc->free) | |
571 | count = bc->free; | |
572 | bc->bch.tx_idx += count; | |
573 | bc->free -= count; | |
574 | } | |
575 | m = (bc->bch.nr & 1) ? 0xffffff00 : 0xffff00ff; | |
576 | for (i = 0; i < count; i++) { | |
577 | if (bc->idx >= card->send.size) | |
578 | bc->idx = 0; | |
579 | v = card->send.start[bc->idx]; | |
580 | v &= m; | |
581 | v |= (bc->bch.nr & 1) ? (u32)(p[i]) : ((u32)(p[i])) << 8; | |
582 | card->send.start[bc->idx++] = v; | |
583 | } | |
584 | if (debug & DEBUG_HW_BFIFO) { | |
585 | snprintf(card->log, LOG_SIZE, "B%1d-send %s %d ", | |
586 | bc->bch.nr, card->name, count); | |
587 | print_hex_dump_bytes(card->log, DUMP_PREFIX_OFFSET, p, count); | |
588 | } | |
589 | if (bc->free) | |
590 | bc_next_frame(bc); | |
591 | } | |
592 | ||
593 | ||
594 | static int | |
595 | bc_next_frame(struct tiger_ch *bc) | |
596 | { | |
597 | if (bc->bch.tx_skb && bc->bch.tx_idx < bc->bch.tx_skb->len) | |
598 | fill_dma(bc); | |
599 | else { | |
600 | if (bc->bch.tx_skb) { | |
601 | /* send confirm, on trans, free on hdlc. */ | |
602 | if (test_bit(FLG_TRANSPARENT, &bc->bch.Flags)) | |
603 | confirm_Bsend(&bc->bch); | |
604 | dev_kfree_skb(bc->bch.tx_skb); | |
605 | } | |
606 | if (get_next_bframe(&bc->bch)) | |
607 | fill_dma(bc); | |
608 | else | |
609 | return 0; | |
610 | } | |
611 | return 1; | |
612 | } | |
613 | ||
614 | static void | |
615 | send_tiger_bc(struct tiger_hw *card, struct tiger_ch *bc) | |
616 | { | |
617 | int ret; | |
618 | ||
619 | bc->free += card->send.size / 2; | |
620 | if (bc->free >= card->send.size) { | |
621 | if (!(bc->txstate & (TX_UNDERRUN | TX_INIT))) { | |
622 | pr_info("%s: B%1d TX underrun state %x\n", card->name, | |
623 | bc->bch.nr, bc->txstate); | |
624 | bc->txstate |= TX_UNDERRUN; | |
625 | } | |
626 | bc->free = card->send.size; | |
627 | } | |
628 | ret = bc_next_frame(bc); | |
629 | if (!ret) { | |
630 | if (test_bit(FLG_HDLC, &bc->bch.Flags)) { | |
631 | fill_hdlc_flag(bc); | |
632 | return; | |
633 | } | |
634 | pr_debug("%s: B%1d TX no data free %d idx %d/%d\n", card->name, | |
635 | bc->bch.nr, bc->free, bc->idx, card->send.idx); | |
636 | if (!(bc->txstate & (TX_IDLE | TX_INIT))) { | |
637 | fill_mem(bc, bc->idx, bc->free, 0xff); | |
638 | if (bc->free == card->send.size) | |
639 | bc->txstate |= TX_IDLE; | |
640 | } | |
641 | } | |
642 | } | |
643 | ||
644 | static void | |
645 | send_tiger(struct tiger_hw *card, u8 irq_stat) | |
646 | { | |
647 | int i; | |
648 | ||
649 | /* Note send is via the READ DMA channel */ | |
650 | if ((irq_stat & card->last_is0) & NJ_IRQM0_RD_MASK) { | |
651 | pr_info("%s: tiger warn write double dma %x/%x\n", | |
652 | card->name, irq_stat, card->last_is0); | |
653 | return; | |
654 | } else { | |
655 | card->last_is0 &= ~NJ_IRQM0_RD_MASK; | |
656 | card->last_is0 |= (irq_stat & NJ_IRQM0_RD_MASK); | |
657 | } | |
658 | for (i = 0; i < 2; i++) { | |
659 | if (test_bit(FLG_ACTIVE, &card->bc[i].bch.Flags)) | |
660 | send_tiger_bc(card, &card->bc[i]); | |
661 | } | |
662 | } | |
663 | ||
664 | static irqreturn_t | |
665 | nj_irq(int intno, void *dev_id) | |
666 | { | |
667 | struct tiger_hw *card = dev_id; | |
668 | u8 val, s1val, s0val; | |
669 | ||
670 | spin_lock(&card->lock); | |
671 | s0val = inb(card->base | NJ_IRQSTAT0); | |
672 | s1val = inb(card->base | NJ_IRQSTAT1); | |
673 | if ((s1val & NJ_ISACIRQ) && (s0val == 0)) { | |
674 | /* shared IRQ */ | |
675 | spin_unlock(&card->lock); | |
676 | return IRQ_NONE; | |
677 | } | |
678 | pr_debug("%s: IRQSTAT0 %02x IRQSTAT1 %02x\n", card->name, s0val, s1val); | |
679 | card->irqcnt++; | |
680 | if (!(s1val & NJ_ISACIRQ)) { | |
681 | val = ReadISAC_nj(card, ISAC_ISTA); | |
682 | if (val) | |
683 | mISDNisac_irq(&card->isac, val); | |
684 | } | |
685 | ||
686 | if (s0val) | |
687 | /* write to clear */ | |
688 | outb(s0val, card->base | NJ_IRQSTAT0); | |
689 | else | |
690 | goto end; | |
691 | s1val = s0val; | |
692 | /* set bits in sval to indicate which page is free */ | |
693 | card->recv.dmacur = inl(card->base | NJ_DMA_WRITE_ADR); | |
694 | card->recv.idx = (card->recv.dmacur - card->recv.dmastart) >> 2; | |
695 | if (card->recv.dmacur < card->recv.dmairq) | |
696 | s0val = 0x08; /* the 2nd write area is free */ | |
697 | else | |
698 | s0val = 0x04; /* the 1st write area is free */ | |
699 | ||
700 | card->send.dmacur = inl(card->base | NJ_DMA_READ_ADR); | |
701 | card->send.idx = (card->send.dmacur - card->send.dmastart) >> 2; | |
702 | if (card->send.dmacur < card->send.dmairq) | |
703 | s0val |= 0x02; /* the 2nd read area is free */ | |
704 | else | |
705 | s0val |= 0x01; /* the 1st read area is free */ | |
706 | ||
707 | pr_debug("%s: DMA Status %02x/%02x/%02x %d/%d\n", card->name, | |
708 | s1val, s0val, card->last_is0, | |
709 | card->recv.idx, card->send.idx); | |
710 | /* test if we have a DMA interrupt */ | |
711 | if (s0val != card->last_is0) { | |
712 | if ((s0val & NJ_IRQM0_RD_MASK) != | |
713 | (card->last_is0 & NJ_IRQM0_RD_MASK)) | |
714 | /* got a write dma int */ | |
715 | send_tiger(card, s0val); | |
716 | if ((s0val & NJ_IRQM0_WR_MASK) != | |
717 | (card->last_is0 & NJ_IRQM0_WR_MASK)) | |
718 | /* got a read dma int */ | |
719 | recv_tiger(card, s0val); | |
720 | } | |
721 | end: | |
722 | spin_unlock(&card->lock); | |
723 | return IRQ_HANDLED; | |
724 | } | |
725 | ||
726 | static int | |
727 | nj_l2l1B(struct mISDNchannel *ch, struct sk_buff *skb) | |
728 | { | |
729 | int ret = -EINVAL; | |
730 | struct bchannel *bch = container_of(ch, struct bchannel, ch); | |
731 | struct tiger_ch *bc = container_of(bch, struct tiger_ch, bch); | |
732 | struct tiger_hw *card = bch->hw; | |
733 | struct mISDNhead *hh = mISDN_HEAD_P(skb); | |
734 | u32 id; | |
735 | u_long flags; | |
736 | ||
737 | switch (hh->prim) { | |
738 | case PH_DATA_REQ: | |
739 | spin_lock_irqsave(&card->lock, flags); | |
740 | ret = bchannel_senddata(bch, skb); | |
741 | if (ret > 0) { /* direct TX */ | |
742 | id = hh->id; /* skb can be freed */ | |
743 | fill_dma(bc); | |
744 | ret = 0; | |
745 | spin_unlock_irqrestore(&card->lock, flags); | |
746 | if (!test_bit(FLG_TRANSPARENT, &bch->Flags)) | |
747 | queue_ch_frame(ch, PH_DATA_CNF, id, NULL); | |
748 | } else | |
749 | spin_unlock_irqrestore(&card->lock, flags); | |
750 | return ret; | |
751 | case PH_ACTIVATE_REQ: | |
752 | spin_lock_irqsave(&card->lock, flags); | |
753 | if (!test_and_set_bit(FLG_ACTIVE, &bch->Flags)) | |
754 | ret = mode_tiger(bc, ch->protocol); | |
755 | else | |
756 | ret = 0; | |
757 | spin_unlock_irqrestore(&card->lock, flags); | |
758 | if (!ret) | |
759 | _queue_data(ch, PH_ACTIVATE_IND, MISDN_ID_ANY, 0, | |
760 | NULL, GFP_KERNEL); | |
761 | break; | |
762 | case PH_DEACTIVATE_REQ: | |
763 | spin_lock_irqsave(&card->lock, flags); | |
764 | mISDN_clear_bchannel(bch); | |
765 | mode_tiger(bc, ISDN_P_NONE); | |
766 | spin_unlock_irqrestore(&card->lock, flags); | |
767 | _queue_data(ch, PH_DEACTIVATE_IND, MISDN_ID_ANY, 0, | |
768 | NULL, GFP_KERNEL); | |
769 | ret = 0; | |
770 | break; | |
771 | } | |
772 | if (!ret) | |
773 | dev_kfree_skb(skb); | |
774 | return ret; | |
775 | } | |
776 | ||
777 | static int | |
778 | channel_bctrl(struct tiger_ch *bc, struct mISDN_ctrl_req *cq) | |
779 | { | |
780 | int ret = 0; | |
781 | struct tiger_hw *card = bc->bch.hw; | |
782 | ||
783 | switch (cq->op) { | |
784 | case MISDN_CTRL_GETOP: | |
785 | cq->op = 0; | |
786 | break; | |
787 | /* Nothing implemented yet */ | |
788 | case MISDN_CTRL_FILL_EMPTY: | |
789 | default: | |
790 | pr_info("%s: %s unknown Op %x\n", card->name, __func__, cq->op); | |
791 | ret = -EINVAL; | |
792 | break; | |
793 | } | |
794 | return ret; | |
795 | } | |
796 | ||
797 | static int | |
798 | nj_bctrl(struct mISDNchannel *ch, u32 cmd, void *arg) | |
799 | { | |
800 | struct bchannel *bch = container_of(ch, struct bchannel, ch); | |
801 | struct tiger_ch *bc = container_of(bch, struct tiger_ch, bch); | |
802 | struct tiger_hw *card = bch->hw; | |
803 | int ret = -EINVAL; | |
804 | u_long flags; | |
805 | ||
806 | pr_debug("%s: %s cmd:%x %p\n", card->name, __func__, cmd, arg); | |
807 | switch (cmd) { | |
808 | case CLOSE_CHANNEL: | |
809 | test_and_clear_bit(FLG_OPEN, &bch->Flags); | |
810 | if (test_bit(FLG_ACTIVE, &bch->Flags)) { | |
811 | spin_lock_irqsave(&card->lock, flags); | |
812 | mISDN_freebchannel(bch); | |
813 | test_and_clear_bit(FLG_TX_BUSY, &bch->Flags); | |
814 | test_and_clear_bit(FLG_ACTIVE, &bch->Flags); | |
815 | mode_tiger(bc, ISDN_P_NONE); | |
816 | spin_unlock_irqrestore(&card->lock, flags); | |
817 | } | |
818 | ch->protocol = ISDN_P_NONE; | |
819 | ch->peer = NULL; | |
820 | module_put(THIS_MODULE); | |
821 | ret = 0; | |
822 | break; | |
823 | case CONTROL_CHANNEL: | |
824 | ret = channel_bctrl(bc, arg); | |
825 | break; | |
826 | default: | |
827 | pr_info("%s: %s unknown prim(%x)\n", card->name, __func__, cmd); | |
828 | } | |
829 | return ret; | |
830 | } | |
831 | ||
832 | static int | |
833 | channel_ctrl(struct tiger_hw *card, struct mISDN_ctrl_req *cq) | |
834 | { | |
835 | int ret = 0; | |
836 | ||
837 | switch (cq->op) { | |
838 | case MISDN_CTRL_GETOP: | |
839 | cq->op = MISDN_CTRL_LOOP; | |
840 | break; | |
841 | case MISDN_CTRL_LOOP: | |
842 | /* cq->channel: 0 disable, 1 B1 loop 2 B2 loop, 3 both */ | |
843 | if (cq->channel < 0 || cq->channel > 3) { | |
844 | ret = -EINVAL; | |
845 | break; | |
846 | } | |
847 | ret = card->isac.ctrl(&card->isac, HW_TESTLOOP, cq->channel); | |
848 | break; | |
849 | default: | |
850 | pr_info("%s: %s unknown Op %x\n", card->name, __func__, cq->op); | |
851 | ret = -EINVAL; | |
852 | break; | |
853 | } | |
854 | return ret; | |
855 | } | |
856 | ||
857 | static int | |
858 | open_bchannel(struct tiger_hw *card, struct channel_req *rq) | |
859 | { | |
860 | struct bchannel *bch; | |
861 | ||
862 | if (rq->adr.channel > 2) | |
863 | return -EINVAL; | |
864 | if (rq->protocol == ISDN_P_NONE) | |
865 | return -EINVAL; | |
866 | bch = &card->bc[rq->adr.channel - 1].bch; | |
867 | if (test_and_set_bit(FLG_OPEN, &bch->Flags)) | |
868 | return -EBUSY; /* b-channel can be only open once */ | |
869 | test_and_clear_bit(FLG_FILLEMPTY, &bch->Flags); | |
870 | bch->ch.protocol = rq->protocol; | |
871 | rq->ch = &bch->ch; | |
872 | return 0; | |
873 | } | |
874 | ||
875 | /* | |
876 | * device control function | |
877 | */ | |
878 | static int | |
879 | nj_dctrl(struct mISDNchannel *ch, u32 cmd, void *arg) | |
880 | { | |
881 | struct mISDNdevice *dev = container_of(ch, struct mISDNdevice, D); | |
882 | struct dchannel *dch = container_of(dev, struct dchannel, dev); | |
883 | struct tiger_hw *card = dch->hw; | |
884 | struct channel_req *rq; | |
885 | int err = 0; | |
886 | ||
887 | pr_debug("%s: %s cmd:%x %p\n", card->name, __func__, cmd, arg); | |
888 | switch (cmd) { | |
889 | case OPEN_CHANNEL: | |
890 | rq = arg; | |
891 | if (rq->protocol == ISDN_P_TE_S0) | |
892 | err = card->isac.open(&card->isac, rq); | |
893 | else | |
894 | err = open_bchannel(card, rq); | |
895 | if (err) | |
896 | break; | |
897 | if (!try_module_get(THIS_MODULE)) | |
898 | pr_info("%s: cannot get module\n", card->name); | |
899 | break; | |
900 | case CLOSE_CHANNEL: | |
901 | pr_debug("%s: dev(%d) close from %p\n", card->name, dch->dev.id, | |
902 | __builtin_return_address(0)); | |
903 | module_put(THIS_MODULE); | |
904 | break; | |
905 | case CONTROL_CHANNEL: | |
906 | err = channel_ctrl(card, arg); | |
907 | break; | |
908 | default: | |
909 | pr_debug("%s: %s unknown command %x\n", | |
910 | card->name, __func__, cmd); | |
911 | return -EINVAL; | |
912 | } | |
913 | return err; | |
914 | } | |
915 | ||
916 | static int | |
917 | nj_init_card(struct tiger_hw *card) | |
918 | { | |
919 | u_long flags; | |
920 | int ret; | |
921 | ||
922 | spin_lock_irqsave(&card->lock, flags); | |
923 | nj_disable_hwirq(card); | |
924 | spin_unlock_irqrestore(&card->lock, flags); | |
925 | ||
926 | card->irq = card->pdev->irq; | |
927 | if (request_irq(card->irq, nj_irq, IRQF_SHARED, card->name, card)) { | |
928 | pr_info("%s: couldn't get interrupt %d\n", | |
929 | card->name, card->irq); | |
930 | card->irq = -1; | |
931 | return -EIO; | |
932 | } | |
933 | ||
934 | spin_lock_irqsave(&card->lock, flags); | |
935 | nj_reset(card); | |
936 | ret = card->isac.init(&card->isac); | |
937 | if (ret) | |
938 | goto error; | |
939 | ret = inittiger(card); | |
940 | if (ret) | |
941 | goto error; | |
942 | mode_tiger(&card->bc[0], ISDN_P_NONE); | |
943 | mode_tiger(&card->bc[1], ISDN_P_NONE); | |
944 | error: | |
945 | spin_unlock_irqrestore(&card->lock, flags); | |
946 | return ret; | |
947 | } | |
948 | ||
949 | ||
950 | static void | |
951 | nj_release(struct tiger_hw *card) | |
952 | { | |
953 | u_long flags; | |
954 | int i; | |
955 | ||
956 | if (card->base_s) { | |
957 | spin_lock_irqsave(&card->lock, flags); | |
958 | nj_disable_hwirq(card); | |
959 | mode_tiger(&card->bc[0], ISDN_P_NONE); | |
960 | mode_tiger(&card->bc[1], ISDN_P_NONE); | |
961 | card->isac.release(&card->isac); | |
962 | spin_unlock_irqrestore(&card->lock, flags); | |
963 | release_region(card->base, card->base_s); | |
964 | card->base_s = 0; | |
965 | } | |
966 | if (card->irq > 0) | |
967 | free_irq(card->irq, card); | |
968 | if (card->isac.dch.dev.dev.class) | |
969 | mISDN_unregister_device(&card->isac.dch.dev); | |
970 | ||
971 | for (i = 0; i < 2; i++) { | |
972 | mISDN_freebchannel(&card->bc[i].bch); | |
973 | kfree(card->bc[i].hsbuf); | |
974 | kfree(card->bc[i].hrbuf); | |
975 | } | |
976 | if (card->dma_p) | |
977 | pci_free_consistent(card->pdev, NJ_DMA_SIZE, | |
978 | card->dma_p, card->dma); | |
979 | write_lock_irqsave(&card_lock, flags); | |
980 | list_del(&card->list); | |
981 | write_unlock_irqrestore(&card_lock, flags); | |
982 | pci_clear_master(card->pdev); | |
983 | pci_disable_device(card->pdev); | |
984 | pci_set_drvdata(card->pdev, NULL); | |
985 | kfree(card); | |
986 | } | |
987 | ||
988 | ||
989 | static int | |
990 | nj_setup(struct tiger_hw *card) | |
991 | { | |
992 | card->base = pci_resource_start(card->pdev, 0); | |
993 | card->base_s = pci_resource_len(card->pdev, 0); | |
994 | if (!request_region(card->base, card->base_s, card->name)) { | |
995 | pr_info("%s: NETjet config port %#x-%#x already in use\n", | |
996 | card->name, card->base, | |
997 | (u32)(card->base + card->base_s - 1)); | |
998 | card->base_s = 0; | |
999 | return -EIO; | |
1000 | } | |
1001 | ASSIGN_FUNC(nj, ISAC, card->isac); | |
1002 | return 0; | |
1003 | } | |
1004 | ||
1005 | ||
1006 | static int __devinit | |
1007 | setup_instance(struct tiger_hw *card) | |
1008 | { | |
1009 | int i, err; | |
1010 | u_long flags; | |
1011 | ||
1012 | snprintf(card->name, MISDN_MAX_IDLEN - 1, "netjet.%d", nj_cnt + 1); | |
1013 | write_lock_irqsave(&card_lock, flags); | |
1014 | list_add_tail(&card->list, &Cards); | |
1015 | write_unlock_irqrestore(&card_lock, flags); | |
1016 | ||
1017 | _set_debug(card); | |
1018 | card->isac.name = card->name; | |
1019 | spin_lock_init(&card->lock); | |
1020 | card->isac.hwlock = &card->lock; | |
1021 | mISDNisac_init(&card->isac, card); | |
1022 | ||
1023 | card->isac.dch.dev.Bprotocols = (1 << (ISDN_P_B_RAW & ISDN_P_B_MASK)) | | |
1024 | (1 << (ISDN_P_B_HDLC & ISDN_P_B_MASK)); | |
1025 | card->isac.dch.dev.D.ctrl = nj_dctrl; | |
1026 | for (i = 0; i < 2; i++) { | |
1027 | card->bc[i].bch.nr = i + 1; | |
1028 | set_channelmap(i + 1, card->isac.dch.dev.channelmap); | |
1029 | mISDN_initbchannel(&card->bc[i].bch, MAX_DATA_MEM); | |
1030 | card->bc[i].bch.hw = card; | |
1031 | card->bc[i].bch.ch.send = nj_l2l1B; | |
1032 | card->bc[i].bch.ch.ctrl = nj_bctrl; | |
1033 | card->bc[i].bch.ch.nr = i + 1; | |
1034 | list_add(&card->bc[i].bch.ch.list, | |
1035 | &card->isac.dch.dev.bchannels); | |
1036 | card->bc[i].bch.hw = card; | |
1037 | } | |
1038 | err = nj_setup(card); | |
1039 | if (err) | |
1040 | goto error; | |
1041 | err = mISDN_register_device(&card->isac.dch.dev, &card->pdev->dev, | |
1042 | card->name); | |
1043 | if (err) | |
1044 | goto error; | |
1045 | err = nj_init_card(card); | |
1046 | if (!err) { | |
1047 | nj_cnt++; | |
1048 | pr_notice("Netjet %d cards installed\n", nj_cnt); | |
1049 | return 0; | |
1050 | } | |
1051 | error: | |
1052 | nj_release(card); | |
1053 | return err; | |
1054 | } | |
1055 | ||
1056 | static int __devinit | |
1057 | nj_probe(struct pci_dev *pdev, const struct pci_device_id *ent) | |
1058 | { | |
1059 | int err = -ENOMEM; | |
1060 | int cfg; | |
1061 | struct tiger_hw *card; | |
1062 | ||
1063 | if (pdev->subsystem_vendor == 0x8086 && | |
1064 | pdev->subsystem_device == 0x0003) { | |
1065 | pr_notice("Netjet: Digium X100P/X101P not handled\n"); | |
1066 | return -ENODEV; | |
1067 | } | |
1068 | ||
1069 | if (pdev->subsystem_vendor == 0x55 && | |
1070 | pdev->subsystem_device == 0x02) { | |
1071 | pr_notice("Netjet: Enter!Now not handled yet\n"); | |
1072 | return -ENODEV; | |
1073 | } | |
1074 | ||
1075 | card = kzalloc(sizeof(struct tiger_hw), GFP_ATOMIC); | |
1076 | if (!card) { | |
1077 | pr_info("No kmem for Netjet\n"); | |
1078 | return err; | |
1079 | } | |
1080 | ||
1081 | card->pdev = pdev; | |
1082 | ||
1083 | err = pci_enable_device(pdev); | |
1084 | if (err) { | |
1085 | kfree(card); | |
1086 | return err; | |
1087 | } | |
1088 | ||
1089 | printk(KERN_INFO "nj_probe(mISDN): found adapter at %s\n", | |
1090 | pci_name(pdev)); | |
1091 | ||
1092 | pci_set_master(pdev); | |
1093 | ||
1094 | /* the TJ300 and TJ320 must be detected, the IRQ handling is different | |
1095 | * unfortunately the chips use the same device ID, but the TJ320 has | |
1096 | * the bit20 in status PCI cfg register set | |
1097 | */ | |
1098 | pci_read_config_dword(pdev, 0x04, &cfg); | |
1099 | if (cfg & 0x00100000) | |
1100 | card->typ = NETJET_S_TJ320; | |
1101 | else | |
1102 | card->typ = NETJET_S_TJ300; | |
1103 | ||
1104 | card->base = pci_resource_start(pdev, 0); | |
1105 | card->irq = pdev->irq; | |
1106 | pci_set_drvdata(pdev, card); | |
1107 | err = setup_instance(card); | |
1108 | if (err) | |
1109 | pci_set_drvdata(pdev, NULL); | |
1110 | ||
1111 | return err; | |
1112 | } | |
1113 | ||
1114 | ||
1115 | static void __devexit nj_remove(struct pci_dev *pdev) | |
1116 | { | |
1117 | struct tiger_hw *card = pci_get_drvdata(pdev); | |
1118 | ||
1119 | if (card) | |
1120 | nj_release(card); | |
1121 | else | |
1122 | pr_info("%s drvdata already removed\n", __func__); | |
1123 | } | |
1124 | ||
1125 | /* We cannot select cards with PCI_SUB... IDs, since here are cards with | |
1126 | * SUB IDs set to PCI_ANY_ID, so we need to match all and reject | |
1127 | * known other cards which not work with this driver - see probe function */ | |
1128 | static struct pci_device_id nj_pci_ids[] __devinitdata = { | |
1129 | { PCI_VENDOR_ID_TIGERJET, PCI_DEVICE_ID_TIGERJET_300, | |
1130 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, | |
1131 | { } | |
1132 | }; | |
1133 | MODULE_DEVICE_TABLE(pci, nj_pci_ids); | |
1134 | ||
1135 | static struct pci_driver nj_driver = { | |
1136 | .name = "netjet", | |
1137 | .probe = nj_probe, | |
1138 | .remove = __devexit_p(nj_remove), | |
1139 | .id_table = nj_pci_ids, | |
1140 | }; | |
1141 | ||
1142 | static int __init nj_init(void) | |
1143 | { | |
1144 | int err; | |
1145 | ||
1146 | pr_notice("Netjet PCI driver Rev. %s\n", NETJET_REV); | |
1147 | err = pci_register_driver(&nj_driver); | |
1148 | return err; | |
1149 | } | |
1150 | ||
1151 | static void __exit nj_cleanup(void) | |
1152 | { | |
1153 | pci_unregister_driver(&nj_driver); | |
1154 | } | |
1155 | ||
1156 | module_init(nj_init); | |
1157 | module_exit(nj_cleanup); |