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KVM: Add general accessors to read and write guest memory
[mirror_ubuntu-jammy-kernel.git] / drivers / kvm / mmu.c
CommitLineData
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1/*
2 * Kernel-based Virtual Machine driver for Linux
3 *
4 * This module enables machines with Intel VT-x extensions to run virtual
5 * machines without emulation or binary translation.
6 *
7 * MMU support
8 *
9 * Copyright (C) 2006 Qumranet, Inc.
10 *
11 * Authors:
12 * Yaniv Kamay <yaniv@qumranet.com>
13 * Avi Kivity <avi@qumranet.com>
14 *
15 * This work is licensed under the terms of the GNU GPL, version 2. See
16 * the COPYING file in the top-level directory.
17 *
18 */
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19
20#include "vmx.h"
21#include "kvm.h"
22
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23#include <linux/types.h>
24#include <linux/string.h>
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25#include <linux/mm.h>
26#include <linux/highmem.h>
27#include <linux/module.h>
28
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29#include <asm/page.h>
30#include <asm/cmpxchg.h>
6aa8b732 31
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32#undef MMU_DEBUG
33
34#undef AUDIT
35
36#ifdef AUDIT
37static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg);
38#else
39static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg) {}
40#endif
41
42#ifdef MMU_DEBUG
43
44#define pgprintk(x...) do { if (dbg) printk(x); } while (0)
45#define rmap_printk(x...) do { if (dbg) printk(x); } while (0)
46
47#else
48
49#define pgprintk(x...) do { } while (0)
50#define rmap_printk(x...) do { } while (0)
51
52#endif
53
54#if defined(MMU_DEBUG) || defined(AUDIT)
55static int dbg = 1;
56#endif
6aa8b732 57
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58#ifndef MMU_DEBUG
59#define ASSERT(x) do { } while (0)
60#else
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61#define ASSERT(x) \
62 if (!(x)) { \
63 printk(KERN_WARNING "assertion failed %s:%d: %s\n", \
64 __FILE__, __LINE__, #x); \
65 }
d6c69ee9 66#endif
6aa8b732 67
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68#define PT64_PT_BITS 9
69#define PT64_ENT_PER_PAGE (1 << PT64_PT_BITS)
70#define PT32_PT_BITS 10
71#define PT32_ENT_PER_PAGE (1 << PT32_PT_BITS)
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72
73#define PT_WRITABLE_SHIFT 1
74
75#define PT_PRESENT_MASK (1ULL << 0)
76#define PT_WRITABLE_MASK (1ULL << PT_WRITABLE_SHIFT)
77#define PT_USER_MASK (1ULL << 2)
78#define PT_PWT_MASK (1ULL << 3)
79#define PT_PCD_MASK (1ULL << 4)
80#define PT_ACCESSED_MASK (1ULL << 5)
81#define PT_DIRTY_MASK (1ULL << 6)
82#define PT_PAGE_SIZE_MASK (1ULL << 7)
83#define PT_PAT_MASK (1ULL << 7)
84#define PT_GLOBAL_MASK (1ULL << 8)
85#define PT64_NX_MASK (1ULL << 63)
86
87#define PT_PAT_SHIFT 7
88#define PT_DIR_PAT_SHIFT 12
89#define PT_DIR_PAT_MASK (1ULL << PT_DIR_PAT_SHIFT)
90
91#define PT32_DIR_PSE36_SIZE 4
92#define PT32_DIR_PSE36_SHIFT 13
93#define PT32_DIR_PSE36_MASK (((1ULL << PT32_DIR_PSE36_SIZE) - 1) << PT32_DIR_PSE36_SHIFT)
94
95
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96#define PT_FIRST_AVAIL_BITS_SHIFT 9
97#define PT64_SECOND_AVAIL_BITS_SHIFT 52
98
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99#define PT_SHADOW_IO_MARK (1ULL << PT_FIRST_AVAIL_BITS_SHIFT)
100
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101#define VALID_PAGE(x) ((x) != INVALID_PAGE)
102
103#define PT64_LEVEL_BITS 9
104
105#define PT64_LEVEL_SHIFT(level) \
106 ( PAGE_SHIFT + (level - 1) * PT64_LEVEL_BITS )
107
108#define PT64_LEVEL_MASK(level) \
109 (((1ULL << PT64_LEVEL_BITS) - 1) << PT64_LEVEL_SHIFT(level))
110
111#define PT64_INDEX(address, level)\
112 (((address) >> PT64_LEVEL_SHIFT(level)) & ((1 << PT64_LEVEL_BITS) - 1))
113
114
115#define PT32_LEVEL_BITS 10
116
117#define PT32_LEVEL_SHIFT(level) \
118 ( PAGE_SHIFT + (level - 1) * PT32_LEVEL_BITS )
119
120#define PT32_LEVEL_MASK(level) \
121 (((1ULL << PT32_LEVEL_BITS) - 1) << PT32_LEVEL_SHIFT(level))
122
123#define PT32_INDEX(address, level)\
124 (((address) >> PT32_LEVEL_SHIFT(level)) & ((1 << PT32_LEVEL_BITS) - 1))
125
126
27aba766 127#define PT64_BASE_ADDR_MASK (((1ULL << 52) - 1) & ~(u64)(PAGE_SIZE-1))
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128#define PT64_DIR_BASE_ADDR_MASK \
129 (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + PT64_LEVEL_BITS)) - 1))
130
131#define PT32_BASE_ADDR_MASK PAGE_MASK
132#define PT32_DIR_BASE_ADDR_MASK \
133 (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + PT32_LEVEL_BITS)) - 1))
134
135
136#define PFERR_PRESENT_MASK (1U << 0)
137#define PFERR_WRITE_MASK (1U << 1)
138#define PFERR_USER_MASK (1U << 2)
73b1087e 139#define PFERR_FETCH_MASK (1U << 4)
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140
141#define PT64_ROOT_LEVEL 4
142#define PT32_ROOT_LEVEL 2
143#define PT32E_ROOT_LEVEL 3
144
145#define PT_DIRECTORY_LEVEL 2
146#define PT_PAGE_TABLE_LEVEL 1
147
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148#define RMAP_EXT 4
149
150struct kvm_rmap_desc {
151 u64 *shadow_ptes[RMAP_EXT];
152 struct kvm_rmap_desc *more;
153};
154
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155static struct kmem_cache *pte_chain_cache;
156static struct kmem_cache *rmap_desc_cache;
d3d25b04 157static struct kmem_cache *mmu_page_header_cache;
b5a33a75 158
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159static u64 __read_mostly shadow_trap_nonpresent_pte;
160static u64 __read_mostly shadow_notrap_nonpresent_pte;
161
162void kvm_mmu_set_nonpresent_ptes(u64 trap_pte, u64 notrap_pte)
163{
164 shadow_trap_nonpresent_pte = trap_pte;
165 shadow_notrap_nonpresent_pte = notrap_pte;
166}
167EXPORT_SYMBOL_GPL(kvm_mmu_set_nonpresent_ptes);
168
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169static int is_write_protection(struct kvm_vcpu *vcpu)
170{
707d92fa 171 return vcpu->cr0 & X86_CR0_WP;
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172}
173
174static int is_cpuid_PSE36(void)
175{
176 return 1;
177}
178
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179static int is_nx(struct kvm_vcpu *vcpu)
180{
181 return vcpu->shadow_efer & EFER_NX;
182}
183
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184static int is_present_pte(unsigned long pte)
185{
186 return pte & PT_PRESENT_MASK;
187}
188
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189static int is_shadow_present_pte(u64 pte)
190{
191 pte &= ~PT_SHADOW_IO_MARK;
192 return pte != shadow_trap_nonpresent_pte
193 && pte != shadow_notrap_nonpresent_pte;
194}
195
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196static int is_writeble_pte(unsigned long pte)
197{
198 return pte & PT_WRITABLE_MASK;
199}
200
201static int is_io_pte(unsigned long pte)
202{
203 return pte & PT_SHADOW_IO_MARK;
204}
205
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206static int is_rmap_pte(u64 pte)
207{
208 return (pte & (PT_WRITABLE_MASK | PT_PRESENT_MASK))
209 == (PT_WRITABLE_MASK | PT_PRESENT_MASK);
210}
211
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212static void set_shadow_pte(u64 *sptep, u64 spte)
213{
214#ifdef CONFIG_X86_64
215 set_64bit((unsigned long *)sptep, spte);
216#else
217 set_64bit((unsigned long long *)sptep, spte);
218#endif
219}
220
e2dec939 221static int mmu_topup_memory_cache(struct kvm_mmu_memory_cache *cache,
2e3e5882 222 struct kmem_cache *base_cache, int min)
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223{
224 void *obj;
225
226 if (cache->nobjs >= min)
e2dec939 227 return 0;
714b93da 228 while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
2e3e5882 229 obj = kmem_cache_zalloc(base_cache, GFP_KERNEL);
714b93da 230 if (!obj)
e2dec939 231 return -ENOMEM;
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232 cache->objects[cache->nobjs++] = obj;
233 }
e2dec939 234 return 0;
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235}
236
237static void mmu_free_memory_cache(struct kvm_mmu_memory_cache *mc)
238{
239 while (mc->nobjs)
240 kfree(mc->objects[--mc->nobjs]);
241}
242
c1158e63 243static int mmu_topup_memory_cache_page(struct kvm_mmu_memory_cache *cache,
2e3e5882 244 int min)
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245{
246 struct page *page;
247
248 if (cache->nobjs >= min)
249 return 0;
250 while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
2e3e5882 251 page = alloc_page(GFP_KERNEL);
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252 if (!page)
253 return -ENOMEM;
254 set_page_private(page, 0);
255 cache->objects[cache->nobjs++] = page_address(page);
256 }
257 return 0;
258}
259
260static void mmu_free_memory_cache_page(struct kvm_mmu_memory_cache *mc)
261{
262 while (mc->nobjs)
c4d198d5 263 free_page((unsigned long)mc->objects[--mc->nobjs]);
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264}
265
2e3e5882 266static int mmu_topup_memory_caches(struct kvm_vcpu *vcpu)
714b93da 267{
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268 int r;
269
2e3e5882 270 kvm_mmu_free_some_pages(vcpu);
e2dec939 271 r = mmu_topup_memory_cache(&vcpu->mmu_pte_chain_cache,
2e3e5882 272 pte_chain_cache, 4);
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273 if (r)
274 goto out;
275 r = mmu_topup_memory_cache(&vcpu->mmu_rmap_desc_cache,
2e3e5882 276 rmap_desc_cache, 1);
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277 if (r)
278 goto out;
290fc38d 279 r = mmu_topup_memory_cache_page(&vcpu->mmu_page_cache, 8);
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280 if (r)
281 goto out;
282 r = mmu_topup_memory_cache(&vcpu->mmu_page_header_cache,
2e3e5882 283 mmu_page_header_cache, 4);
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284out:
285 return r;
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286}
287
288static void mmu_free_memory_caches(struct kvm_vcpu *vcpu)
289{
290 mmu_free_memory_cache(&vcpu->mmu_pte_chain_cache);
291 mmu_free_memory_cache(&vcpu->mmu_rmap_desc_cache);
c1158e63 292 mmu_free_memory_cache_page(&vcpu->mmu_page_cache);
d3d25b04 293 mmu_free_memory_cache(&vcpu->mmu_page_header_cache);
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294}
295
296static void *mmu_memory_cache_alloc(struct kvm_mmu_memory_cache *mc,
297 size_t size)
298{
299 void *p;
300
301 BUG_ON(!mc->nobjs);
302 p = mc->objects[--mc->nobjs];
303 memset(p, 0, size);
304 return p;
305}
306
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307static struct kvm_pte_chain *mmu_alloc_pte_chain(struct kvm_vcpu *vcpu)
308{
309 return mmu_memory_cache_alloc(&vcpu->mmu_pte_chain_cache,
310 sizeof(struct kvm_pte_chain));
311}
312
90cb0529 313static void mmu_free_pte_chain(struct kvm_pte_chain *pc)
714b93da 314{
90cb0529 315 kfree(pc);
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316}
317
318static struct kvm_rmap_desc *mmu_alloc_rmap_desc(struct kvm_vcpu *vcpu)
319{
320 return mmu_memory_cache_alloc(&vcpu->mmu_rmap_desc_cache,
321 sizeof(struct kvm_rmap_desc));
322}
323
90cb0529 324static void mmu_free_rmap_desc(struct kvm_rmap_desc *rd)
714b93da 325{
90cb0529 326 kfree(rd);
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327}
328
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329/*
330 * Take gfn and return the reverse mapping to it.
331 * Note: gfn must be unaliased before this function get called
332 */
333
334static unsigned long *gfn_to_rmap(struct kvm *kvm, gfn_t gfn)
335{
336 struct kvm_memory_slot *slot;
337
338 slot = gfn_to_memslot(kvm, gfn);
339 return &slot->rmap[gfn - slot->base_gfn];
340}
341
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342/*
343 * Reverse mapping data structures:
344 *
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345 * If rmapp bit zero is zero, then rmapp point to the shadw page table entry
346 * that points to page_address(page).
cd4a4e53 347 *
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348 * If rmapp bit zero is one, (then rmap & ~1) points to a struct kvm_rmap_desc
349 * containing more mappings.
cd4a4e53 350 */
290fc38d 351static void rmap_add(struct kvm_vcpu *vcpu, u64 *spte, gfn_t gfn)
cd4a4e53 352{
290fc38d 353 struct kvm_mmu_page *page;
cd4a4e53 354 struct kvm_rmap_desc *desc;
290fc38d 355 unsigned long *rmapp;
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356 int i;
357
358 if (!is_rmap_pte(*spte))
359 return;
290fc38d
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360 gfn = unalias_gfn(vcpu->kvm, gfn);
361 page = page_header(__pa(spte));
362 page->gfns[spte - page->spt] = gfn;
363 rmapp = gfn_to_rmap(vcpu->kvm, gfn);
364 if (!*rmapp) {
cd4a4e53 365 rmap_printk("rmap_add: %p %llx 0->1\n", spte, *spte);
290fc38d
IE
366 *rmapp = (unsigned long)spte;
367 } else if (!(*rmapp & 1)) {
cd4a4e53 368 rmap_printk("rmap_add: %p %llx 1->many\n", spte, *spte);
714b93da 369 desc = mmu_alloc_rmap_desc(vcpu);
290fc38d 370 desc->shadow_ptes[0] = (u64 *)*rmapp;
cd4a4e53 371 desc->shadow_ptes[1] = spte;
290fc38d 372 *rmapp = (unsigned long)desc | 1;
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373 } else {
374 rmap_printk("rmap_add: %p %llx many->many\n", spte, *spte);
290fc38d 375 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
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376 while (desc->shadow_ptes[RMAP_EXT-1] && desc->more)
377 desc = desc->more;
378 if (desc->shadow_ptes[RMAP_EXT-1]) {
714b93da 379 desc->more = mmu_alloc_rmap_desc(vcpu);
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380 desc = desc->more;
381 }
382 for (i = 0; desc->shadow_ptes[i]; ++i)
383 ;
384 desc->shadow_ptes[i] = spte;
385 }
386}
387
290fc38d 388static void rmap_desc_remove_entry(unsigned long *rmapp,
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389 struct kvm_rmap_desc *desc,
390 int i,
391 struct kvm_rmap_desc *prev_desc)
392{
393 int j;
394
395 for (j = RMAP_EXT - 1; !desc->shadow_ptes[j] && j > i; --j)
396 ;
397 desc->shadow_ptes[i] = desc->shadow_ptes[j];
11718b4d 398 desc->shadow_ptes[j] = NULL;
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399 if (j != 0)
400 return;
401 if (!prev_desc && !desc->more)
290fc38d 402 *rmapp = (unsigned long)desc->shadow_ptes[0];
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403 else
404 if (prev_desc)
405 prev_desc->more = desc->more;
406 else
290fc38d 407 *rmapp = (unsigned long)desc->more | 1;
90cb0529 408 mmu_free_rmap_desc(desc);
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409}
410
290fc38d 411static void rmap_remove(struct kvm *kvm, u64 *spte)
cd4a4e53 412{
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413 struct kvm_rmap_desc *desc;
414 struct kvm_rmap_desc *prev_desc;
290fc38d
IE
415 struct kvm_mmu_page *page;
416 unsigned long *rmapp;
cd4a4e53
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417 int i;
418
419 if (!is_rmap_pte(*spte))
420 return;
290fc38d
IE
421 page = page_header(__pa(spte));
422 rmapp = gfn_to_rmap(kvm, page->gfns[spte - page->spt]);
423 if (!*rmapp) {
cd4a4e53
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424 printk(KERN_ERR "rmap_remove: %p %llx 0->BUG\n", spte, *spte);
425 BUG();
290fc38d 426 } else if (!(*rmapp & 1)) {
cd4a4e53 427 rmap_printk("rmap_remove: %p %llx 1->0\n", spte, *spte);
290fc38d 428 if ((u64 *)*rmapp != spte) {
cd4a4e53
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429 printk(KERN_ERR "rmap_remove: %p %llx 1->BUG\n",
430 spte, *spte);
431 BUG();
432 }
290fc38d 433 *rmapp = 0;
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434 } else {
435 rmap_printk("rmap_remove: %p %llx many->many\n", spte, *spte);
290fc38d 436 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
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437 prev_desc = NULL;
438 while (desc) {
439 for (i = 0; i < RMAP_EXT && desc->shadow_ptes[i]; ++i)
440 if (desc->shadow_ptes[i] == spte) {
290fc38d 441 rmap_desc_remove_entry(rmapp,
714b93da 442 desc, i,
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443 prev_desc);
444 return;
445 }
446 prev_desc = desc;
447 desc = desc->more;
448 }
449 BUG();
450 }
451}
452
714b93da 453static void rmap_write_protect(struct kvm_vcpu *vcpu, u64 gfn)
374cbac0 454{
374cbac0 455 struct kvm_rmap_desc *desc;
290fc38d 456 unsigned long *rmapp;
374cbac0
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457 u64 *spte;
458
290fc38d
IE
459 gfn = unalias_gfn(vcpu->kvm, gfn);
460 rmapp = gfn_to_rmap(vcpu->kvm, gfn);
374cbac0 461
290fc38d
IE
462 while (*rmapp) {
463 if (!(*rmapp & 1))
464 spte = (u64 *)*rmapp;
374cbac0 465 else {
290fc38d 466 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
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467 spte = desc->shadow_ptes[0];
468 }
469 BUG_ON(!spte);
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470 BUG_ON(!(*spte & PT_PRESENT_MASK));
471 BUG_ON(!(*spte & PT_WRITABLE_MASK));
472 rmap_printk("rmap_write_protect: spte %p %llx\n", spte, *spte);
290fc38d 473 rmap_remove(vcpu->kvm, spte);
e663ee64 474 set_shadow_pte(spte, *spte & ~PT_WRITABLE_MASK);
88a97f0b 475 kvm_flush_remote_tlbs(vcpu->kvm);
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476 }
477}
478
d6c69ee9 479#ifdef MMU_DEBUG
47ad8e68 480static int is_empty_shadow_page(u64 *spt)
6aa8b732 481{
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482 u64 *pos;
483 u64 *end;
484
47ad8e68 485 for (pos = spt, end = pos + PAGE_SIZE / sizeof(u64); pos != end; pos++)
c7addb90 486 if ((*pos & ~PT_SHADOW_IO_MARK) != shadow_trap_nonpresent_pte) {
139bdb2d
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487 printk(KERN_ERR "%s: %p %llx\n", __FUNCTION__,
488 pos, *pos);
6aa8b732 489 return 0;
139bdb2d 490 }
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491 return 1;
492}
d6c69ee9 493#endif
6aa8b732 494
90cb0529 495static void kvm_mmu_free_page(struct kvm *kvm,
4b02d6da 496 struct kvm_mmu_page *page_head)
260746c0 497{
47ad8e68 498 ASSERT(is_empty_shadow_page(page_head->spt));
d3d25b04 499 list_del(&page_head->link);
c1158e63 500 __free_page(virt_to_page(page_head->spt));
290fc38d 501 __free_page(virt_to_page(page_head->gfns));
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502 kfree(page_head);
503 ++kvm->n_free_mmu_pages;
260746c0
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504}
505
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506static unsigned kvm_page_table_hashfn(gfn_t gfn)
507{
508 return gfn;
509}
510
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511static struct kvm_mmu_page *kvm_mmu_alloc_page(struct kvm_vcpu *vcpu,
512 u64 *parent_pte)
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513{
514 struct kvm_mmu_page *page;
515
d3d25b04 516 if (!vcpu->kvm->n_free_mmu_pages)
25c0de2c 517 return NULL;
6aa8b732 518
d3d25b04
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519 page = mmu_memory_cache_alloc(&vcpu->mmu_page_header_cache,
520 sizeof *page);
521 page->spt = mmu_memory_cache_alloc(&vcpu->mmu_page_cache, PAGE_SIZE);
290fc38d 522 page->gfns = mmu_memory_cache_alloc(&vcpu->mmu_page_cache, PAGE_SIZE);
d3d25b04
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523 set_page_private(virt_to_page(page->spt), (unsigned long)page);
524 list_add(&page->link, &vcpu->kvm->active_mmu_pages);
47ad8e68 525 ASSERT(is_empty_shadow_page(page->spt));
6aa8b732 526 page->slot_bitmap = 0;
cea0f0e7 527 page->multimapped = 0;
6aa8b732 528 page->parent_pte = parent_pte;
ebeace86 529 --vcpu->kvm->n_free_mmu_pages;
25c0de2c 530 return page;
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531}
532
714b93da
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533static void mmu_page_add_parent_pte(struct kvm_vcpu *vcpu,
534 struct kvm_mmu_page *page, u64 *parent_pte)
cea0f0e7
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535{
536 struct kvm_pte_chain *pte_chain;
537 struct hlist_node *node;
538 int i;
539
540 if (!parent_pte)
541 return;
542 if (!page->multimapped) {
543 u64 *old = page->parent_pte;
544
545 if (!old) {
546 page->parent_pte = parent_pte;
547 return;
548 }
549 page->multimapped = 1;
714b93da 550 pte_chain = mmu_alloc_pte_chain(vcpu);
cea0f0e7
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551 INIT_HLIST_HEAD(&page->parent_ptes);
552 hlist_add_head(&pte_chain->link, &page->parent_ptes);
553 pte_chain->parent_ptes[0] = old;
554 }
555 hlist_for_each_entry(pte_chain, node, &page->parent_ptes, link) {
556 if (pte_chain->parent_ptes[NR_PTE_CHAIN_ENTRIES-1])
557 continue;
558 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i)
559 if (!pte_chain->parent_ptes[i]) {
560 pte_chain->parent_ptes[i] = parent_pte;
561 return;
562 }
563 }
714b93da 564 pte_chain = mmu_alloc_pte_chain(vcpu);
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565 BUG_ON(!pte_chain);
566 hlist_add_head(&pte_chain->link, &page->parent_ptes);
567 pte_chain->parent_ptes[0] = parent_pte;
568}
569
90cb0529 570static void mmu_page_remove_parent_pte(struct kvm_mmu_page *page,
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571 u64 *parent_pte)
572{
573 struct kvm_pte_chain *pte_chain;
574 struct hlist_node *node;
575 int i;
576
577 if (!page->multimapped) {
578 BUG_ON(page->parent_pte != parent_pte);
579 page->parent_pte = NULL;
580 return;
581 }
582 hlist_for_each_entry(pte_chain, node, &page->parent_ptes, link)
583 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
584 if (!pte_chain->parent_ptes[i])
585 break;
586 if (pte_chain->parent_ptes[i] != parent_pte)
587 continue;
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588 while (i + 1 < NR_PTE_CHAIN_ENTRIES
589 && pte_chain->parent_ptes[i + 1]) {
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590 pte_chain->parent_ptes[i]
591 = pte_chain->parent_ptes[i + 1];
592 ++i;
593 }
594 pte_chain->parent_ptes[i] = NULL;
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595 if (i == 0) {
596 hlist_del(&pte_chain->link);
90cb0529 597 mmu_free_pte_chain(pte_chain);
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598 if (hlist_empty(&page->parent_ptes)) {
599 page->multimapped = 0;
600 page->parent_pte = NULL;
601 }
602 }
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603 return;
604 }
605 BUG();
606}
607
608static struct kvm_mmu_page *kvm_mmu_lookup_page(struct kvm_vcpu *vcpu,
609 gfn_t gfn)
610{
611 unsigned index;
612 struct hlist_head *bucket;
613 struct kvm_mmu_page *page;
614 struct hlist_node *node;
615
616 pgprintk("%s: looking for gfn %lx\n", __FUNCTION__, gfn);
617 index = kvm_page_table_hashfn(gfn) % KVM_NUM_MMU_PAGES;
618 bucket = &vcpu->kvm->mmu_page_hash[index];
619 hlist_for_each_entry(page, node, bucket, hash_link)
620 if (page->gfn == gfn && !page->role.metaphysical) {
621 pgprintk("%s: found role %x\n",
622 __FUNCTION__, page->role.word);
623 return page;
624 }
625 return NULL;
626}
627
628static struct kvm_mmu_page *kvm_mmu_get_page(struct kvm_vcpu *vcpu,
629 gfn_t gfn,
630 gva_t gaddr,
631 unsigned level,
632 int metaphysical,
d28c6cfb 633 unsigned hugepage_access,
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634 u64 *parent_pte)
635{
636 union kvm_mmu_page_role role;
637 unsigned index;
638 unsigned quadrant;
639 struct hlist_head *bucket;
640 struct kvm_mmu_page *page;
641 struct hlist_node *node;
642
643 role.word = 0;
644 role.glevels = vcpu->mmu.root_level;
645 role.level = level;
646 role.metaphysical = metaphysical;
d28c6cfb 647 role.hugepage_access = hugepage_access;
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648 if (vcpu->mmu.root_level <= PT32_ROOT_LEVEL) {
649 quadrant = gaddr >> (PAGE_SHIFT + (PT64_PT_BITS * level));
650 quadrant &= (1 << ((PT32_PT_BITS - PT64_PT_BITS) * level)) - 1;
651 role.quadrant = quadrant;
652 }
653 pgprintk("%s: looking gfn %lx role %x\n", __FUNCTION__,
654 gfn, role.word);
655 index = kvm_page_table_hashfn(gfn) % KVM_NUM_MMU_PAGES;
656 bucket = &vcpu->kvm->mmu_page_hash[index];
657 hlist_for_each_entry(page, node, bucket, hash_link)
658 if (page->gfn == gfn && page->role.word == role.word) {
714b93da 659 mmu_page_add_parent_pte(vcpu, page, parent_pte);
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660 pgprintk("%s: found\n", __FUNCTION__);
661 return page;
662 }
663 page = kvm_mmu_alloc_page(vcpu, parent_pte);
664 if (!page)
665 return page;
666 pgprintk("%s: adding gfn %lx role %x\n", __FUNCTION__, gfn, role.word);
667 page->gfn = gfn;
668 page->role = role;
669 hlist_add_head(&page->hash_link, bucket);
c7addb90 670 vcpu->mmu.prefetch_page(vcpu, page);
374cbac0 671 if (!metaphysical)
714b93da 672 rmap_write_protect(vcpu, gfn);
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673 return page;
674}
675
90cb0529 676static void kvm_mmu_page_unlink_children(struct kvm *kvm,
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677 struct kvm_mmu_page *page)
678{
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679 unsigned i;
680 u64 *pt;
681 u64 ent;
682
47ad8e68 683 pt = page->spt;
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684
685 if (page->role.level == PT_PAGE_TABLE_LEVEL) {
686 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
c7addb90 687 if (is_shadow_present_pte(pt[i]))
290fc38d 688 rmap_remove(kvm, &pt[i]);
c7addb90 689 pt[i] = shadow_trap_nonpresent_pte;
697fe2e2 690 }
90cb0529 691 kvm_flush_remote_tlbs(kvm);
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692 return;
693 }
694
695 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
696 ent = pt[i];
697
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698 pt[i] = shadow_trap_nonpresent_pte;
699 if (!is_shadow_present_pte(ent))
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700 continue;
701 ent &= PT64_BASE_ADDR_MASK;
90cb0529 702 mmu_page_remove_parent_pte(page_header(ent), &pt[i]);
697fe2e2 703 }
90cb0529 704 kvm_flush_remote_tlbs(kvm);
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705}
706
90cb0529 707static void kvm_mmu_put_page(struct kvm_mmu_page *page,
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708 u64 *parent_pte)
709{
90cb0529 710 mmu_page_remove_parent_pte(page, parent_pte);
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711}
712
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713static void kvm_mmu_reset_last_pte_updated(struct kvm *kvm)
714{
715 int i;
716
717 for (i = 0; i < KVM_MAX_VCPUS; ++i)
718 if (kvm->vcpus[i])
719 kvm->vcpus[i]->last_pte_updated = NULL;
720}
721
90cb0529 722static void kvm_mmu_zap_page(struct kvm *kvm,
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723 struct kvm_mmu_page *page)
724{
725 u64 *parent_pte;
726
727 while (page->multimapped || page->parent_pte) {
728 if (!page->multimapped)
729 parent_pte = page->parent_pte;
730 else {
731 struct kvm_pte_chain *chain;
732
733 chain = container_of(page->parent_ptes.first,
734 struct kvm_pte_chain, link);
735 parent_pte = chain->parent_ptes[0];
736 }
697fe2e2 737 BUG_ON(!parent_pte);
90cb0529 738 kvm_mmu_put_page(page, parent_pte);
c7addb90 739 set_shadow_pte(parent_pte, shadow_trap_nonpresent_pte);
a436036b 740 }
90cb0529 741 kvm_mmu_page_unlink_children(kvm, page);
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742 if (!page->root_count) {
743 hlist_del(&page->hash_link);
90cb0529 744 kvm_mmu_free_page(kvm, page);
36868f7b 745 } else
90cb0529 746 list_move(&page->link, &kvm->active_mmu_pages);
12b7d28f 747 kvm_mmu_reset_last_pte_updated(kvm);
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748}
749
750static int kvm_mmu_unprotect_page(struct kvm_vcpu *vcpu, gfn_t gfn)
751{
752 unsigned index;
753 struct hlist_head *bucket;
754 struct kvm_mmu_page *page;
755 struct hlist_node *node, *n;
756 int r;
757
758 pgprintk("%s: looking for gfn %lx\n", __FUNCTION__, gfn);
759 r = 0;
760 index = kvm_page_table_hashfn(gfn) % KVM_NUM_MMU_PAGES;
761 bucket = &vcpu->kvm->mmu_page_hash[index];
762 hlist_for_each_entry_safe(page, node, n, bucket, hash_link)
763 if (page->gfn == gfn && !page->role.metaphysical) {
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764 pgprintk("%s: gfn %lx role %x\n", __FUNCTION__, gfn,
765 page->role.word);
90cb0529 766 kvm_mmu_zap_page(vcpu->kvm, page);
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767 r = 1;
768 }
769 return r;
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770}
771
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772static void mmu_unshadow(struct kvm_vcpu *vcpu, gfn_t gfn)
773{
774 struct kvm_mmu_page *page;
775
776 while ((page = kvm_mmu_lookup_page(vcpu, gfn)) != NULL) {
777 pgprintk("%s: zap %lx %x\n",
778 __FUNCTION__, gfn, page->role.word);
90cb0529 779 kvm_mmu_zap_page(vcpu->kvm, page);
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780 }
781}
782
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783static void page_header_update_slot(struct kvm *kvm, void *pte, gpa_t gpa)
784{
785 int slot = memslot_id(kvm, gfn_to_memslot(kvm, gpa >> PAGE_SHIFT));
786 struct kvm_mmu_page *page_head = page_header(__pa(pte));
787
788 __set_bit(slot, &page_head->slot_bitmap);
789}
790
791hpa_t safe_gpa_to_hpa(struct kvm_vcpu *vcpu, gpa_t gpa)
792{
793 hpa_t hpa = gpa_to_hpa(vcpu, gpa);
794
795 return is_error_hpa(hpa) ? bad_page_address | (gpa & ~PAGE_MASK): hpa;
796}
797
798hpa_t gpa_to_hpa(struct kvm_vcpu *vcpu, gpa_t gpa)
799{
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800 struct page *page;
801
802 ASSERT((gpa & HPA_ERR_MASK) == 0);
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803 page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
804 if (!page)
6aa8b732 805 return gpa | HPA_ERR_MASK;
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806 return ((hpa_t)page_to_pfn(page) << PAGE_SHIFT)
807 | (gpa & (PAGE_SIZE-1));
808}
809
810hpa_t gva_to_hpa(struct kvm_vcpu *vcpu, gva_t gva)
811{
812 gpa_t gpa = vcpu->mmu.gva_to_gpa(vcpu, gva);
813
814 if (gpa == UNMAPPED_GVA)
815 return UNMAPPED_GVA;
816 return gpa_to_hpa(vcpu, gpa);
817}
818
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819struct page *gva_to_page(struct kvm_vcpu *vcpu, gva_t gva)
820{
821 gpa_t gpa = vcpu->mmu.gva_to_gpa(vcpu, gva);
822
823 if (gpa == UNMAPPED_GVA)
824 return NULL;
825 return pfn_to_page(gpa_to_hpa(vcpu, gpa) >> PAGE_SHIFT);
826}
827
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828static void nonpaging_new_cr3(struct kvm_vcpu *vcpu)
829{
830}
831
832static int nonpaging_map(struct kvm_vcpu *vcpu, gva_t v, hpa_t p)
833{
834 int level = PT32E_ROOT_LEVEL;
835 hpa_t table_addr = vcpu->mmu.root_hpa;
836
837 for (; ; level--) {
838 u32 index = PT64_INDEX(v, level);
839 u64 *table;
cea0f0e7 840 u64 pte;
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841
842 ASSERT(VALID_PAGE(table_addr));
843 table = __va(table_addr);
844
845 if (level == 1) {
cea0f0e7 846 pte = table[index];
c7addb90 847 if (is_shadow_present_pte(pte) && is_writeble_pte(pte))
cea0f0e7 848 return 0;
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849 mark_page_dirty(vcpu->kvm, v >> PAGE_SHIFT);
850 page_header_update_slot(vcpu->kvm, table, v);
851 table[index] = p | PT_PRESENT_MASK | PT_WRITABLE_MASK |
852 PT_USER_MASK;
290fc38d 853 rmap_add(vcpu, &table[index], v >> PAGE_SHIFT);
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854 return 0;
855 }
856
c7addb90 857 if (table[index] == shadow_trap_nonpresent_pte) {
25c0de2c 858 struct kvm_mmu_page *new_table;
cea0f0e7 859 gfn_t pseudo_gfn;
6aa8b732 860
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861 pseudo_gfn = (v & PT64_DIR_BASE_ADDR_MASK)
862 >> PAGE_SHIFT;
863 new_table = kvm_mmu_get_page(vcpu, pseudo_gfn,
864 v, level - 1,
d28c6cfb 865 1, 0, &table[index]);
25c0de2c 866 if (!new_table) {
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867 pgprintk("nonpaging_map: ENOMEM\n");
868 return -ENOMEM;
869 }
870
47ad8e68 871 table[index] = __pa(new_table->spt) | PT_PRESENT_MASK
25c0de2c 872 | PT_WRITABLE_MASK | PT_USER_MASK;
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873 }
874 table_addr = table[index] & PT64_BASE_ADDR_MASK;
875 }
876}
877
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878static void nonpaging_prefetch_page(struct kvm_vcpu *vcpu,
879 struct kvm_mmu_page *sp)
880{
881 int i;
882
883 for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
884 sp->spt[i] = shadow_trap_nonpresent_pte;
885}
886
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887static void mmu_free_roots(struct kvm_vcpu *vcpu)
888{
889 int i;
3bb65a22 890 struct kvm_mmu_page *page;
17ac10ad 891
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892 if (!VALID_PAGE(vcpu->mmu.root_hpa))
893 return;
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894#ifdef CONFIG_X86_64
895 if (vcpu->mmu.shadow_root_level == PT64_ROOT_LEVEL) {
896 hpa_t root = vcpu->mmu.root_hpa;
897
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898 page = page_header(root);
899 --page->root_count;
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900 vcpu->mmu.root_hpa = INVALID_PAGE;
901 return;
902 }
903#endif
904 for (i = 0; i < 4; ++i) {
905 hpa_t root = vcpu->mmu.pae_root[i];
906
417726a3 907 if (root) {
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908 root &= PT64_BASE_ADDR_MASK;
909 page = page_header(root);
910 --page->root_count;
911 }
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912 vcpu->mmu.pae_root[i] = INVALID_PAGE;
913 }
914 vcpu->mmu.root_hpa = INVALID_PAGE;
915}
916
917static void mmu_alloc_roots(struct kvm_vcpu *vcpu)
918{
919 int i;
cea0f0e7 920 gfn_t root_gfn;
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921 struct kvm_mmu_page *page;
922
cea0f0e7 923 root_gfn = vcpu->cr3 >> PAGE_SHIFT;
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924
925#ifdef CONFIG_X86_64
926 if (vcpu->mmu.shadow_root_level == PT64_ROOT_LEVEL) {
927 hpa_t root = vcpu->mmu.root_hpa;
928
929 ASSERT(!VALID_PAGE(root));
68a99f6d 930 page = kvm_mmu_get_page(vcpu, root_gfn, 0,
d28c6cfb 931 PT64_ROOT_LEVEL, 0, 0, NULL);
47ad8e68 932 root = __pa(page->spt);
3bb65a22 933 ++page->root_count;
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934 vcpu->mmu.root_hpa = root;
935 return;
936 }
937#endif
938 for (i = 0; i < 4; ++i) {
939 hpa_t root = vcpu->mmu.pae_root[i];
940
941 ASSERT(!VALID_PAGE(root));
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942 if (vcpu->mmu.root_level == PT32E_ROOT_LEVEL) {
943 if (!is_present_pte(vcpu->pdptrs[i])) {
944 vcpu->mmu.pae_root[i] = 0;
945 continue;
946 }
cea0f0e7 947 root_gfn = vcpu->pdptrs[i] >> PAGE_SHIFT;
417726a3 948 } else if (vcpu->mmu.root_level == 0)
cea0f0e7 949 root_gfn = 0;
68a99f6d 950 page = kvm_mmu_get_page(vcpu, root_gfn, i << 30,
cea0f0e7 951 PT32_ROOT_LEVEL, !is_paging(vcpu),
d28c6cfb 952 0, NULL);
47ad8e68 953 root = __pa(page->spt);
3bb65a22 954 ++page->root_count;
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955 vcpu->mmu.pae_root[i] = root | PT_PRESENT_MASK;
956 }
957 vcpu->mmu.root_hpa = __pa(vcpu->mmu.pae_root);
958}
959
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960static gpa_t nonpaging_gva_to_gpa(struct kvm_vcpu *vcpu, gva_t vaddr)
961{
962 return vaddr;
963}
964
965static int nonpaging_page_fault(struct kvm_vcpu *vcpu, gva_t gva,
966 u32 error_code)
967{
6aa8b732 968 gpa_t addr = gva;
ebeace86 969 hpa_t paddr;
e2dec939 970 int r;
6aa8b732 971
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972 r = mmu_topup_memory_caches(vcpu);
973 if (r)
974 return r;
714b93da 975
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976 ASSERT(vcpu);
977 ASSERT(VALID_PAGE(vcpu->mmu.root_hpa));
978
6aa8b732 979
ebeace86 980 paddr = gpa_to_hpa(vcpu , addr & PT64_BASE_ADDR_MASK);
6aa8b732 981
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982 if (is_error_hpa(paddr))
983 return 1;
6aa8b732 984
ebeace86 985 return nonpaging_map(vcpu, addr & PAGE_MASK, paddr);
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986}
987
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988static void nonpaging_free(struct kvm_vcpu *vcpu)
989{
17ac10ad 990 mmu_free_roots(vcpu);
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991}
992
993static int nonpaging_init_context(struct kvm_vcpu *vcpu)
994{
995 struct kvm_mmu *context = &vcpu->mmu;
996
997 context->new_cr3 = nonpaging_new_cr3;
998 context->page_fault = nonpaging_page_fault;
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999 context->gva_to_gpa = nonpaging_gva_to_gpa;
1000 context->free = nonpaging_free;
c7addb90 1001 context->prefetch_page = nonpaging_prefetch_page;
cea0f0e7 1002 context->root_level = 0;
6aa8b732 1003 context->shadow_root_level = PT32E_ROOT_LEVEL;
17c3ba9d 1004 context->root_hpa = INVALID_PAGE;
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1005 return 0;
1006}
1007
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1008static void kvm_mmu_flush_tlb(struct kvm_vcpu *vcpu)
1009{
1165f5fe 1010 ++vcpu->stat.tlb_flush;
cbdd1bea 1011 kvm_x86_ops->tlb_flush(vcpu);
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1012}
1013
1014static void paging_new_cr3(struct kvm_vcpu *vcpu)
1015{
374cbac0 1016 pgprintk("%s: cr3 %lx\n", __FUNCTION__, vcpu->cr3);
cea0f0e7 1017 mmu_free_roots(vcpu);
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1018}
1019
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1020static void inject_page_fault(struct kvm_vcpu *vcpu,
1021 u64 addr,
1022 u32 err_code)
1023{
cbdd1bea 1024 kvm_x86_ops->inject_page_fault(vcpu, addr, err_code);
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1025}
1026
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1027static void paging_free(struct kvm_vcpu *vcpu)
1028{
1029 nonpaging_free(vcpu);
1030}
1031
1032#define PTTYPE 64
1033#include "paging_tmpl.h"
1034#undef PTTYPE
1035
1036#define PTTYPE 32
1037#include "paging_tmpl.h"
1038#undef PTTYPE
1039
17ac10ad 1040static int paging64_init_context_common(struct kvm_vcpu *vcpu, int level)
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1041{
1042 struct kvm_mmu *context = &vcpu->mmu;
1043
1044 ASSERT(is_pae(vcpu));
1045 context->new_cr3 = paging_new_cr3;
1046 context->page_fault = paging64_page_fault;
6aa8b732 1047 context->gva_to_gpa = paging64_gva_to_gpa;
c7addb90 1048 context->prefetch_page = paging64_prefetch_page;
6aa8b732 1049 context->free = paging_free;
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1050 context->root_level = level;
1051 context->shadow_root_level = level;
17c3ba9d 1052 context->root_hpa = INVALID_PAGE;
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1053 return 0;
1054}
1055
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1056static int paging64_init_context(struct kvm_vcpu *vcpu)
1057{
1058 return paging64_init_context_common(vcpu, PT64_ROOT_LEVEL);
1059}
1060
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1061static int paging32_init_context(struct kvm_vcpu *vcpu)
1062{
1063 struct kvm_mmu *context = &vcpu->mmu;
1064
1065 context->new_cr3 = paging_new_cr3;
1066 context->page_fault = paging32_page_fault;
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1067 context->gva_to_gpa = paging32_gva_to_gpa;
1068 context->free = paging_free;
c7addb90 1069 context->prefetch_page = paging32_prefetch_page;
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1070 context->root_level = PT32_ROOT_LEVEL;
1071 context->shadow_root_level = PT32E_ROOT_LEVEL;
17c3ba9d 1072 context->root_hpa = INVALID_PAGE;
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1073 return 0;
1074}
1075
1076static int paging32E_init_context(struct kvm_vcpu *vcpu)
1077{
17ac10ad 1078 return paging64_init_context_common(vcpu, PT32E_ROOT_LEVEL);
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1079}
1080
1081static int init_kvm_mmu(struct kvm_vcpu *vcpu)
1082{
1083 ASSERT(vcpu);
1084 ASSERT(!VALID_PAGE(vcpu->mmu.root_hpa));
1085
1086 if (!is_paging(vcpu))
1087 return nonpaging_init_context(vcpu);
a9058ecd 1088 else if (is_long_mode(vcpu))
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1089 return paging64_init_context(vcpu);
1090 else if (is_pae(vcpu))
1091 return paging32E_init_context(vcpu);
1092 else
1093 return paging32_init_context(vcpu);
1094}
1095
1096static void destroy_kvm_mmu(struct kvm_vcpu *vcpu)
1097{
1098 ASSERT(vcpu);
1099 if (VALID_PAGE(vcpu->mmu.root_hpa)) {
1100 vcpu->mmu.free(vcpu);
1101 vcpu->mmu.root_hpa = INVALID_PAGE;
1102 }
1103}
1104
1105int kvm_mmu_reset_context(struct kvm_vcpu *vcpu)
17c3ba9d
AK
1106{
1107 destroy_kvm_mmu(vcpu);
1108 return init_kvm_mmu(vcpu);
1109}
8668a3c4 1110EXPORT_SYMBOL_GPL(kvm_mmu_reset_context);
17c3ba9d
AK
1111
1112int kvm_mmu_load(struct kvm_vcpu *vcpu)
6aa8b732 1113{
714b93da
AK
1114 int r;
1115
11ec2804 1116 mutex_lock(&vcpu->kvm->lock);
e2dec939 1117 r = mmu_topup_memory_caches(vcpu);
17c3ba9d
AK
1118 if (r)
1119 goto out;
1120 mmu_alloc_roots(vcpu);
cbdd1bea 1121 kvm_x86_ops->set_cr3(vcpu, vcpu->mmu.root_hpa);
17c3ba9d 1122 kvm_mmu_flush_tlb(vcpu);
714b93da 1123out:
11ec2804 1124 mutex_unlock(&vcpu->kvm->lock);
714b93da 1125 return r;
6aa8b732 1126}
17c3ba9d
AK
1127EXPORT_SYMBOL_GPL(kvm_mmu_load);
1128
1129void kvm_mmu_unload(struct kvm_vcpu *vcpu)
1130{
1131 mmu_free_roots(vcpu);
1132}
6aa8b732 1133
09072daf 1134static void mmu_pte_write_zap_pte(struct kvm_vcpu *vcpu,
ac1b714e
AK
1135 struct kvm_mmu_page *page,
1136 u64 *spte)
1137{
1138 u64 pte;
1139 struct kvm_mmu_page *child;
1140
1141 pte = *spte;
c7addb90 1142 if (is_shadow_present_pte(pte)) {
ac1b714e 1143 if (page->role.level == PT_PAGE_TABLE_LEVEL)
290fc38d 1144 rmap_remove(vcpu->kvm, spte);
ac1b714e
AK
1145 else {
1146 child = page_header(pte & PT64_BASE_ADDR_MASK);
90cb0529 1147 mmu_page_remove_parent_pte(child, spte);
ac1b714e
AK
1148 }
1149 }
c7addb90 1150 set_shadow_pte(spte, shadow_trap_nonpresent_pte);
d9e368d6 1151 kvm_flush_remote_tlbs(vcpu->kvm);
ac1b714e
AK
1152}
1153
0028425f
AK
1154static void mmu_pte_write_new_pte(struct kvm_vcpu *vcpu,
1155 struct kvm_mmu_page *page,
1156 u64 *spte,
c7addb90
AK
1157 const void *new, int bytes,
1158 int offset_in_pte)
0028425f
AK
1159{
1160 if (page->role.level != PT_PAGE_TABLE_LEVEL)
1161 return;
1162
1163 if (page->role.glevels == PT32_ROOT_LEVEL)
c7addb90
AK
1164 paging32_update_pte(vcpu, page, spte, new, bytes,
1165 offset_in_pte);
0028425f 1166 else
c7addb90
AK
1167 paging64_update_pte(vcpu, page, spte, new, bytes,
1168 offset_in_pte);
0028425f
AK
1169}
1170
12b7d28f
AK
1171static bool last_updated_pte_accessed(struct kvm_vcpu *vcpu)
1172{
1173 u64 *spte = vcpu->last_pte_updated;
1174
1175 return !!(spte && (*spte & PT_ACCESSED_MASK));
1176}
1177
09072daf 1178void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
fe551881 1179 const u8 *new, int bytes)
da4a00f0 1180{
9b7a0325
AK
1181 gfn_t gfn = gpa >> PAGE_SHIFT;
1182 struct kvm_mmu_page *page;
0e7bc4b9 1183 struct hlist_node *node, *n;
9b7a0325
AK
1184 struct hlist_head *bucket;
1185 unsigned index;
1186 u64 *spte;
9b7a0325 1187 unsigned offset = offset_in_page(gpa);
0e7bc4b9 1188 unsigned pte_size;
9b7a0325 1189 unsigned page_offset;
0e7bc4b9 1190 unsigned misaligned;
fce0657f 1191 unsigned quadrant;
9b7a0325 1192 int level;
86a5ba02 1193 int flooded = 0;
ac1b714e 1194 int npte;
9b7a0325 1195
da4a00f0 1196 pgprintk("%s: gpa %llx bytes %d\n", __FUNCTION__, gpa, bytes);
c7addb90 1197 kvm_mmu_audit(vcpu, "pre pte write");
12b7d28f
AK
1198 if (gfn == vcpu->last_pt_write_gfn
1199 && !last_updated_pte_accessed(vcpu)) {
86a5ba02
AK
1200 ++vcpu->last_pt_write_count;
1201 if (vcpu->last_pt_write_count >= 3)
1202 flooded = 1;
1203 } else {
1204 vcpu->last_pt_write_gfn = gfn;
1205 vcpu->last_pt_write_count = 1;
12b7d28f 1206 vcpu->last_pte_updated = NULL;
86a5ba02 1207 }
9b7a0325
AK
1208 index = kvm_page_table_hashfn(gfn) % KVM_NUM_MMU_PAGES;
1209 bucket = &vcpu->kvm->mmu_page_hash[index];
0e7bc4b9 1210 hlist_for_each_entry_safe(page, node, n, bucket, hash_link) {
9b7a0325
AK
1211 if (page->gfn != gfn || page->role.metaphysical)
1212 continue;
0e7bc4b9
AK
1213 pte_size = page->role.glevels == PT32_ROOT_LEVEL ? 4 : 8;
1214 misaligned = (offset ^ (offset + bytes - 1)) & ~(pte_size - 1);
e925c5ba 1215 misaligned |= bytes < 4;
86a5ba02 1216 if (misaligned || flooded) {
0e7bc4b9
AK
1217 /*
1218 * Misaligned accesses are too much trouble to fix
1219 * up; also, they usually indicate a page is not used
1220 * as a page table.
86a5ba02
AK
1221 *
1222 * If we're seeing too many writes to a page,
1223 * it may no longer be a page table, or we may be
1224 * forking, in which case it is better to unmap the
1225 * page.
0e7bc4b9
AK
1226 */
1227 pgprintk("misaligned: gpa %llx bytes %d role %x\n",
1228 gpa, bytes, page->role.word);
90cb0529 1229 kvm_mmu_zap_page(vcpu->kvm, page);
0e7bc4b9
AK
1230 continue;
1231 }
9b7a0325
AK
1232 page_offset = offset;
1233 level = page->role.level;
ac1b714e 1234 npte = 1;
9b7a0325 1235 if (page->role.glevels == PT32_ROOT_LEVEL) {
ac1b714e
AK
1236 page_offset <<= 1; /* 32->64 */
1237 /*
1238 * A 32-bit pde maps 4MB while the shadow pdes map
1239 * only 2MB. So we need to double the offset again
1240 * and zap two pdes instead of one.
1241 */
1242 if (level == PT32_ROOT_LEVEL) {
6b8d0f9b 1243 page_offset &= ~7; /* kill rounding error */
ac1b714e
AK
1244 page_offset <<= 1;
1245 npte = 2;
1246 }
fce0657f 1247 quadrant = page_offset >> PAGE_SHIFT;
9b7a0325 1248 page_offset &= ~PAGE_MASK;
fce0657f
AK
1249 if (quadrant != page->role.quadrant)
1250 continue;
9b7a0325 1251 }
47ad8e68 1252 spte = &page->spt[page_offset / sizeof(*spte)];
ac1b714e 1253 while (npte--) {
09072daf 1254 mmu_pte_write_zap_pte(vcpu, page, spte);
c7addb90
AK
1255 mmu_pte_write_new_pte(vcpu, page, spte, new, bytes,
1256 page_offset & (pte_size - 1));
ac1b714e 1257 ++spte;
9b7a0325 1258 }
9b7a0325 1259 }
c7addb90 1260 kvm_mmu_audit(vcpu, "post pte write");
da4a00f0
AK
1261}
1262
a436036b
AK
1263int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva)
1264{
1265 gpa_t gpa = vcpu->mmu.gva_to_gpa(vcpu, gva);
1266
1267 return kvm_mmu_unprotect_page(vcpu, gpa >> PAGE_SHIFT);
1268}
1269
22d95b12 1270void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu)
ebeace86
AK
1271{
1272 while (vcpu->kvm->n_free_mmu_pages < KVM_REFILL_PAGES) {
1273 struct kvm_mmu_page *page;
1274
1275 page = container_of(vcpu->kvm->active_mmu_pages.prev,
1276 struct kvm_mmu_page, link);
90cb0529 1277 kvm_mmu_zap_page(vcpu->kvm, page);
ebeace86
AK
1278 }
1279}
ebeace86 1280
6aa8b732
AK
1281static void free_mmu_pages(struct kvm_vcpu *vcpu)
1282{
f51234c2 1283 struct kvm_mmu_page *page;
6aa8b732 1284
f51234c2
AK
1285 while (!list_empty(&vcpu->kvm->active_mmu_pages)) {
1286 page = container_of(vcpu->kvm->active_mmu_pages.next,
1287 struct kvm_mmu_page, link);
90cb0529 1288 kvm_mmu_zap_page(vcpu->kvm, page);
f51234c2 1289 }
17ac10ad 1290 free_page((unsigned long)vcpu->mmu.pae_root);
6aa8b732
AK
1291}
1292
1293static int alloc_mmu_pages(struct kvm_vcpu *vcpu)
1294{
17ac10ad 1295 struct page *page;
6aa8b732
AK
1296 int i;
1297
1298 ASSERT(vcpu);
1299
d3d25b04 1300 vcpu->kvm->n_free_mmu_pages = KVM_NUM_MMU_PAGES;
17ac10ad
AK
1301
1302 /*
1303 * When emulating 32-bit mode, cr3 is only 32 bits even on x86_64.
1304 * Therefore we need to allocate shadow page tables in the first
1305 * 4GB of memory, which happens to fit the DMA32 zone.
1306 */
1307 page = alloc_page(GFP_KERNEL | __GFP_DMA32);
1308 if (!page)
1309 goto error_1;
1310 vcpu->mmu.pae_root = page_address(page);
1311 for (i = 0; i < 4; ++i)
1312 vcpu->mmu.pae_root[i] = INVALID_PAGE;
1313
6aa8b732
AK
1314 return 0;
1315
1316error_1:
1317 free_mmu_pages(vcpu);
1318 return -ENOMEM;
1319}
1320
8018c27b 1321int kvm_mmu_create(struct kvm_vcpu *vcpu)
6aa8b732 1322{
6aa8b732
AK
1323 ASSERT(vcpu);
1324 ASSERT(!VALID_PAGE(vcpu->mmu.root_hpa));
6aa8b732 1325
8018c27b
IM
1326 return alloc_mmu_pages(vcpu);
1327}
6aa8b732 1328
8018c27b
IM
1329int kvm_mmu_setup(struct kvm_vcpu *vcpu)
1330{
1331 ASSERT(vcpu);
1332 ASSERT(!VALID_PAGE(vcpu->mmu.root_hpa));
2c264957 1333
8018c27b 1334 return init_kvm_mmu(vcpu);
6aa8b732
AK
1335}
1336
1337void kvm_mmu_destroy(struct kvm_vcpu *vcpu)
1338{
1339 ASSERT(vcpu);
1340
1341 destroy_kvm_mmu(vcpu);
1342 free_mmu_pages(vcpu);
714b93da 1343 mmu_free_memory_caches(vcpu);
6aa8b732
AK
1344}
1345
90cb0529 1346void kvm_mmu_slot_remove_write_access(struct kvm *kvm, int slot)
6aa8b732
AK
1347{
1348 struct kvm_mmu_page *page;
1349
1350 list_for_each_entry(page, &kvm->active_mmu_pages, link) {
1351 int i;
1352 u64 *pt;
1353
1354 if (!test_bit(slot, &page->slot_bitmap))
1355 continue;
1356
47ad8e68 1357 pt = page->spt;
6aa8b732
AK
1358 for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
1359 /* avoid RMW */
cd4a4e53 1360 if (pt[i] & PT_WRITABLE_MASK) {
290fc38d 1361 rmap_remove(kvm, &pt[i]);
6aa8b732 1362 pt[i] &= ~PT_WRITABLE_MASK;
cd4a4e53 1363 }
6aa8b732
AK
1364 }
1365}
37a7d8b0 1366
90cb0529 1367void kvm_mmu_zap_all(struct kvm *kvm)
e0fa826f 1368{
90cb0529 1369 struct kvm_mmu_page *page, *node;
e0fa826f 1370
90cb0529
AK
1371 list_for_each_entry_safe(page, node, &kvm->active_mmu_pages, link)
1372 kvm_mmu_zap_page(kvm, page);
e0fa826f 1373
90cb0529 1374 kvm_flush_remote_tlbs(kvm);
e0fa826f
DL
1375}
1376
b5a33a75
AK
1377void kvm_mmu_module_exit(void)
1378{
1379 if (pte_chain_cache)
1380 kmem_cache_destroy(pte_chain_cache);
1381 if (rmap_desc_cache)
1382 kmem_cache_destroy(rmap_desc_cache);
d3d25b04
AK
1383 if (mmu_page_header_cache)
1384 kmem_cache_destroy(mmu_page_header_cache);
b5a33a75
AK
1385}
1386
1387int kvm_mmu_module_init(void)
1388{
1389 pte_chain_cache = kmem_cache_create("kvm_pte_chain",
1390 sizeof(struct kvm_pte_chain),
20c2df83 1391 0, 0, NULL);
b5a33a75
AK
1392 if (!pte_chain_cache)
1393 goto nomem;
1394 rmap_desc_cache = kmem_cache_create("kvm_rmap_desc",
1395 sizeof(struct kvm_rmap_desc),
20c2df83 1396 0, 0, NULL);
b5a33a75
AK
1397 if (!rmap_desc_cache)
1398 goto nomem;
1399
d3d25b04
AK
1400 mmu_page_header_cache = kmem_cache_create("kvm_mmu_page_header",
1401 sizeof(struct kvm_mmu_page),
20c2df83 1402 0, 0, NULL);
d3d25b04
AK
1403 if (!mmu_page_header_cache)
1404 goto nomem;
1405
b5a33a75
AK
1406 return 0;
1407
1408nomem:
1409 kvm_mmu_module_exit();
1410 return -ENOMEM;
1411}
1412
37a7d8b0
AK
1413#ifdef AUDIT
1414
1415static const char *audit_msg;
1416
1417static gva_t canonicalize(gva_t gva)
1418{
1419#ifdef CONFIG_X86_64
1420 gva = (long long)(gva << 16) >> 16;
1421#endif
1422 return gva;
1423}
1424
1425static void audit_mappings_page(struct kvm_vcpu *vcpu, u64 page_pte,
1426 gva_t va, int level)
1427{
1428 u64 *pt = __va(page_pte & PT64_BASE_ADDR_MASK);
1429 int i;
1430 gva_t va_delta = 1ul << (PAGE_SHIFT + 9 * (level - 1));
1431
1432 for (i = 0; i < PT64_ENT_PER_PAGE; ++i, va += va_delta) {
1433 u64 ent = pt[i];
1434
c7addb90 1435 if (ent == shadow_trap_nonpresent_pte)
37a7d8b0
AK
1436 continue;
1437
1438 va = canonicalize(va);
c7addb90
AK
1439 if (level > 1) {
1440 if (ent == shadow_notrap_nonpresent_pte)
1441 printk(KERN_ERR "audit: (%s) nontrapping pte"
1442 " in nonleaf level: levels %d gva %lx"
1443 " level %d pte %llx\n", audit_msg,
1444 vcpu->mmu.root_level, va, level, ent);
1445
37a7d8b0 1446 audit_mappings_page(vcpu, ent, va, level - 1);
c7addb90 1447 } else {
37a7d8b0
AK
1448 gpa_t gpa = vcpu->mmu.gva_to_gpa(vcpu, va);
1449 hpa_t hpa = gpa_to_hpa(vcpu, gpa);
1450
c7addb90 1451 if (is_shadow_present_pte(ent)
37a7d8b0 1452 && (ent & PT64_BASE_ADDR_MASK) != hpa)
c7addb90
AK
1453 printk(KERN_ERR "xx audit error: (%s) levels %d"
1454 " gva %lx gpa %llx hpa %llx ent %llx %d\n",
37a7d8b0 1455 audit_msg, vcpu->mmu.root_level,
c7addb90
AK
1456 va, gpa, hpa, ent, is_shadow_present_pte(ent));
1457 else if (ent == shadow_notrap_nonpresent_pte
1458 && !is_error_hpa(hpa))
1459 printk(KERN_ERR "audit: (%s) notrap shadow,"
1460 " valid guest gva %lx\n", audit_msg, va);
1461
37a7d8b0
AK
1462 }
1463 }
1464}
1465
1466static void audit_mappings(struct kvm_vcpu *vcpu)
1467{
1ea252af 1468 unsigned i;
37a7d8b0
AK
1469
1470 if (vcpu->mmu.root_level == 4)
1471 audit_mappings_page(vcpu, vcpu->mmu.root_hpa, 0, 4);
1472 else
1473 for (i = 0; i < 4; ++i)
1474 if (vcpu->mmu.pae_root[i] & PT_PRESENT_MASK)
1475 audit_mappings_page(vcpu,
1476 vcpu->mmu.pae_root[i],
1477 i << 30,
1478 2);
1479}
1480
1481static int count_rmaps(struct kvm_vcpu *vcpu)
1482{
1483 int nmaps = 0;
1484 int i, j, k;
1485
1486 for (i = 0; i < KVM_MEMORY_SLOTS; ++i) {
1487 struct kvm_memory_slot *m = &vcpu->kvm->memslots[i];
1488 struct kvm_rmap_desc *d;
1489
1490 for (j = 0; j < m->npages; ++j) {
290fc38d 1491 unsigned long *rmapp = &m->rmap[j];
37a7d8b0 1492
290fc38d 1493 if (!*rmapp)
37a7d8b0 1494 continue;
290fc38d 1495 if (!(*rmapp & 1)) {
37a7d8b0
AK
1496 ++nmaps;
1497 continue;
1498 }
290fc38d 1499 d = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
37a7d8b0
AK
1500 while (d) {
1501 for (k = 0; k < RMAP_EXT; ++k)
1502 if (d->shadow_ptes[k])
1503 ++nmaps;
1504 else
1505 break;
1506 d = d->more;
1507 }
1508 }
1509 }
1510 return nmaps;
1511}
1512
1513static int count_writable_mappings(struct kvm_vcpu *vcpu)
1514{
1515 int nmaps = 0;
1516 struct kvm_mmu_page *page;
1517 int i;
1518
1519 list_for_each_entry(page, &vcpu->kvm->active_mmu_pages, link) {
47ad8e68 1520 u64 *pt = page->spt;
37a7d8b0
AK
1521
1522 if (page->role.level != PT_PAGE_TABLE_LEVEL)
1523 continue;
1524
1525 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
1526 u64 ent = pt[i];
1527
1528 if (!(ent & PT_PRESENT_MASK))
1529 continue;
1530 if (!(ent & PT_WRITABLE_MASK))
1531 continue;
1532 ++nmaps;
1533 }
1534 }
1535 return nmaps;
1536}
1537
1538static void audit_rmap(struct kvm_vcpu *vcpu)
1539{
1540 int n_rmap = count_rmaps(vcpu);
1541 int n_actual = count_writable_mappings(vcpu);
1542
1543 if (n_rmap != n_actual)
1544 printk(KERN_ERR "%s: (%s) rmap %d actual %d\n",
1545 __FUNCTION__, audit_msg, n_rmap, n_actual);
1546}
1547
1548static void audit_write_protection(struct kvm_vcpu *vcpu)
1549{
1550 struct kvm_mmu_page *page;
290fc38d
IE
1551 struct kvm_memory_slot *slot;
1552 unsigned long *rmapp;
1553 gfn_t gfn;
37a7d8b0
AK
1554
1555 list_for_each_entry(page, &vcpu->kvm->active_mmu_pages, link) {
37a7d8b0
AK
1556 if (page->role.metaphysical)
1557 continue;
1558
290fc38d
IE
1559 slot = gfn_to_memslot(vcpu->kvm, page->gfn);
1560 gfn = unalias_gfn(vcpu->kvm, page->gfn);
1561 rmapp = &slot->rmap[gfn - slot->base_gfn];
1562 if (*rmapp)
37a7d8b0
AK
1563 printk(KERN_ERR "%s: (%s) shadow page has writable"
1564 " mappings: gfn %lx role %x\n",
1565 __FUNCTION__, audit_msg, page->gfn,
1566 page->role.word);
1567 }
1568}
1569
1570static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg)
1571{
1572 int olddbg = dbg;
1573
1574 dbg = 0;
1575 audit_msg = msg;
1576 audit_rmap(vcpu);
1577 audit_write_protection(vcpu);
1578 audit_mappings(vcpu);
1579 dbg = olddbg;
1580}
1581
1582#endif