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Commit | Line | Data |
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1a9fc855 MCC |
1 | /* |
2 | * Driver for the Conexant CX25821 PCIe bridge | |
3 | * | |
4 | * Copyright (C) 2009 Conexant Systems Inc. | |
5 | * Authors <hiep.huynh@conexant.com>, <shu.lin@conexant.com> | |
6 | * | |
7 | * This program is free software; you can redistribute it and/or modify | |
8 | * it under the terms of the GNU General Public License as published by | |
9 | * the Free Software Foundation; either version 2 of the License, or | |
10 | * (at your option) any later version. | |
11 | * | |
12 | * This program is distributed in the hope that it will be useful, | |
13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | * | |
16 | * GNU General Public License for more details. | |
1a9fc855 MCC |
17 | */ |
18 | ||
36d89f7d JP |
19 | #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt |
20 | ||
1a9fc855 MCC |
21 | #include "cx25821-video.h" |
22 | #include "cx25821-audio-upstream.h" | |
23 | ||
24 | #include <linux/fs.h> | |
25 | #include <linux/errno.h> | |
26 | #include <linux/kernel.h> | |
27 | #include <linux/init.h> | |
28 | #include <linux/module.h> | |
29 | #include <linux/syscalls.h> | |
30 | #include <linux/file.h> | |
31 | #include <linux/fcntl.h> | |
32 | #include <linux/delay.h> | |
5a0e3ad6 | 33 | #include <linux/slab.h> |
b5f11cc7 | 34 | #include <linux/uaccess.h> |
1a9fc855 MCC |
35 | |
36 | MODULE_DESCRIPTION("v4l2 driver module for cx25821 based TV cards"); | |
37 | MODULE_AUTHOR("Hiep Huynh <hiep.huynh@conexant.com>"); | |
38 | MODULE_LICENSE("GPL"); | |
39 | ||
f063a0c0 LT |
40 | static int _intr_msk = FLD_AUD_SRC_RISCI1 | FLD_AUD_SRC_OF | |
41 | FLD_AUD_SRC_SYNC | FLD_AUD_SRC_OPC_ERR; | |
1a9fc855 | 42 | |
dafc456c | 43 | static int cx25821_sram_channel_setup_upstream_audio(struct cx25821_dev *dev, |
bfef0d35 | 44 | const struct sram_channel *ch, |
1a9fc855 MCC |
45 | unsigned int bpl, u32 risc) |
46 | { | |
47 | unsigned int i, lines; | |
48 | u32 cdt; | |
49 | ||
50 | if (ch->cmds_start == 0) { | |
51 | cx_write(ch->ptr1_reg, 0); | |
52 | cx_write(ch->ptr2_reg, 0); | |
53 | cx_write(ch->cnt2_reg, 0); | |
54 | cx_write(ch->cnt1_reg, 0); | |
55 | return 0; | |
56 | } | |
57 | ||
58 | bpl = (bpl + 7) & ~7; /* alignment */ | |
59 | cdt = ch->cdt; | |
60 | lines = ch->fifo_size / bpl; | |
61 | ||
b5f11cc7 | 62 | if (lines > 3) |
1a9fc855 | 63 | lines = 3; |
1a9fc855 MCC |
64 | |
65 | BUG_ON(lines < 2); | |
66 | ||
67 | /* write CDT */ | |
68 | for (i = 0; i < lines; i++) { | |
69 | cx_write(cdt + 16 * i, ch->fifo_start + bpl * i); | |
70 | cx_write(cdt + 16 * i + 4, 0); | |
71 | cx_write(cdt + 16 * i + 8, 0); | |
72 | cx_write(cdt + 16 * i + 12, 0); | |
73 | } | |
74 | ||
75 | /* write CMDS */ | |
76 | cx_write(ch->cmds_start + 0, risc); | |
77 | ||
78 | cx_write(ch->cmds_start + 4, 0); | |
79 | cx_write(ch->cmds_start + 8, cdt); | |
80 | cx_write(ch->cmds_start + 12, AUDIO_CDT_SIZE_QW); | |
81 | cx_write(ch->cmds_start + 16, ch->ctrl_start); | |
82 | ||
b5f11cc7 | 83 | /* IQ size */ |
1a9fc855 MCC |
84 | cx_write(ch->cmds_start + 20, AUDIO_IQ_SIZE_DW); |
85 | ||
86 | for (i = 24; i < 80; i += 4) | |
87 | cx_write(ch->cmds_start + i, 0); | |
88 | ||
89 | /* fill registers */ | |
90 | cx_write(ch->ptr1_reg, ch->fifo_start); | |
91 | cx_write(ch->ptr2_reg, cdt); | |
92 | cx_write(ch->cnt2_reg, AUDIO_CDT_SIZE_QW); | |
93 | cx_write(ch->cnt1_reg, AUDIO_CLUSTER_SIZE_QW - 1); | |
94 | ||
95 | return 0; | |
96 | } | |
97 | ||
98 | static __le32 *cx25821_risc_field_upstream_audio(struct cx25821_dev *dev, | |
b5f11cc7 | 99 | __le32 *rp, |
1a9fc855 MCC |
100 | dma_addr_t databuf_phys_addr, |
101 | unsigned int bpl, | |
102 | int fifo_enable) | |
103 | { | |
104 | unsigned int line; | |
bfef0d35 | 105 | const struct sram_channel *sram_ch = |
81f4c8dd | 106 | dev->channels[dev->_audio_upstream_channel].sram_channels; |
1a9fc855 MCC |
107 | int offset = 0; |
108 | ||
109 | /* scan lines */ | |
110 | for (line = 0; line < LINES_PER_AUDIO_BUFFER; line++) { | |
111 | *(rp++) = cpu_to_le32(RISC_READ | RISC_SOL | RISC_EOL | bpl); | |
112 | *(rp++) = cpu_to_le32(databuf_phys_addr + offset); | |
113 | *(rp++) = cpu_to_le32(0); /* bits 63-32 */ | |
114 | ||
b5f11cc7 MCC |
115 | /* Check if we need to enable the FIFO |
116 | * after the first 3 lines. | |
117 | * For the upstream audio channel, | |
118 | * the risc engine will enable the FIFO */ | |
1a9fc855 MCC |
119 | if (fifo_enable && line == 2) { |
120 | *(rp++) = RISC_WRITECR; | |
121 | *(rp++) = sram_ch->dma_ctl; | |
122 | *(rp++) = sram_ch->fld_aud_fifo_en; | |
123 | *(rp++) = 0x00000020; | |
124 | } | |
125 | ||
126 | offset += AUDIO_LINE_SIZE; | |
127 | } | |
128 | ||
129 | return rp; | |
130 | } | |
131 | ||
dafc456c | 132 | static int cx25821_risc_buffer_upstream_audio(struct cx25821_dev *dev, |
1a9fc855 MCC |
133 | struct pci_dev *pci, |
134 | unsigned int bpl, unsigned int lines) | |
135 | { | |
136 | __le32 *rp; | |
137 | int fifo_enable = 0; | |
138 | int frame = 0, i = 0; | |
139 | int frame_size = AUDIO_DATA_BUF_SZ; | |
140 | int databuf_offset = 0; | |
141 | int risc_flag = RISC_CNT_INC; | |
142 | dma_addr_t risc_phys_jump_addr; | |
143 | ||
144 | /* Virtual address of Risc buffer program */ | |
145 | rp = dev->_risc_virt_addr; | |
146 | ||
147 | /* sync instruction */ | |
148 | *(rp++) = cpu_to_le32(RISC_RESYNC | AUDIO_SYNC_LINE); | |
149 | ||
150 | for (frame = 0; frame < NUM_AUDIO_FRAMES; frame++) { | |
151 | databuf_offset = frame_size * frame; | |
152 | ||
153 | if (frame == 0) { | |
154 | fifo_enable = 1; | |
155 | risc_flag = RISC_CNT_RESET; | |
156 | } else { | |
157 | fifo_enable = 0; | |
158 | risc_flag = RISC_CNT_INC; | |
159 | } | |
160 | ||
b5f11cc7 | 161 | /* Calculate physical jump address */ |
1a9fc855 MCC |
162 | if ((frame + 1) == NUM_AUDIO_FRAMES) { |
163 | risc_phys_jump_addr = | |
164 | dev->_risc_phys_start_addr + | |
165 | RISC_SYNC_INSTRUCTION_SIZE; | |
166 | } else { | |
167 | risc_phys_jump_addr = | |
168 | dev->_risc_phys_start_addr + | |
169 | RISC_SYNC_INSTRUCTION_SIZE + | |
170 | AUDIO_RISC_DMA_BUF_SIZE * (frame + 1); | |
171 | } | |
172 | ||
173 | rp = cx25821_risc_field_upstream_audio(dev, rp, | |
72a52fc3 LF |
174 | dev->_audiodata_buf_phys_addr + databuf_offset, |
175 | bpl, fifo_enable); | |
1a9fc855 MCC |
176 | |
177 | if (USE_RISC_NOOP_AUDIO) { | |
b5f11cc7 | 178 | for (i = 0; i < NUM_NO_OPS; i++) |
1a9fc855 | 179 | *(rp++) = cpu_to_le32(RISC_NOOP); |
1a9fc855 MCC |
180 | } |
181 | ||
b5f11cc7 MCC |
182 | /* Loop to (Nth)FrameRISC or to Start of Risc program & |
183 | * generate IRQ */ | |
1a9fc855 MCC |
184 | *(rp++) = cpu_to_le32(RISC_JUMP | RISC_IRQ1 | risc_flag); |
185 | *(rp++) = cpu_to_le32(risc_phys_jump_addr); | |
186 | *(rp++) = cpu_to_le32(0); | |
187 | ||
b5f11cc7 | 188 | /* Recalculate virtual address based on frame index */ |
1a9fc855 | 189 | rp = dev->_risc_virt_addr + RISC_SYNC_INSTRUCTION_SIZE / 4 + |
81f4c8dd | 190 | (AUDIO_RISC_DMA_BUF_SIZE * (frame + 1) / 4); |
1a9fc855 MCC |
191 | } |
192 | ||
193 | return 0; | |
194 | } | |
195 | ||
dafc456c | 196 | static void cx25821_free_memory_audio(struct cx25821_dev *dev) |
1a9fc855 MCC |
197 | { |
198 | if (dev->_risc_virt_addr) { | |
199 | pci_free_consistent(dev->pci, dev->_audiorisc_size, | |
200 | dev->_risc_virt_addr, dev->_risc_phys_addr); | |
201 | dev->_risc_virt_addr = NULL; | |
202 | } | |
203 | ||
204 | if (dev->_audiodata_buf_virt_addr) { | |
205 | pci_free_consistent(dev->pci, dev->_audiodata_buf_size, | |
206 | dev->_audiodata_buf_virt_addr, | |
207 | dev->_audiodata_buf_phys_addr); | |
208 | dev->_audiodata_buf_virt_addr = NULL; | |
209 | } | |
210 | } | |
211 | ||
212 | void cx25821_stop_upstream_audio(struct cx25821_dev *dev) | |
213 | { | |
bfef0d35 | 214 | const struct sram_channel *sram_ch = |
81f4c8dd | 215 | dev->channels[AUDIO_UPSTREAM_SRAM_CHANNEL_B].sram_channels; |
1a9fc855 MCC |
216 | u32 tmp = 0; |
217 | ||
218 | if (!dev->_audio_is_running) { | |
b5f11cc7 | 219 | printk(KERN_DEBUG |
36d89f7d | 220 | pr_fmt("No audio file is currently running so return!\n")); |
1a9fc855 MCC |
221 | return; |
222 | } | |
b5f11cc7 | 223 | /* Disable RISC interrupts */ |
1a9fc855 MCC |
224 | cx_write(sram_ch->int_msk, 0); |
225 | ||
b5f11cc7 | 226 | /* Turn OFF risc and fifo enable in AUD_DMA_CNTRL */ |
1a9fc855 MCC |
227 | tmp = cx_read(sram_ch->dma_ctl); |
228 | cx_write(sram_ch->dma_ctl, | |
229 | tmp & ~(sram_ch->fld_aud_fifo_en | sram_ch->fld_aud_risc_en)); | |
230 | ||
b5f11cc7 | 231 | /* Clear data buffer memory */ |
1a9fc855 MCC |
232 | if (dev->_audiodata_buf_virt_addr) |
233 | memset(dev->_audiodata_buf_virt_addr, 0, | |
234 | dev->_audiodata_buf_size); | |
235 | ||
236 | dev->_audio_is_running = 0; | |
237 | dev->_is_first_audio_frame = 0; | |
238 | dev->_audioframe_count = 0; | |
239 | dev->_audiofile_status = END_OF_FILE; | |
240 | ||
072973ba | 241 | flush_work(&dev->_audio_work_entry); |
1a9fc855 | 242 | |
b0091780 | 243 | kfree(dev->_audiofilename); |
1a9fc855 MCC |
244 | } |
245 | ||
246 | void cx25821_free_mem_upstream_audio(struct cx25821_dev *dev) | |
247 | { | |
b5f11cc7 | 248 | if (dev->_audio_is_running) |
1a9fc855 | 249 | cx25821_stop_upstream_audio(dev); |
1a9fc855 MCC |
250 | |
251 | cx25821_free_memory_audio(dev); | |
252 | } | |
253 | ||
dafc456c | 254 | static int cx25821_get_audio_data(struct cx25821_dev *dev, |
bfef0d35 | 255 | const struct sram_channel *sram_ch) |
1a9fc855 | 256 | { |
2ce8fce2 | 257 | struct file *file; |
1a9fc855 MCC |
258 | int frame_index_temp = dev->_audioframe_index; |
259 | int i = 0; | |
1a9fc855 MCC |
260 | int frame_size = AUDIO_DATA_BUF_SZ; |
261 | int frame_offset = frame_size * frame_index_temp; | |
2ce8fce2 | 262 | char mybuf[AUDIO_LINE_SIZE]; |
1a9fc855 | 263 | loff_t file_offset = dev->_audioframe_count * frame_size; |
2ce8fce2 | 264 | char *p = NULL; |
1a9fc855 MCC |
265 | |
266 | if (dev->_audiofile_status == END_OF_FILE) | |
267 | return 0; | |
268 | ||
2ce8fce2 AV |
269 | file = filp_open(dev->_audiofilename, O_RDONLY | O_LARGEFILE, 0); |
270 | if (IS_ERR(file)) { | |
271 | pr_err("%s(): ERROR opening file(%s) with errno = %ld!\n", | |
272 | __func__, dev->_audiofilename, -PTR_ERR(file)); | |
273 | return PTR_ERR(file); | |
274 | } | |
1a9fc855 | 275 | |
2ce8fce2 AV |
276 | if (dev->_audiodata_buf_virt_addr) |
277 | p = (char *)dev->_audiodata_buf_virt_addr + frame_offset; | |
1a9fc855 | 278 | |
2ce8fce2 | 279 | for (i = 0; i < dev->_audio_lines_count; i++) { |
bdd1d2d3 | 280 | int n = kernel_read(file, mybuf, AUDIO_LINE_SIZE, &file_offset); |
2ce8fce2 AV |
281 | if (n < AUDIO_LINE_SIZE) { |
282 | pr_info("Done: exit %s() since no more bytes to read from Audio file\n", | |
81f4c8dd | 283 | __func__); |
2ce8fce2 AV |
284 | dev->_audiofile_status = END_OF_FILE; |
285 | fput(file); | |
286 | return 0; | |
1a9fc855 | 287 | } |
2ce8fce2 AV |
288 | dev->_audiofile_status = IN_PROGRESS; |
289 | if (p) { | |
290 | memcpy(p, mybuf, n); | |
291 | p += n; | |
1a9fc855 | 292 | } |
1a9fc855 | 293 | } |
2ce8fce2 AV |
294 | dev->_audioframe_count++; |
295 | fput(file); | |
1a9fc855 MCC |
296 | |
297 | return 0; | |
298 | } | |
299 | ||
300 | static void cx25821_audioups_handler(struct work_struct *work) | |
301 | { | |
72a52fc3 LF |
302 | struct cx25821_dev *dev = container_of(work, struct cx25821_dev, |
303 | _audio_work_entry); | |
1a9fc855 MCC |
304 | |
305 | if (!dev) { | |
36d89f7d | 306 | pr_err("ERROR %s(): since container_of(work_struct) FAILED!\n", |
81f4c8dd | 307 | __func__); |
1a9fc855 MCC |
308 | return; |
309 | } | |
310 | ||
1531e889 LF |
311 | cx25821_get_audio_data(dev, dev->channels[dev->_audio_upstream_channel]. |
312 | sram_channels); | |
1a9fc855 MCC |
313 | } |
314 | ||
dafc456c | 315 | static int cx25821_openfile_audio(struct cx25821_dev *dev, |
bfef0d35 | 316 | const struct sram_channel *sram_ch) |
1a9fc855 | 317 | { |
3af07613 AV |
318 | char *p = (void *)dev->_audiodata_buf_virt_addr; |
319 | struct file *file; | |
bdd1d2d3 | 320 | loff_t file_offset = 0; |
3af07613 | 321 | int i, j; |
1a9fc855 | 322 | |
3af07613 AV |
323 | file = filp_open(dev->_audiofilename, O_RDONLY | O_LARGEFILE, 0); |
324 | if (IS_ERR(file)) { | |
325 | pr_err("%s(): ERROR opening file(%s) with errno = %ld!\n", | |
326 | __func__, dev->_audiofilename, PTR_ERR(file)); | |
327 | return PTR_ERR(file); | |
328 | } | |
1a9fc855 | 329 | |
bdd1d2d3 | 330 | for (j = 0; j < NUM_AUDIO_FRAMES; j++) { |
3af07613 AV |
331 | for (i = 0; i < dev->_audio_lines_count; i++) { |
332 | char buf[AUDIO_LINE_SIZE]; | |
bdd1d2d3 CH |
333 | loff_t offset = file_offset; |
334 | int n = kernel_read(file, buf, AUDIO_LINE_SIZE, &file_offset); | |
1a9fc855 | 335 | |
3af07613 AV |
336 | if (n < AUDIO_LINE_SIZE) { |
337 | pr_info("Done: exit %s() since no more bytes to read from Audio file\n", | |
338 | __func__); | |
339 | dev->_audiofile_status = END_OF_FILE; | |
340 | fput(file); | |
341 | return 0; | |
1a9fc855 MCC |
342 | } |
343 | ||
3af07613 AV |
344 | if (p) |
345 | memcpy(p + offset, buf, n); | |
1a9fc855 | 346 | } |
3af07613 | 347 | dev->_audioframe_count++; |
1a9fc855 | 348 | } |
3af07613 AV |
349 | dev->_audiofile_status = IN_PROGRESS; |
350 | fput(file); | |
1a9fc855 MCC |
351 | return 0; |
352 | } | |
353 | ||
354 | static int cx25821_audio_upstream_buffer_prepare(struct cx25821_dev *dev, | |
bfef0d35 | 355 | const struct sram_channel *sram_ch, |
1a9fc855 MCC |
356 | int bpl) |
357 | { | |
358 | int ret = 0; | |
359 | dma_addr_t dma_addr; | |
360 | dma_addr_t data_dma_addr; | |
361 | ||
362 | cx25821_free_memory_audio(dev); | |
363 | ||
72a52fc3 LF |
364 | dev->_risc_virt_addr = pci_alloc_consistent(dev->pci, |
365 | dev->audio_upstream_riscbuf_size, &dma_addr); | |
1a9fc855 MCC |
366 | dev->_risc_virt_start_addr = dev->_risc_virt_addr; |
367 | dev->_risc_phys_start_addr = dma_addr; | |
368 | dev->_risc_phys_addr = dma_addr; | |
369 | dev->_audiorisc_size = dev->audio_upstream_riscbuf_size; | |
370 | ||
371 | if (!dev->_risc_virt_addr) { | |
b5f11cc7 | 372 | printk(KERN_DEBUG |
81f4c8dd | 373 | pr_fmt("ERROR: pci_alloc_consistent() FAILED to allocate memory for RISC program! Returning\n")); |
1a9fc855 MCC |
374 | return -ENOMEM; |
375 | } | |
b5f11cc7 | 376 | /* Clear out memory at address */ |
1a9fc855 MCC |
377 | memset(dev->_risc_virt_addr, 0, dev->_audiorisc_size); |
378 | ||
b5f11cc7 | 379 | /* For Audio Data buffer allocation */ |
72a52fc3 LF |
380 | dev->_audiodata_buf_virt_addr = pci_alloc_consistent(dev->pci, |
381 | dev->audio_upstream_databuf_size, &data_dma_addr); | |
1a9fc855 MCC |
382 | dev->_audiodata_buf_phys_addr = data_dma_addr; |
383 | dev->_audiodata_buf_size = dev->audio_upstream_databuf_size; | |
384 | ||
385 | if (!dev->_audiodata_buf_virt_addr) { | |
b5f11cc7 | 386 | printk(KERN_DEBUG |
81f4c8dd | 387 | pr_fmt("ERROR: pci_alloc_consistent() FAILED to allocate memory for data buffer! Returning\n")); |
1a9fc855 MCC |
388 | return -ENOMEM; |
389 | } | |
b5f11cc7 | 390 | /* Clear out memory at address */ |
1a9fc855 MCC |
391 | memset(dev->_audiodata_buf_virt_addr, 0, dev->_audiodata_buf_size); |
392 | ||
393 | ret = cx25821_openfile_audio(dev, sram_ch); | |
394 | if (ret < 0) | |
395 | return ret; | |
396 | ||
b5f11cc7 | 397 | /* Creating RISC programs */ |
72a52fc3 LF |
398 | ret = cx25821_risc_buffer_upstream_audio(dev, dev->pci, bpl, |
399 | dev->_audio_lines_count); | |
1a9fc855 MCC |
400 | if (ret < 0) { |
401 | printk(KERN_DEBUG | |
81f4c8dd | 402 | pr_fmt("ERROR creating audio upstream RISC programs!\n")); |
1a9fc855 MCC |
403 | goto error; |
404 | } | |
405 | ||
406 | return 0; | |
407 | ||
b5f11cc7 | 408 | error: |
1a9fc855 MCC |
409 | return ret; |
410 | } | |
411 | ||
dafc456c | 412 | static int cx25821_audio_upstream_irq(struct cx25821_dev *dev, int chan_num, |
1a9fc855 MCC |
413 | u32 status) |
414 | { | |
415 | int i = 0; | |
416 | u32 int_msk_tmp; | |
bfef0d35 | 417 | const struct sram_channel *channel = dev->channels[chan_num].sram_channels; |
1a9fc855 MCC |
418 | dma_addr_t risc_phys_jump_addr; |
419 | __le32 *rp; | |
420 | ||
421 | if (status & FLD_AUD_SRC_RISCI1) { | |
b5f11cc7 | 422 | /* Get interrupt_index of the program that interrupted */ |
1a9fc855 MCC |
423 | u32 prog_cnt = cx_read(channel->gpcnt); |
424 | ||
b5f11cc7 MCC |
425 | /* Since we've identified our IRQ, clear our bits from the |
426 | * interrupt mask and interrupt status registers */ | |
1a9fc855 MCC |
427 | cx_write(channel->int_msk, 0); |
428 | cx_write(channel->int_stat, cx_read(channel->int_stat)); | |
429 | ||
430 | spin_lock(&dev->slock); | |
431 | ||
432 | while (prog_cnt != dev->_last_index_irq) { | |
b5f11cc7 MCC |
433 | /* Update _last_index_irq */ |
434 | if (dev->_last_index_irq < (NUMBER_OF_PROGRAMS - 1)) | |
1a9fc855 | 435 | dev->_last_index_irq++; |
b5f11cc7 | 436 | else |
1a9fc855 | 437 | dev->_last_index_irq = 0; |
1a9fc855 MCC |
438 | |
439 | dev->_audioframe_index = dev->_last_index_irq; | |
440 | ||
072973ba | 441 | schedule_work(&dev->_audio_work_entry); |
1a9fc855 MCC |
442 | } |
443 | ||
444 | if (dev->_is_first_audio_frame) { | |
445 | dev->_is_first_audio_frame = 0; | |
446 | ||
447 | if (dev->_risc_virt_start_addr != NULL) { | |
448 | risc_phys_jump_addr = | |
81f4c8dd LF |
449 | dev->_risc_phys_start_addr + |
450 | RISC_SYNC_INSTRUCTION_SIZE + | |
451 | AUDIO_RISC_DMA_BUF_SIZE; | |
1a9fc855 MCC |
452 | |
453 | rp = cx25821_risc_field_upstream_audio(dev, | |
54082f1d LF |
454 | dev->_risc_virt_start_addr + 1, |
455 | dev->_audiodata_buf_phys_addr, | |
456 | AUDIO_LINE_SIZE, FIFO_DISABLE); | |
1a9fc855 MCC |
457 | |
458 | if (USE_RISC_NOOP_AUDIO) { | |
459 | for (i = 0; i < NUM_NO_OPS; i++) { | |
460 | *(rp++) = | |
461 | cpu_to_le32(RISC_NOOP); | |
462 | } | |
463 | } | |
b5f11cc7 | 464 | /* Jump to 2nd Audio Frame */ |
1531e889 | 465 | *(rp++) = cpu_to_le32(RISC_JUMP | RISC_IRQ1 | |
1a9fc855 MCC |
466 | RISC_CNT_RESET); |
467 | *(rp++) = cpu_to_le32(risc_phys_jump_addr); | |
468 | *(rp++) = cpu_to_le32(0); | |
469 | } | |
470 | } | |
471 | ||
472 | spin_unlock(&dev->slock); | |
473 | } else { | |
474 | if (status & FLD_AUD_SRC_OF) | |
36d89f7d JP |
475 | pr_warn("%s(): Audio Received Overflow Error Interrupt!\n", |
476 | __func__); | |
1a9fc855 MCC |
477 | |
478 | if (status & FLD_AUD_SRC_SYNC) | |
36d89f7d JP |
479 | pr_warn("%s(): Audio Received Sync Error Interrupt!\n", |
480 | __func__); | |
1a9fc855 MCC |
481 | |
482 | if (status & FLD_AUD_SRC_OPC_ERR) | |
36d89f7d JP |
483 | pr_warn("%s(): Audio Received OpCode Error Interrupt!\n", |
484 | __func__); | |
1a9fc855 | 485 | |
b5f11cc7 MCC |
486 | /* Read and write back the interrupt status register to clear |
487 | * our bits */ | |
1a9fc855 MCC |
488 | cx_write(channel->int_stat, cx_read(channel->int_stat)); |
489 | } | |
490 | ||
491 | if (dev->_audiofile_status == END_OF_FILE) { | |
36d89f7d JP |
492 | pr_warn("EOF Channel Audio Framecount = %d\n", |
493 | dev->_audioframe_count); | |
1a9fc855 MCC |
494 | return -1; |
495 | } | |
b5f11cc7 | 496 | /* ElSE, set the interrupt mask register, re-enable irq. */ |
1a9fc855 MCC |
497 | int_msk_tmp = cx_read(channel->int_msk); |
498 | cx_write(channel->int_msk, int_msk_tmp |= _intr_msk); | |
499 | ||
500 | return 0; | |
501 | } | |
502 | ||
503 | static irqreturn_t cx25821_upstream_irq_audio(int irq, void *dev_id) | |
504 | { | |
505 | struct cx25821_dev *dev = dev_id; | |
30fdf035 | 506 | u32 audio_status; |
1a9fc855 | 507 | int handled = 0; |
bfef0d35 | 508 | const struct sram_channel *sram_ch; |
1a9fc855 MCC |
509 | |
510 | if (!dev) | |
511 | return -1; | |
512 | ||
6100c579 | 513 | sram_ch = dev->channels[dev->_audio_upstream_channel].sram_channels; |
1a9fc855 | 514 | |
1a9fc855 MCC |
515 | audio_status = cx_read(sram_ch->int_stat); |
516 | ||
b5f11cc7 | 517 | /* Only deal with our interrupt */ |
1a9fc855 | 518 | if (audio_status) { |
1531e889 LF |
519 | handled = cx25821_audio_upstream_irq(dev, |
520 | dev->_audio_upstream_channel, audio_status); | |
1a9fc855 MCC |
521 | } |
522 | ||
b5f11cc7 | 523 | if (handled < 0) |
1a9fc855 | 524 | cx25821_stop_upstream_audio(dev); |
b5f11cc7 | 525 | else |
1a9fc855 | 526 | handled += handled; |
1a9fc855 MCC |
527 | |
528 | return IRQ_RETVAL(handled); | |
529 | } | |
530 | ||
531 | static void cx25821_wait_fifo_enable(struct cx25821_dev *dev, | |
bfef0d35 | 532 | const struct sram_channel *sram_ch) |
1a9fc855 MCC |
533 | { |
534 | int count = 0; | |
535 | u32 tmp; | |
536 | ||
537 | do { | |
b5f11cc7 MCC |
538 | /* Wait 10 microsecond before checking to see if the FIFO is |
539 | * turned ON. */ | |
1a9fc855 MCC |
540 | udelay(10); |
541 | ||
542 | tmp = cx_read(sram_ch->dma_ctl); | |
543 | ||
b5f11cc7 MCC |
544 | /* 10 millisecond timeout */ |
545 | if (count++ > 1000) { | |
36d89f7d | 546 | pr_err("ERROR: %s() fifo is NOT turned on. Timeout!\n", |
81f4c8dd | 547 | __func__); |
1a9fc855 MCC |
548 | return; |
549 | } | |
550 | ||
551 | } while (!(tmp & sram_ch->fld_aud_fifo_en)); | |
552 | ||
553 | } | |
554 | ||
dafc456c | 555 | static int cx25821_start_audio_dma_upstream(struct cx25821_dev *dev, |
bfef0d35 | 556 | const struct sram_channel *sram_ch) |
1a9fc855 MCC |
557 | { |
558 | u32 tmp = 0; | |
559 | int err = 0; | |
560 | ||
b5f11cc7 MCC |
561 | /* Set the physical start address of the RISC program in the initial |
562 | * program counter(IPC) member of the CMDS. */ | |
1a9fc855 | 563 | cx_write(sram_ch->cmds_start + 0, dev->_risc_phys_addr); |
b5f11cc7 MCC |
564 | /* Risc IPC High 64 bits 63-32 */ |
565 | cx_write(sram_ch->cmds_start + 4, 0); | |
1a9fc855 MCC |
566 | |
567 | /* reset counter */ | |
568 | cx_write(sram_ch->gpcnt_ctl, 3); | |
569 | ||
b5f11cc7 MCC |
570 | /* Set the line length (It looks like we do not need to set the |
571 | * line length) */ | |
1a9fc855 MCC |
572 | cx_write(sram_ch->aud_length, AUDIO_LINE_SIZE & FLD_AUD_DST_LN_LNGTH); |
573 | ||
b5f11cc7 | 574 | /* Set the input mode to 16-bit */ |
1a9fc855 | 575 | tmp = cx_read(sram_ch->aud_cfg); |
72a52fc3 LF |
576 | tmp |= FLD_AUD_SRC_ENABLE | FLD_AUD_DST_PK_MODE | FLD_AUD_CLK_ENABLE | |
577 | FLD_AUD_MASTER_MODE | FLD_AUD_CLK_SELECT_PLL_D | | |
578 | FLD_AUD_SONY_MODE; | |
1a9fc855 MCC |
579 | cx_write(sram_ch->aud_cfg, tmp); |
580 | ||
b5f11cc7 | 581 | /* Read and write back the interrupt status register to clear it */ |
1a9fc855 MCC |
582 | tmp = cx_read(sram_ch->int_stat); |
583 | cx_write(sram_ch->int_stat, tmp); | |
584 | ||
b5f11cc7 | 585 | /* Clear our bits from the interrupt status register. */ |
1a9fc855 MCC |
586 | cx_write(sram_ch->int_stat, _intr_msk); |
587 | ||
b5f11cc7 | 588 | /* Set the interrupt mask register, enable irq. */ |
1a9fc855 MCC |
589 | cx_set(PCI_INT_MSK, cx_read(PCI_INT_MSK) | (1 << sram_ch->irq_bit)); |
590 | tmp = cx_read(sram_ch->int_msk); | |
591 | cx_write(sram_ch->int_msk, tmp |= _intr_msk); | |
592 | ||
72a52fc3 | 593 | err = request_irq(dev->pci->irq, cx25821_upstream_irq_audio, |
18e9351e | 594 | IRQF_SHARED, dev->name, dev); |
1a9fc855 | 595 | if (err < 0) { |
72a52fc3 LF |
596 | pr_err("%s: can't get upstream IRQ %d\n", dev->name, |
597 | dev->pci->irq); | |
1a9fc855 MCC |
598 | goto fail_irq; |
599 | } | |
600 | ||
b5f11cc7 | 601 | /* Start the DMA engine */ |
1a9fc855 MCC |
602 | tmp = cx_read(sram_ch->dma_ctl); |
603 | cx_set(sram_ch->dma_ctl, tmp | sram_ch->fld_aud_risc_en); | |
604 | ||
605 | dev->_audio_is_running = 1; | |
606 | dev->_is_first_audio_frame = 1; | |
607 | ||
b5f11cc7 | 608 | /* The fifo_en bit turns on by the first Risc program */ |
1a9fc855 MCC |
609 | cx25821_wait_fifo_enable(dev, sram_ch); |
610 | ||
611 | return 0; | |
612 | ||
b5f11cc7 | 613 | fail_irq: |
1a9fc855 MCC |
614 | cx25821_dev_unregister(dev); |
615 | return err; | |
616 | } | |
617 | ||
618 | int cx25821_audio_upstream_init(struct cx25821_dev *dev, int channel_select) | |
619 | { | |
bfef0d35 | 620 | const struct sram_channel *sram_ch; |
1a9fc855 | 621 | int err = 0; |
1a9fc855 MCC |
622 | |
623 | if (dev->_audio_is_running) { | |
36d89f7d | 624 | pr_warn("Audio Channel is still running so return!\n"); |
1a9fc855 MCC |
625 | return 0; |
626 | } | |
627 | ||
6100c579 | 628 | dev->_audio_upstream_channel = channel_select; |
e4115bb2 | 629 | sram_ch = dev->channels[channel_select].sram_channels; |
1a9fc855 | 630 | |
b5f11cc7 | 631 | /* Work queue */ |
1a9fc855 | 632 | INIT_WORK(&dev->_audio_work_entry, cx25821_audioups_handler); |
1a9fc855 MCC |
633 | |
634 | dev->_last_index_irq = 0; | |
635 | dev->_audio_is_running = 0; | |
636 | dev->_audioframe_count = 0; | |
637 | dev->_audiofile_status = RESET_STATUS; | |
638 | dev->_audio_lines_count = LINES_PER_AUDIO_BUFFER; | |
639 | _line_size = AUDIO_LINE_SIZE; | |
640 | ||
cab3e1ff PST |
641 | if ((dev->input_audiofilename) && |
642 | (strcmp(dev->input_audiofilename, "") != 0)) | |
6c17c24d PST |
643 | dev->_audiofilename = kstrdup(dev->input_audiofilename, |
644 | GFP_KERNEL); | |
cab3e1ff | 645 | else |
6c17c24d PST |
646 | dev->_audiofilename = kstrdup(_defaultAudioName, |
647 | GFP_KERNEL); | |
1a9fc855 | 648 | |
cab3e1ff PST |
649 | if (!dev->_audiofilename) { |
650 | err = -ENOMEM; | |
651 | goto error; | |
1a9fc855 MCC |
652 | } |
653 | ||
c81d4972 PST |
654 | cx25821_sram_channel_setup_upstream_audio(dev, sram_ch, |
655 | _line_size, 0); | |
1a9fc855 MCC |
656 | |
657 | dev->audio_upstream_riscbuf_size = | |
81f4c8dd LF |
658 | AUDIO_RISC_DMA_BUF_SIZE * NUM_AUDIO_PROGS + |
659 | RISC_SYNC_INSTRUCTION_SIZE; | |
1a9fc855 MCC |
660 | dev->audio_upstream_databuf_size = AUDIO_DATA_BUF_SZ * NUM_AUDIO_PROGS; |
661 | ||
b5f11cc7 | 662 | /* Allocating buffers and prepare RISC program */ |
c81d4972 | 663 | err = cx25821_audio_upstream_buffer_prepare(dev, sram_ch, |
1531e889 | 664 | _line_size); |
c81d4972 | 665 | if (err < 0) { |
36d89f7d | 666 | pr_err("%s: Failed to set up Audio upstream buffers!\n", |
81f4c8dd | 667 | dev->name); |
1a9fc855 MCC |
668 | goto error; |
669 | } | |
b5f11cc7 | 670 | /* Start RISC engine */ |
1a9fc855 MCC |
671 | cx25821_start_audio_dma_upstream(dev, sram_ch); |
672 | ||
673 | return 0; | |
674 | ||
b5f11cc7 | 675 | error: |
1a9fc855 MCC |
676 | cx25821_dev_unregister(dev); |
677 | ||
678 | return err; | |
679 | } |