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[mirror_ubuntu-zesty-kernel.git] / drivers / media / platform / exynos4-is / media-dev.c
CommitLineData
d3953223
SN
1/*
2 * S5P/EXYNOS4 SoC series camera host interface media device driver
3 *
52917bcb
SN
4 * Copyright (C) 2011 - 2013 Samsung Electronics Co., Ltd.
5 * Author: Sylwester Nawrocki <s.nawrocki@samsung.com>
d3953223
SN
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published
9 * by the Free Software Foundation, either version 2 of the License,
10 * or (at your option) any later version.
11 */
12
13#include <linux/bug.h>
d3f5e0c5
SN
14#include <linux/clk.h>
15#include <linux/clk-provider.h>
d3953223
SN
16#include <linux/device.h>
17#include <linux/errno.h>
18#include <linux/i2c.h>
19#include <linux/kernel.h>
20#include <linux/list.h>
21#include <linux/module.h>
e2985a26
SN
22#include <linux/of.h>
23#include <linux/of_platform.h>
24#include <linux/of_device.h>
fd9fdb78 25#include <linux/of_graph.h>
d3953223
SN
26#include <linux/platform_device.h>
27#include <linux/pm_runtime.h>
28#include <linux/types.h>
29#include <linux/slab.h>
fa91f105 30#include <media/v4l2-async.h>
131b6c61 31#include <media/v4l2-ctrls.h>
e2985a26 32#include <media/v4l2-of.h>
d3953223 33#include <media/media-device.h>
d647f0b7 34#include <media/drv-intf/exynos-fimc.h>
d3953223 35
56fa1a6a 36#include "media-dev.h"
d3953223 37#include "fimc-core.h"
e781bbe3 38#include "fimc-is.h"
0f735f52 39#include "fimc-lite.h"
d3953223
SN
40#include "mipi-csis.h"
41
52917bcb
SN
42/* Set up image sensor subdev -> FIMC capture node notifications. */
43static void __setup_sensor_notification(struct fimc_md *fmd,
44 struct v4l2_subdev *sensor,
45 struct v4l2_subdev *fimc_sd)
46{
47 struct fimc_source_info *src_inf;
48 struct fimc_sensor_info *md_si;
49 unsigned long flags;
50
51 src_inf = v4l2_get_subdev_hostdata(sensor);
52 if (!src_inf || WARN_ON(fmd == NULL))
53 return;
54
55 md_si = source_to_sensor_info(src_inf);
56 spin_lock_irqsave(&fmd->slock, flags);
57 md_si->host = v4l2_get_subdevdata(fimc_sd);
58 spin_unlock_irqrestore(&fmd->slock, flags);
59}
60
d3953223
SN
61/**
62 * fimc_pipeline_prepare - update pipeline information with subdevice pointers
39bb6df6 63 * @me: media entity terminating the pipeline
d3953223
SN
64 *
65 * Caller holds the graph mutex.
66 */
b9ee31e6 67static void fimc_pipeline_prepare(struct fimc_pipeline *p,
403dfbec 68 struct media_entity *me)
d3953223 69{
52917bcb 70 struct fimc_md *fmd = entity_to_fimc_mdev(me);
d3953223 71 struct v4l2_subdev *sd;
52917bcb 72 struct v4l2_subdev *sensor = NULL;
0f735f52 73 int i;
d3953223 74
0f735f52
SN
75 for (i = 0; i < IDX_MAX; i++)
76 p->subdevs[i] = NULL;
d3953223 77
0f735f52 78 while (1) {
39bb6df6
SN
79 struct media_pad *pad = NULL;
80
81 /* Find remote source pad */
82 for (i = 0; i < me->num_pads; i++) {
83 struct media_pad *spad = &me->pads[i];
84 if (!(spad->flags & MEDIA_PAD_FL_SINK))
85 continue;
1bddf1b3 86 pad = media_entity_remote_pad(spad);
39bb6df6
SN
87 if (pad)
88 break;
89 }
0f735f52 90
3efdf62c 91 if (!pad || !is_media_entity_v4l2_subdev(pad->entity))
0f735f52 92 break;
0f735f52
SN
93 sd = media_entity_to_v4l2_subdev(pad->entity);
94
95 switch (sd->grp_id) {
588c87be 96 case GRP_ID_SENSOR:
52917bcb
SN
97 sensor = sd;
98 /* fall through */
99 case GRP_ID_FIMC_IS_SENSOR:
0f735f52
SN
100 p->subdevs[IDX_SENSOR] = sd;
101 break;
588c87be 102 case GRP_ID_CSIS:
0f735f52
SN
103 p->subdevs[IDX_CSIS] = sd;
104 break;
588c87be 105 case GRP_ID_FLITE:
4af81310
SN
106 p->subdevs[IDX_FLITE] = sd;
107 break;
588c87be 108 case GRP_ID_FIMC:
52917bcb 109 p->subdevs[IDX_FIMC] = sd;
0f735f52 110 break;
e781bbe3
SN
111 case GRP_ID_FIMC_IS:
112 p->subdevs[IDX_IS_ISP] = sd;
113 break;
0f735f52 114 default:
e781bbe3 115 break;
0f735f52 116 }
39bb6df6
SN
117 me = &sd->entity;
118 if (me->num_pads == 1)
119 break;
d3953223 120 }
52917bcb
SN
121
122 if (sensor && p->subdevs[IDX_FIMC])
123 __setup_sensor_notification(fmd, sensor, p->subdevs[IDX_FIMC]);
d3953223
SN
124}
125
126/**
127 * __subdev_set_power - change power state of a single subdev
128 * @sd: subdevice to change power state for
129 * @on: 1 to enable power or 0 to disable
130 *
131 * Return result of s_power subdev operation or -ENXIO if sd argument
132 * is NULL. Return 0 if the subdevice does not implement s_power.
133 */
134static int __subdev_set_power(struct v4l2_subdev *sd, int on)
135{
136 int *use_count;
137 int ret;
138
139 if (sd == NULL)
140 return -ENXIO;
141
142 use_count = &sd->entity.use_count;
143 if (on && (*use_count)++ > 0)
144 return 0;
145 else if (!on && (*use_count == 0 || --(*use_count) > 0))
146 return 0;
147 ret = v4l2_subdev_call(sd, core, s_power, on);
148
149 return ret != -ENOIOCTLCMD ? ret : 0;
150}
151
152/**
153 * fimc_pipeline_s_power - change power state of all pipeline subdevs
154 * @fimc: fimc device terminating the pipeline
0f735f52 155 * @state: true to power on, false to power off
d3953223 156 *
0f735f52 157 * Needs to be called with the graph mutex held.
d3953223 158 */
f8bca4f5 159static int fimc_pipeline_s_power(struct fimc_pipeline *p, bool on)
d3953223 160{
f8bca4f5
SN
161 static const u8 seq[2][IDX_MAX - 1] = {
162 { IDX_IS_ISP, IDX_SENSOR, IDX_CSIS, IDX_FLITE },
163 { IDX_CSIS, IDX_FLITE, IDX_SENSOR, IDX_IS_ISP },
164 };
165 int i, ret = 0;
d3953223 166
0f735f52 167 if (p->subdevs[IDX_SENSOR] == NULL)
d3953223
SN
168 return -ENXIO;
169
f8bca4f5
SN
170 for (i = 0; i < IDX_MAX - 1; i++) {
171 unsigned int idx = seq[on][i];
172
173 ret = __subdev_set_power(p->subdevs[idx], on);
174
0f735f52 175
0f735f52 176 if (ret < 0 && ret != -ENXIO)
f8bca4f5 177 goto error;
d3953223 178 }
0f735f52 179 return 0;
f8bca4f5
SN
180error:
181 for (; i >= 0; i--) {
182 unsigned int idx = seq[on][i];
183 __subdev_set_power(p->subdevs[idx], !on);
184 }
185 return ret;
d3953223
SN
186}
187
76775776
JA
188/**
189 * __fimc_pipeline_enable - enable power of all pipeline subdevs
190 * and the sensor clock
191 * @ep: video pipeline structure
192 * @fmd: fimc media device
193 *
194 * Called with the graph mutex held.
195 */
196static int __fimc_pipeline_enable(struct exynos_media_pipeline *ep,
197 struct fimc_md *fmd)
198{
199 struct fimc_pipeline *p = to_fimc_pipeline(ep);
200 int ret;
201
202 /* Enable PXLASYNC clock if this pipeline includes FIMC-IS */
203 if (!IS_ERR(fmd->wbclk[CLK_IDX_WB_B]) && p->subdevs[IDX_IS_ISP]) {
204 ret = clk_prepare_enable(fmd->wbclk[CLK_IDX_WB_B]);
205 if (ret < 0)
206 return ret;
207 }
208
209 ret = fimc_pipeline_s_power(p, 1);
210 if (!ret)
211 return 0;
212
213 if (!IS_ERR(fmd->wbclk[CLK_IDX_WB_B]) && p->subdevs[IDX_IS_ISP])
214 clk_disable_unprepare(fmd->wbclk[CLK_IDX_WB_B]);
215
216 return ret;
217}
218
d3953223 219/**
b9ee31e6
SN
220 * __fimc_pipeline_open - update the pipeline information, enable power
221 * of all pipeline subdevs and the sensor clock
d3953223 222 * @me: media entity to start graph walk with
056f4f30 223 * @prepare: true to walk the current pipeline and acquire all subdevs
d3953223 224 *
740ad921 225 * Called with the graph mutex held.
d3953223 226 */
403dfbec 227static int __fimc_pipeline_open(struct exynos_media_pipeline *ep,
056f4f30 228 struct media_entity *me, bool prepare)
d3953223 229{
056f4f30 230 struct fimc_md *fmd = entity_to_fimc_mdev(me);
403dfbec 231 struct fimc_pipeline *p = to_fimc_pipeline(ep);
056f4f30 232 struct v4l2_subdev *sd;
d3953223 233
056f4f30
SN
234 if (WARN_ON(p == NULL || me == NULL))
235 return -EINVAL;
236
237 if (prepare)
0f735f52
SN
238 fimc_pipeline_prepare(p, me);
239
056f4f30 240 sd = p->subdevs[IDX_SENSOR];
76775776
JA
241 if (sd == NULL) {
242 pr_warn("%s(): No sensor subdev\n", __func__);
243 /*
244 * Pipeline open cannot fail so as to make it possible
245 * for the user space to configure the pipeline.
246 */
056f4f30 247 return 0;
76775776 248 }
0f735f52 249
76775776 250 return __fimc_pipeline_enable(ep, fmd);
d3953223
SN
251}
252
d3953223 253/**
b9ee31e6 254 * __fimc_pipeline_close - disable the sensor clock and pipeline power
d3953223
SN
255 * @fimc: fimc device terminating the pipeline
256 *
740ad921 257 * Disable power of all subdevs and turn the external sensor clock off.
d3953223 258 */
403dfbec 259static int __fimc_pipeline_close(struct exynos_media_pipeline *ep)
d3953223 260{
403dfbec 261 struct fimc_pipeline *p = to_fimc_pipeline(ep);
056f4f30
SN
262 struct v4l2_subdev *sd = p ? p->subdevs[IDX_SENSOR] : NULL;
263 struct fimc_md *fmd;
36da6fcd 264 int ret;
740ad921 265
36da6fcd
SN
266 if (sd == NULL) {
267 pr_warn("%s(): No sensor subdev\n", __func__);
268 return 0;
d3953223 269 }
056f4f30 270
36da6fcd 271 ret = fimc_pipeline_s_power(p, 0);
36da6fcd 272
056f4f30
SN
273 fmd = entity_to_fimc_mdev(&sd->entity);
274
275 /* Disable PXLASYNC clock if this pipeline includes FIMC-IS */
276 if (!IS_ERR(fmd->wbclk[CLK_IDX_WB_B]) && p->subdevs[IDX_IS_ISP])
277 clk_disable_unprepare(fmd->wbclk[CLK_IDX_WB_B]);
278
d3953223
SN
279 return ret == -ENXIO ? 0 : ret;
280}
281
d3953223 282/**
8d274e7c 283 * __fimc_pipeline_s_stream - call s_stream() on pipeline subdevs
0f735f52 284 * @pipeline: video pipeline structure
8d274e7c 285 * @on: passed as the s_stream() callback argument
d3953223 286 */
403dfbec 287static int __fimc_pipeline_s_stream(struct exynos_media_pipeline *ep, bool on)
d3953223 288{
8d274e7c
SN
289 static const u8 seq[2][IDX_MAX] = {
290 { IDX_FIMC, IDX_SENSOR, IDX_IS_ISP, IDX_CSIS, IDX_FLITE },
291 { IDX_CSIS, IDX_FLITE, IDX_FIMC, IDX_SENSOR, IDX_IS_ISP },
292 };
403dfbec 293 struct fimc_pipeline *p = to_fimc_pipeline(ep);
76775776
JA
294 struct fimc_md *fmd = entity_to_fimc_mdev(&p->subdevs[IDX_CSIS]->entity);
295 enum fimc_subdev_index sd_id;
8d274e7c 296 int i, ret = 0;
d3953223 297
76775776
JA
298 if (p->subdevs[IDX_SENSOR] == NULL) {
299 if (!fmd->user_subdev_api) {
300 /*
301 * Sensor must be already discovered if we
302 * aren't in the user_subdev_api mode
303 */
304 return -ENODEV;
305 }
306
307 /* Get pipeline sink entity */
308 if (p->subdevs[IDX_FIMC])
309 sd_id = IDX_FIMC;
310 else if (p->subdevs[IDX_IS_ISP])
311 sd_id = IDX_IS_ISP;
312 else if (p->subdevs[IDX_FLITE])
313 sd_id = IDX_FLITE;
314 else
315 return -ENODEV;
316
317 /*
318 * Sensor could have been linked between open and STREAMON -
319 * check if this is the case.
320 */
321 fimc_pipeline_prepare(p, &p->subdevs[sd_id]->entity);
322
323 if (p->subdevs[IDX_SENSOR] == NULL)
324 return -ENODEV;
325
326 ret = __fimc_pipeline_enable(ep, fmd);
327 if (ret < 0)
328 return ret;
329
330 }
d3953223 331
0f735f52 332 for (i = 0; i < IDX_MAX; i++) {
8d274e7c 333 unsigned int idx = seq[on][i];
0f735f52
SN
334
335 ret = v4l2_subdev_call(p->subdevs[idx], video, s_stream, on);
336
337 if (ret < 0 && ret != -ENOIOCTLCMD && ret != -ENODEV)
8d274e7c 338 goto error;
0f735f52 339 }
76775776 340
0f735f52 341 return 0;
8d274e7c 342error:
76775776 343 fimc_pipeline_s_power(p, !on);
8d274e7c
SN
344 for (; i >= 0; i--) {
345 unsigned int idx = seq[on][i];
346 v4l2_subdev_call(p->subdevs[idx], video, s_stream, !on);
347 }
348 return ret;
d3953223 349}
b9ee31e6
SN
350
351/* Media pipeline operations for the FIMC/FIMC-LITE video device driver */
403dfbec 352static const struct exynos_media_pipeline_ops fimc_pipeline_ops = {
740ad921
SN
353 .open = __fimc_pipeline_open,
354 .close = __fimc_pipeline_close,
355 .set_stream = __fimc_pipeline_s_stream,
b9ee31e6 356};
d3953223 357
403dfbec
SN
358static struct exynos_media_pipeline *fimc_md_pipeline_create(
359 struct fimc_md *fmd)
360{
361 struct fimc_pipeline *p;
362
363 p = kzalloc(sizeof(*p), GFP_KERNEL);
364 if (!p)
365 return NULL;
366
367 list_add_tail(&p->list, &fmd->pipelines);
368
369 p->ep.ops = &fimc_pipeline_ops;
370 return &p->ep;
371}
372
373static void fimc_md_pipelines_free(struct fimc_md *fmd)
374{
375 while (!list_empty(&fmd->pipelines)) {
376 struct fimc_pipeline *p;
377
378 p = list_entry(fmd->pipelines.next, typeof(*p), list);
379 list_del(&p->list);
380 kfree(p);
381 }
382}
383
2b13f7d4
SN
384/* Parse port node and register as a sub-device any sensor specified there. */
385static int fimc_md_parse_port_node(struct fimc_md *fmd,
386 struct device_node *port,
387 unsigned int index)
388{
49b2f4c5 389 struct fimc_source_info *pd = &fmd->sensor[index].pdata;
2b13f7d4 390 struct device_node *rem, *ep, *np;
2b13f7d4 391 struct v4l2_of_endpoint endpoint;
2b13f7d4
SN
392
393 /* Assume here a port node can have only one endpoint node. */
394 ep = of_get_next_child(port, NULL);
395 if (!ep)
396 return 0;
397
398 v4l2_of_parse_endpoint(ep, &endpoint);
f2a575f6 399 if (WARN_ON(endpoint.base.port == 0) || index >= FIMC_MAX_SENSORS)
2b13f7d4
SN
400 return -EINVAL;
401
f2a575f6 402 pd->mux_id = (endpoint.base.port - 1) & 0x1;
2b13f7d4 403
fd9fdb78 404 rem = of_graph_get_remote_port_parent(ep);
2b13f7d4
SN
405 of_node_put(ep);
406 if (rem == NULL) {
407 v4l2_info(&fmd->v4l2_dev, "Remote device at %s not found\n",
408 ep->full_name);
409 return 0;
410 }
2b13f7d4 411
f2a575f6 412 if (fimc_input_is_parallel(endpoint.base.port)) {
2b13f7d4
SN
413 if (endpoint.bus_type == V4L2_MBUS_PARALLEL)
414 pd->sensor_bus_type = FIMC_BUS_TYPE_ITU_601;
415 else
416 pd->sensor_bus_type = FIMC_BUS_TYPE_ITU_656;
417 pd->flags = endpoint.bus.parallel.flags;
f2a575f6 418 } else if (fimc_input_is_mipi_csi(endpoint.base.port)) {
2b13f7d4
SN
419 /*
420 * MIPI CSI-2: only input mux selection and
421 * the sensor's clock frequency is needed.
422 */
423 pd->sensor_bus_type = FIMC_BUS_TYPE_MIPI_CSI2;
424 } else {
425 v4l2_err(&fmd->v4l2_dev, "Wrong port id (%u) at node %s\n",
f2a575f6 426 endpoint.base.port, rem->full_name);
2b13f7d4
SN
427 }
428 /*
429 * For FIMC-IS handled sensors, that are placed under i2c-isp device
430 * node, FIMC is connected to the FIMC-IS through its ISP Writeback
431 * input. Sensors are attached to the FIMC-LITE hostdata interface
432 * directly or through MIPI-CSIS, depending on the external media bus
433 * used. This needs to be handled in a more reliable way, not by just
434 * checking parent's node name.
435 */
436 np = of_get_parent(rem);
437
438 if (np && !of_node_cmp(np->name, "i2c-isp"))
439 pd->fimc_bus_type = FIMC_BUS_TYPE_ISP_WRITEBACK;
440 else
441 pd->fimc_bus_type = pd->sensor_bus_type;
442
fa91f105
SN
443 if (WARN_ON(index >= ARRAY_SIZE(fmd->sensor)))
444 return -EINVAL;
2b13f7d4 445
fa91f105
SN
446 fmd->sensor[index].asd.match_type = V4L2_ASYNC_MATCH_OF;
447 fmd->sensor[index].asd.match.of.node = rem;
448 fmd->async_subdevs[index] = &fmd->sensor[index].asd;
449
450 fmd->num_sensors++;
451
452 of_node_put(rem);
453 return 0;
2b13f7d4
SN
454}
455
456/* Register all SoC external sub-devices */
49b2f4c5 457static int fimc_md_register_sensor_entities(struct fimc_md *fmd)
2b13f7d4
SN
458{
459 struct device_node *parent = fmd->pdev->dev.of_node;
460 struct device_node *node, *ports;
461 int index = 0;
462 int ret;
463
49b2f4c5
SN
464 /*
465 * Runtime resume one of the FIMC entities to make sure
466 * the sclk_cam clocks are not globally disabled.
467 */
468 if (!fmd->pmf)
469 return -ENXIO;
470
471 ret = pm_runtime_get_sync(fmd->pmf);
472 if (ret < 0)
473 return ret;
474
475 fmd->num_sensors = 0;
476
2b13f7d4
SN
477 /* Attach sensors linked to MIPI CSI-2 receivers */
478 for_each_available_child_of_node(parent, node) {
479 struct device_node *port;
480
481 if (of_node_cmp(node->name, "csis"))
482 continue;
483 /* The csis node can have only port subnode. */
484 port = of_get_next_child(node, NULL);
485 if (!port)
486 continue;
487
488 ret = fimc_md_parse_port_node(fmd, port, index);
489 if (ret < 0)
49b2f4c5 490 goto rpm_put;
2b13f7d4
SN
491 index++;
492 }
493
494 /* Attach sensors listed in the parallel-ports node */
495 ports = of_get_child_by_name(parent, "parallel-ports");
496 if (!ports)
49b2f4c5 497 goto rpm_put;
2b13f7d4
SN
498
499 for_each_child_of_node(ports, node) {
500 ret = fimc_md_parse_port_node(fmd, node, index);
501 if (ret < 0)
502 break;
503 index++;
504 }
49b2f4c5
SN
505rpm_put:
506 pm_runtime_put(fmd->pmf);
507 return ret;
2b13f7d4
SN
508}
509
e2985a26
SN
510static int __of_get_csis_id(struct device_node *np)
511{
512 u32 reg = 0;
513
514 np = of_get_child_by_name(np, "port");
515 if (!np)
516 return -EINVAL;
517 of_property_read_u32(np, "reg", &reg);
518 return reg - FIMC_INPUT_MIPI_CSI2_0;
519}
d3953223
SN
520
521/*
7b43a6f3 522 * MIPI-CSIS, FIMC and FIMC-LITE platform devices registration.
d3953223 523 */
7b43a6f3
SN
524static int register_fimc_lite_entity(struct fimc_md *fmd,
525 struct fimc_lite *fimc_lite)
d3953223 526{
8163ec0b 527 struct v4l2_subdev *sd;
403dfbec 528 struct exynos_media_pipeline *ep;
afd7348c 529 int ret;
4af81310 530
7b43a6f3
SN
531 if (WARN_ON(fimc_lite->index >= FIMC_LITE_MAX_DEVS ||
532 fmd->fimc_lite[fimc_lite->index]))
533 return -EBUSY;
d3953223 534
7b43a6f3
SN
535 sd = &fimc_lite->subdev;
536 sd->grp_id = GRP_ID_FLITE;
403dfbec
SN
537
538 ep = fimc_md_pipeline_create(fmd);
539 if (!ep)
540 return -ENOMEM;
541
542 v4l2_set_subdev_hostdata(sd, ep);
693f5c40
SN
543
544 ret = v4l2_device_register_subdev(&fmd->v4l2_dev, sd);
7b43a6f3
SN
545 if (!ret)
546 fmd->fimc_lite[fimc_lite->index] = fimc_lite;
547 else
548 v4l2_err(&fmd->v4l2_dev, "Failed to register FIMC.LITE%d\n",
549 fimc_lite->index);
550 return ret;
d3953223
SN
551}
552
7b43a6f3 553static int register_fimc_entity(struct fimc_md *fmd, struct fimc_dev *fimc)
4af81310 554{
7b43a6f3 555 struct v4l2_subdev *sd;
403dfbec 556 struct exynos_media_pipeline *ep;
4af81310
SN
557 int ret;
558
7b43a6f3
SN
559 if (WARN_ON(fimc->id >= FIMC_MAX_DEVS || fmd->fimc[fimc->id]))
560 return -EBUSY;
4af81310 561
7b43a6f3
SN
562 sd = &fimc->vid_cap.subdev;
563 sd->grp_id = GRP_ID_FIMC;
403dfbec
SN
564
565 ep = fimc_md_pipeline_create(fmd);
566 if (!ep)
567 return -ENOMEM;
568
569 v4l2_set_subdev_hostdata(sd, ep);
4af81310 570
7b43a6f3
SN
571 ret = v4l2_device_register_subdev(&fmd->v4l2_dev, sd);
572 if (!ret) {
3e20c345
SN
573 if (!fmd->pmf && fimc->pdev)
574 fmd->pmf = &fimc->pdev->dev;
7b43a6f3
SN
575 fmd->fimc[fimc->id] = fimc;
576 fimc->vid_cap.user_subdev_api = fmd->user_subdev_api;
577 } else {
578 v4l2_err(&fmd->v4l2_dev, "Failed to register FIMC.%d (%d)\n",
579 fimc->id, ret);
4af81310 580 }
7b43a6f3 581 return ret;
4af81310
SN
582}
583
7b43a6f3
SN
584static int register_csis_entity(struct fimc_md *fmd,
585 struct platform_device *pdev,
586 struct v4l2_subdev *sd)
d3953223 587{
7b43a6f3 588 struct device_node *node = pdev->dev.of_node;
d3953223
SN
589 int id, ret;
590
e2985a26 591 id = node ? __of_get_csis_id(node) : max(0, pdev->id);
7b43a6f3 592
e2985a26
SN
593 if (WARN_ON(id < 0 || id >= CSIS_MAX_ENTITIES))
594 return -ENOENT;
7b43a6f3 595
e2985a26
SN
596 if (WARN_ON(fmd->csis[id].sd))
597 return -EBUSY;
d3953223 598
588c87be 599 sd->grp_id = GRP_ID_CSIS;
d3953223 600 ret = v4l2_device_register_subdev(&fmd->v4l2_dev, sd);
afd7348c
SN
601 if (!ret)
602 fmd->csis[id].sd = sd;
603 else
d3953223 604 v4l2_err(&fmd->v4l2_dev,
7b43a6f3 605 "Failed to register MIPI-CSIS.%d (%d)\n", id, ret);
d3953223
SN
606 return ret;
607}
608
e781bbe3
SN
609static int register_fimc_is_entity(struct fimc_md *fmd, struct fimc_is *is)
610{
611 struct v4l2_subdev *sd = &is->isp.subdev;
34947b8a 612 struct exynos_media_pipeline *ep;
e781bbe3
SN
613 int ret;
614
34947b8a
SN
615 /* Allocate pipeline object for the ISP capture video node. */
616 ep = fimc_md_pipeline_create(fmd);
617 if (!ep)
618 return -ENOMEM;
619
620 v4l2_set_subdev_hostdata(sd, ep);
621
e781bbe3
SN
622 ret = v4l2_device_register_subdev(&fmd->v4l2_dev, sd);
623 if (ret) {
624 v4l2_err(&fmd->v4l2_dev,
625 "Failed to register FIMC-ISP (%d)\n", ret);
626 return ret;
627 }
628
629 fmd->fimc_is = is;
630 return 0;
631}
632
7b43a6f3
SN
633static int fimc_md_register_platform_entity(struct fimc_md *fmd,
634 struct platform_device *pdev,
635 int plat_entity)
d3953223 636{
7b43a6f3
SN
637 struct device *dev = &pdev->dev;
638 int ret = -EPROBE_DEFER;
639 void *drvdata;
640
641 /* Lock to ensure dev->driver won't change. */
642 device_lock(dev);
643
644 if (!dev->driver || !try_module_get(dev->driver->owner))
645 goto dev_unlock;
646
647 drvdata = dev_get_drvdata(dev);
f58c91ce 648 /* Some subdev didn't probe successfully id drvdata is NULL */
7b43a6f3
SN
649 if (drvdata) {
650 switch (plat_entity) {
651 case IDX_FIMC:
652 ret = register_fimc_entity(fmd, drvdata);
653 break;
654 case IDX_FLITE:
655 ret = register_fimc_lite_entity(fmd, drvdata);
ecd9acbf 656 break;
7b43a6f3
SN
657 case IDX_CSIS:
658 ret = register_csis_entity(fmd, pdev, drvdata);
659 break;
e781bbe3
SN
660 case IDX_IS_ISP:
661 ret = register_fimc_is_entity(fmd, drvdata);
662 break;
7b43a6f3
SN
663 default:
664 ret = -ENODEV;
ecd9acbf
SN
665 }
666 }
d3953223 667
7b43a6f3
SN
668 module_put(dev->driver->owner);
669dev_unlock:
670 device_unlock(dev);
671 if (ret == -EPROBE_DEFER)
672 dev_info(&fmd->pdev->dev, "deferring %s device registration\n",
673 dev_name(dev));
674 else if (ret < 0)
675 dev_err(&fmd->pdev->dev, "%s device registration failed (%d)\n",
676 dev_name(dev), ret);
677 return ret;
678}
679
e2985a26 680/* Register FIMC, FIMC-LITE and CSIS media entities */
49b2f4c5
SN
681static int fimc_md_register_platform_entities(struct fimc_md *fmd,
682 struct device_node *parent)
e2985a26
SN
683{
684 struct device_node *node;
685 int ret = 0;
686
687 for_each_available_child_of_node(parent, node) {
688 struct platform_device *pdev;
689 int plat_entity = -1;
690
691 pdev = of_find_device_by_node(node);
692 if (!pdev)
693 continue;
694
695 /* If driver of any entity isn't ready try all again later. */
696 if (!strcmp(node->name, CSIS_OF_NODE_NAME))
697 plat_entity = IDX_CSIS;
e781bbe3
SN
698 else if (!strcmp(node->name, FIMC_IS_OF_NODE_NAME))
699 plat_entity = IDX_IS_ISP;
e2985a26
SN
700 else if (!strcmp(node->name, FIMC_LITE_OF_NODE_NAME))
701 plat_entity = IDX_FLITE;
702 else if (!strcmp(node->name, FIMC_OF_NODE_NAME) &&
703 !of_property_read_bool(node, "samsung,lcd-wb"))
704 plat_entity = IDX_FIMC;
705
706 if (plat_entity >= 0)
707 ret = fimc_md_register_platform_entity(fmd, pdev,
708 plat_entity);
709 put_device(&pdev->dev);
710 if (ret < 0)
711 break;
712 }
713
714 return ret;
715}
e2985a26 716
d3953223
SN
717static void fimc_md_unregister_entities(struct fimc_md *fmd)
718{
719 int i;
720
721 for (i = 0; i < FIMC_MAX_DEVS; i++) {
403dfbec
SN
722 struct fimc_dev *dev = fmd->fimc[i];
723 if (dev == NULL)
d3953223 724 continue;
403dfbec
SN
725 v4l2_device_unregister_subdev(&dev->vid_cap.subdev);
726 dev->vid_cap.ve.pipe = NULL;
d3953223
SN
727 fmd->fimc[i] = NULL;
728 }
4af81310 729 for (i = 0; i < FIMC_LITE_MAX_DEVS; i++) {
403dfbec
SN
730 struct fimc_lite *dev = fmd->fimc_lite[i];
731 if (dev == NULL)
4af81310 732 continue;
403dfbec
SN
733 v4l2_device_unregister_subdev(&dev->subdev);
734 dev->ve.pipe = NULL;
4af81310
SN
735 fmd->fimc_lite[i] = NULL;
736 }
d3953223
SN
737 for (i = 0; i < CSIS_MAX_ENTITIES; i++) {
738 if (fmd->csis[i].sd == NULL)
739 continue;
740 v4l2_device_unregister_subdev(fmd->csis[i].sd);
741 fmd->csis[i].sd = NULL;
742 }
e41a35cb
SN
743
744 if (fmd->fimc_is)
745 v4l2_device_unregister_subdev(&fmd->fimc_is->isp.subdev);
746
7b43a6f3 747 v4l2_info(&fmd->v4l2_dev, "Unregistered all entities\n");
d3953223
SN
748}
749
d3953223
SN
750/**
751 * __fimc_md_create_fimc_links - create links to all FIMC entities
752 * @fmd: fimc media device
753 * @source: the source entity to create links to all fimc entities from
754 * @sensor: sensor subdev linked to FIMC[fimc_id] entity, may be null
755 * @pad: the source entity pad index
d0da3c35 756 * @link_mask: bitmask of the fimc devices for which link should be enabled
d3953223 757 */
4af81310
SN
758static int __fimc_md_create_fimc_sink_links(struct fimc_md *fmd,
759 struct media_entity *source,
760 struct v4l2_subdev *sensor,
d0da3c35 761 int pad, int link_mask)
d3953223 762{
4c8f0629 763 struct fimc_source_info *si = NULL;
d3953223 764 struct media_entity *sink;
4af81310 765 unsigned int flags = 0;
f998bb7b 766 int i, ret = 0;
d3953223 767
f998bb7b
SN
768 if (sensor) {
769 si = v4l2_get_subdev_hostdata(sensor);
770 /* Skip direct FIMC links in the logical FIMC-IS sensor path */
4c8f0629 771 if (si && si->fimc_bus_type == FIMC_BUS_TYPE_ISP_WRITEBACK)
f998bb7b
SN
772 ret = 1;
773 }
774
775 for (i = 0; !ret && i < FIMC_MAX_DEVS; i++) {
d3953223 776 if (!fmd->fimc[i])
4af81310 777 continue;
d3953223
SN
778 /*
779 * Some FIMC variants are not fitted with camera capture
780 * interface. Skip creating a link from sensor for those.
781 */
4af81310 782 if (!fmd->fimc[i]->variant->has_cam_if)
d3953223
SN
783 continue;
784
d0da3c35 785 flags = ((1 << i) & link_mask) ? MEDIA_LNK_FL_ENABLED : 0;
4af81310 786
693f5c40 787 sink = &fmd->fimc[i]->vid_cap.subdev.entity;
8df00a15 788 ret = media_create_pad_link(source, pad, sink,
88fa8311 789 FIMC_SD_PAD_SINK_CAM, flags);
d3953223
SN
790 if (ret)
791 return ret;
792
237e0265
SN
793 /* Notify FIMC capture subdev entity */
794 ret = media_entity_call(sink, link_setup, &sink->pads[0],
795 &source->pads[pad], flags);
796 if (ret)
797 break;
798
542fb082 799 v4l2_info(&fmd->v4l2_dev, "created link [%s] %c> [%s]\n",
d3953223 800 source->name, flags ? '=' : '-', sink->name);
d3953223 801 }
4af81310
SN
802
803 for (i = 0; i < FIMC_LITE_MAX_DEVS; i++) {
804 if (!fmd->fimc_lite[i])
805 continue;
806
4af81310 807 sink = &fmd->fimc_lite[i]->subdev.entity;
8df00a15 808 ret = media_create_pad_link(source, pad, sink,
f998bb7b 809 FLITE_SD_PAD_SINK, 0);
4af81310
SN
810 if (ret)
811 return ret;
812
813 /* Notify FIMC-LITE subdev entity */
814 ret = media_entity_call(sink, link_setup, &sink->pads[0],
f998bb7b 815 &source->pads[pad], 0);
4af81310
SN
816 if (ret)
817 break;
818
f998bb7b
SN
819 v4l2_info(&fmd->v4l2_dev, "created link [%s] -> [%s]\n",
820 source->name, sink->name);
4af81310 821 }
d3953223
SN
822 return 0;
823}
824
4af81310
SN
825/* Create links from FIMC-LITE source pads to other entities */
826static int __fimc_md_create_flite_source_links(struct fimc_md *fmd)
827{
828 struct media_entity *source, *sink;
a26860bd 829 int i, ret = 0;
4af81310
SN
830
831 for (i = 0; i < FIMC_LITE_MAX_DEVS; i++) {
832 struct fimc_lite *fimc = fmd->fimc_lite[i];
f998bb7b 833
4af81310
SN
834 if (fimc == NULL)
835 continue;
f998bb7b 836
4af81310 837 source = &fimc->subdev.entity;
bc7584b0 838 sink = &fimc->ve.vdev.entity;
4af81310 839 /* FIMC-LITE's subdev and video node */
8df00a15 840 ret = media_create_pad_link(source, FLITE_SD_PAD_SOURCE_DMA,
f998bb7b
SN
841 sink, 0, 0);
842 if (ret)
843 break;
844 /* Link from FIMC-LITE to IS-ISP subdev */
845 sink = &fmd->fimc_is->isp.subdev.entity;
8df00a15 846 ret = media_create_pad_link(source, FLITE_SD_PAD_SOURCE_ISP,
f998bb7b 847 sink, 0, 0);
4af81310
SN
848 if (ret)
849 break;
f998bb7b
SN
850 }
851
852 return ret;
853}
854
855/* Create FIMC-IS links */
856static int __fimc_md_create_fimc_is_links(struct fimc_md *fmd)
857{
34947b8a 858 struct fimc_isp *isp = &fmd->fimc_is->isp;
f998bb7b
SN
859 struct media_entity *source, *sink;
860 int i, ret;
861
34947b8a 862 source = &isp->subdev.entity;
f998bb7b
SN
863
864 for (i = 0; i < FIMC_MAX_DEVS; i++) {
865 if (fmd->fimc[i] == NULL)
866 continue;
867
34947b8a 868 /* Link from FIMC-IS-ISP subdev to FIMC */
f998bb7b 869 sink = &fmd->fimc[i]->vid_cap.subdev.entity;
8df00a15 870 ret = media_create_pad_link(source, FIMC_ISP_SD_PAD_SRC_FIFO,
f998bb7b
SN
871 sink, FIMC_SD_PAD_SINK_FIFO, 0);
872 if (ret)
873 return ret;
4af81310
SN
874 }
875
34947b8a
SN
876 /* Link from FIMC-IS-ISP subdev to fimc-is-isp.capture video node */
877 sink = &isp->video_capture.ve.vdev.entity;
878
879 /* Skip this link if the fimc-is-isp video node driver isn't built-in */
880 if (sink->num_pads == 0)
881 return 0;
882
8df00a15 883 return media_create_pad_link(source, FIMC_ISP_SD_PAD_SRC_DMA,
34947b8a 884 sink, 0, 0);
4af81310
SN
885}
886
d3953223
SN
887/**
888 * fimc_md_create_links - create default links between registered entities
889 *
890 * Parallel interface sensor entities are connected directly to FIMC capture
891 * entities. The sensors using MIPI CSIS bus are connected through immutable
892 * link with CSI receiver entity specified by mux_id. Any registered CSIS
893 * entity has a link to each registered FIMC capture entity. Enabled links
894 * are created by default between each subsequent registered sensor and
895 * subsequent FIMC capture entity. The number of default active links is
896 * determined by the number of available sensors or FIMC entities,
897 * whichever is less.
898 */
899static int fimc_md_create_links(struct fimc_md *fmd)
900{
a8697ec8 901 struct v4l2_subdev *csi_sensors[CSIS_MAX_ENTITIES] = { NULL };
d3953223 902 struct v4l2_subdev *sensor, *csis;
56bc911a 903 struct fimc_source_info *pdata;
237e0265 904 struct media_entity *source, *sink;
d0da3c35
SN
905 int i, pad, fimc_id = 0, ret = 0;
906 u32 flags, link_mask = 0;
d3953223
SN
907
908 for (i = 0; i < fmd->num_sensors; i++) {
909 if (fmd->sensor[i].subdev == NULL)
910 continue;
911
912 sensor = fmd->sensor[i].subdev;
4c8f0629
SN
913 pdata = v4l2_get_subdev_hostdata(sensor);
914 if (!pdata)
d3953223
SN
915 continue;
916
917 source = NULL;
d3953223 918
56bc911a
SN
919 switch (pdata->sensor_bus_type) {
920 case FIMC_BUS_TYPE_MIPI_CSI2:
d3953223
SN
921 if (WARN(pdata->mux_id >= CSIS_MAX_ENTITIES,
922 "Wrong CSI channel id: %d\n", pdata->mux_id))
923 return -EINVAL;
924
925 csis = fmd->csis[pdata->mux_id].sd;
926 if (WARN(csis == NULL,
927 "MIPI-CSI interface specified "
928 "but s5p-csis module is not loaded!\n"))
d12392ec 929 return -EINVAL;
d3953223 930
1c9f5bd7 931 pad = sensor->entity.num_pads - 1;
8df00a15 932 ret = media_create_pad_link(&sensor->entity, pad,
d3953223
SN
933 &csis->entity, CSIS_PAD_SINK,
934 MEDIA_LNK_FL_IMMUTABLE |
935 MEDIA_LNK_FL_ENABLED);
936 if (ret)
937 return ret;
938
969e877c 939 v4l2_info(&fmd->v4l2_dev, "created link [%s] => [%s]\n",
d3953223
SN
940 sensor->entity.name, csis->entity.name);
941
4af81310 942 source = NULL;
5d33ee92 943 csi_sensors[pdata->mux_id] = sensor;
d3953223
SN
944 break;
945
56bc911a 946 case FIMC_BUS_TYPE_ITU_601...FIMC_BUS_TYPE_ITU_656:
d3953223
SN
947 source = &sensor->entity;
948 pad = 0;
949 break;
950
951 default:
952 v4l2_err(&fmd->v4l2_dev, "Wrong bus_type: %x\n",
56bc911a 953 pdata->sensor_bus_type);
d3953223
SN
954 return -EINVAL;
955 }
956 if (source == NULL)
957 continue;
958
d0da3c35 959 link_mask = 1 << fimc_id++;
4af81310 960 ret = __fimc_md_create_fimc_sink_links(fmd, source, sensor,
d0da3c35 961 pad, link_mask);
4af81310
SN
962 }
963
a8697ec8 964 for (i = 0; i < CSIS_MAX_ENTITIES; i++) {
4af81310
SN
965 if (fmd->csis[i].sd == NULL)
966 continue;
f998bb7b 967
4af81310
SN
968 source = &fmd->csis[i].sd->entity;
969 pad = CSIS_PAD_SOURCE;
5d33ee92 970 sensor = csi_sensors[i];
4af81310 971
d0da3c35 972 link_mask = 1 << fimc_id++;
5d33ee92 973 ret = __fimc_md_create_fimc_sink_links(fmd, source, sensor,
d0da3c35 974 pad, link_mask);
d3953223 975 }
4af81310 976
237e0265
SN
977 /* Create immutable links between each FIMC's subdev and video node */
978 flags = MEDIA_LNK_FL_IMMUTABLE | MEDIA_LNK_FL_ENABLED;
979 for (i = 0; i < FIMC_MAX_DEVS; i++) {
980 if (!fmd->fimc[i])
981 continue;
f998bb7b 982
693f5c40 983 source = &fmd->fimc[i]->vid_cap.subdev.entity;
bc7584b0 984 sink = &fmd->fimc[i]->vid_cap.ve.vdev.entity;
f998bb7b 985
8df00a15 986 ret = media_create_pad_link(source, FIMC_SD_PAD_SOURCE,
237e0265
SN
987 sink, 0, flags);
988 if (ret)
989 break;
990 }
991
f998bb7b
SN
992 ret = __fimc_md_create_flite_source_links(fmd);
993 if (ret < 0)
994 return ret;
995
996 if (fmd->use_isp)
997 ret = __fimc_md_create_fimc_is_links(fmd);
998
999 return ret;
d3953223
SN
1000}
1001
1002/*
056f4f30 1003 * The peripheral sensor and CAM_BLK (PIXELASYNCMx) clocks management.
d3953223 1004 */
0e23cbbe
SN
1005static void fimc_md_put_clocks(struct fimc_md *fmd)
1006{
1007 int i = FIMC_MAX_CAMCLKS;
1008
1009 while (--i >= 0) {
1010 if (IS_ERR(fmd->camclk[i].clock))
1011 continue;
0e23cbbe
SN
1012 clk_put(fmd->camclk[i].clock);
1013 fmd->camclk[i].clock = ERR_PTR(-EINVAL);
1014 }
056f4f30
SN
1015
1016 /* Writeback (PIXELASYNCMx) clocks */
1017 for (i = 0; i < FIMC_MAX_WBCLKS; i++) {
1018 if (IS_ERR(fmd->wbclk[i]))
1019 continue;
1020 clk_put(fmd->wbclk[i]);
1021 fmd->wbclk[i] = ERR_PTR(-EINVAL);
1022 }
0e23cbbe
SN
1023}
1024
d3953223
SN
1025static int fimc_md_get_clocks(struct fimc_md *fmd)
1026{
49b2f4c5 1027 struct device *dev = &fmd->pdev->dev;
d3953223
SN
1028 char clk_name[32];
1029 struct clk *clock;
044c372a 1030 int i, ret = 0;
0e23cbbe
SN
1031
1032 for (i = 0; i < FIMC_MAX_CAMCLKS; i++)
1033 fmd->camclk[i].clock = ERR_PTR(-EINVAL);
1034
d3953223
SN
1035 for (i = 0; i < FIMC_MAX_CAMCLKS; i++) {
1036 snprintf(clk_name, sizeof(clk_name), "sclk_cam%u", i);
0e23cbbe
SN
1037 clock = clk_get(dev, clk_name);
1038
dc3ae328 1039 if (IS_ERR(clock)) {
49b2f4c5 1040 dev_err(dev, "Failed to get clock: %s\n", clk_name);
0e23cbbe
SN
1041 ret = PTR_ERR(clock);
1042 break;
1043 }
d3953223
SN
1044 fmd->camclk[i].clock = clock;
1045 }
0e23cbbe
SN
1046 if (ret)
1047 fimc_md_put_clocks(fmd);
d3953223 1048
056f4f30
SN
1049 if (!fmd->use_isp)
1050 return 0;
1051 /*
1052 * For now get only PIXELASYNCM1 clock (Writeback B/ISP),
1053 * leave PIXELASYNCM0 out for the LCD Writeback driver.
1054 */
1055 fmd->wbclk[CLK_IDX_WB_A] = ERR_PTR(-EINVAL);
1056
1057 for (i = CLK_IDX_WB_B; i < FIMC_MAX_WBCLKS; i++) {
1058 snprintf(clk_name, sizeof(clk_name), "pxl_async%u", i);
1059 clock = clk_get(dev, clk_name);
1060 if (IS_ERR(clock)) {
1061 v4l2_err(&fmd->v4l2_dev, "Failed to get clock: %s\n",
1062 clk_name);
1063 ret = PTR_ERR(clock);
1064 break;
1065 }
1066 fmd->wbclk[i] = clock;
1067 }
1068 if (ret)
1069 fimc_md_put_clocks(fmd);
1070
0e23cbbe 1071 return ret;
d3953223
SN
1072}
1073
d3775fa7 1074static int __fimc_md_modify_pipeline(struct media_entity *entity, bool enable)
d3953223 1075{
403dfbec 1076 struct exynos_video_entity *ve;
d3775fa7 1077 struct fimc_pipeline *p;
403dfbec 1078 struct video_device *vdev;
d3775fa7 1079 int ret;
d3953223 1080
d3775fa7
SN
1081 vdev = media_entity_to_video_device(entity);
1082 if (vdev->entity.use_count == 0)
d3953223
SN
1083 return 0;
1084
403dfbec 1085 ve = vdev_to_exynos_video_entity(vdev);
d3775fa7
SN
1086 p = to_fimc_pipeline(ve->pipe);
1087 /*
1088 * Nothing to do if we are disabling the pipeline, some link
1089 * has been disconnected and p->subdevs array is cleared now.
1090 */
1091 if (!enable && p->subdevs[IDX_SENSOR] == NULL)
1092 return 0;
403dfbec 1093
d3775fa7
SN
1094 if (enable)
1095 ret = __fimc_pipeline_open(ve->pipe, entity, true);
1096 else
1097 ret = __fimc_pipeline_close(ve->pipe);
131b6c61 1098
d3775fa7
SN
1099 if (ret == 0 && !enable)
1100 memset(p->subdevs, 0, sizeof(p->subdevs));
1101
1102 return ret;
1103}
1104
d10c9894 1105/* Locking: called with entity->graph_obj.mdev->graph_mutex mutex held. */
fd7e5309
SA
1106static int __fimc_md_modify_pipelines(struct media_entity *entity, bool enable,
1107 struct media_entity_graph *graph)
d3775fa7
SN
1108{
1109 struct media_entity *entity_err = entity;
d3775fa7
SN
1110 int ret;
1111
1112 /*
1113 * Walk current graph and call the pipeline open/close routine for each
1114 * opened video node that belongs to the graph of entities connected
1115 * through active links. This is needed as we cannot power on/off the
1116 * subdevs in random order.
1117 */
fd7e5309 1118 media_entity_graph_walk_start(graph, entity);
d3775fa7 1119
fd7e5309 1120 while ((entity = media_entity_graph_walk_next(graph))) {
3efdf62c 1121 if (!is_media_entity_v4l2_io(entity))
d3775fa7
SN
1122 continue;
1123
1124 ret = __fimc_md_modify_pipeline(entity, enable);
1125
1126 if (ret < 0)
1127 goto err;
1128 }
1129
1130 return 0;
d3775fa7 1131
fd7e5309
SA
1132err:
1133 media_entity_graph_walk_start(graph, entity_err);
1134
1135 while ((entity_err = media_entity_graph_walk_next(graph))) {
3efdf62c 1136 if (!is_media_entity_v4l2_io(entity_err))
d3775fa7
SN
1137 continue;
1138
1139 __fimc_md_modify_pipeline(entity_err, !enable);
1140
1141 if (entity_err == entity)
1142 break;
1143 }
1144
1145 return ret;
1146}
1147
1148static int fimc_md_link_notify(struct media_link *link, unsigned int flags,
1149 unsigned int notification)
1150{
fd7e5309
SA
1151 struct media_entity_graph *graph =
1152 &container_of(link->graph_obj.mdev, struct fimc_md,
1153 media_dev)->link_setup_graph;
d3775fa7
SN
1154 struct media_entity *sink = link->sink->entity;
1155 int ret = 0;
1156
1157 /* Before link disconnection */
1158 if (notification == MEDIA_DEV_NOTIFY_PRE_LINK_CH) {
fd7e5309
SA
1159 ret = media_entity_graph_walk_init(graph,
1160 link->graph_obj.mdev);
1161 if (ret)
1162 return ret;
d3775fa7 1163 if (!(flags & MEDIA_LNK_FL_ENABLED))
fd7e5309 1164 ret = __fimc_md_modify_pipelines(sink, false, graph);
cdf58a6f 1165#if 0
d3775fa7 1166 else
cdf58a6f
MCC
1167 /* TODO: Link state change validation */
1168#endif
d3775fa7 1169 /* After link activation */
fd7e5309
SA
1170 } else if (notification == MEDIA_DEV_NOTIFY_POST_LINK_CH) {
1171 if (link->flags & MEDIA_LNK_FL_ENABLED)
1172 ret = __fimc_md_modify_pipelines(sink, true, graph);
1173 media_entity_graph_walk_cleanup(graph);
d3953223 1174 }
740ad921 1175
d3775fa7 1176 return ret ? -EPIPE : 0;
d3953223
SN
1177}
1178
1179static ssize_t fimc_md_sysfs_show(struct device *dev,
1180 struct device_attribute *attr, char *buf)
1181{
1182 struct platform_device *pdev = to_platform_device(dev);
1183 struct fimc_md *fmd = platform_get_drvdata(pdev);
1184
1185 if (fmd->user_subdev_api)
1186 return strlcpy(buf, "Sub-device API (sub-dev)\n", PAGE_SIZE);
1187
1188 return strlcpy(buf, "V4L2 video node only API (vid-dev)\n", PAGE_SIZE);
1189}
1190
1191static ssize_t fimc_md_sysfs_store(struct device *dev,
1192 struct device_attribute *attr,
1193 const char *buf, size_t count)
1194{
1195 struct platform_device *pdev = to_platform_device(dev);
1196 struct fimc_md *fmd = platform_get_drvdata(pdev);
1197 bool subdev_api;
1198 int i;
1199
1200 if (!strcmp(buf, "vid-dev\n"))
1201 subdev_api = false;
1202 else if (!strcmp(buf, "sub-dev\n"))
1203 subdev_api = true;
1204 else
1205 return count;
1206
1207 fmd->user_subdev_api = subdev_api;
1208 for (i = 0; i < FIMC_MAX_DEVS; i++)
1209 if (fmd->fimc[i])
1210 fmd->fimc[i]->vid_cap.user_subdev_api = subdev_api;
1211 return count;
1212}
1213/*
1214 * This device attribute is to select video pipeline configuration method.
1215 * There are following valid values:
1216 * vid-dev - for V4L2 video node API only, subdevice will be configured
1217 * by the host driver.
1218 * sub-dev - for media controller API, subdevs must be configured in user
1219 * space before starting streaming.
1220 */
1221static DEVICE_ATTR(subdev_conf_mode, S_IWUSR | S_IRUGO,
1222 fimc_md_sysfs_show, fimc_md_sysfs_store);
1223
4163851f
SN
1224static int fimc_md_get_pinctrl(struct fimc_md *fmd)
1225{
1226 struct device *dev = &fmd->pdev->dev;
1227 struct fimc_pinctrl *pctl = &fmd->pinctl;
1228
1229 pctl->pinctrl = devm_pinctrl_get(dev);
1230 if (IS_ERR(pctl->pinctrl))
1231 return PTR_ERR(pctl->pinctrl);
1232
1233 pctl->state_default = pinctrl_lookup_state(pctl->pinctrl,
1234 PINCTRL_STATE_DEFAULT);
1235 if (IS_ERR(pctl->state_default))
1236 return PTR_ERR(pctl->state_default);
1237
1238 pctl->state_idle = pinctrl_lookup_state(pctl->pinctrl,
1239 PINCTRL_STATE_IDLE);
1240 return 0;
1241}
1242
d3f5e0c5
SN
1243static int cam_clk_prepare(struct clk_hw *hw)
1244{
1245 struct cam_clk *camclk = to_cam_clk(hw);
1246 int ret;
1247
1248 if (camclk->fmd->pmf == NULL)
1249 return -ENODEV;
1250
1251 ret = pm_runtime_get_sync(camclk->fmd->pmf);
1252 return ret < 0 ? ret : 0;
1253}
1254
1255static void cam_clk_unprepare(struct clk_hw *hw)
1256{
1257 struct cam_clk *camclk = to_cam_clk(hw);
1258
1259 if (camclk->fmd->pmf == NULL)
1260 return;
1261
1262 pm_runtime_put_sync(camclk->fmd->pmf);
1263}
1264
1265static const struct clk_ops cam_clk_ops = {
1266 .prepare = cam_clk_prepare,
1267 .unprepare = cam_clk_unprepare,
1268};
1269
1270static void fimc_md_unregister_clk_provider(struct fimc_md *fmd)
1271{
1272 struct cam_clk_provider *cp = &fmd->clk_provider;
1273 unsigned int i;
1274
1275 if (cp->of_node)
1276 of_clk_del_provider(cp->of_node);
1277
1278 for (i = 0; i < cp->num_clocks; i++)
1279 clk_unregister(cp->clks[i]);
1280}
1281
1282static int fimc_md_register_clk_provider(struct fimc_md *fmd)
1283{
1284 struct cam_clk_provider *cp = &fmd->clk_provider;
1285 struct device *dev = &fmd->pdev->dev;
1286 int i, ret;
1287
1288 for (i = 0; i < FIMC_MAX_CAMCLKS; i++) {
1289 struct cam_clk *camclk = &cp->camclk[i];
1290 struct clk_init_data init;
1291 const char *p_name;
1292
1293 ret = of_property_read_string_index(dev->of_node,
1294 "clock-output-names", i, &init.name);
1295 if (ret < 0)
1296 break;
1297
1298 p_name = __clk_get_name(fmd->camclk[i].clock);
1299
1300 /* It's safe since clk_register() will duplicate the string. */
1301 init.parent_names = &p_name;
1302 init.num_parents = 1;
1303 init.ops = &cam_clk_ops;
1304 init.flags = CLK_SET_RATE_PARENT;
1305 camclk->hw.init = &init;
1306 camclk->fmd = fmd;
1307
1308 cp->clks[i] = clk_register(NULL, &camclk->hw);
1309 if (IS_ERR(cp->clks[i])) {
1310 dev_err(dev, "failed to register clock: %s (%ld)\n",
1311 init.name, PTR_ERR(cp->clks[i]));
1312 ret = PTR_ERR(cp->clks[i]);
1313 goto err;
1314 }
1315 cp->num_clocks++;
1316 }
1317
1318 if (cp->num_clocks == 0) {
1319 dev_warn(dev, "clk provider not registered\n");
1320 return 0;
1321 }
1322
1323 cp->clk_data.clks = cp->clks;
1324 cp->clk_data.clk_num = cp->num_clocks;
1325 cp->of_node = dev->of_node;
1326 ret = of_clk_add_provider(dev->of_node, of_clk_src_onecell_get,
1327 &cp->clk_data);
1328 if (ret == 0)
1329 return 0;
1330err:
1331 fimc_md_unregister_clk_provider(fmd);
1332 return ret;
1333}
d3f5e0c5 1334
fa91f105
SN
1335static int subdev_notifier_bound(struct v4l2_async_notifier *notifier,
1336 struct v4l2_subdev *subdev,
1337 struct v4l2_async_subdev *asd)
1338{
1339 struct fimc_md *fmd = notifier_to_fimc_md(notifier);
1340 struct fimc_sensor_info *si = NULL;
1341 int i;
1342
1343 /* Find platform data for this sensor subdev */
1344 for (i = 0; i < ARRAY_SIZE(fmd->sensor); i++)
1345 if (fmd->sensor[i].asd.match.of.node == subdev->dev->of_node)
1346 si = &fmd->sensor[i];
1347
1348 if (si == NULL)
1349 return -EINVAL;
1350
1351 v4l2_set_subdev_hostdata(subdev, &si->pdata);
1352
1353 if (si->pdata.fimc_bus_type == FIMC_BUS_TYPE_ISP_WRITEBACK)
1354 subdev->grp_id = GRP_ID_FIMC_IS_SENSOR;
1355 else
1356 subdev->grp_id = GRP_ID_SENSOR;
1357
1358 si->subdev = subdev;
1359
1360 v4l2_info(&fmd->v4l2_dev, "Registered sensor subdevice: %s (%d)\n",
1361 subdev->name, fmd->num_sensors);
1362
1363 fmd->num_sensors++;
1364
1365 return 0;
1366}
1367
1368static int subdev_notifier_complete(struct v4l2_async_notifier *notifier)
1369{
1370 struct fimc_md *fmd = notifier_to_fimc_md(notifier);
1371 int ret;
1372
1373 mutex_lock(&fmd->media_dev.graph_mutex);
1374
1375 ret = fimc_md_create_links(fmd);
1376 if (ret < 0)
1377 goto unlock;
1378
1379 ret = v4l2_device_register_subdev_nodes(&fmd->v4l2_dev);
1380unlock:
1381 mutex_unlock(&fmd->media_dev.graph_mutex);
9832e155
JMC
1382 if (ret < 0)
1383 return ret;
1384
1385 return media_device_register(&fmd->media_dev);
fa91f105
SN
1386}
1387
ecd9acbf 1388static int fimc_md_probe(struct platform_device *pdev)
d3953223 1389{
e2985a26 1390 struct device *dev = &pdev->dev;
d3953223
SN
1391 struct v4l2_device *v4l2_dev;
1392 struct fimc_md *fmd;
1393 int ret;
1394
e2985a26 1395 fmd = devm_kzalloc(dev, sizeof(*fmd), GFP_KERNEL);
d3953223
SN
1396 if (!fmd)
1397 return -ENOMEM;
1398
1399 spin_lock_init(&fmd->slock);
403dfbec 1400 INIT_LIST_HEAD(&fmd->pipelines);
49b2f4c5 1401 fmd->pdev = pdev;
d3953223
SN
1402
1403 strlcpy(fmd->media_dev.model, "SAMSUNG S5P FIMC",
1404 sizeof(fmd->media_dev.model));
1405 fmd->media_dev.link_notify = fimc_md_link_notify;
e2985a26 1406 fmd->media_dev.dev = dev;
d3953223
SN
1407
1408 v4l2_dev = &fmd->v4l2_dev;
1409 v4l2_dev->mdev = &fmd->media_dev;
e1d72f4d 1410 v4l2_dev->notify = fimc_sensor_notify;
e2985a26 1411 strlcpy(v4l2_dev->name, "s5p-fimc-md", sizeof(v4l2_dev->name));
d3953223 1412
e781bbe3 1413 fmd->use_isp = fimc_md_is_isp_available(dev->of_node);
49b2f4c5 1414 fmd->user_subdev_api = true;
e781bbe3 1415
2e7508e4
MCC
1416 media_device_init(&fmd->media_dev);
1417
e2985a26 1418 ret = v4l2_device_register(dev, &fmd->v4l2_dev);
d3953223
SN
1419 if (ret < 0) {
1420 v4l2_err(v4l2_dev, "Failed to register v4l2_device: %d\n", ret);
6d91a51a 1421 return ret;
d3953223 1422 }
d3f5e0c5 1423
d3953223
SN
1424 ret = fimc_md_get_clocks(fmd);
1425 if (ret)
fa91f105 1426 goto err_md;
d3953223 1427
4163851f
SN
1428 ret = fimc_md_get_pinctrl(fmd);
1429 if (ret < 0) {
1430 if (ret != EPROBE_DEFER)
1431 dev_err(dev, "Failed to get pinctrl: %d\n", ret);
fa91f105 1432 goto err_clk;
4163851f
SN
1433 }
1434
fa91f105
SN
1435 platform_set_drvdata(pdev, fmd);
1436
1437 /* Protect the media graph while we're registering entities */
1438 mutex_lock(&fmd->media_dev.graph_mutex);
1439
49b2f4c5 1440 ret = fimc_md_register_platform_entities(fmd, dev->of_node);
fa91f105
SN
1441 if (ret) {
1442 mutex_unlock(&fmd->media_dev.graph_mutex);
1443 goto err_clk;
1444 }
d3953223 1445
49b2f4c5
SN
1446 ret = fimc_md_register_sensor_entities(fmd);
1447 if (ret) {
1448 mutex_unlock(&fmd->media_dev.graph_mutex);
1449 goto err_m_ent;
5cbf6f16 1450 }
e2985a26 1451
fa91f105 1452 mutex_unlock(&fmd->media_dev.graph_mutex);
d3953223
SN
1453
1454 ret = device_create_file(&pdev->dev, &dev_attr_subdev_conf_mode);
693f5c40 1455 if (ret)
fa91f105
SN
1456 goto err_m_ent;
1457 /*
1458 * FIMC platform devices need to be registered before the sclk_cam
1459 * clocks provider, as one of these devices needs to be activated
1460 * to enable the clock.
1461 */
1462 ret = fimc_md_register_clk_provider(fmd);
1463 if (ret < 0) {
1464 v4l2_err(v4l2_dev, "clock provider registration failed\n");
1465 goto err_attr;
1466 }
1467
1468 if (fmd->num_sensors > 0) {
1469 fmd->subdev_notifier.subdevs = fmd->async_subdevs;
1470 fmd->subdev_notifier.num_subdevs = fmd->num_sensors;
1471 fmd->subdev_notifier.bound = subdev_notifier_bound;
1472 fmd->subdev_notifier.complete = subdev_notifier_complete;
1473 fmd->num_sensors = 0;
1474
1475 ret = v4l2_async_notifier_register(&fmd->v4l2_dev,
1476 &fmd->subdev_notifier);
1477 if (ret)
1478 goto err_clk_p;
1479 }
693f5c40 1480
693f5c40
SN
1481 return 0;
1482
fa91f105
SN
1483err_clk_p:
1484 fimc_md_unregister_clk_provider(fmd);
1485err_attr:
1486 device_remove_file(&pdev->dev, &dev_attr_subdev_conf_mode);
693f5c40 1487err_clk:
d3953223 1488 fimc_md_put_clocks(fmd);
fa91f105 1489err_m_ent:
d3953223 1490 fimc_md_unregister_entities(fmd);
693f5c40 1491err_md:
9832e155 1492 media_device_cleanup(&fmd->media_dev);
d3953223 1493 v4l2_device_unregister(&fmd->v4l2_dev);
d3953223
SN
1494 return ret;
1495}
1496
4c62e976 1497static int fimc_md_remove(struct platform_device *pdev)
d3953223
SN
1498{
1499 struct fimc_md *fmd = platform_get_drvdata(pdev);
1500
1501 if (!fmd)
1502 return 0;
b74bee15 1503
d3f5e0c5 1504 fimc_md_unregister_clk_provider(fmd);
fa91f105
SN
1505 v4l2_async_notifier_unregister(&fmd->subdev_notifier);
1506
b74bee15 1507 v4l2_device_unregister(&fmd->v4l2_dev);
d3953223
SN
1508 device_remove_file(&pdev->dev, &dev_attr_subdev_conf_mode);
1509 fimc_md_unregister_entities(fmd);
403dfbec 1510 fimc_md_pipelines_free(fmd);
d3953223 1511 media_device_unregister(&fmd->media_dev);
9832e155 1512 media_device_cleanup(&fmd->media_dev);
d3953223 1513 fimc_md_put_clocks(fmd);
fa91f105 1514
d3953223
SN
1515 return 0;
1516}
1517
c42639d8 1518static const struct platform_device_id fimc_driver_ids[] __always_unused = {
e2985a26
SN
1519 { .name = "s5p-fimc-md" },
1520 { },
1521};
1522MODULE_DEVICE_TABLE(platform, fimc_driver_ids);
1523
1524static const struct of_device_id fimc_md_of_match[] = {
1525 { .compatible = "samsung,fimc" },
1526 { },
1527};
1528MODULE_DEVICE_TABLE(of, fimc_md_of_match);
1529
d3953223
SN
1530static struct platform_driver fimc_md_driver = {
1531 .probe = fimc_md_probe,
4c62e976 1532 .remove = fimc_md_remove,
d3953223 1533 .driver = {
e2985a26
SN
1534 .of_match_table = of_match_ptr(fimc_md_of_match),
1535 .name = "s5p-fimc-md",
d3953223
SN
1536 }
1537};
1538
7e566be2 1539static int __init fimc_md_init(void)
d3953223
SN
1540{
1541 int ret;
ecd9acbf 1542
d3953223
SN
1543 request_module("s5p-csis");
1544 ret = fimc_register_driver();
1545 if (ret)
1546 return ret;
ecd9acbf 1547
d3953223
SN
1548 return platform_driver_register(&fimc_md_driver);
1549}
7e566be2
SK
1550
1551static void __exit fimc_md_exit(void)
d3953223
SN
1552{
1553 platform_driver_unregister(&fimc_md_driver);
1554 fimc_unregister_driver();
1555}
1556
1557module_init(fimc_md_init);
1558module_exit(fimc_md_exit);
1559
1560MODULE_AUTHOR("Sylwester Nawrocki <s.nawrocki@samsung.com>");
1561MODULE_DESCRIPTION("S5P FIMC camera host interface/video postprocessor driver");
1562MODULE_LICENSE("GPL");
1563MODULE_VERSION("2.0.1");