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Commit | Line | Data |
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aacb9d31 ST |
1 | /* |
2 | * Driver for Xceive XC5000 "QAM/8VSB single chip tuner" | |
3 | * | |
4 | * Copyright (c) 2007 Xceive Corporation | |
6d897616 | 5 | * Copyright (c) 2007 Steven Toth <stoth@linuxtv.org> |
e80858e8 | 6 | * Copyright (c) 2009 Devin Heitmueller <dheitmueller@kernellabs.com> |
aacb9d31 ST |
7 | * |
8 | * This program is free software; you can redistribute it and/or modify | |
9 | * it under the terms of the GNU General Public License as published by | |
10 | * the Free Software Foundation; either version 2 of the License, or | |
11 | * (at your option) any later version. | |
12 | * | |
13 | * This program is distributed in the hope that it will be useful, | |
14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | * | |
17 | * GNU General Public License for more details. | |
aacb9d31 ST |
18 | */ |
19 | ||
20 | #include <linux/module.h> | |
21 | #include <linux/moduleparam.h> | |
4917019d | 22 | #include <linux/videodev2.h> |
aacb9d31 | 23 | #include <linux/delay.h> |
f7a27ff1 | 24 | #include <linux/workqueue.h> |
aacb9d31 ST |
25 | #include <linux/dvb/frontend.h> |
26 | #include <linux/i2c.h> | |
27 | ||
28 | #include "dvb_frontend.h" | |
29 | ||
30 | #include "xc5000.h" | |
89fd2854 | 31 | #include "tuner-i2c.h" |
aacb9d31 ST |
32 | |
33 | static int debug; | |
34 | module_param(debug, int, 0644); | |
35 | MODULE_PARM_DESC(debug, "Turn on/off debugging (default:off)."); | |
36 | ||
b6bd5eb8 DH |
37 | static int no_poweroff; |
38 | module_param(no_poweroff, int, 0644); | |
39 | MODULE_PARM_DESC(no_poweroff, "0 (default) powers device off when not used.\n" | |
40 | "\t\t1 keep device energized and with tuner ready all the times.\n" | |
41 | "\t\tFaster, but consumes more power and keeps the device hotter"); | |
42 | ||
89fd2854 MK |
43 | static DEFINE_MUTEX(xc5000_list_mutex); |
44 | static LIST_HEAD(hybrid_tuner_instance_list); | |
45 | ||
8f3cd530 | 46 | #define dprintk(level, fmt, arg...) if (debug >= level) \ |
aacb9d31 ST |
47 | printk(KERN_INFO "%s: " fmt, "xc5000", ## arg) |
48 | ||
ffb41234 | 49 | struct xc5000_priv { |
89fd2854 MK |
50 | struct tuner_i2c_props i2c_props; |
51 | struct list_head hybrid_tuner_instance_list; | |
ffb41234 | 52 | |
2a6003c2 | 53 | u32 if_khz; |
409328a4 | 54 | u16 xtal_khz; |
a3eec916 | 55 | u32 freq_hz, freq_offset; |
ffb41234 MK |
56 | u32 bandwidth; |
57 | u8 video_standard; | |
16435202 | 58 | unsigned int mode; |
ffb41234 | 59 | u8 rf_mode; |
496e9057 | 60 | u8 radio_input; |
52e269b1 | 61 | u16 output_amp; |
76efb0ba | 62 | |
6fab81df | 63 | int chip_id; |
de49bc6e | 64 | u16 pll_register_no; |
22d5c6f5 DH |
65 | u8 init_status_supported; |
66 | u8 fw_checksum_supported; | |
f7a27ff1 MCC |
67 | |
68 | struct dvb_frontend *fe; | |
69 | struct delayed_work timer_sleep; | |
5264a522 SK |
70 | |
71 | const struct firmware *firmware; | |
ffb41234 MK |
72 | }; |
73 | ||
aacb9d31 | 74 | /* Misc Defines */ |
724dcbfa | 75 | #define MAX_TV_STANDARD 24 |
aacb9d31 ST |
76 | #define XC_MAX_I2C_WRITE_LENGTH 64 |
77 | ||
f7a27ff1 MCC |
78 | /* Time to suspend after the .sleep callback is called */ |
79 | #define XC5000_SLEEP_TIME 5000 /* ms */ | |
80 | ||
aacb9d31 ST |
81 | /* Signal Types */ |
82 | #define XC_RF_MODE_AIR 0 | |
83 | #define XC_RF_MODE_CABLE 1 | |
84 | ||
27c685a4 ST |
85 | /* Product id */ |
86 | #define XC_PRODUCT_ID_FW_NOT_LOADED 0x2000 | |
5015c27b | 87 | #define XC_PRODUCT_ID_FW_LOADED 0x1388 |
27c685a4 | 88 | |
aacb9d31 ST |
89 | /* Registers */ |
90 | #define XREG_INIT 0x00 | |
91 | #define XREG_VIDEO_MODE 0x01 | |
92 | #define XREG_AUDIO_MODE 0x02 | |
93 | #define XREG_RF_FREQ 0x03 | |
94 | #define XREG_D_CODE 0x04 | |
95 | #define XREG_IF_OUT 0x05 | |
96 | #define XREG_SEEK_MODE 0x07 | |
7f05b530 | 97 | #define XREG_POWER_DOWN 0x0A /* Obsolete */ |
724dcbfa DB |
98 | /* Set the output amplitude - SIF for analog, DTVP/DTVN for digital */ |
99 | #define XREG_OUTPUT_AMP 0x0B | |
aacb9d31 ST |
100 | #define XREG_SIGNALSOURCE 0x0D /* 0=Air, 1=Cable */ |
101 | #define XREG_SMOOTHEDCVBS 0x0E | |
102 | #define XREG_XTALFREQ 0x0F | |
81c4dfe7 | 103 | #define XREG_FINERFREQ 0x10 |
aacb9d31 ST |
104 | #define XREG_DDIMODE 0x11 |
105 | ||
106 | #define XREG_ADC_ENV 0x00 | |
107 | #define XREG_QUALITY 0x01 | |
108 | #define XREG_FRAME_LINES 0x02 | |
109 | #define XREG_HSYNC_FREQ 0x03 | |
110 | #define XREG_LOCK 0x04 | |
111 | #define XREG_FREQ_ERROR 0x05 | |
112 | #define XREG_SNR 0x06 | |
113 | #define XREG_VERSION 0x07 | |
114 | #define XREG_PRODUCT_ID 0x08 | |
115 | #define XREG_BUSY 0x09 | |
bae7b7d7 | 116 | #define XREG_BUILD 0x0D |
7c287f18 | 117 | #define XREG_TOTALGAIN 0x0F |
22d5c6f5 DH |
118 | #define XREG_FW_CHECKSUM 0x12 |
119 | #define XREG_INIT_STATUS 0x13 | |
aacb9d31 ST |
120 | |
121 | /* | |
122 | Basic firmware description. This will remain with | |
123 | the driver for documentation purposes. | |
124 | ||
125 | This represents an I2C firmware file encoded as a | |
126 | string of unsigned char. Format is as follows: | |
127 | ||
128 | char[0 ]=len0_MSB -> len = len_MSB * 256 + len_LSB | |
129 | char[1 ]=len0_LSB -> length of first write transaction | |
130 | char[2 ]=data0 -> first byte to be sent | |
131 | char[3 ]=data1 | |
132 | char[4 ]=data2 | |
133 | char[ ]=... | |
134 | char[M ]=dataN -> last byte to be sent | |
135 | char[M+1]=len1_MSB -> len = len_MSB * 256 + len_LSB | |
136 | char[M+2]=len1_LSB -> length of second write transaction | |
137 | char[M+3]=data0 | |
138 | char[M+4]=data1 | |
139 | ... | |
140 | etc. | |
141 | ||
142 | The [len] value should be interpreted as follows: | |
143 | ||
144 | len= len_MSB _ len_LSB | |
145 | len=1111_1111_1111_1111 : End of I2C_SEQUENCE | |
146 | len=0000_0000_0000_0000 : Reset command: Do hardware reset | |
147 | len=0NNN_NNNN_NNNN_NNNN : Normal transaction: number of bytes = {1:32767) | |
148 | len=1WWW_WWWW_WWWW_WWWW : Wait command: wait for {1:32767} ms | |
149 | ||
150 | For the RESET and WAIT commands, the two following bytes will contain | |
151 | immediately the length of the following transaction. | |
152 | ||
153 | */ | |
8f3cd530 | 154 | struct XC_TV_STANDARD { |
303ddd92 MCC |
155 | char *name; |
156 | u16 audio_mode; | |
157 | u16 video_mode; | |
8f3cd530 | 158 | }; |
aacb9d31 ST |
159 | |
160 | /* Tuner standards */ | |
27c685a4 ST |
161 | #define MN_NTSC_PAL_BTSC 0 |
162 | #define MN_NTSC_PAL_A2 1 | |
163 | #define MN_NTSC_PAL_EIAJ 2 | |
303ddd92 | 164 | #define MN_NTSC_PAL_MONO 3 |
27c685a4 ST |
165 | #define BG_PAL_A2 4 |
166 | #define BG_PAL_NICAM 5 | |
167 | #define BG_PAL_MONO 6 | |
168 | #define I_PAL_NICAM 7 | |
169 | #define I_PAL_NICAM_MONO 8 | |
170 | #define DK_PAL_A2 9 | |
171 | #define DK_PAL_NICAM 10 | |
172 | #define DK_PAL_MONO 11 | |
173 | #define DK_SECAM_A2DK1 12 | |
5015c27b MCC |
174 | #define DK_SECAM_A2LDK3 13 |
175 | #define DK_SECAM_A2MONO 14 | |
27c685a4 ST |
176 | #define L_SECAM_NICAM 15 |
177 | #define LC_SECAM_NICAM 16 | |
178 | #define DTV6 17 | |
179 | #define DTV8 18 | |
180 | #define DTV7_8 19 | |
181 | #define DTV7 20 | |
5015c27b MCC |
182 | #define FM_RADIO_INPUT2 21 |
183 | #define FM_RADIO_INPUT1 22 | |
303ddd92 | 184 | #define FM_RADIO_INPUT1_MONO 23 |
aacb9d31 | 185 | |
303ddd92 | 186 | static struct XC_TV_STANDARD xc5000_standard[MAX_TV_STANDARD] = { |
aacb9d31 ST |
187 | {"M/N-NTSC/PAL-BTSC", 0x0400, 0x8020}, |
188 | {"M/N-NTSC/PAL-A2", 0x0600, 0x8020}, | |
189 | {"M/N-NTSC/PAL-EIAJ", 0x0440, 0x8020}, | |
190 | {"M/N-NTSC/PAL-Mono", 0x0478, 0x8020}, | |
191 | {"B/G-PAL-A2", 0x0A00, 0x8049}, | |
192 | {"B/G-PAL-NICAM", 0x0C04, 0x8049}, | |
193 | {"B/G-PAL-MONO", 0x0878, 0x8059}, | |
194 | {"I-PAL-NICAM", 0x1080, 0x8009}, | |
195 | {"I-PAL-NICAM-MONO", 0x0E78, 0x8009}, | |
196 | {"D/K-PAL-A2", 0x1600, 0x8009}, | |
197 | {"D/K-PAL-NICAM", 0x0E80, 0x8009}, | |
198 | {"D/K-PAL-MONO", 0x1478, 0x8009}, | |
199 | {"D/K-SECAM-A2 DK1", 0x1200, 0x8009}, | |
8f3cd530 | 200 | {"D/K-SECAM-A2 L/DK3", 0x0E00, 0x8009}, |
aacb9d31 ST |
201 | {"D/K-SECAM-A2 MONO", 0x1478, 0x8009}, |
202 | {"L-SECAM-NICAM", 0x8E82, 0x0009}, | |
203 | {"L'-SECAM-NICAM", 0x8E82, 0x4009}, | |
204 | {"DTV6", 0x00C0, 0x8002}, | |
205 | {"DTV8", 0x00C0, 0x800B}, | |
206 | {"DTV7/8", 0x00C0, 0x801B}, | |
207 | {"DTV7", 0x00C0, 0x8007}, | |
208 | {"FM Radio-INPUT2", 0x9802, 0x9002}, | |
724dcbfa DB |
209 | {"FM Radio-INPUT1", 0x0208, 0x9002}, |
210 | {"FM Radio-INPUT1_MONO", 0x0278, 0x9002} | |
aacb9d31 ST |
211 | }; |
212 | ||
ddea427f MK |
213 | |
214 | struct xc5000_fw_cfg { | |
215 | char *name; | |
216 | u16 size; | |
de49bc6e | 217 | u16 pll_reg; |
22d5c6f5 DH |
218 | u8 init_status_supported; |
219 | u8 fw_checksum_supported; | |
ddea427f MK |
220 | }; |
221 | ||
3422f2a6 | 222 | #define XC5000A_FIRMWARE "dvb-fe-xc5000-1.6.114.fw" |
a3db60bc | 223 | static const struct xc5000_fw_cfg xc5000a_1_6_114 = { |
3422f2a6 | 224 | .name = XC5000A_FIRMWARE, |
76efb0ba | 225 | .size = 12401, |
de49bc6e | 226 | .pll_reg = 0x806c, |
76efb0ba MK |
227 | }; |
228 | ||
3de5bffd | 229 | #define XC5000C_FIRMWARE "dvb-fe-xc5000c-4.1.30.7.fw" |
7d3d0d8d | 230 | static const struct xc5000_fw_cfg xc5000c_41_024_5 = { |
3422f2a6 | 231 | .name = XC5000C_FIRMWARE, |
7d3d0d8d | 232 | .size = 16497, |
de49bc6e | 233 | .pll_reg = 0x13, |
22d5c6f5 DH |
234 | .init_status_supported = 1, |
235 | .fw_checksum_supported = 1, | |
d8398805 MK |
236 | }; |
237 | ||
a3db60bc | 238 | static inline const struct xc5000_fw_cfg *xc5000_assign_firmware(int chip_id) |
ddea427f | 239 | { |
6fab81df | 240 | switch (chip_id) { |
ddea427f | 241 | default: |
6fab81df | 242 | case XC5000A: |
ddea427f | 243 | return &xc5000a_1_6_114; |
6fab81df | 244 | case XC5000C: |
7d3d0d8d | 245 | return &xc5000c_41_024_5; |
ddea427f MK |
246 | } |
247 | } | |
248 | ||
de49bc6e | 249 | static int xc_load_fw_and_init_tuner(struct dvb_frontend *fe, int force); |
91bd625e | 250 | static int xc5000_is_firmware_loaded(struct dvb_frontend *fe); |
bdd33563 | 251 | static int xc5000_readreg(struct xc5000_priv *priv, u16 reg, u16 *val); |
303ddd92 | 252 | static int xc5000_tuner_reset(struct dvb_frontend *fe); |
aacb9d31 | 253 | |
e12671cf | 254 | static int xc_send_i2c_data(struct xc5000_priv *priv, u8 *buf, int len) |
aacb9d31 | 255 | { |
d7800d4e DH |
256 | struct i2c_msg msg = { .addr = priv->i2c_props.addr, |
257 | .flags = 0, .buf = buf, .len = len }; | |
258 | ||
259 | if (i2c_transfer(priv->i2c_props.adap, &msg, 1) != 1) { | |
260 | printk(KERN_ERR "xc5000: I2C write failed (len=%i)\n", len); | |
859ae7f0 | 261 | return -EREMOTEIO; |
d7800d4e | 262 | } |
859ae7f0 | 263 | return 0; |
aacb9d31 ST |
264 | } |
265 | ||
1cdffda7 | 266 | #if 0 |
bdd33563 DH |
267 | /* This routine is never used because the only time we read data from the |
268 | i2c bus is when we read registers, and we want that to be an atomic i2c | |
269 | transaction in case we are on a multi-master bus */ | |
e12671cf | 270 | static int xc_read_i2c_data(struct xc5000_priv *priv, u8 *buf, int len) |
aacb9d31 | 271 | { |
bdd33563 DH |
272 | struct i2c_msg msg = { .addr = priv->i2c_props.addr, |
273 | .flags = I2C_M_RD, .buf = buf, .len = len }; | |
274 | ||
275 | if (i2c_transfer(priv->i2c_props.adap, &msg, 1) != 1) { | |
276 | printk(KERN_ERR "xc5000 I2C read failed (len=%i)\n", len); | |
277 | return -EREMOTEIO; | |
278 | } | |
279 | return 0; | |
aacb9d31 | 280 | } |
1cdffda7 | 281 | #endif |
aacb9d31 | 282 | |
4743319f DB |
283 | static int xc5000_readreg(struct xc5000_priv *priv, u16 reg, u16 *val) |
284 | { | |
285 | u8 buf[2] = { reg >> 8, reg & 0xff }; | |
286 | u8 bval[2] = { 0, 0 }; | |
287 | struct i2c_msg msg[2] = { | |
288 | { .addr = priv->i2c_props.addr, | |
289 | .flags = 0, .buf = &buf[0], .len = 2 }, | |
290 | { .addr = priv->i2c_props.addr, | |
291 | .flags = I2C_M_RD, .buf = &bval[0], .len = 2 }, | |
292 | }; | |
293 | ||
294 | if (i2c_transfer(priv->i2c_props.adap, msg, 2) != 2) { | |
295 | printk(KERN_WARNING "xc5000: I2C read failed\n"); | |
296 | return -EREMOTEIO; | |
297 | } | |
298 | ||
299 | *val = (bval[0] << 8) | bval[1]; | |
859ae7f0 | 300 | return 0; |
4743319f DB |
301 | } |
302 | ||
303ddd92 | 303 | static int xc5000_tuner_reset(struct dvb_frontend *fe) |
aacb9d31 ST |
304 | { |
305 | struct xc5000_priv *priv = fe->tuner_priv; | |
306 | int ret; | |
307 | ||
271ddbf7 | 308 | dprintk(1, "%s()\n", __func__); |
aacb9d31 | 309 | |
d7cba043 MK |
310 | if (fe->callback) { |
311 | ret = fe->callback(((fe->dvb) && (fe->dvb->priv)) ? | |
30650961 MK |
312 | fe->dvb->priv : |
313 | priv->i2c_props.adap->algo_data, | |
d7cba043 | 314 | DVB_FRONTEND_COMPONENT_TUNER, |
30650961 | 315 | XC5000_TUNER_RESET, 0); |
91bd625e | 316 | if (ret) { |
aacb9d31 | 317 | printk(KERN_ERR "xc5000: reset failed\n"); |
859ae7f0 | 318 | return ret; |
91bd625e DH |
319 | } |
320 | } else { | |
27c685a4 | 321 | printk(KERN_ERR "xc5000: no tuner reset callback function, fatal\n"); |
859ae7f0 | 322 | return -EINVAL; |
91bd625e | 323 | } |
859ae7f0 | 324 | return 0; |
aacb9d31 ST |
325 | } |
326 | ||
303ddd92 | 327 | static int xc_write_reg(struct xc5000_priv *priv, u16 reg_addr, u16 i2c_data) |
aacb9d31 | 328 | { |
e12671cf | 329 | u8 buf[4]; |
303ddd92 | 330 | int watch_dog_timer = 100; |
aacb9d31 ST |
331 | int result; |
332 | ||
303ddd92 MCC |
333 | buf[0] = (reg_addr >> 8) & 0xFF; |
334 | buf[1] = reg_addr & 0xFF; | |
335 | buf[2] = (i2c_data >> 8) & 0xFF; | |
336 | buf[3] = i2c_data & 0xFF; | |
aacb9d31 | 337 | result = xc_send_i2c_data(priv, buf, 4); |
859ae7f0 | 338 | if (result == 0) { |
aacb9d31 | 339 | /* wait for busy flag to clear */ |
303ddd92 | 340 | while ((watch_dog_timer > 0) && (result == 0)) { |
1cdffda7 | 341 | result = xc5000_readreg(priv, XREG_BUSY, (u16 *)buf); |
859ae7f0 | 342 | if (result == 0) { |
4743319f DB |
343 | if ((buf[0] == 0) && (buf[1] == 0)) { |
344 | /* busy flag cleared */ | |
aacb9d31 | 345 | break; |
4743319f | 346 | } else { |
e5bf4a11 | 347 | msleep(5); /* wait 5 ms */ |
303ddd92 | 348 | watch_dog_timer--; |
aacb9d31 ST |
349 | } |
350 | } | |
351 | } | |
352 | } | |
303ddd92 | 353 | if (watch_dog_timer <= 0) |
859ae7f0 | 354 | result = -EREMOTEIO; |
aacb9d31 ST |
355 | |
356 | return result; | |
357 | } | |
358 | ||
c63e87e9 | 359 | static int xc_load_i2c_sequence(struct dvb_frontend *fe, const u8 *i2c_sequence) |
aacb9d31 ST |
360 | { |
361 | struct xc5000_priv *priv = fe->tuner_priv; | |
362 | ||
363 | int i, nbytes_to_send, result; | |
364 | unsigned int len, pos, index; | |
e12671cf | 365 | u8 buf[XC_MAX_I2C_WRITE_LENGTH]; |
aacb9d31 | 366 | |
8f3cd530 ST |
367 | index = 0; |
368 | while ((i2c_sequence[index] != 0xFF) || | |
369 | (i2c_sequence[index + 1] != 0xFF)) { | |
370 | len = i2c_sequence[index] * 256 + i2c_sequence[index+1]; | |
e12671cf | 371 | if (len == 0x0000) { |
aacb9d31 | 372 | /* RESET command */ |
303ddd92 | 373 | result = xc5000_tuner_reset(fe); |
aacb9d31 | 374 | index += 2; |
859ae7f0 | 375 | if (result != 0) |
aacb9d31 ST |
376 | return result; |
377 | } else if (len & 0x8000) { | |
378 | /* WAIT command */ | |
e5bf4a11 | 379 | msleep(len & 0x7FFF); |
aacb9d31 ST |
380 | index += 2; |
381 | } else { | |
382 | /* Send i2c data whilst ensuring individual transactions | |
383 | * do not exceed XC_MAX_I2C_WRITE_LENGTH bytes. | |
384 | */ | |
385 | index += 2; | |
386 | buf[0] = i2c_sequence[index]; | |
387 | buf[1] = i2c_sequence[index + 1]; | |
388 | pos = 2; | |
389 | while (pos < len) { | |
8f3cd530 ST |
390 | if ((len - pos) > XC_MAX_I2C_WRITE_LENGTH - 2) |
391 | nbytes_to_send = | |
392 | XC_MAX_I2C_WRITE_LENGTH; | |
393 | else | |
aacb9d31 | 394 | nbytes_to_send = (len - pos + 2); |
8f3cd530 ST |
395 | for (i = 2; i < nbytes_to_send; i++) { |
396 | buf[i] = i2c_sequence[index + pos + | |
397 | i - 2]; | |
aacb9d31 | 398 | } |
8f3cd530 ST |
399 | result = xc_send_i2c_data(priv, buf, |
400 | nbytes_to_send); | |
aacb9d31 | 401 | |
859ae7f0 | 402 | if (result != 0) |
aacb9d31 ST |
403 | return result; |
404 | ||
405 | pos += nbytes_to_send - 2; | |
406 | } | |
407 | index += len; | |
408 | } | |
409 | } | |
859ae7f0 | 410 | return 0; |
aacb9d31 ST |
411 | } |
412 | ||
e12671cf | 413 | static int xc_initialize(struct xc5000_priv *priv) |
aacb9d31 | 414 | { |
271ddbf7 | 415 | dprintk(1, "%s()\n", __func__); |
aacb9d31 ST |
416 | return xc_write_reg(priv, XREG_INIT, 0); |
417 | } | |
418 | ||
303ddd92 MCC |
419 | static int xc_set_tv_standard(struct xc5000_priv *priv, |
420 | u16 video_mode, u16 audio_mode, u8 radio_mode) | |
aacb9d31 ST |
421 | { |
422 | int ret; | |
303ddd92 MCC |
423 | dprintk(1, "%s(0x%04x,0x%04x)\n", __func__, video_mode, audio_mode); |
424 | if (radio_mode) { | |
01ae7286 DB |
425 | dprintk(1, "%s() Standard = %s\n", |
426 | __func__, | |
303ddd92 | 427 | xc5000_standard[radio_mode].name); |
01ae7286 DB |
428 | } else { |
429 | dprintk(1, "%s() Standard = %s\n", | |
430 | __func__, | |
303ddd92 | 431 | xc5000_standard[priv->video_standard].name); |
01ae7286 | 432 | } |
aacb9d31 | 433 | |
303ddd92 | 434 | ret = xc_write_reg(priv, XREG_VIDEO_MODE, video_mode); |
859ae7f0 | 435 | if (ret == 0) |
303ddd92 | 436 | ret = xc_write_reg(priv, XREG_AUDIO_MODE, audio_mode); |
aacb9d31 ST |
437 | |
438 | return ret; | |
439 | } | |
440 | ||
303ddd92 | 441 | static int xc_set_signal_source(struct xc5000_priv *priv, u16 rf_mode) |
aacb9d31 | 442 | { |
271ddbf7 | 443 | dprintk(1, "%s(%d) Source = %s\n", __func__, rf_mode, |
aacb9d31 ST |
444 | rf_mode == XC_RF_MODE_AIR ? "ANTENNA" : "CABLE"); |
445 | ||
8f3cd530 | 446 | if ((rf_mode != XC_RF_MODE_AIR) && (rf_mode != XC_RF_MODE_CABLE)) { |
aacb9d31 ST |
447 | rf_mode = XC_RF_MODE_CABLE; |
448 | printk(KERN_ERR | |
449 | "%s(), Invalid mode, defaulting to CABLE", | |
271ddbf7 | 450 | __func__); |
aacb9d31 ST |
451 | } |
452 | return xc_write_reg(priv, XREG_SIGNALSOURCE, rf_mode); | |
453 | } | |
454 | ||
e12671cf | 455 | static const struct dvb_tuner_ops xc5000_tuner_ops; |
aacb9d31 | 456 | |
303ddd92 | 457 | static int xc_set_rf_frequency(struct xc5000_priv *priv, u32 freq_hz) |
e12671cf ST |
458 | { |
459 | u16 freq_code; | |
aacb9d31 | 460 | |
271ddbf7 | 461 | dprintk(1, "%s(%u)\n", __func__, freq_hz); |
aacb9d31 | 462 | |
e12671cf ST |
463 | if ((freq_hz > xc5000_tuner_ops.info.frequency_max) || |
464 | (freq_hz < xc5000_tuner_ops.info.frequency_min)) | |
859ae7f0 | 465 | return -EINVAL; |
aacb9d31 | 466 | |
e12671cf ST |
467 | freq_code = (u16)(freq_hz / 15625); |
468 | ||
81c4dfe7 DH |
469 | /* Starting in firmware version 1.1.44, Xceive recommends using the |
470 | FINERFREQ for all normal tuning (the doc indicates reg 0x03 should | |
471 | only be used for fast scanning for channel lock) */ | |
472 | return xc_write_reg(priv, XREG_FINERFREQ, freq_code); | |
aacb9d31 ST |
473 | } |
474 | ||
aacb9d31 | 475 | |
e12671cf ST |
476 | static int xc_set_IF_frequency(struct xc5000_priv *priv, u32 freq_khz) |
477 | { | |
478 | u32 freq_code = (freq_khz * 1024)/1000; | |
479 | dprintk(1, "%s(freq_khz = %d) freq_code = 0x%x\n", | |
271ddbf7 | 480 | __func__, freq_khz, freq_code); |
aacb9d31 | 481 | |
e12671cf | 482 | return xc_write_reg(priv, XREG_IF_OUT, freq_code); |
aacb9d31 ST |
483 | } |
484 | ||
aacb9d31 | 485 | |
303ddd92 | 486 | static int xc_get_adc_envelope(struct xc5000_priv *priv, u16 *adc_envelope) |
aacb9d31 | 487 | { |
bdd33563 | 488 | return xc5000_readreg(priv, XREG_ADC_ENV, adc_envelope); |
aacb9d31 ST |
489 | } |
490 | ||
e12671cf | 491 | static int xc_get_frequency_error(struct xc5000_priv *priv, u32 *freq_error_hz) |
aacb9d31 ST |
492 | { |
493 | int result; | |
303ddd92 | 494 | u16 reg_data; |
aacb9d31 ST |
495 | u32 tmp; |
496 | ||
303ddd92 | 497 | result = xc5000_readreg(priv, XREG_FREQ_ERROR, ®_data); |
859ae7f0 | 498 | if (result != 0) |
aacb9d31 ST |
499 | return result; |
500 | ||
303ddd92 | 501 | tmp = (u32)reg_data; |
e12671cf | 502 | (*freq_error_hz) = (tmp * 15625) / 1000; |
aacb9d31 ST |
503 | return result; |
504 | } | |
505 | ||
e12671cf | 506 | static int xc_get_lock_status(struct xc5000_priv *priv, u16 *lock_status) |
aacb9d31 | 507 | { |
bdd33563 | 508 | return xc5000_readreg(priv, XREG_LOCK, lock_status); |
aacb9d31 ST |
509 | } |
510 | ||
e12671cf ST |
511 | static int xc_get_version(struct xc5000_priv *priv, |
512 | u8 *hw_majorversion, u8 *hw_minorversion, | |
513 | u8 *fw_majorversion, u8 *fw_minorversion) | |
aacb9d31 | 514 | { |
e12671cf | 515 | u16 data; |
aacb9d31 ST |
516 | int result; |
517 | ||
bdd33563 | 518 | result = xc5000_readreg(priv, XREG_VERSION, &data); |
859ae7f0 | 519 | if (result != 0) |
aacb9d31 ST |
520 | return result; |
521 | ||
e12671cf ST |
522 | (*hw_majorversion) = (data >> 12) & 0x0F; |
523 | (*hw_minorversion) = (data >> 8) & 0x0F; | |
524 | (*fw_majorversion) = (data >> 4) & 0x0F; | |
525 | (*fw_minorversion) = data & 0x0F; | |
aacb9d31 ST |
526 | |
527 | return 0; | |
528 | } | |
529 | ||
bae7b7d7 DH |
530 | static int xc_get_buildversion(struct xc5000_priv *priv, u16 *buildrev) |
531 | { | |
532 | return xc5000_readreg(priv, XREG_BUILD, buildrev); | |
533 | } | |
534 | ||
e12671cf | 535 | static int xc_get_hsync_freq(struct xc5000_priv *priv, u32 *hsync_freq_hz) |
aacb9d31 | 536 | { |
303ddd92 | 537 | u16 reg_data; |
aacb9d31 ST |
538 | int result; |
539 | ||
303ddd92 | 540 | result = xc5000_readreg(priv, XREG_HSYNC_FREQ, ®_data); |
859ae7f0 | 541 | if (result != 0) |
aacb9d31 ST |
542 | return result; |
543 | ||
303ddd92 | 544 | (*hsync_freq_hz) = ((reg_data & 0x0fff) * 763)/100; |
aacb9d31 ST |
545 | return result; |
546 | } | |
547 | ||
e12671cf | 548 | static int xc_get_frame_lines(struct xc5000_priv *priv, u16 *frame_lines) |
aacb9d31 | 549 | { |
bdd33563 | 550 | return xc5000_readreg(priv, XREG_FRAME_LINES, frame_lines); |
aacb9d31 ST |
551 | } |
552 | ||
e12671cf | 553 | static int xc_get_quality(struct xc5000_priv *priv, u16 *quality) |
aacb9d31 | 554 | { |
bdd33563 | 555 | return xc5000_readreg(priv, XREG_QUALITY, quality); |
aacb9d31 ST |
556 | } |
557 | ||
7c287f18 DH |
558 | static int xc_get_analogsnr(struct xc5000_priv *priv, u16 *snr) |
559 | { | |
560 | return xc5000_readreg(priv, XREG_SNR, snr); | |
561 | } | |
562 | ||
563 | static int xc_get_totalgain(struct xc5000_priv *priv, u16 *totalgain) | |
564 | { | |
565 | return xc5000_readreg(priv, XREG_TOTALGAIN, totalgain); | |
566 | } | |
567 | ||
a78baacf DH |
568 | #define XC_TUNE_ANALOG 0 |
569 | #define XC_TUNE_DIGITAL 1 | |
570 | static int xc_tune_channel(struct xc5000_priv *priv, u32 freq_hz, int mode) | |
aacb9d31 | 571 | { |
271ddbf7 | 572 | dprintk(1, "%s(%u)\n", __func__, freq_hz); |
aacb9d31 | 573 | |
303ddd92 | 574 | if (xc_set_rf_frequency(priv, freq_hz) != 0) |
d9928a11 | 575 | return -EREMOTEIO; |
aacb9d31 | 576 | |
d9928a11 | 577 | return 0; |
aacb9d31 ST |
578 | } |
579 | ||
7d3d0d8d MK |
580 | static int xc_set_xtal(struct dvb_frontend *fe) |
581 | { | |
582 | struct xc5000_priv *priv = fe->tuner_priv; | |
859ae7f0 | 583 | int ret = 0; |
7d3d0d8d MK |
584 | |
585 | switch (priv->chip_id) { | |
586 | default: | |
587 | case XC5000A: | |
588 | /* 32.000 MHz xtal is default */ | |
589 | break; | |
590 | case XC5000C: | |
591 | switch (priv->xtal_khz) { | |
592 | default: | |
593 | case 32000: | |
594 | /* 32.000 MHz xtal is default */ | |
595 | break; | |
596 | case 31875: | |
597 | /* 31.875 MHz xtal configuration */ | |
598 | ret = xc_write_reg(priv, 0x000f, 0x8081); | |
599 | break; | |
600 | } | |
601 | break; | |
602 | } | |
603 | return ret; | |
604 | } | |
aacb9d31 | 605 | |
8604f355 MCC |
606 | static int xc5000_fwupload(struct dvb_frontend *fe, |
607 | const struct xc5000_fw_cfg *desired_fw, | |
608 | const struct firmware *fw) | |
aacb9d31 ST |
609 | { |
610 | struct xc5000_priv *priv = fe->tuner_priv; | |
aacb9d31 ST |
611 | int ret; |
612 | ||
e12671cf | 613 | /* request the firmware, this will block and timeout */ |
8604f355 | 614 | dprintk(1, "waiting for firmware upload (%s)...\n", |
6fab81df | 615 | desired_fw->name); |
e12671cf | 616 | |
8604f355 MCC |
617 | priv->pll_register_no = desired_fw->pll_reg; |
618 | priv->init_status_supported = desired_fw->init_status_supported; | |
619 | priv->fw_checksum_supported = desired_fw->fw_checksum_supported; | |
aacb9d31 | 620 | |
aacb9d31 | 621 | |
8604f355 MCC |
622 | dprintk(1, "firmware uploading...\n"); |
623 | ret = xc_load_i2c_sequence(fe, fw->data); | |
624 | if (!ret) { | |
625 | ret = xc_set_xtal(fe); | |
626 | dprintk(1, "Firmware upload complete...\n"); | |
627 | } else | |
628 | printk(KERN_ERR "xc5000: firmware upload failed...\n"); | |
629 | ||
aacb9d31 ST |
630 | return ret; |
631 | } | |
632 | ||
e12671cf | 633 | static void xc_debug_dump(struct xc5000_priv *priv) |
aacb9d31 | 634 | { |
e12671cf ST |
635 | u16 adc_envelope; |
636 | u32 freq_error_hz = 0; | |
637 | u16 lock_status; | |
638 | u32 hsync_freq_hz = 0; | |
639 | u16 frame_lines; | |
640 | u16 quality; | |
7c287f18 DH |
641 | u16 snr; |
642 | u16 totalgain; | |
e12671cf ST |
643 | u8 hw_majorversion = 0, hw_minorversion = 0; |
644 | u8 fw_majorversion = 0, fw_minorversion = 0; | |
bae7b7d7 | 645 | u16 fw_buildversion = 0; |
de49bc6e | 646 | u16 regval; |
aacb9d31 ST |
647 | |
648 | /* Wait for stats to stabilize. | |
649 | * Frame Lines needs two frame times after initial lock | |
650 | * before it is valid. | |
651 | */ | |
e5bf4a11 | 652 | msleep(100); |
aacb9d31 | 653 | |
303ddd92 | 654 | xc_get_adc_envelope(priv, &adc_envelope); |
e12671cf | 655 | dprintk(1, "*** ADC envelope (0-1023) = %d\n", adc_envelope); |
aacb9d31 | 656 | |
e12671cf ST |
657 | xc_get_frequency_error(priv, &freq_error_hz); |
658 | dprintk(1, "*** Frequency error = %d Hz\n", freq_error_hz); | |
aacb9d31 | 659 | |
e12671cf ST |
660 | xc_get_lock_status(priv, &lock_status); |
661 | dprintk(1, "*** Lock status (0-Wait, 1-Locked, 2-No-signal) = %d\n", | |
aacb9d31 ST |
662 | lock_status); |
663 | ||
664 | xc_get_version(priv, &hw_majorversion, &hw_minorversion, | |
e12671cf | 665 | &fw_majorversion, &fw_minorversion); |
bae7b7d7 | 666 | xc_get_buildversion(priv, &fw_buildversion); |
ca60a45d | 667 | dprintk(1, "*** HW: V%d.%d, FW: V %d.%d.%d\n", |
aacb9d31 | 668 | hw_majorversion, hw_minorversion, |
bae7b7d7 | 669 | fw_majorversion, fw_minorversion, fw_buildversion); |
aacb9d31 | 670 | |
e12671cf ST |
671 | xc_get_hsync_freq(priv, &hsync_freq_hz); |
672 | dprintk(1, "*** Horizontal sync frequency = %d Hz\n", hsync_freq_hz); | |
aacb9d31 | 673 | |
e12671cf ST |
674 | xc_get_frame_lines(priv, &frame_lines); |
675 | dprintk(1, "*** Frame lines = %d\n", frame_lines); | |
aacb9d31 | 676 | |
e12671cf | 677 | xc_get_quality(priv, &quality); |
1aa9c487 | 678 | dprintk(1, "*** Quality (0:<8dB, 7:>56dB) = %d\n", quality & 0x07); |
7c287f18 DH |
679 | |
680 | xc_get_analogsnr(priv, &snr); | |
681 | dprintk(1, "*** Unweighted analog SNR = %d dB\n", snr & 0x3f); | |
682 | ||
683 | xc_get_totalgain(priv, &totalgain); | |
684 | dprintk(1, "*** Total gain = %d.%d dB\n", totalgain / 256, | |
685 | (totalgain % 256) * 100 / 256); | |
de49bc6e DH |
686 | |
687 | if (priv->pll_register_no) { | |
688 | xc5000_readreg(priv, priv->pll_register_no, ®val); | |
689 | dprintk(1, "*** PLL lock status = 0x%04x\n", regval); | |
690 | } | |
aacb9d31 ST |
691 | } |
692 | ||
16435202 MCC |
693 | static int xc5000_tune_digital(struct dvb_frontend *fe) |
694 | { | |
695 | struct xc5000_priv *priv = fe->tuner_priv; | |
696 | int ret; | |
697 | u32 bw = fe->dtv_property_cache.bandwidth_hz; | |
698 | ||
699 | ret = xc_set_signal_source(priv, priv->rf_mode); | |
700 | if (ret != 0) { | |
701 | printk(KERN_ERR | |
702 | "xc5000: xc_set_signal_source(%d) failed\n", | |
703 | priv->rf_mode); | |
704 | return -EREMOTEIO; | |
705 | } | |
706 | ||
707 | ret = xc_set_tv_standard(priv, | |
708 | xc5000_standard[priv->video_standard].video_mode, | |
709 | xc5000_standard[priv->video_standard].audio_mode, 0); | |
710 | if (ret != 0) { | |
711 | printk(KERN_ERR "xc5000: xc_set_tv_standard failed\n"); | |
712 | return -EREMOTEIO; | |
713 | } | |
714 | ||
715 | ret = xc_set_IF_frequency(priv, priv->if_khz); | |
716 | if (ret != 0) { | |
717 | printk(KERN_ERR "xc5000: xc_Set_IF_frequency(%d) failed\n", | |
718 | priv->if_khz); | |
719 | return -EIO; | |
720 | } | |
721 | ||
52e269b1 RV |
722 | dprintk(1, "%s() setting OUTPUT_AMP to 0x%x\n", |
723 | __func__, priv->output_amp); | |
724 | xc_write_reg(priv, XREG_OUTPUT_AMP, priv->output_amp); | |
16435202 MCC |
725 | |
726 | xc_tune_channel(priv, priv->freq_hz, XC_TUNE_DIGITAL); | |
727 | ||
728 | if (debug) | |
729 | xc_debug_dump(priv); | |
730 | ||
731 | priv->bandwidth = bw; | |
732 | ||
733 | return 0; | |
734 | } | |
735 | ||
59b94f3e | 736 | static int xc5000_set_digital_params(struct dvb_frontend *fe) |
aacb9d31 | 737 | { |
16435202 | 738 | int b; |
aacb9d31 | 739 | struct xc5000_priv *priv = fe->tuner_priv; |
fd66c45d MCC |
740 | u32 bw = fe->dtv_property_cache.bandwidth_hz; |
741 | u32 freq = fe->dtv_property_cache.frequency; | |
742 | u32 delsys = fe->dtv_property_cache.delivery_system; | |
aacb9d31 | 743 | |
859ae7f0 | 744 | if (xc_load_fw_and_init_tuner(fe, 0) != 0) { |
fc7a74ba DH |
745 | dprintk(1, "Unable to load firmware and init tuner\n"); |
746 | return -EINVAL; | |
760c466c | 747 | } |
8e4c6797 | 748 | |
fd66c45d | 749 | dprintk(1, "%s() frequency=%d (Hz)\n", __func__, freq); |
aacb9d31 | 750 | |
fd66c45d MCC |
751 | switch (delsys) { |
752 | case SYS_ATSC: | |
753 | dprintk(1, "%s() VSB modulation\n", __func__); | |
754 | priv->rf_mode = XC_RF_MODE_AIR; | |
a3eec916 | 755 | priv->freq_offset = 1750000; |
fd66c45d MCC |
756 | priv->video_standard = DTV6; |
757 | break; | |
758 | case SYS_DVBC_ANNEX_B: | |
759 | dprintk(1, "%s() QAM modulation\n", __func__); | |
760 | priv->rf_mode = XC_RF_MODE_CABLE; | |
a3eec916 | 761 | priv->freq_offset = 1750000; |
fd66c45d MCC |
762 | priv->video_standard = DTV6; |
763 | break; | |
5cf73ce1 MCC |
764 | case SYS_ISDBT: |
765 | /* All ISDB-T are currently for 6 MHz bw */ | |
766 | if (!bw) | |
767 | bw = 6000000; | |
768 | /* fall to OFDM handling */ | |
06eeefe8 | 769 | /* fall through */ |
5cf73ce1 | 770 | case SYS_DMBTH: |
fd66c45d MCC |
771 | case SYS_DVBT: |
772 | case SYS_DVBT2: | |
6c99080d | 773 | dprintk(1, "%s() OFDM\n", __func__); |
fd66c45d MCC |
774 | switch (bw) { |
775 | case 6000000: | |
6c99080d | 776 | priv->video_standard = DTV6; |
a3eec916 | 777 | priv->freq_offset = 1750000; |
6c99080d | 778 | break; |
fd66c45d | 779 | case 7000000: |
0433cd28 | 780 | priv->video_standard = DTV7; |
a3eec916 | 781 | priv->freq_offset = 2250000; |
0433cd28 | 782 | break; |
fd66c45d | 783 | case 8000000: |
6c99080d | 784 | priv->video_standard = DTV8; |
a3eec916 | 785 | priv->freq_offset = 2750000; |
6c99080d DW |
786 | break; |
787 | default: | |
788 | printk(KERN_ERR "xc5000 bandwidth not set!\n"); | |
789 | return -EINVAL; | |
790 | } | |
aacb9d31 | 791 | priv->rf_mode = XC_RF_MODE_AIR; |
cf1364b1 | 792 | break; |
fd66c45d MCC |
793 | case SYS_DVBC_ANNEX_A: |
794 | case SYS_DVBC_ANNEX_C: | |
795 | dprintk(1, "%s() QAM modulation\n", __func__); | |
796 | priv->rf_mode = XC_RF_MODE_CABLE; | |
797 | if (bw <= 6000000) { | |
fd66c45d | 798 | priv->video_standard = DTV6; |
a3eec916 | 799 | priv->freq_offset = 1750000; |
fd66c45d MCC |
800 | b = 6; |
801 | } else if (bw <= 7000000) { | |
fd66c45d | 802 | priv->video_standard = DTV7; |
a3eec916 | 803 | priv->freq_offset = 2250000; |
fd66c45d MCC |
804 | b = 7; |
805 | } else { | |
fd66c45d | 806 | priv->video_standard = DTV7_8; |
a3eec916 | 807 | priv->freq_offset = 2750000; |
fd66c45d | 808 | b = 8; |
e80edce1 | 809 | } |
fd66c45d MCC |
810 | dprintk(1, "%s() Bandwidth %dMHz (%d)\n", __func__, |
811 | b, bw); | |
812 | break; | |
813 | default: | |
814 | printk(KERN_ERR "xc5000: delivery system is not supported!\n"); | |
aacb9d31 ST |
815 | return -EINVAL; |
816 | } | |
817 | ||
a3eec916 | 818 | priv->freq_hz = freq - priv->freq_offset; |
16435202 | 819 | priv->mode = V4L2_TUNER_DIGITAL_TV; |
a3eec916 | 820 | |
fd66c45d MCC |
821 | dprintk(1, "%s() frequency=%d (compensated to %d)\n", |
822 | __func__, freq, priv->freq_hz); | |
aacb9d31 | 823 | |
16435202 | 824 | return xc5000_tune_digital(fe); |
aacb9d31 ST |
825 | } |
826 | ||
e470d817 ST |
827 | static int xc5000_is_firmware_loaded(struct dvb_frontend *fe) |
828 | { | |
829 | struct xc5000_priv *priv = fe->tuner_priv; | |
830 | int ret; | |
831 | u16 id; | |
832 | ||
833 | ret = xc5000_readreg(priv, XREG_PRODUCT_ID, &id); | |
859ae7f0 | 834 | if (ret == 0) { |
e470d817 | 835 | if (id == XC_PRODUCT_ID_FW_NOT_LOADED) |
859ae7f0 | 836 | ret = -ENOENT; |
e470d817 | 837 | else |
859ae7f0 | 838 | ret = 0; |
e470d817 ST |
839 | } |
840 | ||
841 | dprintk(1, "%s() returns %s id = 0x%x\n", __func__, | |
859ae7f0 | 842 | ret == 0 ? "True" : "False", id); |
e470d817 ST |
843 | return ret; |
844 | } | |
845 | ||
c3d6676b MCC |
846 | static void xc5000_config_tv(struct dvb_frontend *fe, |
847 | struct analog_parameters *params) | |
27c685a4 ST |
848 | { |
849 | struct xc5000_priv *priv = fe->tuner_priv; | |
27c685a4 | 850 | |
27c685a4 | 851 | dprintk(1, "%s() frequency=%d (in units of 62.5khz)\n", |
271ddbf7 | 852 | __func__, params->frequency); |
27c685a4 | 853 | |
1fab14ed MCC |
854 | /* Fix me: it could be air. */ |
855 | priv->rf_mode = params->mode; | |
856 | if (params->mode > XC_RF_MODE_CABLE) | |
857 | priv->rf_mode = XC_RF_MODE_CABLE; | |
27c685a4 ST |
858 | |
859 | /* params->frequency is in units of 62.5khz */ | |
860 | priv->freq_hz = params->frequency * 62500; | |
861 | ||
862 | /* FIX ME: Some video standards may have several possible audio | |
863 | standards. We simply default to one of them here. | |
864 | */ | |
8f3cd530 | 865 | if (params->std & V4L2_STD_MN) { |
27c685a4 ST |
866 | /* default to BTSC audio standard */ |
867 | priv->video_standard = MN_NTSC_PAL_BTSC; | |
c3d6676b | 868 | return; |
27c685a4 ST |
869 | } |
870 | ||
8f3cd530 | 871 | if (params->std & V4L2_STD_PAL_BG) { |
27c685a4 ST |
872 | /* default to NICAM audio standard */ |
873 | priv->video_standard = BG_PAL_NICAM; | |
c3d6676b | 874 | return; |
27c685a4 ST |
875 | } |
876 | ||
8f3cd530 | 877 | if (params->std & V4L2_STD_PAL_I) { |
27c685a4 ST |
878 | /* default to NICAM audio standard */ |
879 | priv->video_standard = I_PAL_NICAM; | |
c3d6676b | 880 | return; |
27c685a4 ST |
881 | } |
882 | ||
8f3cd530 | 883 | if (params->std & V4L2_STD_PAL_DK) { |
27c685a4 ST |
884 | /* default to NICAM audio standard */ |
885 | priv->video_standard = DK_PAL_NICAM; | |
c3d6676b | 886 | return; |
27c685a4 ST |
887 | } |
888 | ||
8f3cd530 | 889 | if (params->std & V4L2_STD_SECAM_DK) { |
27c685a4 ST |
890 | /* default to A2 DK1 audio standard */ |
891 | priv->video_standard = DK_SECAM_A2DK1; | |
c3d6676b | 892 | return; |
27c685a4 ST |
893 | } |
894 | ||
8f3cd530 | 895 | if (params->std & V4L2_STD_SECAM_L) { |
27c685a4 | 896 | priv->video_standard = L_SECAM_NICAM; |
c3d6676b | 897 | return; |
27c685a4 ST |
898 | } |
899 | ||
8f3cd530 | 900 | if (params->std & V4L2_STD_SECAM_LC) { |
27c685a4 | 901 | priv->video_standard = LC_SECAM_NICAM; |
c3d6676b | 902 | return; |
27c685a4 | 903 | } |
c3d6676b MCC |
904 | } |
905 | ||
906 | static int xc5000_set_tv_freq(struct dvb_frontend *fe) | |
907 | { | |
908 | struct xc5000_priv *priv = fe->tuner_priv; | |
909 | u16 pll_lock_status; | |
910 | int ret; | |
27c685a4 ST |
911 | |
912 | tune_channel: | |
303ddd92 | 913 | ret = xc_set_signal_source(priv, priv->rf_mode); |
859ae7f0 | 914 | if (ret != 0) { |
8f3cd530 | 915 | printk(KERN_ERR |
303ddd92 | 916 | "xc5000: xc_set_signal_source(%d) failed\n", |
27c685a4 ST |
917 | priv->rf_mode); |
918 | return -EREMOTEIO; | |
919 | } | |
920 | ||
303ddd92 MCC |
921 | ret = xc_set_tv_standard(priv, |
922 | xc5000_standard[priv->video_standard].video_mode, | |
923 | xc5000_standard[priv->video_standard].audio_mode, 0); | |
859ae7f0 | 924 | if (ret != 0) { |
303ddd92 | 925 | printk(KERN_ERR "xc5000: xc_set_tv_standard failed\n"); |
27c685a4 ST |
926 | return -EREMOTEIO; |
927 | } | |
928 | ||
724dcbfa DB |
929 | xc_write_reg(priv, XREG_OUTPUT_AMP, 0x09); |
930 | ||
a78baacf | 931 | xc_tune_channel(priv, priv->freq_hz, XC_TUNE_ANALOG); |
27c685a4 ST |
932 | |
933 | if (debug) | |
934 | xc_debug_dump(priv); | |
935 | ||
de49bc6e DH |
936 | if (priv->pll_register_no != 0) { |
937 | msleep(20); | |
938 | xc5000_readreg(priv, priv->pll_register_no, &pll_lock_status); | |
939 | if (pll_lock_status > 63) { | |
940 | /* PLL is unlocked, force reload of the firmware */ | |
941 | dprintk(1, "xc5000: PLL not locked (0x%x). Reloading...\n", | |
942 | pll_lock_status); | |
859ae7f0 | 943 | if (xc_load_fw_and_init_tuner(fe, 1) != 0) { |
de49bc6e DH |
944 | printk(KERN_ERR "xc5000: Unable to reload fw\n"); |
945 | return -EREMOTEIO; | |
946 | } | |
947 | goto tune_channel; | |
948 | } | |
949 | } | |
950 | ||
27c685a4 ST |
951 | return 0; |
952 | } | |
953 | ||
c3d6676b MCC |
954 | static int xc5000_config_radio(struct dvb_frontend *fe, |
955 | struct analog_parameters *params) | |
956 | ||
d7009cdc BILDB |
957 | { |
958 | struct xc5000_priv *priv = fe->tuner_priv; | |
d7009cdc BILDB |
959 | |
960 | dprintk(1, "%s() frequency=%d (in units of khz)\n", | |
961 | __func__, params->frequency); | |
962 | ||
496e9057 DH |
963 | if (priv->radio_input == XC5000_RADIO_NOT_CONFIGURED) { |
964 | dprintk(1, "%s() radio input not configured\n", __func__); | |
965 | return -EINVAL; | |
966 | } | |
967 | ||
c3d6676b MCC |
968 | priv->freq_hz = params->frequency * 125 / 2; |
969 | priv->rf_mode = XC_RF_MODE_AIR; | |
970 | ||
971 | return 0; | |
972 | } | |
973 | ||
974 | static int xc5000_set_radio_freq(struct dvb_frontend *fe) | |
975 | { | |
976 | struct xc5000_priv *priv = fe->tuner_priv; | |
977 | int ret; | |
978 | u8 radio_input; | |
979 | ||
496e9057 | 980 | if (priv->radio_input == XC5000_RADIO_FM1) |
303ddd92 | 981 | radio_input = FM_RADIO_INPUT1; |
496e9057 | 982 | else if (priv->radio_input == XC5000_RADIO_FM2) |
303ddd92 | 983 | radio_input = FM_RADIO_INPUT2; |
724dcbfa | 984 | else if (priv->radio_input == XC5000_RADIO_FM1_MONO) |
303ddd92 | 985 | radio_input = FM_RADIO_INPUT1_MONO; |
496e9057 DH |
986 | else { |
987 | dprintk(1, "%s() unknown radio input %d\n", __func__, | |
988 | priv->radio_input); | |
989 | return -EINVAL; | |
990 | } | |
991 | ||
303ddd92 MCC |
992 | ret = xc_set_tv_standard(priv, xc5000_standard[radio_input].video_mode, |
993 | xc5000_standard[radio_input].audio_mode, radio_input); | |
d7009cdc | 994 | |
859ae7f0 | 995 | if (ret != 0) { |
303ddd92 | 996 | printk(KERN_ERR "xc5000: xc_set_tv_standard failed\n"); |
d7009cdc BILDB |
997 | return -EREMOTEIO; |
998 | } | |
999 | ||
303ddd92 | 1000 | ret = xc_set_signal_source(priv, priv->rf_mode); |
859ae7f0 | 1001 | if (ret != 0) { |
d7009cdc | 1002 | printk(KERN_ERR |
303ddd92 | 1003 | "xc5000: xc_set_signal_source(%d) failed\n", |
d7009cdc BILDB |
1004 | priv->rf_mode); |
1005 | return -EREMOTEIO; | |
1006 | } | |
1007 | ||
724dcbfa DB |
1008 | if ((priv->radio_input == XC5000_RADIO_FM1) || |
1009 | (priv->radio_input == XC5000_RADIO_FM2)) | |
1010 | xc_write_reg(priv, XREG_OUTPUT_AMP, 0x09); | |
1011 | else if (priv->radio_input == XC5000_RADIO_FM1_MONO) | |
1012 | xc_write_reg(priv, XREG_OUTPUT_AMP, 0x06); | |
1013 | ||
d7009cdc BILDB |
1014 | xc_tune_channel(priv, priv->freq_hz, XC_TUNE_ANALOG); |
1015 | ||
1016 | return 0; | |
1017 | } | |
1018 | ||
59b94f3e | 1019 | static int xc5000_set_params(struct dvb_frontend *fe) |
c3d6676b MCC |
1020 | { |
1021 | struct xc5000_priv *priv = fe->tuner_priv; | |
1022 | ||
5275a3b6 MCC |
1023 | if (xc_load_fw_and_init_tuner(fe, 0) != 0) { |
1024 | dprintk(1, "Unable to load firmware and init tuner\n"); | |
1025 | return -EINVAL; | |
1026 | } | |
1027 | ||
c3d6676b MCC |
1028 | switch (priv->mode) { |
1029 | case V4L2_TUNER_RADIO: | |
1030 | return xc5000_set_radio_freq(fe); | |
1031 | case V4L2_TUNER_ANALOG_TV: | |
1032 | return xc5000_set_tv_freq(fe); | |
1033 | case V4L2_TUNER_DIGITAL_TV: | |
1034 | return xc5000_tune_digital(fe); | |
1035 | } | |
1036 | ||
1037 | return 0; | |
1038 | } | |
1039 | ||
d7009cdc BILDB |
1040 | static int xc5000_set_analog_params(struct dvb_frontend *fe, |
1041 | struct analog_parameters *params) | |
1042 | { | |
1043 | struct xc5000_priv *priv = fe->tuner_priv; | |
c3d6676b | 1044 | int ret; |
d7009cdc BILDB |
1045 | |
1046 | if (priv->i2c_props.adap == NULL) | |
1047 | return -EINVAL; | |
1048 | ||
d7009cdc BILDB |
1049 | switch (params->mode) { |
1050 | case V4L2_TUNER_RADIO: | |
c3d6676b MCC |
1051 | ret = xc5000_config_radio(fe, params); |
1052 | if (ret) | |
1053 | return ret; | |
d7009cdc BILDB |
1054 | break; |
1055 | case V4L2_TUNER_ANALOG_TV: | |
c3d6676b MCC |
1056 | xc5000_config_tv(fe, params); |
1057 | break; | |
1058 | default: | |
d7009cdc BILDB |
1059 | break; |
1060 | } | |
c3d6676b | 1061 | priv->mode = params->mode; |
d7009cdc | 1062 | |
59b94f3e | 1063 | return xc5000_set_params(fe); |
d7009cdc BILDB |
1064 | } |
1065 | ||
aacb9d31 ST |
1066 | static int xc5000_get_frequency(struct dvb_frontend *fe, u32 *freq) |
1067 | { | |
1068 | struct xc5000_priv *priv = fe->tuner_priv; | |
271ddbf7 | 1069 | dprintk(1, "%s()\n", __func__); |
a3eec916 | 1070 | *freq = priv->freq_hz + priv->freq_offset; |
aacb9d31 ST |
1071 | return 0; |
1072 | } | |
1073 | ||
35621030 MCC |
1074 | static int xc5000_get_if_frequency(struct dvb_frontend *fe, u32 *freq) |
1075 | { | |
1076 | struct xc5000_priv *priv = fe->tuner_priv; | |
1077 | dprintk(1, "%s()\n", __func__); | |
1078 | *freq = priv->if_khz * 1000; | |
1079 | return 0; | |
1080 | } | |
1081 | ||
aacb9d31 ST |
1082 | static int xc5000_get_bandwidth(struct dvb_frontend *fe, u32 *bw) |
1083 | { | |
1084 | struct xc5000_priv *priv = fe->tuner_priv; | |
271ddbf7 | 1085 | dprintk(1, "%s()\n", __func__); |
27c685a4 | 1086 | |
aacb9d31 ST |
1087 | *bw = priv->bandwidth; |
1088 | return 0; | |
1089 | } | |
1090 | ||
1091 | static int xc5000_get_status(struct dvb_frontend *fe, u32 *status) | |
1092 | { | |
1093 | struct xc5000_priv *priv = fe->tuner_priv; | |
e12671cf | 1094 | u16 lock_status = 0; |
aacb9d31 ST |
1095 | |
1096 | xc_get_lock_status(priv, &lock_status); | |
1097 | ||
271ddbf7 | 1098 | dprintk(1, "%s() lock_status = 0x%08x\n", __func__, lock_status); |
aacb9d31 ST |
1099 | |
1100 | *status = lock_status; | |
1101 | ||
1102 | return 0; | |
1103 | } | |
1104 | ||
de49bc6e | 1105 | static int xc_load_fw_and_init_tuner(struct dvb_frontend *fe, int force) |
aacb9d31 ST |
1106 | { |
1107 | struct xc5000_priv *priv = fe->tuner_priv; | |
8604f355 MCC |
1108 | const struct xc5000_fw_cfg *desired_fw = xc5000_assign_firmware(priv->chip_id); |
1109 | const struct firmware *fw; | |
2621c0b3 | 1110 | int ret, i; |
de49bc6e | 1111 | u16 pll_lock_status; |
22d5c6f5 | 1112 | u16 fw_ck; |
de49bc6e | 1113 | |
f7a27ff1 MCC |
1114 | cancel_delayed_work(&priv->timer_sleep); |
1115 | ||
2621c0b3 MCC |
1116 | if (!force && xc5000_is_firmware_loaded(fe) == 0) |
1117 | return 0; | |
aacb9d31 | 1118 | |
5264a522 SK |
1119 | if (!priv->firmware) { |
1120 | ret = request_firmware(&fw, desired_fw->name, | |
1121 | priv->i2c_props.adap->dev.parent); | |
1122 | if (ret) { | |
1123 | pr_err("xc5000: Upload failed. rc %d\n", ret); | |
1124 | return ret; | |
1125 | } | |
5b5e0928 | 1126 | dprintk(1, "firmware read %zu bytes.\n", fw->size); |
8604f355 | 1127 | |
5264a522 SK |
1128 | if (fw->size != desired_fw->size) { |
1129 | pr_err("xc5000: Firmware file with incorrect size\n"); | |
1130 | release_firmware(fw); | |
1131 | return -EINVAL; | |
1132 | } | |
1133 | priv->firmware = fw; | |
1134 | } else | |
1135 | fw = priv->firmware; | |
8604f355 | 1136 | |
2621c0b3 MCC |
1137 | /* Try up to 5 times to load firmware */ |
1138 | for (i = 0; i < 5; i++) { | |
ee67674a MCC |
1139 | if (i) |
1140 | printk(KERN_CONT " - retrying to upload firmware.\n"); | |
1141 | ||
8604f355 | 1142 | ret = xc5000_fwupload(fe, desired_fw, fw); |
859ae7f0 | 1143 | if (ret != 0) |
8604f355 | 1144 | goto err; |
aacb9d31 | 1145 | |
de49bc6e DH |
1146 | msleep(20); |
1147 | ||
22d5c6f5 | 1148 | if (priv->fw_checksum_supported) { |
2621c0b3 | 1149 | if (xc5000_readreg(priv, XREG_FW_CHECKSUM, &fw_ck)) { |
ee67674a MCC |
1150 | printk(KERN_ERR |
1151 | "xc5000: FW checksum reading failed."); | |
2621c0b3 | 1152 | continue; |
22d5c6f5 DH |
1153 | } |
1154 | ||
2621c0b3 | 1155 | if (!fw_ck) { |
ee67674a MCC |
1156 | printk(KERN_ERR |
1157 | "xc5000: FW checksum failed = 0x%04x.", | |
1158 | fw_ck); | |
2621c0b3 | 1159 | continue; |
22d5c6f5 DH |
1160 | } |
1161 | } | |
1162 | ||
fc7a74ba | 1163 | /* Start the tuner self-calibration process */ |
2621c0b3 MCC |
1164 | ret = xc_initialize(priv); |
1165 | if (ret) { | |
26c7e7bc | 1166 | printk(KERN_ERR "xc5000: Can't request self-calibration."); |
2621c0b3 MCC |
1167 | continue; |
1168 | } | |
de49bc6e | 1169 | |
fc7a74ba DH |
1170 | /* Wait for calibration to complete. |
1171 | * We could continue but XC5000 will clock stretch subsequent | |
1172 | * I2C transactions until calibration is complete. This way we | |
1173 | * don't have to rely on clock stretching working. | |
1174 | */ | |
e5bf4a11 | 1175 | msleep(100); |
aacb9d31 | 1176 | |
22d5c6f5 | 1177 | if (priv->init_status_supported) { |
2621c0b3 | 1178 | if (xc5000_readreg(priv, XREG_INIT_STATUS, &fw_ck)) { |
ee67674a MCC |
1179 | printk(KERN_ERR |
1180 | "xc5000: FW failed reading init status."); | |
2621c0b3 | 1181 | continue; |
22d5c6f5 DH |
1182 | } |
1183 | ||
2621c0b3 | 1184 | if (!fw_ck) { |
ee67674a MCC |
1185 | printk(KERN_ERR |
1186 | "xc5000: FW init status failed = 0x%04x.", | |
1187 | fw_ck); | |
2621c0b3 | 1188 | continue; |
22d5c6f5 DH |
1189 | } |
1190 | } | |
1191 | ||
de49bc6e DH |
1192 | if (priv->pll_register_no) { |
1193 | xc5000_readreg(priv, priv->pll_register_no, | |
1194 | &pll_lock_status); | |
1195 | if (pll_lock_status > 63) { | |
1196 | /* PLL is unlocked, force reload of the firmware */ | |
ee67674a MCC |
1197 | printk(KERN_ERR |
1198 | "xc5000: PLL not running after fwload."); | |
2621c0b3 | 1199 | continue; |
de49bc6e DH |
1200 | } |
1201 | } | |
1202 | ||
fc7a74ba | 1203 | /* Default to "CABLE" mode */ |
2621c0b3 | 1204 | ret = xc_write_reg(priv, XREG_SIGNALSOURCE, XC_RF_MODE_CABLE); |
ee67674a MCC |
1205 | if (!ret) |
1206 | break; | |
1207 | printk(KERN_ERR "xc5000: can't set to cable mode."); | |
fc7a74ba | 1208 | } |
aacb9d31 | 1209 | |
8604f355 | 1210 | err: |
ee67674a MCC |
1211 | if (!ret) |
1212 | printk(KERN_INFO "xc5000: Firmware %s loaded and running.\n", | |
1213 | desired_fw->name); | |
1214 | else | |
1215 | printk(KERN_CONT " - too many retries. Giving up\n"); | |
1216 | ||
aacb9d31 ST |
1217 | return ret; |
1218 | } | |
1219 | ||
f7a27ff1 | 1220 | static void xc5000_do_timer_sleep(struct work_struct *timer_sleep) |
e12671cf | 1221 | { |
f7a27ff1 MCC |
1222 | struct xc5000_priv *priv =container_of(timer_sleep, struct xc5000_priv, |
1223 | timer_sleep.work); | |
1224 | struct dvb_frontend *fe = priv->fe; | |
27c685a4 ST |
1225 | int ret; |
1226 | ||
271ddbf7 | 1227 | dprintk(1, "%s()\n", __func__); |
e12671cf | 1228 | |
7f05b530 DH |
1229 | /* According to Xceive technical support, the "powerdown" register |
1230 | was removed in newer versions of the firmware. The "supported" | |
1231 | way to sleep the tuner is to pull the reset pin low for 10ms */ | |
303ddd92 | 1232 | ret = xc5000_tuner_reset(fe); |
f7a27ff1 | 1233 | if (ret != 0) |
27c685a4 ST |
1234 | printk(KERN_ERR |
1235 | "xc5000: %s() unable to shutdown tuner\n", | |
271ddbf7 | 1236 | __func__); |
f7a27ff1 MCC |
1237 | } |
1238 | ||
1239 | static int xc5000_sleep(struct dvb_frontend *fe) | |
1240 | { | |
1241 | struct xc5000_priv *priv = fe->tuner_priv; | |
1242 | ||
1243 | dprintk(1, "%s()\n", __func__); | |
1244 | ||
1245 | /* Avoid firmware reload on slow devices */ | |
1246 | if (no_poweroff) | |
859ae7f0 | 1247 | return 0; |
f7a27ff1 MCC |
1248 | |
1249 | schedule_delayed_work(&priv->timer_sleep, | |
1250 | msecs_to_jiffies(XC5000_SLEEP_TIME)); | |
1251 | ||
1252 | return 0; | |
e12671cf ST |
1253 | } |
1254 | ||
91a5307c MCC |
1255 | static int xc5000_suspend(struct dvb_frontend *fe) |
1256 | { | |
1257 | struct xc5000_priv *priv = fe->tuner_priv; | |
1258 | int ret; | |
1259 | ||
1260 | dprintk(1, "%s()\n", __func__); | |
1261 | ||
1262 | cancel_delayed_work(&priv->timer_sleep); | |
1263 | ||
1264 | ret = xc5000_tuner_reset(fe); | |
1265 | if (ret != 0) | |
1266 | printk(KERN_ERR | |
1267 | "xc5000: %s() unable to shutdown tuner\n", | |
1268 | __func__); | |
1269 | ||
1270 | return 0; | |
1271 | } | |
1272 | ||
27ccd694 SK |
1273 | static int xc5000_resume(struct dvb_frontend *fe) |
1274 | { | |
1275 | struct xc5000_priv *priv = fe->tuner_priv; | |
1276 | ||
1277 | dprintk(1, "%s()\n", __func__); | |
1278 | ||
1279 | /* suspended before firmware is loaded. | |
1280 | Avoid firmware load in resume path. */ | |
1281 | if (!priv->firmware) | |
1282 | return 0; | |
1283 | ||
1284 | return xc5000_set_params(fe); | |
1285 | } | |
1286 | ||
aacb9d31 ST |
1287 | static int xc5000_init(struct dvb_frontend *fe) |
1288 | { | |
1289 | struct xc5000_priv *priv = fe->tuner_priv; | |
271ddbf7 | 1290 | dprintk(1, "%s()\n", __func__); |
aacb9d31 | 1291 | |
859ae7f0 | 1292 | if (xc_load_fw_and_init_tuner(fe, 0) != 0) { |
e12671cf ST |
1293 | printk(KERN_ERR "xc5000: Unable to initialise tuner\n"); |
1294 | return -EREMOTEIO; | |
1295 | } | |
1296 | ||
1297 | if (debug) | |
1298 | xc_debug_dump(priv); | |
aacb9d31 ST |
1299 | |
1300 | return 0; | |
1301 | } | |
1302 | ||
194ced7a | 1303 | static void xc5000_release(struct dvb_frontend *fe) |
aacb9d31 | 1304 | { |
89fd2854 MK |
1305 | struct xc5000_priv *priv = fe->tuner_priv; |
1306 | ||
271ddbf7 | 1307 | dprintk(1, "%s()\n", __func__); |
89fd2854 MK |
1308 | |
1309 | mutex_lock(&xc5000_list_mutex); | |
1310 | ||
f7a27ff1 MCC |
1311 | if (priv) { |
1312 | cancel_delayed_work(&priv->timer_sleep); | |
856260a5 DH |
1313 | if (priv->firmware) { |
1314 | release_firmware(priv->firmware); | |
1315 | priv->firmware = NULL; | |
1316 | } | |
4961a532 | 1317 | hybrid_tuner_release_state(priv); |
f7a27ff1 | 1318 | } |
89fd2854 MK |
1319 | |
1320 | mutex_unlock(&xc5000_list_mutex); | |
1321 | ||
aacb9d31 | 1322 | fe->tuner_priv = NULL; |
aacb9d31 ST |
1323 | } |
1324 | ||
724dcbfa DB |
1325 | static int xc5000_set_config(struct dvb_frontend *fe, void *priv_cfg) |
1326 | { | |
1327 | struct xc5000_priv *priv = fe->tuner_priv; | |
1328 | struct xc5000_config *p = priv_cfg; | |
1329 | ||
1330 | dprintk(1, "%s()\n", __func__); | |
1331 | ||
1332 | if (p->if_khz) | |
1333 | priv->if_khz = p->if_khz; | |
1334 | ||
1335 | if (p->radio_input) | |
1336 | priv->radio_input = p->radio_input; | |
1337 | ||
52e269b1 RV |
1338 | if (p->output_amp) |
1339 | priv->output_amp = p->output_amp; | |
1340 | ||
724dcbfa DB |
1341 | return 0; |
1342 | } | |
1343 | ||
1344 | ||
aacb9d31 ST |
1345 | static const struct dvb_tuner_ops xc5000_tuner_ops = { |
1346 | .info = { | |
1347 | .name = "Xceive XC5000", | |
1348 | .frequency_min = 1000000, | |
1349 | .frequency_max = 1023000000, | |
1350 | .frequency_step = 50000, | |
1351 | }, | |
1352 | ||
27c685a4 ST |
1353 | .release = xc5000_release, |
1354 | .init = xc5000_init, | |
1355 | .sleep = xc5000_sleep, | |
91a5307c | 1356 | .suspend = xc5000_suspend, |
27ccd694 | 1357 | .resume = xc5000_resume, |
aacb9d31 | 1358 | |
724dcbfa | 1359 | .set_config = xc5000_set_config, |
59b94f3e | 1360 | .set_params = xc5000_set_digital_params, |
27c685a4 ST |
1361 | .set_analog_params = xc5000_set_analog_params, |
1362 | .get_frequency = xc5000_get_frequency, | |
35621030 | 1363 | .get_if_frequency = xc5000_get_if_frequency, |
27c685a4 ST |
1364 | .get_bandwidth = xc5000_get_bandwidth, |
1365 | .get_status = xc5000_get_status | |
aacb9d31 ST |
1366 | }; |
1367 | ||
48723543 MK |
1368 | struct dvb_frontend *xc5000_attach(struct dvb_frontend *fe, |
1369 | struct i2c_adapter *i2c, | |
2e4e98e7 | 1370 | const struct xc5000_config *cfg) |
aacb9d31 ST |
1371 | { |
1372 | struct xc5000_priv *priv = NULL; | |
89fd2854 | 1373 | int instance; |
aacb9d31 ST |
1374 | u16 id = 0; |
1375 | ||
89fd2854 MK |
1376 | dprintk(1, "%s(%d-%04x)\n", __func__, |
1377 | i2c ? i2c_adapter_id(i2c) : -1, | |
1378 | cfg ? cfg->i2c_address : -1); | |
aacb9d31 | 1379 | |
89fd2854 | 1380 | mutex_lock(&xc5000_list_mutex); |
aacb9d31 | 1381 | |
89fd2854 MK |
1382 | instance = hybrid_tuner_request_state(struct xc5000_priv, priv, |
1383 | hybrid_tuner_instance_list, | |
1384 | i2c, cfg->i2c_address, "xc5000"); | |
1385 | switch (instance) { | |
1386 | case 0: | |
1387 | goto fail; | |
89fd2854 MK |
1388 | case 1: |
1389 | /* new tuner instance */ | |
c6f56e7d | 1390 | priv->bandwidth = 6000000; |
89fd2854 | 1391 | fe->tuner_priv = priv; |
f7a27ff1 MCC |
1392 | priv->fe = fe; |
1393 | INIT_DELAYED_WORK(&priv->timer_sleep, xc5000_do_timer_sleep); | |
89fd2854 MK |
1394 | break; |
1395 | default: | |
1396 | /* existing tuner instance */ | |
1397 | fe->tuner_priv = priv; | |
1398 | break; | |
1399 | } | |
aacb9d31 | 1400 | |
ea227863 DH |
1401 | if (priv->if_khz == 0) { |
1402 | /* If the IF hasn't been set yet, use the value provided by | |
1403 | the caller (occurs in hybrid devices where the analog | |
1404 | call to xc5000_attach occurs before the digital side) */ | |
1405 | priv->if_khz = cfg->if_khz; | |
1406 | } | |
1407 | ||
7d3d0d8d MK |
1408 | if (priv->xtal_khz == 0) |
1409 | priv->xtal_khz = cfg->xtal_khz; | |
1410 | ||
496e9057 DH |
1411 | if (priv->radio_input == 0) |
1412 | priv->radio_input = cfg->radio_input; | |
1413 | ||
6fab81df | 1414 | /* don't override chip id if it's already been set |
76efb0ba | 1415 | unless explicitly specified */ |
6fab81df MK |
1416 | if ((priv->chip_id == 0) || (cfg->chip_id)) |
1417 | /* use default chip id if none specified, set to 0 so | |
1418 | it can be overridden if this is a hybrid driver */ | |
1419 | priv->chip_id = (cfg->chip_id) ? cfg->chip_id : 0; | |
76efb0ba | 1420 | |
52e269b1 RV |
1421 | /* don't override output_amp if it's already been set |
1422 | unless explicitly specified */ | |
1423 | if ((priv->output_amp == 0) || (cfg->output_amp)) | |
1424 | /* use default output_amp value if none specified */ | |
1425 | priv->output_amp = (cfg->output_amp) ? cfg->output_amp : 0x8a; | |
1426 | ||
27c685a4 ST |
1427 | /* Check if firmware has been loaded. It is possible that another |
1428 | instance of the driver has loaded the firmware. | |
1429 | */ | |
859ae7f0 | 1430 | if (xc5000_readreg(priv, XREG_PRODUCT_ID, &id) != 0) |
89fd2854 | 1431 | goto fail; |
aacb9d31 | 1432 | |
8f3cd530 | 1433 | switch (id) { |
27c685a4 ST |
1434 | case XC_PRODUCT_ID_FW_LOADED: |
1435 | printk(KERN_INFO | |
1436 | "xc5000: Successfully identified at address 0x%02x\n", | |
1437 | cfg->i2c_address); | |
1438 | printk(KERN_INFO | |
1439 | "xc5000: Firmware has been loaded previously\n"); | |
27c685a4 ST |
1440 | break; |
1441 | case XC_PRODUCT_ID_FW_NOT_LOADED: | |
1442 | printk(KERN_INFO | |
1443 | "xc5000: Successfully identified at address 0x%02x\n", | |
1444 | cfg->i2c_address); | |
1445 | printk(KERN_INFO | |
1446 | "xc5000: Firmware has not been loaded previously\n"); | |
27c685a4 ST |
1447 | break; |
1448 | default: | |
aacb9d31 ST |
1449 | printk(KERN_ERR |
1450 | "xc5000: Device not found at addr 0x%02x (0x%x)\n", | |
1451 | cfg->i2c_address, id); | |
89fd2854 | 1452 | goto fail; |
aacb9d31 ST |
1453 | } |
1454 | ||
89fd2854 MK |
1455 | mutex_unlock(&xc5000_list_mutex); |
1456 | ||
aacb9d31 ST |
1457 | memcpy(&fe->ops.tuner_ops, &xc5000_tuner_ops, |
1458 | sizeof(struct dvb_tuner_ops)); | |
1459 | ||
aacb9d31 | 1460 | return fe; |
89fd2854 MK |
1461 | fail: |
1462 | mutex_unlock(&xc5000_list_mutex); | |
1463 | ||
1464 | xc5000_release(fe); | |
1465 | return NULL; | |
aacb9d31 ST |
1466 | } |
1467 | EXPORT_SYMBOL(xc5000_attach); | |
1468 | ||
1469 | MODULE_AUTHOR("Steven Toth"); | |
e12671cf | 1470 | MODULE_DESCRIPTION("Xceive xc5000 silicon tuner driver"); |
aacb9d31 | 1471 | MODULE_LICENSE("GPL"); |
3422f2a6 TG |
1472 | MODULE_FIRMWARE(XC5000A_FIRMWARE); |
1473 | MODULE_FIRMWARE(XC5000C_FIRMWARE); |