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Commit | Line | Data |
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1c1e45d1 HV |
1 | /* |
2 | * cx18 init/start/stop/exit stream functions | |
3 | * | |
4 | * Derived from ivtv-streams.c | |
5 | * | |
6 | * Copyright (C) 2007 Hans Verkuil <hverkuil@xs4all.nl> | |
1ed9dcc8 | 7 | * Copyright (C) 2008 Andy Walls <awalls@radix.net> |
1c1e45d1 HV |
8 | * |
9 | * This program is free software; you can redistribute it and/or modify | |
10 | * it under the terms of the GNU General Public License as published by | |
11 | * the Free Software Foundation; either version 2 of the License, or | |
12 | * (at your option) any later version. | |
13 | * | |
14 | * This program is distributed in the hope that it will be useful, | |
15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
17 | * GNU General Public License for more details. | |
18 | * | |
19 | * You should have received a copy of the GNU General Public License | |
20 | * along with this program; if not, write to the Free Software | |
21 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA | |
22 | * 02111-1307 USA | |
23 | */ | |
24 | ||
25 | #include "cx18-driver.h" | |
b1526421 | 26 | #include "cx18-io.h" |
1c1e45d1 HV |
27 | #include "cx18-fileops.h" |
28 | #include "cx18-mailbox.h" | |
29 | #include "cx18-i2c.h" | |
30 | #include "cx18-queue.h" | |
31 | #include "cx18-ioctl.h" | |
32 | #include "cx18-streams.h" | |
33 | #include "cx18-cards.h" | |
34 | #include "cx18-scb.h" | |
35 | #include "cx18-av-core.h" | |
36 | #include "cx18-dvb.h" | |
37 | ||
38 | #define CX18_DSP0_INTERRUPT_MASK 0xd0004C | |
39 | ||
bec43661 | 40 | static struct v4l2_file_operations cx18_v4l2_enc_fops = { |
daf20d95 HV |
41 | .owner = THIS_MODULE, |
42 | .read = cx18_v4l2_read, | |
43 | .open = cx18_v4l2_open, | |
3b6fe58f | 44 | /* FIXME change to video_ioctl2 if serialization lock can be removed */ |
daf20d95 | 45 | .ioctl = cx18_v4l2_ioctl, |
daf20d95 HV |
46 | .release = cx18_v4l2_close, |
47 | .poll = cx18_v4l2_enc_poll, | |
1c1e45d1 HV |
48 | }; |
49 | ||
50 | /* offset from 0 to register ts v4l2 minors on */ | |
51 | #define CX18_V4L2_ENC_TS_OFFSET 16 | |
52 | /* offset from 0 to register pcm v4l2 minors on */ | |
53 | #define CX18_V4L2_ENC_PCM_OFFSET 24 | |
54 | /* offset from 0 to register yuv v4l2 minors on */ | |
55 | #define CX18_V4L2_ENC_YUV_OFFSET 32 | |
56 | ||
57 | static struct { | |
58 | const char *name; | |
59 | int vfl_type; | |
dd89601d | 60 | int num_offset; |
1c1e45d1 HV |
61 | int dma; |
62 | enum v4l2_buf_type buf_type; | |
1c1e45d1 HV |
63 | } cx18_stream_info[] = { |
64 | { /* CX18_ENC_STREAM_TYPE_MPG */ | |
65 | "encoder MPEG", | |
66 | VFL_TYPE_GRABBER, 0, | |
67 | PCI_DMA_FROMDEVICE, V4L2_BUF_TYPE_VIDEO_CAPTURE, | |
1c1e45d1 HV |
68 | }, |
69 | { /* CX18_ENC_STREAM_TYPE_TS */ | |
70 | "TS", | |
71 | VFL_TYPE_GRABBER, -1, | |
72 | PCI_DMA_FROMDEVICE, V4L2_BUF_TYPE_VIDEO_CAPTURE, | |
1c1e45d1 HV |
73 | }, |
74 | { /* CX18_ENC_STREAM_TYPE_YUV */ | |
75 | "encoder YUV", | |
76 | VFL_TYPE_GRABBER, CX18_V4L2_ENC_YUV_OFFSET, | |
77 | PCI_DMA_FROMDEVICE, V4L2_BUF_TYPE_VIDEO_CAPTURE, | |
1c1e45d1 HV |
78 | }, |
79 | { /* CX18_ENC_STREAM_TYPE_VBI */ | |
80 | "encoder VBI", | |
81 | VFL_TYPE_VBI, 0, | |
82 | PCI_DMA_FROMDEVICE, V4L2_BUF_TYPE_VBI_CAPTURE, | |
1c1e45d1 HV |
83 | }, |
84 | { /* CX18_ENC_STREAM_TYPE_PCM */ | |
85 | "encoder PCM audio", | |
86 | VFL_TYPE_GRABBER, CX18_V4L2_ENC_PCM_OFFSET, | |
87 | PCI_DMA_FROMDEVICE, V4L2_BUF_TYPE_PRIVATE, | |
1c1e45d1 HV |
88 | }, |
89 | { /* CX18_ENC_STREAM_TYPE_IDX */ | |
90 | "encoder IDX", | |
91 | VFL_TYPE_GRABBER, -1, | |
92 | PCI_DMA_FROMDEVICE, V4L2_BUF_TYPE_VIDEO_CAPTURE, | |
1c1e45d1 HV |
93 | }, |
94 | { /* CX18_ENC_STREAM_TYPE_RAD */ | |
95 | "encoder radio", | |
96 | VFL_TYPE_RADIO, 0, | |
97 | PCI_DMA_NONE, V4L2_BUF_TYPE_PRIVATE, | |
1c1e45d1 HV |
98 | }, |
99 | }; | |
100 | ||
101 | static void cx18_stream_init(struct cx18 *cx, int type) | |
102 | { | |
103 | struct cx18_stream *s = &cx->streams[type]; | |
3d05913d | 104 | struct video_device *video_dev = s->video_dev; |
1c1e45d1 | 105 | |
3d05913d | 106 | /* we need to keep video_dev, so restore it afterwards */ |
1c1e45d1 | 107 | memset(s, 0, sizeof(*s)); |
3d05913d | 108 | s->video_dev = video_dev; |
1c1e45d1 HV |
109 | |
110 | /* initialize cx18_stream fields */ | |
111 | s->cx = cx; | |
112 | s->type = type; | |
113 | s->name = cx18_stream_info[type].name; | |
d3c5e707 | 114 | s->handle = CX18_INVALID_TASK_HANDLE; |
1c1e45d1 HV |
115 | |
116 | s->dma = cx18_stream_info[type].dma; | |
6ecd86dc | 117 | s->buffers = cx->stream_buffers[type]; |
1c1e45d1 | 118 | s->buf_size = cx->stream_buf_size[type]; |
6ecd86dc | 119 | |
f576ceef | 120 | mutex_init(&s->qlock); |
1c1e45d1 HV |
121 | init_waitqueue_head(&s->waitq); |
122 | s->id = -1; | |
123 | cx18_queue_init(&s->q_free); | |
66c2a6b0 | 124 | cx18_queue_init(&s->q_busy); |
1c1e45d1 | 125 | cx18_queue_init(&s->q_full); |
1c1e45d1 HV |
126 | } |
127 | ||
128 | static int cx18_prep_dev(struct cx18 *cx, int type) | |
129 | { | |
130 | struct cx18_stream *s = &cx->streams[type]; | |
131 | u32 cap = cx->v4l2_cap; | |
dd89601d HV |
132 | int num_offset = cx18_stream_info[type].num_offset; |
133 | int num = cx->num + cx18_first_minor + num_offset; | |
1c1e45d1 | 134 | |
3d05913d | 135 | /* These four fields are always initialized. If video_dev == NULL, then |
1c1e45d1 HV |
136 | this stream is not in use. In that case no other fields but these |
137 | four can be used. */ | |
3d05913d | 138 | s->video_dev = NULL; |
1c1e45d1 HV |
139 | s->cx = cx; |
140 | s->type = type; | |
141 | s->name = cx18_stream_info[type].name; | |
142 | ||
143 | /* Check whether the radio is supported */ | |
144 | if (type == CX18_ENC_STREAM_TYPE_RAD && !(cap & V4L2_CAP_RADIO)) | |
145 | return 0; | |
146 | ||
147 | /* Check whether VBI is supported */ | |
148 | if (type == CX18_ENC_STREAM_TYPE_VBI && | |
149 | !(cap & (V4L2_CAP_VBI_CAPTURE | V4L2_CAP_SLICED_VBI_CAPTURE))) | |
150 | return 0; | |
151 | ||
1c1e45d1 HV |
152 | /* User explicitly selected 0 buffers for these streams, so don't |
153 | create them. */ | |
154 | if (cx18_stream_info[type].dma != PCI_DMA_NONE && | |
6ecd86dc | 155 | cx->stream_buffers[type] == 0) { |
1c1e45d1 HV |
156 | CX18_INFO("Disabled %s device\n", cx18_stream_info[type].name); |
157 | return 0; | |
158 | } | |
159 | ||
160 | cx18_stream_init(cx, type); | |
161 | ||
dd89601d | 162 | if (num_offset == -1) |
1c1e45d1 HV |
163 | return 0; |
164 | ||
165 | /* allocate and initialize the v4l2 video device structure */ | |
3d05913d AW |
166 | s->video_dev = video_device_alloc(); |
167 | if (s->video_dev == NULL) { | |
1c1e45d1 HV |
168 | CX18_ERR("Couldn't allocate v4l2 video_device for %s\n", |
169 | s->name); | |
170 | return -ENOMEM; | |
171 | } | |
172 | ||
3d05913d | 173 | snprintf(s->video_dev->name, sizeof(s->video_dev->name), "cx18-%d", |
37f89f95 | 174 | cx->num); |
1c1e45d1 | 175 | |
3d05913d AW |
176 | s->video_dev->num = num; |
177 | s->video_dev->parent = &cx->pci_dev->dev; | |
178 | s->video_dev->fops = &cx18_v4l2_enc_fops; | |
179 | s->video_dev->release = video_device_release; | |
180 | s->video_dev->tvnorms = V4L2_STD_ALL; | |
181 | cx18_set_funcs(s->video_dev); | |
1c1e45d1 HV |
182 | return 0; |
183 | } | |
184 | ||
185 | /* Initialize v4l2 variables and register v4l2 devices */ | |
186 | int cx18_streams_setup(struct cx18 *cx) | |
187 | { | |
9b4a7c8a | 188 | int type, ret; |
1c1e45d1 HV |
189 | |
190 | /* Setup V4L2 Devices */ | |
191 | for (type = 0; type < CX18_MAX_STREAMS; type++) { | |
192 | /* Prepare device */ | |
9b4a7c8a AW |
193 | ret = cx18_prep_dev(cx, type); |
194 | if (ret < 0) | |
1c1e45d1 HV |
195 | break; |
196 | ||
197 | /* Allocate Stream */ | |
9b4a7c8a AW |
198 | ret = cx18_stream_alloc(&cx->streams[type]); |
199 | if (ret < 0) | |
1c1e45d1 HV |
200 | break; |
201 | } | |
202 | if (type == CX18_MAX_STREAMS) | |
203 | return 0; | |
204 | ||
205 | /* One or more streams could not be initialized. Clean 'em all up. */ | |
3f98387e | 206 | cx18_streams_cleanup(cx, 0); |
9b4a7c8a | 207 | return ret; |
1c1e45d1 HV |
208 | } |
209 | ||
210 | static int cx18_reg_dev(struct cx18 *cx, int type) | |
211 | { | |
212 | struct cx18_stream *s = &cx->streams[type]; | |
213 | int vfl_type = cx18_stream_info[type].vfl_type; | |
9b4a7c8a | 214 | int num, ret; |
1c1e45d1 HV |
215 | |
216 | /* TODO: Shouldn't this be a VFL_TYPE_TRANSPORT or something? | |
217 | * We need a VFL_TYPE_TS defined. | |
218 | */ | |
219 | if (strcmp("TS", s->name) == 0) { | |
220 | /* just return if no DVB is supported */ | |
221 | if ((cx->card->hw_all & CX18_HW_DVB) == 0) | |
222 | return 0; | |
9b4a7c8a AW |
223 | ret = cx18_dvb_register(s); |
224 | if (ret < 0) { | |
1c1e45d1 | 225 | CX18_ERR("DVB failed to register\n"); |
9b4a7c8a | 226 | return ret; |
1c1e45d1 HV |
227 | } |
228 | } | |
229 | ||
3d05913d | 230 | if (s->video_dev == NULL) |
1c1e45d1 HV |
231 | return 0; |
232 | ||
3d05913d | 233 | num = s->video_dev->num; |
dd89601d HV |
234 | /* card number + user defined offset + device offset */ |
235 | if (type != CX18_ENC_STREAM_TYPE_MPG) { | |
236 | struct cx18_stream *s_mpg = &cx->streams[CX18_ENC_STREAM_TYPE_MPG]; | |
237 | ||
3d05913d AW |
238 | if (s_mpg->video_dev) |
239 | num = s_mpg->video_dev->num | |
240 | + cx18_stream_info[type].num_offset; | |
dd89601d | 241 | } |
1c1e45d1 HV |
242 | |
243 | /* Register device. First try the desired minor, then any free one. */ | |
3d05913d | 244 | ret = video_register_device(s->video_dev, vfl_type, num); |
9b4a7c8a | 245 | if (ret < 0) { |
dd89601d HV |
246 | CX18_ERR("Couldn't register v4l2 device for %s kernel number %d\n", |
247 | s->name, num); | |
3d05913d AW |
248 | video_device_release(s->video_dev); |
249 | s->video_dev = NULL; | |
9b4a7c8a | 250 | return ret; |
1c1e45d1 | 251 | } |
3d05913d | 252 | num = s->video_dev->num; |
1c1e45d1 HV |
253 | |
254 | switch (vfl_type) { | |
255 | case VFL_TYPE_GRABBER: | |
6ecd86dc AW |
256 | CX18_INFO("Registered device video%d for %s (%d x %d kB)\n", |
257 | num, s->name, cx->stream_buffers[type], | |
258 | cx->stream_buf_size[type]/1024); | |
1c1e45d1 HV |
259 | break; |
260 | ||
261 | case VFL_TYPE_RADIO: | |
262 | CX18_INFO("Registered device radio%d for %s\n", | |
dd89601d | 263 | num, s->name); |
1c1e45d1 HV |
264 | break; |
265 | ||
266 | case VFL_TYPE_VBI: | |
6ecd86dc AW |
267 | if (cx->stream_buffers[type]) |
268 | CX18_INFO("Registered device vbi%d for %s " | |
269 | "(%d x %d bytes)\n", | |
270 | num, s->name, cx->stream_buffers[type], | |
271 | cx->stream_buf_size[type]); | |
1c1e45d1 HV |
272 | else |
273 | CX18_INFO("Registered device vbi%d for %s\n", | |
dd89601d | 274 | num, s->name); |
1c1e45d1 HV |
275 | break; |
276 | } | |
277 | ||
278 | return 0; | |
279 | } | |
280 | ||
281 | /* Register v4l2 devices */ | |
282 | int cx18_streams_register(struct cx18 *cx) | |
283 | { | |
284 | int type; | |
9b4a7c8a AW |
285 | int err; |
286 | int ret = 0; | |
1c1e45d1 HV |
287 | |
288 | /* Register V4L2 devices */ | |
9b4a7c8a AW |
289 | for (type = 0; type < CX18_MAX_STREAMS; type++) { |
290 | err = cx18_reg_dev(cx, type); | |
291 | if (err && ret == 0) | |
292 | ret = err; | |
293 | } | |
1c1e45d1 | 294 | |
9b4a7c8a | 295 | if (ret == 0) |
1c1e45d1 HV |
296 | return 0; |
297 | ||
298 | /* One or more streams could not be initialized. Clean 'em all up. */ | |
3f98387e | 299 | cx18_streams_cleanup(cx, 1); |
9b4a7c8a | 300 | return ret; |
1c1e45d1 HV |
301 | } |
302 | ||
303 | /* Unregister v4l2 devices */ | |
3f98387e | 304 | void cx18_streams_cleanup(struct cx18 *cx, int unregister) |
1c1e45d1 HV |
305 | { |
306 | struct video_device *vdev; | |
307 | int type; | |
308 | ||
309 | /* Teardown all streams */ | |
310 | for (type = 0; type < CX18_MAX_STREAMS; type++) { | |
fac3639d | 311 | if (cx->streams[type].dvb.enabled) { |
1c1e45d1 | 312 | cx18_dvb_unregister(&cx->streams[type]); |
fac3639d HV |
313 | cx->streams[type].dvb.enabled = false; |
314 | } | |
1c1e45d1 | 315 | |
3d05913d | 316 | vdev = cx->streams[type].video_dev; |
1c1e45d1 | 317 | |
3d05913d | 318 | cx->streams[type].video_dev = NULL; |
1c1e45d1 HV |
319 | if (vdev == NULL) |
320 | continue; | |
321 | ||
322 | cx18_stream_free(&cx->streams[type]); | |
323 | ||
3f98387e HV |
324 | /* Unregister or release device */ |
325 | if (unregister) | |
326 | video_unregister_device(vdev); | |
327 | else | |
328 | video_device_release(vdev); | |
1c1e45d1 HV |
329 | } |
330 | } | |
331 | ||
332 | static void cx18_vbi_setup(struct cx18_stream *s) | |
333 | { | |
334 | struct cx18 *cx = s->cx; | |
dd073434 | 335 | int raw = cx18_raw_vbi(cx); |
1c1e45d1 HV |
336 | u32 data[CX2341X_MBOX_MAX_DATA]; |
337 | int lines; | |
338 | ||
339 | if (cx->is_60hz) { | |
340 | cx->vbi.count = 12; | |
341 | cx->vbi.start[0] = 10; | |
342 | cx->vbi.start[1] = 273; | |
343 | } else { /* PAL/SECAM */ | |
344 | cx->vbi.count = 18; | |
345 | cx->vbi.start[0] = 6; | |
346 | cx->vbi.start[1] = 318; | |
347 | } | |
348 | ||
349 | /* setup VBI registers */ | |
350 | cx18_av_cmd(cx, VIDIOC_S_FMT, &cx->vbi.in); | |
351 | ||
dcc0ef88 AW |
352 | /* |
353 | * Send the CX18_CPU_SET_RAW_VBI_PARAM API command to setup Encoder Raw | |
354 | * VBI when the first analog capture channel starts, as once it starts | |
355 | * (e.g. MPEG), we can't effect any change in the Encoder Raw VBI setup | |
356 | * (i.e. for the VBI capture channels). We also send it for each | |
357 | * analog capture channel anyway just to make sure we get the proper | |
358 | * behavior | |
359 | */ | |
1c1e45d1 HV |
360 | if (raw) { |
361 | lines = cx->vbi.count * 2; | |
362 | } else { | |
363 | lines = cx->is_60hz ? 24 : 38; | |
364 | if (cx->is_60hz) | |
365 | lines += 2; | |
366 | } | |
367 | ||
1c1e45d1 HV |
368 | data[0] = s->handle; |
369 | /* Lines per field */ | |
370 | data[1] = (lines / 2) | ((lines / 2) << 16); | |
371 | /* bytes per line */ | |
302df970 AW |
372 | data[2] = (raw ? vbi_active_samples |
373 | : (cx->is_60hz ? vbi_hblank_samples_60Hz | |
374 | : vbi_hblank_samples_50Hz)); | |
1c1e45d1 HV |
375 | /* Every X number of frames a VBI interrupt arrives |
376 | (frames as in 25 or 30 fps) */ | |
377 | data[3] = 1; | |
302df970 AW |
378 | /* |
379 | * Set the SAV/EAV RP codes to look for as start/stop points | |
380 | * when in VIP-1.1 mode | |
381 | */ | |
1c1e45d1 | 382 | if (raw) { |
302df970 AW |
383 | /* |
384 | * Start codes for beginning of "active" line in vertical blank | |
385 | * 0x20 ( VerticalBlank ) | |
386 | * 0x60 ( EvenField VerticalBlank ) | |
387 | */ | |
1c1e45d1 | 388 | data[4] = 0x20602060; |
302df970 AW |
389 | /* |
390 | * End codes for end of "active" raw lines and regular lines | |
391 | * 0x30 ( VerticalBlank HorizontalBlank) | |
392 | * 0x70 ( EvenField VerticalBlank HorizontalBlank) | |
393 | * 0x90 (Task HorizontalBlank) | |
394 | * 0xd0 (Task EvenField HorizontalBlank) | |
395 | */ | |
af009cf6 | 396 | data[5] = 0x307090d0; |
1c1e45d1 | 397 | } else { |
302df970 AW |
398 | /* |
399 | * End codes for active video, we want data in the hblank region | |
400 | * 0xb0 (Task 0 VerticalBlank HorizontalBlank) | |
401 | * 0xf0 (Task EvenField VerticalBlank HorizontalBlank) | |
402 | * | |
403 | * Since the V bit is only allowed to toggle in the EAV RP code, | |
404 | * just before the first active region line, these two | |
405 | * are problematic and we have to ignore them: | |
406 | * 0x90 (Task HorizontalBlank) | |
407 | * 0xd0 (Task EvenField HorizontalBlank) | |
408 | */ | |
1c1e45d1 | 409 | data[4] = 0xB0F0B0F0; |
302df970 AW |
410 | /* |
411 | * Start codes for beginning of active line in vertical blank | |
412 | * 0xa0 (Task VerticalBlank ) | |
413 | * 0xe0 (Task EvenField VerticalBlank ) | |
414 | */ | |
1c1e45d1 HV |
415 | data[5] = 0xA0E0A0E0; |
416 | } | |
417 | ||
418 | CX18_DEBUG_INFO("Setup VBI h: %d lines %x bpl %d fr %d %x %x\n", | |
419 | data[0], data[1], data[2], data[3], data[4], data[5]); | |
420 | ||
dcc0ef88 | 421 | cx18_api(cx, CX18_CPU_SET_RAW_VBI_PARAM, 6, data); |
1c1e45d1 HV |
422 | } |
423 | ||
66c2a6b0 AW |
424 | struct cx18_queue *cx18_stream_put_buf_fw(struct cx18_stream *s, |
425 | struct cx18_buffer *buf) | |
426 | { | |
427 | struct cx18 *cx = s->cx; | |
428 | struct cx18_queue *q; | |
429 | ||
430 | /* Don't give it to the firmware, if we're not running a capture */ | |
431 | if (s->handle == CX18_INVALID_TASK_HANDLE || | |
432 | !test_bit(CX18_F_S_STREAMING, &s->s_flags)) | |
433 | return cx18_enqueue(s, buf, &s->q_free); | |
434 | ||
435 | q = cx18_enqueue(s, buf, &s->q_busy); | |
436 | if (q != &s->q_busy) | |
437 | return q; /* The firmware has the max buffers it can handle */ | |
438 | ||
439 | cx18_buf_sync_for_device(s, buf); | |
440 | cx18_vapi(cx, CX18_CPU_DE_SET_MDL, 5, s->handle, | |
441 | (void __iomem *) &cx->scb->cpu_mdl[buf->id] - cx->enc_mem, | |
442 | 1, buf->id, s->buf_size); | |
443 | return q; | |
444 | } | |
445 | ||
abb096de | 446 | void cx18_stream_load_fw_queue(struct cx18_stream *s) |
66c2a6b0 | 447 | { |
abb096de | 448 | struct cx18_queue *q; |
66c2a6b0 | 449 | struct cx18_buffer *buf; |
66c2a6b0 | 450 | |
abb096de | 451 | if (atomic_read(&s->q_free.buffers) == 0 || |
0ef02892 | 452 | atomic_read(&s->q_busy.buffers) >= CX18_MAX_FW_MDLS_PER_STREAM) |
abb096de AW |
453 | return; |
454 | ||
455 | /* Move from q_free to q_busy notifying the firmware, until the limit */ | |
456 | do { | |
457 | buf = cx18_dequeue(s, &s->q_free); | |
458 | if (buf == NULL) | |
459 | break; | |
460 | q = cx18_stream_put_buf_fw(s, buf); | |
0ef02892 AW |
461 | } while (atomic_read(&s->q_busy.buffers) < CX18_MAX_FW_MDLS_PER_STREAM |
462 | && q == &s->q_busy); | |
66c2a6b0 AW |
463 | } |
464 | ||
1c1e45d1 HV |
465 | int cx18_start_v4l2_encode_stream(struct cx18_stream *s) |
466 | { | |
467 | u32 data[MAX_MB_ARGUMENTS]; | |
468 | struct cx18 *cx = s->cx; | |
66c2a6b0 | 469 | struct cx18_buffer *buf; |
1c1e45d1 | 470 | int captype = 0; |
dcc0ef88 | 471 | struct cx18_api_func_private priv; |
1c1e45d1 | 472 | |
3d05913d | 473 | if (s->video_dev == NULL && s->dvb.enabled == 0) |
1c1e45d1 HV |
474 | return -EINVAL; |
475 | ||
476 | CX18_DEBUG_INFO("Start encoder stream %s\n", s->name); | |
477 | ||
478 | switch (s->type) { | |
479 | case CX18_ENC_STREAM_TYPE_MPG: | |
480 | captype = CAPTURE_CHANNEL_TYPE_MPEG; | |
481 | cx->mpg_data_received = cx->vbi_data_inserted = 0; | |
482 | cx->dualwatch_jiffies = jiffies; | |
483 | cx->dualwatch_stereo_mode = cx->params.audio_properties & 0x300; | |
484 | cx->search_pack_header = 0; | |
485 | break; | |
486 | ||
487 | case CX18_ENC_STREAM_TYPE_TS: | |
488 | captype = CAPTURE_CHANNEL_TYPE_TS; | |
1c1e45d1 HV |
489 | break; |
490 | case CX18_ENC_STREAM_TYPE_YUV: | |
491 | captype = CAPTURE_CHANNEL_TYPE_YUV; | |
492 | break; | |
493 | case CX18_ENC_STREAM_TYPE_PCM: | |
494 | captype = CAPTURE_CHANNEL_TYPE_PCM; | |
495 | break; | |
496 | case CX18_ENC_STREAM_TYPE_VBI: | |
dcc0ef88 | 497 | #ifdef CX18_ENCODER_PARSES_SLICED |
dd073434 AW |
498 | captype = cx18_raw_vbi(cx) ? |
499 | CAPTURE_CHANNEL_TYPE_VBI : CAPTURE_CHANNEL_TYPE_SLICED_VBI; | |
dcc0ef88 AW |
500 | #else |
501 | /* | |
502 | * Currently we set things up so that Sliced VBI from the | |
503 | * digitizer is handled as Raw VBI by the encoder | |
504 | */ | |
505 | captype = CAPTURE_CHANNEL_TYPE_VBI; | |
506 | #endif | |
1c1e45d1 HV |
507 | cx->vbi.frame = 0; |
508 | cx->vbi.inserted_frame = 0; | |
509 | memset(cx->vbi.sliced_mpeg_size, | |
510 | 0, sizeof(cx->vbi.sliced_mpeg_size)); | |
511 | break; | |
512 | default: | |
513 | return -EINVAL; | |
514 | } | |
1c1e45d1 | 515 | |
1c1e45d1 HV |
516 | /* Clear Streamoff flags in case left from last capture */ |
517 | clear_bit(CX18_F_S_STREAMOFF, &s->s_flags); | |
518 | ||
519 | cx18_vapi_result(cx, data, CX18_CREATE_TASK, 1, CPU_CMD_MASK_CAPTURE); | |
520 | s->handle = data[0]; | |
521 | cx18_vapi(cx, CX18_CPU_SET_CHANNEL_TYPE, 2, s->handle, captype); | |
522 | ||
dcc0ef88 AW |
523 | /* |
524 | * For everything but CAPTURE_CHANNEL_TYPE_TS, play it safe and | |
525 | * set up all the parameters, as it is not obvious which parameters the | |
526 | * firmware shares across capture channel types and which it does not. | |
527 | * | |
528 | * Some of the cx18_vapi() calls below apply to only certain capture | |
529 | * channel types. We're hoping there's no harm in calling most of them | |
530 | * anyway, as long as the values are all consistent. Setting some | |
531 | * shared parameters will have no effect once an analog capture channel | |
532 | * has started streaming. | |
533 | */ | |
534 | if (captype != CAPTURE_CHANNEL_TYPE_TS) { | |
1c1e45d1 HV |
535 | cx18_vapi(cx, CX18_CPU_SET_VER_CROP_LINE, 2, s->handle, 0); |
536 | cx18_vapi(cx, CX18_CPU_SET_MISC_PARAMETERS, 3, s->handle, 3, 1); | |
537 | cx18_vapi(cx, CX18_CPU_SET_MISC_PARAMETERS, 3, s->handle, 8, 0); | |
538 | cx18_vapi(cx, CX18_CPU_SET_MISC_PARAMETERS, 3, s->handle, 4, 1); | |
1c1e45d1 | 539 | |
dcc0ef88 AW |
540 | /* |
541 | * Audio related reset according to | |
542 | * Documentation/video4linux/cx2341x/fw-encoder-api.txt | |
543 | */ | |
544 | if (atomic_read(&cx->ana_capturing) == 0) | |
545 | cx18_vapi(cx, CX18_CPU_SET_MISC_PARAMETERS, 2, | |
546 | s->handle, 12); | |
547 | ||
548 | /* | |
549 | * Number of lines for Field 1 & Field 2 according to | |
550 | * Documentation/video4linux/cx2341x/fw-encoder-api.txt | |
551 | * FIXME - currently we set this to 0 & 0 but things seem OK | |
552 | */ | |
1c1e45d1 | 553 | cx18_vapi(cx, CX18_CPU_SET_CAPTURE_LINE_NO, 3, |
dcc0ef88 | 554 | s->handle, cx->digitizer, cx->digitizer); |
1c1e45d1 | 555 | |
1c1e45d1 HV |
556 | if (cx->v4l2_cap & V4L2_CAP_VBI_CAPTURE) |
557 | cx18_vbi_setup(s); | |
558 | ||
dcc0ef88 AW |
559 | /* |
560 | * assign program index info. | |
561 | * Mask 7: select I/P/B, Num_req: 400 max | |
562 | * FIXME - currently we have this hardcoded as disabled | |
563 | */ | |
1c1e45d1 HV |
564 | cx18_vapi_result(cx, data, CX18_CPU_SET_INDEXTABLE, 1, 0); |
565 | ||
dcc0ef88 | 566 | /* Call out to the common CX2341x API setup for user controls */ |
50b86bac AW |
567 | priv.cx = cx; |
568 | priv.s = s; | |
569 | cx2341x_update(&priv, cx18_api_func, NULL, &cx->params); | |
dcc0ef88 AW |
570 | |
571 | /* | |
572 | * When starting a capture and we're set for radio, | |
573 | * ensure the video is muted, despite the user control. | |
574 | */ | |
575 | if (!cx->params.video_mute && | |
576 | test_bit(CX18_F_I_RADIO_USER, &cx->i_flags)) | |
577 | cx18_vapi(cx, CX18_CPU_SET_VIDEO_MUTE, 2, s->handle, | |
578 | (cx->params.video_mute_yuv << 8) | 1); | |
1c1e45d1 HV |
579 | } |
580 | ||
31554ae5 | 581 | if (atomic_read(&cx->tot_capturing) == 0) { |
1c1e45d1 | 582 | clear_bit(CX18_F_I_EOS, &cx->i_flags); |
b1526421 | 583 | cx18_write_reg(cx, 7, CX18_DSP0_INTERRUPT_MASK); |
1c1e45d1 HV |
584 | } |
585 | ||
586 | cx18_vapi(cx, CX18_CPU_DE_SET_MDL_ACK, 3, s->handle, | |
990c81c8 AV |
587 | (void __iomem *)&cx->scb->cpu_mdl_ack[s->type][0] - cx->enc_mem, |
588 | (void __iomem *)&cx->scb->cpu_mdl_ack[s->type][1] - cx->enc_mem); | |
1c1e45d1 | 589 | |
66c2a6b0 AW |
590 | /* Init all the cpu_mdls for this stream */ |
591 | cx18_flush_queues(s); | |
592 | mutex_lock(&s->qlock); | |
f6b181ac | 593 | list_for_each_entry(buf, &s->q_free.list, list) { |
b1526421 AW |
594 | cx18_writel(cx, buf->dma_handle, |
595 | &cx->scb->cpu_mdl[buf->id].paddr); | |
596 | cx18_writel(cx, s->buf_size, &cx->scb->cpu_mdl[buf->id].length); | |
1c1e45d1 | 597 | } |
66c2a6b0 | 598 | mutex_unlock(&s->qlock); |
abb096de | 599 | cx18_stream_load_fw_queue(s); |
66c2a6b0 | 600 | |
1c1e45d1 HV |
601 | /* begin_capture */ |
602 | if (cx18_vapi(cx, CX18_CPU_CAPTURE_START, 1, s->handle)) { | |
603 | CX18_DEBUG_WARN("Error starting capture!\n"); | |
3b5df8ea AW |
604 | /* Ensure we're really not capturing before releasing MDLs */ |
605 | if (s->type == CX18_ENC_STREAM_TYPE_MPG) | |
606 | cx18_vapi(cx, CX18_CPU_CAPTURE_STOP, 2, s->handle, 1); | |
607 | else | |
608 | cx18_vapi(cx, CX18_CPU_CAPTURE_STOP, 1, s->handle); | |
66c2a6b0 AW |
609 | clear_bit(CX18_F_S_STREAMING, &s->s_flags); |
610 | /* FIXME - CX18_F_S_STREAMOFF as well? */ | |
3b5df8ea | 611 | cx18_vapi(cx, CX18_CPU_DE_RELEASE_MDL, 1, s->handle); |
1c1e45d1 | 612 | cx18_vapi(cx, CX18_DESTROY_TASK, 1, s->handle); |
66c2a6b0 AW |
613 | s->handle = CX18_INVALID_TASK_HANDLE; |
614 | if (atomic_read(&cx->tot_capturing) == 0) { | |
615 | set_bit(CX18_F_I_EOS, &cx->i_flags); | |
616 | cx18_write_reg(cx, 5, CX18_DSP0_INTERRUPT_MASK); | |
617 | } | |
1c1e45d1 HV |
618 | return -EINVAL; |
619 | } | |
620 | ||
621 | /* you're live! sit back and await interrupts :) */ | |
dcc0ef88 | 622 | if (captype != CAPTURE_CHANNEL_TYPE_TS) |
31554ae5 HV |
623 | atomic_inc(&cx->ana_capturing); |
624 | atomic_inc(&cx->tot_capturing); | |
1c1e45d1 HV |
625 | return 0; |
626 | } | |
627 | ||
628 | void cx18_stop_all_captures(struct cx18 *cx) | |
629 | { | |
630 | int i; | |
631 | ||
632 | for (i = CX18_MAX_STREAMS - 1; i >= 0; i--) { | |
633 | struct cx18_stream *s = &cx->streams[i]; | |
634 | ||
3d05913d | 635 | if (s->video_dev == NULL && s->dvb.enabled == 0) |
1c1e45d1 HV |
636 | continue; |
637 | if (test_bit(CX18_F_S_STREAMING, &s->s_flags)) | |
638 | cx18_stop_v4l2_encode_stream(s, 0); | |
639 | } | |
640 | } | |
641 | ||
642 | int cx18_stop_v4l2_encode_stream(struct cx18_stream *s, int gop_end) | |
643 | { | |
644 | struct cx18 *cx = s->cx; | |
645 | unsigned long then; | |
646 | ||
3d05913d | 647 | if (s->video_dev == NULL && s->dvb.enabled == 0) |
1c1e45d1 HV |
648 | return -EINVAL; |
649 | ||
650 | /* This function assumes that you are allowed to stop the capture | |
651 | and that we are actually capturing */ | |
652 | ||
653 | CX18_DEBUG_INFO("Stop Capture\n"); | |
654 | ||
31554ae5 | 655 | if (atomic_read(&cx->tot_capturing) == 0) |
1c1e45d1 HV |
656 | return 0; |
657 | ||
658 | if (s->type == CX18_ENC_STREAM_TYPE_MPG) | |
659 | cx18_vapi(cx, CX18_CPU_CAPTURE_STOP, 2, s->handle, !gop_end); | |
660 | else | |
661 | cx18_vapi(cx, CX18_CPU_CAPTURE_STOP, 1, s->handle); | |
662 | ||
663 | then = jiffies; | |
664 | ||
665 | if (s->type == CX18_ENC_STREAM_TYPE_MPG && gop_end) { | |
666 | CX18_INFO("ignoring gop_end: not (yet?) supported by the firmware\n"); | |
667 | } | |
668 | ||
31554ae5 HV |
669 | if (s->type != CX18_ENC_STREAM_TYPE_TS) |
670 | atomic_dec(&cx->ana_capturing); | |
671 | atomic_dec(&cx->tot_capturing); | |
1c1e45d1 HV |
672 | |
673 | /* Clear capture and no-read bits */ | |
674 | clear_bit(CX18_F_S_STREAMING, &s->s_flags); | |
675 | ||
f68d0cf5 AW |
676 | /* Tell the CX23418 it can't use our buffers anymore */ |
677 | cx18_vapi(cx, CX18_CPU_DE_RELEASE_MDL, 1, s->handle); | |
678 | ||
1c1e45d1 | 679 | cx18_vapi(cx, CX18_DESTROY_TASK, 1, s->handle); |
d3c5e707 | 680 | s->handle = CX18_INVALID_TASK_HANDLE; |
1c1e45d1 | 681 | |
31554ae5 | 682 | if (atomic_read(&cx->tot_capturing) > 0) |
1c1e45d1 HV |
683 | return 0; |
684 | ||
b1526421 | 685 | cx18_write_reg(cx, 5, CX18_DSP0_INTERRUPT_MASK); |
1c1e45d1 HV |
686 | wake_up(&s->waitq); |
687 | ||
688 | return 0; | |
689 | } | |
690 | ||
691 | u32 cx18_find_handle(struct cx18 *cx) | |
692 | { | |
693 | int i; | |
694 | ||
695 | /* find first available handle to be used for global settings */ | |
696 | for (i = 0; i < CX18_MAX_STREAMS; i++) { | |
697 | struct cx18_stream *s = &cx->streams[i]; | |
698 | ||
3d05913d | 699 | if (s->video_dev && (s->handle != CX18_INVALID_TASK_HANDLE)) |
1c1e45d1 HV |
700 | return s->handle; |
701 | } | |
d3c5e707 | 702 | return CX18_INVALID_TASK_HANDLE; |
1c1e45d1 | 703 | } |
ee2d64f5 AW |
704 | |
705 | struct cx18_stream *cx18_handle_to_stream(struct cx18 *cx, u32 handle) | |
706 | { | |
707 | int i; | |
708 | struct cx18_stream *s; | |
709 | ||
710 | if (handle == CX18_INVALID_TASK_HANDLE) | |
711 | return NULL; | |
712 | ||
713 | for (i = 0; i < CX18_MAX_STREAMS; i++) { | |
714 | s = &cx->streams[i]; | |
715 | if (s->handle != handle) | |
716 | continue; | |
3d05913d | 717 | if (s->video_dev || s->dvb.enabled) |
ee2d64f5 AW |
718 | return s; |
719 | } | |
720 | return NULL; | |
721 | } |