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V4L/DVB (13902): cx18: Update MPEG Index stream buffers module option processing
[mirror_ubuntu-artful-kernel.git] / drivers / media / video / cx18 / cx18-streams.c
CommitLineData
1c1e45d1
HV
1/*
2 * cx18 init/start/stop/exit stream functions
3 *
4 * Derived from ivtv-streams.c
5 *
6 * Copyright (C) 2007 Hans Verkuil <hverkuil@xs4all.nl>
1ed9dcc8 7 * Copyright (C) 2008 Andy Walls <awalls@radix.net>
1c1e45d1
HV
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
22 * 02111-1307 USA
23 */
24
25#include "cx18-driver.h"
b1526421 26#include "cx18-io.h"
1c1e45d1
HV
27#include "cx18-fileops.h"
28#include "cx18-mailbox.h"
29#include "cx18-i2c.h"
30#include "cx18-queue.h"
31#include "cx18-ioctl.h"
32#include "cx18-streams.h"
33#include "cx18-cards.h"
34#include "cx18-scb.h"
1c1e45d1
HV
35#include "cx18-dvb.h"
36
37#define CX18_DSP0_INTERRUPT_MASK 0xd0004C
38
bec43661 39static struct v4l2_file_operations cx18_v4l2_enc_fops = {
daf20d95
HV
40 .owner = THIS_MODULE,
41 .read = cx18_v4l2_read,
42 .open = cx18_v4l2_open,
3b6fe58f 43 /* FIXME change to video_ioctl2 if serialization lock can be removed */
daf20d95 44 .ioctl = cx18_v4l2_ioctl,
daf20d95
HV
45 .release = cx18_v4l2_close,
46 .poll = cx18_v4l2_enc_poll,
1c1e45d1
HV
47};
48
49/* offset from 0 to register ts v4l2 minors on */
50#define CX18_V4L2_ENC_TS_OFFSET 16
51/* offset from 0 to register pcm v4l2 minors on */
52#define CX18_V4L2_ENC_PCM_OFFSET 24
53/* offset from 0 to register yuv v4l2 minors on */
54#define CX18_V4L2_ENC_YUV_OFFSET 32
55
56static struct {
57 const char *name;
58 int vfl_type;
dd89601d 59 int num_offset;
1c1e45d1
HV
60 int dma;
61 enum v4l2_buf_type buf_type;
1c1e45d1
HV
62} cx18_stream_info[] = {
63 { /* CX18_ENC_STREAM_TYPE_MPG */
64 "encoder MPEG",
65 VFL_TYPE_GRABBER, 0,
66 PCI_DMA_FROMDEVICE, V4L2_BUF_TYPE_VIDEO_CAPTURE,
1c1e45d1
HV
67 },
68 { /* CX18_ENC_STREAM_TYPE_TS */
69 "TS",
70 VFL_TYPE_GRABBER, -1,
71 PCI_DMA_FROMDEVICE, V4L2_BUF_TYPE_VIDEO_CAPTURE,
1c1e45d1
HV
72 },
73 { /* CX18_ENC_STREAM_TYPE_YUV */
74 "encoder YUV",
75 VFL_TYPE_GRABBER, CX18_V4L2_ENC_YUV_OFFSET,
76 PCI_DMA_FROMDEVICE, V4L2_BUF_TYPE_VIDEO_CAPTURE,
1c1e45d1
HV
77 },
78 { /* CX18_ENC_STREAM_TYPE_VBI */
79 "encoder VBI",
80 VFL_TYPE_VBI, 0,
81 PCI_DMA_FROMDEVICE, V4L2_BUF_TYPE_VBI_CAPTURE,
1c1e45d1
HV
82 },
83 { /* CX18_ENC_STREAM_TYPE_PCM */
84 "encoder PCM audio",
85 VFL_TYPE_GRABBER, CX18_V4L2_ENC_PCM_OFFSET,
86 PCI_DMA_FROMDEVICE, V4L2_BUF_TYPE_PRIVATE,
1c1e45d1
HV
87 },
88 { /* CX18_ENC_STREAM_TYPE_IDX */
89 "encoder IDX",
90 VFL_TYPE_GRABBER, -1,
91 PCI_DMA_FROMDEVICE, V4L2_BUF_TYPE_VIDEO_CAPTURE,
1c1e45d1
HV
92 },
93 { /* CX18_ENC_STREAM_TYPE_RAD */
94 "encoder radio",
95 VFL_TYPE_RADIO, 0,
96 PCI_DMA_NONE, V4L2_BUF_TYPE_PRIVATE,
1c1e45d1
HV
97 },
98};
99
100static void cx18_stream_init(struct cx18 *cx, int type)
101{
102 struct cx18_stream *s = &cx->streams[type];
3d05913d 103 struct video_device *video_dev = s->video_dev;
1c1e45d1 104
3d05913d 105 /* we need to keep video_dev, so restore it afterwards */
1c1e45d1 106 memset(s, 0, sizeof(*s));
3d05913d 107 s->video_dev = video_dev;
1c1e45d1
HV
108
109 /* initialize cx18_stream fields */
110 s->cx = cx;
111 s->type = type;
112 s->name = cx18_stream_info[type].name;
d3c5e707 113 s->handle = CX18_INVALID_TASK_HANDLE;
1c1e45d1
HV
114
115 s->dma = cx18_stream_info[type].dma;
6ecd86dc 116 s->buffers = cx->stream_buffers[type];
1c1e45d1 117 s->buf_size = cx->stream_buf_size[type];
52fcb3ec
AW
118 INIT_LIST_HEAD(&s->buf_pool);
119 s->bufs_per_mdl = 1;
120 s->mdl_size = s->buf_size * s->bufs_per_mdl;
6ecd86dc 121
1c1e45d1
HV
122 init_waitqueue_head(&s->waitq);
123 s->id = -1;
40c5520f 124 spin_lock_init(&s->q_free.lock);
1c1e45d1 125 cx18_queue_init(&s->q_free);
40c5520f 126 spin_lock_init(&s->q_busy.lock);
66c2a6b0 127 cx18_queue_init(&s->q_busy);
40c5520f 128 spin_lock_init(&s->q_full.lock);
1c1e45d1 129 cx18_queue_init(&s->q_full);
52fcb3ec
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130 spin_lock_init(&s->q_idle.lock);
131 cx18_queue_init(&s->q_idle);
21a278b8
AW
132
133 INIT_WORK(&s->out_work_order, cx18_out_work_handler);
1c1e45d1
HV
134}
135
136static int cx18_prep_dev(struct cx18 *cx, int type)
137{
138 struct cx18_stream *s = &cx->streams[type];
139 u32 cap = cx->v4l2_cap;
dd89601d 140 int num_offset = cx18_stream_info[type].num_offset;
5811cf99 141 int num = cx->instance + cx18_first_minor + num_offset;
1c1e45d1 142
3d05913d 143 /* These four fields are always initialized. If video_dev == NULL, then
1c1e45d1
HV
144 this stream is not in use. In that case no other fields but these
145 four can be used. */
3d05913d 146 s->video_dev = NULL;
1c1e45d1
HV
147 s->cx = cx;
148 s->type = type;
149 s->name = cx18_stream_info[type].name;
150
151 /* Check whether the radio is supported */
152 if (type == CX18_ENC_STREAM_TYPE_RAD && !(cap & V4L2_CAP_RADIO))
153 return 0;
154
155 /* Check whether VBI is supported */
156 if (type == CX18_ENC_STREAM_TYPE_VBI &&
157 !(cap & (V4L2_CAP_VBI_CAPTURE | V4L2_CAP_SLICED_VBI_CAPTURE)))
158 return 0;
159
1c1e45d1
HV
160 /* User explicitly selected 0 buffers for these streams, so don't
161 create them. */
162 if (cx18_stream_info[type].dma != PCI_DMA_NONE &&
6ecd86dc 163 cx->stream_buffers[type] == 0) {
1c1e45d1
HV
164 CX18_INFO("Disabled %s device\n", cx18_stream_info[type].name);
165 return 0;
166 }
167
168 cx18_stream_init(cx, type);
169
dd89601d 170 if (num_offset == -1)
1c1e45d1
HV
171 return 0;
172
173 /* allocate and initialize the v4l2 video device structure */
3d05913d
AW
174 s->video_dev = video_device_alloc();
175 if (s->video_dev == NULL) {
1c1e45d1
HV
176 CX18_ERR("Couldn't allocate v4l2 video_device for %s\n",
177 s->name);
178 return -ENOMEM;
179 }
180
5811cf99
AW
181 snprintf(s->video_dev->name, sizeof(s->video_dev->name), "%s %s",
182 cx->v4l2_dev.name, s->name);
1c1e45d1 183
3d05913d 184 s->video_dev->num = num;
5811cf99 185 s->video_dev->v4l2_dev = &cx->v4l2_dev;
3d05913d
AW
186 s->video_dev->fops = &cx18_v4l2_enc_fops;
187 s->video_dev->release = video_device_release;
188 s->video_dev->tvnorms = V4L2_STD_ALL;
189 cx18_set_funcs(s->video_dev);
1c1e45d1
HV
190 return 0;
191}
192
193/* Initialize v4l2 variables and register v4l2 devices */
194int cx18_streams_setup(struct cx18 *cx)
195{
9b4a7c8a 196 int type, ret;
1c1e45d1
HV
197
198 /* Setup V4L2 Devices */
199 for (type = 0; type < CX18_MAX_STREAMS; type++) {
200 /* Prepare device */
9b4a7c8a
AW
201 ret = cx18_prep_dev(cx, type);
202 if (ret < 0)
1c1e45d1
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203 break;
204
205 /* Allocate Stream */
9b4a7c8a
AW
206 ret = cx18_stream_alloc(&cx->streams[type]);
207 if (ret < 0)
1c1e45d1
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208 break;
209 }
210 if (type == CX18_MAX_STREAMS)
211 return 0;
212
213 /* One or more streams could not be initialized. Clean 'em all up. */
3f98387e 214 cx18_streams_cleanup(cx, 0);
9b4a7c8a 215 return ret;
1c1e45d1
HV
216}
217
218static int cx18_reg_dev(struct cx18 *cx, int type)
219{
220 struct cx18_stream *s = &cx->streams[type];
221 int vfl_type = cx18_stream_info[type].vfl_type;
38c7c036 222 const char *name;
9b4a7c8a 223 int num, ret;
1c1e45d1
HV
224
225 /* TODO: Shouldn't this be a VFL_TYPE_TRANSPORT or something?
226 * We need a VFL_TYPE_TS defined.
227 */
228 if (strcmp("TS", s->name) == 0) {
229 /* just return if no DVB is supported */
230 if ((cx->card->hw_all & CX18_HW_DVB) == 0)
231 return 0;
9b4a7c8a
AW
232 ret = cx18_dvb_register(s);
233 if (ret < 0) {
1c1e45d1 234 CX18_ERR("DVB failed to register\n");
9b4a7c8a 235 return ret;
1c1e45d1
HV
236 }
237 }
238
3d05913d 239 if (s->video_dev == NULL)
1c1e45d1
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240 return 0;
241
3d05913d 242 num = s->video_dev->num;
dd89601d
HV
243 /* card number + user defined offset + device offset */
244 if (type != CX18_ENC_STREAM_TYPE_MPG) {
245 struct cx18_stream *s_mpg = &cx->streams[CX18_ENC_STREAM_TYPE_MPG];
246
3d05913d
AW
247 if (s_mpg->video_dev)
248 num = s_mpg->video_dev->num
249 + cx18_stream_info[type].num_offset;
dd89601d 250 }
5811cf99 251 video_set_drvdata(s->video_dev, s);
1c1e45d1
HV
252
253 /* Register device. First try the desired minor, then any free one. */
6b5270d2 254 ret = video_register_device_no_warn(s->video_dev, vfl_type, num);
9b4a7c8a 255 if (ret < 0) {
581644d9 256 CX18_ERR("Couldn't register v4l2 device for %s (device node number %d)\n",
dd89601d 257 s->name, num);
3d05913d
AW
258 video_device_release(s->video_dev);
259 s->video_dev = NULL;
9b4a7c8a 260 return ret;
1c1e45d1 261 }
38c7c036
LP
262
263 name = video_device_node_name(s->video_dev);
1c1e45d1
HV
264
265 switch (vfl_type) {
266 case VFL_TYPE_GRABBER:
38c7c036
LP
267 CX18_INFO("Registered device %s for %s (%d x %d.%02d kB)\n",
268 name, s->name, cx->stream_buffers[type],
22dce188
AW
269 cx->stream_buf_size[type] / 1024,
270 (cx->stream_buf_size[type] * 100 / 1024) % 100);
1c1e45d1
HV
271 break;
272
273 case VFL_TYPE_RADIO:
38c7c036 274 CX18_INFO("Registered device %s for %s\n", name, s->name);
1c1e45d1
HV
275 break;
276
277 case VFL_TYPE_VBI:
6ecd86dc 278 if (cx->stream_buffers[type])
38c7c036 279 CX18_INFO("Registered device %s for %s "
6ecd86dc 280 "(%d x %d bytes)\n",
38c7c036 281 name, s->name, cx->stream_buffers[type],
6ecd86dc 282 cx->stream_buf_size[type]);
1c1e45d1 283 else
38c7c036
LP
284 CX18_INFO("Registered device %s for %s\n",
285 name, s->name);
1c1e45d1
HV
286 break;
287 }
288
289 return 0;
290}
291
292/* Register v4l2 devices */
293int cx18_streams_register(struct cx18 *cx)
294{
295 int type;
9b4a7c8a
AW
296 int err;
297 int ret = 0;
1c1e45d1
HV
298
299 /* Register V4L2 devices */
9b4a7c8a
AW
300 for (type = 0; type < CX18_MAX_STREAMS; type++) {
301 err = cx18_reg_dev(cx, type);
302 if (err && ret == 0)
303 ret = err;
304 }
1c1e45d1 305
9b4a7c8a 306 if (ret == 0)
1c1e45d1
HV
307 return 0;
308
309 /* One or more streams could not be initialized. Clean 'em all up. */
3f98387e 310 cx18_streams_cleanup(cx, 1);
9b4a7c8a 311 return ret;
1c1e45d1
HV
312}
313
314/* Unregister v4l2 devices */
3f98387e 315void cx18_streams_cleanup(struct cx18 *cx, int unregister)
1c1e45d1
HV
316{
317 struct video_device *vdev;
318 int type;
319
320 /* Teardown all streams */
321 for (type = 0; type < CX18_MAX_STREAMS; type++) {
fac3639d 322 if (cx->streams[type].dvb.enabled) {
1c1e45d1 323 cx18_dvb_unregister(&cx->streams[type]);
fac3639d
HV
324 cx->streams[type].dvb.enabled = false;
325 }
1c1e45d1 326
3d05913d 327 vdev = cx->streams[type].video_dev;
1c1e45d1 328
3d05913d 329 cx->streams[type].video_dev = NULL;
1c1e45d1
HV
330 if (vdev == NULL)
331 continue;
332
333 cx18_stream_free(&cx->streams[type]);
334
3f98387e
HV
335 /* Unregister or release device */
336 if (unregister)
337 video_unregister_device(vdev);
338 else
339 video_device_release(vdev);
1c1e45d1
HV
340 }
341}
342
343static void cx18_vbi_setup(struct cx18_stream *s)
344{
345 struct cx18 *cx = s->cx;
dd073434 346 int raw = cx18_raw_vbi(cx);
1c1e45d1
HV
347 u32 data[CX2341X_MBOX_MAX_DATA];
348 int lines;
349
350 if (cx->is_60hz) {
351 cx->vbi.count = 12;
352 cx->vbi.start[0] = 10;
353 cx->vbi.start[1] = 273;
354 } else { /* PAL/SECAM */
355 cx->vbi.count = 18;
356 cx->vbi.start[0] = 6;
357 cx->vbi.start[1] = 318;
358 }
359
360 /* setup VBI registers */
fa3e7036 361 v4l2_subdev_call(cx->sd_av, video, s_fmt, &cx->vbi.in);
1c1e45d1 362
dcc0ef88
AW
363 /*
364 * Send the CX18_CPU_SET_RAW_VBI_PARAM API command to setup Encoder Raw
365 * VBI when the first analog capture channel starts, as once it starts
366 * (e.g. MPEG), we can't effect any change in the Encoder Raw VBI setup
367 * (i.e. for the VBI capture channels). We also send it for each
368 * analog capture channel anyway just to make sure we get the proper
369 * behavior
370 */
1c1e45d1
HV
371 if (raw) {
372 lines = cx->vbi.count * 2;
373 } else {
812b1f9d
AW
374 /*
375 * For 525/60 systems, according to the VIP 2 & BT.656 std:
376 * The EAV RP code's Field bit toggles on line 4, a few lines
377 * after the Vertcal Blank bit has already toggled.
378 * Tell the encoder to capture 21-4+1=18 lines per field,
379 * since we want lines 10 through 21.
380 *
5ab74052
AW
381 * For 625/50 systems, according to the VIP 2 & BT.656 std:
382 * The EAV RP code's Field bit toggles on line 1, a few lines
383 * after the Vertcal Blank bit has already toggled.
929a3ad1
AW
384 * (We've actually set the digitizer so that the Field bit
385 * toggles on line 2.) Tell the encoder to capture 23-2+1=22
386 * lines per field, since we want lines 6 through 23.
812b1f9d 387 */
929a3ad1 388 lines = cx->is_60hz ? (21 - 4 + 1) * 2 : (23 - 2 + 1) * 2;
1c1e45d1
HV
389 }
390
1c1e45d1
HV
391 data[0] = s->handle;
392 /* Lines per field */
393 data[1] = (lines / 2) | ((lines / 2) << 16);
394 /* bytes per line */
302df970
AW
395 data[2] = (raw ? vbi_active_samples
396 : (cx->is_60hz ? vbi_hblank_samples_60Hz
397 : vbi_hblank_samples_50Hz));
1c1e45d1
HV
398 /* Every X number of frames a VBI interrupt arrives
399 (frames as in 25 or 30 fps) */
400 data[3] = 1;
302df970
AW
401 /*
402 * Set the SAV/EAV RP codes to look for as start/stop points
403 * when in VIP-1.1 mode
404 */
1c1e45d1 405 if (raw) {
302df970
AW
406 /*
407 * Start codes for beginning of "active" line in vertical blank
408 * 0x20 ( VerticalBlank )
409 * 0x60 ( EvenField VerticalBlank )
410 */
1c1e45d1 411 data[4] = 0x20602060;
302df970
AW
412 /*
413 * End codes for end of "active" raw lines and regular lines
414 * 0x30 ( VerticalBlank HorizontalBlank)
415 * 0x70 ( EvenField VerticalBlank HorizontalBlank)
416 * 0x90 (Task HorizontalBlank)
417 * 0xd0 (Task EvenField HorizontalBlank)
418 */
af009cf6 419 data[5] = 0x307090d0;
1c1e45d1 420 } else {
302df970
AW
421 /*
422 * End codes for active video, we want data in the hblank region
423 * 0xb0 (Task 0 VerticalBlank HorizontalBlank)
424 * 0xf0 (Task EvenField VerticalBlank HorizontalBlank)
425 *
426 * Since the V bit is only allowed to toggle in the EAV RP code,
427 * just before the first active region line, these two
812b1f9d 428 * are problematic:
302df970
AW
429 * 0x90 (Task HorizontalBlank)
430 * 0xd0 (Task EvenField HorizontalBlank)
812b1f9d 431 *
af7c58b1
AW
432 * We have set the digitzer such that we don't have to worry
433 * about these problem codes.
302df970 434 */
1c1e45d1 435 data[4] = 0xB0F0B0F0;
302df970
AW
436 /*
437 * Start codes for beginning of active line in vertical blank
438 * 0xa0 (Task VerticalBlank )
439 * 0xe0 (Task EvenField VerticalBlank )
440 */
1c1e45d1
HV
441 data[5] = 0xA0E0A0E0;
442 }
443
444 CX18_DEBUG_INFO("Setup VBI h: %d lines %x bpl %d fr %d %x %x\n",
445 data[0], data[1], data[2], data[3], data[4], data[5]);
446
dcc0ef88 447 cx18_api(cx, CX18_CPU_SET_RAW_VBI_PARAM, 6, data);
1c1e45d1
HV
448}
449
87116159 450static
52fcb3ec
AW
451struct cx18_queue *_cx18_stream_put_mdl_fw(struct cx18_stream *s,
452 struct cx18_mdl *mdl)
66c2a6b0
AW
453{
454 struct cx18 *cx = s->cx;
455 struct cx18_queue *q;
456
457 /* Don't give it to the firmware, if we're not running a capture */
458 if (s->handle == CX18_INVALID_TASK_HANDLE ||
87116159 459 test_bit(CX18_F_S_STOPPING, &s->s_flags) ||
66c2a6b0 460 !test_bit(CX18_F_S_STREAMING, &s->s_flags))
52fcb3ec 461 return cx18_enqueue(s, mdl, &s->q_free);
66c2a6b0 462
52fcb3ec 463 q = cx18_enqueue(s, mdl, &s->q_busy);
66c2a6b0 464 if (q != &s->q_busy)
52fcb3ec 465 return q; /* The firmware has the max MDLs it can handle */
66c2a6b0 466
52fcb3ec 467 cx18_mdl_sync_for_device(s, mdl);
66c2a6b0 468 cx18_vapi(cx, CX18_CPU_DE_SET_MDL, 5, s->handle,
52fcb3ec
AW
469 (void __iomem *) &cx->scb->cpu_mdl[mdl->id] - cx->enc_mem,
470 s->bufs_per_mdl, mdl->id, s->mdl_size);
66c2a6b0
AW
471 return q;
472}
473
87116159
AW
474static
475void _cx18_stream_load_fw_queue(struct cx18_stream *s)
66c2a6b0 476{
abb096de 477 struct cx18_queue *q;
52fcb3ec 478 struct cx18_mdl *mdl;
66c2a6b0 479
c37b11bf
AW
480 if (atomic_read(&s->q_free.depth) == 0 ||
481 atomic_read(&s->q_busy.depth) >= CX18_MAX_FW_MDLS_PER_STREAM)
abb096de
AW
482 return;
483
484 /* Move from q_free to q_busy notifying the firmware, until the limit */
485 do {
52fcb3ec
AW
486 mdl = cx18_dequeue(s, &s->q_free);
487 if (mdl == NULL)
abb096de 488 break;
52fcb3ec 489 q = _cx18_stream_put_mdl_fw(s, mdl);
c37b11bf 490 } while (atomic_read(&s->q_busy.depth) < CX18_MAX_FW_MDLS_PER_STREAM
0ef02892 491 && q == &s->q_busy);
66c2a6b0
AW
492}
493
87116159
AW
494void cx18_out_work_handler(struct work_struct *work)
495{
21a278b8
AW
496 struct cx18_stream *s =
497 container_of(work, struct cx18_stream, out_work_order);
87116159 498
21a278b8 499 _cx18_stream_load_fw_queue(s);
87116159
AW
500}
501
52fcb3ec
AW
502static void cx18_stream_configure_mdls(struct cx18_stream *s)
503{
504 cx18_unload_queues(s);
505
22dce188
AW
506 switch (s->type) {
507 case CX18_ENC_STREAM_TYPE_YUV:
508 /*
509 * Height should be a multiple of 32 lines.
510 * Set the MDL size to the exact size needed for one frame.
511 * Use enough buffers per MDL to cover the MDL size
512 */
513 s->mdl_size = 720 * s->cx->params.height * 3 / 2;
514 s->bufs_per_mdl = s->mdl_size / s->buf_size;
515 if (s->mdl_size % s->buf_size)
516 s->bufs_per_mdl++;
517 break;
127ce5f0
AW
518 case CX18_ENC_STREAM_TYPE_VBI:
519 s->bufs_per_mdl = 1;
520 if (cx18_raw_vbi(s->cx)) {
521 s->mdl_size = (s->cx->is_60hz ? 12 : 18)
522 * 2 * vbi_active_samples;
523 } else {
524 /*
525 * See comment in cx18_vbi_setup() below about the
526 * extra lines we capture in sliced VBI mode due to
527 * the lines on which EAV RP codes toggle.
528 */
529 s->mdl_size = s->cx->is_60hz
530 ? (21 - 4 + 1) * 2 * vbi_hblank_samples_60Hz
531 : (23 - 2 + 1) * 2 * vbi_hblank_samples_50Hz;
532 }
533 break;
22dce188
AW
534 default:
535 s->bufs_per_mdl = 1;
536 s->mdl_size = s->buf_size * s->bufs_per_mdl;
537 break;
538 }
52fcb3ec
AW
539
540 cx18_load_queues(s);
541}
542
1c1e45d1
HV
543int cx18_start_v4l2_encode_stream(struct cx18_stream *s)
544{
545 u32 data[MAX_MB_ARGUMENTS];
546 struct cx18 *cx = s->cx;
1c1e45d1 547 int captype = 0;
dcc0ef88 548 struct cx18_api_func_private priv;
1c1e45d1 549
3d05913d 550 if (s->video_dev == NULL && s->dvb.enabled == 0)
1c1e45d1
HV
551 return -EINVAL;
552
553 CX18_DEBUG_INFO("Start encoder stream %s\n", s->name);
554
555 switch (s->type) {
556 case CX18_ENC_STREAM_TYPE_MPG:
557 captype = CAPTURE_CHANNEL_TYPE_MPEG;
558 cx->mpg_data_received = cx->vbi_data_inserted = 0;
559 cx->dualwatch_jiffies = jiffies;
560 cx->dualwatch_stereo_mode = cx->params.audio_properties & 0x300;
561 cx->search_pack_header = 0;
562 break;
563
564 case CX18_ENC_STREAM_TYPE_TS:
565 captype = CAPTURE_CHANNEL_TYPE_TS;
1c1e45d1
HV
566 break;
567 case CX18_ENC_STREAM_TYPE_YUV:
568 captype = CAPTURE_CHANNEL_TYPE_YUV;
569 break;
570 case CX18_ENC_STREAM_TYPE_PCM:
571 captype = CAPTURE_CHANNEL_TYPE_PCM;
572 break;
573 case CX18_ENC_STREAM_TYPE_VBI:
dcc0ef88 574#ifdef CX18_ENCODER_PARSES_SLICED
dd073434
AW
575 captype = cx18_raw_vbi(cx) ?
576 CAPTURE_CHANNEL_TYPE_VBI : CAPTURE_CHANNEL_TYPE_SLICED_VBI;
dcc0ef88
AW
577#else
578 /*
579 * Currently we set things up so that Sliced VBI from the
580 * digitizer is handled as Raw VBI by the encoder
581 */
582 captype = CAPTURE_CHANNEL_TYPE_VBI;
583#endif
1c1e45d1
HV
584 cx->vbi.frame = 0;
585 cx->vbi.inserted_frame = 0;
586 memset(cx->vbi.sliced_mpeg_size,
587 0, sizeof(cx->vbi.sliced_mpeg_size));
588 break;
589 default:
590 return -EINVAL;
591 }
1c1e45d1 592
1c1e45d1
HV
593 /* Clear Streamoff flags in case left from last capture */
594 clear_bit(CX18_F_S_STREAMOFF, &s->s_flags);
595
596 cx18_vapi_result(cx, data, CX18_CREATE_TASK, 1, CPU_CMD_MASK_CAPTURE);
597 s->handle = data[0];
598 cx18_vapi(cx, CX18_CPU_SET_CHANNEL_TYPE, 2, s->handle, captype);
599
dcc0ef88
AW
600 /*
601 * For everything but CAPTURE_CHANNEL_TYPE_TS, play it safe and
602 * set up all the parameters, as it is not obvious which parameters the
603 * firmware shares across capture channel types and which it does not.
604 *
605 * Some of the cx18_vapi() calls below apply to only certain capture
606 * channel types. We're hoping there's no harm in calling most of them
607 * anyway, as long as the values are all consistent. Setting some
608 * shared parameters will have no effect once an analog capture channel
609 * has started streaming.
610 */
611 if (captype != CAPTURE_CHANNEL_TYPE_TS) {
1c1e45d1
HV
612 cx18_vapi(cx, CX18_CPU_SET_VER_CROP_LINE, 2, s->handle, 0);
613 cx18_vapi(cx, CX18_CPU_SET_MISC_PARAMETERS, 3, s->handle, 3, 1);
614 cx18_vapi(cx, CX18_CPU_SET_MISC_PARAMETERS, 3, s->handle, 8, 0);
615 cx18_vapi(cx, CX18_CPU_SET_MISC_PARAMETERS, 3, s->handle, 4, 1);
1c1e45d1 616
dcc0ef88
AW
617 /*
618 * Audio related reset according to
619 * Documentation/video4linux/cx2341x/fw-encoder-api.txt
620 */
621 if (atomic_read(&cx->ana_capturing) == 0)
622 cx18_vapi(cx, CX18_CPU_SET_MISC_PARAMETERS, 2,
623 s->handle, 12);
624
625 /*
626 * Number of lines for Field 1 & Field 2 according to
627 * Documentation/video4linux/cx2341x/fw-encoder-api.txt
f37aa511
AW
628 * Field 1 is 312 for 625 line systems in BT.656
629 * Field 2 is 313 for 625 line systems in BT.656
dcc0ef88 630 */
1c1e45d1 631 cx18_vapi(cx, CX18_CPU_SET_CAPTURE_LINE_NO, 3,
f37aa511 632 s->handle, 312, 313);
1c1e45d1 633
1c1e45d1
HV
634 if (cx->v4l2_cap & V4L2_CAP_VBI_CAPTURE)
635 cx18_vbi_setup(s);
636
dcc0ef88
AW
637 /*
638 * assign program index info.
639 * Mask 7: select I/P/B, Num_req: 400 max
640 * FIXME - currently we have this hardcoded as disabled
641 */
1c1e45d1
HV
642 cx18_vapi_result(cx, data, CX18_CPU_SET_INDEXTABLE, 1, 0);
643
dcc0ef88 644 /* Call out to the common CX2341x API setup for user controls */
50b86bac
AW
645 priv.cx = cx;
646 priv.s = s;
647 cx2341x_update(&priv, cx18_api_func, NULL, &cx->params);
dcc0ef88
AW
648
649 /*
650 * When starting a capture and we're set for radio,
651 * ensure the video is muted, despite the user control.
652 */
653 if (!cx->params.video_mute &&
654 test_bit(CX18_F_I_RADIO_USER, &cx->i_flags))
655 cx18_vapi(cx, CX18_CPU_SET_VIDEO_MUTE, 2, s->handle,
656 (cx->params.video_mute_yuv << 8) | 1);
1c1e45d1
HV
657 }
658
31554ae5 659 if (atomic_read(&cx->tot_capturing) == 0) {
1c1e45d1 660 clear_bit(CX18_F_I_EOS, &cx->i_flags);
b1526421 661 cx18_write_reg(cx, 7, CX18_DSP0_INTERRUPT_MASK);
1c1e45d1
HV
662 }
663
664 cx18_vapi(cx, CX18_CPU_DE_SET_MDL_ACK, 3, s->handle,
990c81c8
AV
665 (void __iomem *)&cx->scb->cpu_mdl_ack[s->type][0] - cx->enc_mem,
666 (void __iomem *)&cx->scb->cpu_mdl_ack[s->type][1] - cx->enc_mem);
1c1e45d1 667
66c2a6b0 668 /* Init all the cpu_mdls for this stream */
52fcb3ec 669 cx18_stream_configure_mdls(s);
87116159 670 _cx18_stream_load_fw_queue(s);
66c2a6b0 671
1c1e45d1
HV
672 /* begin_capture */
673 if (cx18_vapi(cx, CX18_CPU_CAPTURE_START, 1, s->handle)) {
674 CX18_DEBUG_WARN("Error starting capture!\n");
3b5df8ea 675 /* Ensure we're really not capturing before releasing MDLs */
87116159 676 set_bit(CX18_F_S_STOPPING, &s->s_flags);
3b5df8ea
AW
677 if (s->type == CX18_ENC_STREAM_TYPE_MPG)
678 cx18_vapi(cx, CX18_CPU_CAPTURE_STOP, 2, s->handle, 1);
679 else
680 cx18_vapi(cx, CX18_CPU_CAPTURE_STOP, 1, s->handle);
66c2a6b0
AW
681 clear_bit(CX18_F_S_STREAMING, &s->s_flags);
682 /* FIXME - CX18_F_S_STREAMOFF as well? */
3b5df8ea 683 cx18_vapi(cx, CX18_CPU_DE_RELEASE_MDL, 1, s->handle);
1c1e45d1 684 cx18_vapi(cx, CX18_DESTROY_TASK, 1, s->handle);
66c2a6b0 685 s->handle = CX18_INVALID_TASK_HANDLE;
87116159 686 clear_bit(CX18_F_S_STOPPING, &s->s_flags);
66c2a6b0
AW
687 if (atomic_read(&cx->tot_capturing) == 0) {
688 set_bit(CX18_F_I_EOS, &cx->i_flags);
689 cx18_write_reg(cx, 5, CX18_DSP0_INTERRUPT_MASK);
690 }
1c1e45d1
HV
691 return -EINVAL;
692 }
693
694 /* you're live! sit back and await interrupts :) */
dcc0ef88 695 if (captype != CAPTURE_CHANNEL_TYPE_TS)
31554ae5
HV
696 atomic_inc(&cx->ana_capturing);
697 atomic_inc(&cx->tot_capturing);
1c1e45d1
HV
698 return 0;
699}
700
701void cx18_stop_all_captures(struct cx18 *cx)
702{
703 int i;
704
705 for (i = CX18_MAX_STREAMS - 1; i >= 0; i--) {
706 struct cx18_stream *s = &cx->streams[i];
707
3d05913d 708 if (s->video_dev == NULL && s->dvb.enabled == 0)
1c1e45d1
HV
709 continue;
710 if (test_bit(CX18_F_S_STREAMING, &s->s_flags))
711 cx18_stop_v4l2_encode_stream(s, 0);
712 }
713}
714
715int cx18_stop_v4l2_encode_stream(struct cx18_stream *s, int gop_end)
716{
717 struct cx18 *cx = s->cx;
718 unsigned long then;
719
3d05913d 720 if (s->video_dev == NULL && s->dvb.enabled == 0)
1c1e45d1
HV
721 return -EINVAL;
722
723 /* This function assumes that you are allowed to stop the capture
724 and that we are actually capturing */
725
726 CX18_DEBUG_INFO("Stop Capture\n");
727
31554ae5 728 if (atomic_read(&cx->tot_capturing) == 0)
1c1e45d1
HV
729 return 0;
730
87116159 731 set_bit(CX18_F_S_STOPPING, &s->s_flags);
1c1e45d1
HV
732 if (s->type == CX18_ENC_STREAM_TYPE_MPG)
733 cx18_vapi(cx, CX18_CPU_CAPTURE_STOP, 2, s->handle, !gop_end);
734 else
735 cx18_vapi(cx, CX18_CPU_CAPTURE_STOP, 1, s->handle);
736
737 then = jiffies;
738
739 if (s->type == CX18_ENC_STREAM_TYPE_MPG && gop_end) {
740 CX18_INFO("ignoring gop_end: not (yet?) supported by the firmware\n");
741 }
742
31554ae5
HV
743 if (s->type != CX18_ENC_STREAM_TYPE_TS)
744 atomic_dec(&cx->ana_capturing);
745 atomic_dec(&cx->tot_capturing);
1c1e45d1
HV
746
747 /* Clear capture and no-read bits */
748 clear_bit(CX18_F_S_STREAMING, &s->s_flags);
749
f68d0cf5
AW
750 /* Tell the CX23418 it can't use our buffers anymore */
751 cx18_vapi(cx, CX18_CPU_DE_RELEASE_MDL, 1, s->handle);
752
1c1e45d1 753 cx18_vapi(cx, CX18_DESTROY_TASK, 1, s->handle);
d3c5e707 754 s->handle = CX18_INVALID_TASK_HANDLE;
87116159 755 clear_bit(CX18_F_S_STOPPING, &s->s_flags);
1c1e45d1 756
31554ae5 757 if (atomic_read(&cx->tot_capturing) > 0)
1c1e45d1
HV
758 return 0;
759
b1526421 760 cx18_write_reg(cx, 5, CX18_DSP0_INTERRUPT_MASK);
1c1e45d1
HV
761 wake_up(&s->waitq);
762
763 return 0;
764}
765
766u32 cx18_find_handle(struct cx18 *cx)
767{
768 int i;
769
770 /* find first available handle to be used for global settings */
771 for (i = 0; i < CX18_MAX_STREAMS; i++) {
772 struct cx18_stream *s = &cx->streams[i];
773
3d05913d 774 if (s->video_dev && (s->handle != CX18_INVALID_TASK_HANDLE))
1c1e45d1
HV
775 return s->handle;
776 }
d3c5e707 777 return CX18_INVALID_TASK_HANDLE;
1c1e45d1 778}
ee2d64f5
AW
779
780struct cx18_stream *cx18_handle_to_stream(struct cx18 *cx, u32 handle)
781{
782 int i;
783 struct cx18_stream *s;
784
785 if (handle == CX18_INVALID_TASK_HANDLE)
786 return NULL;
787
788 for (i = 0; i < CX18_MAX_STREAMS; i++) {
789 s = &cx->streams[i];
790 if (s->handle != handle)
791 continue;
3d05913d 792 if (s->video_dev || s->dvb.enabled)
ee2d64f5
AW
793 return s;
794 }
795 return NULL;
796}