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V4L/DVB (9926): em28xx: Fix a bug that were putting xc2028/3028 tuner to sleep
[mirror_ubuntu-artful-kernel.git] / drivers / media / video / em28xx / em28xx.h
CommitLineData
a6c2ba28 1/*
0e7072ef 2 em28xx.h - driver for Empia EM2800/EM2820/2840 USB video capture devices
a6c2ba28 3
4 Copyright (C) 2005 Markus Rechberger <mrechberger@gmail.com>
4ac97914 5 Ludovico Cavedon <cavedon@sssup.it>
2e7c6dc3 6 Mauro Carvalho Chehab <mchehab@infradead.org>
a6c2ba28 7
8 Based on the em2800 driver from Sascha Sommer <saschasommer@freenet.de>
9
10 This program is free software; you can redistribute it and/or modify
11 it under the terms of the GNU General Public License as published by
12 the Free Software Foundation; either version 2 of the License, or
13 (at your option) any later version.
14
15 This program is distributed in the hope that it will be useful,
16 but WITHOUT ANY WARRANTY; without even the implied warranty of
17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 GNU General Public License for more details.
19
20 You should have received a copy of the GNU General Public License
21 along with this program; if not, write to the Free Software
22 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
23 */
24
3acf2809
MCC		 25#ifndef _EM28XX_H
26#define _EM28XX_H
a6c2ba28 27
cb77d010 28#include <linux/videodev2.h>
ad0ebb96
MCC		 29#include <media/videobuf-vmalloc.h>
30
a6c2ba28 31#include <linux/i2c.h>
3593cab5 32#include <linux/mutex.h>
d5e52653 33#include <media/ir-kbd-i2c.h>
3aefb79a
MCC		 34#if defined(CONFIG_VIDEO_EM28XX_DVB) || defined(CONFIG_VIDEO_EM28XX_DVB_MODULE)
35#include <media/videobuf-dvb.h>
36#endif
3ca9c093 37#include "tuner-xc2028.h"
2ba890ec 38#include "em28xx-reg.h"
3aefb79a
MCC		 39
40/* Boards supported by driver */
41#define EM2800_BOARD_UNKNOWN 0
42#define EM2820_BOARD_UNKNOWN 1
43#define EM2820_BOARD_TERRATEC_CINERGY_250 2
44#define EM2820_BOARD_PINNACLE_USB_2 3
45#define EM2820_BOARD_HAUPPAUGE_WINTV_USB_2 4
46#define EM2820_BOARD_MSI_VOX_USB_2 5
47#define EM2800_BOARD_TERRATEC_CINERGY_200 6
48#define EM2800_BOARD_LEADTEK_WINFAST_USBII 7
49#define EM2800_BOARD_KWORLD_USB2800 8
50#define EM2820_BOARD_PINNACLE_DVC_90 9
51#define EM2880_BOARD_HAUPPAUGE_WINTV_HVR_900 10
52#define EM2880_BOARD_TERRATEC_HYBRID_XS 11
53#define EM2820_BOARD_KWORLD_PVRTV2800RF 12
54#define EM2880_BOARD_TERRATEC_PRODIGY_XS 13
55#define EM2820_BOARD_PROLINK_PLAYTV_USB2 14
56#define EM2800_BOARD_VGEAR_POCKETTV 15
10ac6603 57#define EM2883_BOARD_HAUPPAUGE_WINTV_HVR_950 16
4fd305b2 58#define EM2880_BOARD_PINNACLE_PCTV_HD_PRO 17
17d9d558 59#define EM2880_BOARD_HAUPPAUGE_WINTV_HVR_900_R2 18
a9fc52bc 60#define EM2860_BOARD_POINTNIX_INTRAORAL_CAMERA 19
e14b3658 61#define EM2880_BOARD_AMD_ATI_TV_WONDER_HD_600 20
59d07f1b 62#define EM2800_BOARD_GRABBEEX_USB2800 21
95b86a9a
DSL		 63#define EM2750_BOARD_UNKNOWN 22
64#define EM2750_BOARD_DLCW_130 23
65#define EM2820_BOARD_DLINK_USB_TV 24
66#define EM2820_BOARD_GADMEI_UTV310 25
67#define EM2820_BOARD_HERCULES_SMART_TV_USB2 26
68#define EM2820_BOARD_PINNACLE_USB_2_FM1216ME 27
69#define EM2820_BOARD_LEADTEK_WINFAST_USBII_DELUXE 28
70#define EM2820_BOARD_PINNACLE_DVC_100 29
71#define EM2820_BOARD_VIDEOLOGY_20K14XUSB 30
72#define EM2821_BOARD_USBGEAR_VD204 31
73#define EM2821_BOARD_SUPERCOMP_USB_2 32
74#define EM2821_BOARD_PROLINK_PLAYTV_USB2 33
75#define EM2860_BOARD_TERRATEC_HYBRID_XS 34
76#define EM2860_BOARD_TYPHOON_DVD_MAKER 35
77#define EM2860_BOARD_NETGMBH_CAM 36
78#define EM2860_BOARD_GADMEI_UTV330 37
79#define EM2861_BOARD_YAKUMO_MOVIE_MIXER 38
80#define EM2861_BOARD_KWORLD_PVRTV_300U 39
81#define EM2861_BOARD_PLEXTOR_PX_TV100U 40
82#define EM2870_BOARD_KWORLD_350U 41
83#define EM2870_BOARD_KWORLD_355U 42
84#define EM2870_BOARD_TERRATEC_XS 43
85#define EM2870_BOARD_TERRATEC_XS_MT2060 44
86#define EM2870_BOARD_PINNACLE_PCTV_DVB 45
87#define EM2870_BOARD_COMPRO_VIDEOMATE 46
88#define EM2880_BOARD_KWORLD_DVB_305U 47
89#define EM2880_BOARD_KWORLD_DVB_310U 48
90#define EM2880_BOARD_MSI_DIGIVOX_AD 49
91#define EM2880_BOARD_MSI_DIGIVOX_AD_II 50
92#define EM2880_BOARD_TERRATEC_HYBRID_XS_FR 51
93#define EM2881_BOARD_DNT_DA2_HYBRID 52
94#define EM2881_BOARD_PINNACLE_HYBRID_PRO 53
95#define EM2882_BOARD_KWORLD_VS_DVBT 54
96#define EM2882_BOARD_TERRATEC_HYBRID_XS 55
97#define EM2882_BOARD_PINNACLE_HYBRID_PRO 56
98#define EM2883_BOARD_KWORLD_HYBRID_A316 57
ee281b85 99#define EM2820_BOARD_COMPRO_VIDEOMATE_FORYOU 58
864ec0b7 100#define EM2874_BOARD_PINNACLE_PCTV_80E 59
f89bc329 101#define EM2883_BOARD_HAUPPAUGE_WINTV_HVR_850 60
3aefb79a
MCC		 102
103/* Limits minimum and default number of buffers */
104#define EM28XX_MIN_BUF 4
105#define EM28XX_DEF_BUF 8
a6c2ba28 106
c4a98793
MCC		 107/*Limits the max URB message size */
108#define URB_MAX_CTRL_SIZE 80
109
95b86a9a
DSL		 110/* Params for validated field */
111#define EM28XX_BOARD_NOT_VALIDATED 1
112#define EM28XX_BOARD_VALIDATED 0
113
596d92d5 114/* maximum number of em28xx boards */
3687e1e6 115#define EM28XX_MAXBOARDS 4 /*FIXME: should be bigger */
596d92d5 116
a6c2ba28 117/* maximum number of frames that can be queued */
3acf2809 118#define EM28XX_NUM_FRAMES 5
a6c2ba28 119/* number of frames that get used for v4l2_read() */
3acf2809 120#define EM28XX_NUM_READ_FRAMES 2
a6c2ba28 121
122/* number of buffers for isoc transfers */
3acf2809 123#define EM28XX_NUM_BUFS 5
a6c2ba28 124
d5e52653
MCC		 125/* number of packets for each buffer
126 windows requests only 40 packets .. so we better do the same
127 this is what I found out for all alternate numbers there!
128 */
3acf2809 129#define EM28XX_NUM_PACKETS 40
a6c2ba28 130
a6c2ba28 131/* default alternate; 0 means choose the best */
3acf2809 132#define EM28XX_PINOUT 0
a6c2ba28 133
3acf2809 134#define EM28XX_INTERLACED_DEFAULT 1
a6c2ba28 135
136/*
137#define (use usbview if you want to get the other alternate number infos)
138#define
139#define alternate number 2
140#define Endpoint Address: 82
141 Direction: in
142 Attribute: 1
143 Type: Isoc
144 Max Packet Size: 1448
145 Interval: 125us
146
147 alternate number 7
148
149 Endpoint Address: 82
150 Direction: in
151 Attribute: 1
152 Type: Isoc
153 Max Packet Size: 3072
154 Interval: 125us
155*/
156
157/* time to wait when stopping the isoc transfer */
3acf2809 158#define EM28XX_URB_TIMEOUT msecs_to_jiffies(EM28XX_NUM_BUFS * EM28XX_NUM_PACKETS)
a6c2ba28 159
596d92d5
MCC		 160/* time in msecs to wait for i2c writes to finish */
161#define EM2800_I2C_WRITE_TIMEOUT 20
162
3aefb79a 163enum em28xx_mode {
2fe3e2ee 164 EM28XX_SUSPEND,
3aefb79a
MCC		 165 EM28XX_ANALOG_MODE,
166 EM28XX_DIGITAL_MODE,
167};
168
3acf2809 169enum em28xx_stream_state {
a6c2ba28 170 STREAM_OFF,
171 STREAM_INTERRUPT,
172 STREAM_ON,
173};
174
579f72e4
AT		 175struct em28xx;
176
ad0ebb96
MCC		 177struct em28xx_usb_isoc_ctl {
178 /* max packet size of isoc transaction */
179 int max_pkt_size;
180
181 /* number of allocated urbs */
182 int num_bufs;
183
184 /* urb for isoc transfers */
185 struct urb **urb;
186
187 /* transfer buffers for isoc transfer */
188 char **transfer_buffer;
189
190 /* Last buffer command and region */
191 u8 cmd;
192 int pos, size, pktsize;
193
194 /* Last field: ODD or EVEN? */
195 int field;
196
197 /* Stores incomplete commands */
198 u32 tmp_buf;
199 int tmp_buf_len;
200
201 /* Stores already requested buffers */
202 struct em28xx_buffer *buf;
203
204 /* Stores the number of received fields */
205 int nfields;
579f72e4
AT		 206
207 /* isoc urb callback */
208 int (*isoc_copy) (struct em28xx *dev, struct urb *urb);
209
ad0ebb96
MCC		 210};
211
212struct em28xx_fmt {
213 char *name;
214 u32 fourcc; /* v4l2 format id */
215};
216
217/* buffer for one video frame */
218struct em28xx_buffer {
219 /* common v4l buffer stuff -- must be first */
220 struct videobuf_buffer vb;
221
a6c2ba28 222 struct list_head frame;
a6c2ba28 223 int top_field;
ad0ebb96
MCC		 224 int receiving;
225};
226
227struct em28xx_dmaqueue {
228 struct list_head active;
229 struct list_head queued;
ad0ebb96
MCC		 230
231 wait_queue_head_t wq;
232
233 /* Counters to control buffer fill */
234 int pos;
a6c2ba28 235};
236
237/* io methods */
3acf2809 238enum em28xx_io_method {
a6c2ba28 239 IO_NONE,
240 IO_READ,
241 IO_MMAP,
242};
243
244/* inputs */
245
3acf2809
MCC		 246#define MAX_EM28XX_INPUT 4
247enum enum28xx_itype {
248 EM28XX_VMUX_COMPOSITE1 = 1,
249 EM28XX_VMUX_COMPOSITE2,
250 EM28XX_VMUX_COMPOSITE3,
251 EM28XX_VMUX_COMPOSITE4,
252 EM28XX_VMUX_SVIDEO,
253 EM28XX_VMUX_TELEVISION,
254 EM28XX_VMUX_CABLE,
255 EM28XX_VMUX_DVB,
256 EM28XX_VMUX_DEBUG,
257 EM28XX_RADIO,
a6c2ba28 258};
259
35643943
MCC		 260enum em28xx_ac97_mode {
261 EM28XX_NO_AC97 = 0,
262 EM28XX_AC97_EM202,
209acc02 263 EM28XX_AC97_SIGMATEL,
35643943
MCC		 264 EM28XX_AC97_OTHER,
265};
266
267struct em28xx_audio_mode {
268 enum em28xx_ac97_mode ac97;
269
270 u16 ac97_feat;
16c7bcad 271 u32 ac97_vendor_id;
35643943
MCC		 272
273 unsigned int has_audio:1;
274
275 unsigned int i2s_3rates:1;
276 unsigned int i2s_5rates:1;
5c2231c8
DH		 277};
278
5faff789
MCC		 279/* em28xx has two audio inputs: tuner and line in.
280 However, on most devices, an auxiliary AC97 codec device is used.
281 The AC97 device may have several different inputs and outputs,
282 depending on their model. So, it is possible to use AC97 mixer to
283 address more than two different entries.
284 */
539c96d0 285enum em28xx_amux {
5faff789
MCC		 286 /* This is the only entry for em28xx tuner input */
287 EM28XX_AMUX_VIDEO, /* em28xx tuner, AC97 mixer Video */
288
289 EM28XX_AMUX_LINE_IN, /* AC97 mixer Line In */
290
291 /* Some less-common mixer setups */
292 EM28XX_AMUX_VIDEO2, /* em28xx Line in, AC97 mixer Video */
293 EM28XX_AMUX_PHONE,
294 EM28XX_AMUX_MIC,
295 EM28XX_AMUX_CD,
296 EM28XX_AMUX_AUX,
297 EM28XX_AMUX_PCM_OUT,
539c96d0
MCC		 298};
299
35ae6f04 300enum em28xx_aout {
e879b8eb
MCC		 301 EM28XX_AOUT_MASTER = 1 << 0,
302 EM28XX_AOUT_LINE = 1 << 1,
303 EM28XX_AOUT_MONO = 1 << 2,
304 EM28XX_AOUT_LFE = 1 << 3,
305 EM28XX_AOUT_SURR = 1 << 4,
35ae6f04
MCC		 306};
307
122b77e5
MCC		 308struct em28xx_reg_seq {
309 int reg;
310 unsigned char val, mask;
311 int sleep;
312};
313
3acf2809
MCC		 314struct em28xx_input {
315 enum enum28xx_itype type;
a6c2ba28 316 unsigned int vmux;
539c96d0 317 enum em28xx_amux amux;
35ae6f04 318 enum em28xx_aout aout;
122b77e5 319 struct em28xx_reg_seq *gpio;
a6c2ba28 320};
321
3acf2809 322#define INPUT(nr) (&em28xx_boards[dev->model].input[nr])
a6c2ba28 323
3acf2809 324enum em28xx_decoder {
1ed1dd54 325 EM28XX_NODECODER,
3acf2809 326 EM28XX_TVP5150,
ec5de990 327 EM28XX_SAA711X,
a6c2ba28 328};
329
3acf2809 330struct em28xx_board {
a6c2ba28 331 char *name;
505b6d0b 332 int vchannels;
a6c2ba28 333 int tuner_type;
66767920 334 int tuner_addr;
a6c2ba28 335
336 /* i2c flags */
337 unsigned int tda9887_conf;
338
017ab4b1 339 /* GPIO sequences */
122b77e5 340 struct em28xx_reg_seq *dvb_gpio;
2fe3e2ee 341 struct em28xx_reg_seq *suspend_gpio;
017ab4b1 342 struct em28xx_reg_seq *tuner_gpio;
122b77e5 343
74f38a82 344 unsigned int is_em2800:1;
a6c2ba28 345 unsigned int has_msp34xx:1;
5add9a6f 346 unsigned int mts_firmware:1;
c8793b03 347 unsigned int max_range_640_480:1;
3aefb79a 348 unsigned int has_dvb:1;
a9fc52bc 349 unsigned int has_snapshot_button:1;
95b86a9a 350 unsigned int valid:1;
3abee53e 351
a2070c66
MCC		 352 unsigned char xclk, i2c_speed;
353
3acf2809 354 enum em28xx_decoder decoder;
a6c2ba28 355
3acf2809 356 struct em28xx_input input[MAX_EM28XX_INPUT];
0be43754 357 struct em28xx_input radio;
4b92253a 358 IR_KEYTAB_TYPE *ir_codes;
a6c2ba28 359};
360
3acf2809 361struct em28xx_eeprom {
a6c2ba28 362 u32 id; /* 0x9567eb1a */
363 u16 vendor_ID;
364 u16 product_ID;
365
366 u16 chip_conf;
367
368 u16 board_conf;
369
370 u16 string1, string2, string3;
371
372 u8 string_idx_table;
373};
374
375/* device states */
3acf2809 376enum em28xx_dev_state {
a6c2ba28 377 DEV_INITIALIZED = 0x01,
378 DEV_DISCONNECTED = 0x02,
379 DEV_MISCONFIGURED = 0x04,
380};
381
6d79468d
MCC		 382#define EM28XX_AUDIO_BUFS 5
383#define EM28XX_NUM_AUDIO_PACKETS 64
384#define EM28XX_AUDIO_MAX_PACKET_SIZE 196 /* static value */
385#define EM28XX_CAPTURE_STREAM_EN 1
3aefb79a
MCC		 386
387/* em28xx extensions */
6d79468d 388#define EM28XX_AUDIO 0x10
3aefb79a 389#define EM28XX_DVB 0x20
6d79468d
MCC		 390
391struct em28xx_audio {
392 char name[50];
393 char *transfer_buffer[EM28XX_AUDIO_BUFS];
394 struct urb *urb[EM28XX_AUDIO_BUFS];
395 struct usb_device *udev;
396 unsigned int capture_transfer_done;
397 struct snd_pcm_substream *capture_pcm_substream;
398
399 unsigned int hwptr_done_capture;
400 struct snd_card *sndcard;
401
402 int users, shutdown;
403 enum em28xx_stream_state capture_stream;
404 spinlock_t slock;
405};
406
52284c3e
MCC		 407struct em28xx;
408
409struct em28xx_fh {
410 struct em28xx *dev;
411 unsigned int stream_on:1; /* Locks streams */
412 int radio;
413
414 struct videobuf_queue vb_vidq;
415
416 enum v4l2_buf_type type;
417};
418
a6c2ba28 419/* main device struct */
3acf2809 420struct em28xx {
a6c2ba28 421 /* generic device properties */
422 char name[30]; /* name (including minor) of the device */
423 int model; /* index in the device_data struct */
e5589bef 424 int devno; /* marks the number of this device */
600bd7f0 425 enum em28xx_chip_id chip_id;
505b6d0b
MCC		 426
427 struct em28xx_board board;
428
a225452e 429 unsigned int stream_on:1; /* Locks streams */
d7448a8d 430 unsigned int has_audio_class:1;
24a613e4 431 unsigned int has_alsa_audio:1;
a2070c66 432
a924a499
MCC		 433 struct em28xx_IR *ir;
434
89b329ef
MCC		 435 /* Some older em28xx chips needs a waiting time after writing */
436 unsigned int wait_after_write;
437
74f38a82
MCC		 438 struct list_head devlist;
439
9bb13a6d
MCC		 440 u32 i2s_speed; /* I2S speed for audio digital stream */
441
35643943 442 struct em28xx_audio_mode audio_mode;
a6c2ba28 443
444 int tuner_type; /* type of the tuner */
445 int tuner_addr; /* tuner address */
446 int tda9887_conf;
447 /* i2c i/o */
448 struct i2c_adapter i2c_adap;
449 struct i2c_client i2c_client;
450 /* video for linux */
451 int users; /* user count for exclusive use */
452 struct video_device *vdev; /* video for linux device struct */
7d497f8a 453 v4l2_std_id norm; /* selected tv norm */
a6c2ba28 454 int ctl_freq; /* selected frequency */
455 unsigned int ctl_input; /* selected input */
95b86a9a 456 unsigned int ctl_ainput;/* selected audio input */
35ae6f04 457 unsigned int ctl_aoutput;/* selected audio output */
a6c2ba28 458 int mute;
459 int volume;
460 /* frame properties */
a6c2ba28 461 int width; /* current frame width */
462 int height; /* current frame height */
d45b9b8a
HV		 463 unsigned hscale; /* horizontal scale factor (see datasheet) */
464 unsigned vscale; /* vertical scale factor (see datasheet) */
a6c2ba28 465 int interlaced; /* 1=interlace fileds, 0=just top fileds */
9e31ced8 466 unsigned int video_bytesread; /* Number of bytes read */
a6c2ba28 467
03910cc3 468 unsigned long hash; /* eeprom hash - for boards with generic ID */
6ea54d93
DSL		 469 unsigned long i2c_hash; /* i2c devicelist hash -
470 for boards with generic ID */
03910cc3 471
6d79468d
MCC		 472 struct em28xx_audio *adev;
473
a6c2ba28 474 /* states */
3acf2809 475 enum em28xx_dev_state state;
3acf2809 476 enum em28xx_io_method io;
9e31ced8 477
d7448a8d
MCC		 478 struct work_struct request_module_wk;
479
a6c2ba28 480 /* locks */
5a80415b 481 struct mutex lock;
f2a2e491 482 struct mutex ctrl_urb_lock; /* protects urb_buf */
d7aa8020 483 /* spinlock_t queue_lock; */
a6c2ba28 484 struct list_head inqueue, outqueue;
485 wait_queue_head_t open, wait_frame, wait_stream;
486 struct video_device *vbi_dev;
0be43754 487 struct video_device *radio_dev;
a6c2ba28 488
489 unsigned char eedata[256];
490
ad0ebb96
MCC		 491 /* Isoc control struct */
492 struct em28xx_dmaqueue vidq;
493 struct em28xx_usb_isoc_ctl isoc_ctl;
494 spinlock_t slock;
495
a6c2ba28 496 /* usb transfer */
497 struct usb_device *udev; /* the usb device */
498 int alt; /* alternate */
499 int max_pkt_size; /* max packet size of isoc transaction */
9d4d9c05
MCC		 500 int num_alt; /* Number of alternative settings */
501 unsigned int *alt_max_pkt_size; /* array of wMaxPacketSize */
3acf2809
MCC		 502 struct urb *urb[EM28XX_NUM_BUFS]; /* urb for isoc transfers */
503 char *transfer_buffer[EM28XX_NUM_BUFS]; /* transfer buffers for isoc transfer */
c4a98793
MCC		 504 char urb_buf[URB_MAX_CTRL_SIZE]; /* urb control msg buffer */
505
a6c2ba28 506 /* helper funcs that call usb_control_msg */
6ea54d93 507 int (*em28xx_write_regs) (struct em28xx *dev, u16 reg,
a6c2ba28 508 char *buf, int len);
6ea54d93
DSL		 509 int (*em28xx_read_reg) (struct em28xx *dev, u16 reg);
510 int (*em28xx_read_reg_req_len) (struct em28xx *dev, u8 req, u16 reg,
511 char *buf, int len);
512 int (*em28xx_write_regs_req) (struct em28xx *dev, u8 req, u16 reg,
a6c2ba28 513 char *buf, int len);
6ea54d93 514 int (*em28xx_read_reg_req) (struct em28xx *dev, u8 req, u16 reg);
3aefb79a
MCC		 515
516 enum em28xx_mode mode;
517
6a1acc3b
DH		 518 /* register numbers for GPO/GPIO registers */
519 u16 reg_gpo_num, reg_gpio_num;
520
c67ec53f
MCC		 521 /* Caches GPO and GPIO registers */
522 unsigned char reg_gpo, reg_gpio;
523
a9fc52bc
DH		 524 /* Snapshot button */
525 char snapshot_button_path[30]; /* path of the input dev */
526 struct input_dev *sbutton_input_dev;
527 struct delayed_work sbutton_query_work;
528
3421b778 529 struct em28xx_dvb *dvb;
a6c2ba28 530};
531
6d79468d
MCC		 532struct em28xx_ops {
533 struct list_head next;
534 char *name;
535 int id;
536 int (*init)(struct em28xx *);
537 int (*fini)(struct em28xx *);
a3a048ce
MCC		 538};
539
3acf2809 540/* Provided by em28xx-i2c.c */
a6c2ba28 541
3acf2809 542void em28xx_i2c_call_clients(struct em28xx *dev, unsigned int cmd, void *arg);
fad7b958 543void em28xx_do_i2c_scan(struct em28xx *dev);
3acf2809
MCC		 544int em28xx_i2c_register(struct em28xx *dev);
545int em28xx_i2c_unregister(struct em28xx *dev);
a6c2ba28 546
3acf2809 547/* Provided by em28xx-core.c */
a6c2ba28 548
3acf2809
MCC		 549u32 em28xx_request_buffers(struct em28xx *dev, u32 count);
550void em28xx_queue_unusedframes(struct em28xx *dev);
551void em28xx_release_buffers(struct em28xx *dev);
a6c2ba28 552
3acf2809 553int em28xx_read_reg_req_len(struct em28xx *dev, u8 req, u16 reg,
a6c2ba28 554 char *buf, int len);
3acf2809
MCC		 555int em28xx_read_reg_req(struct em28xx *dev, u8 req, u16 reg);
556int em28xx_read_reg(struct em28xx *dev, u16 reg);
557int em28xx_write_regs_req(struct em28xx *dev, u8 req, u16 reg, char *buf,
a6c2ba28 558 int len);
3acf2809 559int em28xx_write_regs(struct em28xx *dev, u16 reg, char *buf, int len);
b6972489
DH		 560int em28xx_write_reg(struct em28xx *dev, u16 reg, u8 val);
561
3acf2809 562int em28xx_audio_analog_set(struct em28xx *dev);
35643943 563int em28xx_audio_setup(struct em28xx *dev);
539c96d0 564
3acf2809
MCC		 565int em28xx_colorlevels_set_default(struct em28xx *dev);
566int em28xx_capture_start(struct em28xx *dev, int start);
567int em28xx_outfmt_set_yuv422(struct em28xx *dev);
3acf2809 568int em28xx_resolution_set(struct em28xx *dev);
3acf2809 569int em28xx_set_alternate(struct em28xx *dev);
579f72e4
AT		 570int em28xx_init_isoc(struct em28xx *dev, int max_packets,
571 int num_bufs, int max_pkt_size,
c67ec53f 572 int (*isoc_copy) (struct em28xx *dev, struct urb *urb));
579f72e4 573void em28xx_uninit_isoc(struct em28xx *dev);
c67ec53f
MCC		 574int em28xx_set_mode(struct em28xx *dev, enum em28xx_mode set_mode);
575int em28xx_gpio_set(struct em28xx *dev, struct em28xx_reg_seq *gpio);
3acf2809 576
6d79468d
MCC		 577/* Provided by em28xx-video.c */
578int em28xx_register_extension(struct em28xx_ops *dev);
579void em28xx_unregister_extension(struct em28xx_ops *dev);
580
3acf2809 581/* Provided by em28xx-cards.c */
6ea54d93 582extern int em2800_variant_detect(struct usb_device *udev, int model);
a94e95b4 583extern void em28xx_pre_card_setup(struct em28xx *dev);
3acf2809
MCC		 584extern void em28xx_card_setup(struct em28xx *dev);
585extern struct em28xx_board em28xx_boards[];
586extern struct usb_device_id em28xx_id_table[];
587extern const unsigned int em28xx_bcount;
c8793b03 588void em28xx_set_ir(struct em28xx *dev, struct IR_i2c *ir);
d7cba043 589int em28xx_tuner_callback(void *ptr, int component, int command, int arg);
c8793b03
MCC		 590
591/* Provided by em28xx-input.c */
c8793b03
MCC		 592int em28xx_get_key_terratec(struct IR_i2c *ir, u32 *ir_key, u32 *ir_raw);
593int em28xx_get_key_em_haup(struct IR_i2c *ir, u32 *ir_key, u32 *ir_raw);
594int em28xx_get_key_pinnacle_usb_grey(struct IR_i2c *ir, u32 *ir_key,
595 u32 *ir_raw);
a9fc52bc
DH		 596void em28xx_register_snapshot_button(struct em28xx *dev);
597void em28xx_deregister_snapshot_button(struct em28xx *dev);
a6c2ba28 598
a924a499
MCC		 599int em28xx_ir_init(struct em28xx *dev);
600int em28xx_ir_fini(struct em28xx *dev);
601
a6c2ba28 602/* printk macros */
603
3acf2809 604#define em28xx_err(fmt, arg...) do {\
f85c657f 605 printk(KERN_ERR fmt , ##arg); } while (0)
a6c2ba28 606
3acf2809 607#define em28xx_errdev(fmt, arg...) do {\
4ac97914 608 printk(KERN_ERR "%s: "fmt,\
f85c657f 609 dev->name , ##arg); } while (0)
a6c2ba28 610
3acf2809 611#define em28xx_info(fmt, arg...) do {\
4ac97914 612 printk(KERN_INFO "%s: "fmt,\
f85c657f 613 dev->name , ##arg); } while (0)
3acf2809 614#define em28xx_warn(fmt, arg...) do {\
4ac97914 615 printk(KERN_WARNING "%s: "fmt,\
f85c657f 616 dev->name , ##arg); } while (0)
a6c2ba28 617
6ea54d93 618static inline int em28xx_compression_disable(struct em28xx *dev)
a6c2ba28 619{
620 /* side effect of disabling scaler and mixer */
2a29a0d7 621 return em28xx_write_reg(dev, EM28XX_R26_COMPR, 0x00);
a6c2ba28 622}
623
6ea54d93 624static inline int em28xx_contrast_get(struct em28xx *dev)
a6c2ba28 625{
41facaa4 626 return em28xx_read_reg(dev, EM28XX_R20_YGAIN) & 0x1f;
a6c2ba28 627}
628
6ea54d93 629static inline int em28xx_brightness_get(struct em28xx *dev)
a6c2ba28 630{
41facaa4 631 return em28xx_read_reg(dev, EM28XX_R21_YOFFSET);
a6c2ba28 632}
633
6ea54d93 634static inline int em28xx_saturation_get(struct em28xx *dev)
a6c2ba28 635{
41facaa4 636 return em28xx_read_reg(dev, EM28XX_R22_UVGAIN) & 0x1f;
a6c2ba28 637}
638
6ea54d93 639static inline int em28xx_u_balance_get(struct em28xx *dev)
a6c2ba28 640{
41facaa4 641 return em28xx_read_reg(dev, EM28XX_R23_UOFFSET);
a6c2ba28 642}
643
6ea54d93 644static inline int em28xx_v_balance_get(struct em28xx *dev)
a6c2ba28 645{
41facaa4 646 return em28xx_read_reg(dev, EM28XX_R24_VOFFSET);
a6c2ba28 647}
648
6ea54d93 649static inline int em28xx_gamma_get(struct em28xx *dev)
a6c2ba28 650{
41facaa4 651 return em28xx_read_reg(dev, EM28XX_R14_GAMMA) & 0x3f;
a6c2ba28 652}
653
6ea54d93 654static inline int em28xx_contrast_set(struct em28xx *dev, s32 val)
a6c2ba28 655{
656 u8 tmp = (u8) val;
41facaa4 657 return em28xx_write_regs(dev, EM28XX_R20_YGAIN, &tmp, 1);
a6c2ba28 658}
659
6ea54d93 660static inline int em28xx_brightness_set(struct em28xx *dev, s32 val)
a6c2ba28 661{
662 u8 tmp = (u8) val;
41facaa4 663 return em28xx_write_regs(dev, EM28XX_R21_YOFFSET, &tmp, 1);
a6c2ba28 664}
665
6ea54d93 666static inline int em28xx_saturation_set(struct em28xx *dev, s32 val)
a6c2ba28 667{
668 u8 tmp = (u8) val;
41facaa4 669 return em28xx_write_regs(dev, EM28XX_R22_UVGAIN, &tmp, 1);
a6c2ba28 670}
671
6ea54d93 672static inline int em28xx_u_balance_set(struct em28xx *dev, s32 val)
a6c2ba28 673{
674 u8 tmp = (u8) val;
41facaa4 675 return em28xx_write_regs(dev, EM28XX_R23_UOFFSET, &tmp, 1);
a6c2ba28 676}
677
6ea54d93 678static inline int em28xx_v_balance_set(struct em28xx *dev, s32 val)
a6c2ba28 679{
680 u8 tmp = (u8) val;
41facaa4 681 return em28xx_write_regs(dev, EM28XX_R24_VOFFSET, &tmp, 1);
a6c2ba28 682}
683
6ea54d93 684static inline int em28xx_gamma_set(struct em28xx *dev, s32 val)
a6c2ba28 685{
686 u8 tmp = (u8) val;
41facaa4 687 return em28xx_write_regs(dev, EM28XX_R14_GAMMA, &tmp, 1);
a6c2ba28 688}
689
690/*FIXME: maxw should be dependent of alt mode */
6ea54d93 691static inline unsigned int norm_maxw(struct em28xx *dev)
30556b23 692{
505b6d0b 693 if (dev->board.max_range_640_480)
7d497f8a 694 return 640;
c8793b03 695 else
7d497f8a 696 return 720;
30556b23
MR		 697}
698
6ea54d93 699static inline unsigned int norm_maxh(struct em28xx *dev)
a6c2ba28 700{
505b6d0b 701 if (dev->board.max_range_640_480)
7d497f8a 702 return 480;
c8793b03 703 else
7d497f8a 704 return (dev->norm & V4L2_STD_625_50) ? 576 : 480;
a6c2ba28 705}
a6c2ba28 706#endif
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