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Commit | Line | Data |
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a6c2ba28 | 1 | /* |
3acf2809 | 2 | em28xx-cards.c - driver for Empia EM2800/EM2820/2840 USB video capture devices |
a6c2ba28 | 3 | |
4 | Copyright (C) 2005 Markus Rechberger <mrechberger@gmail.com> | |
4ac97914 MCC |
5 | Ludovico Cavedon <cavedon@sssup.it> |
6 | Mauro Carvalho Chehab <mchehab@brturbo.com.br> | |
a6c2ba28 | 7 | |
8 | Based on the em2800 driver from Sascha Sommer <saschasommer@freenet.de> | |
9 | ||
10 | This program is free software; you can redistribute it and/or modify | |
11 | it under the terms of the GNU General Public License as published by | |
12 | the Free Software Foundation; either version 2 of the License, or | |
13 | (at your option) any later version. | |
14 | ||
15 | This program is distributed in the hope that it will be useful, | |
16 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
17 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
18 | GNU General Public License for more details. | |
19 | ||
20 | You should have received a copy of the GNU General Public License | |
21 | along with this program; if not, write to the Free Software | |
22 | Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | |
23 | */ | |
24 | ||
3acf2809 MCC |
25 | #ifndef _EM28XX_H |
26 | #define _EM28XX_H | |
a6c2ba28 | 27 | |
28 | #include <linux/videodev.h> | |
29 | #include <linux/i2c.h> | |
d5e52653 | 30 | #include <media/ir-kbd-i2c.h> |
a6c2ba28 | 31 | |
596d92d5 MCC |
32 | /* Boards supported by driver */ |
33 | ||
34 | #define EM2800_BOARD_UNKNOWN 0 | |
35 | #define EM2820_BOARD_UNKNOWN 1 | |
36 | #define EM2820_BOARD_TERRATEC_CINERGY_250 2 | |
37 | #define EM2820_BOARD_PINNACLE_USB_2 3 | |
38 | #define EM2820_BOARD_HAUPPAUGE_WINTV_USB_2 4 | |
39 | #define EM2820_BOARD_MSI_VOX_USB_2 5 | |
40 | #define EM2800_BOARD_TERRATEC_CINERGY_200 6 | |
41 | #define EM2800_BOARD_LEADTEK_WINFAST_USBII 7 | |
42 | #define EM2800_BOARD_KWORLD_USB2800 8 | |
45632c4f | 43 | #define EM2820_BOARD_PINNACLE_DVC_90 9 |
596d92d5 MCC |
44 | |
45 | #define UNSET -1 | |
46 | ||
47 | /* maximum number of em28xx boards */ | |
3acf2809 | 48 | #define EM28XX_MAXBOARDS 1 /*FIXME: should be bigger */ |
596d92d5 | 49 | |
a6c2ba28 | 50 | /* maximum number of frames that can be queued */ |
3acf2809 | 51 | #define EM28XX_NUM_FRAMES 5 |
a6c2ba28 | 52 | /* number of frames that get used for v4l2_read() */ |
3acf2809 | 53 | #define EM28XX_NUM_READ_FRAMES 2 |
a6c2ba28 | 54 | |
55 | /* number of buffers for isoc transfers */ | |
3acf2809 | 56 | #define EM28XX_NUM_BUFS 5 |
a6c2ba28 | 57 | |
d5e52653 MCC |
58 | /* number of packets for each buffer |
59 | windows requests only 40 packets .. so we better do the same | |
60 | this is what I found out for all alternate numbers there! | |
61 | */ | |
3acf2809 | 62 | #define EM28XX_NUM_PACKETS 40 |
a6c2ba28 | 63 | |
a6c2ba28 | 64 | /* default alternate; 0 means choose the best */ |
3acf2809 | 65 | #define EM28XX_PINOUT 0 |
a6c2ba28 | 66 | |
3acf2809 | 67 | #define EM28XX_INTERLACED_DEFAULT 1 |
a6c2ba28 | 68 | |
69 | /* | |
70 | #define (use usbview if you want to get the other alternate number infos) | |
71 | #define | |
72 | #define alternate number 2 | |
73 | #define Endpoint Address: 82 | |
74 | Direction: in | |
75 | Attribute: 1 | |
76 | Type: Isoc | |
77 | Max Packet Size: 1448 | |
78 | Interval: 125us | |
79 | ||
80 | alternate number 7 | |
81 | ||
82 | Endpoint Address: 82 | |
83 | Direction: in | |
84 | Attribute: 1 | |
85 | Type: Isoc | |
86 | Max Packet Size: 3072 | |
87 | Interval: 125us | |
88 | */ | |
89 | ||
90 | /* time to wait when stopping the isoc transfer */ | |
3acf2809 | 91 | #define EM28XX_URB_TIMEOUT msecs_to_jiffies(EM28XX_NUM_BUFS * EM28XX_NUM_PACKETS) |
a6c2ba28 | 92 | |
596d92d5 MCC |
93 | /* time in msecs to wait for i2c writes to finish */ |
94 | #define EM2800_I2C_WRITE_TIMEOUT 20 | |
95 | ||
a6c2ba28 | 96 | /* the various frame states */ |
3acf2809 | 97 | enum em28xx_frame_state { |
a6c2ba28 | 98 | F_UNUSED = 0, |
99 | F_QUEUED, | |
100 | F_GRABBING, | |
101 | F_DONE, | |
102 | F_ERROR, | |
103 | }; | |
104 | ||
105 | /* stream states */ | |
3acf2809 | 106 | enum em28xx_stream_state { |
a6c2ba28 | 107 | STREAM_OFF, |
108 | STREAM_INTERRUPT, | |
109 | STREAM_ON, | |
110 | }; | |
111 | ||
112 | /* frames */ | |
3acf2809 | 113 | struct em28xx_frame_t { |
a6c2ba28 | 114 | void *bufmem; |
115 | struct v4l2_buffer buf; | |
3acf2809 | 116 | enum em28xx_frame_state state; |
a6c2ba28 | 117 | struct list_head frame; |
118 | unsigned long vma_use_count; | |
119 | int top_field; | |
120 | int fieldbytesused; | |
121 | }; | |
122 | ||
123 | /* io methods */ | |
3acf2809 | 124 | enum em28xx_io_method { |
a6c2ba28 | 125 | IO_NONE, |
126 | IO_READ, | |
127 | IO_MMAP, | |
128 | }; | |
129 | ||
130 | /* inputs */ | |
131 | ||
3acf2809 MCC |
132 | #define MAX_EM28XX_INPUT 4 |
133 | enum enum28xx_itype { | |
134 | EM28XX_VMUX_COMPOSITE1 = 1, | |
135 | EM28XX_VMUX_COMPOSITE2, | |
136 | EM28XX_VMUX_COMPOSITE3, | |
137 | EM28XX_VMUX_COMPOSITE4, | |
138 | EM28XX_VMUX_SVIDEO, | |
139 | EM28XX_VMUX_TELEVISION, | |
140 | EM28XX_VMUX_CABLE, | |
141 | EM28XX_VMUX_DVB, | |
142 | EM28XX_VMUX_DEBUG, | |
143 | EM28XX_RADIO, | |
a6c2ba28 | 144 | }; |
145 | ||
3acf2809 MCC |
146 | struct em28xx_input { |
147 | enum enum28xx_itype type; | |
a6c2ba28 | 148 | unsigned int vmux; |
149 | unsigned int amux; | |
150 | }; | |
151 | ||
3acf2809 | 152 | #define INPUT(nr) (&em28xx_boards[dev->model].input[nr]) |
a6c2ba28 | 153 | |
3acf2809 MCC |
154 | enum em28xx_decoder { |
155 | EM28XX_TVP5150, | |
156 | EM28XX_SAA7113, | |
157 | EM28XX_SAA7114 | |
a6c2ba28 | 158 | }; |
159 | ||
3acf2809 | 160 | struct em28xx_board { |
a6c2ba28 | 161 | char *name; |
a6c2ba28 | 162 | int vchannels; |
163 | int norm; | |
164 | int tuner_type; | |
165 | ||
166 | /* i2c flags */ | |
596d92d5 | 167 | unsigned int is_em2800; |
a6c2ba28 | 168 | unsigned int tda9887_conf; |
169 | ||
170 | unsigned int has_tuner:1; | |
171 | unsigned int has_msp34xx:1; | |
172 | ||
3acf2809 | 173 | enum em28xx_decoder decoder; |
a6c2ba28 | 174 | |
3acf2809 | 175 | struct em28xx_input input[MAX_EM28XX_INPUT]; |
a6c2ba28 | 176 | }; |
177 | ||
3acf2809 | 178 | struct em28xx_eeprom { |
a6c2ba28 | 179 | u32 id; /* 0x9567eb1a */ |
180 | u16 vendor_ID; | |
181 | u16 product_ID; | |
182 | ||
183 | u16 chip_conf; | |
184 | ||
185 | u16 board_conf; | |
186 | ||
187 | u16 string1, string2, string3; | |
188 | ||
189 | u8 string_idx_table; | |
190 | }; | |
191 | ||
192 | /* device states */ | |
3acf2809 | 193 | enum em28xx_dev_state { |
a6c2ba28 | 194 | DEV_INITIALIZED = 0x01, |
195 | DEV_DISCONNECTED = 0x02, | |
196 | DEV_MISCONFIGURED = 0x04, | |
197 | }; | |
198 | ||
199 | /* tvnorms */ | |
3acf2809 | 200 | struct em28xx_tvnorm { |
a6c2ba28 | 201 | char *name; |
202 | v4l2_std_id id; | |
203 | /* mode for saa7113h */ | |
204 | int mode; | |
205 | }; | |
206 | ||
207 | /* main device struct */ | |
3acf2809 | 208 | struct em28xx { |
a6c2ba28 | 209 | /* generic device properties */ |
210 | char name[30]; /* name (including minor) of the device */ | |
211 | int model; /* index in the device_data struct */ | |
596d92d5 | 212 | unsigned int is_em2800; |
a6c2ba28 | 213 | int video_inputs; /* number of video inputs */ |
9c75541f | 214 | struct list_head devlist; |
a6c2ba28 | 215 | unsigned int has_tuner:1; |
216 | unsigned int has_msp34xx:1; | |
217 | unsigned int has_tda9887:1; | |
218 | ||
3acf2809 | 219 | enum em28xx_decoder decoder; |
a6c2ba28 | 220 | |
221 | int tuner_type; /* type of the tuner */ | |
222 | int tuner_addr; /* tuner address */ | |
223 | int tda9887_conf; | |
224 | /* i2c i/o */ | |
225 | struct i2c_adapter i2c_adap; | |
226 | struct i2c_client i2c_client; | |
227 | /* video for linux */ | |
228 | int users; /* user count for exclusive use */ | |
229 | struct video_device *vdev; /* video for linux device struct */ | |
230 | struct video_picture vpic; /* picture settings only used to init saa7113h */ | |
3acf2809 | 231 | struct em28xx_tvnorm *tvnorm; /* selected tv norm */ |
a6c2ba28 | 232 | int ctl_freq; /* selected frequency */ |
233 | unsigned int ctl_input; /* selected input */ | |
234 | unsigned int ctl_ainput; /* slected audio input */ | |
235 | int mute; | |
236 | int volume; | |
237 | /* frame properties */ | |
3acf2809 | 238 | struct em28xx_frame_t frame[EM28XX_NUM_FRAMES]; /* list of frames */ |
a6c2ba28 | 239 | int num_frames; /* number of frames currently in use */ |
240 | unsigned int frame_count; /* total number of transfered frames */ | |
3acf2809 | 241 | struct em28xx_frame_t *frame_current; /* the frame that is being filled */ |
a6c2ba28 | 242 | int width; /* current frame width */ |
243 | int height; /* current frame height */ | |
244 | int frame_size; /* current frame size */ | |
245 | int field_size; /* current field size */ | |
246 | int bytesperline; | |
247 | int hscale; /* horizontal scale factor (see datasheet) */ | |
248 | int vscale; /* vertical scale factor (see datasheet) */ | |
249 | int interlaced; /* 1=interlace fileds, 0=just top fileds */ | |
250 | int type; | |
251 | ||
252 | /* states */ | |
3acf2809 MCC |
253 | enum em28xx_dev_state state; |
254 | enum em28xx_stream_state stream; | |
255 | enum em28xx_io_method io; | |
a6c2ba28 | 256 | /* locks */ |
257 | struct semaphore lock, fileop_lock; | |
258 | spinlock_t queue_lock; | |
259 | struct list_head inqueue, outqueue; | |
260 | wait_queue_head_t open, wait_frame, wait_stream; | |
261 | struct video_device *vbi_dev; | |
262 | ||
263 | unsigned char eedata[256]; | |
264 | ||
265 | /* usb transfer */ | |
266 | struct usb_device *udev; /* the usb device */ | |
267 | int alt; /* alternate */ | |
268 | int max_pkt_size; /* max packet size of isoc transaction */ | |
9d4d9c05 MCC |
269 | int num_alt; /* Number of alternative settings */ |
270 | unsigned int *alt_max_pkt_size; /* array of wMaxPacketSize */ | |
3acf2809 MCC |
271 | struct urb *urb[EM28XX_NUM_BUFS]; /* urb for isoc transfers */ |
272 | char *transfer_buffer[EM28XX_NUM_BUFS]; /* transfer buffers for isoc transfer */ | |
a6c2ba28 | 273 | /* helper funcs that call usb_control_msg */ |
3acf2809 | 274 | int (*em28xx_write_regs) (struct em28xx * dev, u16 reg, char *buf, |
a6c2ba28 | 275 | int len); |
3acf2809 MCC |
276 | int (*em28xx_read_reg) (struct em28xx * dev, u16 reg); |
277 | int (*em28xx_read_reg_req_len) (struct em28xx * dev, u8 req, u16 reg, | |
a6c2ba28 | 278 | char *buf, int len); |
3acf2809 | 279 | int (*em28xx_write_regs_req) (struct em28xx * dev, u8 req, u16 reg, |
a6c2ba28 | 280 | char *buf, int len); |
3acf2809 | 281 | int (*em28xx_read_reg_req) (struct em28xx * dev, u8 req, u16 reg); |
a6c2ba28 | 282 | }; |
283 | ||
3acf2809 | 284 | /* Provided by em28xx-i2c.c */ |
a6c2ba28 | 285 | |
3acf2809 MCC |
286 | void em28xx_i2c_call_clients(struct em28xx *dev, unsigned int cmd, void *arg); |
287 | int em28xx_i2c_register(struct em28xx *dev); | |
288 | int em28xx_i2c_unregister(struct em28xx *dev); | |
a6c2ba28 | 289 | |
3acf2809 | 290 | /* Provided by em28xx-input.c */ |
d5e52653 | 291 | |
3acf2809 | 292 | void em28xx_set_ir(struct em28xx * dev,struct IR_i2c *ir); |
d5e52653 | 293 | |
3acf2809 | 294 | /* Provided by em28xx-core.c */ |
a6c2ba28 | 295 | |
3acf2809 | 296 | void em28xx_print_ioctl(char *name, unsigned int cmd); |
a6c2ba28 | 297 | |
3acf2809 MCC |
298 | u32 em28xx_request_buffers(struct em28xx *dev, u32 count); |
299 | void em28xx_queue_unusedframes(struct em28xx *dev); | |
300 | void em28xx_release_buffers(struct em28xx *dev); | |
a6c2ba28 | 301 | |
3acf2809 | 302 | int em28xx_read_reg_req_len(struct em28xx *dev, u8 req, u16 reg, |
a6c2ba28 | 303 | char *buf, int len); |
3acf2809 MCC |
304 | int em28xx_read_reg_req(struct em28xx *dev, u8 req, u16 reg); |
305 | int em28xx_read_reg(struct em28xx *dev, u16 reg); | |
306 | int em28xx_write_regs_req(struct em28xx *dev, u8 req, u16 reg, char *buf, | |
a6c2ba28 | 307 | int len); |
3acf2809 MCC |
308 | int em28xx_write_regs(struct em28xx *dev, u16 reg, char *buf, int len); |
309 | int em28xx_write_reg_bits(struct em28xx *dev, u16 reg, u8 val, | |
a6c2ba28 | 310 | u8 bitmask); |
3acf2809 MCC |
311 | int em28xx_write_ac97(struct em28xx *dev, u8 reg, u8 * val); |
312 | int em28xx_audio_analog_set(struct em28xx *dev); | |
313 | int em28xx_colorlevels_set_default(struct em28xx *dev); | |
314 | int em28xx_capture_start(struct em28xx *dev, int start); | |
315 | int em28xx_outfmt_set_yuv422(struct em28xx *dev); | |
316 | int em28xx_accumulator_set(struct em28xx *dev, u8 xmin, u8 xmax, u8 ymin, | |
a6c2ba28 | 317 | u8 ymax); |
3acf2809 | 318 | int em28xx_capture_area_set(struct em28xx *dev, u8 hstart, u8 vstart, |
a6c2ba28 | 319 | u16 width, u16 height); |
3acf2809 MCC |
320 | int em28xx_scaler_set(struct em28xx *dev, u16 h, u16 v); |
321 | int em28xx_resolution_set(struct em28xx *dev); | |
322 | void em28xx_isocIrq(struct urb *urb, struct pt_regs *regs); | |
323 | int em28xx_init_isoc(struct em28xx *dev); | |
324 | void em28xx_uninit_isoc(struct em28xx *dev); | |
325 | int em28xx_set_alternate(struct em28xx *dev); | |
326 | ||
327 | /* Provided by em28xx-cards.c */ | |
596d92d5 | 328 | extern int em2800_variant_detect(struct usb_device* udev,int model); |
3acf2809 MCC |
329 | extern void em28xx_card_setup(struct em28xx *dev); |
330 | extern struct em28xx_board em28xx_boards[]; | |
331 | extern struct usb_device_id em28xx_id_table[]; | |
332 | extern const unsigned int em28xx_bcount; | |
a6c2ba28 | 333 | |
3acf2809 | 334 | /* em28xx registers */ |
596d92d5 | 335 | #define CHIPID_REG 0x0a |
a6c2ba28 | 336 | #define USBSUSP_REG 0x0c /* */ |
337 | ||
338 | #define AUDIOSRC_REG 0x0e | |
339 | #define XCLK_REG 0x0f | |
340 | ||
341 | #define VINMODE_REG 0x10 | |
342 | #define VINCTRL_REG 0x11 | |
343 | #define VINENABLE_REG 0x12 /* */ | |
344 | ||
345 | #define GAMMA_REG 0x14 | |
346 | #define RGAIN_REG 0x15 | |
347 | #define GGAIN_REG 0x16 | |
348 | #define BGAIN_REG 0x17 | |
349 | #define ROFFSET_REG 0x18 | |
350 | #define GOFFSET_REG 0x19 | |
351 | #define BOFFSET_REG 0x1a | |
352 | ||
353 | #define OFLOW_REG 0x1b | |
354 | #define HSTART_REG 0x1c | |
355 | #define VSTART_REG 0x1d | |
356 | #define CWIDTH_REG 0x1e | |
357 | #define CHEIGHT_REG 0x1f | |
358 | ||
359 | #define YGAIN_REG 0x20 | |
360 | #define YOFFSET_REG 0x21 | |
361 | #define UVGAIN_REG 0x22 | |
362 | #define UOFFSET_REG 0x23 | |
363 | #define VOFFSET_REG 0x24 | |
364 | #define SHARPNESS_REG 0x25 | |
365 | ||
366 | #define COMPR_REG 0x26 | |
367 | #define OUTFMT_REG 0x27 | |
368 | ||
369 | #define XMIN_REG 0x28 | |
370 | #define XMAX_REG 0x29 | |
371 | #define YMIN_REG 0x2a | |
372 | #define YMAX_REG 0x2b | |
373 | ||
374 | #define HSCALELOW_REG 0x30 | |
375 | #define HSCALEHIGH_REG 0x31 | |
376 | #define VSCALELOW_REG 0x32 | |
377 | #define VSCALEHIGH_REG 0x33 | |
378 | ||
379 | #define AC97LSB_REG 0x40 | |
380 | #define AC97MSB_REG 0x41 | |
381 | #define AC97ADDR_REG 0x42 | |
382 | #define AC97BUSY_REG 0x43 | |
383 | ||
384 | /* em202 registers */ | |
385 | #define MASTER_AC97 0x02 | |
386 | #define VIDEO_AC97 0x14 | |
387 | ||
388 | /* register settings */ | |
3acf2809 MCC |
389 | #define EM28XX_AUDIO_SRC_TUNER 0xc0 |
390 | #define EM28XX_AUDIO_SRC_LINE 0x80 | |
a6c2ba28 | 391 | |
392 | /* printk macros */ | |
393 | ||
3acf2809 | 394 | #define em28xx_err(fmt, arg...) do {\ |
674434c6 | 395 | printk(KERN_ERR fmt, ##arg); } while (0) |
a6c2ba28 | 396 | |
3acf2809 | 397 | #define em28xx_errdev(fmt, arg...) do {\ |
4ac97914 | 398 | printk(KERN_ERR "%s: "fmt,\ |
674434c6 | 399 | dev->name, ##arg); } while (0) |
a6c2ba28 | 400 | |
3acf2809 | 401 | #define em28xx_info(fmt, arg...) do {\ |
4ac97914 | 402 | printk(KERN_INFO "%s: "fmt,\ |
674434c6 | 403 | dev->name, ##arg); } while (0) |
3acf2809 | 404 | #define em28xx_warn(fmt, arg...) do {\ |
4ac97914 | 405 | printk(KERN_WARNING "%s: "fmt,\ |
674434c6 | 406 | dev->name, ##arg); } while (0) |
a6c2ba28 | 407 | |
3acf2809 | 408 | inline static int em28xx_audio_source(struct em28xx *dev, int input) |
a6c2ba28 | 409 | { |
3acf2809 | 410 | return em28xx_write_reg_bits(dev, AUDIOSRC_REG, input, 0xc0); |
a6c2ba28 | 411 | } |
412 | ||
3acf2809 | 413 | inline static int em28xx_audio_usb_mute(struct em28xx *dev, int mute) |
a6c2ba28 | 414 | { |
3acf2809 | 415 | return em28xx_write_reg_bits(dev, XCLK_REG, mute ? 0x00 : 0x80, 0x80); |
a6c2ba28 | 416 | } |
417 | ||
3acf2809 | 418 | inline static int em28xx_audio_analog_setup(struct em28xx *dev) |
a6c2ba28 | 419 | { |
420 | /* unmute video mixer with default volume level */ | |
3acf2809 | 421 | return em28xx_write_ac97(dev, VIDEO_AC97, "\x08\x08"); |
a6c2ba28 | 422 | } |
423 | ||
3acf2809 | 424 | inline static int em28xx_compression_disable(struct em28xx *dev) |
a6c2ba28 | 425 | { |
426 | /* side effect of disabling scaler and mixer */ | |
3acf2809 | 427 | return em28xx_write_regs(dev, COMPR_REG, "\x00", 1); |
a6c2ba28 | 428 | } |
429 | ||
3acf2809 | 430 | inline static int em28xx_contrast_get(struct em28xx *dev) |
a6c2ba28 | 431 | { |
3acf2809 | 432 | return em28xx_read_reg(dev, YGAIN_REG) & 0x1f; |
a6c2ba28 | 433 | } |
434 | ||
3acf2809 | 435 | inline static int em28xx_brightness_get(struct em28xx *dev) |
a6c2ba28 | 436 | { |
3acf2809 | 437 | return em28xx_read_reg(dev, YOFFSET_REG); |
a6c2ba28 | 438 | } |
439 | ||
3acf2809 | 440 | inline static int em28xx_saturation_get(struct em28xx *dev) |
a6c2ba28 | 441 | { |
3acf2809 | 442 | return em28xx_read_reg(dev, UVGAIN_REG) & 0x1f; |
a6c2ba28 | 443 | } |
444 | ||
3acf2809 | 445 | inline static int em28xx_u_balance_get(struct em28xx *dev) |
a6c2ba28 | 446 | { |
3acf2809 | 447 | return em28xx_read_reg(dev, UOFFSET_REG); |
a6c2ba28 | 448 | } |
449 | ||
3acf2809 | 450 | inline static int em28xx_v_balance_get(struct em28xx *dev) |
a6c2ba28 | 451 | { |
3acf2809 | 452 | return em28xx_read_reg(dev, VOFFSET_REG); |
a6c2ba28 | 453 | } |
454 | ||
3acf2809 | 455 | inline static int em28xx_gamma_get(struct em28xx *dev) |
a6c2ba28 | 456 | { |
3acf2809 | 457 | return em28xx_read_reg(dev, GAMMA_REG) & 0x3f; |
a6c2ba28 | 458 | } |
459 | ||
3acf2809 | 460 | inline static int em28xx_contrast_set(struct em28xx *dev, s32 val) |
a6c2ba28 | 461 | { |
462 | u8 tmp = (u8) val; | |
3acf2809 | 463 | return em28xx_write_regs(dev, YGAIN_REG, &tmp, 1); |
a6c2ba28 | 464 | } |
465 | ||
3acf2809 | 466 | inline static int em28xx_brightness_set(struct em28xx *dev, s32 val) |
a6c2ba28 | 467 | { |
468 | u8 tmp = (u8) val; | |
3acf2809 | 469 | return em28xx_write_regs(dev, YOFFSET_REG, &tmp, 1); |
a6c2ba28 | 470 | } |
471 | ||
3acf2809 | 472 | inline static int em28xx_saturation_set(struct em28xx *dev, s32 val) |
a6c2ba28 | 473 | { |
474 | u8 tmp = (u8) val; | |
3acf2809 | 475 | return em28xx_write_regs(dev, UVGAIN_REG, &tmp, 1); |
a6c2ba28 | 476 | } |
477 | ||
3acf2809 | 478 | inline static int em28xx_u_balance_set(struct em28xx *dev, s32 val) |
a6c2ba28 | 479 | { |
480 | u8 tmp = (u8) val; | |
3acf2809 | 481 | return em28xx_write_regs(dev, UOFFSET_REG, &tmp, 1); |
a6c2ba28 | 482 | } |
483 | ||
3acf2809 | 484 | inline static int em28xx_v_balance_set(struct em28xx *dev, s32 val) |
a6c2ba28 | 485 | { |
486 | u8 tmp = (u8) val; | |
3acf2809 | 487 | return em28xx_write_regs(dev, VOFFSET_REG, &tmp, 1); |
a6c2ba28 | 488 | } |
489 | ||
3acf2809 | 490 | inline static int em28xx_gamma_set(struct em28xx *dev, s32 val) |
a6c2ba28 | 491 | { |
492 | u8 tmp = (u8) val; | |
3acf2809 | 493 | return em28xx_write_regs(dev, GAMMA_REG, &tmp, 1); |
a6c2ba28 | 494 | } |
495 | ||
496 | /*FIXME: maxw should be dependent of alt mode */ | |
3acf2809 | 497 | inline static unsigned int norm_maxw(struct em28xx *dev) |
30556b23 MR |
498 | { |
499 | switch(dev->model){ | |
500 | case (EM2820_BOARD_MSI_VOX_USB_2): return(640); | |
501 | default: return(720); | |
502 | } | |
503 | } | |
504 | ||
3acf2809 | 505 | inline static unsigned int norm_maxh(struct em28xx *dev) |
a6c2ba28 | 506 | { |
30556b23 MR |
507 | switch(dev->model){ |
508 | case (EM2820_BOARD_MSI_VOX_USB_2): return(480); | |
509 | default: return (dev->tvnorm->id & V4L2_STD_625_50) ? 576 : 480; | |
510 | } | |
a6c2ba28 | 511 | } |
512 | ||
513 | #endif |