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Commit | Line | Data |
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6cb45879 MCC |
1 | /* tuner-xc2028 |
2 | * | |
3 | * Copyright (c) 2007 Mauro Carvalho Chehab (mchehab@infradead.org) | |
983d214e | 4 | * |
701672eb ML |
5 | * Copyright (c) 2007 Michel Ludwig (michel.ludwig@gmail.com) |
6 | * - frontend interface | |
983d214e | 7 | * |
6cb45879 MCC |
8 | * This code is placed under the terms of the GNU General Public License v2 |
9 | */ | |
10 | ||
11 | #include <linux/i2c.h> | |
12 | #include <asm/div64.h> | |
13 | #include <linux/firmware.h> | |
ab0b9fc6 | 14 | #include <linux/videodev2.h> |
6cb45879 | 15 | #include <linux/delay.h> |
701672eb | 16 | #include <media/tuner.h> |
3b20532c | 17 | #include <linux/mutex.h> |
215b95ba | 18 | #include "tuner-i2c.h" |
6cb45879 | 19 | #include "tuner-xc2028.h" |
de3fe21b | 20 | #include "tuner-xc2028-types.h" |
6cb45879 | 21 | |
701672eb ML |
22 | #include <linux/dvb/frontend.h> |
23 | #include "dvb_frontend.h" | |
24 | ||
ef8c1888 | 25 | |
83fb340b MCC |
26 | static int debug; |
27 | module_param(debug, int, 0644); | |
28 | MODULE_PARM_DESC(debug, "enable verbose debug messages"); | |
29 | ||
a82200fb MCC |
30 | static char audio_std[8]; |
31 | module_param_string(audio_std, audio_std, sizeof(audio_std), 0); | |
32 | MODULE_PARM_DESC(audio_std, | |
33 | "Audio standard. XC3028 audio decoder explicitly " | |
34 | "needs to know what audio\n" | |
35 | "standard is needed for some video standards with audio A2 or NICAM.\n" | |
36 | "The valid values are:\n" | |
37 | "A2\n" | |
38 | "A2/A\n" | |
39 | "A2/B\n" | |
40 | "NICAM\n" | |
41 | "NICAM/A\n" | |
42 | "NICAM/B\n"); | |
43 | ||
215b95ba | 44 | static LIST_HEAD(xc2028_list); |
aa501be9 CP |
45 | static DEFINE_MUTEX(xc2028_list_mutex); |
46 | ||
de3fe21b MCC |
47 | /* struct for storing firmware table */ |
48 | struct firmware_description { | |
49 | unsigned int type; | |
50 | v4l2_std_id id; | |
66c2d53d | 51 | __u16 int_freq; |
de3fe21b MCC |
52 | unsigned char *ptr; |
53 | unsigned int size; | |
54 | }; | |
6cb45879 | 55 | |
e0f0b37a CP |
56 | struct firmware_properties { |
57 | unsigned int type; | |
58 | v4l2_std_id id; | |
59 | v4l2_std_id std_req; | |
66c2d53d | 60 | __u16 int_freq; |
e0f0b37a CP |
61 | unsigned int scode_table; |
62 | int scode_nr; | |
63 | }; | |
64 | ||
6cb45879 | 65 | struct xc2028_data { |
215b95ba MCC |
66 | struct list_head xc2028_list; |
67 | struct tuner_i2c_props i2c_props; | |
68 | int (*tuner_callback) (void *dev, | |
69 | int command, int arg); | |
215b95ba MCC |
70 | void *video_dev; |
71 | int count; | |
de3fe21b MCC |
72 | __u32 frequency; |
73 | ||
74 | struct firmware_description *firm; | |
75 | int firm_size; | |
06fd82dc | 76 | __u16 firm_version; |
de3fe21b | 77 | |
8bf799a6 CP |
78 | __u16 hwmodel; |
79 | __u16 hwvers; | |
80 | ||
de3fe21b | 81 | struct xc2028_ctrl ctrl; |
215b95ba | 82 | |
e0f0b37a | 83 | struct firmware_properties cur_fw; |
215b95ba MCC |
84 | |
85 | struct mutex lock; | |
6cb45879 MCC |
86 | }; |
87 | ||
47cc5b78 CP |
88 | #define i2c_send(priv, buf, size) ({ \ |
89 | int _rc; \ | |
90 | _rc = tuner_i2c_xfer_send(&priv->i2c_props, buf, size); \ | |
91 | if (size != _rc) \ | |
92 | tuner_info("i2c output error: rc = %d (should be %d)\n",\ | |
93 | _rc, (int)size); \ | |
94 | _rc; \ | |
95 | }) | |
96 | ||
97 | #define i2c_rcv(priv, buf, size) ({ \ | |
98 | int _rc; \ | |
99 | _rc = tuner_i2c_xfer_recv(&priv->i2c_props, buf, size); \ | |
100 | if (size != _rc) \ | |
83fb340b | 101 | tuner_err("i2c input error: rc = %d (should be %d)\n", \ |
47cc5b78 CP |
102 | _rc, (int)size); \ |
103 | _rc; \ | |
104 | }) | |
ab0b9fc6 | 105 | |
7d58d111 CP |
106 | #define i2c_send_recv(priv, obuf, osize, ibuf, isize) ({ \ |
107 | int _rc; \ | |
108 | _rc = tuner_i2c_xfer_send_recv(&priv->i2c_props, obuf, osize, \ | |
109 | ibuf, isize); \ | |
110 | if (isize != _rc) \ | |
111 | tuner_err("i2c input error: rc = %d (should be %d)\n", \ | |
112 | _rc, (int)isize); \ | |
113 | _rc; \ | |
114 | }) | |
115 | ||
47cc5b78 | 116 | #define send_seq(priv, data...) ({ \ |
215b95ba | 117 | static u8 _val[] = data; \ |
47cc5b78 | 118 | int _rc; \ |
6cb45879 | 119 | if (sizeof(_val) != \ |
47cc5b78 | 120 | (_rc = tuner_i2c_xfer_send(&priv->i2c_props, \ |
215b95ba | 121 | _val, sizeof(_val)))) { \ |
47cc5b78 CP |
122 | tuner_err("Error on line %d: %d\n", __LINE__, _rc); \ |
123 | } else \ | |
124 | msleep(10); \ | |
125 | _rc; \ | |
126 | }) | |
6cb45879 | 127 | |
7d58d111 | 128 | static unsigned int xc2028_get_reg(struct xc2028_data *priv, u16 reg, u16 *val) |
6cb45879 | 129 | { |
b873e1a3 | 130 | unsigned char buf[2]; |
7d58d111 | 131 | unsigned char ibuf[2]; |
215b95ba | 132 | |
7d58d111 | 133 | tuner_dbg("%s %04x called\n", __FUNCTION__, reg); |
6cb45879 | 134 | |
7d58d111 | 135 | buf[0] = reg >> 8; |
80b52208 | 136 | buf[1] = (unsigned char) reg; |
6cb45879 | 137 | |
7d58d111 CP |
138 | if (i2c_send_recv(priv, buf, 2, ibuf, 2) != 2) |
139 | return -EIO; | |
6cb45879 | 140 | |
7d58d111 CP |
141 | *val = (ibuf[1]) | (ibuf[0] << 8); |
142 | return 0; | |
6cb45879 MCC |
143 | } |
144 | ||
e0262688 | 145 | #define dump_firm_type(t) dump_firm_type_and_int_freq(t, 0) |
29bec0bf | 146 | static void dump_firm_type_and_int_freq(unsigned int type, u16 int_freq) |
43efe702 MCC |
147 | { |
148 | if (type & BASE) | |
149 | printk("BASE "); | |
f380e1d2 MCC |
150 | if (type & INIT1) |
151 | printk("INIT1 "); | |
43efe702 MCC |
152 | if (type & F8MHZ) |
153 | printk("F8MHZ "); | |
154 | if (type & MTS) | |
155 | printk("MTS "); | |
156 | if (type & D2620) | |
157 | printk("D2620 "); | |
158 | if (type & D2633) | |
159 | printk("D2633 "); | |
160 | if (type & DTV6) | |
161 | printk("DTV6 "); | |
162 | if (type & QAM) | |
163 | printk("QAM "); | |
164 | if (type & DTV7) | |
165 | printk("DTV7 "); | |
166 | if (type & DTV78) | |
167 | printk("DTV78 "); | |
168 | if (type & DTV8) | |
169 | printk("DTV8 "); | |
170 | if (type & FM) | |
171 | printk("FM "); | |
172 | if (type & INPUT1) | |
173 | printk("INPUT1 "); | |
174 | if (type & LCD) | |
175 | printk("LCD "); | |
176 | if (type & NOGD) | |
177 | printk("NOGD "); | |
178 | if (type & MONO) | |
179 | printk("MONO "); | |
180 | if (type & ATSC) | |
181 | printk("ATSC "); | |
182 | if (type & IF) | |
183 | printk("IF "); | |
184 | if (type & LG60) | |
185 | printk("LG60 "); | |
186 | if (type & ATI638) | |
187 | printk("ATI638 "); | |
188 | if (type & OREN538) | |
189 | printk("OREN538 "); | |
190 | if (type & OREN36) | |
191 | printk("OREN36 "); | |
192 | if (type & TOYOTA388) | |
193 | printk("TOYOTA388 "); | |
194 | if (type & TOYOTA794) | |
195 | printk("TOYOTA794 "); | |
196 | if (type & DIBCOM52) | |
197 | printk("DIBCOM52 "); | |
198 | if (type & ZARLINK456) | |
199 | printk("ZARLINK456 "); | |
200 | if (type & CHINA) | |
201 | printk("CHINA "); | |
202 | if (type & F6MHZ) | |
203 | printk("F6MHZ "); | |
204 | if (type & INPUT2) | |
205 | printk("INPUT2 "); | |
206 | if (type & SCODE) | |
207 | printk("SCODE "); | |
e0262688 CP |
208 | if (type & HAS_IF) |
209 | printk("HAS_IF_%d ", int_freq); | |
43efe702 MCC |
210 | } |
211 | ||
ef8c1888 | 212 | static v4l2_std_id parse_audio_std_option(void) |
a82200fb | 213 | { |
e155d908 | 214 | if (strcasecmp(audio_std, "A2") == 0) |
a82200fb | 215 | return V4L2_STD_A2; |
e155d908 | 216 | if (strcasecmp(audio_std, "A2/A") == 0) |
a82200fb | 217 | return V4L2_STD_A2_A; |
e155d908 | 218 | if (strcasecmp(audio_std, "A2/B") == 0) |
a82200fb | 219 | return V4L2_STD_A2_B; |
e155d908 | 220 | if (strcasecmp(audio_std, "NICAM") == 0) |
a82200fb | 221 | return V4L2_STD_NICAM; |
e155d908 | 222 | if (strcasecmp(audio_std, "NICAM/A") == 0) |
a82200fb | 223 | return V4L2_STD_NICAM_A; |
e155d908 | 224 | if (strcasecmp(audio_std, "NICAM/B") == 0) |
a82200fb MCC |
225 | return V4L2_STD_NICAM_B; |
226 | ||
227 | return 0; | |
228 | } | |
229 | ||
ab0b9fc6 | 230 | static void free_firmware(struct xc2028_data *priv) |
6cb45879 | 231 | { |
de3fe21b MCC |
232 | int i; |
233 | ||
234 | if (!priv->firm) | |
235 | return; | |
236 | ||
ab0b9fc6 MCC |
237 | for (i = 0; i < priv->firm_size; i++) |
238 | kfree(priv->firm[i].ptr); | |
239 | ||
de3fe21b MCC |
240 | kfree(priv->firm); |
241 | ||
ab0b9fc6 | 242 | priv->firm = NULL; |
06fd82dc | 243 | priv->firm_size = 0; |
e0f0b37a CP |
244 | |
245 | memset(&priv->cur_fw, 0, sizeof(priv->cur_fw)); | |
de3fe21b MCC |
246 | } |
247 | ||
ab0b9fc6 | 248 | static int load_all_firmwares(struct dvb_frontend *fe) |
de3fe21b MCC |
249 | { |
250 | struct xc2028_data *priv = fe->tuner_priv; | |
ab0b9fc6 | 251 | const struct firmware *fw = NULL; |
6cb45879 | 252 | unsigned char *p, *endp; |
ab0b9fc6 MCC |
253 | int rc = 0; |
254 | int n, n_array; | |
de3fe21b | 255 | char name[33]; |
6cb45879 | 256 | |
83fb340b | 257 | tuner_dbg("%s called\n", __FUNCTION__); |
215b95ba | 258 | |
06fd82dc | 259 | tuner_dbg("Reading firmware %s\n", priv->ctrl.fname); |
a37b4c9b ML |
260 | rc = request_firmware(&fw, priv->ctrl.fname, |
261 | &priv->i2c_props.adap->dev); | |
6cb45879 | 262 | if (rc < 0) { |
ab0b9fc6 | 263 | if (rc == -ENOENT) |
83fb340b | 264 | tuner_err("Error: firmware %s not found.\n", |
de3fe21b | 265 | priv->ctrl.fname); |
2e4160ca | 266 | else |
83fb340b | 267 | tuner_err("Error %d while requesting firmware %s \n", |
de3fe21b | 268 | rc, priv->ctrl.fname); |
2e4160ca | 269 | |
6cb45879 MCC |
270 | return rc; |
271 | } | |
ab0b9fc6 MCC |
272 | p = fw->data; |
273 | endp = p + fw->size; | |
6cb45879 | 274 | |
06fd82dc CP |
275 | if (fw->size < sizeof(name) - 1 + 2 + 2) { |
276 | tuner_err("Error: firmware file %s has invalid size!\n", | |
277 | priv->ctrl.fname); | |
278 | goto corrupt; | |
6cb45879 | 279 | } |
de3fe21b | 280 | |
ab0b9fc6 MCC |
281 | memcpy(name, p, sizeof(name) - 1); |
282 | name[sizeof(name) - 1] = 0; | |
283 | p += sizeof(name) - 1; | |
de3fe21b | 284 | |
06fd82dc | 285 | priv->firm_version = le16_to_cpu(*(__u16 *) p); |
de3fe21b MCC |
286 | p += 2; |
287 | ||
ab0b9fc6 | 288 | n_array = le16_to_cpu(*(__u16 *) p); |
de3fe21b MCC |
289 | p += 2; |
290 | ||
06fd82dc CP |
291 | tuner_info("Loading %d firmware images from %s, type: %s, ver %d.%d\n", |
292 | n_array, priv->ctrl.fname, name, | |
293 | priv->firm_version >> 8, priv->firm_version & 0xff); | |
de3fe21b | 294 | |
ab0b9fc6 | 295 | priv->firm = kzalloc(sizeof(*priv->firm) * n_array, GFP_KERNEL); |
06fd82dc CP |
296 | if (priv->firm == NULL) { |
297 | tuner_err("Not enough memory to load firmware file.\n"); | |
ab0b9fc6 | 298 | rc = -ENOMEM; |
06fd82dc | 299 | goto err; |
6cb45879 | 300 | } |
de3fe21b | 301 | priv->firm_size = n_array; |
06fd82dc | 302 | |
ab0b9fc6 MCC |
303 | n = -1; |
304 | while (p < endp) { | |
de3fe21b MCC |
305 | __u32 type, size; |
306 | v4l2_std_id id; | |
66c2d53d | 307 | __u16 int_freq = 0; |
de3fe21b MCC |
308 | |
309 | n++; | |
310 | if (n >= n_array) { | |
06fd82dc CP |
311 | tuner_err("More firmware images in file than " |
312 | "were expected!\n"); | |
de3fe21b MCC |
313 | goto corrupt; |
314 | } | |
315 | ||
316 | /* Checks if there's enough bytes to read */ | |
ab0b9fc6 | 317 | if (p + sizeof(type) + sizeof(id) + sizeof(size) > endp) { |
83fb340b | 318 | tuner_err("Firmware header is incomplete!\n"); |
de3fe21b MCC |
319 | goto corrupt; |
320 | } | |
321 | ||
ab0b9fc6 | 322 | type = le32_to_cpu(*(__u32 *) p); |
de3fe21b MCC |
323 | p += sizeof(type); |
324 | ||
ab0b9fc6 | 325 | id = le64_to_cpu(*(v4l2_std_id *) p); |
de3fe21b MCC |
326 | p += sizeof(id); |
327 | ||
66c2d53d MCC |
328 | if (type & HAS_IF) { |
329 | int_freq = le16_to_cpu(*(__u16 *) p); | |
330 | p += sizeof(int_freq); | |
331 | } | |
332 | ||
2fc580ff | 333 | size = le32_to_cpu(*(__u32 *) p); |
de3fe21b MCC |
334 | p += sizeof(size); |
335 | ||
ab0b9fc6 | 336 | if ((!size) || (size + p > endp)) { |
83fb340b | 337 | tuner_err("Firmware type "); |
43efe702 | 338 | dump_firm_type(type); |
ef8c1888 MCC |
339 | printk("(%x), id %llx is corrupted " |
340 | "(size=%d, expected %d)\n", | |
91240dd9 | 341 | type, (unsigned long long)id, |
ef8c1888 | 342 | (unsigned)(endp - p), size); |
de3fe21b MCC |
343 | goto corrupt; |
344 | } | |
345 | ||
ab0b9fc6 | 346 | priv->firm[n].ptr = kzalloc(size, GFP_KERNEL); |
06fd82dc CP |
347 | if (priv->firm[n].ptr == NULL) { |
348 | tuner_err("Not enough memory to load firmware file.\n"); | |
ab0b9fc6 | 349 | rc = -ENOMEM; |
de3fe21b MCC |
350 | goto err; |
351 | } | |
06fd82dc CP |
352 | tuner_dbg("Reading firmware type "); |
353 | if (debug) { | |
e0262688 | 354 | dump_firm_type_and_int_freq(type, int_freq); |
06fd82dc | 355 | printk("(%x), id %llx, size=%d.\n", |
e0262688 | 356 | type, (unsigned long long)id, size); |
06fd82dc | 357 | } |
de3fe21b MCC |
358 | |
359 | memcpy(priv->firm[n].ptr, p, size); | |
360 | priv->firm[n].type = type; | |
361 | priv->firm[n].id = id; | |
362 | priv->firm[n].size = size; | |
66c2d53d | 363 | priv->firm[n].int_freq = int_freq; |
de3fe21b MCC |
364 | |
365 | p += size; | |
366 | } | |
367 | ||
ab0b9fc6 | 368 | if (n + 1 != priv->firm_size) { |
83fb340b | 369 | tuner_err("Firmware file is incomplete!\n"); |
de3fe21b MCC |
370 | goto corrupt; |
371 | } | |
372 | ||
373 | goto done; | |
374 | ||
375 | corrupt: | |
ab0b9fc6 | 376 | rc = -EINVAL; |
83fb340b | 377 | tuner_err("Error: firmware file is corrupted!\n"); |
de3fe21b MCC |
378 | |
379 | err: | |
06fd82dc | 380 | tuner_info("Releasing partially loaded firmware file.\n"); |
de3fe21b MCC |
381 | free_firmware(priv); |
382 | ||
383 | done: | |
384 | release_firmware(fw); | |
06fd82dc CP |
385 | if (rc == 0) |
386 | tuner_dbg("Firmware files loaded.\n"); | |
de3fe21b MCC |
387 | |
388 | return rc; | |
389 | } | |
390 | ||
f380e1d2 MCC |
391 | static int seek_firmware(struct dvb_frontend *fe, unsigned int type, |
392 | v4l2_std_id *id) | |
de3fe21b MCC |
393 | { |
394 | struct xc2028_data *priv = fe->tuner_priv; | |
b1535293 | 395 | int i, best_i = -1, best_nr_matches = 0; |
ef207fed | 396 | unsigned int ign_firm_type_mask = 0; |
de3fe21b | 397 | |
b1535293 CP |
398 | tuner_dbg("%s called, want type=", __FUNCTION__); |
399 | if (debug) { | |
400 | dump_firm_type(type); | |
401 | printk("(%x), id %016llx.\n", type, (unsigned long long)*id); | |
402 | } | |
de3fe21b MCC |
403 | |
404 | if (!priv->firm) { | |
83fb340b | 405 | tuner_err("Error! firmware not loaded\n"); |
de3fe21b MCC |
406 | return -EINVAL; |
407 | } | |
408 | ||
f380e1d2 | 409 | if (((type & ~SCODE) == 0) && (*id == 0)) |
ab0b9fc6 | 410 | *id = V4L2_STD_PAL; |
de3fe21b | 411 | |
e0f0b37a CP |
412 | if (type & BASE) |
413 | type &= BASE_TYPES; | |
ef207fed | 414 | else if (type & SCODE) { |
e0f0b37a | 415 | type &= SCODE_TYPES; |
ef207fed CP |
416 | ign_firm_type_mask = HAS_IF; |
417 | } else if (type & DTV_TYPES) | |
11a9eff9 CP |
418 | type &= DTV_TYPES; |
419 | else if (type & STD_SPECIFIC_TYPES) | |
420 | type &= STD_SPECIFIC_TYPES; | |
e0f0b37a | 421 | |
de3fe21b | 422 | /* Seek for exact match */ |
ab0b9fc6 | 423 | for (i = 0; i < priv->firm_size; i++) { |
ef207fed CP |
424 | if ((type == (priv->firm[i].type & ~ign_firm_type_mask)) && |
425 | (*id == priv->firm[i].id)) | |
de3fe21b MCC |
426 | goto found; |
427 | } | |
428 | ||
429 | /* Seek for generic video standard match */ | |
ab0b9fc6 | 430 | for (i = 0; i < priv->firm_size; i++) { |
b1535293 CP |
431 | v4l2_std_id match_mask; |
432 | int nr_matches; | |
433 | ||
ef207fed | 434 | if (type != (priv->firm[i].type & ~ign_firm_type_mask)) |
b1535293 CP |
435 | continue; |
436 | ||
437 | match_mask = *id & priv->firm[i].id; | |
438 | if (!match_mask) | |
439 | continue; | |
440 | ||
441 | if ((*id & match_mask) == *id) | |
442 | goto found; /* Supports all the requested standards */ | |
443 | ||
444 | nr_matches = hweight64(match_mask); | |
445 | if (nr_matches > best_nr_matches) { | |
446 | best_nr_matches = nr_matches; | |
447 | best_i = i; | |
448 | } | |
449 | } | |
450 | ||
451 | if (best_nr_matches > 0) { | |
452 | tuner_dbg("Selecting best matching firmware (%d bits) for " | |
453 | "type=", best_nr_matches); | |
454 | dump_firm_type(type); | |
455 | printk("(%x), id %016llx:\n", type, (unsigned long long)*id); | |
456 | i = best_i; | |
457 | goto found; | |
de3fe21b MCC |
458 | } |
459 | ||
460 | /*FIXME: Would make sense to seek for type "hint" match ? */ | |
461 | ||
b1535293 | 462 | i = -ENOENT; |
f380e1d2 | 463 | goto ret; |
de3fe21b MCC |
464 | |
465 | found: | |
466 | *id = priv->firm[i].id; | |
de3fe21b | 467 | |
f380e1d2 | 468 | ret: |
b1535293 | 469 | tuner_dbg("%s firmware for type=", (i < 0) ? "Can't find" : "Found"); |
83fb340b MCC |
470 | if (debug) { |
471 | dump_firm_type(type); | |
91240dd9 | 472 | printk("(%x), id %016llx.\n", type, (unsigned long long)*id); |
83fb340b | 473 | } |
f380e1d2 MCC |
474 | return i; |
475 | } | |
476 | ||
477 | static int load_firmware(struct dvb_frontend *fe, unsigned int type, | |
478 | v4l2_std_id *id) | |
479 | { | |
480 | struct xc2028_data *priv = fe->tuner_priv; | |
481 | int pos, rc; | |
0a196b6f | 482 | unsigned char *p, *endp, buf[priv->ctrl.max_len]; |
f380e1d2 | 483 | |
83fb340b | 484 | tuner_dbg("%s called\n", __FUNCTION__); |
f380e1d2 MCC |
485 | |
486 | pos = seek_firmware(fe, type, id); | |
487 | if (pos < 0) | |
488 | return pos; | |
489 | ||
83fb340b | 490 | tuner_info("Loading firmware for type="); |
b1535293 CP |
491 | dump_firm_type(priv->firm[pos].type); |
492 | printk("(%x), id %016llx.\n", priv->firm[pos].type, | |
493 | (unsigned long long)*id); | |
83fb340b | 494 | |
f380e1d2 | 495 | p = priv->firm[pos].ptr; |
f380e1d2 | 496 | endp = p + priv->firm[pos].size; |
6cb45879 | 497 | |
ab0b9fc6 | 498 | while (p < endp) { |
de3fe21b MCC |
499 | __u16 size; |
500 | ||
501 | /* Checks if there's enough bytes to read */ | |
ab0b9fc6 | 502 | if (p + sizeof(size) > endp) { |
83fb340b | 503 | tuner_err("Firmware chunk size is wrong\n"); |
de3fe21b MCC |
504 | return -EINVAL; |
505 | } | |
506 | ||
ab0b9fc6 | 507 | size = le16_to_cpu(*(__u16 *) p); |
de3fe21b MCC |
508 | p += sizeof(size); |
509 | ||
510 | if (size == 0xffff) | |
511 | return 0; | |
512 | ||
513 | if (!size) { | |
6cb45879 | 514 | /* Special callback command received */ |
215b95ba | 515 | rc = priv->tuner_callback(priv->video_dev, |
ab0b9fc6 MCC |
516 | XC2028_TUNER_RESET, 0); |
517 | if (rc < 0) { | |
83fb340b | 518 | tuner_err("Error at RESET code %d\n", |
ab0b9fc6 | 519 | (*p) & 0x7f); |
de3fe21b | 520 | return -EINVAL; |
6cb45879 | 521 | } |
6cb45879 MCC |
522 | continue; |
523 | } | |
5403bbae ML |
524 | if (size >= 0xff00) { |
525 | switch (size) { | |
526 | case 0xff00: | |
527 | rc = priv->tuner_callback(priv->video_dev, | |
528 | XC2028_RESET_CLK, 0); | |
529 | if (rc < 0) { | |
530 | tuner_err("Error at RESET code %d\n", | |
531 | (*p) & 0x7f); | |
532 | return -EINVAL; | |
533 | } | |
b32f9fb9 | 534 | break; |
5403bbae ML |
535 | default: |
536 | tuner_info("Invalid RESET code %d\n", | |
537 | size & 0x7f); | |
538 | return -EINVAL; | |
539 | ||
540 | } | |
2d4c0ac6 | 541 | continue; |
5403bbae | 542 | } |
de3fe21b MCC |
543 | |
544 | /* Checks for a sleep command */ | |
545 | if (size & 0x8000) { | |
ab0b9fc6 | 546 | msleep(size & 0x7fff); |
de3fe21b | 547 | continue; |
6cb45879 MCC |
548 | } |
549 | ||
de3fe21b | 550 | if ((size + p > endp)) { |
83fb340b | 551 | tuner_err("missing bytes: need %d, have %d\n", |
ab0b9fc6 | 552 | size, (int)(endp - p)); |
de3fe21b MCC |
553 | return -EINVAL; |
554 | } | |
6cb45879 | 555 | |
de3fe21b | 556 | buf[0] = *p; |
6cb45879 | 557 | p++; |
de3fe21b | 558 | size--; |
6cb45879 | 559 | |
de3fe21b | 560 | /* Sends message chunks */ |
ab0b9fc6 | 561 | while (size > 0) { |
0a196b6f CP |
562 | int len = (size < priv->ctrl.max_len - 1) ? |
563 | size : priv->ctrl.max_len - 1; | |
6cb45879 | 564 | |
ab0b9fc6 | 565 | memcpy(buf + 1, p, len); |
6cb45879 | 566 | |
47cc5b78 | 567 | rc = i2c_send(priv, buf, len + 1); |
ab0b9fc6 | 568 | if (rc < 0) { |
83fb340b | 569 | tuner_err("%d returned from send\n", rc); |
de3fe21b MCC |
570 | return -EINVAL; |
571 | } | |
572 | ||
573 | p += len; | |
574 | size -= len; | |
575 | } | |
576 | } | |
43efe702 | 577 | return 0; |
6cb45879 MCC |
578 | } |
579 | ||
f380e1d2 | 580 | static int load_scode(struct dvb_frontend *fe, unsigned int type, |
66c2d53d | 581 | v4l2_std_id *id, __u16 int_freq, int scode) |
f380e1d2 MCC |
582 | { |
583 | struct xc2028_data *priv = fe->tuner_priv; | |
584 | int pos, rc; | |
585 | unsigned char *p; | |
586 | ||
83fb340b | 587 | tuner_dbg("%s called\n", __FUNCTION__); |
f380e1d2 | 588 | |
66c2d53d MCC |
589 | if (!int_freq) { |
590 | pos = seek_firmware(fe, type, id); | |
591 | if (pos < 0) | |
592 | return pos; | |
593 | } else { | |
594 | for (pos = 0; pos < priv->firm_size; pos++) { | |
595 | if ((priv->firm[pos].int_freq == int_freq) && | |
9ca01e78 | 596 | (priv->firm[pos].type & HAS_IF)) |
66c2d53d MCC |
597 | break; |
598 | } | |
599 | if (pos == priv->firm_size) | |
600 | return -ENOENT; | |
601 | } | |
f380e1d2 MCC |
602 | |
603 | p = priv->firm[pos].ptr; | |
604 | ||
9ca01e78 | 605 | if (priv->firm[pos].type & HAS_IF) { |
66c2d53d MCC |
606 | if (priv->firm[pos].size != 12 * 16 || scode >= 16) |
607 | return -EINVAL; | |
608 | p += 12 * scode; | |
609 | } else { | |
610 | /* 16 SCODE entries per file; each SCODE entry is 12 bytes and | |
611 | * has a 2-byte size header in the firmware format. */ | |
612 | if (priv->firm[pos].size != 14 * 16 || scode >= 16 || | |
613 | le16_to_cpu(*(__u16 *)(p + 14 * scode)) != 12) | |
614 | return -EINVAL; | |
615 | p += 14 * scode + 2; | |
616 | } | |
f380e1d2 | 617 | |
d7b22c5c | 618 | tuner_info("Loading SCODE for type="); |
e0262688 CP |
619 | dump_firm_type_and_int_freq(priv->firm[pos].type, |
620 | priv->firm[pos].int_freq); | |
d7b22c5c CP |
621 | printk("(%x), id %016llx.\n", priv->firm[pos].type, |
622 | (unsigned long long)*id); | |
623 | ||
06fd82dc | 624 | if (priv->firm_version < 0x0202) |
47cc5b78 CP |
625 | rc = send_seq(priv, {0x20, 0x00, 0x00, 0x00}); |
626 | else | |
627 | rc = send_seq(priv, {0xa0, 0x00, 0x00, 0x00}); | |
628 | if (rc < 0) | |
629 | return -EIO; | |
f380e1d2 | 630 | |
66c2d53d | 631 | rc = i2c_send(priv, p, 12); |
47cc5b78 CP |
632 | if (rc < 0) |
633 | return -EIO; | |
f380e1d2 | 634 | |
47cc5b78 CP |
635 | rc = send_seq(priv, {0x00, 0x8c}); |
636 | if (rc < 0) | |
637 | return -EIO; | |
f380e1d2 MCC |
638 | |
639 | return 0; | |
640 | } | |
641 | ||
00deff1a | 642 | static int check_firmware(struct dvb_frontend *fe, unsigned int type, |
66c2d53d | 643 | v4l2_std_id std, __u16 int_freq) |
6cb45879 | 644 | { |
00deff1a | 645 | struct xc2028_data *priv = fe->tuner_priv; |
e0f0b37a | 646 | struct firmware_properties new_fw; |
00deff1a MCC |
647 | int rc = 0, is_retry = 0; |
648 | u16 version, hwmodel; | |
649 | v4l2_std_id std0; | |
6cb45879 | 650 | |
83fb340b | 651 | tuner_dbg("%s called\n", __FUNCTION__); |
6cb45879 | 652 | |
de3fe21b | 653 | if (!priv->firm) { |
a37b4c9b ML |
654 | if (!priv->ctrl.fname) { |
655 | tuner_info("xc2028/3028 firmware name not set!\n"); | |
de3fe21b | 656 | return -EINVAL; |
a37b4c9b | 657 | } |
de3fe21b | 658 | |
ab0b9fc6 MCC |
659 | rc = load_all_firmwares(fe); |
660 | if (rc < 0) | |
de3fe21b MCC |
661 | return rc; |
662 | } | |
663 | ||
0f6dac18 | 664 | if (priv->ctrl.mts && !(type & FM)) |
e0f0b37a | 665 | type |= MTS; |
6cb45879 | 666 | |
8bf799a6 | 667 | retry: |
e0f0b37a CP |
668 | new_fw.type = type; |
669 | new_fw.id = std; | |
670 | new_fw.std_req = std; | |
671 | new_fw.scode_table = SCODE | priv->ctrl.scode_table; | |
672 | new_fw.scode_nr = 0; | |
66c2d53d | 673 | new_fw.int_freq = int_freq; |
e0f0b37a CP |
674 | |
675 | tuner_dbg("checking firmware, user requested type="); | |
676 | if (debug) { | |
677 | dump_firm_type(new_fw.type); | |
e0262688 | 678 | printk("(%x), id %016llx, ", new_fw.type, |
e0f0b37a | 679 | (unsigned long long)new_fw.std_req); |
e0262688 CP |
680 | if (!int_freq) { |
681 | printk("scode_tbl "); | |
682 | dump_firm_type(priv->ctrl.scode_table); | |
683 | printk("(%x), ", priv->ctrl.scode_table); | |
684 | } else | |
685 | printk("int_freq %d, ", new_fw.int_freq); | |
686 | printk("scode_nr %d\n", new_fw.scode_nr); | |
e0f0b37a CP |
687 | } |
688 | ||
689 | /* No need to reload base firmware if it matches */ | |
690 | if (((BASE | new_fw.type) & BASE_TYPES) == | |
691 | (priv->cur_fw.type & BASE_TYPES)) { | |
692 | tuner_dbg("BASE firmware not changed.\n"); | |
693 | goto skip_base; | |
694 | } | |
695 | ||
696 | /* Updating BASE - forget about all currently loaded firmware */ | |
697 | memset(&priv->cur_fw, 0, sizeof(priv->cur_fw)); | |
698 | ||
699 | /* Reset is needed before loading firmware */ | |
700 | rc = priv->tuner_callback(priv->video_dev, | |
701 | XC2028_TUNER_RESET, 0); | |
702 | if (rc < 0) | |
703 | goto fail; | |
704 | ||
47bd5bc6 CP |
705 | /* BASE firmwares are all std0 */ |
706 | std0 = 0; | |
707 | rc = load_firmware(fe, BASE | new_fw.type, &std0); | |
e0f0b37a CP |
708 | if (rc < 0) { |
709 | tuner_err("Error %d while loading base firmware\n", | |
710 | rc); | |
711 | goto fail; | |
712 | } | |
5403bbae | 713 | |
de3fe21b | 714 | /* Load INIT1, if needed */ |
83fb340b | 715 | tuner_dbg("Load init1 firmware, if exists\n"); |
de3fe21b | 716 | |
47bd5bc6 | 717 | rc = load_firmware(fe, BASE | INIT1 | new_fw.type, &std0); |
1ad0b796 CP |
718 | if (rc == -ENOENT) |
719 | rc = load_firmware(fe, (BASE | INIT1 | new_fw.type) & ~F8MHZ, | |
720 | &std0); | |
e0f0b37a CP |
721 | if (rc < 0 && rc != -ENOENT) { |
722 | tuner_err("Error %d while loading init1 firmware\n", | |
723 | rc); | |
724 | goto fail; | |
725 | } | |
de3fe21b | 726 | |
e0f0b37a CP |
727 | skip_base: |
728 | /* | |
729 | * No need to reload standard specific firmware if base firmware | |
730 | * was not reloaded and requested video standards have not changed. | |
de3fe21b | 731 | */ |
e0f0b37a CP |
732 | if (priv->cur_fw.type == (BASE | new_fw.type) && |
733 | priv->cur_fw.std_req == std) { | |
83fb340b | 734 | tuner_dbg("Std-specific firmware already loaded.\n"); |
e0f0b37a | 735 | goto skip_std_specific; |
2e4160ca | 736 | } |
6cb45879 | 737 | |
e0f0b37a CP |
738 | /* Reloading std-specific firmware forces a SCODE update */ |
739 | priv->cur_fw.scode_table = 0; | |
740 | ||
e0f0b37a | 741 | rc = load_firmware(fe, new_fw.type, &new_fw.id); |
cca83798 MCC |
742 | if (rc == -ENOENT) |
743 | rc = load_firmware(fe, new_fw.type & ~F8MHZ, &new_fw.id); | |
744 | ||
ab0b9fc6 | 745 | if (rc < 0) |
e0f0b37a CP |
746 | goto fail; |
747 | ||
748 | skip_std_specific: | |
749 | if (priv->cur_fw.scode_table == new_fw.scode_table && | |
750 | priv->cur_fw.scode_nr == new_fw.scode_nr) { | |
751 | tuner_dbg("SCODE firmware already loaded.\n"); | |
752 | goto check_device; | |
753 | } | |
6cb45879 | 754 | |
40ae91a7 MCC |
755 | if (new_fw.type & FM) |
756 | goto check_device; | |
757 | ||
f380e1d2 | 758 | /* Load SCODE firmware, if exists */ |
e0f0b37a | 759 | tuner_dbg("Trying to load scode %d\n", new_fw.scode_nr); |
f380e1d2 | 760 | |
66c2d53d MCC |
761 | rc = load_scode(fe, new_fw.type | new_fw.scode_table, &new_fw.id, |
762 | new_fw.int_freq, new_fw.scode_nr); | |
43efe702 | 763 | |
e0f0b37a | 764 | check_device: |
8bf799a6 CP |
765 | if (xc2028_get_reg(priv, 0x0004, &version) < 0 || |
766 | xc2028_get_reg(priv, 0x0008, &hwmodel) < 0) { | |
767 | tuner_err("Unable to read tuner registers.\n"); | |
768 | goto fail; | |
769 | } | |
80b52208 MCC |
770 | |
771 | tuner_info("Device is Xceive %d version %d.%d, " | |
772 | "firmware version %d.%d\n", | |
773 | hwmodel, (version & 0xf000) >> 12, (version & 0xf00) >> 8, | |
774 | (version & 0xf0) >> 4, version & 0xf); | |
6cb45879 | 775 | |
8bf799a6 CP |
776 | /* Check firmware version against what we downloaded. */ |
777 | if (priv->firm_version != ((version & 0xf0) << 4 | (version & 0x0f))) { | |
778 | tuner_err("Incorrect readback of firmware version.\n"); | |
779 | goto fail; | |
780 | } | |
781 | ||
782 | /* Check that the tuner hardware model remains consistent over time. */ | |
783 | if (priv->hwmodel == 0 && (hwmodel == 2028 || hwmodel == 3028)) { | |
784 | priv->hwmodel = hwmodel; | |
785 | priv->hwvers = version & 0xff00; | |
786 | } else if (priv->hwmodel == 0 || priv->hwmodel != hwmodel || | |
787 | priv->hwvers != (version & 0xff00)) { | |
788 | tuner_err("Read invalid device hardware information - tuner " | |
789 | "hung?\n"); | |
790 | goto fail; | |
791 | } | |
792 | ||
e0f0b37a CP |
793 | memcpy(&priv->cur_fw, &new_fw, sizeof(priv->cur_fw)); |
794 | ||
795 | /* | |
796 | * By setting BASE in cur_fw.type only after successfully loading all | |
797 | * firmwares, we can: | |
798 | * 1. Identify that BASE firmware with type=0 has been loaded; | |
799 | * 2. Tell whether BASE firmware was just changed the next time through. | |
800 | */ | |
801 | priv->cur_fw.type |= BASE; | |
6cb45879 MCC |
802 | |
803 | return 0; | |
e0f0b37a CP |
804 | |
805 | fail: | |
806 | memset(&priv->cur_fw, 0, sizeof(priv->cur_fw)); | |
8bf799a6 CP |
807 | if (!is_retry) { |
808 | msleep(50); | |
809 | is_retry = 1; | |
810 | tuner_dbg("Retrying firmware load\n"); | |
811 | goto retry; | |
812 | } | |
813 | ||
e0f0b37a CP |
814 | if (rc == -ENOENT) |
815 | rc = -EINVAL; | |
816 | return rc; | |
6cb45879 MCC |
817 | } |
818 | ||
215b95ba | 819 | static int xc2028_signal(struct dvb_frontend *fe, u16 *strength) |
6cb45879 | 820 | { |
215b95ba | 821 | struct xc2028_data *priv = fe->tuner_priv; |
7d58d111 CP |
822 | u16 frq_lock, signal = 0; |
823 | int rc; | |
3b20532c | 824 | |
83fb340b | 825 | tuner_dbg("%s called\n", __FUNCTION__); |
6cb45879 | 826 | |
215b95ba | 827 | mutex_lock(&priv->lock); |
6cb45879 | 828 | |
80b52208 | 829 | /* Sync Lock Indicator */ |
7d58d111 CP |
830 | rc = xc2028_get_reg(priv, 0x0002, &frq_lock); |
831 | if (rc < 0 || frq_lock == 0) | |
3b20532c | 832 | goto ret; |
6cb45879 MCC |
833 | |
834 | /* Frequency is locked. Return signal quality */ | |
835 | ||
80b52208 | 836 | /* Get SNR of the video signal */ |
7d58d111 CP |
837 | rc = xc2028_get_reg(priv, 0x0040, &signal); |
838 | if (rc < 0) | |
839 | signal = -frq_lock; | |
3b20532c MCC |
840 | |
841 | ret: | |
215b95ba MCC |
842 | mutex_unlock(&priv->lock); |
843 | ||
844 | *strength = signal; | |
6cb45879 | 845 | |
7d58d111 | 846 | return rc; |
6cb45879 MCC |
847 | } |
848 | ||
849 | #define DIV 15625 | |
850 | ||
00deff1a | 851 | static int generic_set_freq(struct dvb_frontend *fe, u32 freq /* in HZ */, |
66c2d53d MCC |
852 | enum tuner_mode new_mode, |
853 | unsigned int type, | |
854 | v4l2_std_id std, | |
855 | u16 int_freq) | |
6cb45879 | 856 | { |
215b95ba | 857 | struct xc2028_data *priv = fe->tuner_priv; |
ab0b9fc6 | 858 | int rc = -EINVAL; |
2ce4b3aa | 859 | unsigned char buf[4]; |
ab0b9fc6 | 860 | u32 div, offset = 0; |
6cb45879 | 861 | |
83fb340b | 862 | tuner_dbg("%s called\n", __FUNCTION__); |
215b95ba | 863 | |
de3fe21b MCC |
864 | mutex_lock(&priv->lock); |
865 | ||
2ce4b3aa | 866 | tuner_dbg("should set frequency %d kHz\n", freq / 1000); |
6cb45879 | 867 | |
66c2d53d | 868 | if (check_firmware(fe, type, std, int_freq) < 0) |
3b20532c | 869 | goto ret; |
2e4160ca | 870 | |
2800ae9c MCC |
871 | /* On some cases xc2028 can disable video output, if |
872 | * very weak signals are received. By sending a soft | |
873 | * reset, this is re-enabled. So, it is better to always | |
874 | * send a soft reset before changing channels, to be sure | |
875 | * that xc2028 will be in a safe state. | |
876 | * Maybe this might also be needed for DTV. | |
877 | */ | |
00deff1a | 878 | if (new_mode == T_ANALOG_TV) { |
2800ae9c | 879 | rc = send_seq(priv, {0x00, 0x00}); |
d536c9df MK |
880 | } else if (priv->cur_fw.type & ATSC) { |
881 | offset = 1750000; | |
882 | } else { | |
d4e76681 | 883 | offset = 2750000; |
897b8422 CP |
884 | /* |
885 | * We must adjust the offset by 500kHz in two cases in order | |
886 | * to correctly center the IF output: | |
887 | * 1) When the ZARLINK456 or DIBCOM52 tables were explicitly | |
888 | * selected and a 7MHz channel is tuned; | |
889 | * 2) When tuning a VHF channel with DTV78 firmware. | |
890 | */ | |
891 | if (((priv->cur_fw.type & DTV7) && | |
892 | (priv->cur_fw.scode_table & (ZARLINK456 | DIBCOM52))) || | |
893 | ((priv->cur_fw.type & DTV78) && freq < 470000000)) | |
a44f1c43 CP |
894 | offset -= 500000; |
895 | } | |
2e4160ca | 896 | |
ab0b9fc6 | 897 | div = (freq - offset + DIV / 2) / DIV; |
2e4160ca | 898 | |
6cb45879 | 899 | /* CMD= Set frequency */ |
06fd82dc | 900 | if (priv->firm_version < 0x0202) |
47cc5b78 CP |
901 | rc = send_seq(priv, {0x00, 0x02, 0x00, 0x00}); |
902 | else | |
903 | rc = send_seq(priv, {0x80, 0x02, 0x00, 0x00}); | |
904 | if (rc < 0) | |
905 | goto ret; | |
de3fe21b | 906 | |
1fe87369 MCC |
907 | /* Return code shouldn't be checked. |
908 | The reset CLK is needed only with tm6000. | |
909 | Driver should work fine even if this fails. | |
910 | */ | |
911 | priv->tuner_callback(priv->video_dev, XC2028_RESET_CLK, 1); | |
6cb45879 MCC |
912 | |
913 | msleep(10); | |
701672eb | 914 | |
ab0b9fc6 MCC |
915 | buf[0] = 0xff & (div >> 24); |
916 | buf[1] = 0xff & (div >> 16); | |
917 | buf[2] = 0xff & (div >> 8); | |
918 | buf[3] = 0xff & (div); | |
6cb45879 | 919 | |
47cc5b78 | 920 | rc = i2c_send(priv, buf, sizeof(buf)); |
ab0b9fc6 | 921 | if (rc < 0) |
3b20532c | 922 | goto ret; |
6cb45879 MCC |
923 | msleep(100); |
924 | ||
ab0b9fc6 | 925 | priv->frequency = freq; |
215b95ba | 926 | |
2ce4b3aa CP |
927 | tuner_dbg("divisor= %02x %02x %02x %02x (freq=%d.%03d)\n", |
928 | buf[0], buf[1], buf[2], buf[3], | |
929 | freq / 1000000, (freq % 1000000) / 1000); | |
3b20532c | 930 | |
ab0b9fc6 | 931 | rc = 0; |
6cb45879 | 932 | |
215b95ba MCC |
933 | ret: |
934 | mutex_unlock(&priv->lock); | |
6cb45879 | 935 | |
215b95ba | 936 | return rc; |
701672eb ML |
937 | } |
938 | ||
00deff1a | 939 | static int xc2028_set_analog_freq(struct dvb_frontend *fe, |
ab0b9fc6 | 940 | struct analog_parameters *p) |
6cb45879 | 941 | { |
215b95ba | 942 | struct xc2028_data *priv = fe->tuner_priv; |
00deff1a MCC |
943 | unsigned int type=0; |
944 | ||
945 | tuner_dbg("%s called\n", __FUNCTION__); | |
c71d4bc5 | 946 | |
d74cb25e MCC |
947 | if (p->mode == V4L2_TUNER_RADIO) { |
948 | type |= FM; | |
949 | if (priv->ctrl.input1) | |
950 | type |= INPUT1; | |
951 | return generic_set_freq(fe, (625l * p->frequency) / 10, | |
66c2d53d | 952 | T_ANALOG_TV, type, 0, 0); |
d74cb25e MCC |
953 | } |
954 | ||
a5e9fe14 MCC |
955 | /* if std is not defined, choose one */ |
956 | if (!p->std) | |
957 | p->std = V4L2_STD_MN; | |
958 | ||
959 | /* PAL/M, PAL/N, PAL/Nc and NTSC variants should use 6MHz firmware */ | |
00deff1a MCC |
960 | if (!(p->std & V4L2_STD_MN)) |
961 | type |= F8MHZ; | |
6cb45879 | 962 | |
00deff1a MCC |
963 | /* Add audio hack to std mask */ |
964 | p->std |= parse_audio_std_option(); | |
6cb45879 | 965 | |
00deff1a | 966 | return generic_set_freq(fe, 62500l * p->frequency, |
66c2d53d | 967 | T_ANALOG_TV, type, p->std, 0); |
215b95ba | 968 | } |
6cb45879 | 969 | |
215b95ba MCC |
970 | static int xc2028_set_params(struct dvb_frontend *fe, |
971 | struct dvb_frontend_parameters *p) | |
6cb45879 | 972 | { |
215b95ba | 973 | struct xc2028_data *priv = fe->tuner_priv; |
00deff1a | 974 | unsigned int type=0; |
d04aa54a | 975 | fe_bandwidth_t bw = BANDWIDTH_8_MHZ; |
ad35ce9e | 976 | u16 demod = 0; |
6cb45879 | 977 | |
83fb340b | 978 | tuner_dbg("%s called\n", __FUNCTION__); |
701672eb | 979 | |
00deff1a MCC |
980 | if (priv->ctrl.d2633) |
981 | type |= D2633; | |
982 | else | |
983 | type |= D2620; | |
984 | ||
d04aa54a | 985 | switch(fe->ops.info.type) { |
d04aa54a MCC |
986 | case FE_OFDM: |
987 | bw = p->u.ofdm.bandwidth; | |
988 | break; | |
989 | case FE_QAM: | |
5c15648a MCC |
990 | tuner_info("WARN: There are some reports that " |
991 | "QAM 6 MHz doesn't work.\n" | |
992 | "If this works for you, please report by " | |
993 | "e-mail to: v4l-dvb-maintainer@linuxtv.org\n"); | |
d04aa54a MCC |
994 | bw = BANDWIDTH_6_MHZ; |
995 | type |= QAM; | |
996 | break; | |
997 | case FE_ATSC: | |
998 | bw = BANDWIDTH_6_MHZ; | |
4bfae52b MCC |
999 | /* The only ATSC firmware (at least on v2.7) is D2633, |
1000 | so overrides ctrl->d2633 */ | |
d04aa54a | 1001 | type |= ATSC| D2633; |
4bfae52b | 1002 | type &= ~D2620; |
d04aa54a | 1003 | break; |
5c15648a MCC |
1004 | /* DVB-S is not supported */ |
1005 | default: | |
1006 | return -EINVAL; | |
d04aa54a MCC |
1007 | } |
1008 | ||
00deff1a MCC |
1009 | switch (bw) { |
1010 | case BANDWIDTH_8_MHZ: | |
3dfefc50 CP |
1011 | if (p->frequency < 470000000) |
1012 | priv->ctrl.vhfbw7 = 0; | |
1013 | else | |
1014 | priv->ctrl.uhfbw8 = 1; | |
1015 | type |= (priv->ctrl.vhfbw7 && priv->ctrl.uhfbw8) ? DTV78 : DTV8; | |
1016 | type |= F8MHZ; | |
00deff1a MCC |
1017 | break; |
1018 | case BANDWIDTH_7_MHZ: | |
3dfefc50 CP |
1019 | if (p->frequency < 470000000) |
1020 | priv->ctrl.vhfbw7 = 1; | |
1021 | else | |
1022 | priv->ctrl.uhfbw8 = 0; | |
1023 | type |= (priv->ctrl.vhfbw7 && priv->ctrl.uhfbw8) ? DTV78 : DTV7; | |
1024 | type |= F8MHZ; | |
00deff1a MCC |
1025 | break; |
1026 | case BANDWIDTH_6_MHZ: | |
3dfefc50 CP |
1027 | type |= DTV6; |
1028 | priv->ctrl.vhfbw7 = 0; | |
1029 | priv->ctrl.uhfbw8 = 0; | |
00deff1a MCC |
1030 | break; |
1031 | default: | |
1032 | tuner_err("error: bandwidth not supported.\n"); | |
1033 | }; | |
1034 | ||
66c2d53d MCC |
1035 | /* All S-code tables need a 200kHz shift */ |
1036 | if (priv->ctrl.demod) | |
ad35ce9e | 1037 | demod = priv->ctrl.demod + 200; |
b542dfdc | 1038 | |
00deff1a | 1039 | return generic_set_freq(fe, p->frequency, |
ad35ce9e | 1040 | T_DIGITAL_TV, type, 0, demod); |
6cb45879 | 1041 | } |
701672eb | 1042 | |
45819c38 CP |
1043 | static int xc2028_sleep(struct dvb_frontend *fe) |
1044 | { | |
1045 | struct xc2028_data *priv = fe->tuner_priv; | |
1046 | int rc = 0; | |
1047 | ||
1048 | tuner_dbg("%s called\n", __FUNCTION__); | |
1049 | ||
1050 | mutex_lock(&priv->lock); | |
1051 | ||
1052 | if (priv->firm_version < 0x0202) | |
1053 | rc = send_seq(priv, {0x00, 0x08, 0x00, 0x00}); | |
1054 | else | |
1055 | rc = send_seq(priv, {0x80, 0x08, 0x00, 0x00}); | |
1056 | ||
1057 | priv->cur_fw.type = 0; /* need firmware reload */ | |
1058 | ||
1059 | mutex_unlock(&priv->lock); | |
1060 | ||
1061 | return rc; | |
1062 | } | |
1063 | ||
1064 | ||
215b95ba | 1065 | static int xc2028_dvb_release(struct dvb_frontend *fe) |
701672eb | 1066 | { |
215b95ba MCC |
1067 | struct xc2028_data *priv = fe->tuner_priv; |
1068 | ||
83fb340b | 1069 | tuner_dbg("%s called\n", __FUNCTION__); |
701672eb | 1070 | |
aa501be9 CP |
1071 | mutex_lock(&xc2028_list_mutex); |
1072 | ||
215b95ba | 1073 | priv->count--; |
701672eb | 1074 | |
de3fe21b | 1075 | if (!priv->count) { |
1808a698 MCC |
1076 | list_del(&priv->xc2028_list); |
1077 | ||
ab0b9fc6 | 1078 | kfree(priv->ctrl.fname); |
de3fe21b MCC |
1079 | |
1080 | free_firmware(priv); | |
ab0b9fc6 | 1081 | kfree(priv); |
06fd82dc | 1082 | fe->tuner_priv = NULL; |
de3fe21b | 1083 | } |
701672eb | 1084 | |
aa501be9 CP |
1085 | mutex_unlock(&xc2028_list_mutex); |
1086 | ||
701672eb ML |
1087 | return 0; |
1088 | } | |
1089 | ||
215b95ba | 1090 | static int xc2028_get_frequency(struct dvb_frontend *fe, u32 *frequency) |
701672eb | 1091 | { |
215b95ba | 1092 | struct xc2028_data *priv = fe->tuner_priv; |
701672eb | 1093 | |
83fb340b | 1094 | tuner_dbg("%s called\n", __FUNCTION__); |
701672eb | 1095 | |
215b95ba | 1096 | *frequency = priv->frequency; |
701672eb ML |
1097 | |
1098 | return 0; | |
1099 | } | |
1100 | ||
ab0b9fc6 | 1101 | static int xc2028_set_config(struct dvb_frontend *fe, void *priv_cfg) |
de3fe21b MCC |
1102 | { |
1103 | struct xc2028_data *priv = fe->tuner_priv; | |
1104 | struct xc2028_ctrl *p = priv_cfg; | |
0a196b6f | 1105 | int rc = 0; |
de3fe21b | 1106 | |
83fb340b | 1107 | tuner_dbg("%s called\n", __FUNCTION__); |
de3fe21b | 1108 | |
06fd82dc CP |
1109 | mutex_lock(&priv->lock); |
1110 | ||
0a196b6f CP |
1111 | kfree(priv->ctrl.fname); |
1112 | free_firmware(priv); | |
de3fe21b | 1113 | |
0a196b6f CP |
1114 | memcpy(&priv->ctrl, p, sizeof(priv->ctrl)); |
1115 | priv->ctrl.fname = NULL; | |
de3fe21b | 1116 | |
0a196b6f CP |
1117 | if (p->fname) { |
1118 | priv->ctrl.fname = kstrdup(p->fname, GFP_KERNEL); | |
1119 | if (priv->ctrl.fname == NULL) | |
1120 | rc = -ENOMEM; | |
de3fe21b MCC |
1121 | } |
1122 | ||
0a196b6f CP |
1123 | if (priv->ctrl.max_len < 9) |
1124 | priv->ctrl.max_len = 13; | |
352fae1d | 1125 | |
06fd82dc CP |
1126 | mutex_unlock(&priv->lock); |
1127 | ||
0a196b6f | 1128 | return rc; |
de3fe21b MCC |
1129 | } |
1130 | ||
215b95ba | 1131 | static const struct dvb_tuner_ops xc2028_dvb_tuner_ops = { |
701672eb | 1132 | .info = { |
ab0b9fc6 MCC |
1133 | .name = "Xceive XC3028", |
1134 | .frequency_min = 42000000, | |
1135 | .frequency_max = 864000000, | |
1136 | .frequency_step = 50000, | |
1137 | }, | |
701672eb | 1138 | |
de3fe21b | 1139 | .set_config = xc2028_set_config, |
00deff1a | 1140 | .set_analog_params = xc2028_set_analog_freq, |
215b95ba MCC |
1141 | .release = xc2028_dvb_release, |
1142 | .get_frequency = xc2028_get_frequency, | |
1143 | .get_rf_strength = xc2028_signal, | |
1144 | .set_params = xc2028_set_params, | |
45819c38 | 1145 | .sleep = xc2028_sleep, |
701672eb | 1146 | |
701672eb ML |
1147 | }; |
1148 | ||
7972f988 MK |
1149 | struct dvb_frontend *xc2028_attach(struct dvb_frontend *fe, |
1150 | struct xc2028_config *cfg) | |
701672eb | 1151 | { |
215b95ba | 1152 | struct xc2028_data *priv; |
a37b4c9b | 1153 | void *video_dev; |
701672eb | 1154 | |
83fb340b | 1155 | if (debug) |
2756665c | 1156 | printk(KERN_DEBUG "xc2028: Xcv2028/3028 init called!\n"); |
701672eb | 1157 | |
71a2ee37 | 1158 | if (NULL == cfg || NULL == cfg->video_dev) |
a37b4c9b | 1159 | return NULL; |
215b95ba | 1160 | |
a37b4c9b | 1161 | if (!fe) { |
2756665c | 1162 | printk(KERN_ERR "xc2028: No frontend!\n"); |
a37b4c9b | 1163 | return NULL; |
215b95ba MCC |
1164 | } |
1165 | ||
a37b4c9b ML |
1166 | video_dev = cfg->video_dev; |
1167 | ||
aa501be9 CP |
1168 | mutex_lock(&xc2028_list_mutex); |
1169 | ||
215b95ba | 1170 | list_for_each_entry(priv, &xc2028_list, xc2028_list) { |
a37b4c9b ML |
1171 | if (priv->video_dev == cfg->video_dev) { |
1172 | video_dev = NULL; | |
1173 | break; | |
1174 | } | |
215b95ba MCC |
1175 | } |
1176 | ||
a37b4c9b | 1177 | if (video_dev) { |
215b95ba | 1178 | priv = kzalloc(sizeof(*priv), GFP_KERNEL); |
aa501be9 CP |
1179 | if (priv == NULL) { |
1180 | mutex_unlock(&xc2028_list_mutex); | |
a37b4c9b | 1181 | return NULL; |
aa501be9 | 1182 | } |
3b20532c | 1183 | |
a37b4c9b ML |
1184 | priv->i2c_props.addr = cfg->i2c_addr; |
1185 | priv->i2c_props.adap = cfg->i2c_adap; | |
2756665c MK |
1186 | priv->i2c_props.name = "xc2028"; |
1187 | ||
215b95ba | 1188 | priv->video_dev = video_dev; |
a37b4c9b | 1189 | priv->tuner_callback = cfg->callback; |
0a196b6f | 1190 | priv->ctrl.max_len = 13; |
de3fe21b | 1191 | |
215b95ba MCC |
1192 | mutex_init(&priv->lock); |
1193 | ||
ab0b9fc6 | 1194 | list_add_tail(&priv->xc2028_list, &xc2028_list); |
215b95ba | 1195 | } |
a37b4c9b ML |
1196 | |
1197 | fe->tuner_priv = priv; | |
1808a698 | 1198 | priv->count++; |
215b95ba MCC |
1199 | |
1200 | memcpy(&fe->ops.tuner_ops, &xc2028_dvb_tuner_ops, | |
ab0b9fc6 | 1201 | sizeof(xc2028_dvb_tuner_ops)); |
215b95ba MCC |
1202 | |
1203 | tuner_info("type set to %s\n", "XCeive xc2028/xc3028 tuner"); | |
1204 | ||
71a2ee37 MCC |
1205 | if (cfg->ctrl) |
1206 | xc2028_set_config(fe, cfg->ctrl); | |
1207 | ||
aa501be9 CP |
1208 | mutex_unlock(&xc2028_list_mutex); |
1209 | ||
a37b4c9b | 1210 | return fe; |
215b95ba | 1211 | } |
a37b4c9b | 1212 | |
701672eb ML |
1213 | EXPORT_SYMBOL(xc2028_attach); |
1214 | ||
215b95ba | 1215 | MODULE_DESCRIPTION("Xceive xc2028/xc3028 tuner driver"); |
983d214e | 1216 | MODULE_AUTHOR("Michel Ludwig <michel.ludwig@gmail.com>"); |
215b95ba MCC |
1217 | MODULE_AUTHOR("Mauro Carvalho Chehab <mchehab@infradead.org>"); |
1218 | MODULE_LICENSE("GPL"); |