]> git.proxmox.com Git - mirror_ubuntu-artful-kernel.git/blame - drivers/net/atl1/atl1_main.c
net: smc91x: Build fixes for general sh boards.
[mirror_ubuntu-artful-kernel.git] / drivers / net / atl1 / atl1_main.c
CommitLineData
f3cc28c7
JC
1/*
2 * Copyright(c) 2005 - 2006 Attansic Corporation. All rights reserved.
3 * Copyright(c) 2006 Chris Snook <csnook@redhat.com>
4 * Copyright(c) 2006 Jay Cliburn <jcliburn@gmail.com>
5 *
6 * Derived from Intel e1000 driver
7 * Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved.
8 *
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License as published by the Free
11 * Software Foundation; either version 2 of the License, or (at your option)
12 * any later version.
13 *
14 * This program is distributed in the hope that it will be useful, but WITHOUT
15 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
16 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
17 * more details.
18 *
19 * You should have received a copy of the GNU General Public License along with
20 * this program; if not, write to the Free Software Foundation, Inc., 59
21 * Temple Place - Suite 330, Boston, MA 02111-1307, USA.
22 *
23 * The full GNU General Public License is included in this distribution in the
24 * file called COPYING.
25 *
26 * Contact Information:
27 * Xiong Huang <xiong_huang@attansic.com>
28 * Attansic Technology Corp. 3F 147, Xianzheng 9th Road, Zhubei,
29 * Xinzhu 302, TAIWAN, REPUBLIC OF CHINA
30 *
31 * Chris Snook <csnook@redhat.com>
32 * Jay Cliburn <jcliburn@gmail.com>
33 *
34 * This version is adapted from the Attansic reference driver for
35 * inclusion in the Linux kernel. It is currently under heavy development.
36 * A very incomplete list of things that need to be dealt with:
37 *
38 * TODO:
39 * Fix TSO; tx performance is horrible with TSO enabled.
40 * Wake on LAN.
53ffb42c 41 * Add more ethtool functions.
f3cc28c7
JC
42 * Fix abstruse irq enable/disable condition described here:
43 * http://marc.theaimsgroup.com/?l=linux-netdev&m=116398508500553&w=2
44 *
45 * NEEDS TESTING:
46 * VLAN
47 * multicast
48 * promiscuous mode
49 * interrupt coalescing
50 * SMP torture testing
51 */
52
53#include <linux/types.h>
54#include <linux/netdevice.h>
55#include <linux/pci.h>
56#include <linux/spinlock.h>
57#include <linux/slab.h>
58#include <linux/string.h>
59#include <linux/skbuff.h>
60#include <linux/etherdevice.h>
61#include <linux/if_vlan.h>
a3093d9b 62#include <linux/if_ether.h>
f3cc28c7
JC
63#include <linux/irqreturn.h>
64#include <linux/workqueue.h>
65#include <linux/timer.h>
66#include <linux/jiffies.h>
67#include <linux/hardirq.h>
68#include <linux/interrupt.h>
69#include <linux/irqflags.h>
70#include <linux/dma-mapping.h>
71#include <linux/net.h>
72#include <linux/pm.h>
73#include <linux/in.h>
74#include <linux/ip.h>
75#include <linux/tcp.h>
76#include <linux/compiler.h>
77#include <linux/delay.h>
78#include <linux/mii.h>
d3676756 79#include <linux/interrupt.h>
f3cc28c7
JC
80#include <net/checksum.h>
81
82#include <asm/atomic.h>
83#include <asm/byteorder.h>
84
85#include "atl1.h"
86
9cc6d14e 87#define DRIVER_VERSION "2.0.7"
f3cc28c7
JC
88
89char atl1_driver_name[] = "atl1";
90static const char atl1_driver_string[] = "Attansic L1 Ethernet Network Driver";
91static const char atl1_copyright[] = "Copyright(c) 2005-2006 Attansic Corporation.";
92char atl1_driver_version[] = DRIVER_VERSION;
93
94MODULE_AUTHOR
95 ("Attansic Corporation <xiong_huang@attansic.com>, Chris Snook <csnook@redhat.com>, Jay Cliburn <jcliburn@gmail.com>");
96MODULE_DESCRIPTION("Attansic 1000M Ethernet Network Driver");
97MODULE_LICENSE("GPL");
98MODULE_VERSION(DRIVER_VERSION);
99
100/*
101 * atl1_pci_tbl - PCI Device ID Table
102 */
103static const struct pci_device_id atl1_pci_tbl[] = {
e81e557a 104 {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATTANSIC_L1)},
f3cc28c7
JC
105 /* required last entry */
106 {0,}
107};
108
109MODULE_DEVICE_TABLE(pci, atl1_pci_tbl);
110
111/*
112 * atl1_sw_init - Initialize general software structures (struct atl1_adapter)
113 * @adapter: board private structure to initialize
114 *
115 * atl1_sw_init initializes the Adapter private data structure.
116 * Fields are initialized based on PCI device information and
117 * OS network device settings (MTU size).
118 */
119static int __devinit atl1_sw_init(struct atl1_adapter *adapter)
120{
121 struct atl1_hw *hw = &adapter->hw;
122 struct net_device *netdev = adapter->netdev;
f3cc28c7 123
a3093d9b
JC
124 hw->max_frame_size = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
125 hw->min_frame_size = ETH_ZLEN + ETH_FCS_LEN;
f3cc28c7
JC
126
127 adapter->wol = 0;
128 adapter->rx_buffer_len = (hw->max_frame_size + 7) & ~7;
129 adapter->ict = 50000; /* 100ms */
130 adapter->link_speed = SPEED_0; /* hardware init */
131 adapter->link_duplex = FULL_DUPLEX;
132
133 hw->phy_configured = false;
134 hw->preamble_len = 7;
135 hw->ipgt = 0x60;
136 hw->min_ifg = 0x50;
137 hw->ipgr1 = 0x40;
138 hw->ipgr2 = 0x60;
139 hw->max_retry = 0xf;
140 hw->lcol = 0x37;
141 hw->jam_ipg = 7;
142 hw->rfd_burst = 8;
143 hw->rrd_burst = 8;
144 hw->rfd_fetch_gap = 1;
145 hw->rx_jumbo_th = adapter->rx_buffer_len / 8;
146 hw->rx_jumbo_lkah = 1;
147 hw->rrd_ret_timer = 16;
148 hw->tpd_burst = 4;
149 hw->tpd_fetch_th = 16;
150 hw->txf_burst = 0x100;
151 hw->tx_jumbo_task_th = (hw->max_frame_size + 7) >> 3;
152 hw->tpd_fetch_gap = 1;
153 hw->rcb_value = atl1_rcb_64;
154 hw->dma_ord = atl1_dma_ord_enh;
155 hw->dmar_block = atl1_dma_req_256;
156 hw->dmaw_block = atl1_dma_req_256;
157 hw->cmb_rrd = 4;
158 hw->cmb_tpd = 4;
159 hw->cmb_rx_timer = 1; /* about 2us */
160 hw->cmb_tx_timer = 1; /* about 2us */
161 hw->smb_timer = 100000; /* about 200ms */
162
f3cc28c7
JC
163 spin_lock_init(&adapter->lock);
164 spin_lock_init(&adapter->mb_lock);
165
166 return 0;
167}
168
05ffdd7b
JC
169static int mdio_read(struct net_device *netdev, int phy_id, int reg_num)
170{
171 struct atl1_adapter *adapter = netdev_priv(netdev);
172 u16 result;
173
174 atl1_read_phy_reg(&adapter->hw, reg_num & 0x1f, &result);
175
176 return result;
177}
178
179static void mdio_write(struct net_device *netdev, int phy_id, int reg_num,
180 int val)
181{
182 struct atl1_adapter *adapter = netdev_priv(netdev);
183
184 atl1_write_phy_reg(&adapter->hw, reg_num, val);
185}
186
187/*
188 * atl1_mii_ioctl -
189 * @netdev:
190 * @ifreq:
191 * @cmd:
192 */
193static int atl1_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
194{
195 struct atl1_adapter *adapter = netdev_priv(netdev);
196 unsigned long flags;
197 int retval;
198
199 if (!netif_running(netdev))
200 return -EINVAL;
201
202 spin_lock_irqsave(&adapter->lock, flags);
203 retval = generic_mii_ioctl(&adapter->mii, if_mii(ifr), cmd, NULL);
204 spin_unlock_irqrestore(&adapter->lock, flags);
205
206 return retval;
207}
208
209/*
210 * atl1_ioctl -
211 * @netdev:
212 * @ifreq:
213 * @cmd:
214 */
215static int atl1_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
216{
217 switch (cmd) {
218 case SIOCGMIIPHY:
219 case SIOCGMIIREG:
220 case SIOCSMIIREG:
221 return atl1_mii_ioctl(netdev, ifr, cmd);
222 default:
223 return -EOPNOTSUPP;
224 }
225}
226
f3cc28c7
JC
227/*
228 * atl1_setup_mem_resources - allocate Tx / RX descriptor resources
229 * @adapter: board private structure
230 *
231 * Return 0 on success, negative on failure
232 */
233s32 atl1_setup_ring_resources(struct atl1_adapter *adapter)
234{
235 struct atl1_tpd_ring *tpd_ring = &adapter->tpd_ring;
236 struct atl1_rfd_ring *rfd_ring = &adapter->rfd_ring;
237 struct atl1_rrd_ring *rrd_ring = &adapter->rrd_ring;
238 struct atl1_ring_header *ring_header = &adapter->ring_header;
239 struct pci_dev *pdev = adapter->pdev;
240 int size;
241 u8 offset = 0;
242
243 size = sizeof(struct atl1_buffer) * (tpd_ring->count + rfd_ring->count);
244 tpd_ring->buffer_info = kzalloc(size, GFP_KERNEL);
245 if (unlikely(!tpd_ring->buffer_info)) {
1e006364 246 dev_err(&pdev->dev, "kzalloc failed , size = D%d\n", size);
f3cc28c7
JC
247 goto err_nomem;
248 }
249 rfd_ring->buffer_info =
53ffb42c 250 (struct atl1_buffer *)(tpd_ring->buffer_info + tpd_ring->count);
f3cc28c7 251
53ffb42c
JC
252 /* real ring DMA buffer
253 * each ring/block may need up to 8 bytes for alignment, hence the
254 * additional 40 bytes tacked onto the end.
255 */
256 ring_header->size = size =
257 sizeof(struct tx_packet_desc) * tpd_ring->count
258 + sizeof(struct rx_free_desc) * rfd_ring->count
259 + sizeof(struct rx_return_desc) * rrd_ring->count
260 + sizeof(struct coals_msg_block)
261 + sizeof(struct stats_msg_block)
262 + 40;
f3cc28c7
JC
263
264 ring_header->desc = pci_alloc_consistent(pdev, ring_header->size,
53ffb42c 265 &ring_header->dma);
f3cc28c7 266 if (unlikely(!ring_header->desc)) {
1e006364 267 dev_err(&pdev->dev, "pci_alloc_consistent failed\n");
f3cc28c7
JC
268 goto err_nomem;
269 }
270
271 memset(ring_header->desc, 0, ring_header->size);
272
273 /* init TPD ring */
274 tpd_ring->dma = ring_header->dma;
275 offset = (tpd_ring->dma & 0x7) ? (8 - (ring_header->dma & 0x7)) : 0;
276 tpd_ring->dma += offset;
277 tpd_ring->desc = (u8 *) ring_header->desc + offset;
278 tpd_ring->size = sizeof(struct tx_packet_desc) * tpd_ring->count;
f3cc28c7
JC
279
280 /* init RFD ring */
281 rfd_ring->dma = tpd_ring->dma + tpd_ring->size;
282 offset = (rfd_ring->dma & 0x7) ? (8 - (rfd_ring->dma & 0x7)) : 0;
283 rfd_ring->dma += offset;
284 rfd_ring->desc = (u8 *) tpd_ring->desc + (tpd_ring->size + offset);
285 rfd_ring->size = sizeof(struct rx_free_desc) * rfd_ring->count;
2ca13da7 286
f3cc28c7
JC
287
288 /* init RRD ring */
289 rrd_ring->dma = rfd_ring->dma + rfd_ring->size;
290 offset = (rrd_ring->dma & 0x7) ? (8 - (rrd_ring->dma & 0x7)) : 0;
291 rrd_ring->dma += offset;
292 rrd_ring->desc = (u8 *) rfd_ring->desc + (rfd_ring->size + offset);
293 rrd_ring->size = sizeof(struct rx_return_desc) * rrd_ring->count;
2ca13da7 294
f3cc28c7
JC
295
296 /* init CMB */
297 adapter->cmb.dma = rrd_ring->dma + rrd_ring->size;
298 offset = (adapter->cmb.dma & 0x7) ? (8 - (adapter->cmb.dma & 0x7)) : 0;
299 adapter->cmb.dma += offset;
53ffb42c
JC
300 adapter->cmb.cmb = (struct coals_msg_block *)
301 ((u8 *) rrd_ring->desc + (rrd_ring->size + offset));
f3cc28c7
JC
302
303 /* init SMB */
304 adapter->smb.dma = adapter->cmb.dma + sizeof(struct coals_msg_block);
305 offset = (adapter->smb.dma & 0x7) ? (8 - (adapter->smb.dma & 0x7)) : 0;
306 adapter->smb.dma += offset;
307 adapter->smb.smb = (struct stats_msg_block *)
53ffb42c
JC
308 ((u8 *) adapter->cmb.cmb +
309 (sizeof(struct coals_msg_block) + offset));
f3cc28c7
JC
310
311 return ATL1_SUCCESS;
312
313err_nomem:
314 kfree(tpd_ring->buffer_info);
315 return -ENOMEM;
316}
317
3d2557f6 318static void atl1_init_ring_ptrs(struct atl1_adapter *adapter)
f3cc28c7 319{
2ca13da7
JC
320 struct atl1_tpd_ring *tpd_ring = &adapter->tpd_ring;
321 struct atl1_rfd_ring *rfd_ring = &adapter->rfd_ring;
322 struct atl1_rrd_ring *rrd_ring = &adapter->rrd_ring;
f3cc28c7 323
2ca13da7
JC
324 atomic_set(&tpd_ring->next_to_use, 0);
325 atomic_set(&tpd_ring->next_to_clean, 0);
f3cc28c7 326
2ca13da7
JC
327 rfd_ring->next_to_clean = 0;
328 atomic_set(&rfd_ring->next_to_use, 0);
329
330 rrd_ring->next_to_use = 0;
331 atomic_set(&rrd_ring->next_to_clean, 0);
f3cc28c7
JC
332}
333
f3cc28c7 334/*
05ffdd7b 335 * atl1_clean_rx_ring - Free RFD Buffers
f3cc28c7
JC
336 * @adapter: board private structure
337 */
05ffdd7b 338static void atl1_clean_rx_ring(struct atl1_adapter *adapter)
f3cc28c7 339{
05ffdd7b
JC
340 struct atl1_rfd_ring *rfd_ring = &adapter->rfd_ring;
341 struct atl1_rrd_ring *rrd_ring = &adapter->rrd_ring;
342 struct atl1_buffer *buffer_info;
343 struct pci_dev *pdev = adapter->pdev;
344 unsigned long size;
345 unsigned int i;
f3cc28c7 346
05ffdd7b
JC
347 /* Free all the Rx ring sk_buffs */
348 for (i = 0; i < rfd_ring->count; i++) {
349 buffer_info = &rfd_ring->buffer_info[i];
350 if (buffer_info->dma) {
351 pci_unmap_page(pdev, buffer_info->dma,
352 buffer_info->length, PCI_DMA_FROMDEVICE);
353 buffer_info->dma = 0;
354 }
355 if (buffer_info->skb) {
356 dev_kfree_skb(buffer_info->skb);
357 buffer_info->skb = NULL;
358 }
359 }
f3cc28c7 360
05ffdd7b
JC
361 size = sizeof(struct atl1_buffer) * rfd_ring->count;
362 memset(rfd_ring->buffer_info, 0, size);
f3cc28c7 363
05ffdd7b
JC
364 /* Zero out the descriptor ring */
365 memset(rfd_ring->desc, 0, rfd_ring->size);
f3cc28c7 366
05ffdd7b
JC
367 rfd_ring->next_to_clean = 0;
368 atomic_set(&rfd_ring->next_to_use, 0);
f3cc28c7 369
05ffdd7b
JC
370 rrd_ring->next_to_use = 0;
371 atomic_set(&rrd_ring->next_to_clean, 0);
f3cc28c7
JC
372}
373
05ffdd7b
JC
374/*
375 * atl1_clean_tx_ring - Free Tx Buffers
376 * @adapter: board private structure
377 */
378static void atl1_clean_tx_ring(struct atl1_adapter *adapter)
f3cc28c7 379{
05ffdd7b
JC
380 struct atl1_tpd_ring *tpd_ring = &adapter->tpd_ring;
381 struct atl1_buffer *buffer_info;
53ffb42c 382 struct pci_dev *pdev = adapter->pdev;
05ffdd7b
JC
383 unsigned long size;
384 unsigned int i;
f3cc28c7 385
05ffdd7b
JC
386 /* Free all the Tx ring sk_buffs */
387 for (i = 0; i < tpd_ring->count; i++) {
388 buffer_info = &tpd_ring->buffer_info[i];
389 if (buffer_info->dma) {
390 pci_unmap_page(pdev, buffer_info->dma,
391 buffer_info->length, PCI_DMA_TODEVICE);
392 buffer_info->dma = 0;
f3cc28c7
JC
393 }
394 }
395
05ffdd7b
JC
396 for (i = 0; i < tpd_ring->count; i++) {
397 buffer_info = &tpd_ring->buffer_info[i];
398 if (buffer_info->skb) {
399 dev_kfree_skb_any(buffer_info->skb);
400 buffer_info->skb = NULL;
f3cc28c7 401 }
f3cc28c7
JC
402 }
403
05ffdd7b
JC
404 size = sizeof(struct atl1_buffer) * tpd_ring->count;
405 memset(tpd_ring->buffer_info, 0, size);
f3cc28c7 406
05ffdd7b
JC
407 /* Zero out the descriptor ring */
408 memset(tpd_ring->desc, 0, tpd_ring->size);
f3cc28c7 409
05ffdd7b
JC
410 atomic_set(&tpd_ring->next_to_use, 0);
411 atomic_set(&tpd_ring->next_to_clean, 0);
f3cc28c7
JC
412}
413
414/*
05ffdd7b
JC
415 * atl1_free_ring_resources - Free Tx / RX descriptor Resources
416 * @adapter: board private structure
417 *
418 * Free all transmit software resources
f3cc28c7 419 */
05ffdd7b 420void atl1_free_ring_resources(struct atl1_adapter *adapter)
f3cc28c7 421{
f3cc28c7 422 struct pci_dev *pdev = adapter->pdev;
05ffdd7b
JC
423 struct atl1_tpd_ring *tpd_ring = &adapter->tpd_ring;
424 struct atl1_rfd_ring *rfd_ring = &adapter->rfd_ring;
425 struct atl1_rrd_ring *rrd_ring = &adapter->rrd_ring;
426 struct atl1_ring_header *ring_header = &adapter->ring_header;
f3cc28c7 427
05ffdd7b
JC
428 atl1_clean_tx_ring(adapter);
429 atl1_clean_rx_ring(adapter);
f3cc28c7 430
05ffdd7b
JC
431 kfree(tpd_ring->buffer_info);
432 pci_free_consistent(pdev, ring_header->size, ring_header->desc,
433 ring_header->dma);
f3cc28c7 434
05ffdd7b
JC
435 tpd_ring->buffer_info = NULL;
436 tpd_ring->desc = NULL;
437 tpd_ring->dma = 0;
f3cc28c7 438
05ffdd7b
JC
439 rfd_ring->buffer_info = NULL;
440 rfd_ring->desc = NULL;
441 rfd_ring->dma = 0;
f3cc28c7 442
05ffdd7b
JC
443 rrd_ring->desc = NULL;
444 rrd_ring->dma = 0;
f3cc28c7
JC
445}
446
05ffdd7b 447static void atl1_setup_mac_ctrl(struct atl1_adapter *adapter)
f3cc28c7 448{
f3cc28c7 449 u32 value;
05ffdd7b
JC
450 struct atl1_hw *hw = &adapter->hw;
451 struct net_device *netdev = adapter->netdev;
452 /* Config MAC CTRL Register */
453 value = MAC_CTRL_TX_EN | MAC_CTRL_RX_EN;
454 /* duplex */
455 if (FULL_DUPLEX == adapter->link_duplex)
456 value |= MAC_CTRL_DUPLX;
457 /* speed */
458 value |= ((u32) ((SPEED_1000 == adapter->link_speed) ?
459 MAC_CTRL_SPEED_1000 : MAC_CTRL_SPEED_10_100) <<
460 MAC_CTRL_SPEED_SHIFT);
461 /* flow control */
462 value |= (MAC_CTRL_TX_FLOW | MAC_CTRL_RX_FLOW);
463 /* PAD & CRC */
464 value |= (MAC_CTRL_ADD_CRC | MAC_CTRL_PAD);
465 /* preamble length */
466 value |= (((u32) adapter->hw.preamble_len
467 & MAC_CTRL_PRMLEN_MASK) << MAC_CTRL_PRMLEN_SHIFT);
468 /* vlan */
469 if (adapter->vlgrp)
470 value |= MAC_CTRL_RMV_VLAN;
471 /* rx checksum
472 if (adapter->rx_csum)
473 value |= MAC_CTRL_RX_CHKSUM_EN;
474 */
475 /* filter mode */
476 value |= MAC_CTRL_BC_EN;
477 if (netdev->flags & IFF_PROMISC)
478 value |= MAC_CTRL_PROMIS_EN;
479 else if (netdev->flags & IFF_ALLMULTI)
480 value |= MAC_CTRL_MC_ALL_EN;
481 /* value |= MAC_CTRL_LOOPBACK; */
482 iowrite32(value, hw->hw_addr + REG_MAC_CTRL);
483}
f3cc28c7 484
05ffdd7b
JC
485/*
486 * atl1_set_mac - Change the Ethernet Address of the NIC
487 * @netdev: network interface device structure
488 * @p: pointer to an address structure
489 *
490 * Returns 0 on success, negative on failure
491 */
492static int atl1_set_mac(struct net_device *netdev, void *p)
493{
494 struct atl1_adapter *adapter = netdev_priv(netdev);
495 struct sockaddr *addr = p;
f3cc28c7 496
05ffdd7b
JC
497 if (netif_running(netdev))
498 return -EBUSY;
f3cc28c7 499
05ffdd7b
JC
500 if (!is_valid_ether_addr(addr->sa_data))
501 return -EADDRNOTAVAIL;
f3cc28c7 502
05ffdd7b
JC
503 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
504 memcpy(adapter->hw.mac_addr, addr->sa_data, netdev->addr_len);
f3cc28c7 505
05ffdd7b
JC
506 atl1_set_mac_addr(&adapter->hw);
507 return 0;
508}
f3cc28c7 509
05ffdd7b
JC
510static u32 atl1_check_link(struct atl1_adapter *adapter)
511{
512 struct atl1_hw *hw = &adapter->hw;
513 struct net_device *netdev = adapter->netdev;
514 u32 ret_val;
515 u16 speed, duplex, phy_data;
516 int reconfig = 0;
f3cc28c7 517
05ffdd7b
JC
518 /* MII_BMSR must read twice */
519 atl1_read_phy_reg(hw, MII_BMSR, &phy_data);
520 atl1_read_phy_reg(hw, MII_BMSR, &phy_data);
521 if (!(phy_data & BMSR_LSTATUS)) { /* link down */
522 if (netif_carrier_ok(netdev)) { /* old link state: Up */
523 dev_info(&adapter->pdev->dev, "link is down\n");
524 adapter->link_speed = SPEED_0;
525 netif_carrier_off(netdev);
526 netif_stop_queue(netdev);
f3cc28c7 527 }
05ffdd7b 528 return ATL1_SUCCESS;
f3cc28c7
JC
529 }
530
05ffdd7b
JC
531 /* Link Up */
532 ret_val = atl1_get_speed_and_duplex(hw, &speed, &duplex);
533 if (ret_val)
534 return ret_val;
f3cc28c7 535
05ffdd7b
JC
536 switch (hw->media_type) {
537 case MEDIA_TYPE_1000M_FULL:
538 if (speed != SPEED_1000 || duplex != FULL_DUPLEX)
539 reconfig = 1;
540 break;
541 case MEDIA_TYPE_100M_FULL:
542 if (speed != SPEED_100 || duplex != FULL_DUPLEX)
543 reconfig = 1;
544 break;
545 case MEDIA_TYPE_100M_HALF:
546 if (speed != SPEED_100 || duplex != HALF_DUPLEX)
547 reconfig = 1;
548 break;
549 case MEDIA_TYPE_10M_FULL:
550 if (speed != SPEED_10 || duplex != FULL_DUPLEX)
551 reconfig = 1;
552 break;
553 case MEDIA_TYPE_10M_HALF:
554 if (speed != SPEED_10 || duplex != HALF_DUPLEX)
555 reconfig = 1;
556 break;
557 }
f3cc28c7 558
05ffdd7b
JC
559 /* link result is our setting */
560 if (!reconfig) {
561 if (adapter->link_speed != speed
562 || adapter->link_duplex != duplex) {
563 adapter->link_speed = speed;
564 adapter->link_duplex = duplex;
565 atl1_setup_mac_ctrl(adapter);
566 dev_info(&adapter->pdev->dev,
567 "%s link is up %d Mbps %s\n",
568 netdev->name, adapter->link_speed,
569 adapter->link_duplex == FULL_DUPLEX ?
570 "full duplex" : "half duplex");
571 }
572 if (!netif_carrier_ok(netdev)) { /* Link down -> Up */
573 netif_carrier_on(netdev);
574 netif_wake_queue(netdev);
575 }
576 return ATL1_SUCCESS;
f3cc28c7 577 }
f3cc28c7 578
05ffdd7b
JC
579 /* change orignal link status */
580 if (netif_carrier_ok(netdev)) {
581 adapter->link_speed = SPEED_0;
582 netif_carrier_off(netdev);
583 netif_stop_queue(netdev);
f3cc28c7 584 }
f3cc28c7 585
05ffdd7b
JC
586 if (hw->media_type != MEDIA_TYPE_AUTO_SENSOR &&
587 hw->media_type != MEDIA_TYPE_1000M_FULL) {
588 switch (hw->media_type) {
589 case MEDIA_TYPE_100M_FULL:
590 phy_data = MII_CR_FULL_DUPLEX | MII_CR_SPEED_100 |
591 MII_CR_RESET;
592 break;
593 case MEDIA_TYPE_100M_HALF:
594 phy_data = MII_CR_SPEED_100 | MII_CR_RESET;
595 break;
596 case MEDIA_TYPE_10M_FULL:
597 phy_data =
598 MII_CR_FULL_DUPLEX | MII_CR_SPEED_10 | MII_CR_RESET;
599 break;
600 default: /* MEDIA_TYPE_10M_HALF: */
601 phy_data = MII_CR_SPEED_10 | MII_CR_RESET;
602 break;
f3cc28c7 603 }
05ffdd7b
JC
604 atl1_write_phy_reg(hw, MII_BMCR, phy_data);
605 return ATL1_SUCCESS;
f3cc28c7 606 }
f3cc28c7 607
05ffdd7b
JC
608 /* auto-neg, insert timer to re-config phy */
609 if (!adapter->phy_timer_pending) {
610 adapter->phy_timer_pending = true;
611 mod_timer(&adapter->phy_config_timer, jiffies + 3 * HZ);
f3cc28c7 612 }
f3cc28c7 613
05ffdd7b 614 return ATL1_SUCCESS;
f3cc28c7
JC
615}
616
617static void atl1_check_for_link(struct atl1_adapter *adapter)
618{
619 struct net_device *netdev = adapter->netdev;
620 u16 phy_data = 0;
621
622 spin_lock(&adapter->lock);
623 adapter->phy_timer_pending = false;
624 atl1_read_phy_reg(&adapter->hw, MII_BMSR, &phy_data);
625 atl1_read_phy_reg(&adapter->hw, MII_BMSR, &phy_data);
626 spin_unlock(&adapter->lock);
627
628 /* notify upper layer link down ASAP */
629 if (!(phy_data & BMSR_LSTATUS)) { /* Link Down */
630 if (netif_carrier_ok(netdev)) { /* old link state: Up */
1e006364
JC
631 dev_info(&adapter->pdev->dev, "%s link is down\n",
632 netdev->name);
f3cc28c7
JC
633 adapter->link_speed = SPEED_0;
634 netif_carrier_off(netdev);
635 netif_stop_queue(netdev);
636 }
637 }
638 schedule_work(&adapter->link_chg_task);
639}
640
05ffdd7b
JC
641/*
642 * atl1_set_multi - Multicast and Promiscuous mode set
643 * @netdev: network interface device structure
644 *
645 * The set_multi entry point is called whenever the multicast address
646 * list or the network interface flags are updated. This routine is
647 * responsible for configuring the hardware for proper multicast,
648 * promiscuous mode, and all-multi behavior.
649 */
650static void atl1_set_multi(struct net_device *netdev)
2ca13da7 651{
05ffdd7b
JC
652 struct atl1_adapter *adapter = netdev_priv(netdev);
653 struct atl1_hw *hw = &adapter->hw;
654 struct dev_mc_list *mc_ptr;
655 u32 rctl;
656 u32 hash_value;
2ca13da7 657
05ffdd7b
JC
658 /* Check for Promiscuous and All Multicast modes */
659 rctl = ioread32(hw->hw_addr + REG_MAC_CTRL);
660 if (netdev->flags & IFF_PROMISC)
661 rctl |= MAC_CTRL_PROMIS_EN;
662 else if (netdev->flags & IFF_ALLMULTI) {
663 rctl |= MAC_CTRL_MC_ALL_EN;
664 rctl &= ~MAC_CTRL_PROMIS_EN;
665 } else
666 rctl &= ~(MAC_CTRL_PROMIS_EN | MAC_CTRL_MC_ALL_EN);
667
668 iowrite32(rctl, hw->hw_addr + REG_MAC_CTRL);
669
670 /* clear the old settings from the multicast hash table */
671 iowrite32(0, hw->hw_addr + REG_RX_HASH_TABLE);
672 iowrite32(0, (hw->hw_addr + REG_RX_HASH_TABLE) + (1 << 2));
673
674 /* compute mc addresses' hash value ,and put it into hash table */
675 for (mc_ptr = netdev->mc_list; mc_ptr; mc_ptr = mc_ptr->next) {
676 hash_value = atl1_hash_mc_addr(hw, mc_ptr->dmi_addr);
677 atl1_hash_set(hw, hash_value);
678 }
2ca13da7
JC
679}
680
05ffdd7b
JC
681/*
682 * atl1_change_mtu - Change the Maximum Transfer Unit
683 * @netdev: network interface device structure
684 * @new_mtu: new value for maximum frame size
685 *
686 * Returns 0 on success, negative on failure
687 */
688static int atl1_change_mtu(struct net_device *netdev, int new_mtu)
f3cc28c7 689{
05ffdd7b
JC
690 struct atl1_adapter *adapter = netdev_priv(netdev);
691 int old_mtu = netdev->mtu;
a3093d9b 692 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN;
f3cc28c7 693
a3093d9b 694 if ((max_frame < ETH_ZLEN + ETH_FCS_LEN) ||
05ffdd7b
JC
695 (max_frame > MAX_JUMBO_FRAME_SIZE)) {
696 dev_warn(&adapter->pdev->dev, "invalid MTU setting\n");
697 return -EINVAL;
698 }
f3cc28c7 699
05ffdd7b
JC
700 adapter->hw.max_frame_size = max_frame;
701 adapter->hw.tx_jumbo_task_th = (max_frame + 7) >> 3;
702 adapter->rx_buffer_len = (max_frame + 7) & ~7;
703 adapter->hw.rx_jumbo_th = adapter->rx_buffer_len / 8;
f3cc28c7 704
05ffdd7b
JC
705 netdev->mtu = new_mtu;
706 if ((old_mtu != new_mtu) && netif_running(netdev)) {
707 atl1_down(adapter);
708 atl1_up(adapter);
709 }
f3cc28c7 710
05ffdd7b
JC
711 return 0;
712}
f3cc28c7 713
05ffdd7b
JC
714static void set_flow_ctrl_old(struct atl1_adapter *adapter)
715{
716 u32 hi, lo, value;
f3cc28c7 717
05ffdd7b
JC
718 /* RFD Flow Control */
719 value = adapter->rfd_ring.count;
720 hi = value / 16;
721 if (hi < 2)
722 hi = 2;
723 lo = value * 7 / 8;
f3cc28c7 724
05ffdd7b
JC
725 value = ((hi & RXQ_RXF_PAUSE_TH_HI_MASK) << RXQ_RXF_PAUSE_TH_HI_SHIFT) |
726 ((lo & RXQ_RXF_PAUSE_TH_LO_MASK) << RXQ_RXF_PAUSE_TH_LO_SHIFT);
727 iowrite32(value, adapter->hw.hw_addr + REG_RXQ_RXF_PAUSE_THRESH);
f3cc28c7 728
05ffdd7b
JC
729 /* RRD Flow Control */
730 value = adapter->rrd_ring.count;
731 lo = value / 16;
732 hi = value * 7 / 8;
733 if (lo < 2)
734 lo = 2;
735 value = ((hi & RXQ_RRD_PAUSE_TH_HI_MASK) << RXQ_RRD_PAUSE_TH_HI_SHIFT) |
736 ((lo & RXQ_RRD_PAUSE_TH_LO_MASK) << RXQ_RRD_PAUSE_TH_LO_SHIFT);
737 iowrite32(value, adapter->hw.hw_addr + REG_RXQ_RRD_PAUSE_THRESH);
738}
f3cc28c7 739
05ffdd7b
JC
740static void set_flow_ctrl_new(struct atl1_hw *hw)
741{
742 u32 hi, lo, value;
743
744 /* RXF Flow Control */
745 value = ioread32(hw->hw_addr + REG_SRAM_RXF_LEN);
746 lo = value / 16;
747 if (lo < 192)
748 lo = 192;
749 hi = value * 7 / 8;
750 if (hi < lo)
751 hi = lo + 16;
752 value = ((hi & RXQ_RXF_PAUSE_TH_HI_MASK) << RXQ_RXF_PAUSE_TH_HI_SHIFT) |
753 ((lo & RXQ_RXF_PAUSE_TH_LO_MASK) << RXQ_RXF_PAUSE_TH_LO_SHIFT);
754 iowrite32(value, hw->hw_addr + REG_RXQ_RXF_PAUSE_THRESH);
755
756 /* RRD Flow Control */
757 value = ioread32(hw->hw_addr + REG_SRAM_RRD_LEN);
758 lo = value / 8;
759 hi = value * 7 / 8;
760 if (lo < 2)
761 lo = 2;
762 if (hi < lo)
763 hi = lo + 3;
764 value = ((hi & RXQ_RRD_PAUSE_TH_HI_MASK) << RXQ_RRD_PAUSE_TH_HI_SHIFT) |
765 ((lo & RXQ_RRD_PAUSE_TH_LO_MASK) << RXQ_RRD_PAUSE_TH_LO_SHIFT);
766 iowrite32(value, hw->hw_addr + REG_RXQ_RRD_PAUSE_THRESH);
767}
768
769/*
770 * atl1_configure - Configure Transmit&Receive Unit after Reset
771 * @adapter: board private structure
772 *
773 * Configure the Tx /Rx unit of the MAC after a reset.
774 */
775static u32 atl1_configure(struct atl1_adapter *adapter)
776{
777 struct atl1_hw *hw = &adapter->hw;
778 u32 value;
779
780 /* clear interrupt status */
781 iowrite32(0xffffffff, adapter->hw.hw_addr + REG_ISR);
782
783 /* set MAC Address */
784 value = (((u32) hw->mac_addr[2]) << 24) |
785 (((u32) hw->mac_addr[3]) << 16) |
786 (((u32) hw->mac_addr[4]) << 8) |
787 (((u32) hw->mac_addr[5]));
788 iowrite32(value, hw->hw_addr + REG_MAC_STA_ADDR);
789 value = (((u32) hw->mac_addr[0]) << 8) | (((u32) hw->mac_addr[1]));
790 iowrite32(value, hw->hw_addr + (REG_MAC_STA_ADDR + 4));
791
792 /* tx / rx ring */
f3cc28c7 793
05ffdd7b
JC
794 /* HI base address */
795 iowrite32((u32) ((adapter->tpd_ring.dma & 0xffffffff00000000ULL) >> 32),
796 hw->hw_addr + REG_DESC_BASE_ADDR_HI);
797 /* LO base address */
798 iowrite32((u32) (adapter->rfd_ring.dma & 0x00000000ffffffffULL),
799 hw->hw_addr + REG_DESC_RFD_ADDR_LO);
800 iowrite32((u32) (adapter->rrd_ring.dma & 0x00000000ffffffffULL),
801 hw->hw_addr + REG_DESC_RRD_ADDR_LO);
802 iowrite32((u32) (adapter->tpd_ring.dma & 0x00000000ffffffffULL),
803 hw->hw_addr + REG_DESC_TPD_ADDR_LO);
804 iowrite32((u32) (adapter->cmb.dma & 0x00000000ffffffffULL),
805 hw->hw_addr + REG_DESC_CMB_ADDR_LO);
806 iowrite32((u32) (adapter->smb.dma & 0x00000000ffffffffULL),
807 hw->hw_addr + REG_DESC_SMB_ADDR_LO);
f3cc28c7 808
05ffdd7b
JC
809 /* element count */
810 value = adapter->rrd_ring.count;
811 value <<= 16;
812 value += adapter->rfd_ring.count;
813 iowrite32(value, hw->hw_addr + REG_DESC_RFD_RRD_RING_SIZE);
814 iowrite32(adapter->tpd_ring.count, hw->hw_addr +
815 REG_DESC_TPD_RING_SIZE);
f3cc28c7 816
05ffdd7b
JC
817 /* Load Ptr */
818 iowrite32(1, hw->hw_addr + REG_LOAD_PTR);
f3cc28c7 819
05ffdd7b
JC
820 /* config Mailbox */
821 value = ((atomic_read(&adapter->tpd_ring.next_to_use)
822 & MB_TPD_PROD_INDX_MASK) << MB_TPD_PROD_INDX_SHIFT) |
823 ((atomic_read(&adapter->rrd_ring.next_to_clean)
824 & MB_RRD_CONS_INDX_MASK) << MB_RRD_CONS_INDX_SHIFT) |
825 ((atomic_read(&adapter->rfd_ring.next_to_use)
826 & MB_RFD_PROD_INDX_MASK) << MB_RFD_PROD_INDX_SHIFT);
827 iowrite32(value, hw->hw_addr + REG_MAILBOX);
f3cc28c7 828
05ffdd7b
JC
829 /* config IPG/IFG */
830 value = (((u32) hw->ipgt & MAC_IPG_IFG_IPGT_MASK)
831 << MAC_IPG_IFG_IPGT_SHIFT) |
832 (((u32) hw->min_ifg & MAC_IPG_IFG_MIFG_MASK)
833 << MAC_IPG_IFG_MIFG_SHIFT) |
834 (((u32) hw->ipgr1 & MAC_IPG_IFG_IPGR1_MASK)
835 << MAC_IPG_IFG_IPGR1_SHIFT) |
836 (((u32) hw->ipgr2 & MAC_IPG_IFG_IPGR2_MASK)
837 << MAC_IPG_IFG_IPGR2_SHIFT);
838 iowrite32(value, hw->hw_addr + REG_MAC_IPG_IFG);
f3cc28c7 839
05ffdd7b
JC
840 /* config Half-Duplex Control */
841 value = ((u32) hw->lcol & MAC_HALF_DUPLX_CTRL_LCOL_MASK) |
842 (((u32) hw->max_retry & MAC_HALF_DUPLX_CTRL_RETRY_MASK)
843 << MAC_HALF_DUPLX_CTRL_RETRY_SHIFT) |
844 MAC_HALF_DUPLX_CTRL_EXC_DEF_EN |
845 (0xa << MAC_HALF_DUPLX_CTRL_ABEBT_SHIFT) |
846 (((u32) hw->jam_ipg & MAC_HALF_DUPLX_CTRL_JAMIPG_MASK)
847 << MAC_HALF_DUPLX_CTRL_JAMIPG_SHIFT);
848 iowrite32(value, hw->hw_addr + REG_MAC_HALF_DUPLX_CTRL);
f3cc28c7 849
05ffdd7b
JC
850 /* set Interrupt Moderator Timer */
851 iowrite16(adapter->imt, hw->hw_addr + REG_IRQ_MODU_TIMER_INIT);
852 iowrite32(MASTER_CTRL_ITIMER_EN, hw->hw_addr + REG_MASTER_CTRL);
f3cc28c7 853
05ffdd7b
JC
854 /* set Interrupt Clear Timer */
855 iowrite16(adapter->ict, hw->hw_addr + REG_CMBDISDMA_TIMER);
f3cc28c7 856
05ffdd7b
JC
857 /* set MTU, 4 : VLAN */
858 iowrite32(hw->max_frame_size + 4, hw->hw_addr + REG_MTU);
f3cc28c7 859
05ffdd7b
JC
860 /* jumbo size & rrd retirement timer */
861 value = (((u32) hw->rx_jumbo_th & RXQ_JMBOSZ_TH_MASK)
862 << RXQ_JMBOSZ_TH_SHIFT) |
863 (((u32) hw->rx_jumbo_lkah & RXQ_JMBO_LKAH_MASK)
864 << RXQ_JMBO_LKAH_SHIFT) |
865 (((u32) hw->rrd_ret_timer & RXQ_RRD_TIMER_MASK)
866 << RXQ_RRD_TIMER_SHIFT);
867 iowrite32(value, hw->hw_addr + REG_RXQ_JMBOSZ_RRDTIM);
f3cc28c7 868
05ffdd7b
JC
869 /* Flow Control */
870 switch (hw->dev_rev) {
871 case 0x8001:
872 case 0x9001:
873 case 0x9002:
874 case 0x9003:
875 set_flow_ctrl_old(adapter);
876 break;
877 default:
878 set_flow_ctrl_new(hw);
879 break;
f3cc28c7 880 }
f3cc28c7 881
05ffdd7b
JC
882 /* config TXQ */
883 value = (((u32) hw->tpd_burst & TXQ_CTRL_TPD_BURST_NUM_MASK)
884 << TXQ_CTRL_TPD_BURST_NUM_SHIFT) |
885 (((u32) hw->txf_burst & TXQ_CTRL_TXF_BURST_NUM_MASK)
886 << TXQ_CTRL_TXF_BURST_NUM_SHIFT) |
887 (((u32) hw->tpd_fetch_th & TXQ_CTRL_TPD_FETCH_TH_MASK)
888 << TXQ_CTRL_TPD_FETCH_TH_SHIFT) | TXQ_CTRL_ENH_MODE |
889 TXQ_CTRL_EN;
890 iowrite32(value, hw->hw_addr + REG_TXQ_CTRL);
f3cc28c7 891
05ffdd7b
JC
892 /* min tpd fetch gap & tx jumbo packet size threshold for taskoffload */
893 value = (((u32) hw->tx_jumbo_task_th & TX_JUMBO_TASK_TH_MASK)
894 << TX_JUMBO_TASK_TH_SHIFT) |
895 (((u32) hw->tpd_fetch_gap & TX_TPD_MIN_IPG_MASK)
896 << TX_TPD_MIN_IPG_SHIFT);
897 iowrite32(value, hw->hw_addr + REG_TX_JUMBO_TASK_TH_TPD_IPG);
f3cc28c7 898
05ffdd7b
JC
899 /* config RXQ */
900 value = (((u32) hw->rfd_burst & RXQ_CTRL_RFD_BURST_NUM_MASK)
901 << RXQ_CTRL_RFD_BURST_NUM_SHIFT) |
902 (((u32) hw->rrd_burst & RXQ_CTRL_RRD_BURST_THRESH_MASK)
903 << RXQ_CTRL_RRD_BURST_THRESH_SHIFT) |
904 (((u32) hw->rfd_fetch_gap & RXQ_CTRL_RFD_PREF_MIN_IPG_MASK)
905 << RXQ_CTRL_RFD_PREF_MIN_IPG_SHIFT) | RXQ_CTRL_CUT_THRU_EN |
906 RXQ_CTRL_EN;
907 iowrite32(value, hw->hw_addr + REG_RXQ_CTRL);
f3cc28c7 908
05ffdd7b
JC
909 /* config DMA Engine */
910 value = ((((u32) hw->dmar_block) & DMA_CTRL_DMAR_BURST_LEN_MASK)
911 << DMA_CTRL_DMAR_BURST_LEN_SHIFT) |
3f516c00
JC
912 ((((u32) hw->dmaw_block) & DMA_CTRL_DMAW_BURST_LEN_MASK)
913 << DMA_CTRL_DMAW_BURST_LEN_SHIFT) | DMA_CTRL_DMAR_EN |
05ffdd7b
JC
914 DMA_CTRL_DMAW_EN;
915 value |= (u32) hw->dma_ord;
916 if (atl1_rcb_128 == hw->rcb_value)
917 value |= DMA_CTRL_RCB_VALUE;
918 iowrite32(value, hw->hw_addr + REG_DMA_CTRL);
f3cc28c7 919
05ffdd7b 920 /* config CMB / SMB */
91a500ac
JC
921 value = (hw->cmb_tpd > adapter->tpd_ring.count) ?
922 hw->cmb_tpd : adapter->tpd_ring.count;
923 value <<= 16;
924 value |= hw->cmb_rrd;
05ffdd7b
JC
925 iowrite32(value, hw->hw_addr + REG_CMB_WRITE_TH);
926 value = hw->cmb_rx_timer | ((u32) hw->cmb_tx_timer << 16);
927 iowrite32(value, hw->hw_addr + REG_CMB_WRITE_TIMER);
928 iowrite32(hw->smb_timer, hw->hw_addr + REG_SMB_TIMER);
f3cc28c7 929
05ffdd7b
JC
930 /* --- enable CMB / SMB */
931 value = CSMB_CTRL_CMB_EN | CSMB_CTRL_SMB_EN;
932 iowrite32(value, hw->hw_addr + REG_CSMB_CTRL);
f3cc28c7 933
05ffdd7b
JC
934 value = ioread32(adapter->hw.hw_addr + REG_ISR);
935 if (unlikely((value & ISR_PHY_LINKDOWN) != 0))
936 value = 1; /* config failed */
937 else
938 value = 0;
f3cc28c7 939
05ffdd7b
JC
940 /* clear all interrupt status */
941 iowrite32(0x3fffffff, adapter->hw.hw_addr + REG_ISR);
942 iowrite32(0, adapter->hw.hw_addr + REG_ISR);
943 return value;
f3cc28c7 944}
f3cc28c7 945
05ffdd7b
JC
946/*
947 * atl1_pcie_patch - Patch for PCIE module
948 */
949static void atl1_pcie_patch(struct atl1_adapter *adapter)
f3cc28c7 950{
05ffdd7b 951 u32 value;
f3cc28c7 952
05ffdd7b
JC
953 /* much vendor magic here */
954 value = 0x6500;
955 iowrite32(value, adapter->hw.hw_addr + 0x12FC);
956 /* pcie flow control mode change */
957 value = ioread32(adapter->hw.hw_addr + 0x1008);
958 value |= 0x8000;
959 iowrite32(value, adapter->hw.hw_addr + 0x1008);
f3cc28c7 960}
f3cc28c7 961
f3cc28c7 962/*
05ffdd7b
JC
963 * When ACPI resume on some VIA MotherBoard, the Interrupt Disable bit/0x400
964 * on PCI Command register is disable.
965 * The function enable this bit.
966 * Brackett, 2006/03/15
f3cc28c7 967 */
05ffdd7b 968static void atl1_via_workaround(struct atl1_adapter *adapter)
f3cc28c7 969{
05ffdd7b 970 unsigned long value;
f3cc28c7 971
05ffdd7b
JC
972 value = ioread16(adapter->hw.hw_addr + PCI_COMMAND);
973 if (value & PCI_COMMAND_INTX_DISABLE)
974 value &= ~PCI_COMMAND_INTX_DISABLE;
975 iowrite32(value, adapter->hw.hw_addr + PCI_COMMAND);
f3cc28c7
JC
976}
977
978/*
05ffdd7b
JC
979 * atl1_irq_enable - Enable default interrupt generation settings
980 * @adapter: board private structure
f3cc28c7 981 */
05ffdd7b 982static void atl1_irq_enable(struct atl1_adapter *adapter)
f3cc28c7 983{
05ffdd7b
JC
984 iowrite32(IMR_NORMAL_MASK, adapter->hw.hw_addr + REG_IMR);
985 ioread32(adapter->hw.hw_addr + REG_IMR);
986}
f3cc28c7 987
05ffdd7b
JC
988/*
989 * atl1_irq_disable - Mask off interrupt generation on the NIC
990 * @adapter: board private structure
991 */
992static void atl1_irq_disable(struct atl1_adapter *adapter)
993{
994 iowrite32(0, adapter->hw.hw_addr + REG_IMR);
995 ioread32(adapter->hw.hw_addr + REG_IMR);
996 synchronize_irq(adapter->pdev->irq);
997}
f3cc28c7 998
05ffdd7b
JC
999static void atl1_clear_phy_int(struct atl1_adapter *adapter)
1000{
1001 u16 phy_data;
1002 unsigned long flags;
f3cc28c7 1003
05ffdd7b
JC
1004 spin_lock_irqsave(&adapter->lock, flags);
1005 atl1_read_phy_reg(&adapter->hw, 19, &phy_data);
1006 spin_unlock_irqrestore(&adapter->lock, flags);
1007}
f3cc28c7 1008
05ffdd7b
JC
1009static void atl1_inc_smb(struct atl1_adapter *adapter)
1010{
1011 struct stats_msg_block *smb = adapter->smb.smb;
f3cc28c7 1012
05ffdd7b
JC
1013 /* Fill out the OS statistics structure */
1014 adapter->soft_stats.rx_packets += smb->rx_ok;
1015 adapter->soft_stats.tx_packets += smb->tx_ok;
1016 adapter->soft_stats.rx_bytes += smb->rx_byte_cnt;
1017 adapter->soft_stats.tx_bytes += smb->tx_byte_cnt;
1018 adapter->soft_stats.multicast += smb->rx_mcast;
1019 adapter->soft_stats.collisions += (smb->tx_1_col + smb->tx_2_col * 2 +
1020 smb->tx_late_col + smb->tx_abort_col * adapter->hw.max_retry);
f3cc28c7 1021
05ffdd7b
JC
1022 /* Rx Errors */
1023 adapter->soft_stats.rx_errors += (smb->rx_frag + smb->rx_fcs_err +
1024 smb->rx_len_err + smb->rx_sz_ov + smb->rx_rxf_ov +
1025 smb->rx_rrd_ov + smb->rx_align_err);
1026 adapter->soft_stats.rx_fifo_errors += smb->rx_rxf_ov;
1027 adapter->soft_stats.rx_length_errors += smb->rx_len_err;
1028 adapter->soft_stats.rx_crc_errors += smb->rx_fcs_err;
1029 adapter->soft_stats.rx_frame_errors += smb->rx_align_err;
1030 adapter->soft_stats.rx_missed_errors += (smb->rx_rrd_ov +
1031 smb->rx_rxf_ov);
f3cc28c7 1032
05ffdd7b
JC
1033 adapter->soft_stats.rx_pause += smb->rx_pause;
1034 adapter->soft_stats.rx_rrd_ov += smb->rx_rrd_ov;
1035 adapter->soft_stats.rx_trunc += smb->rx_sz_ov;
f3cc28c7 1036
05ffdd7b
JC
1037 /* Tx Errors */
1038 adapter->soft_stats.tx_errors += (smb->tx_late_col +
1039 smb->tx_abort_col + smb->tx_underrun + smb->tx_trunc);
1040 adapter->soft_stats.tx_fifo_errors += smb->tx_underrun;
1041 adapter->soft_stats.tx_aborted_errors += smb->tx_abort_col;
1042 adapter->soft_stats.tx_window_errors += smb->tx_late_col;
f3cc28c7 1043
05ffdd7b
JC
1044 adapter->soft_stats.excecol += smb->tx_abort_col;
1045 adapter->soft_stats.deffer += smb->tx_defer;
1046 adapter->soft_stats.scc += smb->tx_1_col;
1047 adapter->soft_stats.mcc += smb->tx_2_col;
1048 adapter->soft_stats.latecol += smb->tx_late_col;
1049 adapter->soft_stats.tx_underun += smb->tx_underrun;
1050 adapter->soft_stats.tx_trunc += smb->tx_trunc;
1051 adapter->soft_stats.tx_pause += smb->tx_pause;
f3cc28c7 1052
05ffdd7b
JC
1053 adapter->net_stats.rx_packets = adapter->soft_stats.rx_packets;
1054 adapter->net_stats.tx_packets = adapter->soft_stats.tx_packets;
1055 adapter->net_stats.rx_bytes = adapter->soft_stats.rx_bytes;
1056 adapter->net_stats.tx_bytes = adapter->soft_stats.tx_bytes;
1057 adapter->net_stats.multicast = adapter->soft_stats.multicast;
1058 adapter->net_stats.collisions = adapter->soft_stats.collisions;
1059 adapter->net_stats.rx_errors = adapter->soft_stats.rx_errors;
1060 adapter->net_stats.rx_over_errors =
1061 adapter->soft_stats.rx_missed_errors;
1062 adapter->net_stats.rx_length_errors =
1063 adapter->soft_stats.rx_length_errors;
1064 adapter->net_stats.rx_crc_errors = adapter->soft_stats.rx_crc_errors;
1065 adapter->net_stats.rx_frame_errors =
1066 adapter->soft_stats.rx_frame_errors;
1067 adapter->net_stats.rx_fifo_errors = adapter->soft_stats.rx_fifo_errors;
1068 adapter->net_stats.rx_missed_errors =
1069 adapter->soft_stats.rx_missed_errors;
1070 adapter->net_stats.tx_errors = adapter->soft_stats.tx_errors;
1071 adapter->net_stats.tx_fifo_errors = adapter->soft_stats.tx_fifo_errors;
1072 adapter->net_stats.tx_aborted_errors =
1073 adapter->soft_stats.tx_aborted_errors;
1074 adapter->net_stats.tx_window_errors =
1075 adapter->soft_stats.tx_window_errors;
1076 adapter->net_stats.tx_carrier_errors =
1077 adapter->soft_stats.tx_carrier_errors;
f3cc28c7
JC
1078}
1079
f3cc28c7 1080/*
05ffdd7b 1081 * atl1_get_stats - Get System Network Statistics
f3cc28c7
JC
1082 * @netdev: network interface device structure
1083 *
05ffdd7b
JC
1084 * Returns the address of the device statistics structure.
1085 * The statistics are actually updated from the timer callback.
f3cc28c7 1086 */
05ffdd7b 1087static struct net_device_stats *atl1_get_stats(struct net_device *netdev)
f3cc28c7
JC
1088{
1089 struct atl1_adapter *adapter = netdev_priv(netdev);
05ffdd7b
JC
1090 return &adapter->net_stats;
1091}
f3cc28c7 1092
05ffdd7b 1093static void atl1_update_mailbox(struct atl1_adapter *adapter)
f3cc28c7 1094{
05ffdd7b
JC
1095 unsigned long flags;
1096 u32 tpd_next_to_use;
1097 u32 rfd_next_to_use;
1098 u32 rrd_next_to_clean;
f3cc28c7 1099 u32 value;
f3cc28c7 1100
05ffdd7b 1101 spin_lock_irqsave(&adapter->mb_lock, flags);
f3cc28c7 1102
05ffdd7b
JC
1103 tpd_next_to_use = atomic_read(&adapter->tpd_ring.next_to_use);
1104 rfd_next_to_use = atomic_read(&adapter->rfd_ring.next_to_use);
1105 rrd_next_to_clean = atomic_read(&adapter->rrd_ring.next_to_clean);
f3cc28c7 1106
05ffdd7b
JC
1107 value = ((rfd_next_to_use & MB_RFD_PROD_INDX_MASK) <<
1108 MB_RFD_PROD_INDX_SHIFT) |
1109 ((rrd_next_to_clean & MB_RRD_CONS_INDX_MASK) <<
1110 MB_RRD_CONS_INDX_SHIFT) |
1111 ((tpd_next_to_use & MB_TPD_PROD_INDX_MASK) <<
1112 MB_TPD_PROD_INDX_SHIFT);
1113 iowrite32(value, adapter->hw.hw_addr + REG_MAILBOX);
f3cc28c7 1114
05ffdd7b 1115 spin_unlock_irqrestore(&adapter->mb_lock, flags);
f3cc28c7
JC
1116}
1117
05ffdd7b
JC
1118static void atl1_clean_alloc_flag(struct atl1_adapter *adapter,
1119 struct rx_return_desc *rrd, u16 offset)
f3cc28c7 1120{
05ffdd7b 1121 struct atl1_rfd_ring *rfd_ring = &adapter->rfd_ring;
f3cc28c7 1122
05ffdd7b
JC
1123 while (rfd_ring->next_to_clean != (rrd->buf_indx + offset)) {
1124 rfd_ring->buffer_info[rfd_ring->next_to_clean].alloced = 0;
1125 if (++rfd_ring->next_to_clean == rfd_ring->count) {
1126 rfd_ring->next_to_clean = 0;
f3cc28c7 1127 }
f3cc28c7 1128 }
05ffdd7b 1129}
f3cc28c7 1130
05ffdd7b
JC
1131static void atl1_update_rfd_index(struct atl1_adapter *adapter,
1132 struct rx_return_desc *rrd)
1133{
1134 u16 num_buf;
f3cc28c7 1135
05ffdd7b
JC
1136 num_buf = (rrd->xsz.xsum_sz.pkt_size + adapter->rx_buffer_len - 1) /
1137 adapter->rx_buffer_len;
1138 if (rrd->num_buf == num_buf)
1139 /* clean alloc flag for bad rrd */
1140 atl1_clean_alloc_flag(adapter, rrd, num_buf);
1141}
f3cc28c7 1142
05ffdd7b
JC
1143static void atl1_rx_checksum(struct atl1_adapter *adapter,
1144 struct rx_return_desc *rrd, struct sk_buff *skb)
1145{
1146 struct pci_dev *pdev = adapter->pdev;
f3cc28c7 1147
05ffdd7b 1148 skb->ip_summed = CHECKSUM_NONE;
f3cc28c7 1149
05ffdd7b
JC
1150 if (unlikely(rrd->pkt_flg & PACKET_FLAG_ERR)) {
1151 if (rrd->err_flg & (ERR_FLAG_CRC | ERR_FLAG_TRUNC |
1152 ERR_FLAG_CODE | ERR_FLAG_OV)) {
1153 adapter->hw_csum_err++;
1154 dev_printk(KERN_DEBUG, &pdev->dev,
1155 "rx checksum error\n");
1156 return;
f3cc28c7 1157 }
f3cc28c7
JC
1158 }
1159
05ffdd7b
JC
1160 /* not IPv4 */
1161 if (!(rrd->pkt_flg & PACKET_FLAG_IPV4))
1162 /* checksum is invalid, but it's not an IPv4 pkt, so ok */
1163 return;
1164
1165 /* IPv4 packet */
1166 if (likely(!(rrd->err_flg &
1167 (ERR_FLAG_IP_CHKSUM | ERR_FLAG_L4_CHKSUM)))) {
1168 skb->ip_summed = CHECKSUM_UNNECESSARY;
1169 adapter->hw_csum_good++;
1170 return;
f3cc28c7
JC
1171 }
1172
05ffdd7b
JC
1173 /* IPv4, but hardware thinks its checksum is wrong */
1174 dev_printk(KERN_DEBUG, &pdev->dev,
1175 "hw csum wrong, pkt_flag:%x, err_flag:%x\n",
1176 rrd->pkt_flg, rrd->err_flg);
1177 skb->ip_summed = CHECKSUM_COMPLETE;
1178 skb->csum = htons(rrd->xsz.xsum_sz.rx_chksum);
1179 adapter->hw_csum_err++;
1180 return;
f3cc28c7
JC
1181}
1182
05ffdd7b
JC
1183/*
1184 * atl1_alloc_rx_buffers - Replace used receive buffers
1185 * @adapter: address of board private structure
1186 */
1187static u16 atl1_alloc_rx_buffers(struct atl1_adapter *adapter)
f3cc28c7 1188{
05ffdd7b
JC
1189 struct atl1_rfd_ring *rfd_ring = &adapter->rfd_ring;
1190 struct pci_dev *pdev = adapter->pdev;
1191 struct page *page;
1192 unsigned long offset;
1193 struct atl1_buffer *buffer_info, *next_info;
1194 struct sk_buff *skb;
1195 u16 num_alloc = 0;
1196 u16 rfd_next_to_use, next_next;
1197 struct rx_free_desc *rfd_desc;
f3cc28c7 1198
05ffdd7b
JC
1199 next_next = rfd_next_to_use = atomic_read(&rfd_ring->next_to_use);
1200 if (++next_next == rfd_ring->count)
1201 next_next = 0;
1202 buffer_info = &rfd_ring->buffer_info[rfd_next_to_use];
1203 next_info = &rfd_ring->buffer_info[next_next];
f3cc28c7 1204
05ffdd7b
JC
1205 while (!buffer_info->alloced && !next_info->alloced) {
1206 if (buffer_info->skb) {
1207 buffer_info->alloced = 1;
1208 goto next;
1209 }
f3cc28c7 1210
05ffdd7b 1211 rfd_desc = ATL1_RFD_DESC(rfd_ring, rfd_next_to_use);
f3cc28c7 1212
05ffdd7b
JC
1213 skb = dev_alloc_skb(adapter->rx_buffer_len + NET_IP_ALIGN);
1214 if (unlikely(!skb)) { /* Better luck next round */
1215 adapter->net_stats.rx_dropped++;
1216 break;
1217 }
f3cc28c7 1218
05ffdd7b
JC
1219 /*
1220 * Make buffer alignment 2 beyond a 16 byte boundary
1221 * this will result in a 16 byte aligned IP header after
1222 * the 14 byte MAC header is removed
1223 */
1224 skb_reserve(skb, NET_IP_ALIGN);
f3cc28c7 1225
05ffdd7b
JC
1226 buffer_info->alloced = 1;
1227 buffer_info->skb = skb;
1228 buffer_info->length = (u16) adapter->rx_buffer_len;
1229 page = virt_to_page(skb->data);
1230 offset = (unsigned long)skb->data & ~PAGE_MASK;
1231 buffer_info->dma = pci_map_page(pdev, page, offset,
1232 adapter->rx_buffer_len,
1233 PCI_DMA_FROMDEVICE);
1234 rfd_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
1235 rfd_desc->buf_len = cpu_to_le16(adapter->rx_buffer_len);
1236 rfd_desc->coalese = 0;
f3cc28c7 1237
05ffdd7b
JC
1238next:
1239 rfd_next_to_use = next_next;
1240 if (unlikely(++next_next == rfd_ring->count))
1241 next_next = 0;
f3cc28c7 1242
05ffdd7b
JC
1243 buffer_info = &rfd_ring->buffer_info[rfd_next_to_use];
1244 next_info = &rfd_ring->buffer_info[next_next];
1245 num_alloc++;
1246 }
f3cc28c7 1247
05ffdd7b
JC
1248 if (num_alloc) {
1249 /*
1250 * Force memory writes to complete before letting h/w
1251 * know there are new descriptors to fetch. (Only
1252 * applicable for weak-ordered memory model archs,
1253 * such as IA-64).
1254 */
1255 wmb();
1256 atomic_set(&rfd_ring->next_to_use, (int)rfd_next_to_use);
1257 }
1258 return num_alloc;
f3cc28c7
JC
1259}
1260
05ffdd7b 1261static void atl1_intr_rx(struct atl1_adapter *adapter)
f3cc28c7 1262{
05ffdd7b
JC
1263 int i, count;
1264 u16 length;
1265 u16 rrd_next_to_clean;
f3cc28c7 1266 u32 value;
05ffdd7b
JC
1267 struct atl1_rfd_ring *rfd_ring = &adapter->rfd_ring;
1268 struct atl1_rrd_ring *rrd_ring = &adapter->rrd_ring;
1269 struct atl1_buffer *buffer_info;
1270 struct rx_return_desc *rrd;
1271 struct sk_buff *skb;
f3cc28c7 1272
05ffdd7b 1273 count = 0;
f3cc28c7 1274
05ffdd7b 1275 rrd_next_to_clean = atomic_read(&rrd_ring->next_to_clean);
f3cc28c7 1276
05ffdd7b
JC
1277 while (1) {
1278 rrd = ATL1_RRD_DESC(rrd_ring, rrd_next_to_clean);
1279 i = 1;
1280 if (likely(rrd->xsz.valid)) { /* packet valid */
1281chk_rrd:
1282 /* check rrd status */
1283 if (likely(rrd->num_buf == 1))
1284 goto rrd_ok;
f3cc28c7 1285
05ffdd7b
JC
1286 /* rrd seems to be bad */
1287 if (unlikely(i-- > 0)) {
1288 /* rrd may not be DMAed completely */
1289 dev_printk(KERN_DEBUG, &adapter->pdev->dev,
1290 "incomplete RRD DMA transfer\n");
1291 udelay(1);
1292 goto chk_rrd;
1293 }
1294 /* bad rrd */
1295 dev_printk(KERN_DEBUG, &adapter->pdev->dev,
1296 "bad RRD\n");
1297 /* see if update RFD index */
1298 if (rrd->num_buf > 1)
1299 atl1_update_rfd_index(adapter, rrd);
f3cc28c7 1300
05ffdd7b
JC
1301 /* update rrd */
1302 rrd->xsz.valid = 0;
1303 if (++rrd_next_to_clean == rrd_ring->count)
1304 rrd_next_to_clean = 0;
1305 count++;
1306 continue;
1307 } else { /* current rrd still not be updated */
f3cc28c7 1308
05ffdd7b
JC
1309 break;
1310 }
1311rrd_ok:
1312 /* clean alloc flag for bad rrd */
1313 atl1_clean_alloc_flag(adapter, rrd, 0);
f3cc28c7 1314
05ffdd7b
JC
1315 buffer_info = &rfd_ring->buffer_info[rrd->buf_indx];
1316 if (++rfd_ring->next_to_clean == rfd_ring->count)
1317 rfd_ring->next_to_clean = 0;
f3cc28c7 1318
05ffdd7b
JC
1319 /* update rrd next to clean */
1320 if (++rrd_next_to_clean == rrd_ring->count)
1321 rrd_next_to_clean = 0;
1322 count++;
f3cc28c7 1323
05ffdd7b
JC
1324 if (unlikely(rrd->pkt_flg & PACKET_FLAG_ERR)) {
1325 if (!(rrd->err_flg &
1326 (ERR_FLAG_IP_CHKSUM | ERR_FLAG_L4_CHKSUM
1327 | ERR_FLAG_LEN))) {
1328 /* packet error, don't need upstream */
1329 buffer_info->alloced = 0;
1330 rrd->xsz.valid = 0;
1331 continue;
1332 }
1333 }
f3cc28c7 1334
05ffdd7b
JC
1335 /* Good Receive */
1336 pci_unmap_page(adapter->pdev, buffer_info->dma,
1337 buffer_info->length, PCI_DMA_FROMDEVICE);
1338 skb = buffer_info->skb;
1339 length = le16_to_cpu(rrd->xsz.xsum_sz.pkt_size);
f3cc28c7 1340
a3093d9b 1341 skb_put(skb, length - ETH_FCS_LEN);
f3cc28c7 1342
05ffdd7b
JC
1343 /* Receive Checksum Offload */
1344 atl1_rx_checksum(adapter, rrd, skb);
1345 skb->protocol = eth_type_trans(skb, adapter->netdev);
f3cc28c7 1346
05ffdd7b
JC
1347 if (adapter->vlgrp && (rrd->pkt_flg & PACKET_FLAG_VLAN_INS)) {
1348 u16 vlan_tag = (rrd->vlan_tag >> 4) |
1349 ((rrd->vlan_tag & 7) << 13) |
1350 ((rrd->vlan_tag & 8) << 9);
1351 vlan_hwaccel_rx(skb, adapter->vlgrp, vlan_tag);
1352 } else
1353 netif_rx(skb);
f3cc28c7 1354
05ffdd7b
JC
1355 /* let protocol layer free skb */
1356 buffer_info->skb = NULL;
1357 buffer_info->alloced = 0;
1358 rrd->xsz.valid = 0;
f3cc28c7 1359
05ffdd7b
JC
1360 adapter->netdev->last_rx = jiffies;
1361 }
f3cc28c7 1362
05ffdd7b 1363 atomic_set(&rrd_ring->next_to_clean, rrd_next_to_clean);
f3cc28c7 1364
05ffdd7b 1365 atl1_alloc_rx_buffers(adapter);
f3cc28c7 1366
05ffdd7b
JC
1367 /* update mailbox ? */
1368 if (count) {
1369 u32 tpd_next_to_use;
1370 u32 rfd_next_to_use;
1371 u32 rrd_next_to_clean;
f3cc28c7 1372
05ffdd7b 1373 spin_lock(&adapter->mb_lock);
f3cc28c7 1374
05ffdd7b
JC
1375 tpd_next_to_use = atomic_read(&adapter->tpd_ring.next_to_use);
1376 rfd_next_to_use =
1377 atomic_read(&adapter->rfd_ring.next_to_use);
1378 rrd_next_to_clean =
1379 atomic_read(&adapter->rrd_ring.next_to_clean);
1380 value = ((rfd_next_to_use & MB_RFD_PROD_INDX_MASK) <<
1381 MB_RFD_PROD_INDX_SHIFT) |
1382 ((rrd_next_to_clean & MB_RRD_CONS_INDX_MASK) <<
1383 MB_RRD_CONS_INDX_SHIFT) |
1384 ((tpd_next_to_use & MB_TPD_PROD_INDX_MASK) <<
1385 MB_TPD_PROD_INDX_SHIFT);
1386 iowrite32(value, adapter->hw.hw_addr + REG_MAILBOX);
1387 spin_unlock(&adapter->mb_lock);
1388 }
f3cc28c7
JC
1389}
1390
05ffdd7b 1391static void atl1_intr_tx(struct atl1_adapter *adapter)
f3cc28c7 1392{
05ffdd7b
JC
1393 struct atl1_tpd_ring *tpd_ring = &adapter->tpd_ring;
1394 struct atl1_buffer *buffer_info;
1395 u16 sw_tpd_next_to_clean;
1396 u16 cmb_tpd_next_to_clean;
f3cc28c7 1397
05ffdd7b
JC
1398 sw_tpd_next_to_clean = atomic_read(&tpd_ring->next_to_clean);
1399 cmb_tpd_next_to_clean = le16_to_cpu(adapter->cmb.cmb->tpd_cons_idx);
f3cc28c7 1400
05ffdd7b
JC
1401 while (cmb_tpd_next_to_clean != sw_tpd_next_to_clean) {
1402 struct tx_packet_desc *tpd;
f3cc28c7 1403
05ffdd7b
JC
1404 tpd = ATL1_TPD_DESC(tpd_ring, sw_tpd_next_to_clean);
1405 buffer_info = &tpd_ring->buffer_info[sw_tpd_next_to_clean];
1406 if (buffer_info->dma) {
1407 pci_unmap_page(adapter->pdev, buffer_info->dma,
1408 buffer_info->length, PCI_DMA_TODEVICE);
1409 buffer_info->dma = 0;
1410 }
f3cc28c7 1411
05ffdd7b
JC
1412 if (buffer_info->skb) {
1413 dev_kfree_skb_irq(buffer_info->skb);
1414 buffer_info->skb = NULL;
1415 }
1416 tpd->buffer_addr = 0;
1417 tpd->desc.data = 0;
f3cc28c7 1418
05ffdd7b
JC
1419 if (++sw_tpd_next_to_clean == tpd_ring->count)
1420 sw_tpd_next_to_clean = 0;
1421 }
1422 atomic_set(&tpd_ring->next_to_clean, sw_tpd_next_to_clean);
1423
1424 if (netif_queue_stopped(adapter->netdev)
1425 && netif_carrier_ok(adapter->netdev))
1426 netif_wake_queue(adapter->netdev);
f3cc28c7
JC
1427}
1428
e6a7ff4a 1429static u16 atl1_tpd_avail(struct atl1_tpd_ring *tpd_ring)
f3cc28c7
JC
1430{
1431 u16 next_to_clean = atomic_read(&tpd_ring->next_to_clean);
1432 u16 next_to_use = atomic_read(&tpd_ring->next_to_use);
53ffb42c
JC
1433 return ((next_to_clean > next_to_use) ?
1434 next_to_clean - next_to_use - 1 :
1435 tpd_ring->count + next_to_clean - next_to_use - 1);
f3cc28c7
JC
1436}
1437
1438static int atl1_tso(struct atl1_adapter *adapter, struct sk_buff *skb,
1439 struct tso_param *tso)
1440{
1441 /* We enter this function holding a spinlock. */
1442 u8 ipofst;
1443 int err;
1444
1445 if (skb_shinfo(skb)->gso_size) {
1446 if (skb_header_cloned(skb)) {
1447 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
1448 if (unlikely(err))
1449 return err;
1450 }
1451
1452 if (skb->protocol == ntohs(ETH_P_IP)) {
eddc9ec5
ACM
1453 struct iphdr *iph = ip_hdr(skb);
1454
1455 iph->tot_len = 0;
1456 iph->check = 0;
aa8223c7 1457 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
2ca13da7 1458 iph->daddr, 0, IPPROTO_TCP, 0);
bbe735e4 1459 ipofst = skb_network_offset(skb);
a3093d9b 1460 if (ipofst != ETH_HLEN) /* 802.3 frame */
f3cc28c7
JC
1461 tso->tsopl |= 1 << TSO_PARAM_ETHTYPE_SHIFT;
1462
eddc9ec5 1463 tso->tsopl |= (iph->ihl &
f3cc28c7 1464 CSUM_PARAM_IPHL_MASK) << CSUM_PARAM_IPHL_SHIFT;
ab6a5bb6 1465 tso->tsopl |= (tcp_hdrlen(skb) &
53ffb42c
JC
1466 TSO_PARAM_TCPHDRLEN_MASK) <<
1467 TSO_PARAM_TCPHDRLEN_SHIFT;
f3cc28c7
JC
1468 tso->tsopl |= (skb_shinfo(skb)->gso_size &
1469 TSO_PARAM_MSS_MASK) << TSO_PARAM_MSS_SHIFT;
1470 tso->tsopl |= 1 << TSO_PARAM_IPCKSUM_SHIFT;
1471 tso->tsopl |= 1 << TSO_PARAM_TCPCKSUM_SHIFT;
1472 tso->tsopl |= 1 << TSO_PARAM_SEGMENT_SHIFT;
1473 return true;
1474 }
1475 }
1476 return false;
1477}
1478
1479static int atl1_tx_csum(struct atl1_adapter *adapter, struct sk_buff *skb,
53ffb42c 1480 struct csum_param *csum)
f3cc28c7
JC
1481{
1482 u8 css, cso;
1483
1484 if (likely(skb->ip_summed == CHECKSUM_PARTIAL)) {
ea2ae17d 1485 cso = skb_transport_offset(skb);
628592cc 1486 css = cso + skb->csum_offset;
f3cc28c7 1487 if (unlikely(cso & 0x1)) {
53ffb42c 1488 dev_printk(KERN_DEBUG, &adapter->pdev->dev,
1e006364 1489 "payload offset not an even number\n");
f3cc28c7
JC
1490 return -1;
1491 }
1492 csum->csumpl |= (cso & CSUM_PARAM_PLOADOFFSET_MASK) <<
1493 CSUM_PARAM_PLOADOFFSET_SHIFT;
1494 csum->csumpl |= (css & CSUM_PARAM_XSUMOFFSET_MASK) <<
1495 CSUM_PARAM_XSUMOFFSET_SHIFT;
1496 csum->csumpl |= 1 << CSUM_PARAM_CUSTOMCKSUM_SHIFT;
1497 return true;
1498 }
1499
1500 return true;
1501}
1502
53ffb42c
JC
1503static void atl1_tx_map(struct atl1_adapter *adapter, struct sk_buff *skb,
1504 bool tcp_seg)
f3cc28c7
JC
1505{
1506 /* We enter this function holding a spinlock. */
1507 struct atl1_tpd_ring *tpd_ring = &adapter->tpd_ring;
1508 struct atl1_buffer *buffer_info;
1509 struct page *page;
1510 int first_buf_len = skb->len;
1511 unsigned long offset;
1512 unsigned int nr_frags;
1513 unsigned int f;
1514 u16 tpd_next_to_use;
1515 u16 proto_hdr_len;
1516 u16 i, m, len12;
1517
1518 first_buf_len -= skb->data_len;
1519 nr_frags = skb_shinfo(skb)->nr_frags;
1520 tpd_next_to_use = atomic_read(&tpd_ring->next_to_use);
1521 buffer_info = &tpd_ring->buffer_info[tpd_next_to_use];
1522 if (unlikely(buffer_info->skb))
1523 BUG();
1524 buffer_info->skb = NULL; /* put skb in last TPD */
1525
1526 if (tcp_seg) {
1527 /* TSO/GSO */
ab6a5bb6 1528 proto_hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
f3cc28c7
JC
1529 buffer_info->length = proto_hdr_len;
1530 page = virt_to_page(skb->data);
1531 offset = (unsigned long)skb->data & ~PAGE_MASK;
1532 buffer_info->dma = pci_map_page(adapter->pdev, page,
1533 offset, proto_hdr_len,
1534 PCI_DMA_TODEVICE);
1535
1536 if (++tpd_next_to_use == tpd_ring->count)
1537 tpd_next_to_use = 0;
1538
1539 if (first_buf_len > proto_hdr_len) {
1540 len12 = first_buf_len - proto_hdr_len;
53ffb42c
JC
1541 m = (len12 + ATL1_MAX_TX_BUF_LEN - 1) /
1542 ATL1_MAX_TX_BUF_LEN;
f3cc28c7
JC
1543 for (i = 0; i < m; i++) {
1544 buffer_info =
1545 &tpd_ring->buffer_info[tpd_next_to_use];
1546 buffer_info->skb = NULL;
1547 buffer_info->length =
2b116145
JC
1548 (ATL1_MAX_TX_BUF_LEN >=
1549 len12) ? ATL1_MAX_TX_BUF_LEN : len12;
f3cc28c7
JC
1550 len12 -= buffer_info->length;
1551 page = virt_to_page(skb->data +
53ffb42c
JC
1552 (proto_hdr_len +
1553 i * ATL1_MAX_TX_BUF_LEN));
f3cc28c7 1554 offset = (unsigned long)(skb->data +
53ffb42c
JC
1555 (proto_hdr_len +
1556 i * ATL1_MAX_TX_BUF_LEN)) & ~PAGE_MASK;
1557 buffer_info->dma = pci_map_page(adapter->pdev,
1558 page, offset, buffer_info->length,
1559 PCI_DMA_TODEVICE);
f3cc28c7
JC
1560 if (++tpd_next_to_use == tpd_ring->count)
1561 tpd_next_to_use = 0;
1562 }
1563 }
1564 } else {
1565 /* not TSO/GSO */
1566 buffer_info->length = first_buf_len;
1567 page = virt_to_page(skb->data);
1568 offset = (unsigned long)skb->data & ~PAGE_MASK;
1569 buffer_info->dma = pci_map_page(adapter->pdev, page,
53ffb42c 1570 offset, first_buf_len, PCI_DMA_TODEVICE);
f3cc28c7
JC
1571 if (++tpd_next_to_use == tpd_ring->count)
1572 tpd_next_to_use = 0;
1573 }
1574
1575 for (f = 0; f < nr_frags; f++) {
1576 struct skb_frag_struct *frag;
1577 u16 lenf, i, m;
1578
1579 frag = &skb_shinfo(skb)->frags[f];
1580 lenf = frag->size;
1581
2b116145 1582 m = (lenf + ATL1_MAX_TX_BUF_LEN - 1) / ATL1_MAX_TX_BUF_LEN;
f3cc28c7
JC
1583 for (i = 0; i < m; i++) {
1584 buffer_info = &tpd_ring->buffer_info[tpd_next_to_use];
1585 if (unlikely(buffer_info->skb))
1586 BUG();
1587 buffer_info->skb = NULL;
53ffb42c
JC
1588 buffer_info->length = (lenf > ATL1_MAX_TX_BUF_LEN) ?
1589 ATL1_MAX_TX_BUF_LEN : lenf;
f3cc28c7 1590 lenf -= buffer_info->length;
53ffb42c
JC
1591 buffer_info->dma = pci_map_page(adapter->pdev,
1592 frag->page,
1593 frag->page_offset + (i * ATL1_MAX_TX_BUF_LEN),
1594 buffer_info->length, PCI_DMA_TODEVICE);
f3cc28c7
JC
1595
1596 if (++tpd_next_to_use == tpd_ring->count)
1597 tpd_next_to_use = 0;
1598 }
1599 }
1600
1601 /* last tpd's buffer-info */
1602 buffer_info->skb = skb;
1603}
1604
1605static void atl1_tx_queue(struct atl1_adapter *adapter, int count,
53ffb42c 1606 union tpd_descr *descr)
f3cc28c7
JC
1607{
1608 /* We enter this function holding a spinlock. */
1609 struct atl1_tpd_ring *tpd_ring = &adapter->tpd_ring;
1610 int j;
1611 u32 val;
1612 struct atl1_buffer *buffer_info;
1613 struct tx_packet_desc *tpd;
1614 u16 tpd_next_to_use = atomic_read(&tpd_ring->next_to_use);
1615
1616 for (j = 0; j < count; j++) {
1617 buffer_info = &tpd_ring->buffer_info[tpd_next_to_use];
1618 tpd = ATL1_TPD_DESC(&adapter->tpd_ring, tpd_next_to_use);
1619 tpd->desc.csum.csumpu = descr->csum.csumpu;
1620 tpd->desc.csum.csumpl = descr->csum.csumpl;
1621 tpd->desc.tso.tsopu = descr->tso.tsopu;
1622 tpd->desc.tso.tsopl = descr->tso.tsopl;
1623 tpd->buffer_addr = cpu_to_le64(buffer_info->dma);
1624 tpd->desc.data = descr->data;
1625 tpd->desc.csum.csumpu |= (cpu_to_le16(buffer_info->length) &
1626 CSUM_PARAM_BUFLEN_MASK) << CSUM_PARAM_BUFLEN_SHIFT;
1627
1628 val = (descr->tso.tsopl >> TSO_PARAM_SEGMENT_SHIFT) &
1629 TSO_PARAM_SEGMENT_MASK;
1630 if (val && !j)
1631 tpd->desc.tso.tsopl |= 1 << TSO_PARAM_HDRFLAG_SHIFT;
1632
1633 if (j == (count - 1))
1634 tpd->desc.csum.csumpl |= 1 << CSUM_PARAM_EOP_SHIFT;
1635
1636 if (++tpd_next_to_use == tpd_ring->count)
1637 tpd_next_to_use = 0;
1638 }
1639 /*
1640 * Force memory writes to complete before letting h/w
1641 * know there are new descriptors to fetch. (Only
1642 * applicable for weak-ordered memory model archs,
1643 * such as IA-64).
1644 */
1645 wmb();
1646
1647 atomic_set(&tpd_ring->next_to_use, (int)tpd_next_to_use);
1648}
1649
f3cc28c7
JC
1650static int atl1_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
1651{
1652 struct atl1_adapter *adapter = netdev_priv(netdev);
1653 int len = skb->len;
1654 int tso;
1655 int count = 1;
1656 int ret_val;
1657 u32 val;
1658 union tpd_descr param;
1659 u16 frag_size;
1660 u16 vlan_tag;
1661 unsigned long flags;
1662 unsigned int nr_frags = 0;
1663 unsigned int mss = 0;
1664 unsigned int f;
1665 unsigned int proto_hdr_len;
1666
1667 len -= skb->data_len;
1668
1669 if (unlikely(skb->len == 0)) {
1670 dev_kfree_skb_any(skb);
1671 return NETDEV_TX_OK;
1672 }
1673
1674 param.data = 0;
1675 param.tso.tsopu = 0;
1676 param.tso.tsopl = 0;
1677 param.csum.csumpu = 0;
1678 param.csum.csumpl = 0;
1679
1680 /* nr_frags will be nonzero if we're doing scatter/gather (SG) */
1681 nr_frags = skb_shinfo(skb)->nr_frags;
1682 for (f = 0; f < nr_frags; f++) {
1683 frag_size = skb_shinfo(skb)->frags[f].size;
1684 if (frag_size)
53ffb42c
JC
1685 count += (frag_size + ATL1_MAX_TX_BUF_LEN - 1) /
1686 ATL1_MAX_TX_BUF_LEN;
f3cc28c7
JC
1687 }
1688
1689 /* mss will be nonzero if we're doing segment offload (TSO/GSO) */
1690 mss = skb_shinfo(skb)->gso_size;
1691 if (mss) {
7ccec1b9 1692 if (skb->protocol == htons(ETH_P_IP)) {
ea2ae17d 1693 proto_hdr_len = (skb_transport_offset(skb) +
ab6a5bb6 1694 tcp_hdrlen(skb));
f3cc28c7
JC
1695 if (unlikely(proto_hdr_len > len)) {
1696 dev_kfree_skb_any(skb);
1697 return NETDEV_TX_OK;
1698 }
1699 /* need additional TPD ? */
1700 if (proto_hdr_len != len)
1701 count += (len - proto_hdr_len +
53ffb42c
JC
1702 ATL1_MAX_TX_BUF_LEN - 1) /
1703 ATL1_MAX_TX_BUF_LEN;
f3cc28c7
JC
1704 }
1705 }
1706
1707 local_irq_save(flags);
1708 if (!spin_trylock(&adapter->lock)) {
1709 /* Can't get lock - tell upper layer to requeue */
1710 local_irq_restore(flags);
53ffb42c 1711 dev_printk(KERN_DEBUG, &adapter->pdev->dev, "tx locked\n");
f3cc28c7
JC
1712 return NETDEV_TX_LOCKED;
1713 }
1714
e6a7ff4a 1715 if (atl1_tpd_avail(&adapter->tpd_ring) < count) {
f3cc28c7
JC
1716 /* not enough descriptors */
1717 netif_stop_queue(netdev);
1718 spin_unlock_irqrestore(&adapter->lock, flags);
53ffb42c 1719 dev_printk(KERN_DEBUG, &adapter->pdev->dev, "tx busy\n");
f3cc28c7
JC
1720 return NETDEV_TX_BUSY;
1721 }
1722
1723 param.data = 0;
1724
1725 if (adapter->vlgrp && vlan_tx_tag_present(skb)) {
1726 vlan_tag = vlan_tx_tag_get(skb);
1727 vlan_tag = (vlan_tag << 4) | (vlan_tag >> 13) |
1728 ((vlan_tag >> 9) & 0x8);
1729 param.csum.csumpl |= 1 << CSUM_PARAM_INSVLAG_SHIFT;
1730 param.csum.csumpu |= (vlan_tag & CSUM_PARAM_VALANTAG_MASK) <<
1731 CSUM_PARAM_VALAN_SHIFT;
1732 }
1733
1734 tso = atl1_tso(adapter, skb, &param.tso);
1735 if (tso < 0) {
1736 spin_unlock_irqrestore(&adapter->lock, flags);
1737 dev_kfree_skb_any(skb);
1738 return NETDEV_TX_OK;
1739 }
1740
1741 if (!tso) {
1742 ret_val = atl1_tx_csum(adapter, skb, &param.csum);
1743 if (ret_val < 0) {
1744 spin_unlock_irqrestore(&adapter->lock, flags);
1745 dev_kfree_skb_any(skb);
1746 return NETDEV_TX_OK;
1747 }
1748 }
1749
1750 val = (param.csum.csumpl >> CSUM_PARAM_SEGMENT_SHIFT) &
1751 CSUM_PARAM_SEGMENT_MASK;
1752 atl1_tx_map(adapter, skb, 1 == val);
1753 atl1_tx_queue(adapter, count, &param);
1754 netdev->trans_start = jiffies;
1755 spin_unlock_irqrestore(&adapter->lock, flags);
1756 atl1_update_mailbox(adapter);
1757 return NETDEV_TX_OK;
1758}
1759
1760/*
05ffdd7b
JC
1761 * atl1_intr - Interrupt Handler
1762 * @irq: interrupt number
1763 * @data: pointer to a network interface device structure
1764 * @pt_regs: CPU registers structure
f3cc28c7 1765 */
05ffdd7b 1766static irqreturn_t atl1_intr(int irq, void *data)
f3cc28c7 1767{
05ffdd7b
JC
1768 struct atl1_adapter *adapter = netdev_priv(data);
1769 u32 status;
1770 u8 update_rx;
1771 int max_ints = 10;
f3cc28c7 1772
05ffdd7b
JC
1773 status = adapter->cmb.cmb->int_stats;
1774 if (!status)
1775 return IRQ_NONE;
f3cc28c7 1776
05ffdd7b
JC
1777 update_rx = 0;
1778
1779 do {
1780 /* clear CMB interrupt status at once */
1781 adapter->cmb.cmb->int_stats = 0;
1782
1783 if (status & ISR_GPHY) /* clear phy status */
1784 atl1_clear_phy_int(adapter);
1785
1786 /* clear ISR status, and Enable CMB DMA/Disable Interrupt */
1787 iowrite32(status | ISR_DIS_INT, adapter->hw.hw_addr + REG_ISR);
1788
1789 /* check if SMB intr */
1790 if (status & ISR_SMB)
1791 atl1_inc_smb(adapter);
1792
1793 /* check if PCIE PHY Link down */
1794 if (status & ISR_PHY_LINKDOWN) {
1795 dev_printk(KERN_DEBUG, &adapter->pdev->dev,
1796 "pcie phy link down %x\n", status);
1797 if (netif_running(adapter->netdev)) { /* reset MAC */
1798 iowrite32(0, adapter->hw.hw_addr + REG_IMR);
1799 schedule_work(&adapter->pcie_dma_to_rst_task);
1800 return IRQ_HANDLED;
1801 }
f3cc28c7 1802 }
05ffdd7b
JC
1803
1804 /* check if DMA read/write error ? */
1805 if (status & (ISR_DMAR_TO_RST | ISR_DMAW_TO_RST)) {
1806 dev_printk(KERN_DEBUG, &adapter->pdev->dev,
1807 "pcie DMA r/w error (status = 0x%x)\n",
1808 status);
1809 iowrite32(0, adapter->hw.hw_addr + REG_IMR);
1810 schedule_work(&adapter->pcie_dma_to_rst_task);
1811 return IRQ_HANDLED;
f3cc28c7 1812 }
f3cc28c7 1813
05ffdd7b
JC
1814 /* link event */
1815 if (status & ISR_GPHY) {
1816 adapter->soft_stats.tx_carrier_errors++;
1817 atl1_check_for_link(adapter);
1818 }
f3cc28c7 1819
05ffdd7b
JC
1820 /* transmit event */
1821 if (status & ISR_CMB_TX)
1822 atl1_intr_tx(adapter);
f3cc28c7 1823
05ffdd7b
JC
1824 /* rx exception */
1825 if (unlikely(status & (ISR_RXF_OV | ISR_RFD_UNRUN |
1826 ISR_RRD_OV | ISR_HOST_RFD_UNRUN |
1827 ISR_HOST_RRD_OV | ISR_CMB_RX))) {
1828 if (status & (ISR_RXF_OV | ISR_RFD_UNRUN |
1829 ISR_RRD_OV | ISR_HOST_RFD_UNRUN |
1830 ISR_HOST_RRD_OV))
1831 dev_printk(KERN_DEBUG, &adapter->pdev->dev,
1832 "rx exception, ISR = 0x%x\n", status);
1833 atl1_intr_rx(adapter);
1834 }
f3cc28c7 1835
05ffdd7b
JC
1836 if (--max_ints < 0)
1837 break;
1838
1839 } while ((status = adapter->cmb.cmb->int_stats));
1840
1841 /* re-enable Interrupt */
1842 iowrite32(ISR_DIS_SMB | ISR_DIS_DMA, adapter->hw.hw_addr + REG_ISR);
1843 return IRQ_HANDLED;
f3cc28c7
JC
1844}
1845
1846/*
05ffdd7b
JC
1847 * atl1_watchdog - Timer Call-back
1848 * @data: pointer to netdev cast into an unsigned long
f3cc28c7 1849 */
05ffdd7b 1850static void atl1_watchdog(unsigned long data)
f3cc28c7 1851{
05ffdd7b 1852 struct atl1_adapter *adapter = (struct atl1_adapter *)data;
f3cc28c7 1853
05ffdd7b
JC
1854 /* Reset the timer */
1855 mod_timer(&adapter->watchdog_timer, jiffies + 2 * HZ);
1856}
f3cc28c7 1857
05ffdd7b
JC
1858/*
1859 * atl1_phy_config - Timer Call-back
1860 * @data: pointer to netdev cast into an unsigned long
1861 */
1862static void atl1_phy_config(unsigned long data)
1863{
1864 struct atl1_adapter *adapter = (struct atl1_adapter *)data;
1865 struct atl1_hw *hw = &adapter->hw;
1866 unsigned long flags;
f3cc28c7 1867
05ffdd7b
JC
1868 spin_lock_irqsave(&adapter->lock, flags);
1869 adapter->phy_timer_pending = false;
1870 atl1_write_phy_reg(hw, MII_ADVERTISE, hw->mii_autoneg_adv_reg);
1871 atl1_write_phy_reg(hw, MII_AT001_CR, hw->mii_1000t_ctrl_reg);
1872 atl1_write_phy_reg(hw, MII_BMCR, MII_CR_RESET | MII_CR_AUTO_NEG_EN);
1873 spin_unlock_irqrestore(&adapter->lock, flags);
1874}
f3cc28c7 1875
05ffdd7b
JC
1876/*
1877 * atl1_tx_timeout - Respond to a Tx Hang
1878 * @netdev: network interface device structure
1879 */
1880static void atl1_tx_timeout(struct net_device *netdev)
1881{
1882 struct atl1_adapter *adapter = netdev_priv(netdev);
1883 /* Do the reset outside of interrupt context */
1884 schedule_work(&adapter->tx_timeout_task);
1885}
f3cc28c7 1886
05ffdd7b
JC
1887/*
1888 * Orphaned vendor comment left intact here:
1889 * <vendor comment>
1890 * If TPD Buffer size equal to 0, PCIE DMAR_TO_INT
1891 * will assert. We do soft reset <0x1400=1> according
1892 * with the SPEC. BUT, it seemes that PCIE or DMA
1893 * state-machine will not be reset. DMAR_TO_INT will
1894 * assert again and again.
1895 * </vendor comment>
1896 */
1897static void atl1_tx_timeout_task(struct work_struct *work)
1898{
1899 struct atl1_adapter *adapter =
1900 container_of(work, struct atl1_adapter, tx_timeout_task);
1901 struct net_device *netdev = adapter->netdev;
f3cc28c7 1902
05ffdd7b
JC
1903 netif_device_detach(netdev);
1904 atl1_down(adapter);
1905 atl1_up(adapter);
1906 netif_device_attach(netdev);
f3cc28c7
JC
1907}
1908
1909/*
05ffdd7b 1910 * atl1_link_chg_task - deal with link change event Out of interrupt context
f3cc28c7 1911 */
05ffdd7b 1912static void atl1_link_chg_task(struct work_struct *work)
f3cc28c7 1913{
05ffdd7b
JC
1914 struct atl1_adapter *adapter =
1915 container_of(work, struct atl1_adapter, link_chg_task);
1916 unsigned long flags;
f3cc28c7 1917
05ffdd7b
JC
1918 spin_lock_irqsave(&adapter->lock, flags);
1919 atl1_check_link(adapter);
1920 spin_unlock_irqrestore(&adapter->lock, flags);
1921}
f3cc28c7 1922
05ffdd7b
JC
1923static void atl1_vlan_rx_register(struct net_device *netdev,
1924 struct vlan_group *grp)
1925{
1926 struct atl1_adapter *adapter = netdev_priv(netdev);
1927 unsigned long flags;
1928 u32 ctrl;
f3cc28c7 1929
05ffdd7b
JC
1930 spin_lock_irqsave(&adapter->lock, flags);
1931 /* atl1_irq_disable(adapter); */
1932 adapter->vlgrp = grp;
f3cc28c7 1933
05ffdd7b
JC
1934 if (grp) {
1935 /* enable VLAN tag insert/strip */
1936 ctrl = ioread32(adapter->hw.hw_addr + REG_MAC_CTRL);
1937 ctrl |= MAC_CTRL_RMV_VLAN;
1938 iowrite32(ctrl, adapter->hw.hw_addr + REG_MAC_CTRL);
1939 } else {
1940 /* disable VLAN tag insert/strip */
1941 ctrl = ioread32(adapter->hw.hw_addr + REG_MAC_CTRL);
1942 ctrl &= ~MAC_CTRL_RMV_VLAN;
1943 iowrite32(ctrl, adapter->hw.hw_addr + REG_MAC_CTRL);
1944 }
f3cc28c7 1945
05ffdd7b
JC
1946 /* atl1_irq_enable(adapter); */
1947 spin_unlock_irqrestore(&adapter->lock, flags);
1948}
1949
1950static void atl1_restore_vlan(struct atl1_adapter *adapter)
1951{
1952 atl1_vlan_rx_register(adapter->netdev, adapter->vlgrp);
1953}
1954
1955int atl1_reset(struct atl1_adapter *adapter)
1956{
1957 int ret;
1958
1959 ret = atl1_reset_hw(&adapter->hw);
1960 if (ret != ATL1_SUCCESS)
1961 return ret;
1962 return atl1_init_hw(&adapter->hw);
f3cc28c7
JC
1963}
1964
1965s32 atl1_up(struct atl1_adapter *adapter)
1966{
1967 struct net_device *netdev = adapter->netdev;
1968 int err;
1969 int irq_flags = IRQF_SAMPLE_RANDOM;
1970
1971 /* hardware has been reset, we need to reload some things */
1972 atl1_set_multi(netdev);
2ca13da7 1973 atl1_init_ring_ptrs(adapter);
f3cc28c7
JC
1974 atl1_restore_vlan(adapter);
1975 err = atl1_alloc_rx_buffers(adapter);
1976 if (unlikely(!err)) /* no RX BUFFER allocated */
1977 return -ENOMEM;
1978
1979 if (unlikely(atl1_configure(adapter))) {
1980 err = -EIO;
1981 goto err_up;
1982 }
1983
1984 err = pci_enable_msi(adapter->pdev);
1985 if (err) {
1986 dev_info(&adapter->pdev->dev,
1987 "Unable to enable MSI: %d\n", err);
1988 irq_flags |= IRQF_SHARED;
1989 }
1990
1991 err = request_irq(adapter->pdev->irq, &atl1_intr, irq_flags,
1992 netdev->name, netdev);
1993 if (unlikely(err))
1994 goto err_up;
1995
1996 mod_timer(&adapter->watchdog_timer, jiffies);
1997 atl1_irq_enable(adapter);
1998 atl1_check_link(adapter);
1999 return 0;
2000
f3cc28c7
JC
2001err_up:
2002 pci_disable_msi(adapter->pdev);
2003 /* free rx_buffers */
2004 atl1_clean_rx_ring(adapter);
2005 return err;
2006}
2007
2008void atl1_down(struct atl1_adapter *adapter)
2009{
2010 struct net_device *netdev = adapter->netdev;
2011
2012 del_timer_sync(&adapter->watchdog_timer);
2013 del_timer_sync(&adapter->phy_config_timer);
2014 adapter->phy_timer_pending = false;
2015
2016 atl1_irq_disable(adapter);
2017 free_irq(adapter->pdev->irq, netdev);
2018 pci_disable_msi(adapter->pdev);
2019 atl1_reset_hw(&adapter->hw);
2020 adapter->cmb.cmb->int_stats = 0;
2021
2022 adapter->link_speed = SPEED_0;
2023 adapter->link_duplex = -1;
2024 netif_carrier_off(netdev);
2025 netif_stop_queue(netdev);
f3cc28c7 2026
f3cc28c7
JC
2027 atl1_clean_tx_ring(adapter);
2028 atl1_clean_rx_ring(adapter);
f3cc28c7
JC
2029}
2030
2031/*
2032 * atl1_open - Called when a network interface is made active
2033 * @netdev: network interface device structure
2034 *
2035 * Returns 0 on success, negative value on failure
2036 *
2037 * The open entry point is called when a network interface is made
2038 * active by the system (IFF_UP). At this point all resources needed
2039 * for transmit and receive operations are allocated, the interrupt
2040 * handler is registered with the OS, the watchdog timer is started,
2041 * and the stack is notified that the interface is ready.
2042 */
2043static int atl1_open(struct net_device *netdev)
2044{
2045 struct atl1_adapter *adapter = netdev_priv(netdev);
2046 int err;
2047
2048 /* allocate transmit descriptors */
2049 err = atl1_setup_ring_resources(adapter);
2050 if (err)
2051 return err;
2052
2053 err = atl1_up(adapter);
2054 if (err)
2055 goto err_up;
2056
2057 return 0;
2058
2059err_up:
2060 atl1_reset(adapter);
2061 return err;
2062}
2063
2064/*
2065 * atl1_close - Disables a network interface
2066 * @netdev: network interface device structure
2067 *
2068 * Returns 0, this is not allowed to fail
2069 *
2070 * The close entry point is called when an interface is de-activated
2071 * by the OS. The hardware is still under the drivers control, but
2072 * needs to be disabled. A global MAC reset is issued to stop the
2073 * hardware, and all transmit and receive resources are freed.
2074 */
2075static int atl1_close(struct net_device *netdev)
2076{
2077 struct atl1_adapter *adapter = netdev_priv(netdev);
2078 atl1_down(adapter);
2079 atl1_free_ring_resources(adapter);
2080 return 0;
2081}
2082
05ffdd7b
JC
2083#ifdef CONFIG_PM
2084static int atl1_suspend(struct pci_dev *pdev, pm_message_t state)
f3cc28c7 2085{
05ffdd7b
JC
2086 struct net_device *netdev = pci_get_drvdata(pdev);
2087 struct atl1_adapter *adapter = netdev_priv(netdev);
2088 struct atl1_hw *hw = &adapter->hw;
2089 u32 ctrl = 0;
2090 u32 wufc = adapter->wol;
f3cc28c7
JC
2091
2092 netif_device_detach(netdev);
05ffdd7b
JC
2093 if (netif_running(netdev))
2094 atl1_down(adapter);
f3cc28c7 2095
05ffdd7b
JC
2096 atl1_read_phy_reg(hw, MII_BMSR, (u16 *) & ctrl);
2097 atl1_read_phy_reg(hw, MII_BMSR, (u16 *) & ctrl);
2098 if (ctrl & BMSR_LSTATUS)
2099 wufc &= ~ATL1_WUFC_LNKC;
f3cc28c7 2100
05ffdd7b
JC
2101 /* reduce speed to 10/100M */
2102 if (wufc) {
2103 atl1_phy_enter_power_saving(hw);
2104 /* if resume, let driver to re- setup link */
2105 hw->phy_configured = false;
2106 atl1_set_mac_addr(hw);
2107 atl1_set_multi(netdev);
2108
2109 ctrl = 0;
2110 /* turn on magic packet wol */
2111 if (wufc & ATL1_WUFC_MAG)
2112 ctrl = WOL_MAGIC_EN | WOL_MAGIC_PME_EN;
2113
2114 /* turn on Link change WOL */
2115 if (wufc & ATL1_WUFC_LNKC)
2116 ctrl |= (WOL_LINK_CHG_EN | WOL_LINK_CHG_PME_EN);
2117 iowrite32(ctrl, hw->hw_addr + REG_WOL_CTRL);
2118
2119 /* turn on all-multi mode if wake on multicast is enabled */
2120 ctrl = ioread32(hw->hw_addr + REG_MAC_CTRL);
2121 ctrl &= ~MAC_CTRL_DBG;
2122 ctrl &= ~MAC_CTRL_PROMIS_EN;
2123 if (wufc & ATL1_WUFC_MC)
2124 ctrl |= MAC_CTRL_MC_ALL_EN;
2125 else
2126 ctrl &= ~MAC_CTRL_MC_ALL_EN;
2127
2128 /* turn on broadcast mode if wake on-BC is enabled */
2129 if (wufc & ATL1_WUFC_BC)
2130 ctrl |= MAC_CTRL_BC_EN;
2131 else
2132 ctrl &= ~MAC_CTRL_BC_EN;
2133
2134 /* enable RX */
2135 ctrl |= MAC_CTRL_RX_EN;
2136 iowrite32(ctrl, hw->hw_addr + REG_MAC_CTRL);
2137 pci_enable_wake(pdev, PCI_D3hot, 1);
2138 pci_enable_wake(pdev, PCI_D3cold, 1);
2139 } else {
2140 iowrite32(0, hw->hw_addr + REG_WOL_CTRL);
2141 pci_enable_wake(pdev, PCI_D3hot, 0);
2142 pci_enable_wake(pdev, PCI_D3cold, 0);
2143 }
2144
2145 pci_save_state(pdev);
2146 pci_disable_device(pdev);
2147
2148 pci_set_power_state(pdev, PCI_D3hot);
2149
2150 return 0;
f3cc28c7
JC
2151}
2152
05ffdd7b 2153static int atl1_resume(struct pci_dev *pdev)
f3cc28c7 2154{
05ffdd7b
JC
2155 struct net_device *netdev = pci_get_drvdata(pdev);
2156 struct atl1_adapter *adapter = netdev_priv(netdev);
2157 u32 ret_val;
53ffb42c 2158
05ffdd7b
JC
2159 pci_set_power_state(pdev, 0);
2160 pci_restore_state(pdev);
2161
2162 ret_val = pci_enable_device(pdev);
2163 pci_enable_wake(pdev, PCI_D3hot, 0);
2164 pci_enable_wake(pdev, PCI_D3cold, 0);
2165
2166 iowrite32(0, adapter->hw.hw_addr + REG_WOL_CTRL);
2167 atl1_reset(adapter);
2168
2169 if (netif_running(netdev))
2170 atl1_up(adapter);
2171 netif_device_attach(netdev);
2172
2173 atl1_via_workaround(adapter);
2174
2175 return 0;
f3cc28c7 2176}
05ffdd7b
JC
2177#else
2178#define atl1_suspend NULL
2179#define atl1_resume NULL
2180#endif
f3cc28c7 2181
05ffdd7b
JC
2182#ifdef CONFIG_NET_POLL_CONTROLLER
2183static void atl1_poll_controller(struct net_device *netdev)
f3cc28c7 2184{
05ffdd7b
JC
2185 disable_irq(netdev->irq);
2186 atl1_intr(netdev->irq, netdev);
2187 enable_irq(netdev->irq);
f3cc28c7 2188}
05ffdd7b 2189#endif
f3cc28c7
JC
2190
2191/*
2192 * atl1_probe - Device Initialization Routine
2193 * @pdev: PCI device information struct
2194 * @ent: entry in atl1_pci_tbl
2195 *
2196 * Returns 0 on success, negative on failure
2197 *
2198 * atl1_probe initializes an adapter identified by a pci_dev structure.
2199 * The OS initialization, configuring of the adapter private structure,
2200 * and a hardware reset occur.
2201 */
2202static int __devinit atl1_probe(struct pci_dev *pdev,
53ffb42c 2203 const struct pci_device_id *ent)
f3cc28c7
JC
2204{
2205 struct net_device *netdev;
2206 struct atl1_adapter *adapter;
2207 static int cards_found = 0;
2208 bool pci_using_64 = true;
2209 int err;
2210
2211 err = pci_enable_device(pdev);
2212 if (err)
2213 return err;
2214
2215 err = pci_set_dma_mask(pdev, DMA_64BIT_MASK);
2216 if (err) {
2217 err = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
2218 if (err) {
1e006364 2219 dev_err(&pdev->dev, "no usable DMA configuration\n");
f3cc28c7
JC
2220 goto err_dma;
2221 }
2222 pci_using_64 = false;
2223 }
2224 /* Mark all PCI regions associated with PCI device
2225 * pdev as being reserved by owner atl1_driver_name
2226 */
2227 err = pci_request_regions(pdev, atl1_driver_name);
2228 if (err)
2229 goto err_request_regions;
2230
2231 /* Enables bus-mastering on the device and calls
2232 * pcibios_set_master to do the needed arch specific settings
2233 */
2234 pci_set_master(pdev);
2235
2236 netdev = alloc_etherdev(sizeof(struct atl1_adapter));
2237 if (!netdev) {
2238 err = -ENOMEM;
2239 goto err_alloc_etherdev;
2240 }
2241 SET_MODULE_OWNER(netdev);
2242 SET_NETDEV_DEV(netdev, &pdev->dev);
2243
2244 pci_set_drvdata(pdev, netdev);
2245 adapter = netdev_priv(netdev);
2246 adapter->netdev = netdev;
2247 adapter->pdev = pdev;
2248 adapter->hw.back = adapter;
2249
2250 adapter->hw.hw_addr = pci_iomap(pdev, 0, 0);
2251 if (!adapter->hw.hw_addr) {
2252 err = -EIO;
2253 goto err_pci_iomap;
2254 }
2255 /* get device revision number */
1e006364 2256 adapter->hw.dev_rev = ioread16(adapter->hw.hw_addr +
53ffb42c 2257 (REG_MASTER_CTRL + 2));
1e006364 2258 dev_info(&pdev->dev, "version %s\n", DRIVER_VERSION);
f3cc28c7
JC
2259
2260 /* set default ring resource counts */
2261 adapter->rfd_ring.count = adapter->rrd_ring.count = ATL1_DEFAULT_RFD;
2262 adapter->tpd_ring.count = ATL1_DEFAULT_TPD;
2263
2264 adapter->mii.dev = netdev;
2265 adapter->mii.mdio_read = mdio_read;
2266 adapter->mii.mdio_write = mdio_write;
2267 adapter->mii.phy_id_mask = 0x1f;
2268 adapter->mii.reg_num_mask = 0x1f;
2269
2270 netdev->open = &atl1_open;
2271 netdev->stop = &atl1_close;
2272 netdev->hard_start_xmit = &atl1_xmit_frame;
2273 netdev->get_stats = &atl1_get_stats;
2274 netdev->set_multicast_list = &atl1_set_multi;
2275 netdev->set_mac_address = &atl1_set_mac;
2276 netdev->change_mtu = &atl1_change_mtu;
2277 netdev->do_ioctl = &atl1_ioctl;
2278 netdev->tx_timeout = &atl1_tx_timeout;
2279 netdev->watchdog_timeo = 5 * HZ;
497f050c
AD
2280#ifdef CONFIG_NET_POLL_CONTROLLER
2281 netdev->poll_controller = atl1_poll_controller;
2282#endif
f3cc28c7 2283 netdev->vlan_rx_register = atl1_vlan_rx_register;
cb434e38 2284
f3cc28c7
JC
2285 netdev->ethtool_ops = &atl1_ethtool_ops;
2286 adapter->bd_number = cards_found;
2287 adapter->pci_using_64 = pci_using_64;
2288
2289 /* setup the private structure */
2290 err = atl1_sw_init(adapter);
2291 if (err)
2292 goto err_common;
2293
2294 netdev->features = NETIF_F_HW_CSUM;
2295 netdev->features |= NETIF_F_SG;
2296 netdev->features |= (NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_RX);
2297
2298 /*
2299 * FIXME - Until tso performance gets fixed, disable the feature.
2300 * Enable it with ethtool -K if desired.
2301 */
2302 /* netdev->features |= NETIF_F_TSO; */
2303
2304 if (pci_using_64)
2305 netdev->features |= NETIF_F_HIGHDMA;
2306
2307 netdev->features |= NETIF_F_LLTX;
2308
2309 /*
2310 * patch for some L1 of old version,
2311 * the final version of L1 may not need these
2312 * patches
2313 */
2314 /* atl1_pcie_patch(adapter); */
2315
2316 /* really reset GPHY core */
2317 iowrite16(0, adapter->hw.hw_addr + REG_GPHY_ENABLE);
2318
2319 /*
2320 * reset the controller to
2321 * put the device in a known good starting state
2322 */
2323 if (atl1_reset_hw(&adapter->hw)) {
2324 err = -EIO;
2325 goto err_common;
2326 }
2327
2328 /* copy the MAC address out of the EEPROM */
2329 atl1_read_mac_addr(&adapter->hw);
2330 memcpy(netdev->dev_addr, adapter->hw.mac_addr, netdev->addr_len);
2331
2332 if (!is_valid_ether_addr(netdev->dev_addr)) {
2333 err = -EIO;
2334 goto err_common;
2335 }
2336
2337 atl1_check_options(adapter);
2338
2339 /* pre-init the MAC, and setup link */
2340 err = atl1_init_hw(&adapter->hw);
2341 if (err) {
2342 err = -EIO;
2343 goto err_common;
2344 }
2345
2346 atl1_pcie_patch(adapter);
2347 /* assume we have no link for now */
2348 netif_carrier_off(netdev);
2349 netif_stop_queue(netdev);
2350
2351 init_timer(&adapter->watchdog_timer);
2352 adapter->watchdog_timer.function = &atl1_watchdog;
2353 adapter->watchdog_timer.data = (unsigned long)adapter;
2354
2355 init_timer(&adapter->phy_config_timer);
2356 adapter->phy_config_timer.function = &atl1_phy_config;
2357 adapter->phy_config_timer.data = (unsigned long)adapter;
2358 adapter->phy_timer_pending = false;
2359
2360 INIT_WORK(&adapter->tx_timeout_task, atl1_tx_timeout_task);
2361
2362 INIT_WORK(&adapter->link_chg_task, atl1_link_chg_task);
2363
2364 INIT_WORK(&adapter->pcie_dma_to_rst_task, atl1_tx_timeout_task);
2365
2366 err = register_netdev(netdev);
2367 if (err)
2368 goto err_common;
2369
2370 cards_found++;
2371 atl1_via_workaround(adapter);
2372 return 0;
2373
2374err_common:
2375 pci_iounmap(pdev, adapter->hw.hw_addr);
2376err_pci_iomap:
2377 free_netdev(netdev);
2378err_alloc_etherdev:
2379 pci_release_regions(pdev);
2380err_dma:
2381err_request_regions:
2382 pci_disable_device(pdev);
2383 return err;
2384}
2385
2386/*
2387 * atl1_remove - Device Removal Routine
2388 * @pdev: PCI device information struct
2389 *
2390 * atl1_remove is called by the PCI subsystem to alert the driver
2391 * that it should release a PCI device. The could be caused by a
2392 * Hot-Plug event, or because the driver is going to be removed from
2393 * memory.
2394 */
2395static void __devexit atl1_remove(struct pci_dev *pdev)
2396{
2397 struct net_device *netdev = pci_get_drvdata(pdev);
2398 struct atl1_adapter *adapter;
2399 /* Device not available. Return. */
2400 if (!netdev)
2401 return;
2402
2403 adapter = netdev_priv(netdev);
8c754a04
CS
2404
2405 /* Some atl1 boards lack persistent storage for their MAC, and get it
2406 * from the BIOS during POST. If we've been messing with the MAC
2407 * address, we need to save the permanent one.
2408 */
2409 if (memcmp(adapter->hw.mac_addr, adapter->hw.perm_mac_addr, ETH_ALEN)) {
53ffb42c
JC
2410 memcpy(adapter->hw.mac_addr, adapter->hw.perm_mac_addr,
2411 ETH_ALEN);
8c754a04
CS
2412 atl1_set_mac_addr(&adapter->hw);
2413 }
2414
f3cc28c7
JC
2415 iowrite16(0, adapter->hw.hw_addr + REG_GPHY_ENABLE);
2416 unregister_netdev(netdev);
2417 pci_iounmap(pdev, adapter->hw.hw_addr);
2418 pci_release_regions(pdev);
2419 free_netdev(netdev);
2420 pci_disable_device(pdev);
2421}
2422
f3cc28c7
JC
2423static struct pci_driver atl1_driver = {
2424 .name = atl1_driver_name,
2425 .id_table = atl1_pci_tbl,
2426 .probe = atl1_probe,
2427 .remove = __devexit_p(atl1_remove),
f3cc28c7
JC
2428 .suspend = atl1_suspend,
2429 .resume = atl1_resume
2430};
2431
2432/*
2433 * atl1_exit_module - Driver Exit Cleanup Routine
2434 *
2435 * atl1_exit_module is called just before the driver is removed
2436 * from memory.
2437 */
2438static void __exit atl1_exit_module(void)
2439{
2440 pci_unregister_driver(&atl1_driver);
2441}
2442
2443/*
2444 * atl1_init_module - Driver Registration Routine
2445 *
2446 * atl1_init_module is the first routine called when the driver is
2447 * loaded. All it does is register with the PCI subsystem.
2448 */
2449static int __init atl1_init_module(void)
2450{
f3cc28c7
JC
2451 return pci_register_driver(&atl1_driver);
2452}
2453
2454module_init(atl1_init_module);
2455module_exit(atl1_exit_module);