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atl1: header file cleanup
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f3cc28c7
JC		 1/*
2 * Copyright(c) 2005 - 2006 Attansic Corporation. All rights reserved.
3 * Copyright(c) 2006 Chris Snook <csnook@redhat.com>
4 * Copyright(c) 2006 Jay Cliburn <jcliburn@gmail.com>
5 *
6 * Derived from Intel e1000 driver
7 * Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved.
8 *
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License as published by the Free
11 * Software Foundation; either version 2 of the License, or (at your option)
12 * any later version.
13 *
14 * This program is distributed in the hope that it will be useful, but WITHOUT
15 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
16 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
17 * more details.
18 *
19 * You should have received a copy of the GNU General Public License along with
20 * this program; if not, write to the Free Software Foundation, Inc., 59
21 * Temple Place - Suite 330, Boston, MA 02111-1307, USA.
22 *
23 * The full GNU General Public License is included in this distribution in the
24 * file called COPYING.
25 *
26 * Contact Information:
27 * Xiong Huang <xiong_huang@attansic.com>
28 * Attansic Technology Corp. 3F 147, Xianzheng 9th Road, Zhubei,
29 * Xinzhu 302, TAIWAN, REPUBLIC OF CHINA
30 *
31 * Chris Snook <csnook@redhat.com>
32 * Jay Cliburn <jcliburn@gmail.com>
33 *
34 * This version is adapted from the Attansic reference driver for
35 * inclusion in the Linux kernel. It is currently under heavy development.
36 * A very incomplete list of things that need to be dealt with:
37 *
38 * TODO:
39 * Fix TSO; tx performance is horrible with TSO enabled.
40 * Wake on LAN.
41 * Add more ethtool functions, including set ring parameters.
42 * Fix abstruse irq enable/disable condition described here:
43 * http://marc.theaimsgroup.com/?l=linux-netdev&m=116398508500553&w=2
44 *
45 * NEEDS TESTING:
46 * VLAN
47 * multicast
48 * promiscuous mode
49 * interrupt coalescing
50 * SMP torture testing
51 */
52
53#include <linux/types.h>
54#include <linux/netdevice.h>
55#include <linux/pci.h>
56#include <linux/spinlock.h>
57#include <linux/slab.h>
58#include <linux/string.h>
59#include <linux/skbuff.h>
60#include <linux/etherdevice.h>
61#include <linux/if_vlan.h>
62#include <linux/irqreturn.h>
63#include <linux/workqueue.h>
64#include <linux/timer.h>
65#include <linux/jiffies.h>
66#include <linux/hardirq.h>
67#include <linux/interrupt.h>
68#include <linux/irqflags.h>
69#include <linux/dma-mapping.h>
70#include <linux/net.h>
71#include <linux/pm.h>
72#include <linux/in.h>
73#include <linux/ip.h>
74#include <linux/tcp.h>
75#include <linux/compiler.h>
76#include <linux/delay.h>
77#include <linux/mii.h>
78#include <net/checksum.h>
79
80#include <asm/atomic.h>
81#include <asm/byteorder.h>
82
83#include "atl1.h"
84
9cc6d14e 85#define DRIVER_VERSION "2.0.7"
f3cc28c7
JC		 86
87char atl1_driver_name[] = "atl1";
88static const char atl1_driver_string[] = "Attansic L1 Ethernet Network Driver";
89static const char atl1_copyright[] = "Copyright(c) 2005-2006 Attansic Corporation.";
90char atl1_driver_version[] = DRIVER_VERSION;
91
92MODULE_AUTHOR
93 ("Attansic Corporation <xiong_huang@attansic.com>, Chris Snook <csnook@redhat.com>, Jay Cliburn <jcliburn@gmail.com>");
94MODULE_DESCRIPTION("Attansic 1000M Ethernet Network Driver");
95MODULE_LICENSE("GPL");
96MODULE_VERSION(DRIVER_VERSION);
97
98/*
99 * atl1_pci_tbl - PCI Device ID Table
100 */
101static const struct pci_device_id atl1_pci_tbl[] = {
e81e557a 102 {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATTANSIC_L1)},
f3cc28c7
JC		 103 /* required last entry */
104 {0,}
105};
106
107MODULE_DEVICE_TABLE(pci, atl1_pci_tbl);
108
109/*
110 * atl1_sw_init - Initialize general software structures (struct atl1_adapter)
111 * @adapter: board private structure to initialize
112 *
113 * atl1_sw_init initializes the Adapter private data structure.
114 * Fields are initialized based on PCI device information and
115 * OS network device settings (MTU size).
116 */
117static int __devinit atl1_sw_init(struct atl1_adapter *adapter)
118{
119 struct atl1_hw *hw = &adapter->hw;
120 struct net_device *netdev = adapter->netdev;
121 struct pci_dev *pdev = adapter->pdev;
122
123 /* PCI config space info */
124 pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id);
125
126 hw->max_frame_size = netdev->mtu + ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
127 hw->min_frame_size = MINIMUM_ETHERNET_FRAME_SIZE;
128
129 adapter->wol = 0;
130 adapter->rx_buffer_len = (hw->max_frame_size + 7) & ~7;
131 adapter->ict = 50000; /* 100ms */
132 adapter->link_speed = SPEED_0; /* hardware init */
133 adapter->link_duplex = FULL_DUPLEX;
134
135 hw->phy_configured = false;
136 hw->preamble_len = 7;
137 hw->ipgt = 0x60;
138 hw->min_ifg = 0x50;
139 hw->ipgr1 = 0x40;
140 hw->ipgr2 = 0x60;
141 hw->max_retry = 0xf;
142 hw->lcol = 0x37;
143 hw->jam_ipg = 7;
144 hw->rfd_burst = 8;
145 hw->rrd_burst = 8;
146 hw->rfd_fetch_gap = 1;
147 hw->rx_jumbo_th = adapter->rx_buffer_len / 8;
148 hw->rx_jumbo_lkah = 1;
149 hw->rrd_ret_timer = 16;
150 hw->tpd_burst = 4;
151 hw->tpd_fetch_th = 16;
152 hw->txf_burst = 0x100;
153 hw->tx_jumbo_task_th = (hw->max_frame_size + 7) >> 3;
154 hw->tpd_fetch_gap = 1;
155 hw->rcb_value = atl1_rcb_64;
156 hw->dma_ord = atl1_dma_ord_enh;
157 hw->dmar_block = atl1_dma_req_256;
158 hw->dmaw_block = atl1_dma_req_256;
159 hw->cmb_rrd = 4;
160 hw->cmb_tpd = 4;
161 hw->cmb_rx_timer = 1; /* about 2us */
162 hw->cmb_tx_timer = 1; /* about 2us */
163 hw->smb_timer = 100000; /* about 200ms */
164
f3cc28c7
JC		 165 spin_lock_init(&adapter->lock);
166 spin_lock_init(&adapter->mb_lock);
167
168 return 0;
169}
170
171/*
172 * atl1_setup_mem_resources - allocate Tx / RX descriptor resources
173 * @adapter: board private structure
174 *
175 * Return 0 on success, negative on failure
176 */
177s32 atl1_setup_ring_resources(struct atl1_adapter *adapter)
178{
179 struct atl1_tpd_ring *tpd_ring = &adapter->tpd_ring;
180 struct atl1_rfd_ring *rfd_ring = &adapter->rfd_ring;
181 struct atl1_rrd_ring *rrd_ring = &adapter->rrd_ring;
182 struct atl1_ring_header *ring_header = &adapter->ring_header;
183 struct pci_dev *pdev = adapter->pdev;
184 int size;
185 u8 offset = 0;
186
187 size = sizeof(struct atl1_buffer) * (tpd_ring->count + rfd_ring->count);
188 tpd_ring->buffer_info = kzalloc(size, GFP_KERNEL);
189 if (unlikely(!tpd_ring->buffer_info)) {
1e006364 190 dev_err(&pdev->dev, "kzalloc failed , size = D%d\n", size);
f3cc28c7
JC		 191 goto err_nomem;
192 }
193 rfd_ring->buffer_info =
194 (struct atl1_buffer *)(tpd_ring->buffer_info + tpd_ring->count);
195
196 /* real ring DMA buffer */
197 ring_header->size = size = sizeof(struct tx_packet_desc) *
198 tpd_ring->count
199 + sizeof(struct rx_free_desc) * rfd_ring->count
200 + sizeof(struct rx_return_desc) * rrd_ring->count
201 + sizeof(struct coals_msg_block)
202 + sizeof(struct stats_msg_block)
203 + 40; /* "40: for 8 bytes align" huh? -- CHS */
204
205 ring_header->desc = pci_alloc_consistent(pdev, ring_header->size,
206 &ring_header->dma);
207 if (unlikely(!ring_header->desc)) {
1e006364 208 dev_err(&pdev->dev, "pci_alloc_consistent failed\n");
f3cc28c7
JC		 209 goto err_nomem;
210 }
211
212 memset(ring_header->desc, 0, ring_header->size);
213
214 /* init TPD ring */
215 tpd_ring->dma = ring_header->dma;
216 offset = (tpd_ring->dma & 0x7) ? (8 - (ring_header->dma & 0x7)) : 0;
217 tpd_ring->dma += offset;
218 tpd_ring->desc = (u8 *) ring_header->desc + offset;
219 tpd_ring->size = sizeof(struct tx_packet_desc) * tpd_ring->count;
220 atomic_set(&tpd_ring->next_to_use, 0);
221 atomic_set(&tpd_ring->next_to_clean, 0);
222
223 /* init RFD ring */
224 rfd_ring->dma = tpd_ring->dma + tpd_ring->size;
225 offset = (rfd_ring->dma & 0x7) ? (8 - (rfd_ring->dma & 0x7)) : 0;
226 rfd_ring->dma += offset;
227 rfd_ring->desc = (u8 *) tpd_ring->desc + (tpd_ring->size + offset);
228 rfd_ring->size = sizeof(struct rx_free_desc) * rfd_ring->count;
229 rfd_ring->next_to_clean = 0;
230 /* rfd_ring->next_to_use = rfd_ring->count - 1; */
231 atomic_set(&rfd_ring->next_to_use, 0);
232
233 /* init RRD ring */
234 rrd_ring->dma = rfd_ring->dma + rfd_ring->size;
235 offset = (rrd_ring->dma & 0x7) ? (8 - (rrd_ring->dma & 0x7)) : 0;
236 rrd_ring->dma += offset;
237 rrd_ring->desc = (u8 *) rfd_ring->desc + (rfd_ring->size + offset);
238 rrd_ring->size = sizeof(struct rx_return_desc) * rrd_ring->count;
239 rrd_ring->next_to_use = 0;
240 atomic_set(&rrd_ring->next_to_clean, 0);
241
242 /* init CMB */
243 adapter->cmb.dma = rrd_ring->dma + rrd_ring->size;
244 offset = (adapter->cmb.dma & 0x7) ? (8 - (adapter->cmb.dma & 0x7)) : 0;
245 adapter->cmb.dma += offset;
246 adapter->cmb.cmb =
247 (struct coals_msg_block *) ((u8 *) rrd_ring->desc +
248 (rrd_ring->size + offset));
249
250 /* init SMB */
251 adapter->smb.dma = adapter->cmb.dma + sizeof(struct coals_msg_block);
252 offset = (adapter->smb.dma & 0x7) ? (8 - (adapter->smb.dma & 0x7)) : 0;
253 adapter->smb.dma += offset;
254 adapter->smb.smb = (struct stats_msg_block *)
255 ((u8 *) adapter->cmb.cmb + (sizeof(struct coals_msg_block) + offset));
256
257 return ATL1_SUCCESS;
258
259err_nomem:
260 kfree(tpd_ring->buffer_info);
261 return -ENOMEM;
262}
263
264/*
265 * atl1_irq_enable - Enable default interrupt generation settings
266 * @adapter: board private structure
267 */
268static void atl1_irq_enable(struct atl1_adapter *adapter)
269{
70d9d4b2
JC		 270 iowrite32(IMR_NORMAL_MASK, adapter->hw.hw_addr + REG_IMR);
271 ioread32(adapter->hw.hw_addr + REG_IMR);
f3cc28c7
JC		 272}
273
274static void atl1_clear_phy_int(struct atl1_adapter *adapter)
275{
276 u16 phy_data;
277 unsigned long flags;
278
279 spin_lock_irqsave(&adapter->lock, flags);
280 atl1_read_phy_reg(&adapter->hw, 19, &phy_data);
281 spin_unlock_irqrestore(&adapter->lock, flags);
282}
283
284static void atl1_inc_smb(struct atl1_adapter *adapter)
285{
286 struct stats_msg_block *smb = adapter->smb.smb;
287
288 /* Fill out the OS statistics structure */
289 adapter->soft_stats.rx_packets += smb->rx_ok;
290 adapter->soft_stats.tx_packets += smb->tx_ok;
291 adapter->soft_stats.rx_bytes += smb->rx_byte_cnt;
292 adapter->soft_stats.tx_bytes += smb->tx_byte_cnt;
293 adapter->soft_stats.multicast += smb->rx_mcast;
294 adapter->soft_stats.collisions += (smb->tx_1_col +
295 smb->tx_2_col * 2 +
296 smb->tx_late_col +
297 smb->tx_abort_col *
298 adapter->hw.max_retry);
299
300 /* Rx Errors */
301 adapter->soft_stats.rx_errors += (smb->rx_frag +
302 smb->rx_fcs_err +
303 smb->rx_len_err +
304 smb->rx_sz_ov +
305 smb->rx_rxf_ov +
306 smb->rx_rrd_ov + smb->rx_align_err);
307 adapter->soft_stats.rx_fifo_errors += smb->rx_rxf_ov;
308 adapter->soft_stats.rx_length_errors += smb->rx_len_err;
309 adapter->soft_stats.rx_crc_errors += smb->rx_fcs_err;
310 adapter->soft_stats.rx_frame_errors += smb->rx_align_err;
311 adapter->soft_stats.rx_missed_errors += (smb->rx_rrd_ov +
312 smb->rx_rxf_ov);
313
314 adapter->soft_stats.rx_pause += smb->rx_pause;
315 adapter->soft_stats.rx_rrd_ov += smb->rx_rrd_ov;
316 adapter->soft_stats.rx_trunc += smb->rx_sz_ov;
317
318 /* Tx Errors */
319 adapter->soft_stats.tx_errors += (smb->tx_late_col +
320 smb->tx_abort_col +
321 smb->tx_underrun + smb->tx_trunc);
322 adapter->soft_stats.tx_fifo_errors += smb->tx_underrun;
323 adapter->soft_stats.tx_aborted_errors += smb->tx_abort_col;
324 adapter->soft_stats.tx_window_errors += smb->tx_late_col;
325
326 adapter->soft_stats.excecol += smb->tx_abort_col;
327 adapter->soft_stats.deffer += smb->tx_defer;
328 adapter->soft_stats.scc += smb->tx_1_col;
329 adapter->soft_stats.mcc += smb->tx_2_col;
330 adapter->soft_stats.latecol += smb->tx_late_col;
331 adapter->soft_stats.tx_underun += smb->tx_underrun;
332 adapter->soft_stats.tx_trunc += smb->tx_trunc;
333 adapter->soft_stats.tx_pause += smb->tx_pause;
334
335 adapter->net_stats.rx_packets = adapter->soft_stats.rx_packets;
336 adapter->net_stats.tx_packets = adapter->soft_stats.tx_packets;
337 adapter->net_stats.rx_bytes = adapter->soft_stats.rx_bytes;
338 adapter->net_stats.tx_bytes = adapter->soft_stats.tx_bytes;
339 adapter->net_stats.multicast = adapter->soft_stats.multicast;
340 adapter->net_stats.collisions = adapter->soft_stats.collisions;
341 adapter->net_stats.rx_errors = adapter->soft_stats.rx_errors;
342 adapter->net_stats.rx_over_errors =
343 adapter->soft_stats.rx_missed_errors;
344 adapter->net_stats.rx_length_errors =
345 adapter->soft_stats.rx_length_errors;
346 adapter->net_stats.rx_crc_errors = adapter->soft_stats.rx_crc_errors;
347 adapter->net_stats.rx_frame_errors =
348 adapter->soft_stats.rx_frame_errors;
349 adapter->net_stats.rx_fifo_errors = adapter->soft_stats.rx_fifo_errors;
350 adapter->net_stats.rx_missed_errors =
351 adapter->soft_stats.rx_missed_errors;
352 adapter->net_stats.tx_errors = adapter->soft_stats.tx_errors;
353 adapter->net_stats.tx_fifo_errors = adapter->soft_stats.tx_fifo_errors;
354 adapter->net_stats.tx_aborted_errors =
355 adapter->soft_stats.tx_aborted_errors;
356 adapter->net_stats.tx_window_errors =
357 adapter->soft_stats.tx_window_errors;
358 adapter->net_stats.tx_carrier_errors =
359 adapter->soft_stats.tx_carrier_errors;
360}
361
362static void atl1_rx_checksum(struct atl1_adapter *adapter,
363 struct rx_return_desc *rrd,
364 struct sk_buff *skb)
365{
366 skb->ip_summed = CHECKSUM_NONE;
367
368 if (unlikely(rrd->pkt_flg & PACKET_FLAG_ERR)) {
369 if (rrd->err_flg & (ERR_FLAG_CRC | ERR_FLAG_TRUNC |
370 ERR_FLAG_CODE | ERR_FLAG_OV)) {
371 adapter->hw_csum_err++;
1e006364 372 dev_dbg(&adapter->pdev->dev, "rx checksum error\n");
f3cc28c7
JC		 373 return;
374 }
375 }
376
377 /* not IPv4 */
378 if (!(rrd->pkt_flg & PACKET_FLAG_IPV4))
379 /* checksum is invalid, but it's not an IPv4 pkt, so ok */
380 return;
381
382 /* IPv4 packet */
383 if (likely(!(rrd->err_flg &
384 (ERR_FLAG_IP_CHKSUM | ERR_FLAG_L4_CHKSUM)))) {
385 skb->ip_summed = CHECKSUM_UNNECESSARY;
386 adapter->hw_csum_good++;
387 return;
388 }
389
390 /* IPv4, but hardware thinks its checksum is wrong */
1e006364
JC		 391 dev_dbg(&adapter->pdev->dev,
392 "hw csum wrong, pkt_flag:%x, err_flag:%x\n",
393 rrd->pkt_flg, rrd->err_flg);
f3cc28c7
JC		 394 skb->ip_summed = CHECKSUM_COMPLETE;
395 skb->csum = htons(rrd->xsz.xsum_sz.rx_chksum);
396 adapter->hw_csum_err++;
397 return;
398}
399
400/*
401 * atl1_alloc_rx_buffers - Replace used receive buffers
402 * @adapter: address of board private structure
403 */
404static u16 atl1_alloc_rx_buffers(struct atl1_adapter *adapter)
405{
406 struct atl1_rfd_ring *rfd_ring = &adapter->rfd_ring;
f3cc28c7
JC		 407 struct pci_dev *pdev = adapter->pdev;
408 struct page *page;
409 unsigned long offset;
410 struct atl1_buffer *buffer_info, *next_info;
411 struct sk_buff *skb;
412 u16 num_alloc = 0;
413 u16 rfd_next_to_use, next_next;
414 struct rx_free_desc *rfd_desc;
415
416 next_next = rfd_next_to_use = atomic_read(&rfd_ring->next_to_use);
417 if (++next_next == rfd_ring->count)
418 next_next = 0;
419 buffer_info = &rfd_ring->buffer_info[rfd_next_to_use];
420 next_info = &rfd_ring->buffer_info[next_next];
421
422 while (!buffer_info->alloced && !next_info->alloced) {
423 if (buffer_info->skb) {
424 buffer_info->alloced = 1;
425 goto next;
426 }
427
428 rfd_desc = ATL1_RFD_DESC(rfd_ring, rfd_next_to_use);
429
430 skb = dev_alloc_skb(adapter->rx_buffer_len + NET_IP_ALIGN);
431 if (unlikely(!skb)) { /* Better luck next round */
432 adapter->net_stats.rx_dropped++;
433 break;
434 }
435
436 /*
437 * Make buffer alignment 2 beyond a 16 byte boundary
438 * this will result in a 16 byte aligned IP header after
439 * the 14 byte MAC header is removed
440 */
441 skb_reserve(skb, NET_IP_ALIGN);
f3cc28c7
JC		 442
443 buffer_info->alloced = 1;
444 buffer_info->skb = skb;
445 buffer_info->length = (u16) adapter->rx_buffer_len;
446 page = virt_to_page(skb->data);
447 offset = (unsigned long)skb->data & ~PAGE_MASK;
448 buffer_info->dma = pci_map_page(pdev, page, offset,
449 adapter->rx_buffer_len,
450 PCI_DMA_FROMDEVICE);
451 rfd_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
452 rfd_desc->buf_len = cpu_to_le16(adapter->rx_buffer_len);
453 rfd_desc->coalese = 0;
454
455next:
456 rfd_next_to_use = next_next;
457 if (unlikely(++next_next == rfd_ring->count))
458 next_next = 0;
459
460 buffer_info = &rfd_ring->buffer_info[rfd_next_to_use];
461 next_info = &rfd_ring->buffer_info[next_next];
462 num_alloc++;
463 }
464
465 if (num_alloc) {
466 /*
467 * Force memory writes to complete before letting h/w
468 * know there are new descriptors to fetch. (Only
469 * applicable for weak-ordered memory model archs,
470 * such as IA-64).
471 */
472 wmb();
473 atomic_set(&rfd_ring->next_to_use, (int)rfd_next_to_use);
474 }
475 return num_alloc;
476}
477
478static void atl1_intr_rx(struct atl1_adapter *adapter)
479{
480 int i, count;
481 u16 length;
482 u16 rrd_next_to_clean;
483 u32 value;
484 struct atl1_rfd_ring *rfd_ring = &adapter->rfd_ring;
485 struct atl1_rrd_ring *rrd_ring = &adapter->rrd_ring;
486 struct atl1_buffer *buffer_info;
487 struct rx_return_desc *rrd;
488 struct sk_buff *skb;
489
490 count = 0;
491
492 rrd_next_to_clean = atomic_read(&rrd_ring->next_to_clean);
493
494 while (1) {
495 rrd = ATL1_RRD_DESC(rrd_ring, rrd_next_to_clean);
496 i = 1;
497 if (likely(rrd->xsz.valid)) { /* packet valid */
498chk_rrd:
499 /* check rrd status */
500 if (likely(rrd->num_buf == 1))
501 goto rrd_ok;
502
503 /* rrd seems to be bad */
504 if (unlikely(i-- > 0)) {
505 /* rrd may not be DMAed completely */
1e006364
JC		 506 dev_dbg(&adapter->pdev->dev,
507 "incomplete RRD DMA transfer\n");
f3cc28c7
JC		 508 udelay(1);
509 goto chk_rrd;
510 }
511 /* bad rrd */
1e006364 512 dev_dbg(&adapter->pdev->dev, "bad RRD\n");
f3cc28c7
JC		 513 /* see if update RFD index */
514 if (rrd->num_buf > 1) {
515 u16 num_buf;
516 num_buf =
517 (rrd->xsz.xsum_sz.pkt_size +
518 adapter->rx_buffer_len -
519 1) / adapter->rx_buffer_len;
520 if (rrd->num_buf == num_buf) {
521 /* clean alloc flag for bad rrd */
522 while (rfd_ring->next_to_clean !=
523 (rrd->buf_indx + num_buf)) {
524 rfd_ring->buffer_info[rfd_ring->
525 next_to_clean].alloced = 0;
526 if (++rfd_ring->next_to_clean ==
527 rfd_ring->count) {
528 rfd_ring->
529 next_to_clean = 0;
530 }
531 }
532 }
533 }
534
535 /* update rrd */
536 rrd->xsz.valid = 0;
537 if (++rrd_next_to_clean == rrd_ring->count)
538 rrd_next_to_clean = 0;
539 count++;
540 continue;
541 } else { /* current rrd still not be updated */
542
543 break;
544 }
545rrd_ok:
546 /* clean alloc flag for bad rrd */
547 while (rfd_ring->next_to_clean != rrd->buf_indx) {
548 rfd_ring->buffer_info[rfd_ring->next_to_clean].alloced =
549 0;
550 if (++rfd_ring->next_to_clean == rfd_ring->count)
551 rfd_ring->next_to_clean = 0;
552 }
553
554 buffer_info = &rfd_ring->buffer_info[rrd->buf_indx];
555 if (++rfd_ring->next_to_clean == rfd_ring->count)
556 rfd_ring->next_to_clean = 0;
557
558 /* update rrd next to clean */
559 if (++rrd_next_to_clean == rrd_ring->count)
560 rrd_next_to_clean = 0;
561 count++;
562
563 if (unlikely(rrd->pkt_flg & PACKET_FLAG_ERR)) {
564 if (!(rrd->err_flg &
565 (ERR_FLAG_IP_CHKSUM | ERR_FLAG_L4_CHKSUM
566 | ERR_FLAG_LEN))) {
567 /* packet error, don't need upstream */
568 buffer_info->alloced = 0;
569 rrd->xsz.valid = 0;
570 continue;
571 }
572 }
573
574 /* Good Receive */
575 pci_unmap_page(adapter->pdev, buffer_info->dma,
576 buffer_info->length, PCI_DMA_FROMDEVICE);
577 skb = buffer_info->skb;
578 length = le16_to_cpu(rrd->xsz.xsum_sz.pkt_size);
579
580 skb_put(skb, length - ETHERNET_FCS_SIZE);
581
582 /* Receive Checksum Offload */
583 atl1_rx_checksum(adapter, rrd, skb);
584 skb->protocol = eth_type_trans(skb, adapter->netdev);
585
586 if (adapter->vlgrp && (rrd->pkt_flg & PACKET_FLAG_VLAN_INS)) {
587 u16 vlan_tag = (rrd->vlan_tag >> 4) |
588 ((rrd->vlan_tag & 7) << 13) |
589 ((rrd->vlan_tag & 8) << 9);
590 vlan_hwaccel_rx(skb, adapter->vlgrp, vlan_tag);
591 } else
592 netif_rx(skb);
593
594 /* let protocol layer free skb */
595 buffer_info->skb = NULL;
596 buffer_info->alloced = 0;
597 rrd->xsz.valid = 0;
598
599 adapter->netdev->last_rx = jiffies;
600 }
601
602 atomic_set(&rrd_ring->next_to_clean, rrd_next_to_clean);
603
604 atl1_alloc_rx_buffers(adapter);
605
606 /* update mailbox ? */
607 if (count) {
608 u32 tpd_next_to_use;
609 u32 rfd_next_to_use;
610 u32 rrd_next_to_clean;
611
612 spin_lock(&adapter->mb_lock);
613
614 tpd_next_to_use = atomic_read(&adapter->tpd_ring.next_to_use);
615 rfd_next_to_use =
616 atomic_read(&adapter->rfd_ring.next_to_use);
617 rrd_next_to_clean =
618 atomic_read(&adapter->rrd_ring.next_to_clean);
619 value = ((rfd_next_to_use & MB_RFD_PROD_INDX_MASK) <<
620 MB_RFD_PROD_INDX_SHIFT) |
621 ((rrd_next_to_clean & MB_RRD_CONS_INDX_MASK) <<
622 MB_RRD_CONS_INDX_SHIFT) |
623 ((tpd_next_to_use & MB_TPD_PROD_INDX_MASK) <<
624 MB_TPD_PROD_INDX_SHIFT);
625 iowrite32(value, adapter->hw.hw_addr + REG_MAILBOX);
626 spin_unlock(&adapter->mb_lock);
627 }
628}
629
630static void atl1_intr_tx(struct atl1_adapter *adapter)
631{
632 struct atl1_tpd_ring *tpd_ring = &adapter->tpd_ring;
633 struct atl1_buffer *buffer_info;
634 u16 sw_tpd_next_to_clean;
635 u16 cmb_tpd_next_to_clean;
f3cc28c7
JC		 636
637 sw_tpd_next_to_clean = atomic_read(&tpd_ring->next_to_clean);
638 cmb_tpd_next_to_clean = le16_to_cpu(adapter->cmb.cmb->tpd_cons_idx);
639
640 while (cmb_tpd_next_to_clean != sw_tpd_next_to_clean) {
641 struct tx_packet_desc *tpd;
89c0d26b 642
f3cc28c7
JC		 643 tpd = ATL1_TPD_DESC(tpd_ring, sw_tpd_next_to_clean);
644 buffer_info = &tpd_ring->buffer_info[sw_tpd_next_to_clean];
645 if (buffer_info->dma) {
646 pci_unmap_page(adapter->pdev, buffer_info->dma,
647 buffer_info->length, PCI_DMA_TODEVICE);
648 buffer_info->dma = 0;
649 }
650
651 if (buffer_info->skb) {
652 dev_kfree_skb_irq(buffer_info->skb);
653 buffer_info->skb = NULL;
654 }
655 tpd->buffer_addr = 0;
656 tpd->desc.data = 0;
657
658 if (++sw_tpd_next_to_clean == tpd_ring->count)
659 sw_tpd_next_to_clean = 0;
660 }
661 atomic_set(&tpd_ring->next_to_clean, sw_tpd_next_to_clean);
662
663 if (netif_queue_stopped(adapter->netdev)
664 && netif_carrier_ok(adapter->netdev))
665 netif_wake_queue(adapter->netdev);
666}
667
668static void atl1_check_for_link(struct atl1_adapter *adapter)
669{
670 struct net_device *netdev = adapter->netdev;
671 u16 phy_data = 0;
672
673 spin_lock(&adapter->lock);
674 adapter->phy_timer_pending = false;
675 atl1_read_phy_reg(&adapter->hw, MII_BMSR, &phy_data);
676 atl1_read_phy_reg(&adapter->hw, MII_BMSR, &phy_data);
677 spin_unlock(&adapter->lock);
678
679 /* notify upper layer link down ASAP */
680 if (!(phy_data & BMSR_LSTATUS)) { /* Link Down */
681 if (netif_carrier_ok(netdev)) { /* old link state: Up */
1e006364
JC		 682 dev_info(&adapter->pdev->dev, "%s link is down\n",
683 netdev->name);
f3cc28c7
JC		 684 adapter->link_speed = SPEED_0;
685 netif_carrier_off(netdev);
686 netif_stop_queue(netdev);
687 }
688 }
689 schedule_work(&adapter->link_chg_task);
690}
691
692/*
693 * atl1_intr - Interrupt Handler
694 * @irq: interrupt number
695 * @data: pointer to a network interface device structure
696 * @pt_regs: CPU registers structure
697 */
698static irqreturn_t atl1_intr(int irq, void *data)
699{
700 /*struct atl1_adapter *adapter = ((struct net_device *)data)->priv;*/
701 struct atl1_adapter *adapter = netdev_priv(data);
702 u32 status;
703 u8 update_rx;
704 int max_ints = 10;
705
706 status = adapter->cmb.cmb->int_stats;
707 if (!status)
708 return IRQ_NONE;
709
710 update_rx = 0;
711
712 do {
713 /* clear CMB interrupt status at once */
714 adapter->cmb.cmb->int_stats = 0;
715
716 if (status & ISR_GPHY) /* clear phy status */
717 atl1_clear_phy_int(adapter);
718
719 /* clear ISR status, and Enable CMB DMA/Disable Interrupt */
720 iowrite32(status | ISR_DIS_INT, adapter->hw.hw_addr + REG_ISR);
721
722 /* check if SMB intr */
723 if (status & ISR_SMB)
724 atl1_inc_smb(adapter);
725
726 /* check if PCIE PHY Link down */
727 if (status & ISR_PHY_LINKDOWN) {
1e006364
JC		 728 dev_dbg(&adapter->pdev->dev, "pcie phy link down %x\n",
729 status);
f3cc28c7
JC		 730 if (netif_running(adapter->netdev)) { /* reset MAC */
731 iowrite32(0, adapter->hw.hw_addr + REG_IMR);
732 schedule_work(&adapter->pcie_dma_to_rst_task);
733 return IRQ_HANDLED;
734 }
735 }
736
737 /* check if DMA read/write error ? */
738 if (status & (ISR_DMAR_TO_RST | ISR_DMAW_TO_RST)) {
1e006364
JC		 739 dev_dbg(&adapter->pdev->dev,
740 "pcie DMA r/w error (status = 0x%x)\n",
741 status);
f3cc28c7
JC		 742 iowrite32(0, adapter->hw.hw_addr + REG_IMR);
743 schedule_work(&adapter->pcie_dma_to_rst_task);
744 return IRQ_HANDLED;
745 }
746
747 /* link event */
748 if (status & ISR_GPHY) {
749 adapter->soft_stats.tx_carrier_errors++;
750 atl1_check_for_link(adapter);
751 }
752
753 /* transmit event */
754 if (status & ISR_CMB_TX)
755 atl1_intr_tx(adapter);
756
757 /* rx exception */
758 if (unlikely(status & (ISR_RXF_OV | ISR_RFD_UNRUN |
1e006364
JC		 759 ISR_RRD_OV | ISR_HOST_RFD_UNRUN |
760 ISR_HOST_RRD_OV | ISR_CMB_RX))) {
761 if (status & (ISR_RXF_OV | ISR_RFD_UNRUN |
f3cc28c7 762 ISR_RRD_OV | ISR_HOST_RFD_UNRUN |
1e006364
JC		 763 ISR_HOST_RRD_OV))
764 dev_dbg(&adapter->pdev->dev,
765 "rx exception, ISR = 0x%x\n", status);
f3cc28c7
JC		 766 atl1_intr_rx(adapter);
767 }
768
769 if (--max_ints < 0)
770 break;
771
772 } while ((status = adapter->cmb.cmb->int_stats));
773
774 /* re-enable Interrupt */
775 iowrite32(ISR_DIS_SMB | ISR_DIS_DMA, adapter->hw.hw_addr + REG_ISR);
776 return IRQ_HANDLED;
777}
778
779/*
780 * atl1_set_multi - Multicast and Promiscuous mode set
781 * @netdev: network interface device structure
782 *
783 * The set_multi entry point is called whenever the multicast address
784 * list or the network interface flags are updated. This routine is
785 * responsible for configuring the hardware for proper multicast,
786 * promiscuous mode, and all-multi behavior.
787 */
788static void atl1_set_multi(struct net_device *netdev)
789{
790 struct atl1_adapter *adapter = netdev_priv(netdev);
791 struct atl1_hw *hw = &adapter->hw;
792 struct dev_mc_list *mc_ptr;
793 u32 rctl;
794 u32 hash_value;
795
796 /* Check for Promiscuous and All Multicast modes */
797 rctl = ioread32(hw->hw_addr + REG_MAC_CTRL);
798 if (netdev->flags & IFF_PROMISC)
799 rctl |= MAC_CTRL_PROMIS_EN;
800 else if (netdev->flags & IFF_ALLMULTI) {
801 rctl |= MAC_CTRL_MC_ALL_EN;
802 rctl &= ~MAC_CTRL_PROMIS_EN;
803 } else
804 rctl &= ~(MAC_CTRL_PROMIS_EN | MAC_CTRL_MC_ALL_EN);
805
806 iowrite32(rctl, hw->hw_addr + REG_MAC_CTRL);
807
808 /* clear the old settings from the multicast hash table */
809 iowrite32(0, hw->hw_addr + REG_RX_HASH_TABLE);
810 iowrite32(0, (hw->hw_addr + REG_RX_HASH_TABLE) + (1 << 2));
811
812 /* compute mc addresses' hash value ,and put it into hash table */
813 for (mc_ptr = netdev->mc_list; mc_ptr; mc_ptr = mc_ptr->next) {
814 hash_value = atl1_hash_mc_addr(hw, mc_ptr->dmi_addr);
815 atl1_hash_set(hw, hash_value);
816 }
817}
818
819static void atl1_setup_mac_ctrl(struct atl1_adapter *adapter)
820{
821 u32 value;
822 struct atl1_hw *hw = &adapter->hw;
823 struct net_device *netdev = adapter->netdev;
824 /* Config MAC CTRL Register */
825 value = MAC_CTRL_TX_EN | MAC_CTRL_RX_EN;
826 /* duplex */
827 if (FULL_DUPLEX == adapter->link_duplex)
828 value |= MAC_CTRL_DUPLX;
829 /* speed */
830 value |= ((u32) ((SPEED_1000 == adapter->link_speed) ?
831 MAC_CTRL_SPEED_1000 : MAC_CTRL_SPEED_10_100) <<
832 MAC_CTRL_SPEED_SHIFT);
833 /* flow control */
834 value |= (MAC_CTRL_TX_FLOW | MAC_CTRL_RX_FLOW);
835 /* PAD & CRC */
836 value |= (MAC_CTRL_ADD_CRC | MAC_CTRL_PAD);
837 /* preamble length */
838 value |= (((u32) adapter->hw.preamble_len
839 & MAC_CTRL_PRMLEN_MASK) << MAC_CTRL_PRMLEN_SHIFT);
840 /* vlan */
841 if (adapter->vlgrp)
842 value |= MAC_CTRL_RMV_VLAN;
843 /* rx checksum
844 if (adapter->rx_csum)
845 value |= MAC_CTRL_RX_CHKSUM_EN;
846 */
847 /* filter mode */
848 value |= MAC_CTRL_BC_EN;
849 if (netdev->flags & IFF_PROMISC)
850 value |= MAC_CTRL_PROMIS_EN;
851 else if (netdev->flags & IFF_ALLMULTI)
852 value |= MAC_CTRL_MC_ALL_EN;
853 /* value |= MAC_CTRL_LOOPBACK; */
854 iowrite32(value, hw->hw_addr + REG_MAC_CTRL);
855}
856
857static u32 atl1_check_link(struct atl1_adapter *adapter)
858{
859 struct atl1_hw *hw = &adapter->hw;
860 struct net_device *netdev = adapter->netdev;
861 u32 ret_val;
862 u16 speed, duplex, phy_data;
863 int reconfig = 0;
864
865 /* MII_BMSR must read twice */
866 atl1_read_phy_reg(hw, MII_BMSR, &phy_data);
867 atl1_read_phy_reg(hw, MII_BMSR, &phy_data);
868 if (!(phy_data & BMSR_LSTATUS)) { /* link down */
869 if (netif_carrier_ok(netdev)) { /* old link state: Up */
1e006364 870 dev_info(&adapter->pdev->dev, "link is down\n");
f3cc28c7
JC		 871 adapter->link_speed = SPEED_0;
872 netif_carrier_off(netdev);
873 netif_stop_queue(netdev);
874 }
875 return ATL1_SUCCESS;
876 }
877
878 /* Link Up */
879 ret_val = atl1_get_speed_and_duplex(hw, &speed, &duplex);
880 if (ret_val)
881 return ret_val;
882
883 switch (hw->media_type) {
884 case MEDIA_TYPE_1000M_FULL:
885 if (speed != SPEED_1000 || duplex != FULL_DUPLEX)
886 reconfig = 1;
887 break;
888 case MEDIA_TYPE_100M_FULL:
889 if (speed != SPEED_100 || duplex != FULL_DUPLEX)
890 reconfig = 1;
891 break;
892 case MEDIA_TYPE_100M_HALF:
893 if (speed != SPEED_100 || duplex != HALF_DUPLEX)
894 reconfig = 1;
895 break;
896 case MEDIA_TYPE_10M_FULL:
897 if (speed != SPEED_10 || duplex != FULL_DUPLEX)
898 reconfig = 1;
899 break;
900 case MEDIA_TYPE_10M_HALF:
901 if (speed != SPEED_10 || duplex != HALF_DUPLEX)
902 reconfig = 1;
903 break;
904 }
905
906 /* link result is our setting */
907 if (!reconfig) {
908 if (adapter->link_speed != speed
909 || adapter->link_duplex != duplex) {
910 adapter->link_speed = speed;
911 adapter->link_duplex = duplex;
912 atl1_setup_mac_ctrl(adapter);
1e006364
JC		 913 dev_info(&adapter->pdev->dev,
914 "%s link is up %d Mbps %s\n",
915 netdev->name, adapter->link_speed,
916 adapter->link_duplex == FULL_DUPLEX ?
917 "full duplex" : "half duplex");
f3cc28c7
JC		 918 }
919 if (!netif_carrier_ok(netdev)) { /* Link down -> Up */
920 netif_carrier_on(netdev);
921 netif_wake_queue(netdev);
922 }
923 return ATL1_SUCCESS;
924 }
925
926 /* change orignal link status */
927 if (netif_carrier_ok(netdev)) {
928 adapter->link_speed = SPEED_0;
929 netif_carrier_off(netdev);
930 netif_stop_queue(netdev);
931 }
932
933 if (hw->media_type != MEDIA_TYPE_AUTO_SENSOR &&
934 hw->media_type != MEDIA_TYPE_1000M_FULL) {
935 switch (hw->media_type) {
936 case MEDIA_TYPE_100M_FULL:
937 phy_data = MII_CR_FULL_DUPLEX | MII_CR_SPEED_100 |
938 MII_CR_RESET;
939 break;
940 case MEDIA_TYPE_100M_HALF:
941 phy_data = MII_CR_SPEED_100 | MII_CR_RESET;
942 break;
943 case MEDIA_TYPE_10M_FULL:
944 phy_data =
945 MII_CR_FULL_DUPLEX | MII_CR_SPEED_10 | MII_CR_RESET;
946 break;
947 default: /* MEDIA_TYPE_10M_HALF: */
948 phy_data = MII_CR_SPEED_10 | MII_CR_RESET;
949 break;
950 }
951 atl1_write_phy_reg(hw, MII_BMCR, phy_data);
952 return ATL1_SUCCESS;
953 }
954
955 /* auto-neg, insert timer to re-config phy */
956 if (!adapter->phy_timer_pending) {
957 adapter->phy_timer_pending = true;
958 mod_timer(&adapter->phy_config_timer, jiffies + 3 * HZ);
959 }
960
961 return ATL1_SUCCESS;
962}
963
964static void set_flow_ctrl_old(struct atl1_adapter *adapter)
965{
966 u32 hi, lo, value;
967
968 /* RFD Flow Control */
969 value = adapter->rfd_ring.count;
970 hi = value / 16;
971 if (hi < 2)
972 hi = 2;
973 lo = value * 7 / 8;
974
975 value = ((hi & RXQ_RXF_PAUSE_TH_HI_MASK) << RXQ_RXF_PAUSE_TH_HI_SHIFT) |
976 ((lo & RXQ_RXF_PAUSE_TH_LO_MASK) << RXQ_RXF_PAUSE_TH_LO_SHIFT);
977 iowrite32(value, adapter->hw.hw_addr + REG_RXQ_RXF_PAUSE_THRESH);
978
979 /* RRD Flow Control */
980 value = adapter->rrd_ring.count;
981 lo = value / 16;
982 hi = value * 7 / 8;
983 if (lo < 2)
984 lo = 2;
985 value = ((hi & RXQ_RRD_PAUSE_TH_HI_MASK) << RXQ_RRD_PAUSE_TH_HI_SHIFT) |
986 ((lo & RXQ_RRD_PAUSE_TH_LO_MASK) << RXQ_RRD_PAUSE_TH_LO_SHIFT);
987 iowrite32(value, adapter->hw.hw_addr + REG_RXQ_RRD_PAUSE_THRESH);
988}
989
990static void set_flow_ctrl_new(struct atl1_hw *hw)
991{
992 u32 hi, lo, value;
993
994 /* RXF Flow Control */
995 value = ioread32(hw->hw_addr + REG_SRAM_RXF_LEN);
996 lo = value / 16;
997 if (lo < 192)
998 lo = 192;
999 hi = value * 7 / 8;
1000 if (hi < lo)
1001 hi = lo + 16;
1002 value = ((hi & RXQ_RXF_PAUSE_TH_HI_MASK) << RXQ_RXF_PAUSE_TH_HI_SHIFT) |
1003 ((lo & RXQ_RXF_PAUSE_TH_LO_MASK) << RXQ_RXF_PAUSE_TH_LO_SHIFT);
1004 iowrite32(value, hw->hw_addr + REG_RXQ_RXF_PAUSE_THRESH);
1005
1006 /* RRD Flow Control */
1007 value = ioread32(hw->hw_addr + REG_SRAM_RRD_LEN);
1008 lo = value / 8;
1009 hi = value * 7 / 8;
1010 if (lo < 2)
1011 lo = 2;
1012 if (hi < lo)
1013 hi = lo + 3;
1014 value = ((hi & RXQ_RRD_PAUSE_TH_HI_MASK) << RXQ_RRD_PAUSE_TH_HI_SHIFT) |
1015 ((lo & RXQ_RRD_PAUSE_TH_LO_MASK) << RXQ_RRD_PAUSE_TH_LO_SHIFT);
1016 iowrite32(value, hw->hw_addr + REG_RXQ_RRD_PAUSE_THRESH);
1017}
1018
1019/*
1020 * atl1_configure - Configure Transmit&Receive Unit after Reset
1021 * @adapter: board private structure
1022 *
1023 * Configure the Tx /Rx unit of the MAC after a reset.
1024 */
1025static u32 atl1_configure(struct atl1_adapter *adapter)
1026{
1027 struct atl1_hw *hw = &adapter->hw;
1028 u32 value;
1029
1030 /* clear interrupt status */
1031 iowrite32(0xffffffff, adapter->hw.hw_addr + REG_ISR);
1032
1033 /* set MAC Address */
1034 value = (((u32) hw->mac_addr[2]) << 24) |
1035 (((u32) hw->mac_addr[3]) << 16) |
1036 (((u32) hw->mac_addr[4]) << 8) |
1037 (((u32) hw->mac_addr[5]));
1038 iowrite32(value, hw->hw_addr + REG_MAC_STA_ADDR);
1039 value = (((u32) hw->mac_addr[0]) << 8) | (((u32) hw->mac_addr[1]));
1040 iowrite32(value, hw->hw_addr + (REG_MAC_STA_ADDR + 4));
1041
1042 /* tx / rx ring */
1043
1044 /* HI base address */
1045 iowrite32((u32) ((adapter->tpd_ring.dma & 0xffffffff00000000ULL) >> 32),
1046 hw->hw_addr + REG_DESC_BASE_ADDR_HI);
1047 /* LO base address */
1048 iowrite32((u32) (adapter->rfd_ring.dma & 0x00000000ffffffffULL),
1049 hw->hw_addr + REG_DESC_RFD_ADDR_LO);
1050 iowrite32((u32) (adapter->rrd_ring.dma & 0x00000000ffffffffULL),
1051 hw->hw_addr + REG_DESC_RRD_ADDR_LO);
1052 iowrite32((u32) (adapter->tpd_ring.dma & 0x00000000ffffffffULL),
1053 hw->hw_addr + REG_DESC_TPD_ADDR_LO);
1054 iowrite32((u32) (adapter->cmb.dma & 0x00000000ffffffffULL),
1055 hw->hw_addr + REG_DESC_CMB_ADDR_LO);
1056 iowrite32((u32) (adapter->smb.dma & 0x00000000ffffffffULL),
1057 hw->hw_addr + REG_DESC_SMB_ADDR_LO);
1058
1059 /* element count */
1060 value = adapter->rrd_ring.count;
1061 value <<= 16;
1062 value += adapter->rfd_ring.count;
1063 iowrite32(value, hw->hw_addr + REG_DESC_RFD_RRD_RING_SIZE);
1064 iowrite32(adapter->tpd_ring.count, hw->hw_addr + REG_DESC_TPD_RING_SIZE);
1065
1066 /* Load Ptr */
1067 iowrite32(1, hw->hw_addr + REG_LOAD_PTR);
1068
1069 /* config Mailbox */
1070 value = ((atomic_read(&adapter->tpd_ring.next_to_use)
1071 & MB_TPD_PROD_INDX_MASK) << MB_TPD_PROD_INDX_SHIFT) |
1072 ((atomic_read(&adapter->rrd_ring.next_to_clean)
1073 & MB_RRD_CONS_INDX_MASK) << MB_RRD_CONS_INDX_SHIFT) |
1074 ((atomic_read(&adapter->rfd_ring.next_to_use)
1075 & MB_RFD_PROD_INDX_MASK) << MB_RFD_PROD_INDX_SHIFT);
1076 iowrite32(value, hw->hw_addr + REG_MAILBOX);
1077
1078 /* config IPG/IFG */
1079 value = (((u32) hw->ipgt & MAC_IPG_IFG_IPGT_MASK)
1080 << MAC_IPG_IFG_IPGT_SHIFT) |
1081 (((u32) hw->min_ifg & MAC_IPG_IFG_MIFG_MASK)
1082 << MAC_IPG_IFG_MIFG_SHIFT) |
1083 (((u32) hw->ipgr1 & MAC_IPG_IFG_IPGR1_MASK)
1084 << MAC_IPG_IFG_IPGR1_SHIFT) |
1085 (((u32) hw->ipgr2 & MAC_IPG_IFG_IPGR2_MASK)
1086 << MAC_IPG_IFG_IPGR2_SHIFT);
1087 iowrite32(value, hw->hw_addr + REG_MAC_IPG_IFG);
1088
1089 /* config Half-Duplex Control */
1090 value = ((u32) hw->lcol & MAC_HALF_DUPLX_CTRL_LCOL_MASK) |
1091 (((u32) hw->max_retry & MAC_HALF_DUPLX_CTRL_RETRY_MASK)
1092 << MAC_HALF_DUPLX_CTRL_RETRY_SHIFT) |
1093 MAC_HALF_DUPLX_CTRL_EXC_DEF_EN |
1094 (0xa << MAC_HALF_DUPLX_CTRL_ABEBT_SHIFT) |
1095 (((u32) hw->jam_ipg & MAC_HALF_DUPLX_CTRL_JAMIPG_MASK)
1096 << MAC_HALF_DUPLX_CTRL_JAMIPG_SHIFT);
1097 iowrite32(value, hw->hw_addr + REG_MAC_HALF_DUPLX_CTRL);
1098
1099 /* set Interrupt Moderator Timer */
1100 iowrite16(adapter->imt, hw->hw_addr + REG_IRQ_MODU_TIMER_INIT);
1101 iowrite32(MASTER_CTRL_ITIMER_EN, hw->hw_addr + REG_MASTER_CTRL);
1102
1103 /* set Interrupt Clear Timer */
1104 iowrite16(adapter->ict, hw->hw_addr + REG_CMBDISDMA_TIMER);
1105
1106 /* set MTU, 4 : VLAN */
1107 iowrite32(hw->max_frame_size + 4, hw->hw_addr + REG_MTU);
1108
1109 /* jumbo size & rrd retirement timer */
1110 value = (((u32) hw->rx_jumbo_th & RXQ_JMBOSZ_TH_MASK)
1111 << RXQ_JMBOSZ_TH_SHIFT) |
1112 (((u32) hw->rx_jumbo_lkah & RXQ_JMBO_LKAH_MASK)
1113 << RXQ_JMBO_LKAH_SHIFT) |
1114 (((u32) hw->rrd_ret_timer & RXQ_RRD_TIMER_MASK)
1115 << RXQ_RRD_TIMER_SHIFT);
1116 iowrite32(value, hw->hw_addr + REG_RXQ_JMBOSZ_RRDTIM);
1117
1118 /* Flow Control */
1119 switch (hw->dev_rev) {
1120 case 0x8001:
1121 case 0x9001:
1122 case 0x9002:
1123 case 0x9003:
1124 set_flow_ctrl_old(adapter);
1125 break;
1126 default:
1127 set_flow_ctrl_new(hw);
1128 break;
1129 }
1130
1131 /* config TXQ */
1132 value = (((u32) hw->tpd_burst & TXQ_CTRL_TPD_BURST_NUM_MASK)
1133 << TXQ_CTRL_TPD_BURST_NUM_SHIFT) |
1134 (((u32) hw->txf_burst & TXQ_CTRL_TXF_BURST_NUM_MASK)
1135 << TXQ_CTRL_TXF_BURST_NUM_SHIFT) |
1136 (((u32) hw->tpd_fetch_th & TXQ_CTRL_TPD_FETCH_TH_MASK)
1137 << TXQ_CTRL_TPD_FETCH_TH_SHIFT) | TXQ_CTRL_ENH_MODE | TXQ_CTRL_EN;
1138 iowrite32(value, hw->hw_addr + REG_TXQ_CTRL);
1139
1140 /* min tpd fetch gap & tx jumbo packet size threshold for taskoffload */
1141 value = (((u32) hw->tx_jumbo_task_th & TX_JUMBO_TASK_TH_MASK)
1142 << TX_JUMBO_TASK_TH_SHIFT) |
1143 (((u32) hw->tpd_fetch_gap & TX_TPD_MIN_IPG_MASK)
1144 << TX_TPD_MIN_IPG_SHIFT);
1145 iowrite32(value, hw->hw_addr + REG_TX_JUMBO_TASK_TH_TPD_IPG);
1146
1147 /* config RXQ */
1148 value = (((u32) hw->rfd_burst & RXQ_CTRL_RFD_BURST_NUM_MASK)
1149 << RXQ_CTRL_RFD_BURST_NUM_SHIFT) |
1150 (((u32) hw->rrd_burst & RXQ_CTRL_RRD_BURST_THRESH_MASK)
1151 << RXQ_CTRL_RRD_BURST_THRESH_SHIFT) |
1152 (((u32) hw->rfd_fetch_gap & RXQ_CTRL_RFD_PREF_MIN_IPG_MASK)
1153 << RXQ_CTRL_RFD_PREF_MIN_IPG_SHIFT) |
1154 RXQ_CTRL_CUT_THRU_EN | RXQ_CTRL_EN;
1155 iowrite32(value, hw->hw_addr + REG_RXQ_CTRL);
1156
1157 /* config DMA Engine */
1158 value = ((((u32) hw->dmar_block) & DMA_CTRL_DMAR_BURST_LEN_MASK)
1159 << DMA_CTRL_DMAR_BURST_LEN_SHIFT) |
1160 ((((u32) hw->dmaw_block) & DMA_CTRL_DMAR_BURST_LEN_MASK)
1161 << DMA_CTRL_DMAR_BURST_LEN_SHIFT) |
1162 DMA_CTRL_DMAR_EN | DMA_CTRL_DMAW_EN;
1163 value |= (u32) hw->dma_ord;
1164 if (atl1_rcb_128 == hw->rcb_value)
1165 value |= DMA_CTRL_RCB_VALUE;
1166 iowrite32(value, hw->hw_addr + REG_DMA_CTRL);
1167
1168 /* config CMB / SMB */
1169 value = hw->cmb_rrd | ((u32) hw->cmb_tpd << 16);
1170 iowrite32(value, hw->hw_addr + REG_CMB_WRITE_TH);
1171 value = hw->cmb_rx_timer | ((u32) hw->cmb_tx_timer << 16);
1172 iowrite32(value, hw->hw_addr + REG_CMB_WRITE_TIMER);
1173 iowrite32(hw->smb_timer, hw->hw_addr + REG_SMB_TIMER);
1174
1175 /* --- enable CMB / SMB */
1176 value = CSMB_CTRL_CMB_EN | CSMB_CTRL_SMB_EN;
1177 iowrite32(value, hw->hw_addr + REG_CSMB_CTRL);
1178
1179 value = ioread32(adapter->hw.hw_addr + REG_ISR);
1180 if (unlikely((value & ISR_PHY_LINKDOWN) != 0))
1181 value = 1; /* config failed */
1182 else
1183 value = 0;
1184
1185 /* clear all interrupt status */
1186 iowrite32(0x3fffffff, adapter->hw.hw_addr + REG_ISR);
1187 iowrite32(0, adapter->hw.hw_addr + REG_ISR);
1188 return value;
1189}
1190
1191/*
1192 * atl1_irq_disable - Mask off interrupt generation on the NIC
1193 * @adapter: board private structure
1194 */
1195static void atl1_irq_disable(struct atl1_adapter *adapter)
1196{
f3cc28c7
JC		 1197 iowrite32(0, adapter->hw.hw_addr + REG_IMR);
1198 ioread32(adapter->hw.hw_addr + REG_IMR);
1199 synchronize_irq(adapter->pdev->irq);
1200}
1201
1202static void atl1_vlan_rx_register(struct net_device *netdev,
1203 struct vlan_group *grp)
1204{
1205 struct atl1_adapter *adapter = netdev_priv(netdev);
1206 unsigned long flags;
1207 u32 ctrl;
1208
1209 spin_lock_irqsave(&adapter->lock, flags);
1210 /* atl1_irq_disable(adapter); */
1211 adapter->vlgrp = grp;
1212
1213 if (grp) {
1214 /* enable VLAN tag insert/strip */
1215 ctrl = ioread32(adapter->hw.hw_addr + REG_MAC_CTRL);
1216 ctrl |= MAC_CTRL_RMV_VLAN;
1217 iowrite32(ctrl, adapter->hw.hw_addr + REG_MAC_CTRL);
1218 } else {
1219 /* disable VLAN tag insert/strip */
1220 ctrl = ioread32(adapter->hw.hw_addr + REG_MAC_CTRL);
1221 ctrl &= ~MAC_CTRL_RMV_VLAN;
1222 iowrite32(ctrl, adapter->hw.hw_addr + REG_MAC_CTRL);
1223 }
1224
1225 /* atl1_irq_enable(adapter); */
1226 spin_unlock_irqrestore(&adapter->lock, flags);
1227}
1228
f3cc28c7
JC		 1229static void atl1_restore_vlan(struct atl1_adapter *adapter)
1230{
1231 atl1_vlan_rx_register(adapter->netdev, adapter->vlgrp);
f3cc28c7
JC		 1232}
1233
1234static u16 tpd_avail(struct atl1_tpd_ring *tpd_ring)
1235{
1236 u16 next_to_clean = atomic_read(&tpd_ring->next_to_clean);
1237 u16 next_to_use = atomic_read(&tpd_ring->next_to_use);
1238 return ((next_to_clean >
1239 next_to_use) ? next_to_clean - next_to_use -
1240 1 : tpd_ring->count + next_to_clean - next_to_use - 1);
1241}
1242
1243static int atl1_tso(struct atl1_adapter *adapter, struct sk_buff *skb,
1244 struct tso_param *tso)
1245{
1246 /* We enter this function holding a spinlock. */
1247 u8 ipofst;
1248 int err;
1249
1250 if (skb_shinfo(skb)->gso_size) {
1251 if (skb_header_cloned(skb)) {
1252 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
1253 if (unlikely(err))
1254 return err;
1255 }
1256
1257 if (skb->protocol == ntohs(ETH_P_IP)) {
eddc9ec5
ACM		 1258 struct iphdr *iph = ip_hdr(skb);
1259
1260 iph->tot_len = 0;
1261 iph->check = 0;
aa8223c7
ACM		 1262 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
1263 iph->daddr, 0,
1264 IPPROTO_TCP,
1265 0);
bbe735e4 1266 ipofst = skb_network_offset(skb);
f3cc28c7
JC		 1267 if (ipofst != ENET_HEADER_SIZE) /* 802.3 frame */
1268 tso->tsopl |= 1 << TSO_PARAM_ETHTYPE_SHIFT;
1269
eddc9ec5 1270 tso->tsopl |= (iph->ihl &
f3cc28c7 1271 CSUM_PARAM_IPHL_MASK) << CSUM_PARAM_IPHL_SHIFT;
ab6a5bb6 1272 tso->tsopl |= (tcp_hdrlen(skb) &
f3cc28c7
JC		 1273 TSO_PARAM_TCPHDRLEN_MASK) << TSO_PARAM_TCPHDRLEN_SHIFT;
1274 tso->tsopl |= (skb_shinfo(skb)->gso_size &
1275 TSO_PARAM_MSS_MASK) << TSO_PARAM_MSS_SHIFT;
1276 tso->tsopl |= 1 << TSO_PARAM_IPCKSUM_SHIFT;
1277 tso->tsopl |= 1 << TSO_PARAM_TCPCKSUM_SHIFT;
1278 tso->tsopl |= 1 << TSO_PARAM_SEGMENT_SHIFT;
1279 return true;
1280 }
1281 }
1282 return false;
1283}
1284
1285static int atl1_tx_csum(struct atl1_adapter *adapter, struct sk_buff *skb,
1286 struct csum_param *csum)
1287{
1288 u8 css, cso;
1289
1290 if (likely(skb->ip_summed == CHECKSUM_PARTIAL)) {
ea2ae17d 1291 cso = skb_transport_offset(skb);
628592cc 1292 css = cso + skb->csum_offset;
f3cc28c7 1293 if (unlikely(cso & 0x1)) {
1e006364
JC		 1294 dev_dbg(&adapter->pdev->dev,
1295 "payload offset not an even number\n");
f3cc28c7
JC		 1296 return -1;
1297 }
1298 csum->csumpl |= (cso & CSUM_PARAM_PLOADOFFSET_MASK) <<
1299 CSUM_PARAM_PLOADOFFSET_SHIFT;
1300 csum->csumpl |= (css & CSUM_PARAM_XSUMOFFSET_MASK) <<
1301 CSUM_PARAM_XSUMOFFSET_SHIFT;
1302 csum->csumpl |= 1 << CSUM_PARAM_CUSTOMCKSUM_SHIFT;
1303 return true;
1304 }
1305
1306 return true;
1307}
1308
1309static void atl1_tx_map(struct atl1_adapter *adapter,
1310 struct sk_buff *skb, bool tcp_seg)
1311{
1312 /* We enter this function holding a spinlock. */
1313 struct atl1_tpd_ring *tpd_ring = &adapter->tpd_ring;
1314 struct atl1_buffer *buffer_info;
1315 struct page *page;
1316 int first_buf_len = skb->len;
1317 unsigned long offset;
1318 unsigned int nr_frags;
1319 unsigned int f;
1320 u16 tpd_next_to_use;
1321 u16 proto_hdr_len;
1322 u16 i, m, len12;
1323
1324 first_buf_len -= skb->data_len;
1325 nr_frags = skb_shinfo(skb)->nr_frags;
1326 tpd_next_to_use = atomic_read(&tpd_ring->next_to_use);
1327 buffer_info = &tpd_ring->buffer_info[tpd_next_to_use];
1328 if (unlikely(buffer_info->skb))
1329 BUG();
1330 buffer_info->skb = NULL; /* put skb in last TPD */
1331
1332 if (tcp_seg) {
1333 /* TSO/GSO */
ab6a5bb6 1334 proto_hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
f3cc28c7
JC		 1335 buffer_info->length = proto_hdr_len;
1336 page = virt_to_page(skb->data);
1337 offset = (unsigned long)skb->data & ~PAGE_MASK;
1338 buffer_info->dma = pci_map_page(adapter->pdev, page,
1339 offset, proto_hdr_len,
1340 PCI_DMA_TODEVICE);
1341
1342 if (++tpd_next_to_use == tpd_ring->count)
1343 tpd_next_to_use = 0;
1344
1345 if (first_buf_len > proto_hdr_len) {
1346 len12 = first_buf_len - proto_hdr_len;
2b116145 1347 m = (len12 + ATL1_MAX_TX_BUF_LEN - 1) / ATL1_MAX_TX_BUF_LEN;
f3cc28c7
JC		 1348 for (i = 0; i < m; i++) {
1349 buffer_info =
1350 &tpd_ring->buffer_info[tpd_next_to_use];
1351 buffer_info->skb = NULL;
1352 buffer_info->length =
2b116145
JC		 1353 (ATL1_MAX_TX_BUF_LEN >=
1354 len12) ? ATL1_MAX_TX_BUF_LEN : len12;
f3cc28c7
JC		 1355 len12 -= buffer_info->length;
1356 page = virt_to_page(skb->data +
1357 (proto_hdr_len +
2b116145 1358 i * ATL1_MAX_TX_BUF_LEN));
f3cc28c7
JC		 1359 offset = (unsigned long)(skb->data +
1360 (proto_hdr_len +
2b116145 1361 i * ATL1_MAX_TX_BUF_LEN)) &
f3cc28c7
JC		 1362 ~PAGE_MASK;
1363 buffer_info->dma =
1364 pci_map_page(adapter->pdev, page, offset,
1365 buffer_info->length,
1366 PCI_DMA_TODEVICE);
1367 if (++tpd_next_to_use == tpd_ring->count)
1368 tpd_next_to_use = 0;
1369 }
1370 }
1371 } else {
1372 /* not TSO/GSO */
1373 buffer_info->length = first_buf_len;
1374 page = virt_to_page(skb->data);
1375 offset = (unsigned long)skb->data & ~PAGE_MASK;
1376 buffer_info->dma = pci_map_page(adapter->pdev, page,
1377 offset, first_buf_len,
1378 PCI_DMA_TODEVICE);
1379 if (++tpd_next_to_use == tpd_ring->count)
1380 tpd_next_to_use = 0;
1381 }
1382
1383 for (f = 0; f < nr_frags; f++) {
1384 struct skb_frag_struct *frag;
1385 u16 lenf, i, m;
1386
1387 frag = &skb_shinfo(skb)->frags[f];
1388 lenf = frag->size;
1389
2b116145 1390 m = (lenf + ATL1_MAX_TX_BUF_LEN - 1) / ATL1_MAX_TX_BUF_LEN;
f3cc28c7
JC		 1391 for (i = 0; i < m; i++) {
1392 buffer_info = &tpd_ring->buffer_info[tpd_next_to_use];
1393 if (unlikely(buffer_info->skb))
1394 BUG();
1395 buffer_info->skb = NULL;
1396 buffer_info->length =
2b116145 1397 (lenf > ATL1_MAX_TX_BUF_LEN) ? ATL1_MAX_TX_BUF_LEN : lenf;
f3cc28c7
JC		 1398 lenf -= buffer_info->length;
1399 buffer_info->dma =
1400 pci_map_page(adapter->pdev, frag->page,
2b116145 1401 frag->page_offset + i * ATL1_MAX_TX_BUF_LEN,
f3cc28c7
JC		 1402 buffer_info->length, PCI_DMA_TODEVICE);
1403
1404 if (++tpd_next_to_use == tpd_ring->count)
1405 tpd_next_to_use = 0;
1406 }
1407 }
1408
1409 /* last tpd's buffer-info */
1410 buffer_info->skb = skb;
1411}
1412
1413static void atl1_tx_queue(struct atl1_adapter *adapter, int count,
1414 union tpd_descr *descr)
1415{
1416 /* We enter this function holding a spinlock. */
1417 struct atl1_tpd_ring *tpd_ring = &adapter->tpd_ring;
1418 int j;
1419 u32 val;
1420 struct atl1_buffer *buffer_info;
1421 struct tx_packet_desc *tpd;
1422 u16 tpd_next_to_use = atomic_read(&tpd_ring->next_to_use);
1423
1424 for (j = 0; j < count; j++) {
1425 buffer_info = &tpd_ring->buffer_info[tpd_next_to_use];
1426 tpd = ATL1_TPD_DESC(&adapter->tpd_ring, tpd_next_to_use);
1427 tpd->desc.csum.csumpu = descr->csum.csumpu;
1428 tpd->desc.csum.csumpl = descr->csum.csumpl;
1429 tpd->desc.tso.tsopu = descr->tso.tsopu;
1430 tpd->desc.tso.tsopl = descr->tso.tsopl;
1431 tpd->buffer_addr = cpu_to_le64(buffer_info->dma);
1432 tpd->desc.data = descr->data;
1433 tpd->desc.csum.csumpu |= (cpu_to_le16(buffer_info->length) &
1434 CSUM_PARAM_BUFLEN_MASK) << CSUM_PARAM_BUFLEN_SHIFT;
1435
1436 val = (descr->tso.tsopl >> TSO_PARAM_SEGMENT_SHIFT) &
1437 TSO_PARAM_SEGMENT_MASK;
1438 if (val && !j)
1439 tpd->desc.tso.tsopl |= 1 << TSO_PARAM_HDRFLAG_SHIFT;
1440
1441 if (j == (count - 1))
1442 tpd->desc.csum.csumpl |= 1 << CSUM_PARAM_EOP_SHIFT;
1443
1444 if (++tpd_next_to_use == tpd_ring->count)
1445 tpd_next_to_use = 0;
1446 }
1447 /*
1448 * Force memory writes to complete before letting h/w
1449 * know there are new descriptors to fetch. (Only
1450 * applicable for weak-ordered memory model archs,
1451 * such as IA-64).
1452 */
1453 wmb();
1454
1455 atomic_set(&tpd_ring->next_to_use, (int)tpd_next_to_use);
1456}
1457
1458static void atl1_update_mailbox(struct atl1_adapter *adapter)
1459{
1460 unsigned long flags;
1461 u32 tpd_next_to_use;
1462 u32 rfd_next_to_use;
1463 u32 rrd_next_to_clean;
1464 u32 value;
1465
1466 spin_lock_irqsave(&adapter->mb_lock, flags);
1467
1468 tpd_next_to_use = atomic_read(&adapter->tpd_ring.next_to_use);
1469 rfd_next_to_use = atomic_read(&adapter->rfd_ring.next_to_use);
1470 rrd_next_to_clean = atomic_read(&adapter->rrd_ring.next_to_clean);
1471
1472 value = ((rfd_next_to_use & MB_RFD_PROD_INDX_MASK) <<
1473 MB_RFD_PROD_INDX_SHIFT) |
1474 ((rrd_next_to_clean & MB_RRD_CONS_INDX_MASK) <<
1475 MB_RRD_CONS_INDX_SHIFT) |
1476 ((tpd_next_to_use & MB_TPD_PROD_INDX_MASK) <<
1477 MB_TPD_PROD_INDX_SHIFT);
1478 iowrite32(value, adapter->hw.hw_addr + REG_MAILBOX);
1479
1480 spin_unlock_irqrestore(&adapter->mb_lock, flags);
1481}
1482
1483static int atl1_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
1484{
1485 struct atl1_adapter *adapter = netdev_priv(netdev);
1486 int len = skb->len;
1487 int tso;
1488 int count = 1;
1489 int ret_val;
1490 u32 val;
1491 union tpd_descr param;
1492 u16 frag_size;
1493 u16 vlan_tag;
1494 unsigned long flags;
1495 unsigned int nr_frags = 0;
1496 unsigned int mss = 0;
1497 unsigned int f;
1498 unsigned int proto_hdr_len;
1499
1500 len -= skb->data_len;
1501
1502 if (unlikely(skb->len == 0)) {
1503 dev_kfree_skb_any(skb);
1504 return NETDEV_TX_OK;
1505 }
1506
1507 param.data = 0;
1508 param.tso.tsopu = 0;
1509 param.tso.tsopl = 0;
1510 param.csum.csumpu = 0;
1511 param.csum.csumpl = 0;
1512
1513 /* nr_frags will be nonzero if we're doing scatter/gather (SG) */
1514 nr_frags = skb_shinfo(skb)->nr_frags;
1515 for (f = 0; f < nr_frags; f++) {
1516 frag_size = skb_shinfo(skb)->frags[f].size;
1517 if (frag_size)
1518 count +=
2b116145 1519 (frag_size + ATL1_MAX_TX_BUF_LEN - 1) / ATL1_MAX_TX_BUF_LEN;
f3cc28c7
JC		 1520 }
1521
1522 /* mss will be nonzero if we're doing segment offload (TSO/GSO) */
1523 mss = skb_shinfo(skb)->gso_size;
1524 if (mss) {
7ccec1b9 1525 if (skb->protocol == htons(ETH_P_IP)) {
ea2ae17d 1526 proto_hdr_len = (skb_transport_offset(skb) +
ab6a5bb6 1527 tcp_hdrlen(skb));
f3cc28c7
JC		 1528 if (unlikely(proto_hdr_len > len)) {
1529 dev_kfree_skb_any(skb);
1530 return NETDEV_TX_OK;
1531 }
1532 /* need additional TPD ? */
1533 if (proto_hdr_len != len)
1534 count += (len - proto_hdr_len +
2b116145 1535 ATL1_MAX_TX_BUF_LEN - 1) / ATL1_MAX_TX_BUF_LEN;
f3cc28c7
JC		 1536 }
1537 }
1538
1539 local_irq_save(flags);
1540 if (!spin_trylock(&adapter->lock)) {
1541 /* Can't get lock - tell upper layer to requeue */
1542 local_irq_restore(flags);
1e006364 1543 dev_dbg(&adapter->pdev->dev, "tx locked\n");
f3cc28c7
JC		 1544 return NETDEV_TX_LOCKED;
1545 }
1546
1547 if (tpd_avail(&adapter->tpd_ring) < count) {
1548 /* not enough descriptors */
1549 netif_stop_queue(netdev);
1550 spin_unlock_irqrestore(&adapter->lock, flags);
1e006364 1551 dev_dbg(&adapter->pdev->dev, "tx busy\n");
f3cc28c7
JC		 1552 return NETDEV_TX_BUSY;
1553 }
1554
1555 param.data = 0;
1556
1557 if (adapter->vlgrp && vlan_tx_tag_present(skb)) {
1558 vlan_tag = vlan_tx_tag_get(skb);
1559 vlan_tag = (vlan_tag << 4) | (vlan_tag >> 13) |
1560 ((vlan_tag >> 9) & 0x8);
1561 param.csum.csumpl |= 1 << CSUM_PARAM_INSVLAG_SHIFT;
1562 param.csum.csumpu |= (vlan_tag & CSUM_PARAM_VALANTAG_MASK) <<
1563 CSUM_PARAM_VALAN_SHIFT;
1564 }
1565
1566 tso = atl1_tso(adapter, skb, &param.tso);
1567 if (tso < 0) {
1568 spin_unlock_irqrestore(&adapter->lock, flags);
1569 dev_kfree_skb_any(skb);
1570 return NETDEV_TX_OK;
1571 }
1572
1573 if (!tso) {
1574 ret_val = atl1_tx_csum(adapter, skb, &param.csum);
1575 if (ret_val < 0) {
1576 spin_unlock_irqrestore(&adapter->lock, flags);
1577 dev_kfree_skb_any(skb);
1578 return NETDEV_TX_OK;
1579 }
1580 }
1581
1582 val = (param.csum.csumpl >> CSUM_PARAM_SEGMENT_SHIFT) &
1583 CSUM_PARAM_SEGMENT_MASK;
1584 atl1_tx_map(adapter, skb, 1 == val);
1585 atl1_tx_queue(adapter, count, &param);
1586 netdev->trans_start = jiffies;
1587 spin_unlock_irqrestore(&adapter->lock, flags);
1588 atl1_update_mailbox(adapter);
1589 return NETDEV_TX_OK;
1590}
1591
1592/*
1593 * atl1_get_stats - Get System Network Statistics
1594 * @netdev: network interface device structure
1595 *
1596 * Returns the address of the device statistics structure.
1597 * The statistics are actually updated from the timer callback.
1598 */
1599static struct net_device_stats *atl1_get_stats(struct net_device *netdev)
1600{
1601 struct atl1_adapter *adapter = netdev_priv(netdev);
1602 return &adapter->net_stats;
1603}
1604
1605/*
1606 * atl1_clean_rx_ring - Free RFD Buffers
1607 * @adapter: board private structure
1608 */
1609static void atl1_clean_rx_ring(struct atl1_adapter *adapter)
1610{
1611 struct atl1_rfd_ring *rfd_ring = &adapter->rfd_ring;
1612 struct atl1_rrd_ring *rrd_ring = &adapter->rrd_ring;
1613 struct atl1_buffer *buffer_info;
1614 struct pci_dev *pdev = adapter->pdev;
1615 unsigned long size;
1616 unsigned int i;
1617
1618 /* Free all the Rx ring sk_buffs */
1619 for (i = 0; i < rfd_ring->count; i++) {
1620 buffer_info = &rfd_ring->buffer_info[i];
1621 if (buffer_info->dma) {
1622 pci_unmap_page(pdev,
1623 buffer_info->dma,
1624 buffer_info->length,
1625 PCI_DMA_FROMDEVICE);
1626 buffer_info->dma = 0;
1627 }
1628 if (buffer_info->skb) {
1629 dev_kfree_skb(buffer_info->skb);
1630 buffer_info->skb = NULL;
1631 }
1632 }
1633
1634 size = sizeof(struct atl1_buffer) * rfd_ring->count;
1635 memset(rfd_ring->buffer_info, 0, size);
1636
1637 /* Zero out the descriptor ring */
1638 memset(rfd_ring->desc, 0, rfd_ring->size);
1639
1640 rfd_ring->next_to_clean = 0;
1641 atomic_set(&rfd_ring->next_to_use, 0);
1642
1643 rrd_ring->next_to_use = 0;
1644 atomic_set(&rrd_ring->next_to_clean, 0);
1645}
1646
1647/*
1648 * atl1_clean_tx_ring - Free Tx Buffers
1649 * @adapter: board private structure
1650 */
1651static void atl1_clean_tx_ring(struct atl1_adapter *adapter)
1652{
1653 struct atl1_tpd_ring *tpd_ring = &adapter->tpd_ring;
1654 struct atl1_buffer *buffer_info;
1655 struct pci_dev *pdev = adapter->pdev;
1656 unsigned long size;
1657 unsigned int i;
1658
1659 /* Free all the Tx ring sk_buffs */
1660 for (i = 0; i < tpd_ring->count; i++) {
1661 buffer_info = &tpd_ring->buffer_info[i];
1662 if (buffer_info->dma) {
1663 pci_unmap_page(pdev, buffer_info->dma,
1664 buffer_info->length, PCI_DMA_TODEVICE);
1665 buffer_info->dma = 0;
1666 }
1667 }
1668
1669 for (i = 0; i < tpd_ring->count; i++) {
1670 buffer_info = &tpd_ring->buffer_info[i];
1671 if (buffer_info->skb) {
1672 dev_kfree_skb_any(buffer_info->skb);
1673 buffer_info->skb = NULL;
1674 }
1675 }
1676
1677 size = sizeof(struct atl1_buffer) * tpd_ring->count;
1678 memset(tpd_ring->buffer_info, 0, size);
1679
1680 /* Zero out the descriptor ring */
1681 memset(tpd_ring->desc, 0, tpd_ring->size);
1682
1683 atomic_set(&tpd_ring->next_to_use, 0);
1684 atomic_set(&tpd_ring->next_to_clean, 0);
1685}
1686
1687/*
1688 * atl1_free_ring_resources - Free Tx / RX descriptor Resources
1689 * @adapter: board private structure
1690 *
1691 * Free all transmit software resources
1692 */
1693void atl1_free_ring_resources(struct atl1_adapter *adapter)
1694{
1695 struct pci_dev *pdev = adapter->pdev;
1696 struct atl1_tpd_ring *tpd_ring = &adapter->tpd_ring;
1697 struct atl1_rfd_ring *rfd_ring = &adapter->rfd_ring;
1698 struct atl1_rrd_ring *rrd_ring = &adapter->rrd_ring;
1699 struct atl1_ring_header *ring_header = &adapter->ring_header;
1700
1701 atl1_clean_tx_ring(adapter);
1702 atl1_clean_rx_ring(adapter);
1703
1704 kfree(tpd_ring->buffer_info);
1705 pci_free_consistent(pdev, ring_header->size, ring_header->desc,
1706 ring_header->dma);
1707
1708 tpd_ring->buffer_info = NULL;
1709 tpd_ring->desc = NULL;
1710 tpd_ring->dma = 0;
1711
1712 rfd_ring->buffer_info = NULL;
1713 rfd_ring->desc = NULL;
1714 rfd_ring->dma = 0;
1715
1716 rrd_ring->desc = NULL;
1717 rrd_ring->dma = 0;
1718}
1719
1720s32 atl1_up(struct atl1_adapter *adapter)
1721{
1722 struct net_device *netdev = adapter->netdev;
1723 int err;
1724 int irq_flags = IRQF_SAMPLE_RANDOM;
1725
1726 /* hardware has been reset, we need to reload some things */
1727 atl1_set_multi(netdev);
1728 atl1_restore_vlan(adapter);
1729 err = atl1_alloc_rx_buffers(adapter);
1730 if (unlikely(!err)) /* no RX BUFFER allocated */
1731 return -ENOMEM;
1732
1733 if (unlikely(atl1_configure(adapter))) {
1734 err = -EIO;
1735 goto err_up;
1736 }
1737
1738 err = pci_enable_msi(adapter->pdev);
1739 if (err) {
1740 dev_info(&adapter->pdev->dev,
1741 "Unable to enable MSI: %d\n", err);
1742 irq_flags |= IRQF_SHARED;
1743 }
1744
1745 err = request_irq(adapter->pdev->irq, &atl1_intr, irq_flags,
1746 netdev->name, netdev);
1747 if (unlikely(err))
1748 goto err_up;
1749
1750 mod_timer(&adapter->watchdog_timer, jiffies);
1751 atl1_irq_enable(adapter);
1752 atl1_check_link(adapter);
1753 return 0;
1754
1755 /* FIXME: unreachable code! -- CHS */
1756 /* free irq disable any interrupt */
1757 iowrite32(0, adapter->hw.hw_addr + REG_IMR);
1758 free_irq(adapter->pdev->irq, netdev);
1759
1760err_up:
1761 pci_disable_msi(adapter->pdev);
1762 /* free rx_buffers */
1763 atl1_clean_rx_ring(adapter);
1764 return err;
1765}
1766
1767void atl1_down(struct atl1_adapter *adapter)
1768{
1769 struct net_device *netdev = adapter->netdev;
1770
1771 del_timer_sync(&adapter->watchdog_timer);
1772 del_timer_sync(&adapter->phy_config_timer);
1773 adapter->phy_timer_pending = false;
1774
1775 atl1_irq_disable(adapter);
1776 free_irq(adapter->pdev->irq, netdev);
1777 pci_disable_msi(adapter->pdev);
1778 atl1_reset_hw(&adapter->hw);
1779 adapter->cmb.cmb->int_stats = 0;
1780
1781 adapter->link_speed = SPEED_0;
1782 adapter->link_duplex = -1;
1783 netif_carrier_off(netdev);
1784 netif_stop_queue(netdev);
1785
1786 atl1_clean_tx_ring(adapter);
1787 atl1_clean_rx_ring(adapter);
1788}
1789
1790/*
1791 * atl1_change_mtu - Change the Maximum Transfer Unit
1792 * @netdev: network interface device structure
1793 * @new_mtu: new value for maximum frame size
1794 *
1795 * Returns 0 on success, negative on failure
1796 */
1797static int atl1_change_mtu(struct net_device *netdev, int new_mtu)
1798{
1799 struct atl1_adapter *adapter = netdev_priv(netdev);
1800 int old_mtu = netdev->mtu;
1801 int max_frame = new_mtu + ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
1802
1803 if ((max_frame < MINIMUM_ETHERNET_FRAME_SIZE) ||
1804 (max_frame > MAX_JUMBO_FRAME_SIZE)) {
1e006364 1805 dev_warn(&adapter->pdev->dev, "invalid MTU setting\n");
f3cc28c7
JC		 1806 return -EINVAL;
1807 }
1808
1809 adapter->hw.max_frame_size = max_frame;
1810 adapter->hw.tx_jumbo_task_th = (max_frame + 7) >> 3;
1811 adapter->rx_buffer_len = (max_frame + 7) & ~7;
1812 adapter->hw.rx_jumbo_th = adapter->rx_buffer_len / 8;
1813
1814 netdev->mtu = new_mtu;
1815 if ((old_mtu != new_mtu) && netif_running(netdev)) {
1816 atl1_down(adapter);
1817 atl1_up(adapter);
1818 }
1819
1820 return 0;
1821}
1822
1823/*
1824 * atl1_set_mac - Change the Ethernet Address of the NIC
1825 * @netdev: network interface device structure
1826 * @p: pointer to an address structure
1827 *
1828 * Returns 0 on success, negative on failure
1829 */
1830static int atl1_set_mac(struct net_device *netdev, void *p)
1831{
1832 struct atl1_adapter *adapter = netdev_priv(netdev);
1833 struct sockaddr *addr = p;
1834
1835 if (netif_running(netdev))
1836 return -EBUSY;
1837
1838 if (!is_valid_ether_addr(addr->sa_data))
1839 return -EADDRNOTAVAIL;
1840
1841 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
1842 memcpy(adapter->hw.mac_addr, addr->sa_data, netdev->addr_len);
1843
1844 atl1_set_mac_addr(&adapter->hw);
1845 return 0;
1846}
1847
1848/*
1849 * atl1_watchdog - Timer Call-back
1850 * @data: pointer to netdev cast into an unsigned long
1851 */
1852static void atl1_watchdog(unsigned long data)
1853{
1854 struct atl1_adapter *adapter = (struct atl1_adapter *)data;
1855
1856 /* Reset the timer */
1857 mod_timer(&adapter->watchdog_timer, jiffies + 2 * HZ);
1858}
1859
1860static int mdio_read(struct net_device *netdev, int phy_id, int reg_num)
1861{
1862 struct atl1_adapter *adapter = netdev_priv(netdev);
1863 u16 result;
1864
1865 atl1_read_phy_reg(&adapter->hw, reg_num & 0x1f, &result);
1866
1867 return result;
1868}
1869
1870static void mdio_write(struct net_device *netdev, int phy_id, int reg_num, int val)
1871{
1872 struct atl1_adapter *adapter = netdev_priv(netdev);
1873
1874 atl1_write_phy_reg(&adapter->hw, reg_num, val);
1875}
1876
1877/*
1878 * atl1_mii_ioctl -
1879 * @netdev:
1880 * @ifreq:
1881 * @cmd:
1882 */
1883static int atl1_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
1884{
1885 struct atl1_adapter *adapter = netdev_priv(netdev);
1886 unsigned long flags;
1887 int retval;
1888
1889 if (!netif_running(netdev))
1890 return -EINVAL;
1891
1892 spin_lock_irqsave(&adapter->lock, flags);
1893 retval = generic_mii_ioctl(&adapter->mii, if_mii(ifr), cmd, NULL);
1894 spin_unlock_irqrestore(&adapter->lock, flags);
1895
1896 return retval;
1897}
1898
1899/*
1900 * atl1_ioctl -
1901 * @netdev:
1902 * @ifreq:
1903 * @cmd:
1904 */
1905static int atl1_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
1906{
1907 switch (cmd) {
1908 case SIOCGMIIPHY:
1909 case SIOCGMIIREG:
1910 case SIOCSMIIREG:
1911 return atl1_mii_ioctl(netdev, ifr, cmd);
1912 default:
1913 return -EOPNOTSUPP;
1914 }
1915}
1916
1917/*
1918 * atl1_tx_timeout - Respond to a Tx Hang
1919 * @netdev: network interface device structure
1920 */
1921static void atl1_tx_timeout(struct net_device *netdev)
1922{
1923 struct atl1_adapter *adapter = netdev_priv(netdev);
1924 /* Do the reset outside of interrupt context */
1925 schedule_work(&adapter->tx_timeout_task);
1926}
1927
1928/*
1929 * atl1_phy_config - Timer Call-back
1930 * @data: pointer to netdev cast into an unsigned long
1931 */
1932static void atl1_phy_config(unsigned long data)
1933{
1934 struct atl1_adapter *adapter = (struct atl1_adapter *)data;
1935 struct atl1_hw *hw = &adapter->hw;
1936 unsigned long flags;
1937
1938 spin_lock_irqsave(&adapter->lock, flags);
1939 adapter->phy_timer_pending = false;
1940 atl1_write_phy_reg(hw, MII_ADVERTISE, hw->mii_autoneg_adv_reg);
1941 atl1_write_phy_reg(hw, MII_AT001_CR, hw->mii_1000t_ctrl_reg);
1942 atl1_write_phy_reg(hw, MII_BMCR, MII_CR_RESET | MII_CR_AUTO_NEG_EN);
1943 spin_unlock_irqrestore(&adapter->lock, flags);
1944}
1945
1946int atl1_reset(struct atl1_adapter *adapter)
1947{
1948 int ret;
1949
1950 ret = atl1_reset_hw(&adapter->hw);
1951 if (ret != ATL1_SUCCESS)
1952 return ret;
1953 return atl1_init_hw(&adapter->hw);
1954}
1955
1956/*
1957 * atl1_open - Called when a network interface is made active
1958 * @netdev: network interface device structure
1959 *
1960 * Returns 0 on success, negative value on failure
1961 *
1962 * The open entry point is called when a network interface is made
1963 * active by the system (IFF_UP). At this point all resources needed
1964 * for transmit and receive operations are allocated, the interrupt
1965 * handler is registered with the OS, the watchdog timer is started,
1966 * and the stack is notified that the interface is ready.
1967 */
1968static int atl1_open(struct net_device *netdev)
1969{
1970 struct atl1_adapter *adapter = netdev_priv(netdev);
1971 int err;
1972
1973 /* allocate transmit descriptors */
1974 err = atl1_setup_ring_resources(adapter);
1975 if (err)
1976 return err;
1977
1978 err = atl1_up(adapter);
1979 if (err)
1980 goto err_up;
1981
1982 return 0;
1983
1984err_up:
1985 atl1_reset(adapter);
1986 return err;
1987}
1988
1989/*
1990 * atl1_close - Disables a network interface
1991 * @netdev: network interface device structure
1992 *
1993 * Returns 0, this is not allowed to fail
1994 *
1995 * The close entry point is called when an interface is de-activated
1996 * by the OS. The hardware is still under the drivers control, but
1997 * needs to be disabled. A global MAC reset is issued to stop the
1998 * hardware, and all transmit and receive resources are freed.
1999 */
2000static int atl1_close(struct net_device *netdev)
2001{
2002 struct atl1_adapter *adapter = netdev_priv(netdev);
2003 atl1_down(adapter);
2004 atl1_free_ring_resources(adapter);
2005 return 0;
2006}
2007
497f050c
AD		 2008#ifdef CONFIG_NET_POLL_CONTROLLER
2009static void atl1_poll_controller(struct net_device *netdev)
2010{
2011 disable_irq(netdev->irq);
2012 atl1_intr(netdev->irq, netdev);
2013 enable_irq(netdev->irq);
2014}
2015#endif
2016
f3cc28c7
JC		 2017/*
2018 * If TPD Buffer size equal to 0, PCIE DMAR_TO_INT
2019 * will assert. We do soft reset <0x1400=1> according
2020 * with the SPEC. BUT, it seemes that PCIE or DMA
2021 * state-machine will not be reset. DMAR_TO_INT will
2022 * assert again and again.
2023 */
2024static void atl1_tx_timeout_task(struct work_struct *work)
2025{
2026 struct atl1_adapter *adapter =
2027 container_of(work, struct atl1_adapter, tx_timeout_task);
2028 struct net_device *netdev = adapter->netdev;
2029
2030 netif_device_detach(netdev);
2031 atl1_down(adapter);
2032 atl1_up(adapter);
2033 netif_device_attach(netdev);
2034}
2035
2036/*
2037 * atl1_link_chg_task - deal with link change event Out of interrupt context
2038 */
2039static void atl1_link_chg_task(struct work_struct *work)
2040{
2041 struct atl1_adapter *adapter =
2042 container_of(work, struct atl1_adapter, link_chg_task);
2043 unsigned long flags;
2044
2045 spin_lock_irqsave(&adapter->lock, flags);
2046 atl1_check_link(adapter);
2047 spin_unlock_irqrestore(&adapter->lock, flags);
2048}
2049
2050/*
2051 * atl1_pcie_patch - Patch for PCIE module
2052 */
2053static void atl1_pcie_patch(struct atl1_adapter *adapter)
2054{
2055 u32 value;
2056 value = 0x6500;
2057 iowrite32(value, adapter->hw.hw_addr + 0x12FC);
2058 /* pcie flow control mode change */
2059 value = ioread32(adapter->hw.hw_addr + 0x1008);
2060 value |= 0x8000;
2061 iowrite32(value, adapter->hw.hw_addr + 0x1008);
2062}
2063
2064/*
2065 * When ACPI resume on some VIA MotherBoard, the Interrupt Disable bit/0x400
2066 * on PCI Command register is disable.
2067 * The function enable this bit.
2068 * Brackett, 2006/03/15
2069 */
2070static void atl1_via_workaround(struct atl1_adapter *adapter)
2071{
2072 unsigned long value;
2073
2074 value = ioread16(adapter->hw.hw_addr + PCI_COMMAND);
2075 if (value & PCI_COMMAND_INTX_DISABLE)
2076 value &= ~PCI_COMMAND_INTX_DISABLE;
2077 iowrite32(value, adapter->hw.hw_addr + PCI_COMMAND);
2078}
2079
2080/*
2081 * atl1_probe - Device Initialization Routine
2082 * @pdev: PCI device information struct
2083 * @ent: entry in atl1_pci_tbl
2084 *
2085 * Returns 0 on success, negative on failure
2086 *
2087 * atl1_probe initializes an adapter identified by a pci_dev structure.
2088 * The OS initialization, configuring of the adapter private structure,
2089 * and a hardware reset occur.
2090 */
2091static int __devinit atl1_probe(struct pci_dev *pdev,
2092 const struct pci_device_id *ent)
2093{
2094 struct net_device *netdev;
2095 struct atl1_adapter *adapter;
2096 static int cards_found = 0;
2097 bool pci_using_64 = true;
2098 int err;
2099
2100 err = pci_enable_device(pdev);
2101 if (err)
2102 return err;
2103
2104 err = pci_set_dma_mask(pdev, DMA_64BIT_MASK);
2105 if (err) {
2106 err = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
2107 if (err) {
1e006364 2108 dev_err(&pdev->dev, "no usable DMA configuration\n");
f3cc28c7
JC		 2109 goto err_dma;
2110 }
2111 pci_using_64 = false;
2112 }
2113 /* Mark all PCI regions associated with PCI device
2114 * pdev as being reserved by owner atl1_driver_name
2115 */
2116 err = pci_request_regions(pdev, atl1_driver_name);
2117 if (err)
2118 goto err_request_regions;
2119
2120 /* Enables bus-mastering on the device and calls
2121 * pcibios_set_master to do the needed arch specific settings
2122 */
2123 pci_set_master(pdev);
2124
2125 netdev = alloc_etherdev(sizeof(struct atl1_adapter));
2126 if (!netdev) {
2127 err = -ENOMEM;
2128 goto err_alloc_etherdev;
2129 }
2130 SET_MODULE_OWNER(netdev);
2131 SET_NETDEV_DEV(netdev, &pdev->dev);
2132
2133 pci_set_drvdata(pdev, netdev);
2134 adapter = netdev_priv(netdev);
2135 adapter->netdev = netdev;
2136 adapter->pdev = pdev;
2137 adapter->hw.back = adapter;
2138
2139 adapter->hw.hw_addr = pci_iomap(pdev, 0, 0);
2140 if (!adapter->hw.hw_addr) {
2141 err = -EIO;
2142 goto err_pci_iomap;
2143 }
2144 /* get device revision number */
1e006364
JC		 2145 adapter->hw.dev_rev = ioread16(adapter->hw.hw_addr +
2146 (REG_MASTER_CTRL + 2));
2147 dev_info(&pdev->dev, "version %s\n", DRIVER_VERSION);
f3cc28c7
JC		 2148
2149 /* set default ring resource counts */
2150 adapter->rfd_ring.count = adapter->rrd_ring.count = ATL1_DEFAULT_RFD;
2151 adapter->tpd_ring.count = ATL1_DEFAULT_TPD;
2152
2153 adapter->mii.dev = netdev;
2154 adapter->mii.mdio_read = mdio_read;
2155 adapter->mii.mdio_write = mdio_write;
2156 adapter->mii.phy_id_mask = 0x1f;
2157 adapter->mii.reg_num_mask = 0x1f;
2158
2159 netdev->open = &atl1_open;
2160 netdev->stop = &atl1_close;
2161 netdev->hard_start_xmit = &atl1_xmit_frame;
2162 netdev->get_stats = &atl1_get_stats;
2163 netdev->set_multicast_list = &atl1_set_multi;
2164 netdev->set_mac_address = &atl1_set_mac;
2165 netdev->change_mtu = &atl1_change_mtu;
2166 netdev->do_ioctl = &atl1_ioctl;
2167 netdev->tx_timeout = &atl1_tx_timeout;
2168 netdev->watchdog_timeo = 5 * HZ;
497f050c
AD		 2169#ifdef CONFIG_NET_POLL_CONTROLLER
2170 netdev->poll_controller = atl1_poll_controller;
2171#endif
f3cc28c7 2172 netdev->vlan_rx_register = atl1_vlan_rx_register;
cb434e38 2173
f3cc28c7
JC		 2174 netdev->ethtool_ops = &atl1_ethtool_ops;
2175 adapter->bd_number = cards_found;
2176 adapter->pci_using_64 = pci_using_64;
2177
2178 /* setup the private structure */
2179 err = atl1_sw_init(adapter);
2180 if (err)
2181 goto err_common;
2182
2183 netdev->features = NETIF_F_HW_CSUM;
2184 netdev->features |= NETIF_F_SG;
2185 netdev->features |= (NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_RX);
2186
2187 /*
2188 * FIXME - Until tso performance gets fixed, disable the feature.
2189 * Enable it with ethtool -K if desired.
2190 */
2191 /* netdev->features |= NETIF_F_TSO; */
2192
2193 if (pci_using_64)
2194 netdev->features |= NETIF_F_HIGHDMA;
2195
2196 netdev->features |= NETIF_F_LLTX;
2197
2198 /*
2199 * patch for some L1 of old version,
2200 * the final version of L1 may not need these
2201 * patches
2202 */
2203 /* atl1_pcie_patch(adapter); */
2204
2205 /* really reset GPHY core */
2206 iowrite16(0, adapter->hw.hw_addr + REG_GPHY_ENABLE);
2207
2208 /*
2209 * reset the controller to
2210 * put the device in a known good starting state
2211 */
2212 if (atl1_reset_hw(&adapter->hw)) {
2213 err = -EIO;
2214 goto err_common;
2215 }
2216
2217 /* copy the MAC address out of the EEPROM */
2218 atl1_read_mac_addr(&adapter->hw);
2219 memcpy(netdev->dev_addr, adapter->hw.mac_addr, netdev->addr_len);
2220
2221 if (!is_valid_ether_addr(netdev->dev_addr)) {
2222 err = -EIO;
2223 goto err_common;
2224 }
2225
2226 atl1_check_options(adapter);
2227
2228 /* pre-init the MAC, and setup link */
2229 err = atl1_init_hw(&adapter->hw);
2230 if (err) {
2231 err = -EIO;
2232 goto err_common;
2233 }
2234
2235 atl1_pcie_patch(adapter);
2236 /* assume we have no link for now */
2237 netif_carrier_off(netdev);
2238 netif_stop_queue(netdev);
2239
2240 init_timer(&adapter->watchdog_timer);
2241 adapter->watchdog_timer.function = &atl1_watchdog;
2242 adapter->watchdog_timer.data = (unsigned long)adapter;
2243
2244 init_timer(&adapter->phy_config_timer);
2245 adapter->phy_config_timer.function = &atl1_phy_config;
2246 adapter->phy_config_timer.data = (unsigned long)adapter;
2247 adapter->phy_timer_pending = false;
2248
2249 INIT_WORK(&adapter->tx_timeout_task, atl1_tx_timeout_task);
2250
2251 INIT_WORK(&adapter->link_chg_task, atl1_link_chg_task);
2252
2253 INIT_WORK(&adapter->pcie_dma_to_rst_task, atl1_tx_timeout_task);
2254
2255 err = register_netdev(netdev);
2256 if (err)
2257 goto err_common;
2258
2259 cards_found++;
2260 atl1_via_workaround(adapter);
2261 return 0;
2262
2263err_common:
2264 pci_iounmap(pdev, adapter->hw.hw_addr);
2265err_pci_iomap:
2266 free_netdev(netdev);
2267err_alloc_etherdev:
2268 pci_release_regions(pdev);
2269err_dma:
2270err_request_regions:
2271 pci_disable_device(pdev);
2272 return err;
2273}
2274
2275/*
2276 * atl1_remove - Device Removal Routine
2277 * @pdev: PCI device information struct
2278 *
2279 * atl1_remove is called by the PCI subsystem to alert the driver
2280 * that it should release a PCI device. The could be caused by a
2281 * Hot-Plug event, or because the driver is going to be removed from
2282 * memory.
2283 */
2284static void __devexit atl1_remove(struct pci_dev *pdev)
2285{
2286 struct net_device *netdev = pci_get_drvdata(pdev);
2287 struct atl1_adapter *adapter;
2288 /* Device not available. Return. */
2289 if (!netdev)
2290 return;
2291
2292 adapter = netdev_priv(netdev);
8c754a04
CS		 2293
2294 /* Some atl1 boards lack persistent storage for their MAC, and get it
2295 * from the BIOS during POST. If we've been messing with the MAC
2296 * address, we need to save the permanent one.
2297 */
2298 if (memcmp(adapter->hw.mac_addr, adapter->hw.perm_mac_addr, ETH_ALEN)) {
2299 memcpy(adapter->hw.mac_addr, adapter->hw.perm_mac_addr, ETH_ALEN);
2300 atl1_set_mac_addr(&adapter->hw);
2301 }
2302
f3cc28c7
JC		 2303 iowrite16(0, adapter->hw.hw_addr + REG_GPHY_ENABLE);
2304 unregister_netdev(netdev);
2305 pci_iounmap(pdev, adapter->hw.hw_addr);
2306 pci_release_regions(pdev);
2307 free_netdev(netdev);
2308 pci_disable_device(pdev);
2309}
2310
2311#ifdef CONFIG_PM
2312static int atl1_suspend(struct pci_dev *pdev, pm_message_t state)
2313{
2314 struct net_device *netdev = pci_get_drvdata(pdev);
2315 struct atl1_adapter *adapter = netdev_priv(netdev);
2316 struct atl1_hw *hw = &adapter->hw;
2317 u32 ctrl = 0;
2318 u32 wufc = adapter->wol;
2319
2320 netif_device_detach(netdev);
2321 if (netif_running(netdev))
2322 atl1_down(adapter);
2323
2324 atl1_read_phy_reg(hw, MII_BMSR, (u16 *) & ctrl);
2325 atl1_read_phy_reg(hw, MII_BMSR, (u16 *) & ctrl);
2326 if (ctrl & BMSR_LSTATUS)
2327 wufc &= ~ATL1_WUFC_LNKC;
2328
2329 /* reduce speed to 10/100M */
2330 if (wufc) {
2331 atl1_phy_enter_power_saving(hw);
2332 /* if resume, let driver to re- setup link */
2333 hw->phy_configured = false;
2334 atl1_set_mac_addr(hw);
2335 atl1_set_multi(netdev);
2336
2337 ctrl = 0;
2338 /* turn on magic packet wol */
2339 if (wufc & ATL1_WUFC_MAG)
2340 ctrl = WOL_MAGIC_EN | WOL_MAGIC_PME_EN;
2341
2342 /* turn on Link change WOL */
2343 if (wufc & ATL1_WUFC_LNKC)
2344 ctrl |= (WOL_LINK_CHG_EN | WOL_LINK_CHG_PME_EN);
2345 iowrite32(ctrl, hw->hw_addr + REG_WOL_CTRL);
2346
2347 /* turn on all-multi mode if wake on multicast is enabled */
2348 ctrl = ioread32(hw->hw_addr + REG_MAC_CTRL);
2349 ctrl &= ~MAC_CTRL_DBG;
2350 ctrl &= ~MAC_CTRL_PROMIS_EN;
2351 if (wufc & ATL1_WUFC_MC)
2352 ctrl |= MAC_CTRL_MC_ALL_EN;
2353 else
2354 ctrl &= ~MAC_CTRL_MC_ALL_EN;
2355
2356 /* turn on broadcast mode if wake on-BC is enabled */
2357 if (wufc & ATL1_WUFC_BC)
2358 ctrl |= MAC_CTRL_BC_EN;
2359 else
2360 ctrl &= ~MAC_CTRL_BC_EN;
2361
2362 /* enable RX */
2363 ctrl |= MAC_CTRL_RX_EN;
2364 iowrite32(ctrl, hw->hw_addr + REG_MAC_CTRL);
2365 pci_enable_wake(pdev, PCI_D3hot, 1);
2366 pci_enable_wake(pdev, PCI_D3cold, 1); /* 4 == D3 cold */
2367 } else {
2368 iowrite32(0, hw->hw_addr + REG_WOL_CTRL);
2369 pci_enable_wake(pdev, PCI_D3hot, 0);
2370 pci_enable_wake(pdev, PCI_D3cold, 0); /* 4 == D3 cold */
2371 }
2372
2373 pci_save_state(pdev);
2374 pci_disable_device(pdev);
2375
2376 pci_set_power_state(pdev, PCI_D3hot);
2377
2378 return 0;
2379}
2380
2381static int atl1_resume(struct pci_dev *pdev)
2382{
2383 struct net_device *netdev = pci_get_drvdata(pdev);
2384 struct atl1_adapter *adapter = netdev_priv(netdev);
2385 u32 ret_val;
2386
2387 pci_set_power_state(pdev, 0);
2388 pci_restore_state(pdev);
2389
2390 ret_val = pci_enable_device(pdev);
2391 pci_enable_wake(pdev, PCI_D3hot, 0);
2392 pci_enable_wake(pdev, PCI_D3cold, 0);
2393
2394 iowrite32(0, adapter->hw.hw_addr + REG_WOL_CTRL);
2395 atl1_reset(adapter);
2396
2397 if (netif_running(netdev))
2398 atl1_up(adapter);
2399 netif_device_attach(netdev);
2400
2401 atl1_via_workaround(adapter);
2402
2403 return 0;
2404}
2405#else
2406#define atl1_suspend NULL
2407#define atl1_resume NULL
2408#endif
2409
2410static struct pci_driver atl1_driver = {
2411 .name = atl1_driver_name,
2412 .id_table = atl1_pci_tbl,
2413 .probe = atl1_probe,
2414 .remove = __devexit_p(atl1_remove),
2415 /* Power Managment Hooks */
2416 /* probably broken right now -- CHS */
2417 .suspend = atl1_suspend,
2418 .resume = atl1_resume
2419};
2420
2421/*
2422 * atl1_exit_module - Driver Exit Cleanup Routine
2423 *
2424 * atl1_exit_module is called just before the driver is removed
2425 * from memory.
2426 */
2427static void __exit atl1_exit_module(void)
2428{
2429 pci_unregister_driver(&atl1_driver);
2430}
2431
2432/*
2433 * atl1_init_module - Driver Registration Routine
2434 *
2435 * atl1_init_module is the first routine called when the driver is
2436 * loaded. All it does is register with the PCI subsystem.
2437 */
2438static int __init atl1_init_module(void)
2439{
f3cc28c7
JC		 2440 return pci_register_driver(&atl1_driver);
2441}
2442
2443module_init(atl1_init_module);
2444module_exit(atl1_exit_module);
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