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[PATCH] Add support for Marvell 88e1111S and 88e1145
[mirror_ubuntu-artful-kernel.git] / drivers / net / e1000 / e1000_main.c
CommitLineData
1da177e4
LT		 1/*******************************************************************************
2
0abb6eb1
AK		 3 Intel PRO/1000 Linux driver
4 Copyright(c) 1999 - 2006 Intel Corporation.
5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
9
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
1da177e4 13 more details.
0abb6eb1 14
1da177e4 15 You should have received a copy of the GNU General Public License along with
0abb6eb1
AK		 16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
21
1da177e4
LT		 22 Contact Information:
23 Linux NICS <linux.nics@intel.com>
3d41e30a 24 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
1da177e4
LT		 25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26
27*******************************************************************************/
28
29#include "e1000.h"
30
1da177e4 31char e1000_driver_name[] = "e1000";
3ad2cc67 32static char e1000_driver_string[] = "Intel(R) PRO/1000 Network Driver";
1da177e4
LT		 33#ifndef CONFIG_E1000_NAPI
34#define DRIVERNAPI
35#else
36#define DRIVERNAPI "-NAPI"
37#endif
25006ac6 38#define DRV_VERSION "7.3.15-k2"DRIVERNAPI
1da177e4 39char e1000_driver_version[] = DRV_VERSION;
3d41e30a 40static char e1000_copyright[] = "Copyright (c) 1999-2006 Intel Corporation.";
1da177e4
LT		 41
42/* e1000_pci_tbl - PCI Device ID Table
43 *
44 * Last entry must be all 0s
45 *
46 * Macro expands to...
47 * {PCI_DEVICE(PCI_VENDOR_ID_INTEL, device_id)}
48 */
49static struct pci_device_id e1000_pci_tbl[] = {
50 INTEL_E1000_ETHERNET_DEVICE(0x1000),
51 INTEL_E1000_ETHERNET_DEVICE(0x1001),
52 INTEL_E1000_ETHERNET_DEVICE(0x1004),
53 INTEL_E1000_ETHERNET_DEVICE(0x1008),
54 INTEL_E1000_ETHERNET_DEVICE(0x1009),
55 INTEL_E1000_ETHERNET_DEVICE(0x100C),
56 INTEL_E1000_ETHERNET_DEVICE(0x100D),
57 INTEL_E1000_ETHERNET_DEVICE(0x100E),
58 INTEL_E1000_ETHERNET_DEVICE(0x100F),
59 INTEL_E1000_ETHERNET_DEVICE(0x1010),
60 INTEL_E1000_ETHERNET_DEVICE(0x1011),
61 INTEL_E1000_ETHERNET_DEVICE(0x1012),
62 INTEL_E1000_ETHERNET_DEVICE(0x1013),
63 INTEL_E1000_ETHERNET_DEVICE(0x1014),
64 INTEL_E1000_ETHERNET_DEVICE(0x1015),
65 INTEL_E1000_ETHERNET_DEVICE(0x1016),
66 INTEL_E1000_ETHERNET_DEVICE(0x1017),
67 INTEL_E1000_ETHERNET_DEVICE(0x1018),
68 INTEL_E1000_ETHERNET_DEVICE(0x1019),
2648345f 69 INTEL_E1000_ETHERNET_DEVICE(0x101A),
1da177e4
LT		 70 INTEL_E1000_ETHERNET_DEVICE(0x101D),
71 INTEL_E1000_ETHERNET_DEVICE(0x101E),
72 INTEL_E1000_ETHERNET_DEVICE(0x1026),
73 INTEL_E1000_ETHERNET_DEVICE(0x1027),
74 INTEL_E1000_ETHERNET_DEVICE(0x1028),
ae2c3860
AK		 75 INTEL_E1000_ETHERNET_DEVICE(0x1049),
76 INTEL_E1000_ETHERNET_DEVICE(0x104A),
77 INTEL_E1000_ETHERNET_DEVICE(0x104B),
78 INTEL_E1000_ETHERNET_DEVICE(0x104C),
79 INTEL_E1000_ETHERNET_DEVICE(0x104D),
07b8fede
MC		 80 INTEL_E1000_ETHERNET_DEVICE(0x105E),
81 INTEL_E1000_ETHERNET_DEVICE(0x105F),
82 INTEL_E1000_ETHERNET_DEVICE(0x1060),
1da177e4
LT		 83 INTEL_E1000_ETHERNET_DEVICE(0x1075),
84 INTEL_E1000_ETHERNET_DEVICE(0x1076),
85 INTEL_E1000_ETHERNET_DEVICE(0x1077),
86 INTEL_E1000_ETHERNET_DEVICE(0x1078),
87 INTEL_E1000_ETHERNET_DEVICE(0x1079),
88 INTEL_E1000_ETHERNET_DEVICE(0x107A),
89 INTEL_E1000_ETHERNET_DEVICE(0x107B),
90 INTEL_E1000_ETHERNET_DEVICE(0x107C),
07b8fede
MC		 91 INTEL_E1000_ETHERNET_DEVICE(0x107D),
92 INTEL_E1000_ETHERNET_DEVICE(0x107E),
93 INTEL_E1000_ETHERNET_DEVICE(0x107F),
1da177e4 94 INTEL_E1000_ETHERNET_DEVICE(0x108A),
2648345f
MC		 95 INTEL_E1000_ETHERNET_DEVICE(0x108B),
96 INTEL_E1000_ETHERNET_DEVICE(0x108C),
6418ecc6
JK		 97 INTEL_E1000_ETHERNET_DEVICE(0x1096),
98 INTEL_E1000_ETHERNET_DEVICE(0x1098),
b7ee49db 99 INTEL_E1000_ETHERNET_DEVICE(0x1099),
07b8fede 100 INTEL_E1000_ETHERNET_DEVICE(0x109A),
5881cde8 101 INTEL_E1000_ETHERNET_DEVICE(0x10A4),
b7ee49db 102 INTEL_E1000_ETHERNET_DEVICE(0x10B5),
6418ecc6 103 INTEL_E1000_ETHERNET_DEVICE(0x10B9),
ae2c3860
AK		 104 INTEL_E1000_ETHERNET_DEVICE(0x10BA),
105 INTEL_E1000_ETHERNET_DEVICE(0x10BB),
fc2307d0
AK		 106 INTEL_E1000_ETHERNET_DEVICE(0x10BC),
107 INTEL_E1000_ETHERNET_DEVICE(0x10C4),
108 INTEL_E1000_ETHERNET_DEVICE(0x10C5),
1da177e4
LT		 109 /* required last entry */
110 {0,}
111};
112
113MODULE_DEVICE_TABLE(pci, e1000_pci_tbl);
114
35574764
NN		 115int e1000_up(struct e1000_adapter *adapter);
116void e1000_down(struct e1000_adapter *adapter);
117void e1000_reinit_locked(struct e1000_adapter *adapter);
118void e1000_reset(struct e1000_adapter *adapter);
119int e1000_set_spd_dplx(struct e1000_adapter *adapter, uint16_t spddplx);
120int e1000_setup_all_tx_resources(struct e1000_adapter *adapter);
121int e1000_setup_all_rx_resources(struct e1000_adapter *adapter);
122void e1000_free_all_tx_resources(struct e1000_adapter *adapter);
123void e1000_free_all_rx_resources(struct e1000_adapter *adapter);
3ad2cc67 124static int e1000_setup_tx_resources(struct e1000_adapter *adapter,
35574764 125 struct e1000_tx_ring *txdr);
3ad2cc67 126static int e1000_setup_rx_resources(struct e1000_adapter *adapter,
35574764 127 struct e1000_rx_ring *rxdr);
3ad2cc67 128static void e1000_free_tx_resources(struct e1000_adapter *adapter,
35574764 129 struct e1000_tx_ring *tx_ring);
3ad2cc67 130static void e1000_free_rx_resources(struct e1000_adapter *adapter,
35574764
NN		 131 struct e1000_rx_ring *rx_ring);
132void e1000_update_stats(struct e1000_adapter *adapter);
1da177e4
LT		 133
134static int e1000_init_module(void);
135static void e1000_exit_module(void);
136static int e1000_probe(struct pci_dev *pdev, const struct pci_device_id *ent);
137static void __devexit e1000_remove(struct pci_dev *pdev);
581d708e 138static int e1000_alloc_queues(struct e1000_adapter *adapter);
1da177e4
LT		 139static int e1000_sw_init(struct e1000_adapter *adapter);
140static int e1000_open(struct net_device *netdev);
141static int e1000_close(struct net_device *netdev);
142static void e1000_configure_tx(struct e1000_adapter *adapter);
143static void e1000_configure_rx(struct e1000_adapter *adapter);
144static void e1000_setup_rctl(struct e1000_adapter *adapter);
581d708e
MC		 145static void e1000_clean_all_tx_rings(struct e1000_adapter *adapter);
146static void e1000_clean_all_rx_rings(struct e1000_adapter *adapter);
147static void e1000_clean_tx_ring(struct e1000_adapter *adapter,
148 struct e1000_tx_ring *tx_ring);
149static void e1000_clean_rx_ring(struct e1000_adapter *adapter,
150 struct e1000_rx_ring *rx_ring);
1da177e4
LT		 151static void e1000_set_multi(struct net_device *netdev);
152static void e1000_update_phy_info(unsigned long data);
153static void e1000_watchdog(unsigned long data);
1da177e4
LT		 154static void e1000_82547_tx_fifo_stall(unsigned long data);
155static int e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev);
156static struct net_device_stats * e1000_get_stats(struct net_device *netdev);
157static int e1000_change_mtu(struct net_device *netdev, int new_mtu);
158static int e1000_set_mac(struct net_device *netdev, void *p);
7d12e780 159static irqreturn_t e1000_intr(int irq, void *data);
9ac98284
JB		 160#ifdef CONFIG_PCI_MSI
161static irqreturn_t e1000_intr_msi(int irq, void *data);
162#endif
581d708e
MC		 163static boolean_t e1000_clean_tx_irq(struct e1000_adapter *adapter,
164 struct e1000_tx_ring *tx_ring);
1da177e4 165#ifdef CONFIG_E1000_NAPI
581d708e 166static int e1000_clean(struct net_device *poll_dev, int *budget);
1da177e4 167static boolean_t e1000_clean_rx_irq(struct e1000_adapter *adapter,
581d708e 168 struct e1000_rx_ring *rx_ring,
1da177e4 169 int *work_done, int work_to_do);
2d7edb92 170static boolean_t e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
581d708e 171 struct e1000_rx_ring *rx_ring,
2d7edb92 172 int *work_done, int work_to_do);
1da177e4 173#else
581d708e
MC		 174static boolean_t e1000_clean_rx_irq(struct e1000_adapter *adapter,
175 struct e1000_rx_ring *rx_ring);
176static boolean_t e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
177 struct e1000_rx_ring *rx_ring);
1da177e4 178#endif
581d708e 179static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
72d64a43
JK		 180 struct e1000_rx_ring *rx_ring,
181 int cleaned_count);
581d708e 182static void e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
72d64a43
JK		 183 struct e1000_rx_ring *rx_ring,
184 int cleaned_count);
1da177e4
LT		 185static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd);
186static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
187 int cmd);
35574764 188void e1000_set_ethtool_ops(struct net_device *netdev);
1da177e4
LT		 189static void e1000_enter_82542_rst(struct e1000_adapter *adapter);
190static void e1000_leave_82542_rst(struct e1000_adapter *adapter);
191static void e1000_tx_timeout(struct net_device *dev);
87041639 192static void e1000_reset_task(struct net_device *dev);
1da177e4 193static void e1000_smartspeed(struct e1000_adapter *adapter);
e619d523
AK		 194static int e1000_82547_fifo_workaround(struct e1000_adapter *adapter,
195 struct sk_buff *skb);
1da177e4
LT		 196
197static void e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp);
198static void e1000_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid);
199static void e1000_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid);
200static void e1000_restore_vlan(struct e1000_adapter *adapter);
201
977e74b5 202static int e1000_suspend(struct pci_dev *pdev, pm_message_t state);
6fdfef16 203#ifdef CONFIG_PM
1da177e4
LT		 204static int e1000_resume(struct pci_dev *pdev);
205#endif
c653e635 206static void e1000_shutdown(struct pci_dev *pdev);
1da177e4
LT		 207
208#ifdef CONFIG_NET_POLL_CONTROLLER
209/* for netdump / net console */
210static void e1000_netpoll (struct net_device *netdev);
211#endif
212
35574764
NN		 213extern void e1000_check_options(struct e1000_adapter *adapter);
214
9026729b
AK		 215static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev,
216 pci_channel_state_t state);
217static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev);
218static void e1000_io_resume(struct pci_dev *pdev);
219
220static struct pci_error_handlers e1000_err_handler = {
221 .error_detected = e1000_io_error_detected,
222 .slot_reset = e1000_io_slot_reset,
223 .resume = e1000_io_resume,
224};
24025e4e 225
1da177e4
LT		 226static struct pci_driver e1000_driver = {
227 .name = e1000_driver_name,
228 .id_table = e1000_pci_tbl,
229 .probe = e1000_probe,
230 .remove = __devexit_p(e1000_remove),
c4e24f01 231#ifdef CONFIG_PM
1da177e4 232 /* Power Managment Hooks */
1da177e4 233 .suspend = e1000_suspend,
c653e635 234 .resume = e1000_resume,
1da177e4 235#endif
9026729b
AK		 236 .shutdown = e1000_shutdown,
237 .err_handler = &e1000_err_handler
1da177e4
LT		 238};
239
240MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
241MODULE_DESCRIPTION("Intel(R) PRO/1000 Network Driver");
242MODULE_LICENSE("GPL");
243MODULE_VERSION(DRV_VERSION);
244
245static int debug = NETIF_MSG_DRV | NETIF_MSG_PROBE;
246module_param(debug, int, 0);
247MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
248
249/**
250 * e1000_init_module - Driver Registration Routine
251 *
252 * e1000_init_module is the first routine called when the driver is
253 * loaded. All it does is register with the PCI subsystem.
254 **/
255
256static int __init
257e1000_init_module(void)
258{
259 int ret;
260 printk(KERN_INFO "%s - version %s\n",
261 e1000_driver_string, e1000_driver_version);
262
263 printk(KERN_INFO "%s\n", e1000_copyright);
264
29917620 265 ret = pci_register_driver(&e1000_driver);
8b378def 266
1da177e4
LT		 267 return ret;
268}
269
270module_init(e1000_init_module);
271
272/**
273 * e1000_exit_module - Driver Exit Cleanup Routine
274 *
275 * e1000_exit_module is called just before the driver is removed
276 * from memory.
277 **/
278
279static void __exit
280e1000_exit_module(void)
281{
1da177e4
LT		 282 pci_unregister_driver(&e1000_driver);
283}
284
285module_exit(e1000_exit_module);
286
2db10a08
AK		 287static int e1000_request_irq(struct e1000_adapter *adapter)
288{
289 struct net_device *netdev = adapter->netdev;
290 int flags, err = 0;
291
c0bc8721 292 flags = IRQF_SHARED;
2db10a08 293#ifdef CONFIG_PCI_MSI
9ac98284 294 if (adapter->hw.mac_type >= e1000_82571) {
2db10a08
AK		 295 adapter->have_msi = TRUE;
296 if ((err = pci_enable_msi(adapter->pdev))) {
297 DPRINTK(PROBE, ERR,
298 "Unable to allocate MSI interrupt Error: %d\n", err);
299 adapter->have_msi = FALSE;
300 }
301 }
9ac98284 302 if (adapter->have_msi) {
61ef5c00 303 flags &= ~IRQF_SHARED;
9ac98284
JB		 304 err = request_irq(adapter->pdev->irq, &e1000_intr_msi, flags,
305 netdev->name, netdev);
306 if (err)
307 DPRINTK(PROBE, ERR,
308 "Unable to allocate interrupt Error: %d\n", err);
309 } else
2db10a08
AK		 310#endif
311 if ((err = request_irq(adapter->pdev->irq, &e1000_intr, flags,
312 netdev->name, netdev)))
313 DPRINTK(PROBE, ERR,
314 "Unable to allocate interrupt Error: %d\n", err);
315
316 return err;
317}
318
319static void e1000_free_irq(struct e1000_adapter *adapter)
320{
321 struct net_device *netdev = adapter->netdev;
322
323 free_irq(adapter->pdev->irq, netdev);
324
325#ifdef CONFIG_PCI_MSI
326 if (adapter->have_msi)
327 pci_disable_msi(adapter->pdev);
328#endif
329}
330
1da177e4
LT		 331/**
332 * e1000_irq_disable - Mask off interrupt generation on the NIC
333 * @adapter: board private structure
334 **/
335
e619d523 336static void
1da177e4
LT		 337e1000_irq_disable(struct e1000_adapter *adapter)
338{
339 atomic_inc(&adapter->irq_sem);
340 E1000_WRITE_REG(&adapter->hw, IMC, ~0);
341 E1000_WRITE_FLUSH(&adapter->hw);
342 synchronize_irq(adapter->pdev->irq);
343}
344
345/**
346 * e1000_irq_enable - Enable default interrupt generation settings
347 * @adapter: board private structure
348 **/
349
e619d523 350static void
1da177e4
LT		 351e1000_irq_enable(struct e1000_adapter *adapter)
352{
96838a40 353 if (likely(atomic_dec_and_test(&adapter->irq_sem))) {
1da177e4
LT		 354 E1000_WRITE_REG(&adapter->hw, IMS, IMS_ENABLE_MASK);
355 E1000_WRITE_FLUSH(&adapter->hw);
356 }
357}
3ad2cc67
AB		 358
359static void
2d7edb92
MC		 360e1000_update_mng_vlan(struct e1000_adapter *adapter)
361{
362 struct net_device *netdev = adapter->netdev;
363 uint16_t vid = adapter->hw.mng_cookie.vlan_id;
364 uint16_t old_vid = adapter->mng_vlan_id;
96838a40
JB		 365 if (adapter->vlgrp) {
366 if (!adapter->vlgrp->vlan_devices[vid]) {
367 if (adapter->hw.mng_cookie.status &
2d7edb92
MC		 368 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) {
369 e1000_vlan_rx_add_vid(netdev, vid);
370 adapter->mng_vlan_id = vid;
371 } else
372 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
96838a40
JB		 373
374 if ((old_vid != (uint16_t)E1000_MNG_VLAN_NONE) &&
375 (vid != old_vid) &&
2d7edb92
MC		 376 !adapter->vlgrp->vlan_devices[old_vid])
377 e1000_vlan_rx_kill_vid(netdev, old_vid);
c5f226fe
JK		 378 } else
379 adapter->mng_vlan_id = vid;
2d7edb92
MC		 380 }
381}
b55ccb35
JK		 382
383/**
384 * e1000_release_hw_control - release control of the h/w to f/w
385 * @adapter: address of board private structure
386 *
387 * e1000_release_hw_control resets {CTRL_EXT|FWSM}:DRV_LOAD bit.
388 * For ASF and Pass Through versions of f/w this means that the
389 * driver is no longer loaded. For AMT version (only with 82573) i
90fb5135 390 * of the f/w this means that the network i/f is closed.
76c224bc 391 *
b55ccb35
JK		 392 **/
393
e619d523 394static void
b55ccb35
JK		 395e1000_release_hw_control(struct e1000_adapter *adapter)
396{
397 uint32_t ctrl_ext;
398 uint32_t swsm;
cd94dd0b 399 uint32_t extcnf;
b55ccb35
JK		 400
401 /* Let firmware taken over control of h/w */
402 switch (adapter->hw.mac_type) {
403 case e1000_82571:
404 case e1000_82572:
4cc15f54 405 case e1000_80003es2lan:
b55ccb35
JK		 406 ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
407 E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
408 ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
409 break;
410 case e1000_82573:
411 swsm = E1000_READ_REG(&adapter->hw, SWSM);
412 E1000_WRITE_REG(&adapter->hw, SWSM,
413 swsm & ~E1000_SWSM_DRV_LOAD);
cd94dd0b
AK		 414 case e1000_ich8lan:
415 extcnf = E1000_READ_REG(&adapter->hw, CTRL_EXT);
416 E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
417 extcnf & ~E1000_CTRL_EXT_DRV_LOAD);
418 break;
b55ccb35
JK		 419 default:
420 break;
421 }
422}
423
424/**
425 * e1000_get_hw_control - get control of the h/w from f/w
426 * @adapter: address of board private structure
427 *
428 * e1000_get_hw_control sets {CTRL_EXT|FWSM}:DRV_LOAD bit.
76c224bc
AK		 429 * For ASF and Pass Through versions of f/w this means that
430 * the driver is loaded. For AMT version (only with 82573)
90fb5135 431 * of the f/w this means that the network i/f is open.
76c224bc 432 *
b55ccb35
JK		 433 **/
434
e619d523 435static void
b55ccb35
JK		 436e1000_get_hw_control(struct e1000_adapter *adapter)
437{
438 uint32_t ctrl_ext;
439 uint32_t swsm;
cd94dd0b 440 uint32_t extcnf;
90fb5135 441
b55ccb35
JK		 442 /* Let firmware know the driver has taken over */
443 switch (adapter->hw.mac_type) {
444 case e1000_82571:
445 case e1000_82572:
4cc15f54 446 case e1000_80003es2lan:
b55ccb35
JK		 447 ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
448 E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
449 ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
450 break;
451 case e1000_82573:
452 swsm = E1000_READ_REG(&adapter->hw, SWSM);
453 E1000_WRITE_REG(&adapter->hw, SWSM,
454 swsm | E1000_SWSM_DRV_LOAD);
455 break;
cd94dd0b
AK		 456 case e1000_ich8lan:
457 extcnf = E1000_READ_REG(&adapter->hw, EXTCNF_CTRL);
458 E1000_WRITE_REG(&adapter->hw, EXTCNF_CTRL,
459 extcnf | E1000_EXTCNF_CTRL_SWFLAG);
460 break;
b55ccb35
JK		 461 default:
462 break;
463 }
464}
465
1da177e4
LT		 466int
467e1000_up(struct e1000_adapter *adapter)
468{
469 struct net_device *netdev = adapter->netdev;
2db10a08 470 int i;
1da177e4
LT		 471
472 /* hardware has been reset, we need to reload some things */
473
1da177e4
LT		 474 e1000_set_multi(netdev);
475
476 e1000_restore_vlan(adapter);
477
478 e1000_configure_tx(adapter);
479 e1000_setup_rctl(adapter);
480 e1000_configure_rx(adapter);
72d64a43
JK		 481 /* call E1000_DESC_UNUSED which always leaves
482 * at least 1 descriptor unused to make sure
483 * next_to_use != next_to_clean */
f56799ea 484 for (i = 0; i < adapter->num_rx_queues; i++) {
72d64a43 485 struct e1000_rx_ring *ring = &adapter->rx_ring[i];
a292ca6e
JK		 486 adapter->alloc_rx_buf(adapter, ring,
487 E1000_DESC_UNUSED(ring));
f56799ea 488 }
1da177e4 489
7bfa4816
JK		 490 adapter->tx_queue_len = netdev->tx_queue_len;
491
1da177e4
LT		 492#ifdef CONFIG_E1000_NAPI
493 netif_poll_enable(netdev);
494#endif
5de55624
MC		 495 e1000_irq_enable(adapter);
496
1314bbf3
AK		 497 clear_bit(__E1000_DOWN, &adapter->flags);
498
499 mod_timer(&adapter->watchdog_timer, jiffies + 2 * HZ);
1da177e4
LT		 500 return 0;
501}
502
79f05bf0
AK		 503/**
504 * e1000_power_up_phy - restore link in case the phy was powered down
505 * @adapter: address of board private structure
506 *
507 * The phy may be powered down to save power and turn off link when the
508 * driver is unloaded and wake on lan is not enabled (among others)
509 * *** this routine MUST be followed by a call to e1000_reset ***
510 *
511 **/
512
d658266e 513void e1000_power_up_phy(struct e1000_adapter *adapter)
79f05bf0
AK		 514{
515 uint16_t mii_reg = 0;
516
517 /* Just clear the power down bit to wake the phy back up */
518 if (adapter->hw.media_type == e1000_media_type_copper) {
519 /* according to the manual, the phy will retain its
520 * settings across a power-down/up cycle */
521 e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg);
522 mii_reg &= ~MII_CR_POWER_DOWN;
523 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, mii_reg);
524 }
525}
526
527static void e1000_power_down_phy(struct e1000_adapter *adapter)
528{
61c2505f
BA		 529 /* Power down the PHY so no link is implied when interface is down *
530 * The PHY cannot be powered down if any of the following is TRUE *
79f05bf0
AK		 531 * (a) WoL is enabled
532 * (b) AMT is active
533 * (c) SoL/IDER session is active */
534 if (!adapter->wol && adapter->hw.mac_type >= e1000_82540 &&
61c2505f 535 adapter->hw.media_type == e1000_media_type_copper) {
79f05bf0 536 uint16_t mii_reg = 0;
61c2505f
BA		 537
538 switch (adapter->hw.mac_type) {
539 case e1000_82540:
540 case e1000_82545:
541 case e1000_82545_rev_3:
542 case e1000_82546:
543 case e1000_82546_rev_3:
544 case e1000_82541:
545 case e1000_82541_rev_2:
546 case e1000_82547:
547 case e1000_82547_rev_2:
548 if (E1000_READ_REG(&adapter->hw, MANC) &
549 E1000_MANC_SMBUS_EN)
550 goto out;
551 break;
552 case e1000_82571:
553 case e1000_82572:
554 case e1000_82573:
555 case e1000_80003es2lan:
556 case e1000_ich8lan:
557 if (e1000_check_mng_mode(&adapter->hw) ||
558 e1000_check_phy_reset_block(&adapter->hw))
559 goto out;
560 break;
561 default:
562 goto out;
563 }
79f05bf0
AK		 564 e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg);
565 mii_reg |= MII_CR_POWER_DOWN;
566 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, mii_reg);
567 mdelay(1);
568 }
61c2505f
BA		 569out:
570 return;
79f05bf0
AK		 571}
572
1da177e4
LT		 573void
574e1000_down(struct e1000_adapter *adapter)
575{
576 struct net_device *netdev = adapter->netdev;
577
1314bbf3
AK		 578 /* signal that we're down so the interrupt handler does not
579 * reschedule our watchdog timer */
580 set_bit(__E1000_DOWN, &adapter->flags);
581
1da177e4 582 e1000_irq_disable(adapter);
c1605eb3 583
1da177e4
LT		 584 del_timer_sync(&adapter->tx_fifo_stall_timer);
585 del_timer_sync(&adapter->watchdog_timer);
586 del_timer_sync(&adapter->phy_info_timer);
587
588#ifdef CONFIG_E1000_NAPI
589 netif_poll_disable(netdev);
590#endif
7bfa4816 591 netdev->tx_queue_len = adapter->tx_queue_len;
1da177e4
LT		 592 adapter->link_speed = 0;
593 adapter->link_duplex = 0;
594 netif_carrier_off(netdev);
595 netif_stop_queue(netdev);
596
597 e1000_reset(adapter);
581d708e
MC		 598 e1000_clean_all_tx_rings(adapter);
599 e1000_clean_all_rx_rings(adapter);
1da177e4 600}
1da177e4 601
2db10a08
AK		 602void
603e1000_reinit_locked(struct e1000_adapter *adapter)
604{
605 WARN_ON(in_interrupt());
606 while (test_and_set_bit(__E1000_RESETTING, &adapter->flags))
607 msleep(1);
608 e1000_down(adapter);
609 e1000_up(adapter);
610 clear_bit(__E1000_RESETTING, &adapter->flags);
1da177e4
LT		 611}
612
613void
614e1000_reset(struct e1000_adapter *adapter)
615{
2d7edb92 616 uint32_t pba, manc;
1125ecbc 617 uint16_t fc_high_water_mark = E1000_FC_HIGH_DIFF;
1da177e4
LT		 618
619 /* Repartition Pba for greater than 9k mtu
620 * To take effect CTRL.RST is required.
621 */
622
2d7edb92
MC		 623 switch (adapter->hw.mac_type) {
624 case e1000_82547:
0e6ef3e0 625 case e1000_82547_rev_2:
2d7edb92
MC		 626 pba = E1000_PBA_30K;
627 break;
868d5309
MC		 628 case e1000_82571:
629 case e1000_82572:
6418ecc6 630 case e1000_80003es2lan:
868d5309
MC		 631 pba = E1000_PBA_38K;
632 break;
2d7edb92
MC		 633 case e1000_82573:
634 pba = E1000_PBA_12K;
635 break;
cd94dd0b
AK		 636 case e1000_ich8lan:
637 pba = E1000_PBA_8K;
638 break;
2d7edb92
MC		 639 default:
640 pba = E1000_PBA_48K;
641 break;
642 }
643
96838a40 644 if ((adapter->hw.mac_type != e1000_82573) &&
f11b7f85 645 (adapter->netdev->mtu > E1000_RXBUFFER_8192))
1125ecbc 646 pba -= 8; /* allocate more FIFO for Tx */
2d7edb92
MC		 647
648
96838a40 649 if (adapter->hw.mac_type == e1000_82547) {
1da177e4
LT		 650 adapter->tx_fifo_head = 0;
651 adapter->tx_head_addr = pba << E1000_TX_HEAD_ADDR_SHIFT;
652 adapter->tx_fifo_size =
653 (E1000_PBA_40K - pba) << E1000_PBA_BYTES_SHIFT;
654 atomic_set(&adapter->tx_fifo_stall, 0);
655 }
2d7edb92 656
1da177e4
LT		 657 E1000_WRITE_REG(&adapter->hw, PBA, pba);
658
659 /* flow control settings */
f11b7f85
JK		 660 /* Set the FC high water mark to 90% of the FIFO size.
661 * Required to clear last 3 LSB */
662 fc_high_water_mark = ((pba * 9216)/10) & 0xFFF8;
cd94dd0b
AK		 663 /* We can't use 90% on small FIFOs because the remainder
664 * would be less than 1 full frame. In this case, we size
665 * it to allow at least a full frame above the high water
666 * mark. */
667 if (pba < E1000_PBA_16K)
668 fc_high_water_mark = (pba * 1024) - 1600;
f11b7f85
JK		 669
670 adapter->hw.fc_high_water = fc_high_water_mark;
671 adapter->hw.fc_low_water = fc_high_water_mark - 8;
87041639
JK		 672 if (adapter->hw.mac_type == e1000_80003es2lan)
673 adapter->hw.fc_pause_time = 0xFFFF;
674 else
675 adapter->hw.fc_pause_time = E1000_FC_PAUSE_TIME;
1da177e4
LT		 676 adapter->hw.fc_send_xon = 1;
677 adapter->hw.fc = adapter->hw.original_fc;
678
2d7edb92 679 /* Allow time for pending master requests to run */
1da177e4 680 e1000_reset_hw(&adapter->hw);
96838a40 681 if (adapter->hw.mac_type >= e1000_82544)
1da177e4 682 E1000_WRITE_REG(&adapter->hw, WUC, 0);
09ae3e88 683
96838a40 684 if (e1000_init_hw(&adapter->hw))
1da177e4 685 DPRINTK(PROBE, ERR, "Hardware Error\n");
2d7edb92 686 e1000_update_mng_vlan(adapter);
1da177e4
LT		 687 /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
688 E1000_WRITE_REG(&adapter->hw, VET, ETHERNET_IEEE_VLAN_TYPE);
689
690 e1000_reset_adaptive(&adapter->hw);
691 e1000_phy_get_info(&adapter->hw, &adapter->phy_info);
9a53a202
AK		 692
693 if (!adapter->smart_power_down &&
694 (adapter->hw.mac_type == e1000_82571 ||
695 adapter->hw.mac_type == e1000_82572)) {
696 uint16_t phy_data = 0;
697 /* speed up time to link by disabling smart power down, ignore
698 * the return value of this function because there is nothing
699 * different we would do if it failed */
700 e1000_read_phy_reg(&adapter->hw, IGP02E1000_PHY_POWER_MGMT,
701 &phy_data);
702 phy_data &= ~IGP02E1000_PM_SPD;
703 e1000_write_phy_reg(&adapter->hw, IGP02E1000_PHY_POWER_MGMT,
704 phy_data);
705 }
706
4ccc12ae
JB		 707 if ((adapter->en_mng_pt) &&
708 (adapter->hw.mac_type >= e1000_82540) &&
709 (adapter->hw.mac_type < e1000_82571) &&
710 (adapter->hw.media_type == e1000_media_type_copper)) {
2d7edb92
MC		 711 manc = E1000_READ_REG(&adapter->hw, MANC);
712 manc |= (E1000_MANC_ARP_EN | E1000_MANC_EN_MNG2HOST);
713 E1000_WRITE_REG(&adapter->hw, MANC, manc);
714 }
1da177e4
LT		 715}
716
717/**
718 * e1000_probe - Device Initialization Routine
719 * @pdev: PCI device information struct
720 * @ent: entry in e1000_pci_tbl
721 *
722 * Returns 0 on success, negative on failure
723 *
724 * e1000_probe initializes an adapter identified by a pci_dev structure.
725 * The OS initialization, configuring of the adapter private structure,
726 * and a hardware reset occur.
727 **/
728
729static int __devinit
730e1000_probe(struct pci_dev *pdev,
731 const struct pci_device_id *ent)
732{
733 struct net_device *netdev;
734 struct e1000_adapter *adapter;
2d7edb92 735 unsigned long mmio_start, mmio_len;
cd94dd0b 736 unsigned long flash_start, flash_len;
2d7edb92 737
1da177e4 738 static int cards_found = 0;
120cd576 739 static int global_quad_port_a = 0; /* global ksp3 port a indication */
2d7edb92 740 int i, err, pci_using_dac;
120cd576 741 uint16_t eeprom_data = 0;
1da177e4 742 uint16_t eeprom_apme_mask = E1000_EEPROM_APME;
96838a40 743 if ((err = pci_enable_device(pdev)))
1da177e4
LT		 744 return err;
745
cd94dd0b
AK		 746 if (!(err = pci_set_dma_mask(pdev, DMA_64BIT_MASK)) &&
747 !(err = pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK))) {
1da177e4
LT		 748 pci_using_dac = 1;
749 } else {
cd94dd0b
AK		 750 if ((err = pci_set_dma_mask(pdev, DMA_32BIT_MASK)) &&
751 (err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK))) {
1da177e4 752 E1000_ERR("No usable DMA configuration, aborting\n");
6dd62ab0 753 goto err_dma;
1da177e4
LT		 754 }
755 pci_using_dac = 0;
756 }
757
96838a40 758 if ((err = pci_request_regions(pdev, e1000_driver_name)))
6dd62ab0 759 goto err_pci_reg;
1da177e4
LT		 760
761 pci_set_master(pdev);
762
6dd62ab0 763 err = -ENOMEM;
1da177e4 764 netdev = alloc_etherdev(sizeof(struct e1000_adapter));
6dd62ab0 765 if (!netdev)
1da177e4 766 goto err_alloc_etherdev;
1da177e4
LT		 767
768 SET_MODULE_OWNER(netdev);
769 SET_NETDEV_DEV(netdev, &pdev->dev);
770
771 pci_set_drvdata(pdev, netdev);
60490fe0 772 adapter = netdev_priv(netdev);
1da177e4
LT		 773 adapter->netdev = netdev;
774 adapter->pdev = pdev;
775 adapter->hw.back = adapter;
776 adapter->msg_enable = (1 << debug) - 1;
777
778 mmio_start = pci_resource_start(pdev, BAR_0);
779 mmio_len = pci_resource_len(pdev, BAR_0);
780
6dd62ab0 781 err = -EIO;
1da177e4 782 adapter->hw.hw_addr = ioremap(mmio_start, mmio_len);
6dd62ab0 783 if (!adapter->hw.hw_addr)
1da177e4 784 goto err_ioremap;
1da177e4 785
96838a40
JB		 786 for (i = BAR_1; i <= BAR_5; i++) {
787 if (pci_resource_len(pdev, i) == 0)
1da177e4 788 continue;
96838a40 789 if (pci_resource_flags(pdev, i) & IORESOURCE_IO) {
1da177e4
LT		 790 adapter->hw.io_base = pci_resource_start(pdev, i);
791 break;
792 }
793 }
794
795 netdev->open = &e1000_open;
796 netdev->stop = &e1000_close;
797 netdev->hard_start_xmit = &e1000_xmit_frame;
798 netdev->get_stats = &e1000_get_stats;
799 netdev->set_multicast_list = &e1000_set_multi;
800 netdev->set_mac_address = &e1000_set_mac;
801 netdev->change_mtu = &e1000_change_mtu;
802 netdev->do_ioctl = &e1000_ioctl;
803 e1000_set_ethtool_ops(netdev);
804 netdev->tx_timeout = &e1000_tx_timeout;
805 netdev->watchdog_timeo = 5 * HZ;
806#ifdef CONFIG_E1000_NAPI
807 netdev->poll = &e1000_clean;
808 netdev->weight = 64;
809#endif
810 netdev->vlan_rx_register = e1000_vlan_rx_register;
811 netdev->vlan_rx_add_vid = e1000_vlan_rx_add_vid;
812 netdev->vlan_rx_kill_vid = e1000_vlan_rx_kill_vid;
813#ifdef CONFIG_NET_POLL_CONTROLLER
814 netdev->poll_controller = e1000_netpoll;
815#endif
0eb5a34c 816 strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
1da177e4
LT		 817
818 netdev->mem_start = mmio_start;
819 netdev->mem_end = mmio_start + mmio_len;
820 netdev->base_addr = adapter->hw.io_base;
821
822 adapter->bd_number = cards_found;
823
824 /* setup the private structure */
825
96838a40 826 if ((err = e1000_sw_init(adapter)))
1da177e4
LT		 827 goto err_sw_init;
828
6dd62ab0 829 err = -EIO;
cd94dd0b
AK		 830 /* Flash BAR mapping must happen after e1000_sw_init
831 * because it depends on mac_type */
832 if ((adapter->hw.mac_type == e1000_ich8lan) &&
833 (pci_resource_flags(pdev, 1) & IORESOURCE_MEM)) {
834 flash_start = pci_resource_start(pdev, 1);
835 flash_len = pci_resource_len(pdev, 1);
836 adapter->hw.flash_address = ioremap(flash_start, flash_len);
6dd62ab0 837 if (!adapter->hw.flash_address)
cd94dd0b 838 goto err_flashmap;
cd94dd0b
AK		 839 }
840
6dd62ab0 841 if (e1000_check_phy_reset_block(&adapter->hw))
2d7edb92
MC		 842 DPRINTK(PROBE, INFO, "PHY reset is blocked due to SOL/IDER session.\n");
843
96838a40 844 if (adapter->hw.mac_type >= e1000_82543) {
1da177e4
LT		 845 netdev->features = NETIF_F_SG |
846 NETIF_F_HW_CSUM |
847 NETIF_F_HW_VLAN_TX |
848 NETIF_F_HW_VLAN_RX |
849 NETIF_F_HW_VLAN_FILTER;
cd94dd0b
AK		 850 if (adapter->hw.mac_type == e1000_ich8lan)
851 netdev->features &= ~NETIF_F_HW_VLAN_FILTER;
1da177e4
LT		 852 }
853
854#ifdef NETIF_F_TSO
96838a40 855 if ((adapter->hw.mac_type >= e1000_82544) &&
1da177e4
LT		 856 (adapter->hw.mac_type != e1000_82547))
857 netdev->features |= NETIF_F_TSO;
2d7edb92 858
87ca4e5b 859#ifdef NETIF_F_TSO6
96838a40 860 if (adapter->hw.mac_type > e1000_82547_rev_2)
87ca4e5b 861 netdev->features |= NETIF_F_TSO6;
2d7edb92 862#endif
1da177e4 863#endif
96838a40 864 if (pci_using_dac)
1da177e4
LT		 865 netdev->features |= NETIF_F_HIGHDMA;
866
76c224bc
AK		 867 netdev->features |= NETIF_F_LLTX;
868
2d7edb92
MC		 869 adapter->en_mng_pt = e1000_enable_mng_pass_thru(&adapter->hw);
870
cd94dd0b
AK		 871 /* initialize eeprom parameters */
872
873 if (e1000_init_eeprom_params(&adapter->hw)) {
874 E1000_ERR("EEPROM initialization failed\n");
6dd62ab0 875 goto err_eeprom;
cd94dd0b
AK		 876 }
877
96838a40 878 /* before reading the EEPROM, reset the controller to
1da177e4 879 * put the device in a known good starting state */
96838a40 880
1da177e4
LT		 881 e1000_reset_hw(&adapter->hw);
882
883 /* make sure the EEPROM is good */
884
96838a40 885 if (e1000_validate_eeprom_checksum(&adapter->hw) < 0) {
1da177e4 886 DPRINTK(PROBE, ERR, "The EEPROM Checksum Is Not Valid\n");
1da177e4
LT		 887 goto err_eeprom;
888 }
889
890 /* copy the MAC address out of the EEPROM */
891
96838a40 892 if (e1000_read_mac_addr(&adapter->hw))
1da177e4
LT		 893 DPRINTK(PROBE, ERR, "EEPROM Read Error\n");
894 memcpy(netdev->dev_addr, adapter->hw.mac_addr, netdev->addr_len);
9beb0ac1 895 memcpy(netdev->perm_addr, adapter->hw.mac_addr, netdev->addr_len);
1da177e4 896
96838a40 897 if (!is_valid_ether_addr(netdev->perm_addr)) {
1da177e4 898 DPRINTK(PROBE, ERR, "Invalid MAC Address\n");
1da177e4
LT		 899 goto err_eeprom;
900 }
901
1da177e4
LT		 902 e1000_get_bus_info(&adapter->hw);
903
904 init_timer(&adapter->tx_fifo_stall_timer);
905 adapter->tx_fifo_stall_timer.function = &e1000_82547_tx_fifo_stall;
906 adapter->tx_fifo_stall_timer.data = (unsigned long) adapter;
907
908 init_timer(&adapter->watchdog_timer);
909 adapter->watchdog_timer.function = &e1000_watchdog;
910 adapter->watchdog_timer.data = (unsigned long) adapter;
911
1da177e4
LT		 912 init_timer(&adapter->phy_info_timer);
913 adapter->phy_info_timer.function = &e1000_update_phy_info;
914 adapter->phy_info_timer.data = (unsigned long) adapter;
915
87041639
JK		 916 INIT_WORK(&adapter->reset_task,
917 (void (*)(void *))e1000_reset_task, netdev);
1da177e4 918
1da177e4
LT		 919 e1000_check_options(adapter);
920
921 /* Initial Wake on LAN setting
922 * If APM wake is enabled in the EEPROM,
923 * enable the ACPI Magic Packet filter
924 */
925
96838a40 926 switch (adapter->hw.mac_type) {
1da177e4
LT		 927 case e1000_82542_rev2_0:
928 case e1000_82542_rev2_1:
929 case e1000_82543:
930 break;
931 case e1000_82544:
932 e1000_read_eeprom(&adapter->hw,
933 EEPROM_INIT_CONTROL2_REG, 1, &eeprom_data);
934 eeprom_apme_mask = E1000_EEPROM_82544_APM;
935 break;
cd94dd0b
AK		 936 case e1000_ich8lan:
937 e1000_read_eeprom(&adapter->hw,
938 EEPROM_INIT_CONTROL1_REG, 1, &eeprom_data);
939 eeprom_apme_mask = E1000_EEPROM_ICH8_APME;
940 break;
1da177e4
LT		 941 case e1000_82546:
942 case e1000_82546_rev_3:
fd803241 943 case e1000_82571:
6418ecc6 944 case e1000_80003es2lan:
96838a40 945 if (E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_FUNC_1){
1da177e4
LT		 946 e1000_read_eeprom(&adapter->hw,
947 EEPROM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
948 break;
949 }
950 /* Fall Through */
951 default:
952 e1000_read_eeprom(&adapter->hw,
953 EEPROM_INIT_CONTROL3_PORT_A, 1, &eeprom_data);
954 break;
955 }
96838a40 956 if (eeprom_data & eeprom_apme_mask)
120cd576
JB		 957 adapter->eeprom_wol |= E1000_WUFC_MAG;
958
959 /* now that we have the eeprom settings, apply the special cases
960 * where the eeprom may be wrong or the board simply won't support
961 * wake on lan on a particular port */
962 switch (pdev->device) {
963 case E1000_DEV_ID_82546GB_PCIE:
964 adapter->eeprom_wol = 0;
965 break;
966 case E1000_DEV_ID_82546EB_FIBER:
967 case E1000_DEV_ID_82546GB_FIBER:
968 case E1000_DEV_ID_82571EB_FIBER:
969 /* Wake events only supported on port A for dual fiber
970 * regardless of eeprom setting */
971 if (E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_FUNC_1)
972 adapter->eeprom_wol = 0;
973 break;
974 case E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3:
5881cde8 975 case E1000_DEV_ID_82571EB_QUAD_COPPER:
fc2307d0 976 case E1000_DEV_ID_82571EB_QUAD_COPPER_LOWPROFILE:
120cd576
JB		 977 /* if quad port adapter, disable WoL on all but port A */
978 if (global_quad_port_a != 0)
979 adapter->eeprom_wol = 0;
980 else
981 adapter->quad_port_a = 1;
982 /* Reset for multiple quad port adapters */
983 if (++global_quad_port_a == 4)
984 global_quad_port_a = 0;
985 break;
986 }
987
988 /* initialize the wol settings based on the eeprom settings */
989 adapter->wol = adapter->eeprom_wol;
1da177e4 990
fb3d47d4
JK		 991 /* print bus type/speed/width info */
992 {
993 struct e1000_hw *hw = &adapter->hw;
994 DPRINTK(PROBE, INFO, "(PCI%s:%s:%s) ",
995 ((hw->bus_type == e1000_bus_type_pcix) ? "-X" :
996 (hw->bus_type == e1000_bus_type_pci_express ? " Express":"")),
997 ((hw->bus_speed == e1000_bus_speed_2500) ? "2.5Gb/s" :
998 (hw->bus_speed == e1000_bus_speed_133) ? "133MHz" :
999 (hw->bus_speed == e1000_bus_speed_120) ? "120MHz" :
1000 (hw->bus_speed == e1000_bus_speed_100) ? "100MHz" :
1001 (hw->bus_speed == e1000_bus_speed_66) ? "66MHz" : "33MHz"),
1002 ((hw->bus_width == e1000_bus_width_64) ? "64-bit" :
1003 (hw->bus_width == e1000_bus_width_pciex_4) ? "Width x4" :
1004 (hw->bus_width == e1000_bus_width_pciex_1) ? "Width x1" :
1005 "32-bit"));
1006 }
1007
1008 for (i = 0; i < 6; i++)
1009 printk("%2.2x%c", netdev->dev_addr[i], i == 5 ? '\n' : ':');
1010
1da177e4
LT		 1011 /* reset the hardware with the new settings */
1012 e1000_reset(adapter);
1013
b55ccb35
JK		 1014 /* If the controller is 82573 and f/w is AMT, do not set
1015 * DRV_LOAD until the interface is up. For all other cases,
1016 * let the f/w know that the h/w is now under the control
1017 * of the driver. */
1018 if (adapter->hw.mac_type != e1000_82573 ||
1019 !e1000_check_mng_mode(&adapter->hw))
1020 e1000_get_hw_control(adapter);
2d7edb92 1021
1da177e4 1022 strcpy(netdev->name, "eth%d");
96838a40 1023 if ((err = register_netdev(netdev)))
1da177e4
LT		 1024 goto err_register;
1025
1314bbf3
AK		 1026 /* tell the stack to leave us alone until e1000_open() is called */
1027 netif_carrier_off(netdev);
1028 netif_stop_queue(netdev);
1029
1da177e4
LT		 1030 DPRINTK(PROBE, INFO, "Intel(R) PRO/1000 Network Connection\n");
1031
1032 cards_found++;
1033 return 0;
1034
1035err_register:
6dd62ab0
VA		 1036 e1000_release_hw_control(adapter);
1037err_eeprom:
1038 if (!e1000_check_phy_reset_block(&adapter->hw))
1039 e1000_phy_hw_reset(&adapter->hw);
1040
cd94dd0b
AK		 1041 if (adapter->hw.flash_address)
1042 iounmap(adapter->hw.flash_address);
1043err_flashmap:
6dd62ab0
VA		 1044#ifdef CONFIG_E1000_NAPI
1045 for (i = 0; i < adapter->num_rx_queues; i++)
1046 dev_put(&adapter->polling_netdev[i]);
1047#endif
1048
1049 kfree(adapter->tx_ring);
1050 kfree(adapter->rx_ring);
1051#ifdef CONFIG_E1000_NAPI
1052 kfree(adapter->polling_netdev);
1053#endif
1da177e4 1054err_sw_init:
1da177e4
LT		 1055 iounmap(adapter->hw.hw_addr);
1056err_ioremap:
1057 free_netdev(netdev);
1058err_alloc_etherdev:
1059 pci_release_regions(pdev);
6dd62ab0
VA		 1060err_pci_reg:
1061err_dma:
1062 pci_disable_device(pdev);
1da177e4
LT		 1063 return err;
1064}
1065
1066/**
1067 * e1000_remove - Device Removal Routine
1068 * @pdev: PCI device information struct
1069 *
1070 * e1000_remove is called by the PCI subsystem to alert the driver
1071 * that it should release a PCI device. The could be caused by a
1072 * Hot-Plug event, or because the driver is going to be removed from
1073 * memory.
1074 **/
1075
1076static void __devexit
1077e1000_remove(struct pci_dev *pdev)
1078{
1079 struct net_device *netdev = pci_get_drvdata(pdev);
60490fe0 1080 struct e1000_adapter *adapter = netdev_priv(netdev);
b55ccb35 1081 uint32_t manc;
581d708e
MC		 1082#ifdef CONFIG_E1000_NAPI
1083 int i;
1084#endif
1da177e4 1085
be2b28ed
JG		 1086 flush_scheduled_work();
1087
4ccc12ae
JB		 1088 if (adapter->hw.mac_type >= e1000_82540 &&
1089 adapter->hw.mac_type < e1000_82571 &&
1090 adapter->hw.media_type == e1000_media_type_copper) {
1da177e4 1091 manc = E1000_READ_REG(&adapter->hw, MANC);
96838a40 1092 if (manc & E1000_MANC_SMBUS_EN) {
1da177e4
LT		 1093 manc |= E1000_MANC_ARP_EN;
1094 E1000_WRITE_REG(&adapter->hw, MANC, manc);
1095 }
1096 }
1097
b55ccb35
JK		 1098 /* Release control of h/w to f/w. If f/w is AMT enabled, this
1099 * would have already happened in close and is redundant. */
1100 e1000_release_hw_control(adapter);
2d7edb92 1101
1da177e4 1102 unregister_netdev(netdev);
581d708e 1103#ifdef CONFIG_E1000_NAPI
f56799ea 1104 for (i = 0; i < adapter->num_rx_queues; i++)
15333061 1105 dev_put(&adapter->polling_netdev[i]);
581d708e 1106#endif
1da177e4 1107
96838a40 1108 if (!e1000_check_phy_reset_block(&adapter->hw))
2d7edb92 1109 e1000_phy_hw_reset(&adapter->hw);
1da177e4 1110
24025e4e
MC		 1111 kfree(adapter->tx_ring);
1112 kfree(adapter->rx_ring);
1113#ifdef CONFIG_E1000_NAPI
1114 kfree(adapter->polling_netdev);
1115#endif
1116
1da177e4 1117 iounmap(adapter->hw.hw_addr);
cd94dd0b
AK		 1118 if (adapter->hw.flash_address)
1119 iounmap(adapter->hw.flash_address);
1da177e4
LT		 1120 pci_release_regions(pdev);
1121
1122 free_netdev(netdev);
1123
1124 pci_disable_device(pdev);
1125}
1126
1127/**
1128 * e1000_sw_init - Initialize general software structures (struct e1000_adapter)
1129 * @adapter: board private structure to initialize
1130 *
1131 * e1000_sw_init initializes the Adapter private data structure.
1132 * Fields are initialized based on PCI device information and
1133 * OS network device settings (MTU size).
1134 **/
1135
1136static int __devinit
1137e1000_sw_init(struct e1000_adapter *adapter)
1138{
1139 struct e1000_hw *hw = &adapter->hw;
1140 struct net_device *netdev = adapter->netdev;
1141 struct pci_dev *pdev = adapter->pdev;
581d708e
MC		 1142#ifdef CONFIG_E1000_NAPI
1143 int i;
1144#endif
1da177e4
LT		 1145
1146 /* PCI config space info */
1147
1148 hw->vendor_id = pdev->vendor;
1149 hw->device_id = pdev->device;
1150 hw->subsystem_vendor_id = pdev->subsystem_vendor;
1151 hw->subsystem_id = pdev->subsystem_device;
1152
1153 pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id);
1154
1155 pci_read_config_word(pdev, PCI_COMMAND, &hw->pci_cmd_word);
1156
eb0f8054 1157 adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
9e2feace 1158 adapter->rx_ps_bsize0 = E1000_RXBUFFER_128;
1da177e4
LT		 1159 hw->max_frame_size = netdev->mtu +
1160 ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
1161 hw->min_frame_size = MINIMUM_ETHERNET_FRAME_SIZE;
1162
1163 /* identify the MAC */
1164
96838a40 1165 if (e1000_set_mac_type(hw)) {
1da177e4
LT		 1166 DPRINTK(PROBE, ERR, "Unknown MAC Type\n");
1167 return -EIO;
1168 }
1169
96838a40 1170 switch (hw->mac_type) {
1da177e4
LT		 1171 default:
1172 break;
1173 case e1000_82541:
1174 case e1000_82547:
1175 case e1000_82541_rev_2:
1176 case e1000_82547_rev_2:
1177 hw->phy_init_script = 1;
1178 break;
1179 }
1180
1181 e1000_set_media_type(hw);
1182
1183 hw->wait_autoneg_complete = FALSE;
1184 hw->tbi_compatibility_en = TRUE;
1185 hw->adaptive_ifs = TRUE;
1186
1187 /* Copper options */
1188
96838a40 1189 if (hw->media_type == e1000_media_type_copper) {
1da177e4
LT		 1190 hw->mdix = AUTO_ALL_MODES;
1191 hw->disable_polarity_correction = FALSE;
1192 hw->master_slave = E1000_MASTER_SLAVE;
1193 }
1194
f56799ea
JK		 1195 adapter->num_tx_queues = 1;
1196 adapter->num_rx_queues = 1;
581d708e
MC		 1197
1198 if (e1000_alloc_queues(adapter)) {
1199 DPRINTK(PROBE, ERR, "Unable to allocate memory for queues\n");
1200 return -ENOMEM;
1201 }
1202
1203#ifdef CONFIG_E1000_NAPI
f56799ea 1204 for (i = 0; i < adapter->num_rx_queues; i++) {
581d708e
MC		 1205 adapter->polling_netdev[i].priv = adapter;
1206 adapter->polling_netdev[i].poll = &e1000_clean;
1207 adapter->polling_netdev[i].weight = 64;
1208 dev_hold(&adapter->polling_netdev[i]);
1209 set_bit(__LINK_STATE_START, &adapter->polling_netdev[i].state);
1210 }
7bfa4816 1211 spin_lock_init(&adapter->tx_queue_lock);
24025e4e
MC		 1212#endif
1213
1da177e4
LT		 1214 atomic_set(&adapter->irq_sem, 1);
1215 spin_lock_init(&adapter->stats_lock);
1da177e4 1216
1314bbf3
AK		 1217 set_bit(__E1000_DOWN, &adapter->flags);
1218
1da177e4
LT		 1219 return 0;
1220}
1221
581d708e
MC		 1222/**
1223 * e1000_alloc_queues - Allocate memory for all rings
1224 * @adapter: board private structure to initialize
1225 *
1226 * We allocate one ring per queue at run-time since we don't know the
1227 * number of queues at compile-time. The polling_netdev array is
1228 * intended for Multiqueue, but should work fine with a single queue.
1229 **/
1230
1231static int __devinit
1232e1000_alloc_queues(struct e1000_adapter *adapter)
1233{
1234 int size;
1235
f56799ea 1236 size = sizeof(struct e1000_tx_ring) * adapter->num_tx_queues;
581d708e
MC		 1237 adapter->tx_ring = kmalloc(size, GFP_KERNEL);
1238 if (!adapter->tx_ring)
1239 return -ENOMEM;
1240 memset(adapter->tx_ring, 0, size);
1241
f56799ea 1242 size = sizeof(struct e1000_rx_ring) * adapter->num_rx_queues;
581d708e
MC		 1243 adapter->rx_ring = kmalloc(size, GFP_KERNEL);
1244 if (!adapter->rx_ring) {
1245 kfree(adapter->tx_ring);
1246 return -ENOMEM;
1247 }
1248 memset(adapter->rx_ring, 0, size);
1249
1250#ifdef CONFIG_E1000_NAPI
f56799ea 1251 size = sizeof(struct net_device) * adapter->num_rx_queues;
581d708e
MC		 1252 adapter->polling_netdev = kmalloc(size, GFP_KERNEL);
1253 if (!adapter->polling_netdev) {
1254 kfree(adapter->tx_ring);
1255 kfree(adapter->rx_ring);
1256 return -ENOMEM;
1257 }
1258 memset(adapter->polling_netdev, 0, size);
1259#endif
1260
1261 return E1000_SUCCESS;
1262}
1263
1da177e4
LT		 1264/**
1265 * e1000_open - Called when a network interface is made active
1266 * @netdev: network interface device structure
1267 *
1268 * Returns 0 on success, negative value on failure
1269 *
1270 * The open entry point is called when a network interface is made
1271 * active by the system (IFF_UP). At this point all resources needed
1272 * for transmit and receive operations are allocated, the interrupt
1273 * handler is registered with the OS, the watchdog timer is started,
1274 * and the stack is notified that the interface is ready.
1275 **/
1276
1277static int
1278e1000_open(struct net_device *netdev)
1279{
60490fe0 1280 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 1281 int err;
1282
2db10a08 1283 /* disallow open during test */
1314bbf3 1284 if (test_bit(__E1000_TESTING, &adapter->flags))
2db10a08
AK		 1285 return -EBUSY;
1286
1da177e4 1287 /* allocate transmit descriptors */
581d708e 1288 if ((err = e1000_setup_all_tx_resources(adapter)))
1da177e4
LT		 1289 goto err_setup_tx;
1290
1291 /* allocate receive descriptors */
581d708e 1292 if ((err = e1000_setup_all_rx_resources(adapter)))
1da177e4
LT		 1293 goto err_setup_rx;
1294
2db10a08
AK		 1295 err = e1000_request_irq(adapter);
1296 if (err)
401a552b 1297 goto err_req_irq;
2db10a08 1298
79f05bf0
AK		 1299 e1000_power_up_phy(adapter);
1300
96838a40 1301 if ((err = e1000_up(adapter)))
1da177e4 1302 goto err_up;
2d7edb92 1303 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
96838a40 1304 if ((adapter->hw.mng_cookie.status &
2d7edb92
MC		 1305 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) {
1306 e1000_update_mng_vlan(adapter);
1307 }
1da177e4 1308
b55ccb35
JK		 1309 /* If AMT is enabled, let the firmware know that the network
1310 * interface is now open */
1311 if (adapter->hw.mac_type == e1000_82573 &&
1312 e1000_check_mng_mode(&adapter->hw))
1313 e1000_get_hw_control(adapter);
1314
1da177e4
LT		 1315 return E1000_SUCCESS;
1316
1317err_up:
401a552b
VA		 1318 e1000_power_down_phy(adapter);
1319 e1000_free_irq(adapter);
1320err_req_irq:
581d708e 1321 e1000_free_all_rx_resources(adapter);
1da177e4 1322err_setup_rx:
581d708e 1323 e1000_free_all_tx_resources(adapter);
1da177e4
LT		 1324err_setup_tx:
1325 e1000_reset(adapter);
1326
1327 return err;
1328}
1329
1330/**
1331 * e1000_close - Disables a network interface
1332 * @netdev: network interface device structure
1333 *
1334 * Returns 0, this is not allowed to fail
1335 *
1336 * The close entry point is called when an interface is de-activated
1337 * by the OS. The hardware is still under the drivers control, but
1338 * needs to be disabled. A global MAC reset is issued to stop the
1339 * hardware, and all transmit and receive resources are freed.
1340 **/
1341
1342static int
1343e1000_close(struct net_device *netdev)
1344{
60490fe0 1345 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 1346
2db10a08 1347 WARN_ON(test_bit(__E1000_RESETTING, &adapter->flags));
1da177e4 1348 e1000_down(adapter);
79f05bf0 1349 e1000_power_down_phy(adapter);
2db10a08 1350 e1000_free_irq(adapter);
1da177e4 1351
581d708e
MC		 1352 e1000_free_all_tx_resources(adapter);
1353 e1000_free_all_rx_resources(adapter);
1da177e4 1354
4666560a
BA		 1355 /* kill manageability vlan ID if supported, but not if a vlan with
1356 * the same ID is registered on the host OS (let 8021q kill it) */
96838a40 1357 if ((adapter->hw.mng_cookie.status &
4666560a
BA		 1358 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
1359 !(adapter->vlgrp &&
1360 adapter->vlgrp->vlan_devices[adapter->mng_vlan_id])) {
2d7edb92
MC		 1361 e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
1362 }
b55ccb35
JK		 1363
1364 /* If AMT is enabled, let the firmware know that the network
1365 * interface is now closed */
1366 if (adapter->hw.mac_type == e1000_82573 &&
1367 e1000_check_mng_mode(&adapter->hw))
1368 e1000_release_hw_control(adapter);
1369
1da177e4
LT		 1370 return 0;
1371}
1372
1373/**
1374 * e1000_check_64k_bound - check that memory doesn't cross 64kB boundary
1375 * @adapter: address of board private structure
2d7edb92
MC		 1376 * @start: address of beginning of memory
1377 * @len: length of memory
1da177e4 1378 **/
e619d523 1379static boolean_t
1da177e4
LT		 1380e1000_check_64k_bound(struct e1000_adapter *adapter,
1381 void *start, unsigned long len)
1382{
1383 unsigned long begin = (unsigned long) start;
1384 unsigned long end = begin + len;
1385
2648345f
MC		 1386 /* First rev 82545 and 82546 need to not allow any memory
1387 * write location to cross 64k boundary due to errata 23 */
1da177e4 1388 if (adapter->hw.mac_type == e1000_82545 ||
2648345f 1389 adapter->hw.mac_type == e1000_82546) {
1da177e4
LT		 1390 return ((begin ^ (end - 1)) >> 16) != 0 ? FALSE : TRUE;
1391 }
1392
1393 return TRUE;
1394}
1395
1396/**
1397 * e1000_setup_tx_resources - allocate Tx resources (Descriptors)
1398 * @adapter: board private structure
581d708e 1399 * @txdr: tx descriptor ring (for a specific queue) to setup
1da177e4
LT		 1400 *
1401 * Return 0 on success, negative on failure
1402 **/
1403
3ad2cc67 1404static int
581d708e
MC		 1405e1000_setup_tx_resources(struct e1000_adapter *adapter,
1406 struct e1000_tx_ring *txdr)
1da177e4 1407{
1da177e4
LT		 1408 struct pci_dev *pdev = adapter->pdev;
1409 int size;
1410
1411 size = sizeof(struct e1000_buffer) * txdr->count;
cd94dd0b 1412 txdr->buffer_info = vmalloc(size);
96838a40 1413 if (!txdr->buffer_info) {
2648345f
MC		 1414 DPRINTK(PROBE, ERR,
1415 "Unable to allocate memory for the transmit descriptor ring\n");
1da177e4
LT		 1416 return -ENOMEM;
1417 }
1418 memset(txdr->buffer_info, 0, size);
1419
1420 /* round up to nearest 4K */
1421
1422 txdr->size = txdr->count * sizeof(struct e1000_tx_desc);
1423 E1000_ROUNDUP(txdr->size, 4096);
1424
1425 txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
96838a40 1426 if (!txdr->desc) {
1da177e4 1427setup_tx_desc_die:
1da177e4 1428 vfree(txdr->buffer_info);
2648345f
MC		 1429 DPRINTK(PROBE, ERR,
1430 "Unable to allocate memory for the transmit descriptor ring\n");
1da177e4
LT		 1431 return -ENOMEM;
1432 }
1433
2648345f 1434 /* Fix for errata 23, can't cross 64kB boundary */
1da177e4
LT		 1435 if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
1436 void *olddesc = txdr->desc;
1437 dma_addr_t olddma = txdr->dma;
2648345f
MC		 1438 DPRINTK(TX_ERR, ERR, "txdr align check failed: %u bytes "
1439 "at %p\n", txdr->size, txdr->desc);
1440 /* Try again, without freeing the previous */
1da177e4 1441 txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
2648345f 1442 /* Failed allocation, critical failure */
96838a40 1443 if (!txdr->desc) {
1da177e4
LT		 1444 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1445 goto setup_tx_desc_die;
1446 }
1447
1448 if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
1449 /* give up */
2648345f
MC		 1450 pci_free_consistent(pdev, txdr->size, txdr->desc,
1451 txdr->dma);
1da177e4
LT		 1452 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1453 DPRINTK(PROBE, ERR,
2648345f
MC		 1454 "Unable to allocate aligned memory "
1455 "for the transmit descriptor ring\n");
1da177e4
LT		 1456 vfree(txdr->buffer_info);
1457 return -ENOMEM;
1458 } else {
2648345f 1459 /* Free old allocation, new allocation was successful */
1da177e4
LT		 1460 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1461 }
1462 }
1463 memset(txdr->desc, 0, txdr->size);
1464
1465 txdr->next_to_use = 0;
1466 txdr->next_to_clean = 0;
2ae76d98 1467 spin_lock_init(&txdr->tx_lock);
1da177e4
LT		 1468
1469 return 0;
1470}
1471
581d708e
MC		 1472/**
1473 * e1000_setup_all_tx_resources - wrapper to allocate Tx resources
1474 * (Descriptors) for all queues
1475 * @adapter: board private structure
1476 *
581d708e
MC		 1477 * Return 0 on success, negative on failure
1478 **/
1479
1480int
1481e1000_setup_all_tx_resources(struct e1000_adapter *adapter)
1482{
1483 int i, err = 0;
1484
f56799ea 1485 for (i = 0; i < adapter->num_tx_queues; i++) {
581d708e
MC		 1486 err = e1000_setup_tx_resources(adapter, &adapter->tx_ring[i]);
1487 if (err) {
1488 DPRINTK(PROBE, ERR,
1489 "Allocation for Tx Queue %u failed\n", i);
3fbbc72e
VA		 1490 for (i-- ; i >= 0; i--)
1491 e1000_free_tx_resources(adapter,
1492 &adapter->tx_ring[i]);
581d708e
MC		 1493 break;
1494 }
1495 }
1496
1497 return err;
1498}
1499
1da177e4
LT		 1500/**
1501 * e1000_configure_tx - Configure 8254x Transmit Unit after Reset
1502 * @adapter: board private structure
1503 *
1504 * Configure the Tx unit of the MAC after a reset.
1505 **/
1506
1507static void
1508e1000_configure_tx(struct e1000_adapter *adapter)
1509{
581d708e
MC		 1510 uint64_t tdba;
1511 struct e1000_hw *hw = &adapter->hw;
1512 uint32_t tdlen, tctl, tipg, tarc;
0fadb059 1513 uint32_t ipgr1, ipgr2;
1da177e4
LT		 1514
1515 /* Setup the HW Tx Head and Tail descriptor pointers */
1516
f56799ea 1517 switch (adapter->num_tx_queues) {
24025e4e
MC		 1518 case 1:
1519 default:
581d708e
MC		 1520 tdba = adapter->tx_ring[0].dma;
1521 tdlen = adapter->tx_ring[0].count *
1522 sizeof(struct e1000_tx_desc);
581d708e 1523 E1000_WRITE_REG(hw, TDLEN, tdlen);
4ca213a6
AK		 1524 E1000_WRITE_REG(hw, TDBAH, (tdba >> 32));
1525 E1000_WRITE_REG(hw, TDBAL, (tdba & 0x00000000ffffffffULL));
581d708e 1526 E1000_WRITE_REG(hw, TDT, 0);
4ca213a6 1527 E1000_WRITE_REG(hw, TDH, 0);
6a951698
AK		 1528 adapter->tx_ring[0].tdh = ((hw->mac_type >= e1000_82543) ? E1000_TDH : E1000_82542_TDH);
1529 adapter->tx_ring[0].tdt = ((hw->mac_type >= e1000_82543) ? E1000_TDT : E1000_82542_TDT);
24025e4e
MC		 1530 break;
1531 }
1da177e4
LT		 1532
1533 /* Set the default values for the Tx Inter Packet Gap timer */
1534
0fadb059
JK		 1535 if (hw->media_type == e1000_media_type_fiber ||
1536 hw->media_type == e1000_media_type_internal_serdes)
1537 tipg = DEFAULT_82543_TIPG_IPGT_FIBER;
1538 else
1539 tipg = DEFAULT_82543_TIPG_IPGT_COPPER;
1540
581d708e 1541 switch (hw->mac_type) {
1da177e4
LT		 1542 case e1000_82542_rev2_0:
1543 case e1000_82542_rev2_1:
1544 tipg = DEFAULT_82542_TIPG_IPGT;
0fadb059
JK		 1545 ipgr1 = DEFAULT_82542_TIPG_IPGR1;
1546 ipgr2 = DEFAULT_82542_TIPG_IPGR2;
1da177e4 1547 break;
87041639
JK		 1548 case e1000_80003es2lan:
1549 ipgr1 = DEFAULT_82543_TIPG_IPGR1;
1550 ipgr2 = DEFAULT_80003ES2LAN_TIPG_IPGR2;
1551 break;
1da177e4 1552 default:
0fadb059
JK		 1553 ipgr1 = DEFAULT_82543_TIPG_IPGR1;
1554 ipgr2 = DEFAULT_82543_TIPG_IPGR2;
1555 break;
1da177e4 1556 }
0fadb059
JK		 1557 tipg |= ipgr1 << E1000_TIPG_IPGR1_SHIFT;
1558 tipg |= ipgr2 << E1000_TIPG_IPGR2_SHIFT;
581d708e 1559 E1000_WRITE_REG(hw, TIPG, tipg);
1da177e4
LT		 1560
1561 /* Set the Tx Interrupt Delay register */
1562
581d708e
MC		 1563 E1000_WRITE_REG(hw, TIDV, adapter->tx_int_delay);
1564 if (hw->mac_type >= e1000_82540)
1565 E1000_WRITE_REG(hw, TADV, adapter->tx_abs_int_delay);
1da177e4
LT		 1566
1567 /* Program the Transmit Control Register */
1568
581d708e 1569 tctl = E1000_READ_REG(hw, TCTL);
1da177e4 1570 tctl &= ~E1000_TCTL_CT;
7e6c9861 1571 tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
1da177e4
LT		 1572 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
1573
2ae76d98
MC		 1574 if (hw->mac_type == e1000_82571 || hw->mac_type == e1000_82572) {
1575 tarc = E1000_READ_REG(hw, TARC0);
90fb5135
AK		 1576 /* set the speed mode bit, we'll clear it if we're not at
1577 * gigabit link later */
09ae3e88 1578 tarc |= (1 << 21);
2ae76d98 1579 E1000_WRITE_REG(hw, TARC0, tarc);
87041639
JK		 1580 } else if (hw->mac_type == e1000_80003es2lan) {
1581 tarc = E1000_READ_REG(hw, TARC0);
1582 tarc |= 1;
87041639
JK		 1583 E1000_WRITE_REG(hw, TARC0, tarc);
1584 tarc = E1000_READ_REG(hw, TARC1);
1585 tarc |= 1;
1586 E1000_WRITE_REG(hw, TARC1, tarc);
2ae76d98
MC		 1587 }
1588
581d708e 1589 e1000_config_collision_dist(hw);
1da177e4
LT		 1590
1591 /* Setup Transmit Descriptor Settings for eop descriptor */
6a042dab
JB		 1592 adapter->txd_cmd = E1000_TXD_CMD_EOP | E1000_TXD_CMD_IFCS;
1593
1594 /* only set IDE if we are delaying interrupts using the timers */
1595 if (adapter->tx_int_delay)
1596 adapter->txd_cmd |= E1000_TXD_CMD_IDE;
1da177e4 1597
581d708e 1598 if (hw->mac_type < e1000_82543)
1da177e4
LT		 1599 adapter->txd_cmd |= E1000_TXD_CMD_RPS;
1600 else
1601 adapter->txd_cmd |= E1000_TXD_CMD_RS;
1602
1603 /* Cache if we're 82544 running in PCI-X because we'll
1604 * need this to apply a workaround later in the send path. */
581d708e
MC		 1605 if (hw->mac_type == e1000_82544 &&
1606 hw->bus_type == e1000_bus_type_pcix)
1da177e4 1607 adapter->pcix_82544 = 1;
7e6c9861
JK		 1608
1609 E1000_WRITE_REG(hw, TCTL, tctl);
1610
1da177e4
LT		 1611}
1612
1613/**
1614 * e1000_setup_rx_resources - allocate Rx resources (Descriptors)
1615 * @adapter: board private structure
581d708e 1616 * @rxdr: rx descriptor ring (for a specific queue) to setup
1da177e4
LT		 1617 *
1618 * Returns 0 on success, negative on failure
1619 **/
1620
3ad2cc67 1621static int
581d708e
MC		 1622e1000_setup_rx_resources(struct e1000_adapter *adapter,
1623 struct e1000_rx_ring *rxdr)
1da177e4 1624{
1da177e4 1625 struct pci_dev *pdev = adapter->pdev;
2d7edb92 1626 int size, desc_len;
1da177e4
LT		 1627
1628 size = sizeof(struct e1000_buffer) * rxdr->count;
cd94dd0b 1629 rxdr->buffer_info = vmalloc(size);
581d708e 1630 if (!rxdr->buffer_info) {
2648345f
MC		 1631 DPRINTK(PROBE, ERR,
1632 "Unable to allocate memory for the receive descriptor ring\n");
1da177e4
LT		 1633 return -ENOMEM;
1634 }
1635 memset(rxdr->buffer_info, 0, size);
1636
2d7edb92
MC		 1637 size = sizeof(struct e1000_ps_page) * rxdr->count;
1638 rxdr->ps_page = kmalloc(size, GFP_KERNEL);
96838a40 1639 if (!rxdr->ps_page) {
2d7edb92
MC		 1640 vfree(rxdr->buffer_info);
1641 DPRINTK(PROBE, ERR,
1642 "Unable to allocate memory for the receive descriptor ring\n");
1643 return -ENOMEM;
1644 }
1645 memset(rxdr->ps_page, 0, size);
1646
1647 size = sizeof(struct e1000_ps_page_dma) * rxdr->count;
1648 rxdr->ps_page_dma = kmalloc(size, GFP_KERNEL);
96838a40 1649 if (!rxdr->ps_page_dma) {
2d7edb92
MC		 1650 vfree(rxdr->buffer_info);
1651 kfree(rxdr->ps_page);
1652 DPRINTK(PROBE, ERR,
1653 "Unable to allocate memory for the receive descriptor ring\n");
1654 return -ENOMEM;
1655 }
1656 memset(rxdr->ps_page_dma, 0, size);
1657
96838a40 1658 if (adapter->hw.mac_type <= e1000_82547_rev_2)
2d7edb92
MC		 1659 desc_len = sizeof(struct e1000_rx_desc);
1660 else
1661 desc_len = sizeof(union e1000_rx_desc_packet_split);
1662
1da177e4
LT		 1663 /* Round up to nearest 4K */
1664
2d7edb92 1665 rxdr->size = rxdr->count * desc_len;
1da177e4
LT		 1666 E1000_ROUNDUP(rxdr->size, 4096);
1667
1668 rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
1669
581d708e
MC		 1670 if (!rxdr->desc) {
1671 DPRINTK(PROBE, ERR,
1672 "Unable to allocate memory for the receive descriptor ring\n");
1da177e4 1673setup_rx_desc_die:
1da177e4 1674 vfree(rxdr->buffer_info);
2d7edb92
MC		 1675 kfree(rxdr->ps_page);
1676 kfree(rxdr->ps_page_dma);
1da177e4
LT		 1677 return -ENOMEM;
1678 }
1679
2648345f 1680 /* Fix for errata 23, can't cross 64kB boundary */
1da177e4
LT		 1681 if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
1682 void *olddesc = rxdr->desc;
1683 dma_addr_t olddma = rxdr->dma;
2648345f
MC		 1684 DPRINTK(RX_ERR, ERR, "rxdr align check failed: %u bytes "
1685 "at %p\n", rxdr->size, rxdr->desc);
1686 /* Try again, without freeing the previous */
1da177e4 1687 rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
2648345f 1688 /* Failed allocation, critical failure */
581d708e 1689 if (!rxdr->desc) {
1da177e4 1690 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
581d708e
MC		 1691 DPRINTK(PROBE, ERR,
1692 "Unable to allocate memory "
1693 "for the receive descriptor ring\n");
1da177e4
LT		 1694 goto setup_rx_desc_die;
1695 }
1696
1697 if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
1698 /* give up */
2648345f
MC		 1699 pci_free_consistent(pdev, rxdr->size, rxdr->desc,
1700 rxdr->dma);
1da177e4 1701 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
2648345f
MC		 1702 DPRINTK(PROBE, ERR,
1703 "Unable to allocate aligned memory "
1704 "for the receive descriptor ring\n");
581d708e 1705 goto setup_rx_desc_die;
1da177e4 1706 } else {
2648345f 1707 /* Free old allocation, new allocation was successful */
1da177e4
LT		 1708 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
1709 }
1710 }
1711 memset(rxdr->desc, 0, rxdr->size);
1712
1713 rxdr->next_to_clean = 0;
1714 rxdr->next_to_use = 0;
1715
1716 return 0;
1717}
1718
581d708e
MC		 1719/**
1720 * e1000_setup_all_rx_resources - wrapper to allocate Rx resources
1721 * (Descriptors) for all queues
1722 * @adapter: board private structure
1723 *
581d708e
MC		 1724 * Return 0 on success, negative on failure
1725 **/
1726
1727int
1728e1000_setup_all_rx_resources(struct e1000_adapter *adapter)
1729{
1730 int i, err = 0;
1731
f56799ea 1732 for (i = 0; i < adapter->num_rx_queues; i++) {
581d708e
MC		 1733 err = e1000_setup_rx_resources(adapter, &adapter->rx_ring[i]);
1734 if (err) {
1735 DPRINTK(PROBE, ERR,
1736 "Allocation for Rx Queue %u failed\n", i);
3fbbc72e
VA		 1737 for (i-- ; i >= 0; i--)
1738 e1000_free_rx_resources(adapter,
1739 &adapter->rx_ring[i]);
581d708e
MC		 1740 break;
1741 }
1742 }
1743
1744 return err;
1745}
1746
1da177e4 1747/**
2648345f 1748 * e1000_setup_rctl - configure the receive control registers
1da177e4
LT		 1749 * @adapter: Board private structure
1750 **/
e4c811c9
MC		 1751#define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \
1752 (((S) & (PAGE_SIZE - 1)) ? 1 : 0))
1da177e4
LT		 1753static void
1754e1000_setup_rctl(struct e1000_adapter *adapter)
1755{
2d7edb92
MC		 1756 uint32_t rctl, rfctl;
1757 uint32_t psrctl = 0;
35ec56bb 1758#ifndef CONFIG_E1000_DISABLE_PACKET_SPLIT
e4c811c9
MC		 1759 uint32_t pages = 0;
1760#endif
1da177e4
LT		 1761
1762 rctl = E1000_READ_REG(&adapter->hw, RCTL);
1763
1764 rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
1765
1766 rctl |= E1000_RCTL_EN | E1000_RCTL_BAM |
1767 E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
1768 (adapter->hw.mc_filter_type << E1000_RCTL_MO_SHIFT);
1769
0fadb059 1770 if (adapter->hw.tbi_compatibility_on == 1)
1da177e4
LT		 1771 rctl |= E1000_RCTL_SBP;
1772 else
1773 rctl &= ~E1000_RCTL_SBP;
1774
2d7edb92
MC		 1775 if (adapter->netdev->mtu <= ETH_DATA_LEN)
1776 rctl &= ~E1000_RCTL_LPE;
1777 else
1778 rctl |= E1000_RCTL_LPE;
1779
1da177e4 1780 /* Setup buffer sizes */
9e2feace
AK		 1781 rctl &= ~E1000_RCTL_SZ_4096;
1782 rctl |= E1000_RCTL_BSEX;
1783 switch (adapter->rx_buffer_len) {
1784 case E1000_RXBUFFER_256:
1785 rctl |= E1000_RCTL_SZ_256;
1786 rctl &= ~E1000_RCTL_BSEX;
1787 break;
1788 case E1000_RXBUFFER_512:
1789 rctl |= E1000_RCTL_SZ_512;
1790 rctl &= ~E1000_RCTL_BSEX;
1791 break;
1792 case E1000_RXBUFFER_1024:
1793 rctl |= E1000_RCTL_SZ_1024;
1794 rctl &= ~E1000_RCTL_BSEX;
1795 break;
a1415ee6
JK		 1796 case E1000_RXBUFFER_2048:
1797 default:
1798 rctl |= E1000_RCTL_SZ_2048;
1799 rctl &= ~E1000_RCTL_BSEX;
1800 break;
1801 case E1000_RXBUFFER_4096:
1802 rctl |= E1000_RCTL_SZ_4096;
1803 break;
1804 case E1000_RXBUFFER_8192:
1805 rctl |= E1000_RCTL_SZ_8192;
1806 break;
1807 case E1000_RXBUFFER_16384:
1808 rctl |= E1000_RCTL_SZ_16384;
1809 break;
2d7edb92
MC		 1810 }
1811
35ec56bb 1812#ifndef CONFIG_E1000_DISABLE_PACKET_SPLIT
2d7edb92
MC		 1813 /* 82571 and greater support packet-split where the protocol
1814 * header is placed in skb->data and the packet data is
1815 * placed in pages hanging off of skb_shinfo(skb)->nr_frags.
1816 * In the case of a non-split, skb->data is linearly filled,
1817 * followed by the page buffers. Therefore, skb->data is
1818 * sized to hold the largest protocol header.
1819 */
e64d7d02
JB		 1820 /* allocations using alloc_page take too long for regular MTU
1821 * so only enable packet split for jumbo frames */
e4c811c9 1822 pages = PAGE_USE_COUNT(adapter->netdev->mtu);
e64d7d02
JB		 1823 if ((adapter->hw.mac_type >= e1000_82571) && (pages <= 3) &&
1824 PAGE_SIZE <= 16384 && (rctl & E1000_RCTL_LPE))
e4c811c9
MC		 1825 adapter->rx_ps_pages = pages;
1826 else
1827 adapter->rx_ps_pages = 0;
2d7edb92 1828#endif
e4c811c9 1829 if (adapter->rx_ps_pages) {
2d7edb92
MC		 1830 /* Configure extra packet-split registers */
1831 rfctl = E1000_READ_REG(&adapter->hw, RFCTL);
1832 rfctl |= E1000_RFCTL_EXTEN;
87ca4e5b
AK		 1833 /* disable packet split support for IPv6 extension headers,
1834 * because some malformed IPv6 headers can hang the RX */
1835 rfctl |= (E1000_RFCTL_IPV6_EX_DIS |
1836 E1000_RFCTL_NEW_IPV6_EXT_DIS);
1837
2d7edb92
MC		 1838 E1000_WRITE_REG(&adapter->hw, RFCTL, rfctl);
1839
7dfee0cb 1840 rctl |= E1000_RCTL_DTYP_PS;
96838a40 1841
2d7edb92
MC		 1842 psrctl |= adapter->rx_ps_bsize0 >>
1843 E1000_PSRCTL_BSIZE0_SHIFT;
e4c811c9
MC		 1844
1845 switch (adapter->rx_ps_pages) {
1846 case 3:
1847 psrctl |= PAGE_SIZE <<
1848 E1000_PSRCTL_BSIZE3_SHIFT;
1849 case 2:
1850 psrctl |= PAGE_SIZE <<
1851 E1000_PSRCTL_BSIZE2_SHIFT;
1852 case 1:
1853 psrctl |= PAGE_SIZE >>
1854 E1000_PSRCTL_BSIZE1_SHIFT;
1855 break;
1856 }
2d7edb92
MC		 1857
1858 E1000_WRITE_REG(&adapter->hw, PSRCTL, psrctl);
1da177e4
LT		 1859 }
1860
1861 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
1862}
1863
1864/**
1865 * e1000_configure_rx - Configure 8254x Receive Unit after Reset
1866 * @adapter: board private structure
1867 *
1868 * Configure the Rx unit of the MAC after a reset.
1869 **/
1870
1871static void
1872e1000_configure_rx(struct e1000_adapter *adapter)
1873{
581d708e
MC		 1874 uint64_t rdba;
1875 struct e1000_hw *hw = &adapter->hw;
1876 uint32_t rdlen, rctl, rxcsum, ctrl_ext;
2d7edb92 1877
e4c811c9 1878 if (adapter->rx_ps_pages) {
0f15a8fa 1879 /* this is a 32 byte descriptor */
581d708e 1880 rdlen = adapter->rx_ring[0].count *
2d7edb92
MC		 1881 sizeof(union e1000_rx_desc_packet_split);
1882 adapter->clean_rx = e1000_clean_rx_irq_ps;
1883 adapter->alloc_rx_buf = e1000_alloc_rx_buffers_ps;
1884 } else {
581d708e
MC		 1885 rdlen = adapter->rx_ring[0].count *
1886 sizeof(struct e1000_rx_desc);
2d7edb92
MC		 1887 adapter->clean_rx = e1000_clean_rx_irq;
1888 adapter->alloc_rx_buf = e1000_alloc_rx_buffers;
1889 }
1da177e4
LT		 1890
1891 /* disable receives while setting up the descriptors */
581d708e
MC		 1892 rctl = E1000_READ_REG(hw, RCTL);
1893 E1000_WRITE_REG(hw, RCTL, rctl & ~E1000_RCTL_EN);
1da177e4
LT		 1894
1895 /* set the Receive Delay Timer Register */
581d708e 1896 E1000_WRITE_REG(hw, RDTR, adapter->rx_int_delay);
1da177e4 1897
581d708e
MC		 1898 if (hw->mac_type >= e1000_82540) {
1899 E1000_WRITE_REG(hw, RADV, adapter->rx_abs_int_delay);
835bb129 1900 if (adapter->itr_setting != 0)
581d708e 1901 E1000_WRITE_REG(hw, ITR,
1da177e4
LT		 1902 1000000000 / (adapter->itr * 256));
1903 }
1904
2ae76d98 1905 if (hw->mac_type >= e1000_82571) {
2ae76d98 1906 ctrl_ext = E1000_READ_REG(hw, CTRL_EXT);
1e613fd9 1907 /* Reset delay timers after every interrupt */
6fc7a7ec 1908 ctrl_ext |= E1000_CTRL_EXT_INT_TIMER_CLR;
1e613fd9 1909#ifdef CONFIG_E1000_NAPI
835bb129 1910 /* Auto-Mask interrupts upon ICR access */
1e613fd9 1911 ctrl_ext |= E1000_CTRL_EXT_IAME;
835bb129 1912 E1000_WRITE_REG(hw, IAM, 0xffffffff);
1e613fd9 1913#endif
2ae76d98
MC		 1914 E1000_WRITE_REG(hw, CTRL_EXT, ctrl_ext);
1915 E1000_WRITE_FLUSH(hw);
1916 }
1917
581d708e
MC		 1918 /* Setup the HW Rx Head and Tail Descriptor Pointers and
1919 * the Base and Length of the Rx Descriptor Ring */
f56799ea 1920 switch (adapter->num_rx_queues) {
24025e4e
MC		 1921 case 1:
1922 default:
581d708e 1923 rdba = adapter->rx_ring[0].dma;
581d708e 1924 E1000_WRITE_REG(hw, RDLEN, rdlen);
4ca213a6
AK		 1925 E1000_WRITE_REG(hw, RDBAH, (rdba >> 32));
1926 E1000_WRITE_REG(hw, RDBAL, (rdba & 0x00000000ffffffffULL));
581d708e 1927 E1000_WRITE_REG(hw, RDT, 0);
4ca213a6 1928 E1000_WRITE_REG(hw, RDH, 0);
6a951698
AK		 1929 adapter->rx_ring[0].rdh = ((hw->mac_type >= e1000_82543) ? E1000_RDH : E1000_82542_RDH);
1930 adapter->rx_ring[0].rdt = ((hw->mac_type >= e1000_82543) ? E1000_RDT : E1000_82542_RDT);
581d708e 1931 break;
24025e4e
MC		 1932 }
1933
1da177e4 1934 /* Enable 82543 Receive Checksum Offload for TCP and UDP */
581d708e
MC		 1935 if (hw->mac_type >= e1000_82543) {
1936 rxcsum = E1000_READ_REG(hw, RXCSUM);
96838a40 1937 if (adapter->rx_csum == TRUE) {
2d7edb92
MC		 1938 rxcsum |= E1000_RXCSUM_TUOFL;
1939
868d5309 1940 /* Enable 82571 IPv4 payload checksum for UDP fragments
2d7edb92 1941 * Must be used in conjunction with packet-split. */
96838a40
JB		 1942 if ((hw->mac_type >= e1000_82571) &&
1943 (adapter->rx_ps_pages)) {
2d7edb92
MC		 1944 rxcsum |= E1000_RXCSUM_IPPCSE;
1945 }
1946 } else {
1947 rxcsum &= ~E1000_RXCSUM_TUOFL;
1948 /* don't need to clear IPPCSE as it defaults to 0 */
1949 }
581d708e 1950 E1000_WRITE_REG(hw, RXCSUM, rxcsum);
1da177e4
LT		 1951 }
1952
21c4d5e0
AK		 1953 /* enable early receives on 82573, only takes effect if using > 2048
1954 * byte total frame size. for example only for jumbo frames */
1955#define E1000_ERT_2048 0x100
1956 if (hw->mac_type == e1000_82573)
1957 E1000_WRITE_REG(hw, ERT, E1000_ERT_2048);
1958
1da177e4 1959 /* Enable Receives */
581d708e 1960 E1000_WRITE_REG(hw, RCTL, rctl);
1da177e4
LT		 1961}
1962
1963/**
581d708e 1964 * e1000_free_tx_resources - Free Tx Resources per Queue
1da177e4 1965 * @adapter: board private structure
581d708e 1966 * @tx_ring: Tx descriptor ring for a specific queue
1da177e4
LT		 1967 *
1968 * Free all transmit software resources
1969 **/
1970
3ad2cc67 1971static void
581d708e
MC		 1972e1000_free_tx_resources(struct e1000_adapter *adapter,
1973 struct e1000_tx_ring *tx_ring)
1da177e4
LT		 1974{
1975 struct pci_dev *pdev = adapter->pdev;
1976
581d708e 1977 e1000_clean_tx_ring(adapter, tx_ring);
1da177e4 1978
581d708e
MC		 1979 vfree(tx_ring->buffer_info);
1980 tx_ring->buffer_info = NULL;
1da177e4 1981
581d708e 1982 pci_free_consistent(pdev, tx_ring->size, tx_ring->desc, tx_ring->dma);
1da177e4 1983
581d708e
MC		 1984 tx_ring->desc = NULL;
1985}
1986
1987/**
1988 * e1000_free_all_tx_resources - Free Tx Resources for All Queues
1989 * @adapter: board private structure
1990 *
1991 * Free all transmit software resources
1992 **/
1993
1994void
1995e1000_free_all_tx_resources(struct e1000_adapter *adapter)
1996{
1997 int i;
1998
f56799ea 1999 for (i = 0; i < adapter->num_tx_queues; i++)
581d708e 2000 e1000_free_tx_resources(adapter, &adapter->tx_ring[i]);
1da177e4
LT		 2001}
2002
e619d523 2003static void
1da177e4
LT		 2004e1000_unmap_and_free_tx_resource(struct e1000_adapter *adapter,
2005 struct e1000_buffer *buffer_info)
2006{
96838a40 2007 if (buffer_info->dma) {
2648345f
MC		 2008 pci_unmap_page(adapter->pdev,
2009 buffer_info->dma,
2010 buffer_info->length,
2011 PCI_DMA_TODEVICE);
a9ebadd6 2012 buffer_info->dma = 0;
1da177e4 2013 }
a9ebadd6 2014 if (buffer_info->skb) {
1da177e4 2015 dev_kfree_skb_any(buffer_info->skb);
a9ebadd6
JB		 2016 buffer_info->skb = NULL;
2017 }
2018 /* buffer_info must be completely set up in the transmit path */
1da177e4
LT		 2019}
2020
2021/**
2022 * e1000_clean_tx_ring - Free Tx Buffers
2023 * @adapter: board private structure
581d708e 2024 * @tx_ring: ring to be cleaned
1da177e4
LT		 2025 **/
2026
2027static void
581d708e
MC		 2028e1000_clean_tx_ring(struct e1000_adapter *adapter,
2029 struct e1000_tx_ring *tx_ring)
1da177e4 2030{
1da177e4
LT		 2031 struct e1000_buffer *buffer_info;
2032 unsigned long size;
2033 unsigned int i;
2034
2035 /* Free all the Tx ring sk_buffs */
2036
96838a40 2037 for (i = 0; i < tx_ring->count; i++) {
1da177e4
LT		 2038 buffer_info = &tx_ring->buffer_info[i];
2039 e1000_unmap_and_free_tx_resource(adapter, buffer_info);
2040 }
2041
2042 size = sizeof(struct e1000_buffer) * tx_ring->count;
2043 memset(tx_ring->buffer_info, 0, size);
2044
2045 /* Zero out the descriptor ring */
2046
2047 memset(tx_ring->desc, 0, tx_ring->size);
2048
2049 tx_ring->next_to_use = 0;
2050 tx_ring->next_to_clean = 0;
fd803241 2051 tx_ring->last_tx_tso = 0;
1da177e4 2052
581d708e
MC		 2053 writel(0, adapter->hw.hw_addr + tx_ring->tdh);
2054 writel(0, adapter->hw.hw_addr + tx_ring->tdt);
2055}
2056
2057/**
2058 * e1000_clean_all_tx_rings - Free Tx Buffers for all queues
2059 * @adapter: board private structure
2060 **/
2061
2062static void
2063e1000_clean_all_tx_rings(struct e1000_adapter *adapter)
2064{
2065 int i;
2066
f56799ea 2067 for (i = 0; i < adapter->num_tx_queues; i++)
581d708e 2068 e1000_clean_tx_ring(adapter, &adapter->tx_ring[i]);
1da177e4
LT		 2069}
2070
2071/**
2072 * e1000_free_rx_resources - Free Rx Resources
2073 * @adapter: board private structure
581d708e 2074 * @rx_ring: ring to clean the resources from
1da177e4
LT		 2075 *
2076 * Free all receive software resources
2077 **/
2078
3ad2cc67 2079static void
581d708e
MC		 2080e1000_free_rx_resources(struct e1000_adapter *adapter,
2081 struct e1000_rx_ring *rx_ring)
1da177e4 2082{
1da177e4
LT		 2083 struct pci_dev *pdev = adapter->pdev;
2084
581d708e 2085 e1000_clean_rx_ring(adapter, rx_ring);
1da177e4
LT		 2086
2087 vfree(rx_ring->buffer_info);
2088 rx_ring->buffer_info = NULL;
2d7edb92
MC		 2089 kfree(rx_ring->ps_page);
2090 rx_ring->ps_page = NULL;
2091 kfree(rx_ring->ps_page_dma);
2092 rx_ring->ps_page_dma = NULL;
1da177e4
LT		 2093
2094 pci_free_consistent(pdev, rx_ring->size, rx_ring->desc, rx_ring->dma);
2095
2096 rx_ring->desc = NULL;
2097}
2098
2099/**
581d708e 2100 * e1000_free_all_rx_resources - Free Rx Resources for All Queues
1da177e4 2101 * @adapter: board private structure
581d708e
MC		 2102 *
2103 * Free all receive software resources
2104 **/
2105
2106void
2107e1000_free_all_rx_resources(struct e1000_adapter *adapter)
2108{
2109 int i;
2110
f56799ea 2111 for (i = 0; i < adapter->num_rx_queues; i++)
581d708e
MC		 2112 e1000_free_rx_resources(adapter, &adapter->rx_ring[i]);
2113}
2114
2115/**
2116 * e1000_clean_rx_ring - Free Rx Buffers per Queue
2117 * @adapter: board private structure
2118 * @rx_ring: ring to free buffers from
1da177e4
LT		 2119 **/
2120
2121static void
581d708e
MC		 2122e1000_clean_rx_ring(struct e1000_adapter *adapter,
2123 struct e1000_rx_ring *rx_ring)
1da177e4 2124{
1da177e4 2125 struct e1000_buffer *buffer_info;
2d7edb92
MC		 2126 struct e1000_ps_page *ps_page;
2127 struct e1000_ps_page_dma *ps_page_dma;
1da177e4
LT		 2128 struct pci_dev *pdev = adapter->pdev;
2129 unsigned long size;
2d7edb92 2130 unsigned int i, j;
1da177e4
LT		 2131
2132 /* Free all the Rx ring sk_buffs */
96838a40 2133 for (i = 0; i < rx_ring->count; i++) {
1da177e4 2134 buffer_info = &rx_ring->buffer_info[i];
96838a40 2135 if (buffer_info->skb) {
1da177e4
LT		 2136 pci_unmap_single(pdev,
2137 buffer_info->dma,
2138 buffer_info->length,
2139 PCI_DMA_FROMDEVICE);
2140
2141 dev_kfree_skb(buffer_info->skb);
2142 buffer_info->skb = NULL;
997f5cbd
JK		 2143 }
2144 ps_page = &rx_ring->ps_page[i];
2145 ps_page_dma = &rx_ring->ps_page_dma[i];
2146 for (j = 0; j < adapter->rx_ps_pages; j++) {
2147 if (!ps_page->ps_page[j]) break;
2148 pci_unmap_page(pdev,
2149 ps_page_dma->ps_page_dma[j],
2150 PAGE_SIZE, PCI_DMA_FROMDEVICE);
2151 ps_page_dma->ps_page_dma[j] = 0;
2152 put_page(ps_page->ps_page[j]);
2153 ps_page->ps_page[j] = NULL;
1da177e4
LT		 2154 }
2155 }
2156
2157 size = sizeof(struct e1000_buffer) * rx_ring->count;
2158 memset(rx_ring->buffer_info, 0, size);
2d7edb92
MC		 2159 size = sizeof(struct e1000_ps_page) * rx_ring->count;
2160 memset(rx_ring->ps_page, 0, size);
2161 size = sizeof(struct e1000_ps_page_dma) * rx_ring->count;
2162 memset(rx_ring->ps_page_dma, 0, size);
1da177e4
LT		 2163
2164 /* Zero out the descriptor ring */
2165
2166 memset(rx_ring->desc, 0, rx_ring->size);
2167
2168 rx_ring->next_to_clean = 0;
2169 rx_ring->next_to_use = 0;
2170
581d708e
MC		 2171 writel(0, adapter->hw.hw_addr + rx_ring->rdh);
2172 writel(0, adapter->hw.hw_addr + rx_ring->rdt);
2173}
2174
2175/**
2176 * e1000_clean_all_rx_rings - Free Rx Buffers for all queues
2177 * @adapter: board private structure
2178 **/
2179
2180static void
2181e1000_clean_all_rx_rings(struct e1000_adapter *adapter)
2182{
2183 int i;
2184
f56799ea 2185 for (i = 0; i < adapter->num_rx_queues; i++)
581d708e 2186 e1000_clean_rx_ring(adapter, &adapter->rx_ring[i]);
1da177e4
LT		 2187}
2188
2189/* The 82542 2.0 (revision 2) needs to have the receive unit in reset
2190 * and memory write and invalidate disabled for certain operations
2191 */
2192static void
2193e1000_enter_82542_rst(struct e1000_adapter *adapter)
2194{
2195 struct net_device *netdev = adapter->netdev;
2196 uint32_t rctl;
2197
2198 e1000_pci_clear_mwi(&adapter->hw);
2199
2200 rctl = E1000_READ_REG(&adapter->hw, RCTL);
2201 rctl |= E1000_RCTL_RST;
2202 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
2203 E1000_WRITE_FLUSH(&adapter->hw);
2204 mdelay(5);
2205
96838a40 2206 if (netif_running(netdev))
581d708e 2207 e1000_clean_all_rx_rings(adapter);
1da177e4
LT		 2208}
2209
2210static void
2211e1000_leave_82542_rst(struct e1000_adapter *adapter)
2212{
2213 struct net_device *netdev = adapter->netdev;
2214 uint32_t rctl;
2215
2216 rctl = E1000_READ_REG(&adapter->hw, RCTL);
2217 rctl &= ~E1000_RCTL_RST;
2218 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
2219 E1000_WRITE_FLUSH(&adapter->hw);
2220 mdelay(5);
2221
96838a40 2222 if (adapter->hw.pci_cmd_word & PCI_COMMAND_INVALIDATE)
1da177e4
LT		 2223 e1000_pci_set_mwi(&adapter->hw);
2224
96838a40 2225 if (netif_running(netdev)) {
72d64a43
JK		 2226 /* No need to loop, because 82542 supports only 1 queue */
2227 struct e1000_rx_ring *ring = &adapter->rx_ring[0];
7c4d3367 2228 e1000_configure_rx(adapter);
72d64a43 2229 adapter->alloc_rx_buf(adapter, ring, E1000_DESC_UNUSED(ring));
1da177e4
LT		 2230 }
2231}
2232
2233/**
2234 * e1000_set_mac - Change the Ethernet Address of the NIC
2235 * @netdev: network interface device structure
2236 * @p: pointer to an address structure
2237 *
2238 * Returns 0 on success, negative on failure
2239 **/
2240
2241static int
2242e1000_set_mac(struct net_device *netdev, void *p)
2243{
60490fe0 2244 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 2245 struct sockaddr *addr = p;
2246
96838a40 2247 if (!is_valid_ether_addr(addr->sa_data))
1da177e4
LT		 2248 return -EADDRNOTAVAIL;
2249
2250 /* 82542 2.0 needs to be in reset to write receive address registers */
2251
96838a40 2252 if (adapter->hw.mac_type == e1000_82542_rev2_0)
1da177e4
LT		 2253 e1000_enter_82542_rst(adapter);
2254
2255 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
2256 memcpy(adapter->hw.mac_addr, addr->sa_data, netdev->addr_len);
2257
2258 e1000_rar_set(&adapter->hw, adapter->hw.mac_addr, 0);
2259
868d5309
MC		 2260 /* With 82571 controllers, LAA may be overwritten (with the default)
2261 * due to controller reset from the other port. */
2262 if (adapter->hw.mac_type == e1000_82571) {
2263 /* activate the work around */
2264 adapter->hw.laa_is_present = 1;
2265
96838a40
JB		 2266 /* Hold a copy of the LAA in RAR[14] This is done so that
2267 * between the time RAR[0] gets clobbered and the time it
2268 * gets fixed (in e1000_watchdog), the actual LAA is in one
868d5309 2269 * of the RARs and no incoming packets directed to this port
96838a40 2270 * are dropped. Eventaully the LAA will be in RAR[0] and
868d5309 2271 * RAR[14] */
96838a40 2272 e1000_rar_set(&adapter->hw, adapter->hw.mac_addr,
868d5309
MC		 2273 E1000_RAR_ENTRIES - 1);
2274 }
2275
96838a40 2276 if (adapter->hw.mac_type == e1000_82542_rev2_0)
1da177e4
LT		 2277 e1000_leave_82542_rst(adapter);
2278
2279 return 0;
2280}
2281
2282/**
2283 * e1000_set_multi - Multicast and Promiscuous mode set
2284 * @netdev: network interface device structure
2285 *
2286 * The set_multi entry point is called whenever the multicast address
2287 * list or the network interface flags are updated. This routine is
2288 * responsible for configuring the hardware for proper multicast,
2289 * promiscuous mode, and all-multi behavior.
2290 **/
2291
2292static void
2293e1000_set_multi(struct net_device *netdev)
2294{
60490fe0 2295 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 2296 struct e1000_hw *hw = &adapter->hw;
2297 struct dev_mc_list *mc_ptr;
2298 uint32_t rctl;
2299 uint32_t hash_value;
868d5309 2300 int i, rar_entries = E1000_RAR_ENTRIES;
cd94dd0b
AK		 2301 int mta_reg_count = (hw->mac_type == e1000_ich8lan) ?
2302 E1000_NUM_MTA_REGISTERS_ICH8LAN :
2303 E1000_NUM_MTA_REGISTERS;
2304
2305 if (adapter->hw.mac_type == e1000_ich8lan)
2306 rar_entries = E1000_RAR_ENTRIES_ICH8LAN;
1da177e4 2307
868d5309
MC		 2308 /* reserve RAR[14] for LAA over-write work-around */
2309 if (adapter->hw.mac_type == e1000_82571)
2310 rar_entries--;
1da177e4 2311
2648345f
MC		 2312 /* Check for Promiscuous and All Multicast modes */
2313
1da177e4
LT		 2314 rctl = E1000_READ_REG(hw, RCTL);
2315
96838a40 2316 if (netdev->flags & IFF_PROMISC) {
1da177e4 2317 rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
96838a40 2318 } else if (netdev->flags & IFF_ALLMULTI) {
1da177e4
LT		 2319 rctl |= E1000_RCTL_MPE;
2320 rctl &= ~E1000_RCTL_UPE;
2321 } else {
2322 rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE);
2323 }
2324
2325 E1000_WRITE_REG(hw, RCTL, rctl);
2326
2327 /* 82542 2.0 needs to be in reset to write receive address registers */
2328
96838a40 2329 if (hw->mac_type == e1000_82542_rev2_0)
1da177e4
LT		 2330 e1000_enter_82542_rst(adapter);
2331
2332 /* load the first 14 multicast address into the exact filters 1-14
2333 * RAR 0 is used for the station MAC adddress
2334 * if there are not 14 addresses, go ahead and clear the filters
868d5309 2335 * -- with 82571 controllers only 0-13 entries are filled here
1da177e4
LT		 2336 */
2337 mc_ptr = netdev->mc_list;
2338
96838a40 2339 for (i = 1; i < rar_entries; i++) {
868d5309 2340 if (mc_ptr) {
1da177e4
LT		 2341 e1000_rar_set(hw, mc_ptr->dmi_addr, i);
2342 mc_ptr = mc_ptr->next;
2343 } else {
2344 E1000_WRITE_REG_ARRAY(hw, RA, i << 1, 0);
4ca213a6 2345 E1000_WRITE_FLUSH(hw);
1da177e4 2346 E1000_WRITE_REG_ARRAY(hw, RA, (i << 1) + 1, 0);
4ca213a6 2347 E1000_WRITE_FLUSH(hw);
1da177e4
LT		 2348 }
2349 }
2350
2351 /* clear the old settings from the multicast hash table */
2352
cd94dd0b 2353 for (i = 0; i < mta_reg_count; i++) {
1da177e4 2354 E1000_WRITE_REG_ARRAY(hw, MTA, i, 0);
4ca213a6
AK		 2355 E1000_WRITE_FLUSH(hw);
2356 }
1da177e4
LT		 2357
2358 /* load any remaining addresses into the hash table */
2359
96838a40 2360 for (; mc_ptr; mc_ptr = mc_ptr->next) {
1da177e4
LT		 2361 hash_value = e1000_hash_mc_addr(hw, mc_ptr->dmi_addr);
2362 e1000_mta_set(hw, hash_value);
2363 }
2364
96838a40 2365 if (hw->mac_type == e1000_82542_rev2_0)
1da177e4 2366 e1000_leave_82542_rst(adapter);
1da177e4
LT		 2367}
2368
2369/* Need to wait a few seconds after link up to get diagnostic information from
2370 * the phy */
2371
2372static void
2373e1000_update_phy_info(unsigned long data)
2374{
2375 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
2376 e1000_phy_get_info(&adapter->hw, &adapter->phy_info);
2377}
2378
2379/**
2380 * e1000_82547_tx_fifo_stall - Timer Call-back
2381 * @data: pointer to adapter cast into an unsigned long
2382 **/
2383
2384static void
2385e1000_82547_tx_fifo_stall(unsigned long data)
2386{
2387 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
2388 struct net_device *netdev = adapter->netdev;
2389 uint32_t tctl;
2390
96838a40
JB		 2391 if (atomic_read(&adapter->tx_fifo_stall)) {
2392 if ((E1000_READ_REG(&adapter->hw, TDT) ==
1da177e4
LT		 2393 E1000_READ_REG(&adapter->hw, TDH)) &&
2394 (E1000_READ_REG(&adapter->hw, TDFT) ==
2395 E1000_READ_REG(&adapter->hw, TDFH)) &&
2396 (E1000_READ_REG(&adapter->hw, TDFTS) ==
2397 E1000_READ_REG(&adapter->hw, TDFHS))) {
2398 tctl = E1000_READ_REG(&adapter->hw, TCTL);
2399 E1000_WRITE_REG(&adapter->hw, TCTL,
2400 tctl & ~E1000_TCTL_EN);
2401 E1000_WRITE_REG(&adapter->hw, TDFT,
2402 adapter->tx_head_addr);
2403 E1000_WRITE_REG(&adapter->hw, TDFH,
2404 adapter->tx_head_addr);
2405 E1000_WRITE_REG(&adapter->hw, TDFTS,
2406 adapter->tx_head_addr);
2407 E1000_WRITE_REG(&adapter->hw, TDFHS,
2408 adapter->tx_head_addr);
2409 E1000_WRITE_REG(&adapter->hw, TCTL, tctl);
2410 E1000_WRITE_FLUSH(&adapter->hw);
2411
2412 adapter->tx_fifo_head = 0;
2413 atomic_set(&adapter->tx_fifo_stall, 0);
2414 netif_wake_queue(netdev);
2415 } else {
2416 mod_timer(&adapter->tx_fifo_stall_timer, jiffies + 1);
2417 }
2418 }
2419}
2420
2421/**
2422 * e1000_watchdog - Timer Call-back
2423 * @data: pointer to adapter cast into an unsigned long
2424 **/
2425static void
2426e1000_watchdog(unsigned long data)
2427{
2428 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
1da177e4 2429 struct net_device *netdev = adapter->netdev;
545c67c0 2430 struct e1000_tx_ring *txdr = adapter->tx_ring;
7e6c9861 2431 uint32_t link, tctl;
cd94dd0b
AK		 2432 int32_t ret_val;
2433
2434 ret_val = e1000_check_for_link(&adapter->hw);
2435 if ((ret_val == E1000_ERR_PHY) &&
2436 (adapter->hw.phy_type == e1000_phy_igp_3) &&
2437 (E1000_READ_REG(&adapter->hw, CTRL) & E1000_PHY_CTRL_GBE_DISABLE)) {
2438 /* See e1000_kumeran_lock_loss_workaround() */
2439 DPRINTK(LINK, INFO,
2440 "Gigabit has been disabled, downgrading speed\n");
2441 }
90fb5135 2442
2d7edb92
MC		 2443 if (adapter->hw.mac_type == e1000_82573) {
2444 e1000_enable_tx_pkt_filtering(&adapter->hw);
96838a40 2445 if (adapter->mng_vlan_id != adapter->hw.mng_cookie.vlan_id)
2d7edb92 2446 e1000_update_mng_vlan(adapter);
96838a40 2447 }
1da177e4 2448
96838a40 2449 if ((adapter->hw.media_type == e1000_media_type_internal_serdes) &&
1da177e4
LT		 2450 !(E1000_READ_REG(&adapter->hw, TXCW) & E1000_TXCW_ANE))
2451 link = !adapter->hw.serdes_link_down;
2452 else
2453 link = E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_LU;
2454
96838a40
JB		 2455 if (link) {
2456 if (!netif_carrier_ok(netdev)) {
fe7fe28e 2457 boolean_t txb2b = 1;
1da177e4
LT		 2458 e1000_get_speed_and_duplex(&adapter->hw,
2459 &adapter->link_speed,
2460 &adapter->link_duplex);
2461
2462 DPRINTK(LINK, INFO, "NIC Link is Up %d Mbps %s\n",
2463 adapter->link_speed,
2464 adapter->link_duplex == FULL_DUPLEX ?
2465 "Full Duplex" : "Half Duplex");
2466
7e6c9861
JK		 2467 /* tweak tx_queue_len according to speed/duplex
2468 * and adjust the timeout factor */
66a2b0a3
JK		 2469 netdev->tx_queue_len = adapter->tx_queue_len;
2470 adapter->tx_timeout_factor = 1;
7e6c9861
JK		 2471 switch (adapter->link_speed) {
2472 case SPEED_10:
fe7fe28e 2473 txb2b = 0;
7e6c9861
JK		 2474 netdev->tx_queue_len = 10;
2475 adapter->tx_timeout_factor = 8;
2476 break;
2477 case SPEED_100:
fe7fe28e 2478 txb2b = 0;
7e6c9861
JK		 2479 netdev->tx_queue_len = 100;
2480 /* maybe add some timeout factor ? */
2481 break;
2482 }
2483
fe7fe28e 2484 if ((adapter->hw.mac_type == e1000_82571 ||
7e6c9861 2485 adapter->hw.mac_type == e1000_82572) &&
fe7fe28e 2486 txb2b == 0) {
7e6c9861
JK		 2487 uint32_t tarc0;
2488 tarc0 = E1000_READ_REG(&adapter->hw, TARC0);
90fb5135 2489 tarc0 &= ~(1 << 21);
7e6c9861
JK		 2490 E1000_WRITE_REG(&adapter->hw, TARC0, tarc0);
2491 }
90fb5135 2492
7e6c9861
JK		 2493#ifdef NETIF_F_TSO
2494 /* disable TSO for pcie and 10/100 speeds, to avoid
2495 * some hardware issues */
2496 if (!adapter->tso_force &&
2497 adapter->hw.bus_type == e1000_bus_type_pci_express){
66a2b0a3
JK		 2498 switch (adapter->link_speed) {
2499 case SPEED_10:
66a2b0a3 2500 case SPEED_100:
7e6c9861
JK		 2501 DPRINTK(PROBE,INFO,
2502 "10/100 speed: disabling TSO\n");
2503 netdev->features &= ~NETIF_F_TSO;
87ca4e5b
AK		 2504#ifdef NETIF_F_TSO6
2505 netdev->features &= ~NETIF_F_TSO6;
2506#endif
7e6c9861
JK		 2507 break;
2508 case SPEED_1000:
2509 netdev->features |= NETIF_F_TSO;
87ca4e5b
AK		 2510#ifdef NETIF_F_TSO6
2511 netdev->features |= NETIF_F_TSO6;
2512#endif
7e6c9861
JK		 2513 break;
2514 default:
2515 /* oops */
66a2b0a3
JK		 2516 break;
2517 }
2518 }
7e6c9861
JK		 2519#endif
2520
2521 /* enable transmits in the hardware, need to do this
2522 * after setting TARC0 */
2523 tctl = E1000_READ_REG(&adapter->hw, TCTL);
2524 tctl |= E1000_TCTL_EN;
2525 E1000_WRITE_REG(&adapter->hw, TCTL, tctl);
66a2b0a3 2526
1da177e4
LT		 2527 netif_carrier_on(netdev);
2528 netif_wake_queue(netdev);
2529 mod_timer(&adapter->phy_info_timer, jiffies + 2 * HZ);
2530 adapter->smartspeed = 0;
2531 }
2532 } else {
96838a40 2533 if (netif_carrier_ok(netdev)) {
1da177e4
LT		 2534 adapter->link_speed = 0;
2535 adapter->link_duplex = 0;
2536 DPRINTK(LINK, INFO, "NIC Link is Down\n");
2537 netif_carrier_off(netdev);
2538 netif_stop_queue(netdev);
2539 mod_timer(&adapter->phy_info_timer, jiffies + 2 * HZ);
87041639
JK		 2540
2541 /* 80003ES2LAN workaround--
2542 * For packet buffer work-around on link down event;
2543 * disable receives in the ISR and
2544 * reset device here in the watchdog
2545 */
8fc897b0 2546 if (adapter->hw.mac_type == e1000_80003es2lan)
87041639
JK		 2547 /* reset device */
2548 schedule_work(&adapter->reset_task);
1da177e4
LT		 2549 }
2550
2551 e1000_smartspeed(adapter);
2552 }
2553
2554 e1000_update_stats(adapter);
2555
2556 adapter->hw.tx_packet_delta = adapter->stats.tpt - adapter->tpt_old;
2557 adapter->tpt_old = adapter->stats.tpt;
2558 adapter->hw.collision_delta = adapter->stats.colc - adapter->colc_old;
2559 adapter->colc_old = adapter->stats.colc;
2560
2561 adapter->gorcl = adapter->stats.gorcl - adapter->gorcl_old;
2562 adapter->gorcl_old = adapter->stats.gorcl;
2563 adapter->gotcl = adapter->stats.gotcl - adapter->gotcl_old;
2564 adapter->gotcl_old = adapter->stats.gotcl;
2565
2566 e1000_update_adaptive(&adapter->hw);
2567
f56799ea 2568 if (!netif_carrier_ok(netdev)) {
581d708e 2569 if (E1000_DESC_UNUSED(txdr) + 1 < txdr->count) {
1da177e4
LT		 2570 /* We've lost link, so the controller stops DMA,
2571 * but we've got queued Tx work that's never going
2572 * to get done, so reset controller to flush Tx.
2573 * (Do the reset outside of interrupt context). */
87041639
JK		 2574 adapter->tx_timeout_count++;
2575 schedule_work(&adapter->reset_task);
1da177e4
LT		 2576 }
2577 }
2578
1da177e4
LT		 2579 /* Cause software interrupt to ensure rx ring is cleaned */
2580 E1000_WRITE_REG(&adapter->hw, ICS, E1000_ICS_RXDMT0);
2581
2648345f 2582 /* Force detection of hung controller every watchdog period */
1da177e4
LT		 2583 adapter->detect_tx_hung = TRUE;
2584
96838a40 2585 /* With 82571 controllers, LAA may be overwritten due to controller
868d5309
MC		 2586 * reset from the other port. Set the appropriate LAA in RAR[0] */
2587 if (adapter->hw.mac_type == e1000_82571 && adapter->hw.laa_is_present)
2588 e1000_rar_set(&adapter->hw, adapter->hw.mac_addr, 0);
2589
1da177e4
LT		 2590 /* Reset the timer */
2591 mod_timer(&adapter->watchdog_timer, jiffies + 2 * HZ);
2592}
2593
835bb129
JB		 2594enum latency_range {
2595 lowest_latency = 0,
2596 low_latency = 1,
2597 bulk_latency = 2,
2598 latency_invalid = 255
2599};
2600
2601/**
2602 * e1000_update_itr - update the dynamic ITR value based on statistics
2603 * Stores a new ITR value based on packets and byte
2604 * counts during the last interrupt. The advantage of per interrupt
2605 * computation is faster updates and more accurate ITR for the current
2606 * traffic pattern. Constants in this function were computed
2607 * based on theoretical maximum wire speed and thresholds were set based
2608 * on testing data as well as attempting to minimize response time
2609 * while increasing bulk throughput.
2610 * this functionality is controlled by the InterruptThrottleRate module
2611 * parameter (see e1000_param.c)
2612 * @adapter: pointer to adapter
2613 * @itr_setting: current adapter->itr
2614 * @packets: the number of packets during this measurement interval
2615 * @bytes: the number of bytes during this measurement interval
2616 **/
2617static unsigned int e1000_update_itr(struct e1000_adapter *adapter,
2618 uint16_t itr_setting,
2619 int packets,
2620 int bytes)
2621{
2622 unsigned int retval = itr_setting;
2623 struct e1000_hw *hw = &adapter->hw;
2624
2625 if (unlikely(hw->mac_type < e1000_82540))
2626 goto update_itr_done;
2627
2628 if (packets == 0)
2629 goto update_itr_done;
2630
2631
2632 switch (itr_setting) {
2633 case lowest_latency:
2634 if ((packets < 5) && (bytes > 512))
2635 retval = low_latency;
2636 break;
2637 case low_latency: /* 50 usec aka 20000 ints/s */
2638 if (bytes > 10000) {
2639 if ((packets < 10) ||
2640 ((bytes/packets) > 1200))
2641 retval = bulk_latency;
2642 else if ((packets > 35))
2643 retval = lowest_latency;
2644 } else if (packets <= 2 && bytes < 512)
2645 retval = lowest_latency;
2646 break;
2647 case bulk_latency: /* 250 usec aka 4000 ints/s */
2648 if (bytes > 25000) {
2649 if (packets > 35)
2650 retval = low_latency;
2651 } else {
2652 if (bytes < 6000)
2653 retval = low_latency;
2654 }
2655 break;
2656 }
2657
2658update_itr_done:
2659 return retval;
2660}
2661
2662static void e1000_set_itr(struct e1000_adapter *adapter)
2663{
2664 struct e1000_hw *hw = &adapter->hw;
2665 uint16_t current_itr;
2666 uint32_t new_itr = adapter->itr;
2667
2668 if (unlikely(hw->mac_type < e1000_82540))
2669 return;
2670
2671 /* for non-gigabit speeds, just fix the interrupt rate at 4000 */
2672 if (unlikely(adapter->link_speed != SPEED_1000)) {
2673 current_itr = 0;
2674 new_itr = 4000;
2675 goto set_itr_now;
2676 }
2677
2678 adapter->tx_itr = e1000_update_itr(adapter,
2679 adapter->tx_itr,
2680 adapter->total_tx_packets,
2681 adapter->total_tx_bytes);
2682 adapter->rx_itr = e1000_update_itr(adapter,
2683 adapter->rx_itr,
2684 adapter->total_rx_packets,
2685 adapter->total_rx_bytes);
2686
2687 current_itr = max(adapter->rx_itr, adapter->tx_itr);
2688
2689 /* conservative mode eliminates the lowest_latency setting */
2690 if (current_itr == lowest_latency && (adapter->itr_setting == 3))
2691 current_itr = low_latency;
2692
2693 switch (current_itr) {
2694 /* counts and packets in update_itr are dependent on these numbers */
2695 case lowest_latency:
2696 new_itr = 70000;
2697 break;
2698 case low_latency:
2699 new_itr = 20000; /* aka hwitr = ~200 */
2700 break;
2701 case bulk_latency:
2702 new_itr = 4000;
2703 break;
2704 default:
2705 break;
2706 }
2707
2708set_itr_now:
2709 if (new_itr != adapter->itr) {
2710 /* this attempts to bias the interrupt rate towards Bulk
2711 * by adding intermediate steps when interrupt rate is
2712 * increasing */
2713 new_itr = new_itr > adapter->itr ?
2714 min(adapter->itr + (new_itr >> 2), new_itr) :
2715 new_itr;
2716 adapter->itr = new_itr;
2717 E1000_WRITE_REG(hw, ITR, 1000000000 / (new_itr * 256));
2718 }
2719
2720 return;
2721}
2722
1da177e4
LT		 2723#define E1000_TX_FLAGS_CSUM 0x00000001
2724#define E1000_TX_FLAGS_VLAN 0x00000002
2725#define E1000_TX_FLAGS_TSO 0x00000004
2d7edb92 2726#define E1000_TX_FLAGS_IPV4 0x00000008
1da177e4
LT		 2727#define E1000_TX_FLAGS_VLAN_MASK 0xffff0000
2728#define E1000_TX_FLAGS_VLAN_SHIFT 16
2729
e619d523 2730static int
581d708e
MC		 2731e1000_tso(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
2732 struct sk_buff *skb)
1da177e4
LT		 2733{
2734#ifdef NETIF_F_TSO
2735 struct e1000_context_desc *context_desc;
545c67c0 2736 struct e1000_buffer *buffer_info;
1da177e4
LT		 2737 unsigned int i;
2738 uint32_t cmd_length = 0;
2d7edb92 2739 uint16_t ipcse = 0, tucse, mss;
1da177e4
LT		 2740 uint8_t ipcss, ipcso, tucss, tucso, hdr_len;
2741 int err;
2742
89114afd 2743 if (skb_is_gso(skb)) {
1da177e4
LT		 2744 if (skb_header_cloned(skb)) {
2745 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
2746 if (err)
2747 return err;
2748 }
2749
2750 hdr_len = ((skb->h.raw - skb->data) + (skb->h.th->doff << 2));
7967168c 2751 mss = skb_shinfo(skb)->gso_size;
60828236 2752 if (skb->protocol == htons(ETH_P_IP)) {
2d7edb92
MC		 2753 skb->nh.iph->tot_len = 0;
2754 skb->nh.iph->check = 0;
2755 skb->h.th->check =
2756 ~csum_tcpudp_magic(skb->nh.iph->saddr,
2757 skb->nh.iph->daddr,
2758 0,
2759 IPPROTO_TCP,
2760 0);
2761 cmd_length = E1000_TXD_CMD_IP;
2762 ipcse = skb->h.raw - skb->data - 1;
87ca4e5b 2763#ifdef NETIF_F_TSO6
e15fdd03 2764 } else if (skb->protocol == htons(ETH_P_IPV6)) {
2d7edb92
MC		 2765 skb->nh.ipv6h->payload_len = 0;
2766 skb->h.th->check =
2767 ~csum_ipv6_magic(&skb->nh.ipv6h->saddr,
2768 &skb->nh.ipv6h->daddr,
2769 0,
2770 IPPROTO_TCP,
2771 0);
2772 ipcse = 0;
2773#endif
2774 }
1da177e4
LT		 2775 ipcss = skb->nh.raw - skb->data;
2776 ipcso = (void *)&(skb->nh.iph->check) - (void *)skb->data;
1da177e4
LT		 2777 tucss = skb->h.raw - skb->data;
2778 tucso = (void *)&(skb->h.th->check) - (void *)skb->data;
2779 tucse = 0;
2780
2781 cmd_length |= (E1000_TXD_CMD_DEXT | E1000_TXD_CMD_TSE |
2d7edb92 2782 E1000_TXD_CMD_TCP | (skb->len - (hdr_len)));
1da177e4 2783
581d708e
MC		 2784 i = tx_ring->next_to_use;
2785 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
545c67c0 2786 buffer_info = &tx_ring->buffer_info[i];
1da177e4
LT		 2787
2788 context_desc->lower_setup.ip_fields.ipcss = ipcss;
2789 context_desc->lower_setup.ip_fields.ipcso = ipcso;
2790 context_desc->lower_setup.ip_fields.ipcse = cpu_to_le16(ipcse);
2791 context_desc->upper_setup.tcp_fields.tucss = tucss;
2792 context_desc->upper_setup.tcp_fields.tucso = tucso;
2793 context_desc->upper_setup.tcp_fields.tucse = cpu_to_le16(tucse);
2794 context_desc->tcp_seg_setup.fields.mss = cpu_to_le16(mss);
2795 context_desc->tcp_seg_setup.fields.hdr_len = hdr_len;
2796 context_desc->cmd_and_length = cpu_to_le32(cmd_length);
2797
545c67c0 2798 buffer_info->time_stamp = jiffies;
a9ebadd6 2799 buffer_info->next_to_watch = i;
545c67c0 2800
581d708e
MC		 2801 if (++i == tx_ring->count) i = 0;
2802 tx_ring->next_to_use = i;
1da177e4 2803
8241e35e 2804 return TRUE;
1da177e4
LT		 2805 }
2806#endif
2807
8241e35e 2808 return FALSE;
1da177e4
LT		 2809}
2810
e619d523 2811static boolean_t
581d708e
MC		 2812e1000_tx_csum(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
2813 struct sk_buff *skb)
1da177e4
LT		 2814{
2815 struct e1000_context_desc *context_desc;
545c67c0 2816 struct e1000_buffer *buffer_info;
1da177e4
LT		 2817 unsigned int i;
2818 uint8_t css;
2819
84fa7933 2820 if (likely(skb->ip_summed == CHECKSUM_PARTIAL)) {
1da177e4
LT		 2821 css = skb->h.raw - skb->data;
2822
581d708e 2823 i = tx_ring->next_to_use;
545c67c0 2824 buffer_info = &tx_ring->buffer_info[i];
581d708e 2825 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
1da177e4
LT		 2826
2827 context_desc->upper_setup.tcp_fields.tucss = css;
2828 context_desc->upper_setup.tcp_fields.tucso = css + skb->csum;
2829 context_desc->upper_setup.tcp_fields.tucse = 0;
2830 context_desc->tcp_seg_setup.data = 0;
2831 context_desc->cmd_and_length = cpu_to_le32(E1000_TXD_CMD_DEXT);
2832
545c67c0 2833 buffer_info->time_stamp = jiffies;
a9ebadd6 2834 buffer_info->next_to_watch = i;
545c67c0 2835
581d708e
MC		 2836 if (unlikely(++i == tx_ring->count)) i = 0;
2837 tx_ring->next_to_use = i;
1da177e4
LT		 2838
2839 return TRUE;
2840 }
2841
2842 return FALSE;
2843}
2844
2845#define E1000_MAX_TXD_PWR 12
2846#define E1000_MAX_DATA_PER_TXD (1<<E1000_MAX_TXD_PWR)
2847
e619d523 2848static int
581d708e
MC		 2849e1000_tx_map(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
2850 struct sk_buff *skb, unsigned int first, unsigned int max_per_txd,
2851 unsigned int nr_frags, unsigned int mss)
1da177e4 2852{
1da177e4
LT		 2853 struct e1000_buffer *buffer_info;
2854 unsigned int len = skb->len;
2855 unsigned int offset = 0, size, count = 0, i;
2856 unsigned int f;
2857 len -= skb->data_len;
2858
2859 i = tx_ring->next_to_use;
2860
96838a40 2861 while (len) {
1da177e4
LT		 2862 buffer_info = &tx_ring->buffer_info[i];
2863 size = min(len, max_per_txd);
2864#ifdef NETIF_F_TSO
fd803241
JK		 2865 /* Workaround for Controller erratum --
2866 * descriptor for non-tso packet in a linear SKB that follows a
2867 * tso gets written back prematurely before the data is fully
0f15a8fa 2868 * DMA'd to the controller */
fd803241 2869 if (!skb->data_len && tx_ring->last_tx_tso &&
89114afd 2870 !skb_is_gso(skb)) {
fd803241
JK		 2871 tx_ring->last_tx_tso = 0;
2872 size -= 4;
2873 }
2874
1da177e4
LT		 2875 /* Workaround for premature desc write-backs
2876 * in TSO mode. Append 4-byte sentinel desc */
96838a40 2877 if (unlikely(mss && !nr_frags && size == len && size > 8))
1da177e4
LT		 2878 size -= 4;
2879#endif
97338bde
MC		 2880 /* work-around for errata 10 and it applies
2881 * to all controllers in PCI-X mode
2882 * The fix is to make sure that the first descriptor of a
2883 * packet is smaller than 2048 - 16 - 16 (or 2016) bytes
2884 */
96838a40 2885 if (unlikely((adapter->hw.bus_type == e1000_bus_type_pcix) &&
97338bde
MC		 2886 (size > 2015) && count == 0))
2887 size = 2015;
96838a40 2888
1da177e4
LT		 2889 /* Workaround for potential 82544 hang in PCI-X. Avoid
2890 * terminating buffers within evenly-aligned dwords. */
96838a40 2891 if (unlikely(adapter->pcix_82544 &&
1da177e4
LT		 2892 !((unsigned long)(skb->data + offset + size - 1) & 4) &&
2893 size > 4))
2894 size -= 4;
2895
2896 buffer_info->length = size;
2897 buffer_info->dma =
2898 pci_map_single(adapter->pdev,
2899 skb->data + offset,
2900 size,
2901 PCI_DMA_TODEVICE);
2902 buffer_info->time_stamp = jiffies;
a9ebadd6 2903 buffer_info->next_to_watch = i;
1da177e4
LT		 2904
2905 len -= size;
2906 offset += size;
2907 count++;
96838a40 2908 if (unlikely(++i == tx_ring->count)) i = 0;
1da177e4
LT		 2909 }
2910
96838a40 2911 for (f = 0; f < nr_frags; f++) {
1da177e4
LT		 2912 struct skb_frag_struct *frag;
2913
2914 frag = &skb_shinfo(skb)->frags[f];
2915 len = frag->size;
2916 offset = frag->page_offset;
2917
96838a40 2918 while (len) {
1da177e4
LT		 2919 buffer_info = &tx_ring->buffer_info[i];
2920 size = min(len, max_per_txd);
2921#ifdef NETIF_F_TSO
2922 /* Workaround for premature desc write-backs
2923 * in TSO mode. Append 4-byte sentinel desc */
96838a40 2924 if (unlikely(mss && f == (nr_frags-1) && size == len && size > 8))
1da177e4
LT		 2925 size -= 4;
2926#endif
2927 /* Workaround for potential 82544 hang in PCI-X.
2928 * Avoid terminating buffers within evenly-aligned
2929 * dwords. */
96838a40 2930 if (unlikely(adapter->pcix_82544 &&
1da177e4
LT		 2931 !((unsigned long)(frag->page+offset+size-1) & 4) &&
2932 size > 4))
2933 size -= 4;
2934
2935 buffer_info->length = size;
2936 buffer_info->dma =
2937 pci_map_page(adapter->pdev,
2938 frag->page,
2939 offset,
2940 size,
2941 PCI_DMA_TODEVICE);
2942 buffer_info->time_stamp = jiffies;
a9ebadd6 2943 buffer_info->next_to_watch = i;
1da177e4
LT		 2944
2945 len -= size;
2946 offset += size;
2947 count++;
96838a40 2948 if (unlikely(++i == tx_ring->count)) i = 0;
1da177e4
LT		 2949 }
2950 }
2951
2952 i = (i == 0) ? tx_ring->count - 1 : i - 1;
2953 tx_ring->buffer_info[i].skb = skb;
2954 tx_ring->buffer_info[first].next_to_watch = i;
2955
2956 return count;
2957}
2958
e619d523 2959static void
581d708e
MC		 2960e1000_tx_queue(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
2961 int tx_flags, int count)
1da177e4 2962{
1da177e4
LT		 2963 struct e1000_tx_desc *tx_desc = NULL;
2964 struct e1000_buffer *buffer_info;
2965 uint32_t txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS;
2966 unsigned int i;
2967
96838a40 2968 if (likely(tx_flags & E1000_TX_FLAGS_TSO)) {
1da177e4
LT		 2969 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D |
2970 E1000_TXD_CMD_TSE;
2d7edb92
MC		 2971 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
2972
96838a40 2973 if (likely(tx_flags & E1000_TX_FLAGS_IPV4))
2d7edb92 2974 txd_upper |= E1000_TXD_POPTS_IXSM << 8;
1da177e4
LT		 2975 }
2976
96838a40 2977 if (likely(tx_flags & E1000_TX_FLAGS_CSUM)) {
1da177e4
LT		 2978 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
2979 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
2980 }
2981
96838a40 2982 if (unlikely(tx_flags & E1000_TX_FLAGS_VLAN)) {
1da177e4
LT		 2983 txd_lower |= E1000_TXD_CMD_VLE;
2984 txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK);
2985 }
2986
2987 i = tx_ring->next_to_use;
2988
96838a40 2989 while (count--) {
1da177e4
LT		 2990 buffer_info = &tx_ring->buffer_info[i];
2991 tx_desc = E1000_TX_DESC(*tx_ring, i);
2992 tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
2993 tx_desc->lower.data =
2994 cpu_to_le32(txd_lower | buffer_info->length);
2995 tx_desc->upper.data = cpu_to_le32(txd_upper);
96838a40 2996 if (unlikely(++i == tx_ring->count)) i = 0;
1da177e4
LT		 2997 }
2998
2999 tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd);
3000
3001 /* Force memory writes to complete before letting h/w
3002 * know there are new descriptors to fetch. (Only
3003 * applicable for weak-ordered memory model archs,
3004 * such as IA-64). */
3005 wmb();
3006
3007 tx_ring->next_to_use = i;
581d708e 3008 writel(i, adapter->hw.hw_addr + tx_ring->tdt);
2ce9047f
JB		 3009 /* we need this if more than one processor can write to our tail
3010 * at a time, it syncronizes IO on IA64/Altix systems */
3011 mmiowb();
1da177e4
LT		 3012}
3013
3014/**
3015 * 82547 workaround to avoid controller hang in half-duplex environment.
3016 * The workaround is to avoid queuing a large packet that would span
3017 * the internal Tx FIFO ring boundary by notifying the stack to resend
3018 * the packet at a later time. This gives the Tx FIFO an opportunity to
3019 * flush all packets. When that occurs, we reset the Tx FIFO pointers
3020 * to the beginning of the Tx FIFO.
3021 **/
3022
3023#define E1000_FIFO_HDR 0x10
3024#define E1000_82547_PAD_LEN 0x3E0
3025
e619d523 3026static int
1da177e4
LT		 3027e1000_82547_fifo_workaround(struct e1000_adapter *adapter, struct sk_buff *skb)
3028{
3029 uint32_t fifo_space = adapter->tx_fifo_size - adapter->tx_fifo_head;
3030 uint32_t skb_fifo_len = skb->len + E1000_FIFO_HDR;
3031
3032 E1000_ROUNDUP(skb_fifo_len, E1000_FIFO_HDR);
3033
96838a40 3034 if (adapter->link_duplex != HALF_DUPLEX)
1da177e4
LT		 3035 goto no_fifo_stall_required;
3036
96838a40 3037 if (atomic_read(&adapter->tx_fifo_stall))
1da177e4
LT		 3038 return 1;
3039
96838a40 3040 if (skb_fifo_len >= (E1000_82547_PAD_LEN + fifo_space)) {
1da177e4
LT		 3041 atomic_set(&adapter->tx_fifo_stall, 1);
3042 return 1;
3043 }
3044
3045no_fifo_stall_required:
3046 adapter->tx_fifo_head += skb_fifo_len;
96838a40 3047 if (adapter->tx_fifo_head >= adapter->tx_fifo_size)
1da177e4
LT		 3048 adapter->tx_fifo_head -= adapter->tx_fifo_size;
3049 return 0;
3050}
3051
2d7edb92 3052#define MINIMUM_DHCP_PACKET_SIZE 282
e619d523 3053static int
2d7edb92
MC		 3054e1000_transfer_dhcp_info(struct e1000_adapter *adapter, struct sk_buff *skb)
3055{
3056 struct e1000_hw *hw = &adapter->hw;
3057 uint16_t length, offset;
96838a40
JB		 3058 if (vlan_tx_tag_present(skb)) {
3059 if (!((vlan_tx_tag_get(skb) == adapter->hw.mng_cookie.vlan_id) &&
2d7edb92
MC		 3060 ( adapter->hw.mng_cookie.status &
3061 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) )
3062 return 0;
3063 }
20a44028 3064 if (skb->len > MINIMUM_DHCP_PACKET_SIZE) {
2d7edb92 3065 struct ethhdr *eth = (struct ethhdr *) skb->data;
96838a40
JB		 3066 if ((htons(ETH_P_IP) == eth->h_proto)) {
3067 const struct iphdr *ip =
2d7edb92 3068 (struct iphdr *)((uint8_t *)skb->data+14);
96838a40
JB		 3069 if (IPPROTO_UDP == ip->protocol) {
3070 struct udphdr *udp =
3071 (struct udphdr *)((uint8_t *)ip +
2d7edb92 3072 (ip->ihl << 2));
96838a40 3073 if (ntohs(udp->dest) == 67) {
2d7edb92
MC		 3074 offset = (uint8_t *)udp + 8 - skb->data;
3075 length = skb->len - offset;
3076
3077 return e1000_mng_write_dhcp_info(hw,
96838a40 3078 (uint8_t *)udp + 8,
2d7edb92
MC		 3079 length);
3080 }
3081 }
3082 }
3083 }
3084 return 0;
3085}
3086
65c7973f
JB		 3087static int __e1000_maybe_stop_tx(struct net_device *netdev, int size)
3088{
3089 struct e1000_adapter *adapter = netdev_priv(netdev);
3090 struct e1000_tx_ring *tx_ring = adapter->tx_ring;
3091
3092 netif_stop_queue(netdev);
3093 /* Herbert's original patch had:
3094 * smp_mb__after_netif_stop_queue();
3095 * but since that doesn't exist yet, just open code it. */
3096 smp_mb();
3097
3098 /* We need to check again in a case another CPU has just
3099 * made room available. */
3100 if (likely(E1000_DESC_UNUSED(tx_ring) < size))
3101 return -EBUSY;
3102
3103 /* A reprieve! */
3104 netif_start_queue(netdev);
fcfb1224 3105 ++adapter->restart_queue;
65c7973f
JB		 3106 return 0;
3107}
3108
3109static int e1000_maybe_stop_tx(struct net_device *netdev,
3110 struct e1000_tx_ring *tx_ring, int size)
3111{
3112 if (likely(E1000_DESC_UNUSED(tx_ring) >= size))
3113 return 0;
3114 return __e1000_maybe_stop_tx(netdev, size);
3115}
3116
1da177e4
LT		 3117#define TXD_USE_COUNT(S, X) (((S) >> (X)) + 1 )
3118static int
3119e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
3120{
60490fe0 3121 struct e1000_adapter *adapter = netdev_priv(netdev);
581d708e 3122 struct e1000_tx_ring *tx_ring;
1da177e4
LT		 3123 unsigned int first, max_per_txd = E1000_MAX_DATA_PER_TXD;
3124 unsigned int max_txd_pwr = E1000_MAX_TXD_PWR;
3125 unsigned int tx_flags = 0;
3126 unsigned int len = skb->len;
3127 unsigned long flags;
3128 unsigned int nr_frags = 0;
3129 unsigned int mss = 0;
3130 int count = 0;
76c224bc 3131 int tso;
1da177e4
LT		 3132 unsigned int f;
3133 len -= skb->data_len;
3134
65c7973f
JB		 3135 /* This goes back to the question of how to logically map a tx queue
3136 * to a flow. Right now, performance is impacted slightly negatively
3137 * if using multiple tx queues. If the stack breaks away from a
3138 * single qdisc implementation, we can look at this again. */
581d708e 3139 tx_ring = adapter->tx_ring;
24025e4e 3140
581d708e 3141 if (unlikely(skb->len <= 0)) {
1da177e4
LT		 3142 dev_kfree_skb_any(skb);
3143 return NETDEV_TX_OK;
3144 }
3145
032fe6e9
JB		 3146 /* 82571 and newer doesn't need the workaround that limited descriptor
3147 * length to 4kB */
3148 if (adapter->hw.mac_type >= e1000_82571)
3149 max_per_txd = 8192;
3150
1da177e4 3151#ifdef NETIF_F_TSO
7967168c 3152 mss = skb_shinfo(skb)->gso_size;
76c224bc 3153 /* The controller does a simple calculation to
1da177e4
LT		 3154 * make sure there is enough room in the FIFO before
3155 * initiating the DMA for each buffer. The calc is:
3156 * 4 = ceil(buffer len/mss). To make sure we don't
3157 * overrun the FIFO, adjust the max buffer len if mss
3158 * drops. */
96838a40 3159 if (mss) {
9a3056da 3160 uint8_t hdr_len;
1da177e4
LT		 3161 max_per_txd = min(mss << 2, max_per_txd);
3162 max_txd_pwr = fls(max_per_txd) - 1;
9a3056da 3163
90fb5135
AK		 3164 /* TSO Workaround for 82571/2/3 Controllers -- if skb->data
3165 * points to just header, pull a few bytes of payload from
3166 * frags into skb->data */
9a3056da 3167 hdr_len = ((skb->h.raw - skb->data) + (skb->h.th->doff << 2));
9f687888
JK		 3168 if (skb->data_len && (hdr_len == (skb->len - skb->data_len))) {
3169 switch (adapter->hw.mac_type) {
3170 unsigned int pull_size;
3171 case e1000_82571:
3172 case e1000_82572:
3173 case e1000_82573:
cd94dd0b 3174 case e1000_ich8lan:
9f687888
JK		 3175 pull_size = min((unsigned int)4, skb->data_len);
3176 if (!__pskb_pull_tail(skb, pull_size)) {
a5eafce2 3177 DPRINTK(DRV, ERR,
9f687888
JK		 3178 "__pskb_pull_tail failed.\n");
3179 dev_kfree_skb_any(skb);
749dfc70 3180 return NETDEV_TX_OK;
9f687888
JK		 3181 }
3182 len = skb->len - skb->data_len;
3183 break;
3184 default:
3185 /* do nothing */
3186 break;
d74bbd3b 3187 }
9a3056da 3188 }
1da177e4
LT		 3189 }
3190
9a3056da 3191 /* reserve a descriptor for the offload context */
84fa7933 3192 if ((mss) || (skb->ip_summed == CHECKSUM_PARTIAL))
1da177e4 3193 count++;
2648345f 3194 count++;
1da177e4 3195#else
84fa7933 3196 if (skb->ip_summed == CHECKSUM_PARTIAL)
1da177e4
LT		 3197 count++;
3198#endif
fd803241
JK		 3199
3200#ifdef NETIF_F_TSO
3201 /* Controller Erratum workaround */
89114afd 3202 if (!skb->data_len && tx_ring->last_tx_tso && !skb_is_gso(skb))
fd803241
JK		 3203 count++;
3204#endif
3205
1da177e4
LT		 3206 count += TXD_USE_COUNT(len, max_txd_pwr);
3207
96838a40 3208 if (adapter->pcix_82544)
1da177e4
LT		 3209 count++;
3210
96838a40 3211 /* work-around for errata 10 and it applies to all controllers
97338bde
MC		 3212 * in PCI-X mode, so add one more descriptor to the count
3213 */
96838a40 3214 if (unlikely((adapter->hw.bus_type == e1000_bus_type_pcix) &&
97338bde
MC		 3215 (len > 2015)))
3216 count++;
3217
1da177e4 3218 nr_frags = skb_shinfo(skb)->nr_frags;
96838a40 3219 for (f = 0; f < nr_frags; f++)
1da177e4
LT		 3220 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size,
3221 max_txd_pwr);
96838a40 3222 if (adapter->pcix_82544)
1da177e4
LT		 3223 count += nr_frags;
3224
0f15a8fa
JK		 3225
3226 if (adapter->hw.tx_pkt_filtering &&
3227 (adapter->hw.mac_type == e1000_82573))
2d7edb92
MC		 3228 e1000_transfer_dhcp_info(adapter, skb);
3229
581d708e
MC		 3230 local_irq_save(flags);
3231 if (!spin_trylock(&tx_ring->tx_lock)) {
3232 /* Collision - tell upper layer to requeue */
3233 local_irq_restore(flags);
3234 return NETDEV_TX_LOCKED;
3235 }
1da177e4
LT		 3236
3237 /* need: count + 2 desc gap to keep tail from touching
3238 * head, otherwise try next time */
65c7973f 3239 if (unlikely(e1000_maybe_stop_tx(netdev, tx_ring, count + 2))) {
581d708e 3240 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
1da177e4
LT		 3241 return NETDEV_TX_BUSY;
3242 }
3243
96838a40
JB		 3244 if (unlikely(adapter->hw.mac_type == e1000_82547)) {
3245 if (unlikely(e1000_82547_fifo_workaround(adapter, skb))) {
1da177e4 3246 netif_stop_queue(netdev);
1314bbf3 3247 mod_timer(&adapter->tx_fifo_stall_timer, jiffies + 1);
581d708e 3248 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
1da177e4
LT		 3249 return NETDEV_TX_BUSY;
3250 }
3251 }
3252
96838a40 3253 if (unlikely(adapter->vlgrp && vlan_tx_tag_present(skb))) {
1da177e4
LT		 3254 tx_flags |= E1000_TX_FLAGS_VLAN;
3255 tx_flags |= (vlan_tx_tag_get(skb) << E1000_TX_FLAGS_VLAN_SHIFT);
3256 }
3257
581d708e 3258 first = tx_ring->next_to_use;
96838a40 3259
581d708e 3260 tso = e1000_tso(adapter, tx_ring, skb);
1da177e4
LT		 3261 if (tso < 0) {
3262 dev_kfree_skb_any(skb);
581d708e 3263 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
1da177e4
LT		 3264 return NETDEV_TX_OK;
3265 }
3266
fd803241
JK		 3267 if (likely(tso)) {
3268 tx_ring->last_tx_tso = 1;
1da177e4 3269 tx_flags |= E1000_TX_FLAGS_TSO;
fd803241 3270 } else if (likely(e1000_tx_csum(adapter, tx_ring, skb)))
1da177e4
LT		 3271 tx_flags |= E1000_TX_FLAGS_CSUM;
3272
2d7edb92 3273 /* Old method was to assume IPv4 packet by default if TSO was enabled.
868d5309 3274 * 82571 hardware supports TSO capabilities for IPv6 as well...
2d7edb92 3275 * no longer assume, we must. */
60828236 3276 if (likely(skb->protocol == htons(ETH_P_IP)))
2d7edb92
MC		 3277 tx_flags |= E1000_TX_FLAGS_IPV4;
3278
581d708e
MC		 3279 e1000_tx_queue(adapter, tx_ring, tx_flags,
3280 e1000_tx_map(adapter, tx_ring, skb, first,
3281 max_per_txd, nr_frags, mss));
1da177e4
LT		 3282
3283 netdev->trans_start = jiffies;
3284
3285 /* Make sure there is space in the ring for the next send. */
65c7973f 3286 e1000_maybe_stop_tx(netdev, tx_ring, MAX_SKB_FRAGS + 2);
1da177e4 3287
581d708e 3288 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
1da177e4
LT		 3289 return NETDEV_TX_OK;
3290}
3291
3292/**
3293 * e1000_tx_timeout - Respond to a Tx Hang
3294 * @netdev: network interface device structure
3295 **/
3296
3297static void
3298e1000_tx_timeout(struct net_device *netdev)
3299{
60490fe0 3300 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 3301
3302 /* Do the reset outside of interrupt context */
87041639
JK		 3303 adapter->tx_timeout_count++;
3304 schedule_work(&adapter->reset_task);
1da177e4
LT		 3305}
3306
3307static void
87041639 3308e1000_reset_task(struct net_device *netdev)
1da177e4 3309{
60490fe0 3310 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 3311
2db10a08 3312 e1000_reinit_locked(adapter);
1da177e4
LT		 3313}
3314
3315/**
3316 * e1000_get_stats - Get System Network Statistics
3317 * @netdev: network interface device structure
3318 *
3319 * Returns the address of the device statistics structure.
3320 * The statistics are actually updated from the timer callback.
3321 **/
3322
3323static struct net_device_stats *
3324e1000_get_stats(struct net_device *netdev)
3325{
60490fe0 3326 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 3327
6b7660cd 3328 /* only return the current stats */
1da177e4
LT		 3329 return &adapter->net_stats;
3330}
3331
3332/**
3333 * e1000_change_mtu - Change the Maximum Transfer Unit
3334 * @netdev: network interface device structure
3335 * @new_mtu: new value for maximum frame size
3336 *
3337 * Returns 0 on success, negative on failure
3338 **/
3339
3340static int
3341e1000_change_mtu(struct net_device *netdev, int new_mtu)
3342{
60490fe0 3343 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 3344 int max_frame = new_mtu + ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
85b22eb6 3345 uint16_t eeprom_data = 0;
1da177e4 3346
96838a40
JB		 3347 if ((max_frame < MINIMUM_ETHERNET_FRAME_SIZE) ||
3348 (max_frame > MAX_JUMBO_FRAME_SIZE)) {
3349 DPRINTK(PROBE, ERR, "Invalid MTU setting\n");
1da177e4 3350 return -EINVAL;
2d7edb92 3351 }
1da177e4 3352
997f5cbd
JK		 3353 /* Adapter-specific max frame size limits. */
3354 switch (adapter->hw.mac_type) {
9e2feace 3355 case e1000_undefined ... e1000_82542_rev2_1:
cd94dd0b 3356 case e1000_ich8lan:
997f5cbd
JK		 3357 if (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE) {
3358 DPRINTK(PROBE, ERR, "Jumbo Frames not supported.\n");
2d7edb92 3359 return -EINVAL;
2d7edb92 3360 }
997f5cbd 3361 break;
85b22eb6 3362 case e1000_82573:
249d71d6
BA		 3363 /* Jumbo Frames not supported if:
3364 * - this is not an 82573L device
3365 * - ASPM is enabled in any way (0x1A bits 3:2) */
85b22eb6
JK		 3366 e1000_read_eeprom(&adapter->hw, EEPROM_INIT_3GIO_3, 1,
3367 &eeprom_data);
249d71d6
BA		 3368 if ((adapter->hw.device_id != E1000_DEV_ID_82573L) ||
3369 (eeprom_data & EEPROM_WORD1A_ASPM_MASK)) {
85b22eb6
JK		 3370 if (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE) {
3371 DPRINTK(PROBE, ERR,
3372 "Jumbo Frames not supported.\n");
3373 return -EINVAL;
3374 }
3375 break;
3376 }
249d71d6
BA		 3377 /* ERT will be enabled later to enable wire speed receives */
3378
85b22eb6 3379 /* fall through to get support */
997f5cbd
JK		 3380 case e1000_82571:
3381 case e1000_82572:
87041639 3382 case e1000_80003es2lan:
997f5cbd
JK		 3383#define MAX_STD_JUMBO_FRAME_SIZE 9234
3384 if (max_frame > MAX_STD_JUMBO_FRAME_SIZE) {
3385 DPRINTK(PROBE, ERR, "MTU > 9216 not supported.\n");
3386 return -EINVAL;
3387 }
3388 break;
3389 default:
3390 /* Capable of supporting up to MAX_JUMBO_FRAME_SIZE limit. */
3391 break;
1da177e4
LT		 3392 }
3393
87f5032e 3394 /* NOTE: netdev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN
9e2feace
AK		 3395 * means we reserve 2 more, this pushes us to allocate from the next
3396 * larger slab size
3397 * i.e. RXBUFFER_2048 --> size-4096 slab */
3398
3399 if (max_frame <= E1000_RXBUFFER_256)
3400 adapter->rx_buffer_len = E1000_RXBUFFER_256;
3401 else if (max_frame <= E1000_RXBUFFER_512)
3402 adapter->rx_buffer_len = E1000_RXBUFFER_512;
3403 else if (max_frame <= E1000_RXBUFFER_1024)
3404 adapter->rx_buffer_len = E1000_RXBUFFER_1024;
3405 else if (max_frame <= E1000_RXBUFFER_2048)
3406 adapter->rx_buffer_len = E1000_RXBUFFER_2048;
3407 else if (max_frame <= E1000_RXBUFFER_4096)
3408 adapter->rx_buffer_len = E1000_RXBUFFER_4096;
3409 else if (max_frame <= E1000_RXBUFFER_8192)
3410 adapter->rx_buffer_len = E1000_RXBUFFER_8192;
3411 else if (max_frame <= E1000_RXBUFFER_16384)
3412 adapter->rx_buffer_len = E1000_RXBUFFER_16384;
3413
3414 /* adjust allocation if LPE protects us, and we aren't using SBP */
9e2feace
AK		 3415 if (!adapter->hw.tbi_compatibility_on &&
3416 ((max_frame == MAXIMUM_ETHERNET_FRAME_SIZE) ||
3417 (max_frame == MAXIMUM_ETHERNET_VLAN_SIZE)))
3418 adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
997f5cbd 3419
2d7edb92
MC		 3420 netdev->mtu = new_mtu;
3421
2db10a08
AK		 3422 if (netif_running(netdev))
3423 e1000_reinit_locked(adapter);
1da177e4 3424
1da177e4
LT		 3425 adapter->hw.max_frame_size = max_frame;
3426
3427 return 0;
3428}
3429
3430/**
3431 * e1000_update_stats - Update the board statistics counters
3432 * @adapter: board private structure
3433 **/
3434
3435void
3436e1000_update_stats(struct e1000_adapter *adapter)
3437{
3438 struct e1000_hw *hw = &adapter->hw;
282f33c9 3439 struct pci_dev *pdev = adapter->pdev;
1da177e4
LT		 3440 unsigned long flags;
3441 uint16_t phy_tmp;
3442
3443#define PHY_IDLE_ERROR_COUNT_MASK 0x00FF
3444
282f33c9
LV		 3445 /*
3446 * Prevent stats update while adapter is being reset, or if the pci
3447 * connection is down.
3448 */
9026729b 3449 if (adapter->link_speed == 0)
282f33c9
LV		 3450 return;
3451 if (pdev->error_state && pdev->error_state != pci_channel_io_normal)
9026729b
AK		 3452 return;
3453
1da177e4
LT		 3454 spin_lock_irqsave(&adapter->stats_lock, flags);
3455
3456 /* these counters are modified from e1000_adjust_tbi_stats,
3457 * called from the interrupt context, so they must only
3458 * be written while holding adapter->stats_lock
3459 */
3460
3461 adapter->stats.crcerrs += E1000_READ_REG(hw, CRCERRS);
3462 adapter->stats.gprc += E1000_READ_REG(hw, GPRC);
3463 adapter->stats.gorcl += E1000_READ_REG(hw, GORCL);
3464 adapter->stats.gorch += E1000_READ_REG(hw, GORCH);
3465 adapter->stats.bprc += E1000_READ_REG(hw, BPRC);
3466 adapter->stats.mprc += E1000_READ_REG(hw, MPRC);
3467 adapter->stats.roc += E1000_READ_REG(hw, ROC);
cd94dd0b
AK		 3468
3469 if (adapter->hw.mac_type != e1000_ich8lan) {
90fb5135
AK		 3470 adapter->stats.prc64 += E1000_READ_REG(hw, PRC64);
3471 adapter->stats.prc127 += E1000_READ_REG(hw, PRC127);
3472 adapter->stats.prc255 += E1000_READ_REG(hw, PRC255);
3473 adapter->stats.prc511 += E1000_READ_REG(hw, PRC511);
3474 adapter->stats.prc1023 += E1000_READ_REG(hw, PRC1023);
3475 adapter->stats.prc1522 += E1000_READ_REG(hw, PRC1522);
cd94dd0b 3476 }
1da177e4
LT		 3477
3478 adapter->stats.symerrs += E1000_READ_REG(hw, SYMERRS);
3479 adapter->stats.mpc += E1000_READ_REG(hw, MPC);
3480 adapter->stats.scc += E1000_READ_REG(hw, SCC);
3481 adapter->stats.ecol += E1000_READ_REG(hw, ECOL);
3482 adapter->stats.mcc += E1000_READ_REG(hw, MCC);
3483 adapter->stats.latecol += E1000_READ_REG(hw, LATECOL);
3484 adapter->stats.dc += E1000_READ_REG(hw, DC);
3485 adapter->stats.sec += E1000_READ_REG(hw, SEC);
3486 adapter->stats.rlec += E1000_READ_REG(hw, RLEC);
3487 adapter->stats.xonrxc += E1000_READ_REG(hw, XONRXC);
3488 adapter->stats.xontxc += E1000_READ_REG(hw, XONTXC);
3489 adapter->stats.xoffrxc += E1000_READ_REG(hw, XOFFRXC);
3490 adapter->stats.xofftxc += E1000_READ_REG(hw, XOFFTXC);
3491 adapter->stats.fcruc += E1000_READ_REG(hw, FCRUC);
3492 adapter->stats.gptc += E1000_READ_REG(hw, GPTC);
3493 adapter->stats.gotcl += E1000_READ_REG(hw, GOTCL);
3494 adapter->stats.gotch += E1000_READ_REG(hw, GOTCH);
3495 adapter->stats.rnbc += E1000_READ_REG(hw, RNBC);
3496 adapter->stats.ruc += E1000_READ_REG(hw, RUC);
3497 adapter->stats.rfc += E1000_READ_REG(hw, RFC);
3498 adapter->stats.rjc += E1000_READ_REG(hw, RJC);
3499 adapter->stats.torl += E1000_READ_REG(hw, TORL);
3500 adapter->stats.torh += E1000_READ_REG(hw, TORH);
3501 adapter->stats.totl += E1000_READ_REG(hw, TOTL);
3502 adapter->stats.toth += E1000_READ_REG(hw, TOTH);
3503 adapter->stats.tpr += E1000_READ_REG(hw, TPR);
cd94dd0b
AK		 3504
3505 if (adapter->hw.mac_type != e1000_ich8lan) {
90fb5135
AK		 3506 adapter->stats.ptc64 += E1000_READ_REG(hw, PTC64);
3507 adapter->stats.ptc127 += E1000_READ_REG(hw, PTC127);
3508 adapter->stats.ptc255 += E1000_READ_REG(hw, PTC255);
3509 adapter->stats.ptc511 += E1000_READ_REG(hw, PTC511);
3510 adapter->stats.ptc1023 += E1000_READ_REG(hw, PTC1023);
3511 adapter->stats.ptc1522 += E1000_READ_REG(hw, PTC1522);
cd94dd0b
AK		 3512 }
3513
1da177e4
LT		 3514 adapter->stats.mptc += E1000_READ_REG(hw, MPTC);
3515 adapter->stats.bptc += E1000_READ_REG(hw, BPTC);
3516
3517 /* used for adaptive IFS */
3518
3519 hw->tx_packet_delta = E1000_READ_REG(hw, TPT);
3520 adapter->stats.tpt += hw->tx_packet_delta;
3521 hw->collision_delta = E1000_READ_REG(hw, COLC);
3522 adapter->stats.colc += hw->collision_delta;
3523
96838a40 3524 if (hw->mac_type >= e1000_82543) {
1da177e4
LT		 3525 adapter->stats.algnerrc += E1000_READ_REG(hw, ALGNERRC);
3526 adapter->stats.rxerrc += E1000_READ_REG(hw, RXERRC);
3527 adapter->stats.tncrs += E1000_READ_REG(hw, TNCRS);
3528 adapter->stats.cexterr += E1000_READ_REG(hw, CEXTERR);
3529 adapter->stats.tsctc += E1000_READ_REG(hw, TSCTC);
3530 adapter->stats.tsctfc += E1000_READ_REG(hw, TSCTFC);
3531 }
96838a40 3532 if (hw->mac_type > e1000_82547_rev_2) {
2d7edb92
MC		 3533 adapter->stats.iac += E1000_READ_REG(hw, IAC);
3534 adapter->stats.icrxoc += E1000_READ_REG(hw, ICRXOC);
cd94dd0b
AK		 3535
3536 if (adapter->hw.mac_type != e1000_ich8lan) {
90fb5135
AK		 3537 adapter->stats.icrxptc += E1000_READ_REG(hw, ICRXPTC);
3538 adapter->stats.icrxatc += E1000_READ_REG(hw, ICRXATC);
3539 adapter->stats.ictxptc += E1000_READ_REG(hw, ICTXPTC);
3540 adapter->stats.ictxatc += E1000_READ_REG(hw, ICTXATC);
3541 adapter->stats.ictxqec += E1000_READ_REG(hw, ICTXQEC);
3542 adapter->stats.ictxqmtc += E1000_READ_REG(hw, ICTXQMTC);
3543 adapter->stats.icrxdmtc += E1000_READ_REG(hw, ICRXDMTC);
cd94dd0b 3544 }
2d7edb92 3545 }
1da177e4
LT		 3546
3547 /* Fill out the OS statistics structure */
1da177e4
LT		 3548 adapter->net_stats.rx_packets = adapter->stats.gprc;
3549 adapter->net_stats.tx_packets = adapter->stats.gptc;
3550 adapter->net_stats.rx_bytes = adapter->stats.gorcl;
3551 adapter->net_stats.tx_bytes = adapter->stats.gotcl;
3552 adapter->net_stats.multicast = adapter->stats.mprc;
3553 adapter->net_stats.collisions = adapter->stats.colc;
3554
3555 /* Rx Errors */
3556
87041639
JK		 3557 /* RLEC on some newer hardware can be incorrect so build
3558 * our own version based on RUC and ROC */
1da177e4
LT		 3559 adapter->net_stats.rx_errors = adapter->stats.rxerrc +
3560 adapter->stats.crcerrs + adapter->stats.algnerrc +
87041639
JK		 3561 adapter->stats.ruc + adapter->stats.roc +
3562 adapter->stats.cexterr;
49559854
MW		 3563 adapter->stats.rlerrc = adapter->stats.ruc + adapter->stats.roc;
3564 adapter->net_stats.rx_length_errors = adapter->stats.rlerrc;
1da177e4
LT		 3565 adapter->net_stats.rx_crc_errors = adapter->stats.crcerrs;
3566 adapter->net_stats.rx_frame_errors = adapter->stats.algnerrc;
1da177e4
LT		 3567 adapter->net_stats.rx_missed_errors = adapter->stats.mpc;
3568
3569 /* Tx Errors */
49559854
MW		 3570 adapter->stats.txerrc = adapter->stats.ecol + adapter->stats.latecol;
3571 adapter->net_stats.tx_errors = adapter->stats.txerrc;
1da177e4
LT		 3572 adapter->net_stats.tx_aborted_errors = adapter->stats.ecol;
3573 adapter->net_stats.tx_window_errors = adapter->stats.latecol;
3574 adapter->net_stats.tx_carrier_errors = adapter->stats.tncrs;
3575
3576 /* Tx Dropped needs to be maintained elsewhere */
3577
3578 /* Phy Stats */
96838a40
JB		 3579 if (hw->media_type == e1000_media_type_copper) {
3580 if ((adapter->link_speed == SPEED_1000) &&
1da177e4
LT		 3581 (!e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_tmp))) {
3582 phy_tmp &= PHY_IDLE_ERROR_COUNT_MASK;
3583 adapter->phy_stats.idle_errors += phy_tmp;
3584 }
3585
96838a40 3586 if ((hw->mac_type <= e1000_82546) &&
1da177e4
LT		 3587 (hw->phy_type == e1000_phy_m88) &&
3588 !e1000_read_phy_reg(hw, M88E1000_RX_ERR_CNTR, &phy_tmp))
3589 adapter->phy_stats.receive_errors += phy_tmp;
3590 }
3591
3592 spin_unlock_irqrestore(&adapter->stats_lock, flags);
3593}
9ac98284
JB		 3594#ifdef CONFIG_PCI_MSI
3595
3596/**
3597 * e1000_intr_msi - Interrupt Handler
3598 * @irq: interrupt number
3599 * @data: pointer to a network interface device structure
3600 **/
3601
3602static
3603irqreturn_t e1000_intr_msi(int irq, void *data)
3604{
3605 struct net_device *netdev = data;
3606 struct e1000_adapter *adapter = netdev_priv(netdev);
3607 struct e1000_hw *hw = &adapter->hw;
3608#ifndef CONFIG_E1000_NAPI
3609 int i;
3610#endif
3611
3612 /* this code avoids the read of ICR but has to get 1000 interrupts
3613 * at every link change event before it will notice the change */
3614 if (++adapter->detect_link >= 1000) {
3615 uint32_t icr = E1000_READ_REG(hw, ICR);
3616#ifdef CONFIG_E1000_NAPI
3617 /* read ICR disables interrupts using IAM, so keep up with our
3618 * enable/disable accounting */
3619 atomic_inc(&adapter->irq_sem);
3620#endif
3621 adapter->detect_link = 0;
3622 if ((icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) &&
3623 (icr & E1000_ICR_INT_ASSERTED)) {
3624 hw->get_link_status = 1;
3625 /* 80003ES2LAN workaround--
3626 * For packet buffer work-around on link down event;
3627 * disable receives here in the ISR and
3628 * reset adapter in watchdog
3629 */
3630 if (netif_carrier_ok(netdev) &&
3631 (adapter->hw.mac_type == e1000_80003es2lan)) {
3632 /* disable receives */
3633 uint32_t rctl = E1000_READ_REG(hw, RCTL);
3634 E1000_WRITE_REG(hw, RCTL, rctl & ~E1000_RCTL_EN);
3635 }
3636 /* guard against interrupt when we're going down */
3637 if (!test_bit(__E1000_DOWN, &adapter->flags))
3638 mod_timer(&adapter->watchdog_timer,
3639 jiffies + 1);
3640 }
3641 } else {
3642 E1000_WRITE_REG(hw, ICR, (0xffffffff & ~(E1000_ICR_RXSEQ |
3643 E1000_ICR_LSC)));
3644 /* bummer we have to flush here, but things break otherwise as
3645 * some event appears to be lost or delayed and throughput
3646 * drops. In almost all tests this flush is un-necessary */
3647 E1000_WRITE_FLUSH(hw);
3648#ifdef CONFIG_E1000_NAPI
3649 /* Interrupt Auto-Mask (IAM)...upon writing ICR, interrupts are
3650 * masked. No need for the IMC write, but it does mean we
3651 * should account for it ASAP. */
3652 atomic_inc(&adapter->irq_sem);
3653#endif
3654 }
3655
3656#ifdef CONFIG_E1000_NAPI
835bb129
JB		 3657 if (likely(netif_rx_schedule_prep(netdev))) {
3658 adapter->total_tx_bytes = 0;
3659 adapter->total_tx_packets = 0;
3660 adapter->total_rx_bytes = 0;
3661 adapter->total_rx_packets = 0;
9ac98284 3662 __netif_rx_schedule(netdev);
835bb129 3663 } else
9ac98284
JB		 3664 e1000_irq_enable(adapter);
3665#else
835bb129
JB		 3666 adapter->total_tx_bytes = 0;
3667 adapter->total_rx_bytes = 0;
3668 adapter->total_tx_packets = 0;
3669 adapter->total_rx_packets = 0;
3670
9ac98284
JB		 3671 for (i = 0; i < E1000_MAX_INTR; i++)
3672 if (unlikely(!adapter->clean_rx(adapter, adapter->rx_ring) &
3673 !e1000_clean_tx_irq(adapter, adapter->tx_ring)))
3674 break;
835bb129
JB		 3675
3676 if (likely(adapter->itr_setting & 3))
3677 e1000_set_itr(adapter);
9ac98284
JB		 3678#endif
3679
3680 return IRQ_HANDLED;
3681}
3682#endif
1da177e4
LT		 3683
3684/**
3685 * e1000_intr - Interrupt Handler
3686 * @irq: interrupt number
3687 * @data: pointer to a network interface device structure
1da177e4
LT		 3688 **/
3689
3690static irqreturn_t
7d12e780 3691e1000_intr(int irq, void *data)
1da177e4
LT		 3692{
3693 struct net_device *netdev = data;
60490fe0 3694 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 3695 struct e1000_hw *hw = &adapter->hw;
87041639 3696 uint32_t rctl, icr = E1000_READ_REG(hw, ICR);
1e613fd9 3697#ifndef CONFIG_E1000_NAPI
581d708e 3698 int i;
835bb129
JB		 3699#endif
3700 if (unlikely(!icr))
3701 return IRQ_NONE; /* Not our interrupt */
3702
3703#ifdef CONFIG_E1000_NAPI
3704 /* IMS will not auto-mask if INT_ASSERTED is not set, and if it is
3705 * not set, then the adapter didn't send an interrupt */
3706 if (unlikely(hw->mac_type >= e1000_82571 &&
3707 !(icr & E1000_ICR_INT_ASSERTED)))
3708 return IRQ_NONE;
3709
1e613fd9
JK		 3710 /* Interrupt Auto-Mask...upon reading ICR,
3711 * interrupts are masked. No need for the
3712 * IMC write, but it does mean we should
3713 * account for it ASAP. */
3714 if (likely(hw->mac_type >= e1000_82571))
3715 atomic_inc(&adapter->irq_sem);
be2b28ed 3716#endif
1da177e4 3717
96838a40 3718 if (unlikely(icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC))) {
1da177e4 3719 hw->get_link_status = 1;
87041639
JK		 3720 /* 80003ES2LAN workaround--
3721 * For packet buffer work-around on link down event;
3722 * disable receives here in the ISR and
3723 * reset adapter in watchdog
3724 */
3725 if (netif_carrier_ok(netdev) &&
3726 (adapter->hw.mac_type == e1000_80003es2lan)) {
3727 /* disable receives */
3728 rctl = E1000_READ_REG(hw, RCTL);
3729 E1000_WRITE_REG(hw, RCTL, rctl & ~E1000_RCTL_EN);
3730 }
1314bbf3
AK		 3731 /* guard against interrupt when we're going down */
3732 if (!test_bit(__E1000_DOWN, &adapter->flags))
3733 mod_timer(&adapter->watchdog_timer, jiffies + 1);
1da177e4
LT		 3734 }
3735
3736#ifdef CONFIG_E1000_NAPI
1e613fd9 3737 if (unlikely(hw->mac_type < e1000_82571)) {
835bb129 3738 /* disable interrupts, without the synchronize_irq bit */
1e613fd9
JK		 3739 atomic_inc(&adapter->irq_sem);
3740 E1000_WRITE_REG(hw, IMC, ~0);
3741 E1000_WRITE_FLUSH(hw);
3742 }
835bb129
JB		 3743 if (likely(netif_rx_schedule_prep(netdev))) {
3744 adapter->total_tx_bytes = 0;
3745 adapter->total_tx_packets = 0;
3746 adapter->total_rx_bytes = 0;
3747 adapter->total_rx_packets = 0;
d3d9e484 3748 __netif_rx_schedule(netdev);
835bb129 3749 } else
90fb5135
AK		 3750 /* this really should not happen! if it does it is basically a
3751 * bug, but not a hard error, so enable ints and continue */
581d708e 3752 e1000_irq_enable(adapter);
c1605eb3 3753#else
1da177e4 3754 /* Writing IMC and IMS is needed for 82547.
96838a40
JB		 3755 * Due to Hub Link bus being occupied, an interrupt
3756 * de-assertion message is not able to be sent.
3757 * When an interrupt assertion message is generated later,
3758 * two messages are re-ordered and sent out.
3759 * That causes APIC to think 82547 is in de-assertion
3760 * state, while 82547 is in assertion state, resulting
3761 * in dead lock. Writing IMC forces 82547 into
3762 * de-assertion state.
3763 */
3764 if (hw->mac_type == e1000_82547 || hw->mac_type == e1000_82547_rev_2) {
1da177e4 3765 atomic_inc(&adapter->irq_sem);
2648345f 3766 E1000_WRITE_REG(hw, IMC, ~0);
1da177e4
LT		 3767 }
3768
835bb129
JB		 3769 adapter->total_tx_bytes = 0;
3770 adapter->total_rx_bytes = 0;
3771 adapter->total_tx_packets = 0;
3772 adapter->total_rx_packets = 0;
3773
96838a40
JB		 3774 for (i = 0; i < E1000_MAX_INTR; i++)
3775 if (unlikely(!adapter->clean_rx(adapter, adapter->rx_ring) &
581d708e 3776 !e1000_clean_tx_irq(adapter, adapter->tx_ring)))
1da177e4
LT		 3777 break;
3778
835bb129
JB		 3779 if (likely(adapter->itr_setting & 3))
3780 e1000_set_itr(adapter);
3781
96838a40 3782 if (hw->mac_type == e1000_82547 || hw->mac_type == e1000_82547_rev_2)
1da177e4 3783 e1000_irq_enable(adapter);
581d708e 3784
c1605eb3 3785#endif
1da177e4
LT		 3786 return IRQ_HANDLED;
3787}
3788
3789#ifdef CONFIG_E1000_NAPI
3790/**
3791 * e1000_clean - NAPI Rx polling callback
3792 * @adapter: board private structure
3793 **/
3794
3795static int
581d708e 3796e1000_clean(struct net_device *poll_dev, int *budget)
1da177e4 3797{
581d708e
MC		 3798 struct e1000_adapter *adapter;
3799 int work_to_do = min(*budget, poll_dev->quota);
d3d9e484 3800 int tx_cleaned = 0, work_done = 0;
581d708e
MC		 3801
3802 /* Must NOT use netdev_priv macro here. */
3803 adapter = poll_dev->priv;
3804
3805 /* Keep link state information with original netdev */
d3d9e484 3806 if (!netif_carrier_ok(poll_dev))
581d708e 3807 goto quit_polling;
2648345f 3808
d3d9e484
AK		 3809 /* e1000_clean is called per-cpu. This lock protects
3810 * tx_ring[0] from being cleaned by multiple cpus
3811 * simultaneously. A failure obtaining the lock means
3812 * tx_ring[0] is currently being cleaned anyway. */
3813 if (spin_trylock(&adapter->tx_queue_lock)) {
3814 tx_cleaned = e1000_clean_tx_irq(adapter,
3815 &adapter->tx_ring[0]);
3816 spin_unlock(&adapter->tx_queue_lock);
581d708e
MC		 3817 }
3818
d3d9e484 3819 adapter->clean_rx(adapter, &adapter->rx_ring[0],
581d708e 3820 &work_done, work_to_do);
1da177e4
LT		 3821
3822 *budget -= work_done;
581d708e 3823 poll_dev->quota -= work_done;
96838a40 3824
2b02893e 3825 /* If no Tx and not enough Rx work done, exit the polling mode */
96838a40 3826 if ((!tx_cleaned && (work_done == 0)) ||
d3d9e484 3827 !netif_running(poll_dev)) {
581d708e 3828quit_polling:
835bb129
JB		 3829 if (likely(adapter->itr_setting & 3))
3830 e1000_set_itr(adapter);
581d708e 3831 netif_rx_complete(poll_dev);
1da177e4
LT		 3832 e1000_irq_enable(adapter);
3833 return 0;
3834 }
3835
3836 return 1;
3837}
3838
3839#endif
3840/**
3841 * e1000_clean_tx_irq - Reclaim resources after transmit completes
3842 * @adapter: board private structure
3843 **/
3844
3845static boolean_t
581d708e
MC		 3846e1000_clean_tx_irq(struct e1000_adapter *adapter,
3847 struct e1000_tx_ring *tx_ring)
1da177e4 3848{
1da177e4
LT		 3849 struct net_device *netdev = adapter->netdev;
3850 struct e1000_tx_desc *tx_desc, *eop_desc;
3851 struct e1000_buffer *buffer_info;
3852 unsigned int i, eop;
2a1af5d7
JK		 3853#ifdef CONFIG_E1000_NAPI
3854 unsigned int count = 0;
3855#endif
1da177e4 3856 boolean_t cleaned = FALSE;
835bb129 3857 unsigned int total_tx_bytes=0, total_tx_packets=0;
1da177e4
LT		 3858
3859 i = tx_ring->next_to_clean;
3860 eop = tx_ring->buffer_info[i].next_to_watch;
3861 eop_desc = E1000_TX_DESC(*tx_ring, eop);
3862
581d708e 3863 while (eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) {
96838a40 3864 for (cleaned = FALSE; !cleaned; ) {
1da177e4
LT		 3865 tx_desc = E1000_TX_DESC(*tx_ring, i);
3866 buffer_info = &tx_ring->buffer_info[i];
3867 cleaned = (i == eop);
3868
835bb129
JB		 3869 if (cleaned) {
3870 /* this packet count is wrong for TSO but has a
3871 * tendency to make dynamic ITR change more
3872 * towards bulk */
3873 total_tx_packets++;
3874 total_tx_bytes += buffer_info->skb->len;
3875 }
fd803241 3876 e1000_unmap_and_free_tx_resource(adapter, buffer_info);
a9ebadd6 3877 tx_desc->upper.data = 0;
1da177e4 3878
96838a40 3879 if (unlikely(++i == tx_ring->count)) i = 0;
1da177e4 3880 }
581d708e 3881
1da177e4
LT		 3882 eop = tx_ring->buffer_info[i].next_to_watch;
3883 eop_desc = E1000_TX_DESC(*tx_ring, eop);
2a1af5d7
JK		 3884#ifdef CONFIG_E1000_NAPI
3885#define E1000_TX_WEIGHT 64
3886 /* weight of a sort for tx, to avoid endless transmit cleanup */
3887 if (count++ == E1000_TX_WEIGHT) break;
3888#endif
1da177e4
LT		 3889 }
3890
3891 tx_ring->next_to_clean = i;
3892
77b2aad5 3893#define TX_WAKE_THRESHOLD 32
65c7973f
JB		 3894 if (unlikely(cleaned && netif_carrier_ok(netdev) &&
3895 E1000_DESC_UNUSED(tx_ring) >= TX_WAKE_THRESHOLD)) {
3896 /* Make sure that anybody stopping the queue after this
3897 * sees the new next_to_clean.
3898 */
3899 smp_mb();
fcfb1224 3900 if (netif_queue_stopped(netdev)) {
77b2aad5 3901 netif_wake_queue(netdev);
fcfb1224
JB		 3902 ++adapter->restart_queue;
3903 }
77b2aad5 3904 }
2648345f 3905
581d708e 3906 if (adapter->detect_tx_hung) {
2648345f 3907 /* Detect a transmit hang in hardware, this serializes the
1da177e4
LT		 3908 * check with the clearing of time_stamp and movement of i */
3909 adapter->detect_tx_hung = FALSE;
392137fa
JK		 3910 if (tx_ring->buffer_info[eop].dma &&
3911 time_after(jiffies, tx_ring->buffer_info[eop].time_stamp +
7e6c9861 3912 (adapter->tx_timeout_factor * HZ))
70b8f1e1 3913 && !(E1000_READ_REG(&adapter->hw, STATUS) &
392137fa 3914 E1000_STATUS_TXOFF)) {
70b8f1e1
MC		 3915
3916 /* detected Tx unit hang */
c6963ef5 3917 DPRINTK(DRV, ERR, "Detected Tx Unit Hang\n"
7bfa4816 3918 " Tx Queue <%lu>\n"
70b8f1e1
MC		 3919 " TDH <%x>\n"
3920 " TDT <%x>\n"
3921 " next_to_use <%x>\n"
3922 " next_to_clean <%x>\n"
3923 "buffer_info[next_to_clean]\n"
70b8f1e1
MC		 3924 " time_stamp <%lx>\n"
3925 " next_to_watch <%x>\n"
3926 " jiffies <%lx>\n"
3927 " next_to_watch.status <%x>\n",
7bfa4816
JK		 3928 (unsigned long)((tx_ring - adapter->tx_ring) /
3929 sizeof(struct e1000_tx_ring)),
581d708e
MC		 3930 readl(adapter->hw.hw_addr + tx_ring->tdh),
3931 readl(adapter->hw.hw_addr + tx_ring->tdt),
70b8f1e1 3932 tx_ring->next_to_use,
392137fa
JK		 3933 tx_ring->next_to_clean,
3934 tx_ring->buffer_info[eop].time_stamp,
70b8f1e1
MC		 3935 eop,
3936 jiffies,
3937 eop_desc->upper.fields.status);
1da177e4 3938 netif_stop_queue(netdev);
70b8f1e1 3939 }
1da177e4 3940 }
835bb129
JB		 3941 adapter->total_tx_bytes += total_tx_bytes;
3942 adapter->total_tx_packets += total_tx_packets;
1da177e4
LT		 3943 return cleaned;
3944}
3945
3946/**
3947 * e1000_rx_checksum - Receive Checksum Offload for 82543
2d7edb92
MC		 3948 * @adapter: board private structure
3949 * @status_err: receive descriptor status and error fields
3950 * @csum: receive descriptor csum field
3951 * @sk_buff: socket buffer with received data
1da177e4
LT		 3952 **/
3953
e619d523 3954static void
1da177e4 3955e1000_rx_checksum(struct e1000_adapter *adapter,
2d7edb92
MC		 3956 uint32_t status_err, uint32_t csum,
3957 struct sk_buff *skb)
1da177e4 3958{
2d7edb92
MC		 3959 uint16_t status = (uint16_t)status_err;
3960 uint8_t errors = (uint8_t)(status_err >> 24);
3961 skb->ip_summed = CHECKSUM_NONE;
3962
1da177e4 3963 /* 82543 or newer only */
96838a40 3964 if (unlikely(adapter->hw.mac_type < e1000_82543)) return;
1da177e4 3965 /* Ignore Checksum bit is set */
96838a40 3966 if (unlikely(status & E1000_RXD_STAT_IXSM)) return;
2d7edb92 3967 /* TCP/UDP checksum error bit is set */
96838a40 3968 if (unlikely(errors & E1000_RXD_ERR_TCPE)) {
1da177e4 3969 /* let the stack verify checksum errors */
1da177e4 3970 adapter->hw_csum_err++;
2d7edb92
MC		 3971 return;
3972 }
3973 /* TCP/UDP Checksum has not been calculated */
96838a40
JB		 3974 if (adapter->hw.mac_type <= e1000_82547_rev_2) {
3975 if (!(status & E1000_RXD_STAT_TCPCS))
2d7edb92 3976 return;
1da177e4 3977 } else {
96838a40 3978 if (!(status & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS)))
2d7edb92
MC		 3979 return;
3980 }
3981 /* It must be a TCP or UDP packet with a valid checksum */
3982 if (likely(status & E1000_RXD_STAT_TCPCS)) {
1da177e4
LT		 3983 /* TCP checksum is good */
3984 skb->ip_summed = CHECKSUM_UNNECESSARY;
2d7edb92
MC		 3985 } else if (adapter->hw.mac_type > e1000_82547_rev_2) {
3986 /* IP fragment with UDP payload */
3987 /* Hardware complements the payload checksum, so we undo it
3988 * and then put the value in host order for further stack use.
3989 */
3990 csum = ntohl(csum ^ 0xFFFF);
3991 skb->csum = csum;
84fa7933 3992 skb->ip_summed = CHECKSUM_COMPLETE;
1da177e4 3993 }
2d7edb92 3994 adapter->hw_csum_good++;
1da177e4
LT		 3995}
3996
3997/**
2d7edb92 3998 * e1000_clean_rx_irq - Send received data up the network stack; legacy
1da177e4
LT		 3999 * @adapter: board private structure
4000 **/
4001
4002static boolean_t
4003#ifdef CONFIG_E1000_NAPI
581d708e
MC		 4004e1000_clean_rx_irq(struct e1000_adapter *adapter,
4005 struct e1000_rx_ring *rx_ring,
4006 int *work_done, int work_to_do)
1da177e4 4007#else
581d708e
MC		 4008e1000_clean_rx_irq(struct e1000_adapter *adapter,
4009 struct e1000_rx_ring *rx_ring)
1da177e4
LT		 4010#endif
4011{
1da177e4
LT		 4012 struct net_device *netdev = adapter->netdev;
4013 struct pci_dev *pdev = adapter->pdev;
86c3d59f
JB		 4014 struct e1000_rx_desc *rx_desc, *next_rxd;
4015 struct e1000_buffer *buffer_info, *next_buffer;
1da177e4
LT		 4016 unsigned long flags;
4017 uint32_t length;
4018 uint8_t last_byte;
4019 unsigned int i;
72d64a43 4020 int cleaned_count = 0;
a1415ee6 4021 boolean_t cleaned = FALSE;
835bb129 4022 unsigned int total_rx_bytes=0, total_rx_packets=0;
1da177e4
LT		 4023
4024 i = rx_ring->next_to_clean;
4025 rx_desc = E1000_RX_DESC(*rx_ring, i);
b92ff8ee 4026 buffer_info = &rx_ring->buffer_info[i];
1da177e4 4027
b92ff8ee 4028 while (rx_desc->status & E1000_RXD_STAT_DD) {
24f476ee 4029 struct sk_buff *skb;
a292ca6e 4030 u8 status;
90fb5135 4031
1da177e4 4032#ifdef CONFIG_E1000_NAPI
96838a40 4033 if (*work_done >= work_to_do)
1da177e4
LT		 4034 break;
4035 (*work_done)++;
4036#endif
a292ca6e 4037 status = rx_desc->status;
b92ff8ee 4038 skb = buffer_info->skb;
86c3d59f
JB		 4039 buffer_info->skb = NULL;
4040
30320be8
JK		 4041 prefetch(skb->data - NET_IP_ALIGN);
4042
86c3d59f
JB		 4043 if (++i == rx_ring->count) i = 0;
4044 next_rxd = E1000_RX_DESC(*rx_ring, i);
30320be8
JK		 4045 prefetch(next_rxd);
4046
86c3d59f 4047 next_buffer = &rx_ring->buffer_info[i];
86c3d59f 4048
72d64a43
JK		 4049 cleaned = TRUE;
4050 cleaned_count++;
a292ca6e
JK		 4051 pci_unmap_single(pdev,
4052 buffer_info->dma,
4053 buffer_info->length,
1da177e4
LT		 4054 PCI_DMA_FROMDEVICE);
4055
1da177e4
LT		 4056 length = le16_to_cpu(rx_desc->length);
4057
a1415ee6
JK		 4058 if (unlikely(!(status & E1000_RXD_STAT_EOP))) {
4059 /* All receives must fit into a single buffer */
4060 E1000_DBG("%s: Receive packet consumed multiple"
4061 " buffers\n", netdev->name);
864c4e45 4062 /* recycle */
8fc897b0 4063 buffer_info->skb = skb;
1da177e4
LT		 4064 goto next_desc;
4065 }
4066
96838a40 4067 if (unlikely(rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK)) {
1da177e4 4068 last_byte = *(skb->data + length - 1);
b92ff8ee 4069 if (TBI_ACCEPT(&adapter->hw, status,
1da177e4
LT		 4070 rx_desc->errors, length, last_byte)) {
4071 spin_lock_irqsave(&adapter->stats_lock, flags);
a292ca6e
JK		 4072 e1000_tbi_adjust_stats(&adapter->hw,
4073 &adapter->stats,
1da177e4
LT		 4074 length, skb->data);
4075 spin_unlock_irqrestore(&adapter->stats_lock,
4076 flags);
4077 length--;
4078 } else {
9e2feace
AK		 4079 /* recycle */
4080 buffer_info->skb = skb;
1da177e4
LT		 4081 goto next_desc;
4082 }
1cb5821f 4083 }
1da177e4 4084
d2a1e213
JB		 4085 /* adjust length to remove Ethernet CRC, this must be
4086 * done after the TBI_ACCEPT workaround above */
4087 length -= 4;
4088
835bb129
JB		 4089 /* probably a little skewed due to removing CRC */
4090 total_rx_bytes += length;
4091 total_rx_packets++;
4092
a292ca6e
JK		 4093 /* code added for copybreak, this should improve
4094 * performance for small packets with large amounts
4095 * of reassembly being done in the stack */
4096#define E1000_CB_LENGTH 256
a1415ee6 4097 if (length < E1000_CB_LENGTH) {
a292ca6e 4098 struct sk_buff *new_skb =
87f5032e 4099 netdev_alloc_skb(netdev, length + NET_IP_ALIGN);
a292ca6e
JK		 4100 if (new_skb) {
4101 skb_reserve(new_skb, NET_IP_ALIGN);
a292ca6e
JK		 4102 memcpy(new_skb->data - NET_IP_ALIGN,
4103 skb->data - NET_IP_ALIGN,
4104 length + NET_IP_ALIGN);
4105 /* save the skb in buffer_info as good */
4106 buffer_info->skb = skb;
4107 skb = new_skb;
a292ca6e 4108 }
996695de
AK		 4109 /* else just continue with the old one */
4110 }
a292ca6e 4111 /* end copybreak code */
996695de 4112 skb_put(skb, length);
1da177e4
LT		 4113
4114 /* Receive Checksum Offload */
a292ca6e
JK		 4115 e1000_rx_checksum(adapter,
4116 (uint32_t)(status) |
2d7edb92 4117 ((uint32_t)(rx_desc->errors) << 24),
c3d7a3a4 4118 le16_to_cpu(rx_desc->csum), skb);
96838a40 4119
1da177e4
LT		 4120 skb->protocol = eth_type_trans(skb, netdev);
4121#ifdef CONFIG_E1000_NAPI
96838a40 4122 if (unlikely(adapter->vlgrp &&
a292ca6e 4123 (status & E1000_RXD_STAT_VP))) {
1da177e4 4124 vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
2d7edb92
MC		 4125 le16_to_cpu(rx_desc->special) &
4126 E1000_RXD_SPC_VLAN_MASK);
1da177e4
LT		 4127 } else {
4128 netif_receive_skb(skb);
4129 }
4130#else /* CONFIG_E1000_NAPI */
96838a40 4131 if (unlikely(adapter->vlgrp &&
b92ff8ee 4132 (status & E1000_RXD_STAT_VP))) {
1da177e4
LT		 4133 vlan_hwaccel_rx(skb, adapter->vlgrp,
4134 le16_to_cpu(rx_desc->special) &
4135 E1000_RXD_SPC_VLAN_MASK);
4136 } else {
4137 netif_rx(skb);
4138 }
4139#endif /* CONFIG_E1000_NAPI */
4140 netdev->last_rx = jiffies;
4141
4142next_desc:
4143 rx_desc->status = 0;
1da177e4 4144
72d64a43
JK		 4145 /* return some buffers to hardware, one at a time is too slow */
4146 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
4147 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
4148 cleaned_count = 0;
4149 }
4150
30320be8 4151 /* use prefetched values */
86c3d59f
JB		 4152 rx_desc = next_rxd;
4153 buffer_info = next_buffer;
1da177e4 4154 }
1da177e4 4155 rx_ring->next_to_clean = i;
72d64a43
JK		 4156
4157 cleaned_count = E1000_DESC_UNUSED(rx_ring);
4158 if (cleaned_count)
4159 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
2d7edb92 4160
835bb129
JB		 4161 adapter->total_rx_packets += total_rx_packets;
4162 adapter->total_rx_bytes += total_rx_bytes;
2d7edb92
MC		 4163 return cleaned;
4164}
4165
4166/**
4167 * e1000_clean_rx_irq_ps - Send received data up the network stack; packet split
4168 * @adapter: board private structure
4169 **/
4170
4171static boolean_t
4172#ifdef CONFIG_E1000_NAPI
581d708e
MC		 4173e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
4174 struct e1000_rx_ring *rx_ring,
4175 int *work_done, int work_to_do)
2d7edb92 4176#else
581d708e
MC		 4177e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
4178 struct e1000_rx_ring *rx_ring)
2d7edb92
MC		 4179#endif
4180{
86c3d59f 4181 union e1000_rx_desc_packet_split *rx_desc, *next_rxd;
2d7edb92
MC		 4182 struct net_device *netdev = adapter->netdev;
4183 struct pci_dev *pdev = adapter->pdev;
86c3d59f 4184 struct e1000_buffer *buffer_info, *next_buffer;
2d7edb92
MC		 4185 struct e1000_ps_page *ps_page;
4186 struct e1000_ps_page_dma *ps_page_dma;
24f476ee 4187 struct sk_buff *skb;
2d7edb92
MC		 4188 unsigned int i, j;
4189 uint32_t length, staterr;
72d64a43 4190 int cleaned_count = 0;
2d7edb92 4191 boolean_t cleaned = FALSE;
835bb129 4192 unsigned int total_rx_bytes=0, total_rx_packets=0;
2d7edb92
MC		 4193
4194 i = rx_ring->next_to_clean;
4195 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
683a38f3 4196 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
9e2feace 4197 buffer_info = &rx_ring->buffer_info[i];
2d7edb92 4198
96838a40 4199 while (staterr & E1000_RXD_STAT_DD) {
2d7edb92
MC		 4200 ps_page = &rx_ring->ps_page[i];
4201 ps_page_dma = &rx_ring->ps_page_dma[i];
4202#ifdef CONFIG_E1000_NAPI
96838a40 4203 if (unlikely(*work_done >= work_to_do))
2d7edb92
MC		 4204 break;
4205 (*work_done)++;
4206#endif
86c3d59f
JB		 4207 skb = buffer_info->skb;
4208
30320be8
JK		 4209 /* in the packet split case this is header only */
4210 prefetch(skb->data - NET_IP_ALIGN);
4211
86c3d59f
JB		 4212 if (++i == rx_ring->count) i = 0;
4213 next_rxd = E1000_RX_DESC_PS(*rx_ring, i);
30320be8
JK		 4214 prefetch(next_rxd);
4215
86c3d59f 4216 next_buffer = &rx_ring->buffer_info[i];
86c3d59f 4217
2d7edb92 4218 cleaned = TRUE;
72d64a43 4219 cleaned_count++;
2d7edb92
MC		 4220 pci_unmap_single(pdev, buffer_info->dma,
4221 buffer_info->length,
4222 PCI_DMA_FROMDEVICE);
4223
96838a40 4224 if (unlikely(!(staterr & E1000_RXD_STAT_EOP))) {
2d7edb92
MC		 4225 E1000_DBG("%s: Packet Split buffers didn't pick up"
4226 " the full packet\n", netdev->name);
4227 dev_kfree_skb_irq(skb);
4228 goto next_desc;
4229 }
1da177e4 4230
96838a40 4231 if (unlikely(staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK)) {
2d7edb92
MC		 4232 dev_kfree_skb_irq(skb);
4233 goto next_desc;
4234 }
4235
4236 length = le16_to_cpu(rx_desc->wb.middle.length0);
4237
96838a40 4238 if (unlikely(!length)) {
2d7edb92
MC		 4239 E1000_DBG("%s: Last part of the packet spanning"
4240 " multiple descriptors\n", netdev->name);
4241 dev_kfree_skb_irq(skb);
4242 goto next_desc;
4243 }
4244
4245 /* Good Receive */
4246 skb_put(skb, length);
4247
dc7c6add
JK		 4248 {
4249 /* this looks ugly, but it seems compiler issues make it
4250 more efficient than reusing j */
4251 int l1 = le16_to_cpu(rx_desc->wb.upper.length[0]);
4252
4253 /* page alloc/put takes too long and effects small packet
4254 * throughput, so unsplit small packets and save the alloc/put*/
9e2feace 4255 if (l1 && ((length + l1) <= adapter->rx_ps_bsize0)) {
dc7c6add 4256 u8 *vaddr;
76c224bc 4257 /* there is no documentation about how to call
dc7c6add
JK		 4258 * kmap_atomic, so we can't hold the mapping
4259 * very long */
4260 pci_dma_sync_single_for_cpu(pdev,
4261 ps_page_dma->ps_page_dma[0],
4262 PAGE_SIZE,
4263 PCI_DMA_FROMDEVICE);
4264 vaddr = kmap_atomic(ps_page->ps_page[0],
4265 KM_SKB_DATA_SOFTIRQ);
4266 memcpy(skb->tail, vaddr, l1);
4267 kunmap_atomic(vaddr, KM_SKB_DATA_SOFTIRQ);
4268 pci_dma_sync_single_for_device(pdev,
4269 ps_page_dma->ps_page_dma[0],
4270 PAGE_SIZE, PCI_DMA_FROMDEVICE);
f235a2ab
AK		 4271 /* remove the CRC */
4272 l1 -= 4;
dc7c6add 4273 skb_put(skb, l1);
dc7c6add
JK		 4274 goto copydone;
4275 } /* if */
4276 }
90fb5135 4277
96838a40 4278 for (j = 0; j < adapter->rx_ps_pages; j++) {
30320be8 4279 if (!(length= le16_to_cpu(rx_desc->wb.upper.length[j])))
2d7edb92 4280 break;
2d7edb92
MC		 4281 pci_unmap_page(pdev, ps_page_dma->ps_page_dma[j],
4282 PAGE_SIZE, PCI_DMA_FROMDEVICE);
4283 ps_page_dma->ps_page_dma[j] = 0;
329bfd0b
JK		 4284 skb_fill_page_desc(skb, j, ps_page->ps_page[j], 0,
4285 length);
2d7edb92 4286 ps_page->ps_page[j] = NULL;
2d7edb92
MC		 4287 skb->len += length;
4288 skb->data_len += length;
5d51b80f 4289 skb->truesize += length;
2d7edb92
MC		 4290 }
4291
f235a2ab
AK		 4292 /* strip the ethernet crc, problem is we're using pages now so
4293 * this whole operation can get a little cpu intensive */
4294 pskb_trim(skb, skb->len - 4);
4295
dc7c6add 4296copydone:
835bb129
JB		 4297 total_rx_bytes += skb->len;
4298 total_rx_packets++;
4299
2d7edb92 4300 e1000_rx_checksum(adapter, staterr,
c3d7a3a4 4301 le16_to_cpu(rx_desc->wb.lower.hi_dword.csum_ip.csum), skb);
2d7edb92
MC		 4302 skb->protocol = eth_type_trans(skb, netdev);
4303
96838a40 4304 if (likely(rx_desc->wb.upper.header_status &
c3d7a3a4 4305 cpu_to_le16(E1000_RXDPS_HDRSTAT_HDRSP)))
e4c811c9 4306 adapter->rx_hdr_split++;
2d7edb92 4307#ifdef CONFIG_E1000_NAPI
96838a40 4308 if (unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) {
2d7edb92 4309 vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
683a38f3
MC		 4310 le16_to_cpu(rx_desc->wb.middle.vlan) &
4311 E1000_RXD_SPC_VLAN_MASK);
2d7edb92
MC		 4312 } else {
4313 netif_receive_skb(skb);
4314 }
4315#else /* CONFIG_E1000_NAPI */
96838a40 4316 if (unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) {
2d7edb92 4317 vlan_hwaccel_rx(skb, adapter->vlgrp,
683a38f3
MC		 4318 le16_to_cpu(rx_desc->wb.middle.vlan) &
4319 E1000_RXD_SPC_VLAN_MASK);
2d7edb92
MC		 4320 } else {
4321 netif_rx(skb);
4322 }
4323#endif /* CONFIG_E1000_NAPI */
4324 netdev->last_rx = jiffies;
4325
4326next_desc:
c3d7a3a4 4327 rx_desc->wb.middle.status_error &= cpu_to_le32(~0xFF);
2d7edb92 4328 buffer_info->skb = NULL;
2d7edb92 4329
72d64a43
JK		 4330 /* return some buffers to hardware, one at a time is too slow */
4331 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
4332 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
4333 cleaned_count = 0;
4334 }
4335
30320be8 4336 /* use prefetched values */
86c3d59f
JB		 4337 rx_desc = next_rxd;
4338 buffer_info = next_buffer;
4339
683a38f3 4340 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
2d7edb92
MC		 4341 }
4342 rx_ring->next_to_clean = i;
72d64a43
JK		 4343
4344 cleaned_count = E1000_DESC_UNUSED(rx_ring);
4345 if (cleaned_count)
4346 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
1da177e4 4347
835bb129
JB		 4348 adapter->total_rx_packets += total_rx_packets;
4349 adapter->total_rx_bytes += total_rx_bytes;
1da177e4
LT		 4350 return cleaned;
4351}
4352
4353/**
2d7edb92 4354 * e1000_alloc_rx_buffers - Replace used receive buffers; legacy & extended
1da177e4
LT		 4355 * @adapter: address of board private structure
4356 **/
4357
4358static void
581d708e 4359e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
72d64a43 4360 struct e1000_rx_ring *rx_ring,
a292ca6e 4361 int cleaned_count)
1da177e4 4362{
1da177e4
LT		 4363 struct net_device *netdev = adapter->netdev;
4364 struct pci_dev *pdev = adapter->pdev;
4365 struct e1000_rx_desc *rx_desc;
4366 struct e1000_buffer *buffer_info;
4367 struct sk_buff *skb;
2648345f
MC		 4368 unsigned int i;
4369 unsigned int bufsz = adapter->rx_buffer_len + NET_IP_ALIGN;
1da177e4
LT		 4370
4371 i = rx_ring->next_to_use;
4372 buffer_info = &rx_ring->buffer_info[i];
4373
a292ca6e 4374 while (cleaned_count--) {
ca6f7224
CH		 4375 skb = buffer_info->skb;
4376 if (skb) {
a292ca6e
JK		 4377 skb_trim(skb, 0);
4378 goto map_skb;
4379 }
4380
ca6f7224 4381 skb = netdev_alloc_skb(netdev, bufsz);
96838a40 4382 if (unlikely(!skb)) {
1da177e4 4383 /* Better luck next round */
72d64a43 4384 adapter->alloc_rx_buff_failed++;
1da177e4
LT		 4385 break;
4386 }
4387
2648345f 4388 /* Fix for errata 23, can't cross 64kB boundary */
1da177e4
LT		 4389 if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
4390 struct sk_buff *oldskb = skb;
2648345f
MC		 4391 DPRINTK(RX_ERR, ERR, "skb align check failed: %u bytes "
4392 "at %p\n", bufsz, skb->data);
4393 /* Try again, without freeing the previous */
87f5032e 4394 skb = netdev_alloc_skb(netdev, bufsz);
2648345f 4395 /* Failed allocation, critical failure */
1da177e4
LT		 4396 if (!skb) {
4397 dev_kfree_skb(oldskb);
4398 break;
4399 }
2648345f 4400
1da177e4
LT		 4401 if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
4402 /* give up */
4403 dev_kfree_skb(skb);
4404 dev_kfree_skb(oldskb);
4405 break; /* while !buffer_info->skb */
1da177e4 4406 }
ca6f7224
CH		 4407
4408 /* Use new allocation */
4409 dev_kfree_skb(oldskb);
1da177e4 4410 }
1da177e4
LT		 4411 /* Make buffer alignment 2 beyond a 16 byte boundary
4412 * this will result in a 16 byte aligned IP header after
4413 * the 14 byte MAC header is removed
4414 */
4415 skb_reserve(skb, NET_IP_ALIGN);
4416
1da177e4
LT		 4417 buffer_info->skb = skb;
4418 buffer_info->length = adapter->rx_buffer_len;
a292ca6e 4419map_skb:
1da177e4
LT		 4420 buffer_info->dma = pci_map_single(pdev,
4421 skb->data,
4422 adapter->rx_buffer_len,
4423 PCI_DMA_FROMDEVICE);
4424
2648345f
MC		 4425 /* Fix for errata 23, can't cross 64kB boundary */
4426 if (!e1000_check_64k_bound(adapter,
4427 (void *)(unsigned long)buffer_info->dma,
4428 adapter->rx_buffer_len)) {
4429 DPRINTK(RX_ERR, ERR,
4430 "dma align check failed: %u bytes at %p\n",
4431 adapter->rx_buffer_len,
4432 (void *)(unsigned long)buffer_info->dma);
1da177e4
LT		 4433 dev_kfree_skb(skb);
4434 buffer_info->skb = NULL;
4435
2648345f 4436 pci_unmap_single(pdev, buffer_info->dma,
1da177e4
LT		 4437 adapter->rx_buffer_len,
4438 PCI_DMA_FROMDEVICE);
4439
4440 break; /* while !buffer_info->skb */
4441 }
1da177e4
LT		 4442 rx_desc = E1000_RX_DESC(*rx_ring, i);
4443 rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
4444
96838a40
JB		 4445 if (unlikely(++i == rx_ring->count))
4446 i = 0;
1da177e4
LT		 4447 buffer_info = &rx_ring->buffer_info[i];
4448 }
4449
b92ff8ee
JB		 4450 if (likely(rx_ring->next_to_use != i)) {
4451 rx_ring->next_to_use = i;
4452 if (unlikely(i-- == 0))
4453 i = (rx_ring->count - 1);
4454
4455 /* Force memory writes to complete before letting h/w
4456 * know there are new descriptors to fetch. (Only
4457 * applicable for weak-ordered memory model archs,
4458 * such as IA-64). */
4459 wmb();
4460 writel(i, adapter->hw.hw_addr + rx_ring->rdt);
4461 }
1da177e4
LT		 4462}
4463
2d7edb92
MC		 4464/**
4465 * e1000_alloc_rx_buffers_ps - Replace used receive buffers; packet split
4466 * @adapter: address of board private structure
4467 **/
4468
4469static void
581d708e 4470e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
72d64a43
JK		 4471 struct e1000_rx_ring *rx_ring,
4472 int cleaned_count)
2d7edb92 4473{
2d7edb92
MC		 4474 struct net_device *netdev = adapter->netdev;
4475 struct pci_dev *pdev = adapter->pdev;
4476 union e1000_rx_desc_packet_split *rx_desc;
4477 struct e1000_buffer *buffer_info;
4478 struct e1000_ps_page *ps_page;
4479 struct e1000_ps_page_dma *ps_page_dma;
4480 struct sk_buff *skb;
4481 unsigned int i, j;
4482
4483 i = rx_ring->next_to_use;
4484 buffer_info = &rx_ring->buffer_info[i];
4485 ps_page = &rx_ring->ps_page[i];
4486 ps_page_dma = &rx_ring->ps_page_dma[i];
4487
72d64a43 4488 while (cleaned_count--) {
2d7edb92
MC		 4489 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
4490
96838a40 4491 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
e4c811c9
MC		 4492 if (j < adapter->rx_ps_pages) {
4493 if (likely(!ps_page->ps_page[j])) {
4494 ps_page->ps_page[j] =
4495 alloc_page(GFP_ATOMIC);
b92ff8ee
JB		 4496 if (unlikely(!ps_page->ps_page[j])) {
4497 adapter->alloc_rx_buff_failed++;
e4c811c9 4498 goto no_buffers;
b92ff8ee 4499 }
e4c811c9
MC		 4500 ps_page_dma->ps_page_dma[j] =
4501 pci_map_page(pdev,
4502 ps_page->ps_page[j],
4503 0, PAGE_SIZE,
4504 PCI_DMA_FROMDEVICE);
4505 }
4506 /* Refresh the desc even if buffer_addrs didn't
96838a40 4507 * change because each write-back erases
e4c811c9
MC		 4508 * this info.
4509 */
4510 rx_desc->read.buffer_addr[j+1] =
4511 cpu_to_le64(ps_page_dma->ps_page_dma[j]);
4512 } else
4513 rx_desc->read.buffer_addr[j+1] = ~0;
2d7edb92
MC		 4514 }
4515
87f5032e 4516 skb = netdev_alloc_skb(netdev,
90fb5135 4517 adapter->rx_ps_bsize0 + NET_IP_ALIGN);
2d7edb92 4518
b92ff8ee
JB		 4519 if (unlikely(!skb)) {
4520 adapter->alloc_rx_buff_failed++;
2d7edb92 4521 break;
b92ff8ee 4522 }
2d7edb92
MC		 4523
4524 /* Make buffer alignment 2 beyond a 16 byte boundary
4525 * this will result in a 16 byte aligned IP header after
4526 * the 14 byte MAC header is removed
4527 */
4528 skb_reserve(skb, NET_IP_ALIGN);
4529
2d7edb92
MC		 4530 buffer_info->skb = skb;
4531 buffer_info->length = adapter->rx_ps_bsize0;
4532 buffer_info->dma = pci_map_single(pdev, skb->data,
4533 adapter->rx_ps_bsize0,
4534 PCI_DMA_FROMDEVICE);
4535
4536 rx_desc->read.buffer_addr[0] = cpu_to_le64(buffer_info->dma);
4537
96838a40 4538 if (unlikely(++i == rx_ring->count)) i = 0;
2d7edb92
MC		 4539 buffer_info = &rx_ring->buffer_info[i];
4540 ps_page = &rx_ring->ps_page[i];
4541 ps_page_dma = &rx_ring->ps_page_dma[i];
4542 }
4543
4544no_buffers:
b92ff8ee
JB		 4545 if (likely(rx_ring->next_to_use != i)) {
4546 rx_ring->next_to_use = i;
4547 if (unlikely(i-- == 0)) i = (rx_ring->count - 1);
4548
4549 /* Force memory writes to complete before letting h/w
4550 * know there are new descriptors to fetch. (Only
4551 * applicable for weak-ordered memory model archs,
4552 * such as IA-64). */
4553 wmb();
4554 /* Hardware increments by 16 bytes, but packet split
4555 * descriptors are 32 bytes...so we increment tail
4556 * twice as much.
4557 */
4558 writel(i<<1, adapter->hw.hw_addr + rx_ring->rdt);
4559 }
2d7edb92
MC		 4560}
4561
1da177e4
LT		 4562/**
4563 * e1000_smartspeed - Workaround for SmartSpeed on 82541 and 82547 controllers.
4564 * @adapter:
4565 **/
4566
4567static void
4568e1000_smartspeed(struct e1000_adapter *adapter)
4569{
4570 uint16_t phy_status;
4571 uint16_t phy_ctrl;
4572
96838a40 4573 if ((adapter->hw.phy_type != e1000_phy_igp) || !adapter->hw.autoneg ||
1da177e4
LT		 4574 !(adapter->hw.autoneg_advertised & ADVERTISE_1000_FULL))
4575 return;
4576
96838a40 4577 if (adapter->smartspeed == 0) {
1da177e4
LT		 4578 /* If Master/Slave config fault is asserted twice,
4579 * we assume back-to-back */
4580 e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_status);
96838a40 4581 if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
1da177e4 4582 e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_status);
96838a40 4583 if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
1da177e4 4584 e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_ctrl);
96838a40 4585 if (phy_ctrl & CR_1000T_MS_ENABLE) {
1da177e4
LT		 4586 phy_ctrl &= ~CR_1000T_MS_ENABLE;
4587 e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL,
4588 phy_ctrl);
4589 adapter->smartspeed++;
96838a40 4590 if (!e1000_phy_setup_autoneg(&adapter->hw) &&
1da177e4
LT		 4591 !e1000_read_phy_reg(&adapter->hw, PHY_CTRL,
4592 &phy_ctrl)) {
4593 phy_ctrl |= (MII_CR_AUTO_NEG_EN |
4594 MII_CR_RESTART_AUTO_NEG);
4595 e1000_write_phy_reg(&adapter->hw, PHY_CTRL,
4596 phy_ctrl);
4597 }
4598 }
4599 return;
96838a40 4600 } else if (adapter->smartspeed == E1000_SMARTSPEED_DOWNSHIFT) {
1da177e4
LT		 4601 /* If still no link, perhaps using 2/3 pair cable */
4602 e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_ctrl);
4603 phy_ctrl |= CR_1000T_MS_ENABLE;
4604 e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL, phy_ctrl);
96838a40 4605 if (!e1000_phy_setup_autoneg(&adapter->hw) &&
1da177e4
LT		 4606 !e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &phy_ctrl)) {
4607 phy_ctrl |= (MII_CR_AUTO_NEG_EN |
4608 MII_CR_RESTART_AUTO_NEG);
4609 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, phy_ctrl);
4610 }
4611 }
4612 /* Restart process after E1000_SMARTSPEED_MAX iterations */
96838a40 4613 if (adapter->smartspeed++ == E1000_SMARTSPEED_MAX)
1da177e4
LT		 4614 adapter->smartspeed = 0;
4615}
4616
4617/**
4618 * e1000_ioctl -
4619 * @netdev:
4620 * @ifreq:
4621 * @cmd:
4622 **/
4623
4624static int
4625e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
4626{
4627 switch (cmd) {
4628 case SIOCGMIIPHY:
4629 case SIOCGMIIREG:
4630 case SIOCSMIIREG:
4631 return e1000_mii_ioctl(netdev, ifr, cmd);
4632 default:
4633 return -EOPNOTSUPP;
4634 }
4635}
4636
4637/**
4638 * e1000_mii_ioctl -
4639 * @netdev:
4640 * @ifreq:
4641 * @cmd:
4642 **/
4643
4644static int
4645e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
4646{
60490fe0 4647 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 4648 struct mii_ioctl_data *data = if_mii(ifr);
4649 int retval;
4650 uint16_t mii_reg;
4651 uint16_t spddplx;
97876fc6 4652 unsigned long flags;
1da177e4 4653
96838a40 4654 if (adapter->hw.media_type != e1000_media_type_copper)
1da177e4
LT		 4655 return -EOPNOTSUPP;
4656
4657 switch (cmd) {
4658 case SIOCGMIIPHY:
4659 data->phy_id = adapter->hw.phy_addr;
4660 break;
4661 case SIOCGMIIREG:
96838a40 4662 if (!capable(CAP_NET_ADMIN))
1da177e4 4663 return -EPERM;
97876fc6 4664 spin_lock_irqsave(&adapter->stats_lock, flags);
96838a40 4665 if (e1000_read_phy_reg(&adapter->hw, data->reg_num & 0x1F,
97876fc6
MC		 4666 &data->val_out)) {
4667 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1da177e4 4668 return -EIO;
97876fc6
MC		 4669 }
4670 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1da177e4
LT		 4671 break;
4672 case SIOCSMIIREG:
96838a40 4673 if (!capable(CAP_NET_ADMIN))
1da177e4 4674 return -EPERM;
96838a40 4675 if (data->reg_num & ~(0x1F))
1da177e4
LT		 4676 return -EFAULT;
4677 mii_reg = data->val_in;
97876fc6 4678 spin_lock_irqsave(&adapter->stats_lock, flags);
96838a40 4679 if (e1000_write_phy_reg(&adapter->hw, data->reg_num,
97876fc6
MC		 4680 mii_reg)) {
4681 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1da177e4 4682 return -EIO;
97876fc6 4683 }
dc86d32a 4684 if (adapter->hw.media_type == e1000_media_type_copper) {
1da177e4
LT		 4685 switch (data->reg_num) {
4686 case PHY_CTRL:
96838a40 4687 if (mii_reg & MII_CR_POWER_DOWN)
1da177e4 4688 break;
96838a40 4689 if (mii_reg & MII_CR_AUTO_NEG_EN) {
1da177e4
LT		 4690 adapter->hw.autoneg = 1;
4691 adapter->hw.autoneg_advertised = 0x2F;
4692 } else {
4693 if (mii_reg & 0x40)
4694 spddplx = SPEED_1000;
4695 else if (mii_reg & 0x2000)
4696 spddplx = SPEED_100;
4697 else
4698 spddplx = SPEED_10;
4699 spddplx += (mii_reg & 0x100)
cb764326
JK		 4700 ? DUPLEX_FULL :
4701 DUPLEX_HALF;
1da177e4
LT		 4702 retval = e1000_set_spd_dplx(adapter,
4703 spddplx);
96838a40 4704 if (retval) {
97876fc6 4705 spin_unlock_irqrestore(
96838a40 4706 &adapter->stats_lock,
97876fc6 4707 flags);
1da177e4 4708 return retval;
97876fc6 4709 }
1da177e4 4710 }
2db10a08
AK		 4711 if (netif_running(adapter->netdev))
4712 e1000_reinit_locked(adapter);
4713 else
1da177e4
LT		 4714 e1000_reset(adapter);
4715 break;
4716 case M88E1000_PHY_SPEC_CTRL:
4717 case M88E1000_EXT_PHY_SPEC_CTRL:
96838a40 4718 if (e1000_phy_reset(&adapter->hw)) {
97876fc6
MC		 4719 spin_unlock_irqrestore(
4720 &adapter->stats_lock, flags);
1da177e4 4721 return -EIO;
97876fc6 4722 }
1da177e4
LT		 4723 break;
4724 }
4725 } else {
4726 switch (data->reg_num) {
4727 case PHY_CTRL:
96838a40 4728 if (mii_reg & MII_CR_POWER_DOWN)
1da177e4 4729 break;
2db10a08
AK		 4730 if (netif_running(adapter->netdev))
4731 e1000_reinit_locked(adapter);
4732 else
1da177e4
LT		 4733 e1000_reset(adapter);
4734 break;
4735 }
4736 }
97876fc6 4737 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1da177e4
LT		 4738 break;
4739 default:
4740 return -EOPNOTSUPP;
4741 }
4742 return E1000_SUCCESS;
4743}
4744
4745void
4746e1000_pci_set_mwi(struct e1000_hw *hw)
4747{
4748 struct e1000_adapter *adapter = hw->back;
2648345f 4749 int ret_val = pci_set_mwi(adapter->pdev);
1da177e4 4750
96838a40 4751 if (ret_val)
2648345f 4752 DPRINTK(PROBE, ERR, "Error in setting MWI\n");
1da177e4
LT		 4753}
4754
4755void
4756e1000_pci_clear_mwi(struct e1000_hw *hw)
4757{
4758 struct e1000_adapter *adapter = hw->back;
4759
4760 pci_clear_mwi(adapter->pdev);
4761}
4762
4763void
4764e1000_read_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
4765{
4766 struct e1000_adapter *adapter = hw->back;
4767
4768 pci_read_config_word(adapter->pdev, reg, value);
4769}
4770
4771void
4772e1000_write_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
4773{
4774 struct e1000_adapter *adapter = hw->back;
4775
4776 pci_write_config_word(adapter->pdev, reg, *value);
4777}
4778
caeccb68
JK		 4779int32_t
4780e1000_read_pcie_cap_reg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
4781{
4782 struct e1000_adapter *adapter = hw->back;
4783 uint16_t cap_offset;
4784
4785 cap_offset = pci_find_capability(adapter->pdev, PCI_CAP_ID_EXP);
4786 if (!cap_offset)
4787 return -E1000_ERR_CONFIG;
4788
4789 pci_read_config_word(adapter->pdev, cap_offset + reg, value);
4790
4791 return E1000_SUCCESS;
4792}
4793
1da177e4
LT		 4794void
4795e1000_io_write(struct e1000_hw *hw, unsigned long port, uint32_t value)
4796{
4797 outl(value, port);
4798}
4799
4800static void
4801e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp)
4802{
60490fe0 4803 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 4804 uint32_t ctrl, rctl;
4805
4806 e1000_irq_disable(adapter);
4807 adapter->vlgrp = grp;
4808
96838a40 4809 if (grp) {
1da177e4
LT		 4810 /* enable VLAN tag insert/strip */
4811 ctrl = E1000_READ_REG(&adapter->hw, CTRL);
4812 ctrl |= E1000_CTRL_VME;
4813 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
4814
cd94dd0b 4815 if (adapter->hw.mac_type != e1000_ich8lan) {
90fb5135
AK		 4816 /* enable VLAN receive filtering */
4817 rctl = E1000_READ_REG(&adapter->hw, RCTL);
4818 rctl |= E1000_RCTL_VFE;
4819 rctl &= ~E1000_RCTL_CFIEN;
4820 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
4821 e1000_update_mng_vlan(adapter);
cd94dd0b 4822 }
1da177e4
LT		 4823 } else {
4824 /* disable VLAN tag insert/strip */
4825 ctrl = E1000_READ_REG(&adapter->hw, CTRL);
4826 ctrl &= ~E1000_CTRL_VME;
4827 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
4828
cd94dd0b 4829 if (adapter->hw.mac_type != e1000_ich8lan) {
90fb5135
AK		 4830 /* disable VLAN filtering */
4831 rctl = E1000_READ_REG(&adapter->hw, RCTL);
4832 rctl &= ~E1000_RCTL_VFE;
4833 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
4834 if (adapter->mng_vlan_id !=
4835 (uint16_t)E1000_MNG_VLAN_NONE) {
4836 e1000_vlan_rx_kill_vid(netdev,
4837 adapter->mng_vlan_id);
4838 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
4839 }
cd94dd0b 4840 }
1da177e4
LT		 4841 }
4842
4843 e1000_irq_enable(adapter);
4844}
4845
4846static void
4847e1000_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid)
4848{
60490fe0 4849 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 4850 uint32_t vfta, index;
96838a40
JB		 4851
4852 if ((adapter->hw.mng_cookie.status &
4853 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
4854 (vid == adapter->mng_vlan_id))
2d7edb92 4855 return;
1da177e4
LT		 4856 /* add VID to filter table */
4857 index = (vid >> 5) & 0x7F;
4858 vfta = E1000_READ_REG_ARRAY(&adapter->hw, VFTA, index);
4859 vfta |= (1 << (vid & 0x1F));
4860 e1000_write_vfta(&adapter->hw, index, vfta);
4861}
4862
4863static void
4864e1000_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid)
4865{
60490fe0 4866 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 4867 uint32_t vfta, index;
4868
4869 e1000_irq_disable(adapter);
4870
96838a40 4871 if (adapter->vlgrp)
1da177e4
LT		 4872 adapter->vlgrp->vlan_devices[vid] = NULL;
4873
4874 e1000_irq_enable(adapter);
4875
96838a40
JB		 4876 if ((adapter->hw.mng_cookie.status &
4877 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
ff147013
JK		 4878 (vid == adapter->mng_vlan_id)) {
4879 /* release control to f/w */
4880 e1000_release_hw_control(adapter);
2d7edb92 4881 return;
ff147013
JK		 4882 }
4883
1da177e4
LT		 4884 /* remove VID from filter table */
4885 index = (vid >> 5) & 0x7F;
4886 vfta = E1000_READ_REG_ARRAY(&adapter->hw, VFTA, index);
4887 vfta &= ~(1 << (vid & 0x1F));
4888 e1000_write_vfta(&adapter->hw, index, vfta);
4889}
4890
4891static void
4892e1000_restore_vlan(struct e1000_adapter *adapter)
4893{
4894 e1000_vlan_rx_register(adapter->netdev, adapter->vlgrp);
4895
96838a40 4896 if (adapter->vlgrp) {
1da177e4 4897 uint16_t vid;
96838a40
JB		 4898 for (vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
4899 if (!adapter->vlgrp->vlan_devices[vid])
1da177e4
LT		 4900 continue;
4901 e1000_vlan_rx_add_vid(adapter->netdev, vid);
4902 }
4903 }
4904}
4905
4906int
4907e1000_set_spd_dplx(struct e1000_adapter *adapter, uint16_t spddplx)
4908{
4909 adapter->hw.autoneg = 0;
4910
6921368f 4911 /* Fiber NICs only allow 1000 gbps Full duplex */
96838a40 4912 if ((adapter->hw.media_type == e1000_media_type_fiber) &&
6921368f
MC		 4913 spddplx != (SPEED_1000 + DUPLEX_FULL)) {
4914 DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
4915 return -EINVAL;
4916 }
4917
96838a40 4918 switch (spddplx) {
1da177e4
LT		 4919 case SPEED_10 + DUPLEX_HALF:
4920 adapter->hw.forced_speed_duplex = e1000_10_half;
4921 break;
4922 case SPEED_10 + DUPLEX_FULL:
4923 adapter->hw.forced_speed_duplex = e1000_10_full;
4924 break;
4925 case SPEED_100 + DUPLEX_HALF:
4926 adapter->hw.forced_speed_duplex = e1000_100_half;
4927 break;
4928 case SPEED_100 + DUPLEX_FULL:
4929 adapter->hw.forced_speed_duplex = e1000_100_full;
4930 break;
4931 case SPEED_1000 + DUPLEX_FULL:
4932 adapter->hw.autoneg = 1;
4933 adapter->hw.autoneg_advertised = ADVERTISE_1000_FULL;
4934 break;
4935 case SPEED_1000 + DUPLEX_HALF: /* not supported */
4936 default:
2648345f 4937 DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
1da177e4
LT		 4938 return -EINVAL;
4939 }
4940 return 0;
4941}
4942
b6a1d5f8 4943#ifdef CONFIG_PM
0f15a8fa
JK		 4944/* Save/restore 16 or 64 dwords of PCI config space depending on which
4945 * bus we're on (PCI(X) vs. PCI-E)
2f82665f
JB		 4946 */
4947#define PCIE_CONFIG_SPACE_LEN 256
4948#define PCI_CONFIG_SPACE_LEN 64
4949static int
4950e1000_pci_save_state(struct e1000_adapter *adapter)
4951{
4952 struct pci_dev *dev = adapter->pdev;
4953 int size;
4954 int i;
0f15a8fa 4955
2f82665f
JB		 4956 if (adapter->hw.mac_type >= e1000_82571)
4957 size = PCIE_CONFIG_SPACE_LEN;
4958 else
4959 size = PCI_CONFIG_SPACE_LEN;
4960
4961 WARN_ON(adapter->config_space != NULL);
4962
4963 adapter->config_space = kmalloc(size, GFP_KERNEL);
4964 if (!adapter->config_space) {
4965 DPRINTK(PROBE, ERR, "unable to allocate %d bytes\n", size);
4966 return -ENOMEM;
4967 }
4968 for (i = 0; i < (size / 4); i++)
4969 pci_read_config_dword(dev, i * 4, &adapter->config_space[i]);
4970 return 0;
4971}
4972
4973static void
4974e1000_pci_restore_state(struct e1000_adapter *adapter)
4975{
4976 struct pci_dev *dev = adapter->pdev;
4977 int size;
4978 int i;
0f15a8fa 4979
2f82665f
JB		 4980 if (adapter->config_space == NULL)
4981 return;
0f15a8fa 4982
2f82665f
JB		 4983 if (adapter->hw.mac_type >= e1000_82571)
4984 size = PCIE_CONFIG_SPACE_LEN;
4985 else
4986 size = PCI_CONFIG_SPACE_LEN;
4987 for (i = 0; i < (size / 4); i++)
4988 pci_write_config_dword(dev, i * 4, adapter->config_space[i]);
4989 kfree(adapter->config_space);
4990 adapter->config_space = NULL;
4991 return;
4992}
4993#endif /* CONFIG_PM */
4994
1da177e4 4995static int
829ca9a3 4996e1000_suspend(struct pci_dev *pdev, pm_message_t state)
1da177e4
LT		 4997{
4998 struct net_device *netdev = pci_get_drvdata(pdev);
60490fe0 4999 struct e1000_adapter *adapter = netdev_priv(netdev);
b55ccb35 5000 uint32_t ctrl, ctrl_ext, rctl, manc, status;
1da177e4 5001 uint32_t wufc = adapter->wol;
6fdfef16 5002#ifdef CONFIG_PM
240b1710 5003 int retval = 0;
6fdfef16 5004#endif
1da177e4
LT		 5005
5006 netif_device_detach(netdev);
5007
2db10a08
AK		 5008 if (netif_running(netdev)) {
5009 WARN_ON(test_bit(__E1000_RESETTING, &adapter->flags));
1da177e4 5010 e1000_down(adapter);
2db10a08 5011 }
1da177e4 5012
2f82665f 5013#ifdef CONFIG_PM
0f15a8fa
JK		 5014 /* Implement our own version of pci_save_state(pdev) because pci-
5015 * express adapters have 256-byte config spaces. */
2f82665f
JB		 5016 retval = e1000_pci_save_state(adapter);
5017 if (retval)
5018 return retval;
5019#endif
5020
1da177e4 5021 status = E1000_READ_REG(&adapter->hw, STATUS);
96838a40 5022 if (status & E1000_STATUS_LU)
1da177e4
LT		 5023 wufc &= ~E1000_WUFC_LNKC;
5024
96838a40 5025 if (wufc) {
1da177e4
LT		 5026 e1000_setup_rctl(adapter);
5027 e1000_set_multi(netdev);
5028
5029 /* turn on all-multi mode if wake on multicast is enabled */
120cd576 5030 if (wufc & E1000_WUFC_MC) {
1da177e4
LT		 5031 rctl = E1000_READ_REG(&adapter->hw, RCTL);
5032 rctl |= E1000_RCTL_MPE;
5033 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
5034 }
5035
96838a40 5036 if (adapter->hw.mac_type >= e1000_82540) {
1da177e4
LT		 5037 ctrl = E1000_READ_REG(&adapter->hw, CTRL);
5038 /* advertise wake from D3Cold */
5039 #define E1000_CTRL_ADVD3WUC 0x00100000
5040 /* phy power management enable */
5041 #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
5042 ctrl |= E1000_CTRL_ADVD3WUC |
5043 E1000_CTRL_EN_PHY_PWR_MGMT;
5044 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
5045 }
5046
96838a40 5047 if (adapter->hw.media_type == e1000_media_type_fiber ||
1da177e4
LT		 5048 adapter->hw.media_type == e1000_media_type_internal_serdes) {
5049 /* keep the laser running in D3 */
5050 ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
5051 ctrl_ext |= E1000_CTRL_EXT_SDP7_DATA;
5052 E1000_WRITE_REG(&adapter->hw, CTRL_EXT, ctrl_ext);
5053 }
5054
2d7edb92
MC		 5055 /* Allow time for pending master requests to run */
5056 e1000_disable_pciex_master(&adapter->hw);
5057
1da177e4
LT		 5058 E1000_WRITE_REG(&adapter->hw, WUC, E1000_WUC_PME_EN);
5059 E1000_WRITE_REG(&adapter->hw, WUFC, wufc);
d0e027db
AK		 5060 pci_enable_wake(pdev, PCI_D3hot, 1);
5061 pci_enable_wake(pdev, PCI_D3cold, 1);
1da177e4
LT		 5062 } else {
5063 E1000_WRITE_REG(&adapter->hw, WUC, 0);
5064 E1000_WRITE_REG(&adapter->hw, WUFC, 0);
d0e027db
AK		 5065 pci_enable_wake(pdev, PCI_D3hot, 0);
5066 pci_enable_wake(pdev, PCI_D3cold, 0);
1da177e4
LT		 5067 }
5068
4ccc12ae
JB		 5069 if (adapter->hw.mac_type >= e1000_82540 &&
5070 adapter->hw.mac_type < e1000_82571 &&
5071 adapter->hw.media_type == e1000_media_type_copper) {
1da177e4 5072 manc = E1000_READ_REG(&adapter->hw, MANC);
96838a40 5073 if (manc & E1000_MANC_SMBUS_EN) {
1da177e4
LT		 5074 manc |= E1000_MANC_ARP_EN;
5075 E1000_WRITE_REG(&adapter->hw, MANC, manc);
d0e027db
AK		 5076 pci_enable_wake(pdev, PCI_D3hot, 1);
5077 pci_enable_wake(pdev, PCI_D3cold, 1);
1da177e4
LT		 5078 }
5079 }
5080
cd94dd0b
AK		 5081 if (adapter->hw.phy_type == e1000_phy_igp_3)
5082 e1000_phy_powerdown_workaround(&adapter->hw);
5083
edd106fc
AK		 5084 if (netif_running(netdev))
5085 e1000_free_irq(adapter);
5086
b55ccb35
JK		 5087 /* Release control of h/w to f/w. If f/w is AMT enabled, this
5088 * would have already happened in close and is redundant. */
5089 e1000_release_hw_control(adapter);
2d7edb92 5090
1da177e4 5091 pci_disable_device(pdev);
240b1710 5092
d0e027db 5093 pci_set_power_state(pdev, pci_choose_state(pdev, state));
1da177e4
LT		 5094
5095 return 0;
5096}
5097
2f82665f 5098#ifdef CONFIG_PM
1da177e4
LT		 5099static int
5100e1000_resume(struct pci_dev *pdev)
5101{
5102 struct net_device *netdev = pci_get_drvdata(pdev);
60490fe0 5103 struct e1000_adapter *adapter = netdev_priv(netdev);
3d1dd8cb 5104 uint32_t manc, err;
1da177e4 5105
d0e027db 5106 pci_set_power_state(pdev, PCI_D0);
2f82665f 5107 e1000_pci_restore_state(adapter);
3d1dd8cb
AK		 5108 if ((err = pci_enable_device(pdev))) {
5109 printk(KERN_ERR "e1000: Cannot enable PCI device from suspend\n");
5110 return err;
5111 }
a4cb847d 5112 pci_set_master(pdev);
1da177e4 5113
d0e027db
AK		 5114 pci_enable_wake(pdev, PCI_D3hot, 0);
5115 pci_enable_wake(pdev, PCI_D3cold, 0);
1da177e4 5116
edd106fc
AK		 5117 if (netif_running(netdev) && (err = e1000_request_irq(adapter)))
5118 return err;
5119
5120 e1000_power_up_phy(adapter);
1da177e4
LT		 5121 e1000_reset(adapter);
5122 E1000_WRITE_REG(&adapter->hw, WUS, ~0);
5123
96838a40 5124 if (netif_running(netdev))
1da177e4
LT		 5125 e1000_up(adapter);
5126
5127 netif_device_attach(netdev);
5128
4ccc12ae
JB		 5129 if (adapter->hw.mac_type >= e1000_82540 &&
5130 adapter->hw.mac_type < e1000_82571 &&
5131 adapter->hw.media_type == e1000_media_type_copper) {
1da177e4
LT		 5132 manc = E1000_READ_REG(&adapter->hw, MANC);
5133 manc &= ~(E1000_MANC_ARP_EN);
5134 E1000_WRITE_REG(&adapter->hw, MANC, manc);
5135 }
5136
b55ccb35
JK		 5137 /* If the controller is 82573 and f/w is AMT, do not set
5138 * DRV_LOAD until the interface is up. For all other cases,
5139 * let the f/w know that the h/w is now under the control
5140 * of the driver. */
5141 if (adapter->hw.mac_type != e1000_82573 ||
5142 !e1000_check_mng_mode(&adapter->hw))
5143 e1000_get_hw_control(adapter);
2d7edb92 5144
1da177e4
LT		 5145 return 0;
5146}
5147#endif
c653e635
AK		 5148
5149static void e1000_shutdown(struct pci_dev *pdev)
5150{
5151 e1000_suspend(pdev, PMSG_SUSPEND);
5152}
5153
1da177e4
LT		 5154#ifdef CONFIG_NET_POLL_CONTROLLER
5155/*
5156 * Polling 'interrupt' - used by things like netconsole to send skbs
5157 * without having to re-enable interrupts. It's not called while
5158 * the interrupt routine is executing.
5159 */
5160static void
2648345f 5161e1000_netpoll(struct net_device *netdev)
1da177e4 5162{
60490fe0 5163 struct e1000_adapter *adapter = netdev_priv(netdev);
d3d9e484 5164
1da177e4 5165 disable_irq(adapter->pdev->irq);
7d12e780 5166 e1000_intr(adapter->pdev->irq, netdev);
c4cfe567 5167 e1000_clean_tx_irq(adapter, adapter->tx_ring);
e8da8be1
JK		 5168#ifndef CONFIG_E1000_NAPI
5169 adapter->clean_rx(adapter, adapter->rx_ring);
5170#endif
1da177e4
LT		 5171 enable_irq(adapter->pdev->irq);
5172}
5173#endif
5174
9026729b
AK		 5175/**
5176 * e1000_io_error_detected - called when PCI error is detected
5177 * @pdev: Pointer to PCI device
5178 * @state: The current pci conneection state
5179 *
5180 * This function is called after a PCI bus error affecting
5181 * this device has been detected.
5182 */
5183static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev, pci_channel_state_t state)
5184{
5185 struct net_device *netdev = pci_get_drvdata(pdev);
5186 struct e1000_adapter *adapter = netdev->priv;
5187
5188 netif_device_detach(netdev);
5189
5190 if (netif_running(netdev))
5191 e1000_down(adapter);
72e8d6bb 5192 pci_disable_device(pdev);
9026729b
AK		 5193
5194 /* Request a slot slot reset. */
5195 return PCI_ERS_RESULT_NEED_RESET;
5196}
5197
5198/**
5199 * e1000_io_slot_reset - called after the pci bus has been reset.
5200 * @pdev: Pointer to PCI device
5201 *
5202 * Restart the card from scratch, as if from a cold-boot. Implementation
5203 * resembles the first-half of the e1000_resume routine.
5204 */
5205static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev)
5206{
5207 struct net_device *netdev = pci_get_drvdata(pdev);
5208 struct e1000_adapter *adapter = netdev->priv;
5209
5210 if (pci_enable_device(pdev)) {
5211 printk(KERN_ERR "e1000: Cannot re-enable PCI device after reset.\n");
5212 return PCI_ERS_RESULT_DISCONNECT;
5213 }
5214 pci_set_master(pdev);
5215
dbf38c94
LV		 5216 pci_enable_wake(pdev, PCI_D3hot, 0);
5217 pci_enable_wake(pdev, PCI_D3cold, 0);
9026729b 5218
9026729b
AK		 5219 e1000_reset(adapter);
5220 E1000_WRITE_REG(&adapter->hw, WUS, ~0);
5221
5222 return PCI_ERS_RESULT_RECOVERED;
5223}
5224
5225/**
5226 * e1000_io_resume - called when traffic can start flowing again.
5227 * @pdev: Pointer to PCI device
5228 *
5229 * This callback is called when the error recovery driver tells us that
5230 * its OK to resume normal operation. Implementation resembles the
5231 * second-half of the e1000_resume routine.
5232 */
5233static void e1000_io_resume(struct pci_dev *pdev)
5234{
5235 struct net_device *netdev = pci_get_drvdata(pdev);
5236 struct e1000_adapter *adapter = netdev->priv;
5237 uint32_t manc, swsm;
5238
5239 if (netif_running(netdev)) {
5240 if (e1000_up(adapter)) {
5241 printk("e1000: can't bring device back up after reset\n");
5242 return;
5243 }
5244 }
5245
5246 netif_device_attach(netdev);
5247
5248 if (adapter->hw.mac_type >= e1000_82540 &&
4ccc12ae 5249 adapter->hw.mac_type < e1000_82571 &&
9026729b
AK		 5250 adapter->hw.media_type == e1000_media_type_copper) {
5251 manc = E1000_READ_REG(&adapter->hw, MANC);
5252 manc &= ~(E1000_MANC_ARP_EN);
5253 E1000_WRITE_REG(&adapter->hw, MANC, manc);
5254 }
5255
5256 switch (adapter->hw.mac_type) {
5257 case e1000_82573:
5258 swsm = E1000_READ_REG(&adapter->hw, SWSM);
5259 E1000_WRITE_REG(&adapter->hw, SWSM,
5260 swsm | E1000_SWSM_DRV_LOAD);
5261 break;
5262 default:
5263 break;
5264 }
5265
5266 if (netif_running(netdev))
5267 mod_timer(&adapter->watchdog_timer, jiffies);
5268}
5269
1da177e4 5270/* e1000_main.c */
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