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UBUNTU: Ubuntu-4.10.0-37.41
[mirror_ubuntu-zesty-kernel.git] / drivers / net / ethernet / broadcom / bnxt / bnxt_ethtool.c
CommitLineData
c0c050c5
MC		 1/* Broadcom NetXtreme-C/E network driver.
2 *
11f15ed3 3 * Copyright (c) 2014-2016 Broadcom Corporation
c0c050c5
MC		 4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation.
8 */
9
3ebf6f0a 10#include <linux/ctype.h>
8ddc9aaa 11#include <linux/stringify.h>
c0c050c5
MC		 12#include <linux/ethtool.h>
13#include <linux/interrupt.h>
14#include <linux/pci.h>
15#include <linux/etherdevice.h>
16#include <linux/crc32.h>
17#include <linux/firmware.h>
18#include "bnxt_hsi.h"
19#include "bnxt.h"
20#include "bnxt_ethtool.h"
21#include "bnxt_nvm_defs.h" /* NVRAM content constant and structure defs */
22#include "bnxt_fw_hdr.h" /* Firmware hdr constant and structure defs */
23#define FLASH_NVRAM_TIMEOUT ((HWRM_CMD_TIMEOUT) * 100)
5ac67d8b
RS		 24#define FLASH_PACKAGE_TIMEOUT ((HWRM_CMD_TIMEOUT) * 200)
25#define INSTALL_PACKAGE_TIMEOUT ((HWRM_CMD_TIMEOUT) * 200)
c0c050c5 26
3ebf6f0a
RS		 27static char *bnxt_get_pkgver(struct net_device *dev, char *buf, size_t buflen);
28
c0c050c5
MC		 29static u32 bnxt_get_msglevel(struct net_device *dev)
30{
31 struct bnxt *bp = netdev_priv(dev);
32
33 return bp->msg_enable;
34}
35
36static void bnxt_set_msglevel(struct net_device *dev, u32 value)
37{
38 struct bnxt *bp = netdev_priv(dev);
39
40 bp->msg_enable = value;
41}
42
43static int bnxt_get_coalesce(struct net_device *dev,
44 struct ethtool_coalesce *coal)
45{
46 struct bnxt *bp = netdev_priv(dev);
47
48 memset(coal, 0, sizeof(*coal));
49
dfb5b894
MC		 50 coal->rx_coalesce_usecs = bp->rx_coal_ticks;
51 /* 2 completion records per rx packet */
52 coal->rx_max_coalesced_frames = bp->rx_coal_bufs / 2;
53 coal->rx_coalesce_usecs_irq = bp->rx_coal_ticks_irq;
54 coal->rx_max_coalesced_frames_irq = bp->rx_coal_bufs_irq / 2;
c0c050c5 55
dfc9c94a
MC		 56 coal->tx_coalesce_usecs = bp->tx_coal_ticks;
57 coal->tx_max_coalesced_frames = bp->tx_coal_bufs;
58 coal->tx_coalesce_usecs_irq = bp->tx_coal_ticks_irq;
59 coal->tx_max_coalesced_frames_irq = bp->tx_coal_bufs_irq;
60
51f30785
MC		 61 coal->stats_block_coalesce_usecs = bp->stats_coal_ticks;
62
c0c050c5
MC		 63 return 0;
64}
65
66static int bnxt_set_coalesce(struct net_device *dev,
67 struct ethtool_coalesce *coal)
68{
69 struct bnxt *bp = netdev_priv(dev);
51f30785 70 bool update_stats = false;
c0c050c5
MC		 71 int rc = 0;
72
dfb5b894
MC		 73 bp->rx_coal_ticks = coal->rx_coalesce_usecs;
74 /* 2 completion records per rx packet */
75 bp->rx_coal_bufs = coal->rx_max_coalesced_frames * 2;
76 bp->rx_coal_ticks_irq = coal->rx_coalesce_usecs_irq;
77 bp->rx_coal_bufs_irq = coal->rx_max_coalesced_frames_irq * 2;
c0c050c5 78
dfc9c94a
MC		 79 bp->tx_coal_ticks = coal->tx_coalesce_usecs;
80 bp->tx_coal_bufs = coal->tx_max_coalesced_frames;
81 bp->tx_coal_ticks_irq = coal->tx_coalesce_usecs_irq;
82 bp->tx_coal_bufs_irq = coal->tx_max_coalesced_frames_irq;
83
51f30785
MC		 84 if (bp->stats_coal_ticks != coal->stats_block_coalesce_usecs) {
85 u32 stats_ticks = coal->stats_block_coalesce_usecs;
86
87 stats_ticks = clamp_t(u32, stats_ticks,
88 BNXT_MIN_STATS_COAL_TICKS,
89 BNXT_MAX_STATS_COAL_TICKS);
90 stats_ticks = rounddown(stats_ticks, BNXT_MIN_STATS_COAL_TICKS);
91 bp->stats_coal_ticks = stats_ticks;
92 update_stats = true;
93 }
94
95 if (netif_running(dev)) {
96 if (update_stats) {
97 rc = bnxt_close_nic(bp, true, false);
98 if (!rc)
99 rc = bnxt_open_nic(bp, true, false);
100 } else {
101 rc = bnxt_hwrm_set_coal(bp);
102 }
103 }
c0c050c5
MC		 104
105 return rc;
106}
107
108#define BNXT_NUM_STATS 21
109
8ddc9aaa
MC		 110#define BNXT_RX_STATS_ENTRY(counter) \
111 { BNXT_RX_STATS_OFFSET(counter), __stringify(counter) }
112
8ddc9aaa
MC		 113#define BNXT_TX_STATS_ENTRY(counter) \
114 { BNXT_TX_STATS_OFFSET(counter), __stringify(counter) }
115
116static const struct {
117 long offset;
118 char string[ETH_GSTRING_LEN];
119} bnxt_port_stats_arr[] = {
120 BNXT_RX_STATS_ENTRY(rx_64b_frames),
121 BNXT_RX_STATS_ENTRY(rx_65b_127b_frames),
122 BNXT_RX_STATS_ENTRY(rx_128b_255b_frames),
123 BNXT_RX_STATS_ENTRY(rx_256b_511b_frames),
124 BNXT_RX_STATS_ENTRY(rx_512b_1023b_frames),
125 BNXT_RX_STATS_ENTRY(rx_1024b_1518_frames),
126 BNXT_RX_STATS_ENTRY(rx_good_vlan_frames),
127 BNXT_RX_STATS_ENTRY(rx_1519b_2047b_frames),
128 BNXT_RX_STATS_ENTRY(rx_2048b_4095b_frames),
129 BNXT_RX_STATS_ENTRY(rx_4096b_9216b_frames),
130 BNXT_RX_STATS_ENTRY(rx_9217b_16383b_frames),
131 BNXT_RX_STATS_ENTRY(rx_total_frames),
132 BNXT_RX_STATS_ENTRY(rx_ucast_frames),
133 BNXT_RX_STATS_ENTRY(rx_mcast_frames),
134 BNXT_RX_STATS_ENTRY(rx_bcast_frames),
135 BNXT_RX_STATS_ENTRY(rx_fcs_err_frames),
136 BNXT_RX_STATS_ENTRY(rx_ctrl_frames),
137 BNXT_RX_STATS_ENTRY(rx_pause_frames),
138 BNXT_RX_STATS_ENTRY(rx_pfc_frames),
139 BNXT_RX_STATS_ENTRY(rx_align_err_frames),
140 BNXT_RX_STATS_ENTRY(rx_ovrsz_frames),
141 BNXT_RX_STATS_ENTRY(rx_jbr_frames),
142 BNXT_RX_STATS_ENTRY(rx_mtu_err_frames),
143 BNXT_RX_STATS_ENTRY(rx_tagged_frames),
144 BNXT_RX_STATS_ENTRY(rx_double_tagged_frames),
145 BNXT_RX_STATS_ENTRY(rx_good_frames),
c77192f2
MC		 146 BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri0),
147 BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri1),
148 BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri2),
149 BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri3),
150 BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri4),
151 BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri5),
152 BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri6),
153 BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri7),
8ddc9aaa
MC		 154 BNXT_RX_STATS_ENTRY(rx_undrsz_frames),
155 BNXT_RX_STATS_ENTRY(rx_eee_lpi_events),
156 BNXT_RX_STATS_ENTRY(rx_eee_lpi_duration),
157 BNXT_RX_STATS_ENTRY(rx_bytes),
158 BNXT_RX_STATS_ENTRY(rx_runt_bytes),
159 BNXT_RX_STATS_ENTRY(rx_runt_frames),
160
161 BNXT_TX_STATS_ENTRY(tx_64b_frames),
162 BNXT_TX_STATS_ENTRY(tx_65b_127b_frames),
163 BNXT_TX_STATS_ENTRY(tx_128b_255b_frames),
164 BNXT_TX_STATS_ENTRY(tx_256b_511b_frames),
165 BNXT_TX_STATS_ENTRY(tx_512b_1023b_frames),
166 BNXT_TX_STATS_ENTRY(tx_1024b_1518_frames),
167 BNXT_TX_STATS_ENTRY(tx_good_vlan_frames),
168 BNXT_TX_STATS_ENTRY(tx_1519b_2047_frames),
169 BNXT_TX_STATS_ENTRY(tx_2048b_4095b_frames),
170 BNXT_TX_STATS_ENTRY(tx_4096b_9216b_frames),
171 BNXT_TX_STATS_ENTRY(tx_9217b_16383b_frames),
172 BNXT_TX_STATS_ENTRY(tx_good_frames),
173 BNXT_TX_STATS_ENTRY(tx_total_frames),
174 BNXT_TX_STATS_ENTRY(tx_ucast_frames),
175 BNXT_TX_STATS_ENTRY(tx_mcast_frames),
176 BNXT_TX_STATS_ENTRY(tx_bcast_frames),
177 BNXT_TX_STATS_ENTRY(tx_pause_frames),
178 BNXT_TX_STATS_ENTRY(tx_pfc_frames),
179 BNXT_TX_STATS_ENTRY(tx_jabber_frames),
180 BNXT_TX_STATS_ENTRY(tx_fcs_err_frames),
181 BNXT_TX_STATS_ENTRY(tx_err),
182 BNXT_TX_STATS_ENTRY(tx_fifo_underruns),
c77192f2
MC		 183 BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri0),
184 BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri1),
185 BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri2),
186 BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri3),
187 BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri4),
188 BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri5),
189 BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri6),
190 BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri7),
8ddc9aaa
MC		 191 BNXT_TX_STATS_ENTRY(tx_eee_lpi_events),
192 BNXT_TX_STATS_ENTRY(tx_eee_lpi_duration),
193 BNXT_TX_STATS_ENTRY(tx_total_collisions),
194 BNXT_TX_STATS_ENTRY(tx_bytes),
195};
196
197#define BNXT_NUM_PORT_STATS ARRAY_SIZE(bnxt_port_stats_arr)
198
c0c050c5
MC		 199static int bnxt_get_sset_count(struct net_device *dev, int sset)
200{
201 struct bnxt *bp = netdev_priv(dev);
202
203 switch (sset) {
8ddc9aaa
MC		 204 case ETH_SS_STATS: {
205 int num_stats = BNXT_NUM_STATS * bp->cp_nr_rings;
206
207 if (bp->flags & BNXT_FLAG_PORT_STATS)
208 num_stats += BNXT_NUM_PORT_STATS;
209
210 return num_stats;
211 }
c0c050c5
MC		 212 default:
213 return -EOPNOTSUPP;
214 }
215}
216
217static void bnxt_get_ethtool_stats(struct net_device *dev,
218 struct ethtool_stats *stats, u64 *buf)
219{
220 u32 i, j = 0;
221 struct bnxt *bp = netdev_priv(dev);
222 u32 buf_size = sizeof(struct ctx_hw_stats) * bp->cp_nr_rings;
223 u32 stat_fields = sizeof(struct ctx_hw_stats) / 8;
224
225 memset(buf, 0, buf_size);
226
227 if (!bp->bnapi)
228 return;
229
230 for (i = 0; i < bp->cp_nr_rings; i++) {
231 struct bnxt_napi *bnapi = bp->bnapi[i];
232 struct bnxt_cp_ring_info *cpr = &bnapi->cp_ring;
233 __le64 *hw_stats = (__le64 *)cpr->hw_stats;
234 int k;
235
236 for (k = 0; k < stat_fields; j++, k++)
237 buf[j] = le64_to_cpu(hw_stats[k]);
238 buf[j++] = cpr->rx_l4_csum_errors;
239 }
8ddc9aaa
MC		 240 if (bp->flags & BNXT_FLAG_PORT_STATS) {
241 __le64 *port_stats = (__le64 *)bp->hw_rx_port_stats;
242
243 for (i = 0; i < BNXT_NUM_PORT_STATS; i++, j++) {
244 buf[j] = le64_to_cpu(*(port_stats +
245 bnxt_port_stats_arr[i].offset));
246 }
247 }
c0c050c5
MC		 248}
249
250static void bnxt_get_strings(struct net_device *dev, u32 stringset, u8 *buf)
251{
252 struct bnxt *bp = netdev_priv(dev);
253 u32 i;
254
255 switch (stringset) {
256 /* The number of strings must match BNXT_NUM_STATS defined above. */
257 case ETH_SS_STATS:
258 for (i = 0; i < bp->cp_nr_rings; i++) {
259 sprintf(buf, "[%d]: rx_ucast_packets", i);
260 buf += ETH_GSTRING_LEN;
261 sprintf(buf, "[%d]: rx_mcast_packets", i);
262 buf += ETH_GSTRING_LEN;
263 sprintf(buf, "[%d]: rx_bcast_packets", i);
264 buf += ETH_GSTRING_LEN;
265 sprintf(buf, "[%d]: rx_discards", i);
266 buf += ETH_GSTRING_LEN;
267 sprintf(buf, "[%d]: rx_drops", i);
268 buf += ETH_GSTRING_LEN;
269 sprintf(buf, "[%d]: rx_ucast_bytes", i);
270 buf += ETH_GSTRING_LEN;
271 sprintf(buf, "[%d]: rx_mcast_bytes", i);
272 buf += ETH_GSTRING_LEN;
273 sprintf(buf, "[%d]: rx_bcast_bytes", i);
274 buf += ETH_GSTRING_LEN;
275 sprintf(buf, "[%d]: tx_ucast_packets", i);
276 buf += ETH_GSTRING_LEN;
277 sprintf(buf, "[%d]: tx_mcast_packets", i);
278 buf += ETH_GSTRING_LEN;
279 sprintf(buf, "[%d]: tx_bcast_packets", i);
280 buf += ETH_GSTRING_LEN;
281 sprintf(buf, "[%d]: tx_discards", i);
282 buf += ETH_GSTRING_LEN;
283 sprintf(buf, "[%d]: tx_drops", i);
284 buf += ETH_GSTRING_LEN;
285 sprintf(buf, "[%d]: tx_ucast_bytes", i);
286 buf += ETH_GSTRING_LEN;
287 sprintf(buf, "[%d]: tx_mcast_bytes", i);
288 buf += ETH_GSTRING_LEN;
289 sprintf(buf, "[%d]: tx_bcast_bytes", i);
290 buf += ETH_GSTRING_LEN;
291 sprintf(buf, "[%d]: tpa_packets", i);
292 buf += ETH_GSTRING_LEN;
293 sprintf(buf, "[%d]: tpa_bytes", i);
294 buf += ETH_GSTRING_LEN;
295 sprintf(buf, "[%d]: tpa_events", i);
296 buf += ETH_GSTRING_LEN;
297 sprintf(buf, "[%d]: tpa_aborts", i);
298 buf += ETH_GSTRING_LEN;
299 sprintf(buf, "[%d]: rx_l4_csum_errors", i);
300 buf += ETH_GSTRING_LEN;
301 }
8ddc9aaa
MC		 302 if (bp->flags & BNXT_FLAG_PORT_STATS) {
303 for (i = 0; i < BNXT_NUM_PORT_STATS; i++) {
304 strcpy(buf, bnxt_port_stats_arr[i].string);
305 buf += ETH_GSTRING_LEN;
306 }
307 }
c0c050c5
MC		 308 break;
309 default:
310 netdev_err(bp->dev, "bnxt_get_strings invalid request %x\n",
311 stringset);
312 break;
313 }
314}
315
316static void bnxt_get_ringparam(struct net_device *dev,
317 struct ethtool_ringparam *ering)
318{
319 struct bnxt *bp = netdev_priv(dev);
320
321 ering->rx_max_pending = BNXT_MAX_RX_DESC_CNT;
322 ering->rx_jumbo_max_pending = BNXT_MAX_RX_JUM_DESC_CNT;
323 ering->tx_max_pending = BNXT_MAX_TX_DESC_CNT;
324
325 ering->rx_pending = bp->rx_ring_size;
326 ering->rx_jumbo_pending = bp->rx_agg_ring_size;
327 ering->tx_pending = bp->tx_ring_size;
328}
329
330static int bnxt_set_ringparam(struct net_device *dev,
331 struct ethtool_ringparam *ering)
332{
333 struct bnxt *bp = netdev_priv(dev);
334
335 if ((ering->rx_pending > BNXT_MAX_RX_DESC_CNT) ||
336 (ering->tx_pending > BNXT_MAX_TX_DESC_CNT) ||
337 (ering->tx_pending <= MAX_SKB_FRAGS))
338 return -EINVAL;
339
340 if (netif_running(dev))
341 bnxt_close_nic(bp, false, false);
342
343 bp->rx_ring_size = ering->rx_pending;
344 bp->tx_ring_size = ering->tx_pending;
345 bnxt_set_ring_params(bp);
346
347 if (netif_running(dev))
348 return bnxt_open_nic(bp, false, false);
349
350 return 0;
351}
352
353static void bnxt_get_channels(struct net_device *dev,
354 struct ethtool_channels *channel)
355{
356 struct bnxt *bp = netdev_priv(dev);
357 int max_rx_rings, max_tx_rings, tcs;
358
6e6c5a57 359 bnxt_get_max_rings(bp, &max_rx_rings, &max_tx_rings, true);
47f8e8b9 360 channel->max_combined = max_t(int, max_rx_rings, max_tx_rings);
068c9ec6 361
18d6e4e2
SB		 362 if (bnxt_get_max_rings(bp, &max_rx_rings, &max_tx_rings, false)) {
363 max_rx_rings = 0;
364 max_tx_rings = 0;
365 }
366
c0c050c5
MC		 367 tcs = netdev_get_num_tc(dev);
368 if (tcs > 1)
369 max_tx_rings /= tcs;
370
371 channel->max_rx = max_rx_rings;
372 channel->max_tx = max_tx_rings;
373 channel->max_other = 0;
068c9ec6
MC		 374 if (bp->flags & BNXT_FLAG_SHARED_RINGS) {
375 channel->combined_count = bp->rx_nr_rings;
76595193
PS		 376 if (BNXT_CHIP_TYPE_NITRO_A0(bp))
377 channel->combined_count--;
068c9ec6 378 } else {
76595193
PS		 379 if (!BNXT_CHIP_TYPE_NITRO_A0(bp)) {
380 channel->rx_count = bp->rx_nr_rings;
381 channel->tx_count = bp->tx_nr_rings_per_tc;
382 }
068c9ec6 383 }
c0c050c5
MC		 384}
385
386static int bnxt_set_channels(struct net_device *dev,
387 struct ethtool_channels *channel)
388{
389 struct bnxt *bp = netdev_priv(dev);
390 int max_rx_rings, max_tx_rings, tcs;
391 u32 rc = 0;
068c9ec6 392 bool sh = false;
c0c050c5 393
068c9ec6 394 if (channel->other_count)
c0c050c5
MC		 395 return -EINVAL;
396
068c9ec6
MC		 397 if (!channel->combined_count &&
398 (!channel->rx_count || !channel->tx_count))
399 return -EINVAL;
400
401 if (channel->combined_count &&
402 (channel->rx_count || channel->tx_count))
403 return -EINVAL;
404
76595193
PS		 405 if (BNXT_CHIP_TYPE_NITRO_A0(bp) && (channel->rx_count ||
406 channel->tx_count))
407 return -EINVAL;
408
068c9ec6
MC		 409 if (channel->combined_count)
410 sh = true;
411
412 bnxt_get_max_rings(bp, &max_rx_rings, &max_tx_rings, sh);
413
c0c050c5
MC		 414 tcs = netdev_get_num_tc(dev);
415 if (tcs > 1)
416 max_tx_rings /= tcs;
417
47f8e8b9
MC		 418 if (sh &&
419 channel->combined_count > max_t(int, max_rx_rings, max_tx_rings))
068c9ec6
MC		 420 return -ENOMEM;
421
422 if (!sh && (channel->rx_count > max_rx_rings ||
423 channel->tx_count > max_tx_rings))
424 return -ENOMEM;
c0c050c5
MC		 425
426 if (netif_running(dev)) {
427 if (BNXT_PF(bp)) {
428 /* TODO CHIMP_FW: Send message to all VF's
429 * before PF unload
430 */
431 }
432 rc = bnxt_close_nic(bp, true, false);
433 if (rc) {
434 netdev_err(bp->dev, "Set channel failure rc :%x\n",
435 rc);
436 return rc;
437 }
438 }
439
068c9ec6
MC		 440 if (sh) {
441 bp->flags |= BNXT_FLAG_SHARED_RINGS;
47f8e8b9
MC		 442 bp->rx_nr_rings = min_t(int, channel->combined_count,
443 max_rx_rings);
444 bp->tx_nr_rings_per_tc = min_t(int, channel->combined_count,
445 max_tx_rings);
068c9ec6
MC		 446 } else {
447 bp->flags &= ~BNXT_FLAG_SHARED_RINGS;
448 bp->rx_nr_rings = channel->rx_count;
449 bp->tx_nr_rings_per_tc = channel->tx_count;
450 }
451
c0c050c5
MC		 452 bp->tx_nr_rings = bp->tx_nr_rings_per_tc;
453 if (tcs > 1)
454 bp->tx_nr_rings = bp->tx_nr_rings_per_tc * tcs;
068c9ec6
MC		 455
456 bp->cp_nr_rings = sh ? max_t(int, bp->tx_nr_rings, bp->rx_nr_rings) :
457 bp->tx_nr_rings + bp->rx_nr_rings;
458
c0c050c5
MC		 459 bp->num_stat_ctxs = bp->cp_nr_rings;
460
2bcfa6f6
MC		 461 /* After changing number of rx channels, update NTUPLE feature. */
462 netdev_update_features(dev);
c0c050c5
MC		 463 if (netif_running(dev)) {
464 rc = bnxt_open_nic(bp, true, false);
465 if ((!rc) && BNXT_PF(bp)) {
466 /* TODO CHIMP_FW: Send message to all VF's
467 * to renable
468 */
469 }
470 }
471
472 return rc;
473}
474
475#ifdef CONFIG_RFS_ACCEL
476static int bnxt_grxclsrlall(struct bnxt *bp, struct ethtool_rxnfc *cmd,
477 u32 *rule_locs)
478{
479 int i, j = 0;
480
481 cmd->data = bp->ntp_fltr_count;
482 for (i = 0; i < BNXT_NTP_FLTR_HASH_SIZE; i++) {
483 struct hlist_head *head;
484 struct bnxt_ntuple_filter *fltr;
485
486 head = &bp->ntp_fltr_hash_tbl[i];
487 rcu_read_lock();
488 hlist_for_each_entry_rcu(fltr, head, hash) {
489 if (j == cmd->rule_cnt)
490 break;
491 rule_locs[j++] = fltr->sw_id;
492 }
493 rcu_read_unlock();
494 if (j == cmd->rule_cnt)
495 break;
496 }
497 cmd->rule_cnt = j;
498 return 0;
499}
500
501static int bnxt_grxclsrule(struct bnxt *bp, struct ethtool_rxnfc *cmd)
502{
503 struct ethtool_rx_flow_spec *fs =
504 (struct ethtool_rx_flow_spec *)&cmd->fs;
505 struct bnxt_ntuple_filter *fltr;
506 struct flow_keys *fkeys;
507 int i, rc = -EINVAL;
508
509 if (fs->location < 0 || fs->location >= BNXT_NTP_FLTR_MAX_FLTR)
510 return rc;
511
512 for (i = 0; i < BNXT_NTP_FLTR_HASH_SIZE; i++) {
513 struct hlist_head *head;
514
515 head = &bp->ntp_fltr_hash_tbl[i];
516 rcu_read_lock();
517 hlist_for_each_entry_rcu(fltr, head, hash) {
518 if (fltr->sw_id == fs->location)
519 goto fltr_found;
520 }
521 rcu_read_unlock();
522 }
523 return rc;
524
525fltr_found:
526 fkeys = &fltr->fkeys;
527 if (fkeys->basic.ip_proto == IPPROTO_TCP)
528 fs->flow_type = TCP_V4_FLOW;
529 else if (fkeys->basic.ip_proto == IPPROTO_UDP)
530 fs->flow_type = UDP_V4_FLOW;
531 else
532 goto fltr_err;
533
534 fs->h_u.tcp_ip4_spec.ip4src = fkeys->addrs.v4addrs.src;
535 fs->m_u.tcp_ip4_spec.ip4src = cpu_to_be32(~0);
536
537 fs->h_u.tcp_ip4_spec.ip4dst = fkeys->addrs.v4addrs.dst;
538 fs->m_u.tcp_ip4_spec.ip4dst = cpu_to_be32(~0);
539
540 fs->h_u.tcp_ip4_spec.psrc = fkeys->ports.src;
541 fs->m_u.tcp_ip4_spec.psrc = cpu_to_be16(~0);
542
543 fs->h_u.tcp_ip4_spec.pdst = fkeys->ports.dst;
544 fs->m_u.tcp_ip4_spec.pdst = cpu_to_be16(~0);
545
546 fs->ring_cookie = fltr->rxq;
547 rc = 0;
548
549fltr_err:
550 rcu_read_unlock();
551
552 return rc;
553}
a011952a
MC		 554#endif
555
556static u64 get_ethtool_ipv4_rss(struct bnxt *bp)
557{
558 if (bp->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_IPV4)
559 return RXH_IP_SRC | RXH_IP_DST;
560 return 0;
561}
562
563static u64 get_ethtool_ipv6_rss(struct bnxt *bp)
564{
565 if (bp->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_IPV6)
566 return RXH_IP_SRC | RXH_IP_DST;
567 return 0;
568}
569
570static int bnxt_grxfh(struct bnxt *bp, struct ethtool_rxnfc *cmd)
571{
572 cmd->data = 0;
573 switch (cmd->flow_type) {
574 case TCP_V4_FLOW:
575 if (bp->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV4)
576 cmd->data |= RXH_IP_SRC | RXH_IP_DST |
577 RXH_L4_B_0_1 | RXH_L4_B_2_3;
578 cmd->data |= get_ethtool_ipv4_rss(bp);
579 break;
580 case UDP_V4_FLOW:
581 if (bp->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV4)
582 cmd->data |= RXH_IP_SRC | RXH_IP_DST |
583 RXH_L4_B_0_1 | RXH_L4_B_2_3;
584 /* fall through */
585 case SCTP_V4_FLOW:
586 case AH_ESP_V4_FLOW:
587 case AH_V4_FLOW:
588 case ESP_V4_FLOW:
589 case IPV4_FLOW:
590 cmd->data |= get_ethtool_ipv4_rss(bp);
591 break;
592
593 case TCP_V6_FLOW:
594 if (bp->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV6)
595 cmd->data |= RXH_IP_SRC | RXH_IP_DST |
596 RXH_L4_B_0_1 | RXH_L4_B_2_3;
597 cmd->data |= get_ethtool_ipv6_rss(bp);
598 break;
599 case UDP_V6_FLOW:
600 if (bp->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV6)
601 cmd->data |= RXH_IP_SRC | RXH_IP_DST |
602 RXH_L4_B_0_1 | RXH_L4_B_2_3;
603 /* fall through */
604 case SCTP_V6_FLOW:
605 case AH_ESP_V6_FLOW:
606 case AH_V6_FLOW:
607 case ESP_V6_FLOW:
608 case IPV6_FLOW:
609 cmd->data |= get_ethtool_ipv6_rss(bp);
610 break;
611 }
612 return 0;
613}
614
615#define RXH_4TUPLE (RXH_IP_SRC | RXH_IP_DST | RXH_L4_B_0_1 | RXH_L4_B_2_3)
616#define RXH_2TUPLE (RXH_IP_SRC | RXH_IP_DST)
617
618static int bnxt_srxfh(struct bnxt *bp, struct ethtool_rxnfc *cmd)
619{
620 u32 rss_hash_cfg = bp->rss_hash_cfg;
621 int tuple, rc = 0;
622
623 if (cmd->data == RXH_4TUPLE)
624 tuple = 4;
625 else if (cmd->data == RXH_2TUPLE)
626 tuple = 2;
627 else if (!cmd->data)
628 tuple = 0;
629 else
630 return -EINVAL;
631
632 if (cmd->flow_type == TCP_V4_FLOW) {
633 rss_hash_cfg &= ~VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV4;
634 if (tuple == 4)
635 rss_hash_cfg |= VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV4;
636 } else if (cmd->flow_type == UDP_V4_FLOW) {
637 if (tuple == 4 && !(bp->flags & BNXT_FLAG_UDP_RSS_CAP))
638 return -EINVAL;
639 rss_hash_cfg &= ~VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV4;
640 if (tuple == 4)
641 rss_hash_cfg |= VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV4;
642 } else if (cmd->flow_type == TCP_V6_FLOW) {
643 rss_hash_cfg &= ~VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV6;
644 if (tuple == 4)
645 rss_hash_cfg |= VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV6;
646 } else if (cmd->flow_type == UDP_V6_FLOW) {
647 if (tuple == 4 && !(bp->flags & BNXT_FLAG_UDP_RSS_CAP))
648 return -EINVAL;
649 rss_hash_cfg &= ~VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV6;
650 if (tuple == 4)
651 rss_hash_cfg |= VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV6;
652 } else if (tuple == 4) {
653 return -EINVAL;
654 }
655
656 switch (cmd->flow_type) {
657 case TCP_V4_FLOW:
658 case UDP_V4_FLOW:
659 case SCTP_V4_FLOW:
660 case AH_ESP_V4_FLOW:
661 case AH_V4_FLOW:
662 case ESP_V4_FLOW:
663 case IPV4_FLOW:
664 if (tuple == 2)
665 rss_hash_cfg |= VNIC_RSS_CFG_REQ_HASH_TYPE_IPV4;
666 else if (!tuple)
667 rss_hash_cfg &= ~VNIC_RSS_CFG_REQ_HASH_TYPE_IPV4;
668 break;
669
670 case TCP_V6_FLOW:
671 case UDP_V6_FLOW:
672 case SCTP_V6_FLOW:
673 case AH_ESP_V6_FLOW:
674 case AH_V6_FLOW:
675 case ESP_V6_FLOW:
676 case IPV6_FLOW:
677 if (tuple == 2)
678 rss_hash_cfg |= VNIC_RSS_CFG_REQ_HASH_TYPE_IPV6;
679 else if (!tuple)
680 rss_hash_cfg &= ~VNIC_RSS_CFG_REQ_HASH_TYPE_IPV6;
681 break;
682 }
683
684 if (bp->rss_hash_cfg == rss_hash_cfg)
685 return 0;
686
687 bp->rss_hash_cfg = rss_hash_cfg;
688 if (netif_running(bp->dev)) {
689 bnxt_close_nic(bp, false, false);
690 rc = bnxt_open_nic(bp, false, false);
691 }
692 return rc;
693}
c0c050c5
MC		 694
695static int bnxt_get_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd,
696 u32 *rule_locs)
697{
698 struct bnxt *bp = netdev_priv(dev);
699 int rc = 0;
700
701 switch (cmd->cmd) {
a011952a 702#ifdef CONFIG_RFS_ACCEL
c0c050c5
MC		 703 case ETHTOOL_GRXRINGS:
704 cmd->data = bp->rx_nr_rings;
705 break;
706
707 case ETHTOOL_GRXCLSRLCNT:
708 cmd->rule_cnt = bp->ntp_fltr_count;
709 cmd->data = BNXT_NTP_FLTR_MAX_FLTR;
710 break;
711
712 case ETHTOOL_GRXCLSRLALL:
713 rc = bnxt_grxclsrlall(bp, cmd, (u32 *)rule_locs);
714 break;
715
716 case ETHTOOL_GRXCLSRULE:
717 rc = bnxt_grxclsrule(bp, cmd);
718 break;
a011952a
MC		 719#endif
720
721 case ETHTOOL_GRXFH:
722 rc = bnxt_grxfh(bp, cmd);
723 break;
c0c050c5
MC		 724
725 default:
726 rc = -EOPNOTSUPP;
727 break;
728 }
729
730 return rc;
731}
a011952a
MC		 732
733static int bnxt_set_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd)
734{
735 struct bnxt *bp = netdev_priv(dev);
736 int rc;
737
738 switch (cmd->cmd) {
739 case ETHTOOL_SRXFH:
740 rc = bnxt_srxfh(bp, cmd);
741 break;
742
743 default:
744 rc = -EOPNOTSUPP;
745 break;
746 }
747 return rc;
748}
c0c050c5
MC		 749
750static u32 bnxt_get_rxfh_indir_size(struct net_device *dev)
751{
752 return HW_HASH_INDEX_SIZE;
753}
754
755static u32 bnxt_get_rxfh_key_size(struct net_device *dev)
756{
757 return HW_HASH_KEY_SIZE;
758}
759
760static int bnxt_get_rxfh(struct net_device *dev, u32 *indir, u8 *key,
761 u8 *hfunc)
762{
763 struct bnxt *bp = netdev_priv(dev);
764 struct bnxt_vnic_info *vnic = &bp->vnic_info[0];
765 int i = 0;
766
767 if (hfunc)
768 *hfunc = ETH_RSS_HASH_TOP;
769
770 if (indir)
771 for (i = 0; i < HW_HASH_INDEX_SIZE; i++)
772 indir[i] = le16_to_cpu(vnic->rss_table[i]);
773
774 if (key)
775 memcpy(key, vnic->rss_hash_key, HW_HASH_KEY_SIZE);
776
777 return 0;
778}
779
780static void bnxt_get_drvinfo(struct net_device *dev,
781 struct ethtool_drvinfo *info)
782{
783 struct bnxt *bp = netdev_priv(dev);
3ebf6f0a
RS		 784 char *pkglog;
785 char *pkgver = NULL;
c0c050c5 786
3ebf6f0a
RS		 787 pkglog = kmalloc(BNX_PKG_LOG_MAX_LENGTH, GFP_KERNEL);
788 if (pkglog)
789 pkgver = bnxt_get_pkgver(dev, pkglog, BNX_PKG_LOG_MAX_LENGTH);
c0c050c5
MC		 790 strlcpy(info->driver, DRV_MODULE_NAME, sizeof(info->driver));
791 strlcpy(info->version, DRV_MODULE_VERSION, sizeof(info->version));
3ebf6f0a
RS		 792 if (pkgver && *pkgver != 0 && isdigit(*pkgver))
793 snprintf(info->fw_version, sizeof(info->fw_version) - 1,
794 "%s pkg %s", bp->fw_ver_str, pkgver);
795 else
796 strlcpy(info->fw_version, bp->fw_ver_str,
797 sizeof(info->fw_version));
c0c050c5
MC		 798 strlcpy(info->bus_info, pci_name(bp->pdev), sizeof(info->bus_info));
799 info->n_stats = BNXT_NUM_STATS * bp->cp_nr_rings;
800 info->testinfo_len = BNXT_NUM_TESTS(bp);
801 /* TODO CHIMP_FW: eeprom dump details */
802 info->eedump_len = 0;
803 /* TODO CHIMP FW: reg dump details */
804 info->regdump_len = 0;
3ebf6f0a 805 kfree(pkglog);
c0c050c5
MC		 806}
807
170ce013 808u32 _bnxt_fw_to_ethtool_adv_spds(u16 fw_speeds, u8 fw_pause)
c0c050c5 809{
c0c050c5
MC		 810 u32 speed_mask = 0;
811
812 /* TODO: support 25GB, 40GB, 50GB with different cable type */
813 /* set the advertised speeds */
814 if (fw_speeds & BNXT_LINK_SPEED_MSK_100MB)
815 speed_mask |= ADVERTISED_100baseT_Full;
816 if (fw_speeds & BNXT_LINK_SPEED_MSK_1GB)
817 speed_mask |= ADVERTISED_1000baseT_Full;
818 if (fw_speeds & BNXT_LINK_SPEED_MSK_2_5GB)
819 speed_mask |= ADVERTISED_2500baseX_Full;
820 if (fw_speeds & BNXT_LINK_SPEED_MSK_10GB)
821 speed_mask |= ADVERTISED_10000baseT_Full;
c0c050c5 822 if (fw_speeds & BNXT_LINK_SPEED_MSK_40GB)
1c49c421 823 speed_mask |= ADVERTISED_40000baseCR4_Full;
27c4d578
MC		 824
825 if ((fw_pause & BNXT_LINK_PAUSE_BOTH) == BNXT_LINK_PAUSE_BOTH)
826 speed_mask |= ADVERTISED_Pause;
827 else if (fw_pause & BNXT_LINK_PAUSE_TX)
828 speed_mask |= ADVERTISED_Asym_Pause;
829 else if (fw_pause & BNXT_LINK_PAUSE_RX)
830 speed_mask |= ADVERTISED_Pause | ADVERTISED_Asym_Pause;
831
c0c050c5
MC		 832 return speed_mask;
833}
834
00c04a92
MC		 835#define BNXT_FW_TO_ETHTOOL_SPDS(fw_speeds, fw_pause, lk_ksettings, name)\
836{ \
837 if ((fw_speeds) & BNXT_LINK_SPEED_MSK_100MB) \
838 ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\
839 100baseT_Full); \
840 if ((fw_speeds) & BNXT_LINK_SPEED_MSK_1GB) \
841 ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\
842 1000baseT_Full); \
843 if ((fw_speeds) & BNXT_LINK_SPEED_MSK_10GB) \
844 ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\
845 10000baseT_Full); \
846 if ((fw_speeds) & BNXT_LINK_SPEED_MSK_25GB) \
847 ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\
848 25000baseCR_Full); \
849 if ((fw_speeds) & BNXT_LINK_SPEED_MSK_40GB) \
850 ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\
851 40000baseCR4_Full);\
852 if ((fw_speeds) & BNXT_LINK_SPEED_MSK_50GB) \
853 ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\
854 50000baseCR2_Full);\
855 if ((fw_pause) & BNXT_LINK_PAUSE_RX) { \
856 ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\
857 Pause); \
858 if (!((fw_pause) & BNXT_LINK_PAUSE_TX)) \
859 ethtool_link_ksettings_add_link_mode( \
860 lk_ksettings, name, Asym_Pause);\
861 } else if ((fw_pause) & BNXT_LINK_PAUSE_TX) { \
862 ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\
863 Asym_Pause); \
864 } \
865}
866
867#define BNXT_ETHTOOL_TO_FW_SPDS(fw_speeds, lk_ksettings, name) \
868{ \
869 if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \
870 100baseT_Full) || \
871 ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \
872 100baseT_Half)) \
873 (fw_speeds) |= BNXT_LINK_SPEED_MSK_100MB; \
874 if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \
875 1000baseT_Full) || \
876 ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \
877 1000baseT_Half)) \
878 (fw_speeds) |= BNXT_LINK_SPEED_MSK_1GB; \
879 if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \
880 10000baseT_Full)) \
881 (fw_speeds) |= BNXT_LINK_SPEED_MSK_10GB; \
882 if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \
883 25000baseCR_Full)) \
884 (fw_speeds) |= BNXT_LINK_SPEED_MSK_25GB; \
885 if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \
886 40000baseCR4_Full)) \
887 (fw_speeds) |= BNXT_LINK_SPEED_MSK_40GB; \
888 if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \
889 50000baseCR2_Full)) \
890 (fw_speeds) |= BNXT_LINK_SPEED_MSK_50GB; \
891}
892
893static void bnxt_fw_to_ethtool_advertised_spds(struct bnxt_link_info *link_info,
894 struct ethtool_link_ksettings *lk_ksettings)
27c4d578
MC		 895{
896 u16 fw_speeds = link_info->auto_link_speeds;
897 u8 fw_pause = 0;
898
899 if (link_info->autoneg & BNXT_AUTONEG_FLOW_CTRL)
900 fw_pause = link_info->auto_pause_setting;
901
00c04a92 902 BNXT_FW_TO_ETHTOOL_SPDS(fw_speeds, fw_pause, lk_ksettings, advertising);
27c4d578
MC		 903}
904
00c04a92
MC		 905static void bnxt_fw_to_ethtool_lp_adv(struct bnxt_link_info *link_info,
906 struct ethtool_link_ksettings *lk_ksettings)
3277360e
MC		 907{
908 u16 fw_speeds = link_info->lp_auto_link_speeds;
909 u8 fw_pause = 0;
910
911 if (link_info->autoneg & BNXT_AUTONEG_FLOW_CTRL)
912 fw_pause = link_info->lp_pause;
913
00c04a92
MC		 914 BNXT_FW_TO_ETHTOOL_SPDS(fw_speeds, fw_pause, lk_ksettings,
915 lp_advertising);
3277360e
MC		 916}
917
00c04a92
MC		 918static void bnxt_fw_to_ethtool_support_spds(struct bnxt_link_info *link_info,
919 struct ethtool_link_ksettings *lk_ksettings)
4b32cacc
MC		 920{
921 u16 fw_speeds = link_info->support_speeds;
4b32cacc 922
00c04a92 923 BNXT_FW_TO_ETHTOOL_SPDS(fw_speeds, 0, lk_ksettings, supported);
4b32cacc 924
00c04a92
MC		 925 ethtool_link_ksettings_add_link_mode(lk_ksettings, supported, Pause);
926 ethtool_link_ksettings_add_link_mode(lk_ksettings, supported,
927 Asym_Pause);
93ed8117 928
00c04a92
MC		 929 if (link_info->support_auto_speeds)
930 ethtool_link_ksettings_add_link_mode(lk_ksettings, supported,
931 Autoneg);
93ed8117
MC		 932}
933
c0c050c5
MC		 934u32 bnxt_fw_to_ethtool_speed(u16 fw_link_speed)
935{
936 switch (fw_link_speed) {
937 case BNXT_LINK_SPEED_100MB:
938 return SPEED_100;
939 case BNXT_LINK_SPEED_1GB:
940 return SPEED_1000;
941 case BNXT_LINK_SPEED_2_5GB:
942 return SPEED_2500;
943 case BNXT_LINK_SPEED_10GB:
944 return SPEED_10000;
945 case BNXT_LINK_SPEED_20GB:
946 return SPEED_20000;
947 case BNXT_LINK_SPEED_25GB:
948 return SPEED_25000;
949 case BNXT_LINK_SPEED_40GB:
950 return SPEED_40000;
951 case BNXT_LINK_SPEED_50GB:
952 return SPEED_50000;
953 default:
954 return SPEED_UNKNOWN;
955 }
956}
957
00c04a92
MC		 958static int bnxt_get_link_ksettings(struct net_device *dev,
959 struct ethtool_link_ksettings *lk_ksettings)
c0c050c5
MC		 960{
961 struct bnxt *bp = netdev_priv(dev);
962 struct bnxt_link_info *link_info = &bp->link_info;
00c04a92
MC		 963 struct ethtool_link_settings *base = &lk_ksettings->base;
964 u32 ethtool_speed;
c0c050c5 965
00c04a92
MC		 966 ethtool_link_ksettings_zero_link_mode(lk_ksettings, supported);
967 bnxt_fw_to_ethtool_support_spds(link_info, lk_ksettings);
c0c050c5 968
00c04a92 969 ethtool_link_ksettings_zero_link_mode(lk_ksettings, advertising);
b763499e 970 if (link_info->autoneg) {
00c04a92
MC		 971 bnxt_fw_to_ethtool_advertised_spds(link_info, lk_ksettings);
972 ethtool_link_ksettings_add_link_mode(lk_ksettings,
973 advertising, Autoneg);
974 base->autoneg = AUTONEG_ENABLE;
3277360e 975 if (link_info->phy_link_status == BNXT_LINK_LINK)
00c04a92 976 bnxt_fw_to_ethtool_lp_adv(link_info, lk_ksettings);
29c262fe
MC		 977 ethtool_speed = bnxt_fw_to_ethtool_speed(link_info->link_speed);
978 if (!netif_carrier_ok(dev))
00c04a92 979 base->duplex = DUPLEX_UNKNOWN;
29c262fe 980 else if (link_info->duplex & BNXT_LINK_DUPLEX_FULL)
00c04a92 981 base->duplex = DUPLEX_FULL;
29c262fe 982 else
00c04a92 983 base->duplex = DUPLEX_HALF;
c0c050c5 984 } else {
00c04a92 985 base->autoneg = AUTONEG_DISABLE;
29c262fe
MC		 986 ethtool_speed =
987 bnxt_fw_to_ethtool_speed(link_info->req_link_speed);
00c04a92 988 base->duplex = DUPLEX_HALF;
29c262fe 989 if (link_info->req_duplex == BNXT_LINK_DUPLEX_FULL)
00c04a92 990 base->duplex = DUPLEX_FULL;
c0c050c5 991 }
00c04a92 992 base->speed = ethtool_speed;
c0c050c5 993
00c04a92 994 base->port = PORT_NONE;
c0c050c5 995 if (link_info->media_type == PORT_PHY_QCFG_RESP_MEDIA_TYPE_TP) {
00c04a92
MC		 996 base->port = PORT_TP;
997 ethtool_link_ksettings_add_link_mode(lk_ksettings, supported,
998 TP);
999 ethtool_link_ksettings_add_link_mode(lk_ksettings, advertising,
1000 TP);
c0c050c5 1001 } else {
00c04a92
MC		 1002 ethtool_link_ksettings_add_link_mode(lk_ksettings, supported,
1003 FIBRE);
1004 ethtool_link_ksettings_add_link_mode(lk_ksettings, advertising,
1005 FIBRE);
c0c050c5
MC		 1006
1007 if (link_info->media_type == PORT_PHY_QCFG_RESP_MEDIA_TYPE_DAC)
00c04a92 1008 base->port = PORT_DA;
c0c050c5
MC		 1009 else if (link_info->media_type ==
1010 PORT_PHY_QCFG_RESP_MEDIA_TYPE_FIBRE)
00c04a92 1011 base->port = PORT_FIBRE;
c0c050c5 1012 }
00c04a92 1013 base->phy_address = link_info->phy_addr;
c0c050c5
MC		 1014
1015 return 0;
1016}
1017
1018static u32 bnxt_get_fw_speed(struct net_device *dev, u16 ethtool_speed)
1019{
9d9cee08
MC		 1020 struct bnxt *bp = netdev_priv(dev);
1021 struct bnxt_link_info *link_info = &bp->link_info;
1022 u16 support_spds = link_info->support_speeds;
1023 u32 fw_speed = 0;
1024
c0c050c5
MC		 1025 switch (ethtool_speed) {
1026 case SPEED_100:
9d9cee08
MC		 1027 if (support_spds & BNXT_LINK_SPEED_MSK_100MB)
1028 fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_100MB;
1029 break;
c0c050c5 1030 case SPEED_1000:
9d9cee08
MC		 1031 if (support_spds & BNXT_LINK_SPEED_MSK_1GB)
1032 fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_1GB;
1033 break;
c0c050c5 1034 case SPEED_2500:
9d9cee08
MC		 1035 if (support_spds & BNXT_LINK_SPEED_MSK_2_5GB)
1036 fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_2_5GB;
1037 break;
c0c050c5 1038 case SPEED_10000:
9d9cee08
MC		 1039 if (support_spds & BNXT_LINK_SPEED_MSK_10GB)
1040 fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_10GB;
1041 break;
c0c050c5 1042 case SPEED_20000:
9d9cee08
MC		 1043 if (support_spds & BNXT_LINK_SPEED_MSK_20GB)
1044 fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_20GB;
1045 break;
c0c050c5 1046 case SPEED_25000:
9d9cee08
MC		 1047 if (support_spds & BNXT_LINK_SPEED_MSK_25GB)
1048 fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_25GB;
1049 break;
c0c050c5 1050 case SPEED_40000:
9d9cee08
MC		 1051 if (support_spds & BNXT_LINK_SPEED_MSK_40GB)
1052 fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_40GB;
1053 break;
c0c050c5 1054 case SPEED_50000:
9d9cee08
MC		 1055 if (support_spds & BNXT_LINK_SPEED_MSK_50GB)
1056 fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_50GB;
1057 break;
c0c050c5
MC		 1058 default:
1059 netdev_err(dev, "unsupported speed!\n");
1060 break;
1061 }
9d9cee08 1062 return fw_speed;
c0c050c5
MC		 1063}
1064
939f7f0c 1065u16 bnxt_get_fw_auto_link_speeds(u32 advertising)
c0c050c5
MC		 1066{
1067 u16 fw_speed_mask = 0;
1068
1069 /* only support autoneg at speed 100, 1000, and 10000 */
1070 if (advertising & (ADVERTISED_100baseT_Full |
1071 ADVERTISED_100baseT_Half)) {
1072 fw_speed_mask |= BNXT_LINK_SPEED_MSK_100MB;
1073 }
1074 if (advertising & (ADVERTISED_1000baseT_Full |
1075 ADVERTISED_1000baseT_Half)) {
1076 fw_speed_mask |= BNXT_LINK_SPEED_MSK_1GB;
1077 }
1078 if (advertising & ADVERTISED_10000baseT_Full)
1079 fw_speed_mask |= BNXT_LINK_SPEED_MSK_10GB;
1080
1c49c421
MC		 1081 if (advertising & ADVERTISED_40000baseCR4_Full)
1082 fw_speed_mask |= BNXT_LINK_SPEED_MSK_40GB;
1083
c0c050c5
MC		 1084 return fw_speed_mask;
1085}
1086
00c04a92
MC		 1087static int bnxt_set_link_ksettings(struct net_device *dev,
1088 const struct ethtool_link_ksettings *lk_ksettings)
c0c050c5 1089{
c0c050c5
MC		 1090 struct bnxt *bp = netdev_priv(dev);
1091 struct bnxt_link_info *link_info = &bp->link_info;
00c04a92 1092 const struct ethtool_link_settings *base = &lk_ksettings->base;
c0c050c5
MC		 1093 u32 speed, fw_advertising = 0;
1094 bool set_pause = false;
00c04a92 1095 int rc = 0;
c0c050c5 1096
567b2abe 1097 if (!BNXT_SINGLE_PF(bp))
00c04a92 1098 return -EOPNOTSUPP;
f1a082a6 1099
00c04a92
MC		 1100 if (base->autoneg == AUTONEG_ENABLE) {
1101 BNXT_ETHTOOL_TO_FW_SPDS(fw_advertising, lk_ksettings,
1102 advertising);
c0c050c5
MC		 1103 link_info->autoneg |= BNXT_AUTONEG_SPEED;
1104 if (!fw_advertising)
93ed8117 1105 link_info->advertising = link_info->support_auto_speeds;
c0c050c5
MC		 1106 else
1107 link_info->advertising = fw_advertising;
1108 /* any change to autoneg will cause link change, therefore the
1109 * driver should put back the original pause setting in autoneg
1110 */
1111 set_pause = true;
1112 } else {
9d9cee08 1113 u16 fw_speed;
03efbec0 1114 u8 phy_type = link_info->phy_type;
9d9cee08 1115
03efbec0
MC		 1116 if (phy_type == PORT_PHY_QCFG_RESP_PHY_TYPE_BASET ||
1117 phy_type == PORT_PHY_QCFG_RESP_PHY_TYPE_BASETE ||
1118 link_info->media_type == PORT_PHY_QCFG_RESP_MEDIA_TYPE_TP) {
1119 netdev_err(dev, "10GBase-T devices must autoneg\n");
1120 rc = -EINVAL;
1121 goto set_setting_exit;
1122 }
00c04a92 1123 if (base->duplex == DUPLEX_HALF) {
c0c050c5
MC		 1124 netdev_err(dev, "HALF DUPLEX is not supported!\n");
1125 rc = -EINVAL;
1126 goto set_setting_exit;
1127 }
00c04a92 1128 speed = base->speed;
9d9cee08
MC		 1129 fw_speed = bnxt_get_fw_speed(dev, speed);
1130 if (!fw_speed) {
1131 rc = -EINVAL;
1132 goto set_setting_exit;
1133 }
1134 link_info->req_link_speed = fw_speed;
c0c050c5 1135 link_info->req_duplex = BNXT_LINK_DUPLEX_FULL;
b763499e 1136 link_info->autoneg = 0;
c0c050c5
MC		 1137 link_info->advertising = 0;
1138 }
1139
1140 if (netif_running(dev))
939f7f0c 1141 rc = bnxt_hwrm_set_link_setting(bp, set_pause, false);
c0c050c5
MC		 1142
1143set_setting_exit:
1144 return rc;
1145}
1146
1147static void bnxt_get_pauseparam(struct net_device *dev,
1148 struct ethtool_pauseparam *epause)
1149{
1150 struct bnxt *bp = netdev_priv(dev);
1151 struct bnxt_link_info *link_info = &bp->link_info;
1152
1153 if (BNXT_VF(bp))
1154 return;
b763499e 1155 epause->autoneg = !!(link_info->autoneg & BNXT_AUTONEG_FLOW_CTRL);
3c02d1bb
MC		 1156 epause->rx_pause = !!(link_info->req_flow_ctrl & BNXT_LINK_PAUSE_RX);
1157 epause->tx_pause = !!(link_info->req_flow_ctrl & BNXT_LINK_PAUSE_TX);
c0c050c5
MC		 1158}
1159
1160static int bnxt_set_pauseparam(struct net_device *dev,
1161 struct ethtool_pauseparam *epause)
1162{
1163 int rc = 0;
1164 struct bnxt *bp = netdev_priv(dev);
1165 struct bnxt_link_info *link_info = &bp->link_info;
1166
567b2abe 1167 if (!BNXT_SINGLE_PF(bp))
75362a3f 1168 return -EOPNOTSUPP;
c0c050c5
MC		 1169
1170 if (epause->autoneg) {
b763499e
MC		 1171 if (!(link_info->autoneg & BNXT_AUTONEG_SPEED))
1172 return -EINVAL;
1173
c0c050c5 1174 link_info->autoneg |= BNXT_AUTONEG_FLOW_CTRL;
c9ee9516
MC		 1175 if (bp->hwrm_spec_code >= 0x10201)
1176 link_info->req_flow_ctrl =
1177 PORT_PHY_CFG_REQ_AUTO_PAUSE_AUTONEG_PAUSE;
c0c050c5
MC		 1178 } else {
1179 /* when transition from auto pause to force pause,
1180 * force a link change
1181 */
1182 if (link_info->autoneg & BNXT_AUTONEG_FLOW_CTRL)
1183 link_info->force_link_chng = true;
1184 link_info->autoneg &= ~BNXT_AUTONEG_FLOW_CTRL;
c9ee9516 1185 link_info->req_flow_ctrl = 0;
c0c050c5
MC		 1186 }
1187 if (epause->rx_pause)
1188 link_info->req_flow_ctrl |= BNXT_LINK_PAUSE_RX;
c0c050c5
MC		 1189
1190 if (epause->tx_pause)
1191 link_info->req_flow_ctrl |= BNXT_LINK_PAUSE_TX;
c0c050c5
MC		 1192
1193 if (netif_running(dev))
1194 rc = bnxt_hwrm_set_pause(bp);
1195 return rc;
1196}
1197
1198static u32 bnxt_get_link(struct net_device *dev)
1199{
1200 struct bnxt *bp = netdev_priv(dev);
1201
1202 /* TODO: handle MF, VF, driver close case */
1203 return bp->link_info.link_up;
1204}
1205
5ac67d8b
RS		 1206static int bnxt_find_nvram_item(struct net_device *dev, u16 type, u16 ordinal,
1207 u16 ext, u16 *index, u32 *item_length,
1208 u32 *data_length);
1209
c0c050c5
MC		 1210static int bnxt_flash_nvram(struct net_device *dev,
1211 u16 dir_type,
1212 u16 dir_ordinal,
1213 u16 dir_ext,
1214 u16 dir_attr,
1215 const u8 *data,
1216 size_t data_len)
1217{
1218 struct bnxt *bp = netdev_priv(dev);
1219 int rc;
1220 struct hwrm_nvm_write_input req = {0};
1221 dma_addr_t dma_handle;
1222 u8 *kmem;
1223
1224 bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_NVM_WRITE, -1, -1);
1225
1226 req.dir_type = cpu_to_le16(dir_type);
1227 req.dir_ordinal = cpu_to_le16(dir_ordinal);
1228 req.dir_ext = cpu_to_le16(dir_ext);
1229 req.dir_attr = cpu_to_le16(dir_attr);
1230 req.dir_data_length = cpu_to_le32(data_len);
1231
1232 kmem = dma_alloc_coherent(&bp->pdev->dev, data_len, &dma_handle,
1233 GFP_KERNEL);
1234 if (!kmem) {
1235 netdev_err(dev, "dma_alloc_coherent failure, length = %u\n",
1236 (unsigned)data_len);
1237 return -ENOMEM;
1238 }
1239 memcpy(kmem, data, data_len);
1240 req.host_src_addr = cpu_to_le64(dma_handle);
1241
1242 rc = hwrm_send_message(bp, &req, sizeof(req), FLASH_NVRAM_TIMEOUT);
1243 dma_free_coherent(&bp->pdev->dev, data_len, kmem, dma_handle);
1244
1245 return rc;
1246}
1247
d2d6318c
RS		 1248static int bnxt_firmware_reset(struct net_device *dev,
1249 u16 dir_type)
1250{
1251 struct bnxt *bp = netdev_priv(dev);
1252 struct hwrm_fw_reset_input req = {0};
1253
1254 bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_FW_RESET, -1, -1);
1255
1256 /* TODO: Support ASAP ChiMP self-reset (e.g. upon PF driver unload) */
1257 /* TODO: Address self-reset of APE/KONG/BONO/TANG or ungraceful reset */
1258 /* (e.g. when firmware isn't already running) */
1259 switch (dir_type) {
1260 case BNX_DIR_TYPE_CHIMP_PATCH:
1261 case BNX_DIR_TYPE_BOOTCODE:
1262 case BNX_DIR_TYPE_BOOTCODE_2:
1263 req.embedded_proc_type = FW_RESET_REQ_EMBEDDED_PROC_TYPE_BOOT;
1264 /* Self-reset ChiMP upon next PCIe reset: */
1265 req.selfrst_status = FW_RESET_REQ_SELFRST_STATUS_SELFRSTPCIERST;
1266 break;
1267 case BNX_DIR_TYPE_APE_FW:
1268 case BNX_DIR_TYPE_APE_PATCH:
1269 req.embedded_proc_type = FW_RESET_REQ_EMBEDDED_PROC_TYPE_MGMT;
08141e0b
RS		 1270 /* Self-reset APE upon next PCIe reset: */
1271 req.selfrst_status = FW_RESET_REQ_SELFRST_STATUS_SELFRSTPCIERST;
d2d6318c
RS		 1272 break;
1273 case BNX_DIR_TYPE_KONG_FW:
1274 case BNX_DIR_TYPE_KONG_PATCH:
1275 req.embedded_proc_type =
1276 FW_RESET_REQ_EMBEDDED_PROC_TYPE_NETCTRL;
1277 break;
1278 case BNX_DIR_TYPE_BONO_FW:
1279 case BNX_DIR_TYPE_BONO_PATCH:
1280 req.embedded_proc_type = FW_RESET_REQ_EMBEDDED_PROC_TYPE_ROCE;
1281 break;
1282 default:
1283 return -EINVAL;
1284 }
1285
1286 return hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
1287}
1288
c0c050c5
MC		 1289static int bnxt_flash_firmware(struct net_device *dev,
1290 u16 dir_type,
1291 const u8 *fw_data,
1292 size_t fw_size)
1293{
1294 int rc = 0;
1295 u16 code_type;
1296 u32 stored_crc;
1297 u32 calculated_crc;
1298 struct bnxt_fw_header *header = (struct bnxt_fw_header *)fw_data;
1299
1300 switch (dir_type) {
1301 case BNX_DIR_TYPE_BOOTCODE:
1302 case BNX_DIR_TYPE_BOOTCODE_2:
1303 code_type = CODE_BOOT;
1304 break;
93e0b4fe
RS		 1305 case BNX_DIR_TYPE_CHIMP_PATCH:
1306 code_type = CODE_CHIMP_PATCH;
1307 break;
2731d70f
RS		 1308 case BNX_DIR_TYPE_APE_FW:
1309 code_type = CODE_MCTP_PASSTHRU;
1310 break;
93e0b4fe
RS		 1311 case BNX_DIR_TYPE_APE_PATCH:
1312 code_type = CODE_APE_PATCH;
1313 break;
1314 case BNX_DIR_TYPE_KONG_FW:
1315 code_type = CODE_KONG_FW;
1316 break;
1317 case BNX_DIR_TYPE_KONG_PATCH:
1318 code_type = CODE_KONG_PATCH;
1319 break;
1320 case BNX_DIR_TYPE_BONO_FW:
1321 code_type = CODE_BONO_FW;
1322 break;
1323 case BNX_DIR_TYPE_BONO_PATCH:
1324 code_type = CODE_BONO_PATCH;
1325 break;
c0c050c5
MC		 1326 default:
1327 netdev_err(dev, "Unsupported directory entry type: %u\n",
1328 dir_type);
1329 return -EINVAL;
1330 }
1331 if (fw_size < sizeof(struct bnxt_fw_header)) {
1332 netdev_err(dev, "Invalid firmware file size: %u\n",
1333 (unsigned int)fw_size);
1334 return -EINVAL;
1335 }
1336 if (header->signature != cpu_to_le32(BNXT_FIRMWARE_BIN_SIGNATURE)) {
1337 netdev_err(dev, "Invalid firmware signature: %08X\n",
1338 le32_to_cpu(header->signature));
1339 return -EINVAL;
1340 }
1341 if (header->code_type != code_type) {
1342 netdev_err(dev, "Expected firmware type: %d, read: %d\n",
1343 code_type, header->code_type);
1344 return -EINVAL;
1345 }
1346 if (header->device != DEVICE_CUMULUS_FAMILY) {
1347 netdev_err(dev, "Expected firmware device family %d, read: %d\n",
1348 DEVICE_CUMULUS_FAMILY, header->device);
1349 return -EINVAL;
1350 }
1351 /* Confirm the CRC32 checksum of the file: */
1352 stored_crc = le32_to_cpu(*(__le32 *)(fw_data + fw_size -
1353 sizeof(stored_crc)));
1354 calculated_crc = ~crc32(~0, fw_data, fw_size - sizeof(stored_crc));
1355 if (calculated_crc != stored_crc) {
1356 netdev_err(dev, "Firmware file CRC32 checksum (%08lX) does not match calculated checksum (%08lX)\n",
1357 (unsigned long)stored_crc,
1358 (unsigned long)calculated_crc);
1359 return -EINVAL;
1360 }
c0c050c5
MC		 1361 rc = bnxt_flash_nvram(dev, dir_type, BNX_DIR_ORDINAL_FIRST,
1362 0, 0, fw_data, fw_size);
d2d6318c
RS		 1363 if (rc == 0) /* Firmware update successful */
1364 rc = bnxt_firmware_reset(dev, dir_type);
1365
c0c050c5
MC		 1366 return rc;
1367}
1368
5ac67d8b
RS		 1369static int bnxt_flash_microcode(struct net_device *dev,
1370 u16 dir_type,
1371 const u8 *fw_data,
1372 size_t fw_size)
1373{
1374 struct bnxt_ucode_trailer *trailer;
1375 u32 calculated_crc;
1376 u32 stored_crc;
1377 int rc = 0;
1378
1379 if (fw_size < sizeof(struct bnxt_ucode_trailer)) {
1380 netdev_err(dev, "Invalid microcode file size: %u\n",
1381 (unsigned int)fw_size);
1382 return -EINVAL;
1383 }
1384 trailer = (struct bnxt_ucode_trailer *)(fw_data + (fw_size -
1385 sizeof(*trailer)));
1386 if (trailer->sig != cpu_to_le32(BNXT_UCODE_TRAILER_SIGNATURE)) {
1387 netdev_err(dev, "Invalid microcode trailer signature: %08X\n",
1388 le32_to_cpu(trailer->sig));
1389 return -EINVAL;
1390 }
1391 if (le16_to_cpu(trailer->dir_type) != dir_type) {
1392 netdev_err(dev, "Expected microcode type: %d, read: %d\n",
1393 dir_type, le16_to_cpu(trailer->dir_type));
1394 return -EINVAL;
1395 }
1396 if (le16_to_cpu(trailer->trailer_length) <
1397 sizeof(struct bnxt_ucode_trailer)) {
1398 netdev_err(dev, "Invalid microcode trailer length: %d\n",
1399 le16_to_cpu(trailer->trailer_length));
1400 return -EINVAL;
1401 }
1402
1403 /* Confirm the CRC32 checksum of the file: */
1404 stored_crc = le32_to_cpu(*(__le32 *)(fw_data + fw_size -
1405 sizeof(stored_crc)));
1406 calculated_crc = ~crc32(~0, fw_data, fw_size - sizeof(stored_crc));
1407 if (calculated_crc != stored_crc) {
1408 netdev_err(dev,
1409 "CRC32 (%08lX) does not match calculated: %08lX\n",
1410 (unsigned long)stored_crc,
1411 (unsigned long)calculated_crc);
1412 return -EINVAL;
1413 }
1414 rc = bnxt_flash_nvram(dev, dir_type, BNX_DIR_ORDINAL_FIRST,
1415 0, 0, fw_data, fw_size);
1416
1417 return rc;
1418}
1419
c0c050c5
MC		 1420static bool bnxt_dir_type_is_ape_bin_format(u16 dir_type)
1421{
1422 switch (dir_type) {
1423 case BNX_DIR_TYPE_CHIMP_PATCH:
1424 case BNX_DIR_TYPE_BOOTCODE:
1425 case BNX_DIR_TYPE_BOOTCODE_2:
1426 case BNX_DIR_TYPE_APE_FW:
1427 case BNX_DIR_TYPE_APE_PATCH:
1428 case BNX_DIR_TYPE_KONG_FW:
1429 case BNX_DIR_TYPE_KONG_PATCH:
93e0b4fe
RS		 1430 case BNX_DIR_TYPE_BONO_FW:
1431 case BNX_DIR_TYPE_BONO_PATCH:
c0c050c5
MC		 1432 return true;
1433 }
1434
1435 return false;
1436}
1437
5ac67d8b 1438static bool bnxt_dir_type_is_other_exec_format(u16 dir_type)
c0c050c5
MC		 1439{
1440 switch (dir_type) {
1441 case BNX_DIR_TYPE_AVS:
1442 case BNX_DIR_TYPE_EXP_ROM_MBA:
1443 case BNX_DIR_TYPE_PCIE:
1444 case BNX_DIR_TYPE_TSCF_UCODE:
1445 case BNX_DIR_TYPE_EXT_PHY:
1446 case BNX_DIR_TYPE_CCM:
1447 case BNX_DIR_TYPE_ISCSI_BOOT:
1448 case BNX_DIR_TYPE_ISCSI_BOOT_IPV6:
1449 case BNX_DIR_TYPE_ISCSI_BOOT_IPV4N6:
1450 return true;
1451 }
1452
1453 return false;
1454}
1455
1456static bool bnxt_dir_type_is_executable(u16 dir_type)
1457{
1458 return bnxt_dir_type_is_ape_bin_format(dir_type) ||
5ac67d8b 1459 bnxt_dir_type_is_other_exec_format(dir_type);
c0c050c5
MC		 1460}
1461
1462static int bnxt_flash_firmware_from_file(struct net_device *dev,
1463 u16 dir_type,
1464 const char *filename)
1465{
1466 const struct firmware *fw;
1467 int rc;
1468
c0c050c5
MC		 1469 rc = request_firmware(&fw, filename, &dev->dev);
1470 if (rc != 0) {
1471 netdev_err(dev, "Error %d requesting firmware file: %s\n",
1472 rc, filename);
1473 return rc;
1474 }
1475 if (bnxt_dir_type_is_ape_bin_format(dir_type) == true)
1476 rc = bnxt_flash_firmware(dev, dir_type, fw->data, fw->size);
5ac67d8b
RS		 1477 else if (bnxt_dir_type_is_other_exec_format(dir_type) == true)
1478 rc = bnxt_flash_microcode(dev, dir_type, fw->data, fw->size);
c0c050c5
MC		 1479 else
1480 rc = bnxt_flash_nvram(dev, dir_type, BNX_DIR_ORDINAL_FIRST,
1481 0, 0, fw->data, fw->size);
1482 release_firmware(fw);
1483 return rc;
1484}
1485
1486static int bnxt_flash_package_from_file(struct net_device *dev,
5ac67d8b 1487 char *filename, u32 install_type)
c0c050c5 1488{
5ac67d8b
RS		 1489 struct bnxt *bp = netdev_priv(dev);
1490 struct hwrm_nvm_install_update_output *resp = bp->hwrm_cmd_resp_addr;
1491 struct hwrm_nvm_install_update_input install = {0};
1492 const struct firmware *fw;
1493 u32 item_len;
1494 u16 index;
1495 int rc;
1496
1497 bnxt_hwrm_fw_set_time(bp);
1498
1499 if (bnxt_find_nvram_item(dev, BNX_DIR_TYPE_UPDATE,
1500 BNX_DIR_ORDINAL_FIRST, BNX_DIR_EXT_NONE,
1501 &index, &item_len, NULL) != 0) {
1502 netdev_err(dev, "PKG update area not created in nvram\n");
1503 return -ENOBUFS;
1504 }
1505
1506 rc = request_firmware(&fw, filename, &dev->dev);
1507 if (rc != 0) {
1508 netdev_err(dev, "PKG error %d requesting file: %s\n",
1509 rc, filename);
1510 return rc;
1511 }
1512
1513 if (fw->size > item_len) {
1514 netdev_err(dev, "PKG insufficient update area in nvram: %lu",
1515 (unsigned long)fw->size);
1516 rc = -EFBIG;
1517 } else {
1518 dma_addr_t dma_handle;
1519 u8 *kmem;
1520 struct hwrm_nvm_modify_input modify = {0};
1521
1522 bnxt_hwrm_cmd_hdr_init(bp, &modify, HWRM_NVM_MODIFY, -1, -1);
1523
1524 modify.dir_idx = cpu_to_le16(index);
1525 modify.len = cpu_to_le32(fw->size);
1526
1527 kmem = dma_alloc_coherent(&bp->pdev->dev, fw->size,
1528 &dma_handle, GFP_KERNEL);
1529 if (!kmem) {
1530 netdev_err(dev,
1531 "dma_alloc_coherent failure, length = %u\n",
1532 (unsigned int)fw->size);
1533 rc = -ENOMEM;
1534 } else {
1535 memcpy(kmem, fw->data, fw->size);
1536 modify.host_src_addr = cpu_to_le64(dma_handle);
1537
1538 rc = hwrm_send_message(bp, &modify, sizeof(modify),
1539 FLASH_PACKAGE_TIMEOUT);
1540 dma_free_coherent(&bp->pdev->dev, fw->size, kmem,
1541 dma_handle);
1542 }
1543 }
1544 release_firmware(fw);
1545 if (rc)
1546 return rc;
1547
1548 if ((install_type & 0xffff) == 0)
1549 install_type >>= 16;
1550 bnxt_hwrm_cmd_hdr_init(bp, &install, HWRM_NVM_INSTALL_UPDATE, -1, -1);
1551 install.install_type = cpu_to_le32(install_type);
1552
1553 rc = hwrm_send_message(bp, &install, sizeof(install),
1554 INSTALL_PACKAGE_TIMEOUT);
1555 if (rc)
1556 return -EOPNOTSUPP;
1557
1558 if (resp->result) {
1559 netdev_err(dev, "PKG install error = %d, problem_item = %d\n",
1560 (s8)resp->result, (int)resp->problem_item);
1561 return -ENOPKG;
1562 }
1563 return 0;
c0c050c5
MC		 1564}
1565
1566static int bnxt_flash_device(struct net_device *dev,
1567 struct ethtool_flash *flash)
1568{
1569 if (!BNXT_PF((struct bnxt *)netdev_priv(dev))) {
1570 netdev_err(dev, "flashdev not supported from a virtual function\n");
1571 return -EINVAL;
1572 }
1573
5ac67d8b
RS		 1574 if (flash->region == ETHTOOL_FLASH_ALL_REGIONS ||
1575 flash->region > 0xffff)
1576 return bnxt_flash_package_from_file(dev, flash->data,
1577 flash->region);
c0c050c5
MC		 1578
1579 return bnxt_flash_firmware_from_file(dev, flash->region, flash->data);
1580}
1581
1582static int nvm_get_dir_info(struct net_device *dev, u32 *entries, u32 *length)
1583{
1584 struct bnxt *bp = netdev_priv(dev);
1585 int rc;
1586 struct hwrm_nvm_get_dir_info_input req = {0};
1587 struct hwrm_nvm_get_dir_info_output *output = bp->hwrm_cmd_resp_addr;
1588
1589 bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_NVM_GET_DIR_INFO, -1, -1);
1590
1591 mutex_lock(&bp->hwrm_cmd_lock);
1592 rc = _hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
1593 if (!rc) {
1594 *entries = le32_to_cpu(output->entries);
1595 *length = le32_to_cpu(output->entry_length);
1596 }
1597 mutex_unlock(&bp->hwrm_cmd_lock);
1598 return rc;
1599}
1600
1601static int bnxt_get_eeprom_len(struct net_device *dev)
1602{
1603 /* The -1 return value allows the entire 32-bit range of offsets to be
1604 * passed via the ethtool command-line utility.
1605 */
1606 return -1;
1607}
1608
1609static int bnxt_get_nvram_directory(struct net_device *dev, u32 len, u8 *data)
1610{
1611 struct bnxt *bp = netdev_priv(dev);
1612 int rc;
1613 u32 dir_entries;
1614 u32 entry_length;
1615 u8 *buf;
1616 size_t buflen;
1617 dma_addr_t dma_handle;
1618 struct hwrm_nvm_get_dir_entries_input req = {0};
1619
1620 rc = nvm_get_dir_info(dev, &dir_entries, &entry_length);
1621 if (rc != 0)
1622 return rc;
1623
1624 /* Insert 2 bytes of directory info (count and size of entries) */
1625 if (len < 2)
1626 return -EINVAL;
1627
1628 *data++ = dir_entries;
1629 *data++ = entry_length;
1630 len -= 2;
1631 memset(data, 0xff, len);
1632
1633 buflen = dir_entries * entry_length;
1634 buf = dma_alloc_coherent(&bp->pdev->dev, buflen, &dma_handle,
1635 GFP_KERNEL);
1636 if (!buf) {
1637 netdev_err(dev, "dma_alloc_coherent failure, length = %u\n",
1638 (unsigned)buflen);
1639 return -ENOMEM;
1640 }
1641 bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_NVM_GET_DIR_ENTRIES, -1, -1);
1642 req.host_dest_addr = cpu_to_le64(dma_handle);
1643 rc = hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
1644 if (rc == 0)
1645 memcpy(data, buf, len > buflen ? buflen : len);
1646 dma_free_coherent(&bp->pdev->dev, buflen, buf, dma_handle);
1647 return rc;
1648}
1649
1650static int bnxt_get_nvram_item(struct net_device *dev, u32 index, u32 offset,
1651 u32 length, u8 *data)
1652{
1653 struct bnxt *bp = netdev_priv(dev);
1654 int rc;
1655 u8 *buf;
1656 dma_addr_t dma_handle;
1657 struct hwrm_nvm_read_input req = {0};
1658
1659 buf = dma_alloc_coherent(&bp->pdev->dev, length, &dma_handle,
1660 GFP_KERNEL);
1661 if (!buf) {
1662 netdev_err(dev, "dma_alloc_coherent failure, length = %u\n",
1663 (unsigned)length);
1664 return -ENOMEM;
1665 }
1666 bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_NVM_READ, -1, -1);
1667 req.host_dest_addr = cpu_to_le64(dma_handle);
1668 req.dir_idx = cpu_to_le16(index);
1669 req.offset = cpu_to_le32(offset);
1670 req.len = cpu_to_le32(length);
1671
1672 rc = hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
1673 if (rc == 0)
1674 memcpy(data, buf, length);
1675 dma_free_coherent(&bp->pdev->dev, length, buf, dma_handle);
1676 return rc;
1677}
1678
3ebf6f0a
RS		 1679static int bnxt_find_nvram_item(struct net_device *dev, u16 type, u16 ordinal,
1680 u16 ext, u16 *index, u32 *item_length,
1681 u32 *data_length)
1682{
1683 struct bnxt *bp = netdev_priv(dev);
1684 int rc;
1685 struct hwrm_nvm_find_dir_entry_input req = {0};
1686 struct hwrm_nvm_find_dir_entry_output *output = bp->hwrm_cmd_resp_addr;
1687
1688 bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_NVM_FIND_DIR_ENTRY, -1, -1);
1689 req.enables = 0;
1690 req.dir_idx = 0;
1691 req.dir_type = cpu_to_le16(type);
1692 req.dir_ordinal = cpu_to_le16(ordinal);
1693 req.dir_ext = cpu_to_le16(ext);
1694 req.opt_ordinal = NVM_FIND_DIR_ENTRY_REQ_OPT_ORDINAL_EQ;
90e20921 1695 rc = hwrm_send_message_silent(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
3ebf6f0a
RS		 1696 if (rc == 0) {
1697 if (index)
1698 *index = le16_to_cpu(output->dir_idx);
1699 if (item_length)
1700 *item_length = le32_to_cpu(output->dir_item_length);
1701 if (data_length)
1702 *data_length = le32_to_cpu(output->dir_data_length);
1703 }
1704 return rc;
1705}
1706
1707static char *bnxt_parse_pkglog(int desired_field, u8 *data, size_t datalen)
1708{
1709 char *retval = NULL;
1710 char *p;
1711 char *value;
1712 int field = 0;
1713
1714 if (datalen < 1)
1715 return NULL;
1716 /* null-terminate the log data (removing last '\n'): */
1717 data[datalen - 1] = 0;
1718 for (p = data; *p != 0; p++) {
1719 field = 0;
1720 retval = NULL;
1721 while (*p != 0 && *p != '\n') {
1722 value = p;
1723 while (*p != 0 && *p != '\t' && *p != '\n')
1724 p++;
1725 if (field == desired_field)
1726 retval = value;
1727 if (*p != '\t')
1728 break;
1729 *p = 0;
1730 field++;
1731 p++;
1732 }
1733 if (*p == 0)
1734 break;
1735 *p = 0;
1736 }
1737 return retval;
1738}
1739
1740static char *bnxt_get_pkgver(struct net_device *dev, char *buf, size_t buflen)
1741{
1742 u16 index = 0;
1743 u32 datalen;
1744
1745 if (bnxt_find_nvram_item(dev, BNX_DIR_TYPE_PKG_LOG,
1746 BNX_DIR_ORDINAL_FIRST, BNX_DIR_EXT_NONE,
1747 &index, NULL, &datalen) != 0)
1748 return NULL;
1749
1750 memset(buf, 0, buflen);
1751 if (bnxt_get_nvram_item(dev, index, 0, datalen, buf) != 0)
1752 return NULL;
1753
1754 return bnxt_parse_pkglog(BNX_PKG_LOG_FIELD_IDX_PKG_VERSION, buf,
1755 datalen);
1756}
1757
c0c050c5
MC		 1758static int bnxt_get_eeprom(struct net_device *dev,
1759 struct ethtool_eeprom *eeprom,
1760 u8 *data)
1761{
1762 u32 index;
1763 u32 offset;
1764
1765 if (eeprom->offset == 0) /* special offset value to get directory */
1766 return bnxt_get_nvram_directory(dev, eeprom->len, data);
1767
1768 index = eeprom->offset >> 24;
1769 offset = eeprom->offset & 0xffffff;
1770
1771 if (index == 0) {
1772 netdev_err(dev, "unsupported index value: %d\n", index);
1773 return -EINVAL;
1774 }
1775
1776 return bnxt_get_nvram_item(dev, index - 1, offset, eeprom->len, data);
1777}
1778
1779static int bnxt_erase_nvram_directory(struct net_device *dev, u8 index)
1780{
1781 struct bnxt *bp = netdev_priv(dev);
1782 struct hwrm_nvm_erase_dir_entry_input req = {0};
1783
1784 bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_NVM_ERASE_DIR_ENTRY, -1, -1);
1785 req.dir_idx = cpu_to_le16(index);
1786 return hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
1787}
1788
1789static int bnxt_set_eeprom(struct net_device *dev,
1790 struct ethtool_eeprom *eeprom,
1791 u8 *data)
1792{
1793 struct bnxt *bp = netdev_priv(dev);
1794 u8 index, dir_op;
1795 u16 type, ext, ordinal, attr;
1796
1797 if (!BNXT_PF(bp)) {
1798 netdev_err(dev, "NVM write not supported from a virtual function\n");
1799 return -EINVAL;
1800 }
1801
1802 type = eeprom->magic >> 16;
1803
1804 if (type == 0xffff) { /* special value for directory operations */
1805 index = eeprom->magic & 0xff;
1806 dir_op = eeprom->magic >> 8;
1807 if (index == 0)
1808 return -EINVAL;
1809 switch (dir_op) {
1810 case 0x0e: /* erase */
1811 if (eeprom->offset != ~eeprom->magic)
1812 return -EINVAL;
1813 return bnxt_erase_nvram_directory(dev, index - 1);
1814 default:
1815 return -EINVAL;
1816 }
1817 }
1818
1819 /* Create or re-write an NVM item: */
1820 if (bnxt_dir_type_is_executable(type) == true)
5ac67d8b 1821 return -EOPNOTSUPP;
c0c050c5
MC		 1822 ext = eeprom->magic & 0xffff;
1823 ordinal = eeprom->offset >> 16;
1824 attr = eeprom->offset & 0xffff;
1825
1826 return bnxt_flash_nvram(dev, type, ordinal, ext, attr, data,
1827 eeprom->len);
1828}
1829
72b34f04
MC		 1830static int bnxt_set_eee(struct net_device *dev, struct ethtool_eee *edata)
1831{
1832 struct bnxt *bp = netdev_priv(dev);
1833 struct ethtool_eee *eee = &bp->eee;
1834 struct bnxt_link_info *link_info = &bp->link_info;
1835 u32 advertising =
1836 _bnxt_fw_to_ethtool_adv_spds(link_info->advertising, 0);
1837 int rc = 0;
1838
567b2abe 1839 if (!BNXT_SINGLE_PF(bp))
75362a3f 1840 return -EOPNOTSUPP;
72b34f04
MC		 1841
1842 if (!(bp->flags & BNXT_FLAG_EEE_CAP))
1843 return -EOPNOTSUPP;
1844
1845 if (!edata->eee_enabled)
1846 goto eee_ok;
1847
1848 if (!(link_info->autoneg & BNXT_AUTONEG_SPEED)) {
1849 netdev_warn(dev, "EEE requires autoneg\n");
1850 return -EINVAL;
1851 }
1852 if (edata->tx_lpi_enabled) {
1853 if (bp->lpi_tmr_hi && (edata->tx_lpi_timer > bp->lpi_tmr_hi ||
1854 edata->tx_lpi_timer < bp->lpi_tmr_lo)) {
1855 netdev_warn(dev, "Valid LPI timer range is %d and %d microsecs\n",
1856 bp->lpi_tmr_lo, bp->lpi_tmr_hi);
1857 return -EINVAL;
1858 } else if (!bp->lpi_tmr_hi) {
1859 edata->tx_lpi_timer = eee->tx_lpi_timer;
1860 }
1861 }
1862 if (!edata->advertised) {
1863 edata->advertised = advertising & eee->supported;
1864 } else if (edata->advertised & ~advertising) {
1865 netdev_warn(dev, "EEE advertised %x must be a subset of autoneg advertised speeds %x\n",
1866 edata->advertised, advertising);
1867 return -EINVAL;
1868 }
1869
1870 eee->advertised = edata->advertised;
1871 eee->tx_lpi_enabled = edata->tx_lpi_enabled;
1872 eee->tx_lpi_timer = edata->tx_lpi_timer;
1873eee_ok:
1874 eee->eee_enabled = edata->eee_enabled;
1875
1876 if (netif_running(dev))
1877 rc = bnxt_hwrm_set_link_setting(bp, false, true);
1878
1879 return rc;
1880}
1881
1882static int bnxt_get_eee(struct net_device *dev, struct ethtool_eee *edata)
1883{
1884 struct bnxt *bp = netdev_priv(dev);
1885
1886 if (!(bp->flags & BNXT_FLAG_EEE_CAP))
1887 return -EOPNOTSUPP;
1888
1889 *edata = bp->eee;
1890 if (!bp->eee.eee_enabled) {
1891 /* Preserve tx_lpi_timer so that the last value will be used
1892 * by default when it is re-enabled.
1893 */
1894 edata->advertised = 0;
1895 edata->tx_lpi_enabled = 0;
1896 }
1897
1898 if (!bp->eee.eee_active)
1899 edata->lp_advertised = 0;
1900
1901 return 0;
1902}
1903
42ee18fe
AK		 1904static int bnxt_read_sfp_module_eeprom_info(struct bnxt *bp, u16 i2c_addr,
1905 u16 page_number, u16 start_addr,
1906 u16 data_length, u8 *buf)
1907{
1908 struct hwrm_port_phy_i2c_read_input req = {0};
1909 struct hwrm_port_phy_i2c_read_output *output = bp->hwrm_cmd_resp_addr;
1910 int rc, byte_offset = 0;
1911
1912 bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_PORT_PHY_I2C_READ, -1, -1);
1913 req.i2c_slave_addr = i2c_addr;
1914 req.page_number = cpu_to_le16(page_number);
1915 req.port_id = cpu_to_le16(bp->pf.port_id);
1916 do {
1917 u16 xfer_size;
1918
1919 xfer_size = min_t(u16, data_length, BNXT_MAX_PHY_I2C_RESP_SIZE);
1920 data_length -= xfer_size;
1921 req.page_offset = cpu_to_le16(start_addr + byte_offset);
1922 req.data_length = xfer_size;
1923 req.enables = cpu_to_le32(start_addr + byte_offset ?
1924 PORT_PHY_I2C_READ_REQ_ENABLES_PAGE_OFFSET : 0);
1925 mutex_lock(&bp->hwrm_cmd_lock);
1926 rc = _hwrm_send_message(bp, &req, sizeof(req),
1927 HWRM_CMD_TIMEOUT);
1928 if (!rc)
1929 memcpy(buf + byte_offset, output->data, xfer_size);
1930 mutex_unlock(&bp->hwrm_cmd_lock);
1931 byte_offset += xfer_size;
1932 } while (!rc && data_length > 0);
1933
1934 return rc;
1935}
1936
1937static int bnxt_get_module_info(struct net_device *dev,
1938 struct ethtool_modinfo *modinfo)
1939{
1940 struct bnxt *bp = netdev_priv(dev);
1941 struct hwrm_port_phy_i2c_read_input req = {0};
1942 struct hwrm_port_phy_i2c_read_output *output = bp->hwrm_cmd_resp_addr;
1943 int rc;
1944
1945 /* No point in going further if phy status indicates
1946 * module is not inserted or if it is powered down or
1947 * if it is of type 10GBase-T
1948 */
1949 if (bp->link_info.module_status >
1950 PORT_PHY_QCFG_RESP_MODULE_STATUS_WARNINGMSG)
1951 return -EOPNOTSUPP;
1952
1953 /* This feature is not supported in older firmware versions */
1954 if (bp->hwrm_spec_code < 0x10202)
1955 return -EOPNOTSUPP;
1956
1957 bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_PORT_PHY_I2C_READ, -1, -1);
1958 req.i2c_slave_addr = I2C_DEV_ADDR_A0;
1959 req.page_number = 0;
1960 req.page_offset = cpu_to_le16(SFP_EEPROM_SFF_8472_COMP_ADDR);
1961 req.data_length = SFP_EEPROM_SFF_8472_COMP_SIZE;
1962 req.port_id = cpu_to_le16(bp->pf.port_id);
1963 mutex_lock(&bp->hwrm_cmd_lock);
1964 rc = _hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
1965 if (!rc) {
1966 u32 module_id = le32_to_cpu(output->data[0]);
1967
1968 switch (module_id) {
1969 case SFF_MODULE_ID_SFP:
1970 modinfo->type = ETH_MODULE_SFF_8472;
1971 modinfo->eeprom_len = ETH_MODULE_SFF_8472_LEN;
1972 break;
1973 case SFF_MODULE_ID_QSFP:
1974 case SFF_MODULE_ID_QSFP_PLUS:
1975 modinfo->type = ETH_MODULE_SFF_8436;
1976 modinfo->eeprom_len = ETH_MODULE_SFF_8436_LEN;
1977 break;
1978 case SFF_MODULE_ID_QSFP28:
1979 modinfo->type = ETH_MODULE_SFF_8636;
1980 modinfo->eeprom_len = ETH_MODULE_SFF_8636_LEN;
1981 break;
1982 default:
1983 rc = -EOPNOTSUPP;
1984 break;
1985 }
1986 }
1987 mutex_unlock(&bp->hwrm_cmd_lock);
1988 return rc;
1989}
1990
1991static int bnxt_get_module_eeprom(struct net_device *dev,
1992 struct ethtool_eeprom *eeprom,
1993 u8 *data)
1994{
1995 struct bnxt *bp = netdev_priv(dev);
1996 u16 start = eeprom->offset, length = eeprom->len;
f3ea3119 1997 int rc = 0;
42ee18fe
AK		 1998
1999 memset(data, 0, eeprom->len);
2000
2001 /* Read A0 portion of the EEPROM */
2002 if (start < ETH_MODULE_SFF_8436_LEN) {
2003 if (start + eeprom->len > ETH_MODULE_SFF_8436_LEN)
2004 length = ETH_MODULE_SFF_8436_LEN - start;
2005 rc = bnxt_read_sfp_module_eeprom_info(bp, I2C_DEV_ADDR_A0, 0,
2006 start, length, data);
2007 if (rc)
2008 return rc;
2009 start += length;
2010 data += length;
2011 length = eeprom->len - length;
2012 }
2013
2014 /* Read A2 portion of the EEPROM */
2015 if (length) {
2016 start -= ETH_MODULE_SFF_8436_LEN;
2017 bnxt_read_sfp_module_eeprom_info(bp, I2C_DEV_ADDR_A2, 1, start,
2018 length, data);
2019 }
2020 return rc;
2021}
2022
ae8e98a6
DK		 2023static int bnxt_nway_reset(struct net_device *dev)
2024{
2025 int rc = 0;
2026
2027 struct bnxt *bp = netdev_priv(dev);
2028 struct bnxt_link_info *link_info = &bp->link_info;
2029
2030 if (!BNXT_SINGLE_PF(bp))
2031 return -EOPNOTSUPP;
2032
2033 if (!(link_info->autoneg & BNXT_AUTONEG_SPEED))
2034 return -EINVAL;
2035
2036 if (netif_running(dev))
2037 rc = bnxt_hwrm_set_link_setting(bp, true, false);
2038
2039 return rc;
2040}
2041
c0c050c5 2042const struct ethtool_ops bnxt_ethtool_ops = {
00c04a92
MC		 2043 .get_link_ksettings = bnxt_get_link_ksettings,
2044 .set_link_ksettings = bnxt_set_link_ksettings,
c0c050c5
MC		 2045 .get_pauseparam = bnxt_get_pauseparam,
2046 .set_pauseparam = bnxt_set_pauseparam,
2047 .get_drvinfo = bnxt_get_drvinfo,
2048 .get_coalesce = bnxt_get_coalesce,
2049 .set_coalesce = bnxt_set_coalesce,
2050 .get_msglevel = bnxt_get_msglevel,
2051 .set_msglevel = bnxt_set_msglevel,
2052 .get_sset_count = bnxt_get_sset_count,
2053 .get_strings = bnxt_get_strings,
2054 .get_ethtool_stats = bnxt_get_ethtool_stats,
2055 .set_ringparam = bnxt_set_ringparam,
2056 .get_ringparam = bnxt_get_ringparam,
2057 .get_channels = bnxt_get_channels,
2058 .set_channels = bnxt_set_channels,
c0c050c5 2059 .get_rxnfc = bnxt_get_rxnfc,
a011952a 2060 .set_rxnfc = bnxt_set_rxnfc,
c0c050c5
MC		 2061 .get_rxfh_indir_size = bnxt_get_rxfh_indir_size,
2062 .get_rxfh_key_size = bnxt_get_rxfh_key_size,
2063 .get_rxfh = bnxt_get_rxfh,
2064 .flash_device = bnxt_flash_device,
2065 .get_eeprom_len = bnxt_get_eeprom_len,
2066 .get_eeprom = bnxt_get_eeprom,
2067 .set_eeprom = bnxt_set_eeprom,
2068 .get_link = bnxt_get_link,
72b34f04
MC		 2069 .get_eee = bnxt_get_eee,
2070 .set_eee = bnxt_set_eee,
42ee18fe
AK		 2071 .get_module_info = bnxt_get_module_info,
2072 .get_module_eeprom = bnxt_get_module_eeprom,
ae8e98a6 2073 .nway_reset = bnxt_nway_reset
c0c050c5 2074};
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