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41c445ff JB |
1 | /******************************************************************************* |
2 | * | |
3 | * Intel Ethernet Controller XL710 Family Linux Driver | |
2818ccd9 | 4 | * Copyright(c) 2013 - 2016 Intel Corporation. |
41c445ff JB |
5 | * |
6 | * This program is free software; you can redistribute it and/or modify it | |
7 | * under the terms and conditions of the GNU General Public License, | |
8 | * version 2, as published by the Free Software Foundation. | |
9 | * | |
10 | * This program is distributed in the hope it will be useful, but WITHOUT | |
11 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
12 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | |
13 | * more details. | |
14 | * | |
dc641b73 GR |
15 | * You should have received a copy of the GNU General Public License along |
16 | * with this program. If not, see <http://www.gnu.org/licenses/>. | |
41c445ff JB |
17 | * |
18 | * The full GNU General Public License is included in this distribution in | |
19 | * the file called "COPYING". | |
20 | * | |
21 | * Contact Information: | |
22 | * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net> | |
23 | * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 | |
24 | * | |
25 | ******************************************************************************/ | |
26 | ||
b499ffb0 SV |
27 | #include <linux/etherdevice.h> |
28 | #include <linux/of_net.h> | |
29 | #include <linux/pci.h> | |
30 | ||
41c445ff JB |
31 | /* Local includes */ |
32 | #include "i40e.h" | |
4eb3f768 | 33 | #include "i40e_diag.h" |
06a5f7f1 | 34 | #include <net/udp_tunnel.h> |
ed0980c4 SP |
35 | /* All i40e tracepoints are defined by the include below, which |
36 | * must be included exactly once across the whole kernel with | |
37 | * CREATE_TRACE_POINTS defined | |
38 | */ | |
39 | #define CREATE_TRACE_POINTS | |
40 | #include "i40e_trace.h" | |
41c445ff JB |
41 | |
42 | const char i40e_driver_name[] = "i40e"; | |
43 | static const char i40e_driver_string[] = | |
44 | "Intel(R) Ethernet Connection XL710 Network Driver"; | |
45 | ||
46 | #define DRV_KERN "-k" | |
47 | ||
15990832 BP |
48 | #define DRV_VERSION_MAJOR 2 |
49 | #define DRV_VERSION_MINOR 1 | |
2318b401 | 50 | #define DRV_VERSION_BUILD 14 |
41c445ff JB |
51 | #define DRV_VERSION __stringify(DRV_VERSION_MAJOR) "." \ |
52 | __stringify(DRV_VERSION_MINOR) "." \ | |
53 | __stringify(DRV_VERSION_BUILD) DRV_KERN | |
54 | const char i40e_driver_version_str[] = DRV_VERSION; | |
8fb905b3 | 55 | static const char i40e_copyright[] = "Copyright (c) 2013 - 2014 Intel Corporation."; |
41c445ff JB |
56 | |
57 | /* a bit of forward declarations */ | |
58 | static void i40e_vsi_reinit_locked(struct i40e_vsi *vsi); | |
373149fc | 59 | static void i40e_handle_reset_warning(struct i40e_pf *pf, bool lock_acquired); |
41c445ff JB |
60 | static int i40e_add_vsi(struct i40e_vsi *vsi); |
61 | static int i40e_add_veb(struct i40e_veb *veb, struct i40e_vsi *vsi); | |
bc7d338f | 62 | static int i40e_setup_pf_switch(struct i40e_pf *pf, bool reinit); |
41c445ff JB |
63 | static int i40e_setup_misc_vector(struct i40e_pf *pf); |
64 | static void i40e_determine_queue_usage(struct i40e_pf *pf); | |
65 | static int i40e_setup_pf_filter_control(struct i40e_pf *pf); | |
373149fc MS |
66 | static void i40e_prep_for_reset(struct i40e_pf *pf, bool lock_acquired); |
67 | static int i40e_reset(struct i40e_pf *pf); | |
68 | static void i40e_rebuild(struct i40e_pf *pf, bool reinit, bool lock_acquired); | |
cbf61325 | 69 | static void i40e_fdir_sb_setup(struct i40e_pf *pf); |
4e3b35b0 | 70 | static int i40e_veb_get_bw_info(struct i40e_veb *veb); |
41c445ff JB |
71 | |
72 | /* i40e_pci_tbl - PCI Device ID Table | |
73 | * | |
74 | * Last entry must be all 0s | |
75 | * | |
76 | * { Vendor ID, Device ID, SubVendor ID, SubDevice ID, | |
77 | * Class, Class Mask, private data (not used) } | |
78 | */ | |
9baa3c34 | 79 | static const struct pci_device_id i40e_pci_tbl[] = { |
ab60085e | 80 | {PCI_VDEVICE(INTEL, I40E_DEV_ID_SFP_XL710), 0}, |
ab60085e | 81 | {PCI_VDEVICE(INTEL, I40E_DEV_ID_QEMU), 0}, |
ab60085e SN |
82 | {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_B), 0}, |
83 | {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_C), 0}, | |
ab60085e SN |
84 | {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_A), 0}, |
85 | {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_B), 0}, | |
86 | {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_C), 0}, | |
5960d33f | 87 | {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_BASE_T), 0}, |
bc5166b9 | 88 | {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_BASE_T4), 0}, |
35dae51d ASJ |
89 | {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_X722), 0}, |
90 | {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_X722), 0}, | |
87e6c1d7 ASJ |
91 | {PCI_VDEVICE(INTEL, I40E_DEV_ID_SFP_X722), 0}, |
92 | {PCI_VDEVICE(INTEL, I40E_DEV_ID_1G_BASE_T_X722), 0}, | |
93 | {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_BASE_T_X722), 0}, | |
d6bf58c2 | 94 | {PCI_VDEVICE(INTEL, I40E_DEV_ID_SFP_I_X722), 0}, |
48a3b512 SN |
95 | {PCI_VDEVICE(INTEL, I40E_DEV_ID_20G_KR2), 0}, |
96 | {PCI_VDEVICE(INTEL, I40E_DEV_ID_20G_KR2_A), 0}, | |
3123237a CW |
97 | {PCI_VDEVICE(INTEL, I40E_DEV_ID_25G_B), 0}, |
98 | {PCI_VDEVICE(INTEL, I40E_DEV_ID_25G_SFP28), 0}, | |
41c445ff JB |
99 | /* required last entry */ |
100 | {0, } | |
101 | }; | |
102 | MODULE_DEVICE_TABLE(pci, i40e_pci_tbl); | |
103 | ||
104 | #define I40E_MAX_VF_COUNT 128 | |
105 | static int debug = -1; | |
5d4ca23e AD |
106 | module_param(debug, uint, 0); |
107 | MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all), Debug mask (0x8XXXXXXX)"); | |
41c445ff JB |
108 | |
109 | MODULE_AUTHOR("Intel Corporation, <e1000-devel@lists.sourceforge.net>"); | |
110 | MODULE_DESCRIPTION("Intel(R) Ethernet Connection XL710 Network Driver"); | |
111 | MODULE_LICENSE("GPL"); | |
112 | MODULE_VERSION(DRV_VERSION); | |
113 | ||
2803b16c JB |
114 | static struct workqueue_struct *i40e_wq; |
115 | ||
41c445ff JB |
116 | /** |
117 | * i40e_allocate_dma_mem_d - OS specific memory alloc for shared code | |
118 | * @hw: pointer to the HW structure | |
119 | * @mem: ptr to mem struct to fill out | |
120 | * @size: size of memory requested | |
121 | * @alignment: what to align the allocation to | |
122 | **/ | |
123 | int i40e_allocate_dma_mem_d(struct i40e_hw *hw, struct i40e_dma_mem *mem, | |
124 | u64 size, u32 alignment) | |
125 | { | |
126 | struct i40e_pf *pf = (struct i40e_pf *)hw->back; | |
127 | ||
128 | mem->size = ALIGN(size, alignment); | |
129 | mem->va = dma_zalloc_coherent(&pf->pdev->dev, mem->size, | |
130 | &mem->pa, GFP_KERNEL); | |
93bc73b8 JB |
131 | if (!mem->va) |
132 | return -ENOMEM; | |
41c445ff | 133 | |
93bc73b8 | 134 | return 0; |
41c445ff JB |
135 | } |
136 | ||
137 | /** | |
138 | * i40e_free_dma_mem_d - OS specific memory free for shared code | |
139 | * @hw: pointer to the HW structure | |
140 | * @mem: ptr to mem struct to free | |
141 | **/ | |
142 | int i40e_free_dma_mem_d(struct i40e_hw *hw, struct i40e_dma_mem *mem) | |
143 | { | |
144 | struct i40e_pf *pf = (struct i40e_pf *)hw->back; | |
145 | ||
146 | dma_free_coherent(&pf->pdev->dev, mem->size, mem->va, mem->pa); | |
147 | mem->va = NULL; | |
148 | mem->pa = 0; | |
149 | mem->size = 0; | |
150 | ||
151 | return 0; | |
152 | } | |
153 | ||
154 | /** | |
155 | * i40e_allocate_virt_mem_d - OS specific memory alloc for shared code | |
156 | * @hw: pointer to the HW structure | |
157 | * @mem: ptr to mem struct to fill out | |
158 | * @size: size of memory requested | |
159 | **/ | |
160 | int i40e_allocate_virt_mem_d(struct i40e_hw *hw, struct i40e_virt_mem *mem, | |
161 | u32 size) | |
162 | { | |
163 | mem->size = size; | |
164 | mem->va = kzalloc(size, GFP_KERNEL); | |
165 | ||
93bc73b8 JB |
166 | if (!mem->va) |
167 | return -ENOMEM; | |
41c445ff | 168 | |
93bc73b8 | 169 | return 0; |
41c445ff JB |
170 | } |
171 | ||
172 | /** | |
173 | * i40e_free_virt_mem_d - OS specific memory free for shared code | |
174 | * @hw: pointer to the HW structure | |
175 | * @mem: ptr to mem struct to free | |
176 | **/ | |
177 | int i40e_free_virt_mem_d(struct i40e_hw *hw, struct i40e_virt_mem *mem) | |
178 | { | |
179 | /* it's ok to kfree a NULL pointer */ | |
180 | kfree(mem->va); | |
181 | mem->va = NULL; | |
182 | mem->size = 0; | |
183 | ||
184 | return 0; | |
185 | } | |
186 | ||
187 | /** | |
188 | * i40e_get_lump - find a lump of free generic resource | |
189 | * @pf: board private structure | |
190 | * @pile: the pile of resource to search | |
191 | * @needed: the number of items needed | |
192 | * @id: an owner id to stick on the items assigned | |
193 | * | |
194 | * Returns the base item index of the lump, or negative for error | |
195 | * | |
196 | * The search_hint trick and lack of advanced fit-finding only work | |
197 | * because we're highly likely to have all the same size lump requests. | |
198 | * Linear search time and any fragmentation should be minimal. | |
199 | **/ | |
200 | static int i40e_get_lump(struct i40e_pf *pf, struct i40e_lump_tracking *pile, | |
201 | u16 needed, u16 id) | |
202 | { | |
203 | int ret = -ENOMEM; | |
ddf434ac | 204 | int i, j; |
41c445ff JB |
205 | |
206 | if (!pile || needed == 0 || id >= I40E_PILE_VALID_BIT) { | |
207 | dev_info(&pf->pdev->dev, | |
208 | "param err: pile=%p needed=%d id=0x%04x\n", | |
209 | pile, needed, id); | |
210 | return -EINVAL; | |
211 | } | |
212 | ||
213 | /* start the linear search with an imperfect hint */ | |
214 | i = pile->search_hint; | |
ddf434ac | 215 | while (i < pile->num_entries) { |
41c445ff JB |
216 | /* skip already allocated entries */ |
217 | if (pile->list[i] & I40E_PILE_VALID_BIT) { | |
218 | i++; | |
219 | continue; | |
220 | } | |
221 | ||
222 | /* do we have enough in this lump? */ | |
223 | for (j = 0; (j < needed) && ((i+j) < pile->num_entries); j++) { | |
224 | if (pile->list[i+j] & I40E_PILE_VALID_BIT) | |
225 | break; | |
226 | } | |
227 | ||
228 | if (j == needed) { | |
229 | /* there was enough, so assign it to the requestor */ | |
230 | for (j = 0; j < needed; j++) | |
231 | pile->list[i+j] = id | I40E_PILE_VALID_BIT; | |
232 | ret = i; | |
233 | pile->search_hint = i + j; | |
ddf434ac | 234 | break; |
41c445ff | 235 | } |
6995b36c JB |
236 | |
237 | /* not enough, so skip over it and continue looking */ | |
238 | i += j; | |
41c445ff JB |
239 | } |
240 | ||
241 | return ret; | |
242 | } | |
243 | ||
244 | /** | |
245 | * i40e_put_lump - return a lump of generic resource | |
246 | * @pile: the pile of resource to search | |
247 | * @index: the base item index | |
248 | * @id: the owner id of the items assigned | |
249 | * | |
250 | * Returns the count of items in the lump | |
251 | **/ | |
252 | static int i40e_put_lump(struct i40e_lump_tracking *pile, u16 index, u16 id) | |
253 | { | |
254 | int valid_id = (id | I40E_PILE_VALID_BIT); | |
255 | int count = 0; | |
256 | int i; | |
257 | ||
258 | if (!pile || index >= pile->num_entries) | |
259 | return -EINVAL; | |
260 | ||
261 | for (i = index; | |
262 | i < pile->num_entries && pile->list[i] == valid_id; | |
263 | i++) { | |
264 | pile->list[i] = 0; | |
265 | count++; | |
266 | } | |
267 | ||
268 | if (count && index < pile->search_hint) | |
269 | pile->search_hint = index; | |
270 | ||
271 | return count; | |
272 | } | |
273 | ||
fdf0e0bf ASJ |
274 | /** |
275 | * i40e_find_vsi_from_id - searches for the vsi with the given id | |
276 | * @pf - the pf structure to search for the vsi | |
277 | * @id - id of the vsi it is searching for | |
278 | **/ | |
279 | struct i40e_vsi *i40e_find_vsi_from_id(struct i40e_pf *pf, u16 id) | |
280 | { | |
281 | int i; | |
282 | ||
283 | for (i = 0; i < pf->num_alloc_vsi; i++) | |
284 | if (pf->vsi[i] && (pf->vsi[i]->id == id)) | |
285 | return pf->vsi[i]; | |
286 | ||
287 | return NULL; | |
288 | } | |
289 | ||
41c445ff JB |
290 | /** |
291 | * i40e_service_event_schedule - Schedule the service task to wake up | |
292 | * @pf: board private structure | |
293 | * | |
294 | * If not already scheduled, this puts the task into the work queue | |
295 | **/ | |
e3219ce6 | 296 | void i40e_service_event_schedule(struct i40e_pf *pf) |
41c445ff JB |
297 | { |
298 | if (!test_bit(__I40E_DOWN, &pf->state) && | |
91089033 | 299 | !test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state)) |
2803b16c | 300 | queue_work(i40e_wq, &pf->service_task); |
41c445ff JB |
301 | } |
302 | ||
303 | /** | |
304 | * i40e_tx_timeout - Respond to a Tx Hang | |
305 | * @netdev: network interface device structure | |
306 | * | |
307 | * If any port has noticed a Tx timeout, it is likely that the whole | |
308 | * device is munged, not just the one netdev port, so go for the full | |
309 | * reset. | |
310 | **/ | |
311 | static void i40e_tx_timeout(struct net_device *netdev) | |
312 | { | |
313 | struct i40e_netdev_priv *np = netdev_priv(netdev); | |
314 | struct i40e_vsi *vsi = np->vsi; | |
315 | struct i40e_pf *pf = vsi->back; | |
b03a8c1f KP |
316 | struct i40e_ring *tx_ring = NULL; |
317 | unsigned int i, hung_queue = 0; | |
318 | u32 head, val; | |
41c445ff JB |
319 | |
320 | pf->tx_timeout_count++; | |
321 | ||
b03a8c1f KP |
322 | /* find the stopped queue the same way the stack does */ |
323 | for (i = 0; i < netdev->num_tx_queues; i++) { | |
324 | struct netdev_queue *q; | |
325 | unsigned long trans_start; | |
326 | ||
327 | q = netdev_get_tx_queue(netdev, i); | |
9b36627a | 328 | trans_start = q->trans_start; |
b03a8c1f KP |
329 | if (netif_xmit_stopped(q) && |
330 | time_after(jiffies, | |
331 | (trans_start + netdev->watchdog_timeo))) { | |
332 | hung_queue = i; | |
333 | break; | |
334 | } | |
335 | } | |
336 | ||
337 | if (i == netdev->num_tx_queues) { | |
338 | netdev_info(netdev, "tx_timeout: no netdev hung queue found\n"); | |
339 | } else { | |
340 | /* now that we have an index, find the tx_ring struct */ | |
341 | for (i = 0; i < vsi->num_queue_pairs; i++) { | |
342 | if (vsi->tx_rings[i] && vsi->tx_rings[i]->desc) { | |
343 | if (hung_queue == | |
344 | vsi->tx_rings[i]->queue_index) { | |
345 | tx_ring = vsi->tx_rings[i]; | |
346 | break; | |
347 | } | |
348 | } | |
349 | } | |
350 | } | |
351 | ||
41c445ff | 352 | if (time_after(jiffies, (pf->tx_timeout_last_recovery + HZ*20))) |
b03a8c1f KP |
353 | pf->tx_timeout_recovery_level = 1; /* reset after some time */ |
354 | else if (time_before(jiffies, | |
355 | (pf->tx_timeout_last_recovery + netdev->watchdog_timeo))) | |
356 | return; /* don't do any new action before the next timeout */ | |
357 | ||
358 | if (tx_ring) { | |
359 | head = i40e_get_head(tx_ring); | |
360 | /* Read interrupt register */ | |
361 | if (pf->flags & I40E_FLAG_MSIX_ENABLED) | |
362 | val = rd32(&pf->hw, | |
363 | I40E_PFINT_DYN_CTLN(tx_ring->q_vector->v_idx + | |
364 | tx_ring->vsi->base_vector - 1)); | |
365 | else | |
366 | val = rd32(&pf->hw, I40E_PFINT_DYN_CTL0); | |
367 | ||
368 | netdev_info(netdev, "tx_timeout: VSI_seid: %d, Q %d, NTC: 0x%x, HWB: 0x%x, NTU: 0x%x, TAIL: 0x%x, INT: 0x%x\n", | |
369 | vsi->seid, hung_queue, tx_ring->next_to_clean, | |
370 | head, tx_ring->next_to_use, | |
371 | readl(tx_ring->tail), val); | |
372 | } | |
373 | ||
41c445ff | 374 | pf->tx_timeout_last_recovery = jiffies; |
b03a8c1f KP |
375 | netdev_info(netdev, "tx_timeout recovery level %d, hung_queue %d\n", |
376 | pf->tx_timeout_recovery_level, hung_queue); | |
41c445ff JB |
377 | |
378 | switch (pf->tx_timeout_recovery_level) { | |
41c445ff JB |
379 | case 1: |
380 | set_bit(__I40E_PF_RESET_REQUESTED, &pf->state); | |
381 | break; | |
382 | case 2: | |
383 | set_bit(__I40E_CORE_RESET_REQUESTED, &pf->state); | |
384 | break; | |
385 | case 3: | |
386 | set_bit(__I40E_GLOBAL_RESET_REQUESTED, &pf->state); | |
387 | break; | |
388 | default: | |
389 | netdev_err(netdev, "tx_timeout recovery unsuccessful\n"); | |
41c445ff JB |
390 | break; |
391 | } | |
b03a8c1f | 392 | |
41c445ff JB |
393 | i40e_service_event_schedule(pf); |
394 | pf->tx_timeout_recovery_level++; | |
395 | } | |
396 | ||
41c445ff JB |
397 | /** |
398 | * i40e_get_vsi_stats_struct - Get System Network Statistics | |
399 | * @vsi: the VSI we care about | |
400 | * | |
401 | * Returns the address of the device statistics structure. | |
402 | * The statistics are actually updated from the service task. | |
403 | **/ | |
404 | struct rtnl_link_stats64 *i40e_get_vsi_stats_struct(struct i40e_vsi *vsi) | |
405 | { | |
406 | return &vsi->net_stats; | |
407 | } | |
408 | ||
409 | /** | |
410 | * i40e_get_netdev_stats_struct - Get statistics for netdev interface | |
411 | * @netdev: network interface device structure | |
412 | * | |
413 | * Returns the address of the device statistics structure. | |
414 | * The statistics are actually updated from the service task. | |
415 | **/ | |
9eed69a9 | 416 | static void i40e_get_netdev_stats_struct(struct net_device *netdev, |
bc1f4470 | 417 | struct rtnl_link_stats64 *stats) |
41c445ff JB |
418 | { |
419 | struct i40e_netdev_priv *np = netdev_priv(netdev); | |
e7046ee1 | 420 | struct i40e_ring *tx_ring, *rx_ring; |
41c445ff | 421 | struct i40e_vsi *vsi = np->vsi; |
980e9b11 AD |
422 | struct rtnl_link_stats64 *vsi_stats = i40e_get_vsi_stats_struct(vsi); |
423 | int i; | |
424 | ||
d19cb64b | 425 | if (test_bit(__I40E_VSI_DOWN, &vsi->state)) |
bc1f4470 | 426 | return; |
bc7d338f | 427 | |
3c325ced | 428 | if (!vsi->tx_rings) |
bc1f4470 | 429 | return; |
3c325ced | 430 | |
980e9b11 AD |
431 | rcu_read_lock(); |
432 | for (i = 0; i < vsi->num_queue_pairs; i++) { | |
980e9b11 AD |
433 | u64 bytes, packets; |
434 | unsigned int start; | |
435 | ||
436 | tx_ring = ACCESS_ONCE(vsi->tx_rings[i]); | |
437 | if (!tx_ring) | |
438 | continue; | |
439 | ||
440 | do { | |
57a7744e | 441 | start = u64_stats_fetch_begin_irq(&tx_ring->syncp); |
980e9b11 AD |
442 | packets = tx_ring->stats.packets; |
443 | bytes = tx_ring->stats.bytes; | |
57a7744e | 444 | } while (u64_stats_fetch_retry_irq(&tx_ring->syncp, start)); |
980e9b11 AD |
445 | |
446 | stats->tx_packets += packets; | |
447 | stats->tx_bytes += bytes; | |
448 | rx_ring = &tx_ring[1]; | |
449 | ||
450 | do { | |
57a7744e | 451 | start = u64_stats_fetch_begin_irq(&rx_ring->syncp); |
980e9b11 AD |
452 | packets = rx_ring->stats.packets; |
453 | bytes = rx_ring->stats.bytes; | |
57a7744e | 454 | } while (u64_stats_fetch_retry_irq(&rx_ring->syncp, start)); |
41c445ff | 455 | |
980e9b11 AD |
456 | stats->rx_packets += packets; |
457 | stats->rx_bytes += bytes; | |
458 | } | |
459 | rcu_read_unlock(); | |
460 | ||
a5282f44 | 461 | /* following stats updated by i40e_watchdog_subtask() */ |
980e9b11 AD |
462 | stats->multicast = vsi_stats->multicast; |
463 | stats->tx_errors = vsi_stats->tx_errors; | |
464 | stats->tx_dropped = vsi_stats->tx_dropped; | |
465 | stats->rx_errors = vsi_stats->rx_errors; | |
d8201e20 | 466 | stats->rx_dropped = vsi_stats->rx_dropped; |
980e9b11 AD |
467 | stats->rx_crc_errors = vsi_stats->rx_crc_errors; |
468 | stats->rx_length_errors = vsi_stats->rx_length_errors; | |
41c445ff JB |
469 | } |
470 | ||
471 | /** | |
472 | * i40e_vsi_reset_stats - Resets all stats of the given vsi | |
473 | * @vsi: the VSI to have its stats reset | |
474 | **/ | |
475 | void i40e_vsi_reset_stats(struct i40e_vsi *vsi) | |
476 | { | |
477 | struct rtnl_link_stats64 *ns; | |
478 | int i; | |
479 | ||
480 | if (!vsi) | |
481 | return; | |
482 | ||
483 | ns = i40e_get_vsi_stats_struct(vsi); | |
484 | memset(ns, 0, sizeof(*ns)); | |
485 | memset(&vsi->net_stats_offsets, 0, sizeof(vsi->net_stats_offsets)); | |
486 | memset(&vsi->eth_stats, 0, sizeof(vsi->eth_stats)); | |
487 | memset(&vsi->eth_stats_offsets, 0, sizeof(vsi->eth_stats_offsets)); | |
8e9dca53 | 488 | if (vsi->rx_rings && vsi->rx_rings[0]) { |
41c445ff | 489 | for (i = 0; i < vsi->num_queue_pairs; i++) { |
6995b36c | 490 | memset(&vsi->rx_rings[i]->stats, 0, |
9f65e15b | 491 | sizeof(vsi->rx_rings[i]->stats)); |
6995b36c | 492 | memset(&vsi->rx_rings[i]->rx_stats, 0, |
9f65e15b | 493 | sizeof(vsi->rx_rings[i]->rx_stats)); |
6995b36c | 494 | memset(&vsi->tx_rings[i]->stats, 0, |
9f65e15b AD |
495 | sizeof(vsi->tx_rings[i]->stats)); |
496 | memset(&vsi->tx_rings[i]->tx_stats, 0, | |
497 | sizeof(vsi->tx_rings[i]->tx_stats)); | |
41c445ff | 498 | } |
8e9dca53 | 499 | } |
41c445ff JB |
500 | vsi->stat_offsets_loaded = false; |
501 | } | |
502 | ||
503 | /** | |
b40c82e6 | 504 | * i40e_pf_reset_stats - Reset all of the stats for the given PF |
41c445ff JB |
505 | * @pf: the PF to be reset |
506 | **/ | |
507 | void i40e_pf_reset_stats(struct i40e_pf *pf) | |
508 | { | |
e91fdf76 SN |
509 | int i; |
510 | ||
41c445ff JB |
511 | memset(&pf->stats, 0, sizeof(pf->stats)); |
512 | memset(&pf->stats_offsets, 0, sizeof(pf->stats_offsets)); | |
513 | pf->stat_offsets_loaded = false; | |
e91fdf76 SN |
514 | |
515 | for (i = 0; i < I40E_MAX_VEB; i++) { | |
516 | if (pf->veb[i]) { | |
517 | memset(&pf->veb[i]->stats, 0, | |
518 | sizeof(pf->veb[i]->stats)); | |
519 | memset(&pf->veb[i]->stats_offsets, 0, | |
520 | sizeof(pf->veb[i]->stats_offsets)); | |
521 | pf->veb[i]->stat_offsets_loaded = false; | |
522 | } | |
523 | } | |
42bce04e | 524 | pf->hw_csum_rx_error = 0; |
41c445ff JB |
525 | } |
526 | ||
527 | /** | |
528 | * i40e_stat_update48 - read and update a 48 bit stat from the chip | |
529 | * @hw: ptr to the hardware info | |
530 | * @hireg: the high 32 bit reg to read | |
531 | * @loreg: the low 32 bit reg to read | |
532 | * @offset_loaded: has the initial offset been loaded yet | |
533 | * @offset: ptr to current offset value | |
534 | * @stat: ptr to the stat | |
535 | * | |
536 | * Since the device stats are not reset at PFReset, they likely will not | |
537 | * be zeroed when the driver starts. We'll save the first values read | |
538 | * and use them as offsets to be subtracted from the raw values in order | |
539 | * to report stats that count from zero. In the process, we also manage | |
540 | * the potential roll-over. | |
541 | **/ | |
542 | static void i40e_stat_update48(struct i40e_hw *hw, u32 hireg, u32 loreg, | |
543 | bool offset_loaded, u64 *offset, u64 *stat) | |
544 | { | |
545 | u64 new_data; | |
546 | ||
ab60085e | 547 | if (hw->device_id == I40E_DEV_ID_QEMU) { |
41c445ff JB |
548 | new_data = rd32(hw, loreg); |
549 | new_data |= ((u64)(rd32(hw, hireg) & 0xFFFF)) << 32; | |
550 | } else { | |
551 | new_data = rd64(hw, loreg); | |
552 | } | |
553 | if (!offset_loaded) | |
554 | *offset = new_data; | |
555 | if (likely(new_data >= *offset)) | |
556 | *stat = new_data - *offset; | |
557 | else | |
41a1d04b | 558 | *stat = (new_data + BIT_ULL(48)) - *offset; |
41c445ff JB |
559 | *stat &= 0xFFFFFFFFFFFFULL; |
560 | } | |
561 | ||
562 | /** | |
563 | * i40e_stat_update32 - read and update a 32 bit stat from the chip | |
564 | * @hw: ptr to the hardware info | |
565 | * @reg: the hw reg to read | |
566 | * @offset_loaded: has the initial offset been loaded yet | |
567 | * @offset: ptr to current offset value | |
568 | * @stat: ptr to the stat | |
569 | **/ | |
570 | static void i40e_stat_update32(struct i40e_hw *hw, u32 reg, | |
571 | bool offset_loaded, u64 *offset, u64 *stat) | |
572 | { | |
573 | u32 new_data; | |
574 | ||
575 | new_data = rd32(hw, reg); | |
576 | if (!offset_loaded) | |
577 | *offset = new_data; | |
578 | if (likely(new_data >= *offset)) | |
579 | *stat = (u32)(new_data - *offset); | |
580 | else | |
41a1d04b | 581 | *stat = (u32)((new_data + BIT_ULL(32)) - *offset); |
41c445ff JB |
582 | } |
583 | ||
584 | /** | |
585 | * i40e_update_eth_stats - Update VSI-specific ethernet statistics counters. | |
586 | * @vsi: the VSI to be updated | |
587 | **/ | |
588 | void i40e_update_eth_stats(struct i40e_vsi *vsi) | |
589 | { | |
590 | int stat_idx = le16_to_cpu(vsi->info.stat_counter_idx); | |
591 | struct i40e_pf *pf = vsi->back; | |
592 | struct i40e_hw *hw = &pf->hw; | |
593 | struct i40e_eth_stats *oes; | |
594 | struct i40e_eth_stats *es; /* device's eth stats */ | |
595 | ||
596 | es = &vsi->eth_stats; | |
597 | oes = &vsi->eth_stats_offsets; | |
598 | ||
599 | /* Gather up the stats that the hw collects */ | |
600 | i40e_stat_update32(hw, I40E_GLV_TEPC(stat_idx), | |
601 | vsi->stat_offsets_loaded, | |
602 | &oes->tx_errors, &es->tx_errors); | |
603 | i40e_stat_update32(hw, I40E_GLV_RDPC(stat_idx), | |
604 | vsi->stat_offsets_loaded, | |
605 | &oes->rx_discards, &es->rx_discards); | |
41a9e55c SN |
606 | i40e_stat_update32(hw, I40E_GLV_RUPP(stat_idx), |
607 | vsi->stat_offsets_loaded, | |
608 | &oes->rx_unknown_protocol, &es->rx_unknown_protocol); | |
609 | i40e_stat_update32(hw, I40E_GLV_TEPC(stat_idx), | |
610 | vsi->stat_offsets_loaded, | |
611 | &oes->tx_errors, &es->tx_errors); | |
41c445ff JB |
612 | |
613 | i40e_stat_update48(hw, I40E_GLV_GORCH(stat_idx), | |
614 | I40E_GLV_GORCL(stat_idx), | |
615 | vsi->stat_offsets_loaded, | |
616 | &oes->rx_bytes, &es->rx_bytes); | |
617 | i40e_stat_update48(hw, I40E_GLV_UPRCH(stat_idx), | |
618 | I40E_GLV_UPRCL(stat_idx), | |
619 | vsi->stat_offsets_loaded, | |
620 | &oes->rx_unicast, &es->rx_unicast); | |
621 | i40e_stat_update48(hw, I40E_GLV_MPRCH(stat_idx), | |
622 | I40E_GLV_MPRCL(stat_idx), | |
623 | vsi->stat_offsets_loaded, | |
624 | &oes->rx_multicast, &es->rx_multicast); | |
625 | i40e_stat_update48(hw, I40E_GLV_BPRCH(stat_idx), | |
626 | I40E_GLV_BPRCL(stat_idx), | |
627 | vsi->stat_offsets_loaded, | |
628 | &oes->rx_broadcast, &es->rx_broadcast); | |
629 | ||
630 | i40e_stat_update48(hw, I40E_GLV_GOTCH(stat_idx), | |
631 | I40E_GLV_GOTCL(stat_idx), | |
632 | vsi->stat_offsets_loaded, | |
633 | &oes->tx_bytes, &es->tx_bytes); | |
634 | i40e_stat_update48(hw, I40E_GLV_UPTCH(stat_idx), | |
635 | I40E_GLV_UPTCL(stat_idx), | |
636 | vsi->stat_offsets_loaded, | |
637 | &oes->tx_unicast, &es->tx_unicast); | |
638 | i40e_stat_update48(hw, I40E_GLV_MPTCH(stat_idx), | |
639 | I40E_GLV_MPTCL(stat_idx), | |
640 | vsi->stat_offsets_loaded, | |
641 | &oes->tx_multicast, &es->tx_multicast); | |
642 | i40e_stat_update48(hw, I40E_GLV_BPTCH(stat_idx), | |
643 | I40E_GLV_BPTCL(stat_idx), | |
644 | vsi->stat_offsets_loaded, | |
645 | &oes->tx_broadcast, &es->tx_broadcast); | |
646 | vsi->stat_offsets_loaded = true; | |
647 | } | |
648 | ||
649 | /** | |
650 | * i40e_update_veb_stats - Update Switch component statistics | |
651 | * @veb: the VEB being updated | |
652 | **/ | |
653 | static void i40e_update_veb_stats(struct i40e_veb *veb) | |
654 | { | |
655 | struct i40e_pf *pf = veb->pf; | |
656 | struct i40e_hw *hw = &pf->hw; | |
657 | struct i40e_eth_stats *oes; | |
658 | struct i40e_eth_stats *es; /* device's eth stats */ | |
fe860afb NP |
659 | struct i40e_veb_tc_stats *veb_oes; |
660 | struct i40e_veb_tc_stats *veb_es; | |
661 | int i, idx = 0; | |
41c445ff JB |
662 | |
663 | idx = veb->stats_idx; | |
664 | es = &veb->stats; | |
665 | oes = &veb->stats_offsets; | |
fe860afb NP |
666 | veb_es = &veb->tc_stats; |
667 | veb_oes = &veb->tc_stats_offsets; | |
41c445ff JB |
668 | |
669 | /* Gather up the stats that the hw collects */ | |
670 | i40e_stat_update32(hw, I40E_GLSW_TDPC(idx), | |
671 | veb->stat_offsets_loaded, | |
672 | &oes->tx_discards, &es->tx_discards); | |
7134f9ce JB |
673 | if (hw->revision_id > 0) |
674 | i40e_stat_update32(hw, I40E_GLSW_RUPP(idx), | |
675 | veb->stat_offsets_loaded, | |
676 | &oes->rx_unknown_protocol, | |
677 | &es->rx_unknown_protocol); | |
41c445ff JB |
678 | i40e_stat_update48(hw, I40E_GLSW_GORCH(idx), I40E_GLSW_GORCL(idx), |
679 | veb->stat_offsets_loaded, | |
680 | &oes->rx_bytes, &es->rx_bytes); | |
681 | i40e_stat_update48(hw, I40E_GLSW_UPRCH(idx), I40E_GLSW_UPRCL(idx), | |
682 | veb->stat_offsets_loaded, | |
683 | &oes->rx_unicast, &es->rx_unicast); | |
684 | i40e_stat_update48(hw, I40E_GLSW_MPRCH(idx), I40E_GLSW_MPRCL(idx), | |
685 | veb->stat_offsets_loaded, | |
686 | &oes->rx_multicast, &es->rx_multicast); | |
687 | i40e_stat_update48(hw, I40E_GLSW_BPRCH(idx), I40E_GLSW_BPRCL(idx), | |
688 | veb->stat_offsets_loaded, | |
689 | &oes->rx_broadcast, &es->rx_broadcast); | |
690 | ||
691 | i40e_stat_update48(hw, I40E_GLSW_GOTCH(idx), I40E_GLSW_GOTCL(idx), | |
692 | veb->stat_offsets_loaded, | |
693 | &oes->tx_bytes, &es->tx_bytes); | |
694 | i40e_stat_update48(hw, I40E_GLSW_UPTCH(idx), I40E_GLSW_UPTCL(idx), | |
695 | veb->stat_offsets_loaded, | |
696 | &oes->tx_unicast, &es->tx_unicast); | |
697 | i40e_stat_update48(hw, I40E_GLSW_MPTCH(idx), I40E_GLSW_MPTCL(idx), | |
698 | veb->stat_offsets_loaded, | |
699 | &oes->tx_multicast, &es->tx_multicast); | |
700 | i40e_stat_update48(hw, I40E_GLSW_BPTCH(idx), I40E_GLSW_BPTCL(idx), | |
701 | veb->stat_offsets_loaded, | |
702 | &oes->tx_broadcast, &es->tx_broadcast); | |
fe860afb NP |
703 | for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) { |
704 | i40e_stat_update48(hw, I40E_GLVEBTC_RPCH(i, idx), | |
705 | I40E_GLVEBTC_RPCL(i, idx), | |
706 | veb->stat_offsets_loaded, | |
707 | &veb_oes->tc_rx_packets[i], | |
708 | &veb_es->tc_rx_packets[i]); | |
709 | i40e_stat_update48(hw, I40E_GLVEBTC_RBCH(i, idx), | |
710 | I40E_GLVEBTC_RBCL(i, idx), | |
711 | veb->stat_offsets_loaded, | |
712 | &veb_oes->tc_rx_bytes[i], | |
713 | &veb_es->tc_rx_bytes[i]); | |
714 | i40e_stat_update48(hw, I40E_GLVEBTC_TPCH(i, idx), | |
715 | I40E_GLVEBTC_TPCL(i, idx), | |
716 | veb->stat_offsets_loaded, | |
717 | &veb_oes->tc_tx_packets[i], | |
718 | &veb_es->tc_tx_packets[i]); | |
719 | i40e_stat_update48(hw, I40E_GLVEBTC_TBCH(i, idx), | |
720 | I40E_GLVEBTC_TBCL(i, idx), | |
721 | veb->stat_offsets_loaded, | |
722 | &veb_oes->tc_tx_bytes[i], | |
723 | &veb_es->tc_tx_bytes[i]); | |
724 | } | |
41c445ff JB |
725 | veb->stat_offsets_loaded = true; |
726 | } | |
727 | ||
41c445ff | 728 | /** |
7812fddc | 729 | * i40e_update_vsi_stats - Update the vsi statistics counters. |
41c445ff JB |
730 | * @vsi: the VSI to be updated |
731 | * | |
732 | * There are a few instances where we store the same stat in a | |
733 | * couple of different structs. This is partly because we have | |
734 | * the netdev stats that need to be filled out, which is slightly | |
735 | * different from the "eth_stats" defined by the chip and used in | |
7812fddc | 736 | * VF communications. We sort it out here. |
41c445ff | 737 | **/ |
7812fddc | 738 | static void i40e_update_vsi_stats(struct i40e_vsi *vsi) |
41c445ff JB |
739 | { |
740 | struct i40e_pf *pf = vsi->back; | |
41c445ff JB |
741 | struct rtnl_link_stats64 *ons; |
742 | struct rtnl_link_stats64 *ns; /* netdev stats */ | |
743 | struct i40e_eth_stats *oes; | |
744 | struct i40e_eth_stats *es; /* device's eth stats */ | |
745 | u32 tx_restart, tx_busy; | |
bf00b376 | 746 | struct i40e_ring *p; |
41c445ff | 747 | u32 rx_page, rx_buf; |
bf00b376 AA |
748 | u64 bytes, packets; |
749 | unsigned int start; | |
2fc3d715 | 750 | u64 tx_linearize; |
164c9f54 | 751 | u64 tx_force_wb; |
41c445ff JB |
752 | u64 rx_p, rx_b; |
753 | u64 tx_p, tx_b; | |
41c445ff JB |
754 | u16 q; |
755 | ||
d19cb64b | 756 | if (test_bit(__I40E_VSI_DOWN, &vsi->state) || |
41c445ff JB |
757 | test_bit(__I40E_CONFIG_BUSY, &pf->state)) |
758 | return; | |
759 | ||
760 | ns = i40e_get_vsi_stats_struct(vsi); | |
761 | ons = &vsi->net_stats_offsets; | |
762 | es = &vsi->eth_stats; | |
763 | oes = &vsi->eth_stats_offsets; | |
764 | ||
765 | /* Gather up the netdev and vsi stats that the driver collects | |
766 | * on the fly during packet processing | |
767 | */ | |
768 | rx_b = rx_p = 0; | |
769 | tx_b = tx_p = 0; | |
164c9f54 | 770 | tx_restart = tx_busy = tx_linearize = tx_force_wb = 0; |
41c445ff JB |
771 | rx_page = 0; |
772 | rx_buf = 0; | |
980e9b11 | 773 | rcu_read_lock(); |
41c445ff | 774 | for (q = 0; q < vsi->num_queue_pairs; q++) { |
980e9b11 AD |
775 | /* locate Tx ring */ |
776 | p = ACCESS_ONCE(vsi->tx_rings[q]); | |
777 | ||
778 | do { | |
57a7744e | 779 | start = u64_stats_fetch_begin_irq(&p->syncp); |
980e9b11 AD |
780 | packets = p->stats.packets; |
781 | bytes = p->stats.bytes; | |
57a7744e | 782 | } while (u64_stats_fetch_retry_irq(&p->syncp, start)); |
980e9b11 AD |
783 | tx_b += bytes; |
784 | tx_p += packets; | |
785 | tx_restart += p->tx_stats.restart_queue; | |
786 | tx_busy += p->tx_stats.tx_busy; | |
2fc3d715 | 787 | tx_linearize += p->tx_stats.tx_linearize; |
164c9f54 | 788 | tx_force_wb += p->tx_stats.tx_force_wb; |
41c445ff | 789 | |
980e9b11 AD |
790 | /* Rx queue is part of the same block as Tx queue */ |
791 | p = &p[1]; | |
792 | do { | |
57a7744e | 793 | start = u64_stats_fetch_begin_irq(&p->syncp); |
980e9b11 AD |
794 | packets = p->stats.packets; |
795 | bytes = p->stats.bytes; | |
57a7744e | 796 | } while (u64_stats_fetch_retry_irq(&p->syncp, start)); |
980e9b11 AD |
797 | rx_b += bytes; |
798 | rx_p += packets; | |
420136cc MW |
799 | rx_buf += p->rx_stats.alloc_buff_failed; |
800 | rx_page += p->rx_stats.alloc_page_failed; | |
41c445ff | 801 | } |
980e9b11 | 802 | rcu_read_unlock(); |
41c445ff JB |
803 | vsi->tx_restart = tx_restart; |
804 | vsi->tx_busy = tx_busy; | |
2fc3d715 | 805 | vsi->tx_linearize = tx_linearize; |
164c9f54 | 806 | vsi->tx_force_wb = tx_force_wb; |
41c445ff JB |
807 | vsi->rx_page_failed = rx_page; |
808 | vsi->rx_buf_failed = rx_buf; | |
809 | ||
810 | ns->rx_packets = rx_p; | |
811 | ns->rx_bytes = rx_b; | |
812 | ns->tx_packets = tx_p; | |
813 | ns->tx_bytes = tx_b; | |
814 | ||
41c445ff | 815 | /* update netdev stats from eth stats */ |
7812fddc | 816 | i40e_update_eth_stats(vsi); |
41c445ff JB |
817 | ons->tx_errors = oes->tx_errors; |
818 | ns->tx_errors = es->tx_errors; | |
819 | ons->multicast = oes->rx_multicast; | |
820 | ns->multicast = es->rx_multicast; | |
41a9e55c SN |
821 | ons->rx_dropped = oes->rx_discards; |
822 | ns->rx_dropped = es->rx_discards; | |
41c445ff JB |
823 | ons->tx_dropped = oes->tx_discards; |
824 | ns->tx_dropped = es->tx_discards; | |
825 | ||
7812fddc | 826 | /* pull in a couple PF stats if this is the main vsi */ |
41c445ff | 827 | if (vsi == pf->vsi[pf->lan_vsi]) { |
7812fddc SN |
828 | ns->rx_crc_errors = pf->stats.crc_errors; |
829 | ns->rx_errors = pf->stats.crc_errors + pf->stats.illegal_bytes; | |
830 | ns->rx_length_errors = pf->stats.rx_length_errors; | |
831 | } | |
832 | } | |
41c445ff | 833 | |
7812fddc | 834 | /** |
b40c82e6 | 835 | * i40e_update_pf_stats - Update the PF statistics counters. |
7812fddc SN |
836 | * @pf: the PF to be updated |
837 | **/ | |
838 | static void i40e_update_pf_stats(struct i40e_pf *pf) | |
839 | { | |
840 | struct i40e_hw_port_stats *osd = &pf->stats_offsets; | |
841 | struct i40e_hw_port_stats *nsd = &pf->stats; | |
842 | struct i40e_hw *hw = &pf->hw; | |
843 | u32 val; | |
844 | int i; | |
41c445ff | 845 | |
7812fddc SN |
846 | i40e_stat_update48(hw, I40E_GLPRT_GORCH(hw->port), |
847 | I40E_GLPRT_GORCL(hw->port), | |
848 | pf->stat_offsets_loaded, | |
849 | &osd->eth.rx_bytes, &nsd->eth.rx_bytes); | |
850 | i40e_stat_update48(hw, I40E_GLPRT_GOTCH(hw->port), | |
851 | I40E_GLPRT_GOTCL(hw->port), | |
852 | pf->stat_offsets_loaded, | |
853 | &osd->eth.tx_bytes, &nsd->eth.tx_bytes); | |
854 | i40e_stat_update32(hw, I40E_GLPRT_RDPC(hw->port), | |
855 | pf->stat_offsets_loaded, | |
856 | &osd->eth.rx_discards, | |
857 | &nsd->eth.rx_discards); | |
532d283d SN |
858 | i40e_stat_update48(hw, I40E_GLPRT_UPRCH(hw->port), |
859 | I40E_GLPRT_UPRCL(hw->port), | |
860 | pf->stat_offsets_loaded, | |
861 | &osd->eth.rx_unicast, | |
862 | &nsd->eth.rx_unicast); | |
7812fddc SN |
863 | i40e_stat_update48(hw, I40E_GLPRT_MPRCH(hw->port), |
864 | I40E_GLPRT_MPRCL(hw->port), | |
865 | pf->stat_offsets_loaded, | |
866 | &osd->eth.rx_multicast, | |
867 | &nsd->eth.rx_multicast); | |
532d283d SN |
868 | i40e_stat_update48(hw, I40E_GLPRT_BPRCH(hw->port), |
869 | I40E_GLPRT_BPRCL(hw->port), | |
870 | pf->stat_offsets_loaded, | |
871 | &osd->eth.rx_broadcast, | |
872 | &nsd->eth.rx_broadcast); | |
873 | i40e_stat_update48(hw, I40E_GLPRT_UPTCH(hw->port), | |
874 | I40E_GLPRT_UPTCL(hw->port), | |
875 | pf->stat_offsets_loaded, | |
876 | &osd->eth.tx_unicast, | |
877 | &nsd->eth.tx_unicast); | |
878 | i40e_stat_update48(hw, I40E_GLPRT_MPTCH(hw->port), | |
879 | I40E_GLPRT_MPTCL(hw->port), | |
880 | pf->stat_offsets_loaded, | |
881 | &osd->eth.tx_multicast, | |
882 | &nsd->eth.tx_multicast); | |
883 | i40e_stat_update48(hw, I40E_GLPRT_BPTCH(hw->port), | |
884 | I40E_GLPRT_BPTCL(hw->port), | |
885 | pf->stat_offsets_loaded, | |
886 | &osd->eth.tx_broadcast, | |
887 | &nsd->eth.tx_broadcast); | |
41c445ff | 888 | |
7812fddc SN |
889 | i40e_stat_update32(hw, I40E_GLPRT_TDOLD(hw->port), |
890 | pf->stat_offsets_loaded, | |
891 | &osd->tx_dropped_link_down, | |
892 | &nsd->tx_dropped_link_down); | |
41c445ff | 893 | |
7812fddc SN |
894 | i40e_stat_update32(hw, I40E_GLPRT_CRCERRS(hw->port), |
895 | pf->stat_offsets_loaded, | |
896 | &osd->crc_errors, &nsd->crc_errors); | |
41c445ff | 897 | |
7812fddc SN |
898 | i40e_stat_update32(hw, I40E_GLPRT_ILLERRC(hw->port), |
899 | pf->stat_offsets_loaded, | |
900 | &osd->illegal_bytes, &nsd->illegal_bytes); | |
41c445ff | 901 | |
7812fddc SN |
902 | i40e_stat_update32(hw, I40E_GLPRT_MLFC(hw->port), |
903 | pf->stat_offsets_loaded, | |
904 | &osd->mac_local_faults, | |
905 | &nsd->mac_local_faults); | |
906 | i40e_stat_update32(hw, I40E_GLPRT_MRFC(hw->port), | |
907 | pf->stat_offsets_loaded, | |
908 | &osd->mac_remote_faults, | |
909 | &nsd->mac_remote_faults); | |
41c445ff | 910 | |
7812fddc SN |
911 | i40e_stat_update32(hw, I40E_GLPRT_RLEC(hw->port), |
912 | pf->stat_offsets_loaded, | |
913 | &osd->rx_length_errors, | |
914 | &nsd->rx_length_errors); | |
41c445ff | 915 | |
7812fddc SN |
916 | i40e_stat_update32(hw, I40E_GLPRT_LXONRXC(hw->port), |
917 | pf->stat_offsets_loaded, | |
918 | &osd->link_xon_rx, &nsd->link_xon_rx); | |
919 | i40e_stat_update32(hw, I40E_GLPRT_LXONTXC(hw->port), | |
920 | pf->stat_offsets_loaded, | |
921 | &osd->link_xon_tx, &nsd->link_xon_tx); | |
95db239f NP |
922 | i40e_stat_update32(hw, I40E_GLPRT_LXOFFRXC(hw->port), |
923 | pf->stat_offsets_loaded, | |
924 | &osd->link_xoff_rx, &nsd->link_xoff_rx); | |
7812fddc SN |
925 | i40e_stat_update32(hw, I40E_GLPRT_LXOFFTXC(hw->port), |
926 | pf->stat_offsets_loaded, | |
927 | &osd->link_xoff_tx, &nsd->link_xoff_tx); | |
41c445ff | 928 | |
7812fddc | 929 | for (i = 0; i < 8; i++) { |
95db239f NP |
930 | i40e_stat_update32(hw, I40E_GLPRT_PXOFFRXC(hw->port, i), |
931 | pf->stat_offsets_loaded, | |
932 | &osd->priority_xoff_rx[i], | |
933 | &nsd->priority_xoff_rx[i]); | |
7812fddc | 934 | i40e_stat_update32(hw, I40E_GLPRT_PXONRXC(hw->port, i), |
41c445ff | 935 | pf->stat_offsets_loaded, |
7812fddc SN |
936 | &osd->priority_xon_rx[i], |
937 | &nsd->priority_xon_rx[i]); | |
938 | i40e_stat_update32(hw, I40E_GLPRT_PXONTXC(hw->port, i), | |
41c445ff | 939 | pf->stat_offsets_loaded, |
7812fddc SN |
940 | &osd->priority_xon_tx[i], |
941 | &nsd->priority_xon_tx[i]); | |
942 | i40e_stat_update32(hw, I40E_GLPRT_PXOFFTXC(hw->port, i), | |
41c445ff | 943 | pf->stat_offsets_loaded, |
7812fddc SN |
944 | &osd->priority_xoff_tx[i], |
945 | &nsd->priority_xoff_tx[i]); | |
946 | i40e_stat_update32(hw, | |
947 | I40E_GLPRT_RXON2OFFCNT(hw->port, i), | |
bee5af7e | 948 | pf->stat_offsets_loaded, |
7812fddc SN |
949 | &osd->priority_xon_2_xoff[i], |
950 | &nsd->priority_xon_2_xoff[i]); | |
41c445ff JB |
951 | } |
952 | ||
7812fddc SN |
953 | i40e_stat_update48(hw, I40E_GLPRT_PRC64H(hw->port), |
954 | I40E_GLPRT_PRC64L(hw->port), | |
955 | pf->stat_offsets_loaded, | |
956 | &osd->rx_size_64, &nsd->rx_size_64); | |
957 | i40e_stat_update48(hw, I40E_GLPRT_PRC127H(hw->port), | |
958 | I40E_GLPRT_PRC127L(hw->port), | |
959 | pf->stat_offsets_loaded, | |
960 | &osd->rx_size_127, &nsd->rx_size_127); | |
961 | i40e_stat_update48(hw, I40E_GLPRT_PRC255H(hw->port), | |
962 | I40E_GLPRT_PRC255L(hw->port), | |
963 | pf->stat_offsets_loaded, | |
964 | &osd->rx_size_255, &nsd->rx_size_255); | |
965 | i40e_stat_update48(hw, I40E_GLPRT_PRC511H(hw->port), | |
966 | I40E_GLPRT_PRC511L(hw->port), | |
967 | pf->stat_offsets_loaded, | |
968 | &osd->rx_size_511, &nsd->rx_size_511); | |
969 | i40e_stat_update48(hw, I40E_GLPRT_PRC1023H(hw->port), | |
970 | I40E_GLPRT_PRC1023L(hw->port), | |
971 | pf->stat_offsets_loaded, | |
972 | &osd->rx_size_1023, &nsd->rx_size_1023); | |
973 | i40e_stat_update48(hw, I40E_GLPRT_PRC1522H(hw->port), | |
974 | I40E_GLPRT_PRC1522L(hw->port), | |
975 | pf->stat_offsets_loaded, | |
976 | &osd->rx_size_1522, &nsd->rx_size_1522); | |
977 | i40e_stat_update48(hw, I40E_GLPRT_PRC9522H(hw->port), | |
978 | I40E_GLPRT_PRC9522L(hw->port), | |
979 | pf->stat_offsets_loaded, | |
980 | &osd->rx_size_big, &nsd->rx_size_big); | |
981 | ||
982 | i40e_stat_update48(hw, I40E_GLPRT_PTC64H(hw->port), | |
983 | I40E_GLPRT_PTC64L(hw->port), | |
984 | pf->stat_offsets_loaded, | |
985 | &osd->tx_size_64, &nsd->tx_size_64); | |
986 | i40e_stat_update48(hw, I40E_GLPRT_PTC127H(hw->port), | |
987 | I40E_GLPRT_PTC127L(hw->port), | |
988 | pf->stat_offsets_loaded, | |
989 | &osd->tx_size_127, &nsd->tx_size_127); | |
990 | i40e_stat_update48(hw, I40E_GLPRT_PTC255H(hw->port), | |
991 | I40E_GLPRT_PTC255L(hw->port), | |
992 | pf->stat_offsets_loaded, | |
993 | &osd->tx_size_255, &nsd->tx_size_255); | |
994 | i40e_stat_update48(hw, I40E_GLPRT_PTC511H(hw->port), | |
995 | I40E_GLPRT_PTC511L(hw->port), | |
996 | pf->stat_offsets_loaded, | |
997 | &osd->tx_size_511, &nsd->tx_size_511); | |
998 | i40e_stat_update48(hw, I40E_GLPRT_PTC1023H(hw->port), | |
999 | I40E_GLPRT_PTC1023L(hw->port), | |
1000 | pf->stat_offsets_loaded, | |
1001 | &osd->tx_size_1023, &nsd->tx_size_1023); | |
1002 | i40e_stat_update48(hw, I40E_GLPRT_PTC1522H(hw->port), | |
1003 | I40E_GLPRT_PTC1522L(hw->port), | |
1004 | pf->stat_offsets_loaded, | |
1005 | &osd->tx_size_1522, &nsd->tx_size_1522); | |
1006 | i40e_stat_update48(hw, I40E_GLPRT_PTC9522H(hw->port), | |
1007 | I40E_GLPRT_PTC9522L(hw->port), | |
1008 | pf->stat_offsets_loaded, | |
1009 | &osd->tx_size_big, &nsd->tx_size_big); | |
1010 | ||
1011 | i40e_stat_update32(hw, I40E_GLPRT_RUC(hw->port), | |
1012 | pf->stat_offsets_loaded, | |
1013 | &osd->rx_undersize, &nsd->rx_undersize); | |
1014 | i40e_stat_update32(hw, I40E_GLPRT_RFC(hw->port), | |
1015 | pf->stat_offsets_loaded, | |
1016 | &osd->rx_fragments, &nsd->rx_fragments); | |
1017 | i40e_stat_update32(hw, I40E_GLPRT_ROC(hw->port), | |
1018 | pf->stat_offsets_loaded, | |
1019 | &osd->rx_oversize, &nsd->rx_oversize); | |
1020 | i40e_stat_update32(hw, I40E_GLPRT_RJC(hw->port), | |
1021 | pf->stat_offsets_loaded, | |
1022 | &osd->rx_jabber, &nsd->rx_jabber); | |
1023 | ||
433c47de | 1024 | /* FDIR stats */ |
0bf4b1b0 ASJ |
1025 | i40e_stat_update32(hw, |
1026 | I40E_GLQF_PCNT(I40E_FD_ATR_STAT_IDX(pf->hw.pf_id)), | |
433c47de ASJ |
1027 | pf->stat_offsets_loaded, |
1028 | &osd->fd_atr_match, &nsd->fd_atr_match); | |
0bf4b1b0 ASJ |
1029 | i40e_stat_update32(hw, |
1030 | I40E_GLQF_PCNT(I40E_FD_SB_STAT_IDX(pf->hw.pf_id)), | |
433c47de ASJ |
1031 | pf->stat_offsets_loaded, |
1032 | &osd->fd_sb_match, &nsd->fd_sb_match); | |
60ccd45c ASJ |
1033 | i40e_stat_update32(hw, |
1034 | I40E_GLQF_PCNT(I40E_FD_ATR_TUNNEL_STAT_IDX(pf->hw.pf_id)), | |
1035 | pf->stat_offsets_loaded, | |
1036 | &osd->fd_atr_tunnel_match, &nsd->fd_atr_tunnel_match); | |
433c47de | 1037 | |
7812fddc SN |
1038 | val = rd32(hw, I40E_PRTPM_EEE_STAT); |
1039 | nsd->tx_lpi_status = | |
1040 | (val & I40E_PRTPM_EEE_STAT_TX_LPI_STATUS_MASK) >> | |
1041 | I40E_PRTPM_EEE_STAT_TX_LPI_STATUS_SHIFT; | |
1042 | nsd->rx_lpi_status = | |
1043 | (val & I40E_PRTPM_EEE_STAT_RX_LPI_STATUS_MASK) >> | |
1044 | I40E_PRTPM_EEE_STAT_RX_LPI_STATUS_SHIFT; | |
1045 | i40e_stat_update32(hw, I40E_PRTPM_TLPIC, | |
1046 | pf->stat_offsets_loaded, | |
1047 | &osd->tx_lpi_count, &nsd->tx_lpi_count); | |
1048 | i40e_stat_update32(hw, I40E_PRTPM_RLPIC, | |
1049 | pf->stat_offsets_loaded, | |
1050 | &osd->rx_lpi_count, &nsd->rx_lpi_count); | |
1051 | ||
d0389e51 | 1052 | if (pf->flags & I40E_FLAG_FD_SB_ENABLED && |
b77ac975 | 1053 | !(pf->hw_disabled_flags & I40E_FLAG_FD_SB_ENABLED)) |
d0389e51 ASJ |
1054 | nsd->fd_sb_status = true; |
1055 | else | |
1056 | nsd->fd_sb_status = false; | |
1057 | ||
1058 | if (pf->flags & I40E_FLAG_FD_ATR_ENABLED && | |
b77ac975 | 1059 | !(pf->hw_disabled_flags & I40E_FLAG_FD_ATR_ENABLED)) |
d0389e51 ASJ |
1060 | nsd->fd_atr_status = true; |
1061 | else | |
1062 | nsd->fd_atr_status = false; | |
1063 | ||
41c445ff JB |
1064 | pf->stat_offsets_loaded = true; |
1065 | } | |
1066 | ||
7812fddc SN |
1067 | /** |
1068 | * i40e_update_stats - Update the various statistics counters. | |
1069 | * @vsi: the VSI to be updated | |
1070 | * | |
1071 | * Update the various stats for this VSI and its related entities. | |
1072 | **/ | |
1073 | void i40e_update_stats(struct i40e_vsi *vsi) | |
1074 | { | |
1075 | struct i40e_pf *pf = vsi->back; | |
1076 | ||
1077 | if (vsi == pf->vsi[pf->lan_vsi]) | |
1078 | i40e_update_pf_stats(pf); | |
1079 | ||
1080 | i40e_update_vsi_stats(vsi); | |
1081 | } | |
1082 | ||
41c445ff JB |
1083 | /** |
1084 | * i40e_find_filter - Search VSI filter list for specific mac/vlan filter | |
1085 | * @vsi: the VSI to be searched | |
1086 | * @macaddr: the MAC address | |
1087 | * @vlan: the vlan | |
41c445ff JB |
1088 | * |
1089 | * Returns ptr to the filter object or NULL | |
1090 | **/ | |
1091 | static struct i40e_mac_filter *i40e_find_filter(struct i40e_vsi *vsi, | |
6622f5cd | 1092 | const u8 *macaddr, s16 vlan) |
41c445ff JB |
1093 | { |
1094 | struct i40e_mac_filter *f; | |
278e7d0b | 1095 | u64 key; |
41c445ff JB |
1096 | |
1097 | if (!vsi || !macaddr) | |
1098 | return NULL; | |
1099 | ||
278e7d0b JK |
1100 | key = i40e_addr_to_hkey(macaddr); |
1101 | hash_for_each_possible(vsi->mac_filter_hash, f, hlist, key) { | |
41c445ff | 1102 | if ((ether_addr_equal(macaddr, f->macaddr)) && |
1bc87e80 | 1103 | (vlan == f->vlan)) |
41c445ff JB |
1104 | return f; |
1105 | } | |
1106 | return NULL; | |
1107 | } | |
1108 | ||
1109 | /** | |
1110 | * i40e_find_mac - Find a mac addr in the macvlan filters list | |
1111 | * @vsi: the VSI to be searched | |
1112 | * @macaddr: the MAC address we are searching for | |
41c445ff JB |
1113 | * |
1114 | * Returns the first filter with the provided MAC address or NULL if | |
1115 | * MAC address was not found | |
1116 | **/ | |
6622f5cd | 1117 | struct i40e_mac_filter *i40e_find_mac(struct i40e_vsi *vsi, const u8 *macaddr) |
41c445ff JB |
1118 | { |
1119 | struct i40e_mac_filter *f; | |
278e7d0b | 1120 | u64 key; |
41c445ff JB |
1121 | |
1122 | if (!vsi || !macaddr) | |
1123 | return NULL; | |
1124 | ||
278e7d0b JK |
1125 | key = i40e_addr_to_hkey(macaddr); |
1126 | hash_for_each_possible(vsi->mac_filter_hash, f, hlist, key) { | |
1bc87e80 | 1127 | if ((ether_addr_equal(macaddr, f->macaddr))) |
41c445ff JB |
1128 | return f; |
1129 | } | |
1130 | return NULL; | |
1131 | } | |
1132 | ||
1133 | /** | |
1134 | * i40e_is_vsi_in_vlan - Check if VSI is in vlan mode | |
1135 | * @vsi: the VSI to be searched | |
1136 | * | |
1137 | * Returns true if VSI is in vlan mode or false otherwise | |
1138 | **/ | |
1139 | bool i40e_is_vsi_in_vlan(struct i40e_vsi *vsi) | |
1140 | { | |
cbebb85f JK |
1141 | /* If we have a PVID, always operate in VLAN mode */ |
1142 | if (vsi->info.pvid) | |
1143 | return true; | |
1144 | ||
1145 | /* We need to operate in VLAN mode whenever we have any filters with | |
1146 | * a VLAN other than I40E_VLAN_ALL. We could check the table each | |
1147 | * time, incurring search cost repeatedly. However, we can notice two | |
1148 | * things: | |
1149 | * | |
1150 | * 1) the only place where we can gain a VLAN filter is in | |
1151 | * i40e_add_filter. | |
1152 | * | |
1153 | * 2) the only place where filters are actually removed is in | |
0b7c8b5d | 1154 | * i40e_sync_filters_subtask. |
cbebb85f JK |
1155 | * |
1156 | * Thus, we can simply use a boolean value, has_vlan_filters which we | |
1157 | * will set to true when we add a VLAN filter in i40e_add_filter. Then | |
1158 | * we have to perform the full search after deleting filters in | |
0b7c8b5d | 1159 | * i40e_sync_filters_subtask, but we already have to search |
cbebb85f JK |
1160 | * filters here and can perform the check at the same time. This |
1161 | * results in avoiding embedding a loop for VLAN mode inside another | |
1162 | * loop over all the filters, and should maintain correctness as noted | |
1163 | * above. | |
41c445ff | 1164 | */ |
cbebb85f | 1165 | return vsi->has_vlan_filter; |
41c445ff JB |
1166 | } |
1167 | ||
489a3265 JK |
1168 | /** |
1169 | * i40e_correct_mac_vlan_filters - Correct non-VLAN filters if necessary | |
1170 | * @vsi: the VSI to configure | |
1171 | * @tmp_add_list: list of filters ready to be added | |
1172 | * @tmp_del_list: list of filters ready to be deleted | |
1173 | * @vlan_filters: the number of active VLAN filters | |
1174 | * | |
1175 | * Update VLAN=0 and VLAN=-1 (I40E_VLAN_ANY) filters properly so that they | |
1176 | * behave as expected. If we have any active VLAN filters remaining or about | |
1177 | * to be added then we need to update non-VLAN filters to be marked as VLAN=0 | |
1178 | * so that they only match against untagged traffic. If we no longer have any | |
1179 | * active VLAN filters, we need to make all non-VLAN filters marked as VLAN=-1 | |
1180 | * so that they match against both tagged and untagged traffic. In this way, | |
1181 | * we ensure that we correctly receive the desired traffic. This ensures that | |
1182 | * when we have an active VLAN we will receive only untagged traffic and | |
1183 | * traffic matching active VLANs. If we have no active VLANs then we will | |
1184 | * operate in non-VLAN mode and receive all traffic, tagged or untagged. | |
1185 | * | |
1186 | * Finally, in a similar fashion, this function also corrects filters when | |
1187 | * there is an active PVID assigned to this VSI. | |
1188 | * | |
1189 | * In case of memory allocation failure return -ENOMEM. Otherwise, return 0. | |
1190 | * | |
1191 | * This function is only expected to be called from within | |
1192 | * i40e_sync_vsi_filters. | |
1193 | * | |
1194 | * NOTE: This function expects to be called while under the | |
1195 | * mac_filter_hash_lock | |
1196 | */ | |
1197 | static int i40e_correct_mac_vlan_filters(struct i40e_vsi *vsi, | |
1198 | struct hlist_head *tmp_add_list, | |
1199 | struct hlist_head *tmp_del_list, | |
1200 | int vlan_filters) | |
1201 | { | |
5cb25901 | 1202 | s16 pvid = le16_to_cpu(vsi->info.pvid); |
489a3265 | 1203 | struct i40e_mac_filter *f, *add_head; |
671889e6 | 1204 | struct i40e_new_mac_filter *new; |
489a3265 JK |
1205 | struct hlist_node *h; |
1206 | int bkt, new_vlan; | |
1207 | ||
1208 | /* To determine if a particular filter needs to be replaced we | |
1209 | * have the three following conditions: | |
1210 | * | |
1211 | * a) if we have a PVID assigned, then all filters which are | |
1212 | * not marked as VLAN=PVID must be replaced with filters that | |
1213 | * are. | |
1214 | * b) otherwise, if we have any active VLANS, all filters | |
1215 | * which are marked as VLAN=-1 must be replaced with | |
1216 | * filters marked as VLAN=0 | |
1217 | * c) finally, if we do not have any active VLANS, all filters | |
1218 | * which are marked as VLAN=0 must be replaced with filters | |
1219 | * marked as VLAN=-1 | |
1220 | */ | |
1221 | ||
1222 | /* Update the filters about to be added in place */ | |
671889e6 | 1223 | hlist_for_each_entry(new, tmp_add_list, hlist) { |
5cb25901 JK |
1224 | if (pvid && new->f->vlan != pvid) |
1225 | new->f->vlan = pvid; | |
671889e6 JK |
1226 | else if (vlan_filters && new->f->vlan == I40E_VLAN_ANY) |
1227 | new->f->vlan = 0; | |
1228 | else if (!vlan_filters && new->f->vlan == 0) | |
1229 | new->f->vlan = I40E_VLAN_ANY; | |
489a3265 JK |
1230 | } |
1231 | ||
1232 | /* Update the remaining active filters */ | |
1233 | hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist) { | |
1234 | /* Combine the checks for whether a filter needs to be changed | |
1235 | * and then determine the new VLAN inside the if block, in | |
1236 | * order to avoid duplicating code for adding the new filter | |
1237 | * then deleting the old filter. | |
1238 | */ | |
5cb25901 | 1239 | if ((pvid && f->vlan != pvid) || |
489a3265 JK |
1240 | (vlan_filters && f->vlan == I40E_VLAN_ANY) || |
1241 | (!vlan_filters && f->vlan == 0)) { | |
1242 | /* Determine the new vlan we will be adding */ | |
5cb25901 JK |
1243 | if (pvid) |
1244 | new_vlan = pvid; | |
489a3265 JK |
1245 | else if (vlan_filters) |
1246 | new_vlan = 0; | |
1247 | else | |
1248 | new_vlan = I40E_VLAN_ANY; | |
1249 | ||
1250 | /* Create the new filter */ | |
1251 | add_head = i40e_add_filter(vsi, f->macaddr, new_vlan); | |
1252 | if (!add_head) | |
1253 | return -ENOMEM; | |
1254 | ||
671889e6 JK |
1255 | /* Create a temporary i40e_new_mac_filter */ |
1256 | new = kzalloc(sizeof(*new), GFP_ATOMIC); | |
1257 | if (!new) | |
1258 | return -ENOMEM; | |
1259 | ||
1260 | new->f = add_head; | |
1261 | new->state = add_head->state; | |
1262 | ||
1263 | /* Add the new filter to the tmp list */ | |
1264 | hlist_add_head(&new->hlist, tmp_add_list); | |
489a3265 JK |
1265 | |
1266 | /* Put the original filter into the delete list */ | |
1267 | f->state = I40E_FILTER_REMOVE; | |
1268 | hash_del(&f->hlist); | |
1269 | hlist_add_head(&f->hlist, tmp_del_list); | |
1270 | } | |
1271 | } | |
1272 | ||
1273 | vsi->has_vlan_filter = !!vlan_filters; | |
1274 | ||
1275 | return 0; | |
1276 | } | |
1277 | ||
1596b5dd JK |
1278 | /** |
1279 | * i40e_rm_default_mac_filter - Remove the default MAC filter set by NVM | |
1280 | * @vsi: the PF Main VSI - inappropriate for any other VSI | |
1281 | * @macaddr: the MAC address | |
1282 | * | |
1283 | * Remove whatever filter the firmware set up so the driver can manage | |
1284 | * its own filtering intelligently. | |
1285 | **/ | |
1286 | static void i40e_rm_default_mac_filter(struct i40e_vsi *vsi, u8 *macaddr) | |
1287 | { | |
1288 | struct i40e_aqc_remove_macvlan_element_data element; | |
1289 | struct i40e_pf *pf = vsi->back; | |
1290 | ||
1291 | /* Only appropriate for the PF main VSI */ | |
1292 | if (vsi->type != I40E_VSI_MAIN) | |
1293 | return; | |
1294 | ||
1295 | memset(&element, 0, sizeof(element)); | |
1296 | ether_addr_copy(element.mac_addr, macaddr); | |
1297 | element.vlan_tag = 0; | |
1298 | /* Ignore error returns, some firmware does it this way... */ | |
1299 | element.flags = I40E_AQC_MACVLAN_DEL_PERFECT_MATCH; | |
1300 | i40e_aq_remove_macvlan(&pf->hw, vsi->seid, &element, 1, NULL); | |
1301 | ||
1302 | memset(&element, 0, sizeof(element)); | |
1303 | ether_addr_copy(element.mac_addr, macaddr); | |
1304 | element.vlan_tag = 0; | |
1305 | /* ...and some firmware does it this way. */ | |
1306 | element.flags = I40E_AQC_MACVLAN_DEL_PERFECT_MATCH | | |
1307 | I40E_AQC_MACVLAN_DEL_IGNORE_VLAN; | |
1308 | i40e_aq_remove_macvlan(&pf->hw, vsi->seid, &element, 1, NULL); | |
1309 | } | |
1310 | ||
41c445ff JB |
1311 | /** |
1312 | * i40e_add_filter - Add a mac/vlan filter to the VSI | |
1313 | * @vsi: the VSI to be searched | |
1314 | * @macaddr: the MAC address | |
1315 | * @vlan: the vlan | |
41c445ff JB |
1316 | * |
1317 | * Returns ptr to the filter object or NULL when no memory available. | |
21659035 | 1318 | * |
278e7d0b | 1319 | * NOTE: This function is expected to be called with mac_filter_hash_lock |
21659035 | 1320 | * being held. |
41c445ff JB |
1321 | **/ |
1322 | struct i40e_mac_filter *i40e_add_filter(struct i40e_vsi *vsi, | |
6622f5cd | 1323 | const u8 *macaddr, s16 vlan) |
41c445ff JB |
1324 | { |
1325 | struct i40e_mac_filter *f; | |
278e7d0b | 1326 | u64 key; |
41c445ff JB |
1327 | |
1328 | if (!vsi || !macaddr) | |
1329 | return NULL; | |
1330 | ||
1bc87e80 | 1331 | f = i40e_find_filter(vsi, macaddr, vlan); |
41c445ff JB |
1332 | if (!f) { |
1333 | f = kzalloc(sizeof(*f), GFP_ATOMIC); | |
1334 | if (!f) | |
1bc87e80 | 1335 | return NULL; |
41c445ff | 1336 | |
cbebb85f JK |
1337 | /* Update the boolean indicating if we need to function in |
1338 | * VLAN mode. | |
1339 | */ | |
1340 | if (vlan >= 0) | |
1341 | vsi->has_vlan_filter = true; | |
1342 | ||
9a173901 | 1343 | ether_addr_copy(f->macaddr, macaddr); |
41c445ff | 1344 | f->vlan = vlan; |
c3c7ea27 MW |
1345 | /* If we're in overflow promisc mode, set the state directly |
1346 | * to failed, so we don't bother to try sending the filter | |
1347 | * to the hardware. | |
1348 | */ | |
d19cb64b | 1349 | if (test_bit(__I40E_VSI_OVERFLOW_PROMISC, &vsi->state)) |
c3c7ea27 MW |
1350 | f->state = I40E_FILTER_FAILED; |
1351 | else | |
1352 | f->state = I40E_FILTER_NEW; | |
278e7d0b JK |
1353 | INIT_HLIST_NODE(&f->hlist); |
1354 | ||
1355 | key = i40e_addr_to_hkey(macaddr); | |
1356 | hash_add(vsi->mac_filter_hash, &f->hlist, key); | |
41c445ff | 1357 | |
41c445ff JB |
1358 | vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED; |
1359 | vsi->back->flags |= I40E_FLAG_FILTER_SYNC; | |
1360 | } | |
1361 | ||
1bc87e80 JK |
1362 | /* If we're asked to add a filter that has been marked for removal, it |
1363 | * is safe to simply restore it to active state. __i40e_del_filter | |
1364 | * will have simply deleted any filters which were previously marked | |
1365 | * NEW or FAILED, so if it is currently marked REMOVE it must have | |
1366 | * previously been ACTIVE. Since we haven't yet run the sync filters | |
1367 | * task, just restore this filter to the ACTIVE state so that the | |
1368 | * sync task leaves it in place | |
1369 | */ | |
1370 | if (f->state == I40E_FILTER_REMOVE) | |
1371 | f->state = I40E_FILTER_ACTIVE; | |
1372 | ||
41c445ff JB |
1373 | return f; |
1374 | } | |
1375 | ||
1376 | /** | |
290d2557 JK |
1377 | * __i40e_del_filter - Remove a specific filter from the VSI |
1378 | * @vsi: VSI to remove from | |
1379 | * @f: the filter to remove from the list | |
1380 | * | |
1381 | * This function should be called instead of i40e_del_filter only if you know | |
1382 | * the exact filter you will remove already, such as via i40e_find_filter or | |
1383 | * i40e_find_mac. | |
21659035 | 1384 | * |
278e7d0b | 1385 | * NOTE: This function is expected to be called with mac_filter_hash_lock |
21659035 | 1386 | * being held. |
c3c7ea27 MW |
1387 | * ANOTHER NOTE: This function MUST be called from within the context of |
1388 | * the "safe" variants of any list iterators, e.g. list_for_each_entry_safe() | |
1389 | * instead of list_for_each_entry(). | |
41c445ff | 1390 | **/ |
148141bb | 1391 | void __i40e_del_filter(struct i40e_vsi *vsi, struct i40e_mac_filter *f) |
41c445ff | 1392 | { |
1bc87e80 | 1393 | if (!f) |
41c445ff JB |
1394 | return; |
1395 | ||
a410c821 AB |
1396 | /* If the filter was never added to firmware then we can just delete it |
1397 | * directly and we don't want to set the status to remove or else an | |
1398 | * admin queue command will unnecessarily fire. | |
1399 | */ | |
1bc87e80 JK |
1400 | if ((f->state == I40E_FILTER_FAILED) || |
1401 | (f->state == I40E_FILTER_NEW)) { | |
278e7d0b | 1402 | hash_del(&f->hlist); |
1bc87e80 | 1403 | kfree(f); |
41c445ff | 1404 | } else { |
1bc87e80 | 1405 | f->state = I40E_FILTER_REMOVE; |
41c445ff | 1406 | } |
a410c821 AB |
1407 | |
1408 | vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED; | |
1409 | vsi->back->flags |= I40E_FLAG_FILTER_SYNC; | |
41c445ff JB |
1410 | } |
1411 | ||
290d2557 JK |
1412 | /** |
1413 | * i40e_del_filter - Remove a MAC/VLAN filter from the VSI | |
1414 | * @vsi: the VSI to be searched | |
1415 | * @macaddr: the MAC address | |
1416 | * @vlan: the VLAN | |
1417 | * | |
278e7d0b | 1418 | * NOTE: This function is expected to be called with mac_filter_hash_lock |
290d2557 JK |
1419 | * being held. |
1420 | * ANOTHER NOTE: This function MUST be called from within the context of | |
1421 | * the "safe" variants of any list iterators, e.g. list_for_each_entry_safe() | |
1422 | * instead of list_for_each_entry(). | |
1423 | **/ | |
1424 | void i40e_del_filter(struct i40e_vsi *vsi, const u8 *macaddr, s16 vlan) | |
1425 | { | |
1426 | struct i40e_mac_filter *f; | |
1427 | ||
1428 | if (!vsi || !macaddr) | |
1429 | return; | |
1430 | ||
1431 | f = i40e_find_filter(vsi, macaddr, vlan); | |
1432 | __i40e_del_filter(vsi, f); | |
1433 | } | |
1434 | ||
35ec2ff3 | 1435 | /** |
feffdbe4 | 1436 | * i40e_add_mac_filter - Add a MAC filter for all active VLANs |
35ec2ff3 JK |
1437 | * @vsi: the VSI to be searched |
1438 | * @macaddr: the mac address to be filtered | |
1439 | * | |
feffdbe4 JK |
1440 | * If we're not in VLAN mode, just add the filter to I40E_VLAN_ANY. Otherwise, |
1441 | * go through all the macvlan filters and add a macvlan filter for each | |
5feb3d7b JK |
1442 | * unique vlan that already exists. If a PVID has been assigned, instead only |
1443 | * add the macaddr to that VLAN. | |
35ec2ff3 | 1444 | * |
5feb3d7b | 1445 | * Returns last filter added on success, else NULL |
35ec2ff3 | 1446 | **/ |
feffdbe4 JK |
1447 | struct i40e_mac_filter *i40e_add_mac_filter(struct i40e_vsi *vsi, |
1448 | const u8 *macaddr) | |
35ec2ff3 | 1449 | { |
5feb3d7b | 1450 | struct i40e_mac_filter *f, *add = NULL; |
278e7d0b JK |
1451 | struct hlist_node *h; |
1452 | int bkt; | |
5feb3d7b JK |
1453 | |
1454 | if (vsi->info.pvid) | |
1455 | return i40e_add_filter(vsi, macaddr, | |
1456 | le16_to_cpu(vsi->info.pvid)); | |
35ec2ff3 | 1457 | |
7aaf9536 JK |
1458 | if (!i40e_is_vsi_in_vlan(vsi)) |
1459 | return i40e_add_filter(vsi, macaddr, I40E_VLAN_ANY); | |
1460 | ||
278e7d0b | 1461 | hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist) { |
57b341d6 JK |
1462 | if (f->state == I40E_FILTER_REMOVE) |
1463 | continue; | |
5feb3d7b JK |
1464 | add = i40e_add_filter(vsi, macaddr, f->vlan); |
1465 | if (!add) | |
1466 | return NULL; | |
35ec2ff3 JK |
1467 | } |
1468 | ||
5feb3d7b | 1469 | return add; |
35ec2ff3 JK |
1470 | } |
1471 | ||
1472 | /** | |
feffdbe4 | 1473 | * i40e_del_mac_filter - Remove a MAC filter from all VLANs |
35ec2ff3 JK |
1474 | * @vsi: the VSI to be searched |
1475 | * @macaddr: the mac address to be removed | |
1476 | * | |
feffdbe4 JK |
1477 | * Removes a given MAC address from a VSI regardless of what VLAN it has been |
1478 | * associated with. | |
35ec2ff3 JK |
1479 | * |
1480 | * Returns 0 for success, or error | |
1481 | **/ | |
feffdbe4 | 1482 | int i40e_del_mac_filter(struct i40e_vsi *vsi, const u8 *macaddr) |
35ec2ff3 | 1483 | { |
278e7d0b JK |
1484 | struct i40e_mac_filter *f; |
1485 | struct hlist_node *h; | |
290d2557 | 1486 | bool found = false; |
278e7d0b | 1487 | int bkt; |
35ec2ff3 | 1488 | |
278e7d0b JK |
1489 | WARN(!spin_is_locked(&vsi->mac_filter_hash_lock), |
1490 | "Missing mac_filter_hash_lock\n"); | |
1491 | hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist) { | |
290d2557 JK |
1492 | if (ether_addr_equal(macaddr, f->macaddr)) { |
1493 | __i40e_del_filter(vsi, f); | |
1494 | found = true; | |
1495 | } | |
35ec2ff3 | 1496 | } |
290d2557 JK |
1497 | |
1498 | if (found) | |
35ec2ff3 | 1499 | return 0; |
290d2557 JK |
1500 | else |
1501 | return -ENOENT; | |
35ec2ff3 JK |
1502 | } |
1503 | ||
41c445ff JB |
1504 | /** |
1505 | * i40e_set_mac - NDO callback to set mac address | |
1506 | * @netdev: network interface device structure | |
1507 | * @p: pointer to an address structure | |
1508 | * | |
1509 | * Returns 0 on success, negative on failure | |
1510 | **/ | |
1511 | static int i40e_set_mac(struct net_device *netdev, void *p) | |
1512 | { | |
1513 | struct i40e_netdev_priv *np = netdev_priv(netdev); | |
1514 | struct i40e_vsi *vsi = np->vsi; | |
30650cc5 SN |
1515 | struct i40e_pf *pf = vsi->back; |
1516 | struct i40e_hw *hw = &pf->hw; | |
41c445ff | 1517 | struct sockaddr *addr = p; |
41c445ff JB |
1518 | |
1519 | if (!is_valid_ether_addr(addr->sa_data)) | |
1520 | return -EADDRNOTAVAIL; | |
1521 | ||
30650cc5 SN |
1522 | if (ether_addr_equal(netdev->dev_addr, addr->sa_data)) { |
1523 | netdev_info(netdev, "already using mac address %pM\n", | |
1524 | addr->sa_data); | |
1525 | return 0; | |
1526 | } | |
41c445ff | 1527 | |
d19cb64b | 1528 | if (test_bit(__I40E_VSI_DOWN, &vsi->back->state) || |
80f6428f ASJ |
1529 | test_bit(__I40E_RESET_RECOVERY_PENDING, &vsi->back->state)) |
1530 | return -EADDRNOTAVAIL; | |
1531 | ||
30650cc5 SN |
1532 | if (ether_addr_equal(hw->mac.addr, addr->sa_data)) |
1533 | netdev_info(netdev, "returning to hw mac address %pM\n", | |
1534 | hw->mac.addr); | |
1535 | else | |
1536 | netdev_info(netdev, "set new mac address %pM\n", addr->sa_data); | |
1537 | ||
278e7d0b | 1538 | spin_lock_bh(&vsi->mac_filter_hash_lock); |
feffdbe4 JK |
1539 | i40e_del_mac_filter(vsi, netdev->dev_addr); |
1540 | i40e_add_mac_filter(vsi, addr->sa_data); | |
278e7d0b | 1541 | spin_unlock_bh(&vsi->mac_filter_hash_lock); |
c3c7ea27 | 1542 | ether_addr_copy(netdev->dev_addr, addr->sa_data); |
41c445ff JB |
1543 | if (vsi->type == I40E_VSI_MAIN) { |
1544 | i40e_status ret; | |
6995b36c | 1545 | |
41c445ff | 1546 | ret = i40e_aq_mac_address_write(&vsi->back->hw, |
cc41222c | 1547 | I40E_AQC_WRITE_TYPE_LAA_WOL, |
41c445ff | 1548 | addr->sa_data, NULL); |
c3c7ea27 MW |
1549 | if (ret) |
1550 | netdev_info(netdev, "Ignoring error from firmware on LAA update, status %s, AQ ret %s\n", | |
1551 | i40e_stat_str(hw, ret), | |
1552 | i40e_aq_str(hw, hw->aq.asq_last_status)); | |
30650cc5 SN |
1553 | } |
1554 | ||
c53934c6 JB |
1555 | /* schedule our worker thread which will take care of |
1556 | * applying the new filter changes | |
1557 | */ | |
1558 | i40e_service_event_schedule(vsi->back); | |
1559 | return 0; | |
41c445ff JB |
1560 | } |
1561 | ||
1562 | /** | |
1563 | * i40e_vsi_setup_queue_map - Setup a VSI queue map based on enabled_tc | |
1564 | * @vsi: the VSI being setup | |
1565 | * @ctxt: VSI context structure | |
1566 | * @enabled_tc: Enabled TCs bitmap | |
1567 | * @is_add: True if called before Add VSI | |
1568 | * | |
1569 | * Setup VSI queue mapping for enabled traffic classes. | |
1570 | **/ | |
1571 | static void i40e_vsi_setup_queue_map(struct i40e_vsi *vsi, | |
1572 | struct i40e_vsi_context *ctxt, | |
1573 | u8 enabled_tc, | |
1574 | bool is_add) | |
1575 | { | |
1576 | struct i40e_pf *pf = vsi->back; | |
1577 | u16 sections = 0; | |
1578 | u8 netdev_tc = 0; | |
1579 | u16 numtc = 0; | |
1580 | u16 qcount; | |
1581 | u8 offset; | |
1582 | u16 qmap; | |
1583 | int i; | |
4e3b35b0 | 1584 | u16 num_tc_qps = 0; |
41c445ff JB |
1585 | |
1586 | sections = I40E_AQ_VSI_PROP_QUEUE_MAP_VALID; | |
1587 | offset = 0; | |
1588 | ||
1589 | if (enabled_tc && (vsi->back->flags & I40E_FLAG_DCB_ENABLED)) { | |
1590 | /* Find numtc from enabled TC bitmap */ | |
1591 | for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) { | |
75f5cea9 | 1592 | if (enabled_tc & BIT(i)) /* TC is enabled */ |
41c445ff JB |
1593 | numtc++; |
1594 | } | |
1595 | if (!numtc) { | |
1596 | dev_warn(&pf->pdev->dev, "DCB is enabled but no TC enabled, forcing TC0\n"); | |
1597 | numtc = 1; | |
1598 | } | |
1599 | } else { | |
1600 | /* At least TC0 is enabled in case of non-DCB case */ | |
1601 | numtc = 1; | |
1602 | } | |
1603 | ||
1604 | vsi->tc_config.numtc = numtc; | |
1605 | vsi->tc_config.enabled_tc = enabled_tc ? enabled_tc : 1; | |
4e3b35b0 | 1606 | /* Number of queues per enabled TC */ |
7d64402f CS |
1607 | qcount = vsi->alloc_queue_pairs; |
1608 | ||
7f9ff476 | 1609 | num_tc_qps = qcount / numtc; |
e25d00b8 | 1610 | num_tc_qps = min_t(int, num_tc_qps, i40e_pf_get_max_q_per_tc(pf)); |
41c445ff JB |
1611 | |
1612 | /* Setup queue offset/count for all TCs for given VSI */ | |
1613 | for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) { | |
1614 | /* See if the given TC is enabled for the given VSI */ | |
75f5cea9 | 1615 | if (vsi->tc_config.enabled_tc & BIT(i)) { |
41a1d04b | 1616 | /* TC is enabled */ |
41c445ff JB |
1617 | int pow, num_qps; |
1618 | ||
41c445ff JB |
1619 | switch (vsi->type) { |
1620 | case I40E_VSI_MAIN: | |
acd65448 HZ |
1621 | qcount = min_t(int, pf->alloc_rss_size, |
1622 | num_tc_qps); | |
41c445ff JB |
1623 | break; |
1624 | case I40E_VSI_FDIR: | |
1625 | case I40E_VSI_SRIOV: | |
1626 | case I40E_VSI_VMDQ2: | |
1627 | default: | |
4e3b35b0 | 1628 | qcount = num_tc_qps; |
41c445ff JB |
1629 | WARN_ON(i != 0); |
1630 | break; | |
1631 | } | |
4e3b35b0 NP |
1632 | vsi->tc_config.tc_info[i].qoffset = offset; |
1633 | vsi->tc_config.tc_info[i].qcount = qcount; | |
41c445ff | 1634 | |
1e200e4a | 1635 | /* find the next higher power-of-2 of num queue pairs */ |
4e3b35b0 | 1636 | num_qps = qcount; |
41c445ff | 1637 | pow = 0; |
41a1d04b | 1638 | while (num_qps && (BIT_ULL(pow) < qcount)) { |
41c445ff JB |
1639 | pow++; |
1640 | num_qps >>= 1; | |
1641 | } | |
1642 | ||
1643 | vsi->tc_config.tc_info[i].netdev_tc = netdev_tc++; | |
1644 | qmap = | |
1645 | (offset << I40E_AQ_VSI_TC_QUE_OFFSET_SHIFT) | | |
1646 | (pow << I40E_AQ_VSI_TC_QUE_NUMBER_SHIFT); | |
1647 | ||
4e3b35b0 | 1648 | offset += qcount; |
41c445ff JB |
1649 | } else { |
1650 | /* TC is not enabled so set the offset to | |
1651 | * default queue and allocate one queue | |
1652 | * for the given TC. | |
1653 | */ | |
1654 | vsi->tc_config.tc_info[i].qoffset = 0; | |
1655 | vsi->tc_config.tc_info[i].qcount = 1; | |
1656 | vsi->tc_config.tc_info[i].netdev_tc = 0; | |
1657 | ||
1658 | qmap = 0; | |
1659 | } | |
1660 | ctxt->info.tc_mapping[i] = cpu_to_le16(qmap); | |
1661 | } | |
1662 | ||
1663 | /* Set actual Tx/Rx queue pairs */ | |
1664 | vsi->num_queue_pairs = offset; | |
9a3bd2f1 ASJ |
1665 | if ((vsi->type == I40E_VSI_MAIN) && (numtc == 1)) { |
1666 | if (vsi->req_queue_pairs > 0) | |
1667 | vsi->num_queue_pairs = vsi->req_queue_pairs; | |
26cdc443 | 1668 | else if (pf->flags & I40E_FLAG_MSIX_ENABLED) |
9a3bd2f1 ASJ |
1669 | vsi->num_queue_pairs = pf->num_lan_msix; |
1670 | } | |
41c445ff JB |
1671 | |
1672 | /* Scheduler section valid can only be set for ADD VSI */ | |
1673 | if (is_add) { | |
1674 | sections |= I40E_AQ_VSI_PROP_SCHED_VALID; | |
1675 | ||
1676 | ctxt->info.up_enable_bits = enabled_tc; | |
1677 | } | |
1678 | if (vsi->type == I40E_VSI_SRIOV) { | |
1679 | ctxt->info.mapping_flags |= | |
1680 | cpu_to_le16(I40E_AQ_VSI_QUE_MAP_NONCONTIG); | |
1681 | for (i = 0; i < vsi->num_queue_pairs; i++) | |
1682 | ctxt->info.queue_mapping[i] = | |
1683 | cpu_to_le16(vsi->base_queue + i); | |
1684 | } else { | |
1685 | ctxt->info.mapping_flags |= | |
1686 | cpu_to_le16(I40E_AQ_VSI_QUE_MAP_CONTIG); | |
1687 | ctxt->info.queue_mapping[0] = cpu_to_le16(vsi->base_queue); | |
1688 | } | |
1689 | ctxt->info.valid_sections |= cpu_to_le16(sections); | |
1690 | } | |
1691 | ||
6622f5cd JK |
1692 | /** |
1693 | * i40e_addr_sync - Callback for dev_(mc|uc)_sync to add address | |
1694 | * @netdev: the netdevice | |
1695 | * @addr: address to add | |
1696 | * | |
1697 | * Called by __dev_(mc|uc)_sync when an address needs to be added. We call | |
1698 | * __dev_(uc|mc)_sync from .set_rx_mode and guarantee to hold the hash lock. | |
1699 | */ | |
1700 | static int i40e_addr_sync(struct net_device *netdev, const u8 *addr) | |
1701 | { | |
1702 | struct i40e_netdev_priv *np = netdev_priv(netdev); | |
1703 | struct i40e_vsi *vsi = np->vsi; | |
6622f5cd | 1704 | |
feffdbe4 | 1705 | if (i40e_add_mac_filter(vsi, addr)) |
6622f5cd JK |
1706 | return 0; |
1707 | else | |
1708 | return -ENOMEM; | |
1709 | } | |
1710 | ||
1711 | /** | |
1712 | * i40e_addr_unsync - Callback for dev_(mc|uc)_sync to remove address | |
1713 | * @netdev: the netdevice | |
1714 | * @addr: address to add | |
1715 | * | |
1716 | * Called by __dev_(mc|uc)_sync when an address needs to be removed. We call | |
1717 | * __dev_(uc|mc)_sync from .set_rx_mode and guarantee to hold the hash lock. | |
1718 | */ | |
1719 | static int i40e_addr_unsync(struct net_device *netdev, const u8 *addr) | |
1720 | { | |
1721 | struct i40e_netdev_priv *np = netdev_priv(netdev); | |
1722 | struct i40e_vsi *vsi = np->vsi; | |
1723 | ||
feffdbe4 | 1724 | i40e_del_mac_filter(vsi, addr); |
6622f5cd JK |
1725 | |
1726 | return 0; | |
1727 | } | |
1728 | ||
41c445ff JB |
1729 | /** |
1730 | * i40e_set_rx_mode - NDO callback to set the netdev filters | |
1731 | * @netdev: network interface device structure | |
1732 | **/ | |
1733 | static void i40e_set_rx_mode(struct net_device *netdev) | |
1734 | { | |
1735 | struct i40e_netdev_priv *np = netdev_priv(netdev); | |
41c445ff | 1736 | struct i40e_vsi *vsi = np->vsi; |
41c445ff | 1737 | |
278e7d0b | 1738 | spin_lock_bh(&vsi->mac_filter_hash_lock); |
21659035 | 1739 | |
6622f5cd JK |
1740 | __dev_uc_sync(netdev, i40e_addr_sync, i40e_addr_unsync); |
1741 | __dev_mc_sync(netdev, i40e_addr_sync, i40e_addr_unsync); | |
41c445ff | 1742 | |
278e7d0b | 1743 | spin_unlock_bh(&vsi->mac_filter_hash_lock); |
41c445ff JB |
1744 | |
1745 | /* check for other flag changes */ | |
1746 | if (vsi->current_netdev_flags != vsi->netdev->flags) { | |
1747 | vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED; | |
1748 | vsi->back->flags |= I40E_FLAG_FILTER_SYNC; | |
1749 | } | |
c53934c6 JB |
1750 | |
1751 | /* schedule our worker thread which will take care of | |
1752 | * applying the new filter changes | |
1753 | */ | |
1754 | i40e_service_event_schedule(vsi->back); | |
41c445ff JB |
1755 | } |
1756 | ||
21659035 | 1757 | /** |
671889e6 | 1758 | * i40e_undo_del_filter_entries - Undo the changes made to MAC filter entries |
4a2ce27b | 1759 | * @vsi: Pointer to VSI struct |
21659035 KP |
1760 | * @from: Pointer to list which contains MAC filter entries - changes to |
1761 | * those entries needs to be undone. | |
1762 | * | |
671889e6 | 1763 | * MAC filter entries from this list were slated for deletion. |
21659035 | 1764 | **/ |
671889e6 JK |
1765 | static void i40e_undo_del_filter_entries(struct i40e_vsi *vsi, |
1766 | struct hlist_head *from) | |
21659035 | 1767 | { |
278e7d0b JK |
1768 | struct i40e_mac_filter *f; |
1769 | struct hlist_node *h; | |
1770 | ||
1771 | hlist_for_each_entry_safe(f, h, from, hlist) { | |
1772 | u64 key = i40e_addr_to_hkey(f->macaddr); | |
21659035 | 1773 | |
21659035 | 1774 | /* Move the element back into MAC filter list*/ |
278e7d0b JK |
1775 | hlist_del(&f->hlist); |
1776 | hash_add(vsi->mac_filter_hash, &f->hlist, key); | |
21659035 KP |
1777 | } |
1778 | } | |
1779 | ||
671889e6 JK |
1780 | /** |
1781 | * i40e_undo_add_filter_entries - Undo the changes made to MAC filter entries | |
1782 | * @vsi: Pointer to vsi struct | |
1783 | * @from: Pointer to list which contains MAC filter entries - changes to | |
1784 | * those entries needs to be undone. | |
1785 | * | |
1786 | * MAC filter entries from this list were slated for addition. | |
1787 | **/ | |
1788 | static void i40e_undo_add_filter_entries(struct i40e_vsi *vsi, | |
1789 | struct hlist_head *from) | |
1790 | { | |
1791 | struct i40e_new_mac_filter *new; | |
1792 | struct hlist_node *h; | |
1793 | ||
1794 | hlist_for_each_entry_safe(new, h, from, hlist) { | |
1795 | /* We can simply free the wrapper structure */ | |
1796 | hlist_del(&new->hlist); | |
1797 | kfree(new); | |
1798 | } | |
1799 | } | |
1800 | ||
d88d40b0 JK |
1801 | /** |
1802 | * i40e_next_entry - Get the next non-broadcast filter from a list | |
671889e6 | 1803 | * @next: pointer to filter in list |
d88d40b0 JK |
1804 | * |
1805 | * Returns the next non-broadcast filter in the list. Required so that we | |
1806 | * ignore broadcast filters within the list, since these are not handled via | |
1807 | * the normal firmware update path. | |
1808 | */ | |
671889e6 JK |
1809 | static |
1810 | struct i40e_new_mac_filter *i40e_next_filter(struct i40e_new_mac_filter *next) | |
d88d40b0 | 1811 | { |
584a8870 JK |
1812 | hlist_for_each_entry_continue(next, hlist) { |
1813 | if (!is_broadcast_ether_addr(next->f->macaddr)) | |
1814 | return next; | |
d88d40b0 JK |
1815 | } |
1816 | ||
584a8870 | 1817 | return NULL; |
d88d40b0 JK |
1818 | } |
1819 | ||
21659035 | 1820 | /** |
c3c7ea27 MW |
1821 | * i40e_update_filter_state - Update filter state based on return data |
1822 | * from firmware | |
1823 | * @count: Number of filters added | |
1824 | * @add_list: return data from fw | |
1825 | * @head: pointer to first filter in current batch | |
21659035 | 1826 | * |
c3c7ea27 MW |
1827 | * MAC filter entries from list were slated to be added to device. Returns |
1828 | * number of successful filters. Note that 0 does NOT mean success! | |
21659035 | 1829 | **/ |
c3c7ea27 MW |
1830 | static int |
1831 | i40e_update_filter_state(int count, | |
1832 | struct i40e_aqc_add_macvlan_element_data *add_list, | |
671889e6 | 1833 | struct i40e_new_mac_filter *add_head) |
21659035 | 1834 | { |
c3c7ea27 MW |
1835 | int retval = 0; |
1836 | int i; | |
21659035 | 1837 | |
ac9e2390 JK |
1838 | for (i = 0; i < count; i++) { |
1839 | /* Always check status of each filter. We don't need to check | |
1840 | * the firmware return status because we pre-set the filter | |
1841 | * status to I40E_AQC_MM_ERR_NO_RES when sending the filter | |
1842 | * request to the adminq. Thus, if it no longer matches then | |
1843 | * we know the filter is active. | |
c3c7ea27 | 1844 | */ |
ac9e2390 | 1845 | if (add_list[i].match_method == I40E_AQC_MM_ERR_NO_RES) { |
c3c7ea27 | 1846 | add_head->state = I40E_FILTER_FAILED; |
ac9e2390 JK |
1847 | } else { |
1848 | add_head->state = I40E_FILTER_ACTIVE; | |
1849 | retval++; | |
c3c7ea27 | 1850 | } |
ac9e2390 | 1851 | |
d88d40b0 JK |
1852 | add_head = i40e_next_filter(add_head); |
1853 | if (!add_head) | |
1854 | break; | |
21659035 | 1855 | } |
ac9e2390 | 1856 | |
c3c7ea27 | 1857 | return retval; |
21659035 KP |
1858 | } |
1859 | ||
00936319 JK |
1860 | /** |
1861 | * i40e_aqc_del_filters - Request firmware to delete a set of filters | |
1862 | * @vsi: ptr to the VSI | |
1863 | * @vsi_name: name to display in messages | |
1864 | * @list: the list of filters to send to firmware | |
1865 | * @num_del: the number of filters to delete | |
1866 | * @retval: Set to -EIO on failure to delete | |
1867 | * | |
1868 | * Send a request to firmware via AdminQ to delete a set of filters. Uses | |
1869 | * *retval instead of a return value so that success does not force ret_val to | |
1870 | * be set to 0. This ensures that a sequence of calls to this function | |
1871 | * preserve the previous value of *retval on successful delete. | |
1872 | */ | |
1873 | static | |
1874 | void i40e_aqc_del_filters(struct i40e_vsi *vsi, const char *vsi_name, | |
1875 | struct i40e_aqc_remove_macvlan_element_data *list, | |
1876 | int num_del, int *retval) | |
1877 | { | |
1878 | struct i40e_hw *hw = &vsi->back->hw; | |
1879 | i40e_status aq_ret; | |
1880 | int aq_err; | |
1881 | ||
1882 | aq_ret = i40e_aq_remove_macvlan(hw, vsi->seid, list, num_del, NULL); | |
1883 | aq_err = hw->aq.asq_last_status; | |
1884 | ||
1885 | /* Explicitly ignore and do not report when firmware returns ENOENT */ | |
1886 | if (aq_ret && !(aq_err == I40E_AQ_RC_ENOENT)) { | |
1887 | *retval = -EIO; | |
1888 | dev_info(&vsi->back->pdev->dev, | |
1889 | "ignoring delete macvlan error on %s, err %s, aq_err %s\n", | |
1890 | vsi_name, i40e_stat_str(hw, aq_ret), | |
1891 | i40e_aq_str(hw, aq_err)); | |
1892 | } | |
1893 | } | |
1894 | ||
1895 | /** | |
1896 | * i40e_aqc_add_filters - Request firmware to add a set of filters | |
1897 | * @vsi: ptr to the VSI | |
1898 | * @vsi_name: name to display in messages | |
1899 | * @list: the list of filters to send to firmware | |
1900 | * @add_head: Position in the add hlist | |
1901 | * @num_add: the number of filters to add | |
1902 | * @promisc_change: set to true on exit if promiscuous mode was forced on | |
1903 | * | |
1904 | * Send a request to firmware via AdminQ to add a chunk of filters. Will set | |
1905 | * promisc_changed to true if the firmware has run out of space for more | |
1906 | * filters. | |
1907 | */ | |
1908 | static | |
1909 | void i40e_aqc_add_filters(struct i40e_vsi *vsi, const char *vsi_name, | |
1910 | struct i40e_aqc_add_macvlan_element_data *list, | |
671889e6 | 1911 | struct i40e_new_mac_filter *add_head, |
00936319 JK |
1912 | int num_add, bool *promisc_changed) |
1913 | { | |
1914 | struct i40e_hw *hw = &vsi->back->hw; | |
00936319 JK |
1915 | int aq_err, fcnt; |
1916 | ||
ac9e2390 | 1917 | i40e_aq_add_macvlan(hw, vsi->seid, list, num_add, NULL); |
00936319 | 1918 | aq_err = hw->aq.asq_last_status; |
ac9e2390 | 1919 | fcnt = i40e_update_filter_state(num_add, list, add_head); |
00936319 JK |
1920 | |
1921 | if (fcnt != num_add) { | |
1922 | *promisc_changed = true; | |
d19cb64b | 1923 | set_bit(__I40E_VSI_OVERFLOW_PROMISC, &vsi->state); |
00936319 JK |
1924 | dev_warn(&vsi->back->pdev->dev, |
1925 | "Error %s adding RX filters on %s, promiscuous mode forced on\n", | |
1926 | i40e_aq_str(hw, aq_err), | |
1927 | vsi_name); | |
1928 | } | |
1929 | } | |
1930 | ||
435c084a JK |
1931 | /** |
1932 | * i40e_aqc_broadcast_filter - Set promiscuous broadcast flags | |
1933 | * @vsi: pointer to the VSI | |
1934 | * @f: filter data | |
1935 | * | |
1936 | * This function sets or clears the promiscuous broadcast flags for VLAN | |
1937 | * filters in order to properly receive broadcast frames. Assumes that only | |
1938 | * broadcast filters are passed. | |
671889e6 JK |
1939 | * |
1940 | * Returns status indicating success or failure; | |
435c084a | 1941 | **/ |
671889e6 JK |
1942 | static i40e_status |
1943 | i40e_aqc_broadcast_filter(struct i40e_vsi *vsi, const char *vsi_name, | |
1944 | struct i40e_mac_filter *f) | |
435c084a JK |
1945 | { |
1946 | bool enable = f->state == I40E_FILTER_NEW; | |
1947 | struct i40e_hw *hw = &vsi->back->hw; | |
1948 | i40e_status aq_ret; | |
1949 | ||
1950 | if (f->vlan == I40E_VLAN_ANY) { | |
1951 | aq_ret = i40e_aq_set_vsi_broadcast(hw, | |
1952 | vsi->seid, | |
1953 | enable, | |
1954 | NULL); | |
1955 | } else { | |
1956 | aq_ret = i40e_aq_set_vsi_bc_promisc_on_vlan(hw, | |
1957 | vsi->seid, | |
1958 | enable, | |
1959 | f->vlan, | |
1960 | NULL); | |
1961 | } | |
1962 | ||
671889e6 | 1963 | if (aq_ret) |
435c084a JK |
1964 | dev_warn(&vsi->back->pdev->dev, |
1965 | "Error %s setting broadcast promiscuous mode on %s\n", | |
1966 | i40e_aq_str(hw, hw->aq.asq_last_status), | |
1967 | vsi_name); | |
671889e6 JK |
1968 | |
1969 | return aq_ret; | |
435c084a JK |
1970 | } |
1971 | ||
41c445ff JB |
1972 | /** |
1973 | * i40e_sync_vsi_filters - Update the VSI filter list to the HW | |
1974 | * @vsi: ptr to the VSI | |
1975 | * | |
1976 | * Push any outstanding VSI filter changes through the AdminQ. | |
1977 | * | |
1978 | * Returns 0 or error value | |
1979 | **/ | |
17652c63 | 1980 | int i40e_sync_vsi_filters(struct i40e_vsi *vsi) |
41c445ff | 1981 | { |
278e7d0b | 1982 | struct hlist_head tmp_add_list, tmp_del_list; |
671889e6 JK |
1983 | struct i40e_mac_filter *f; |
1984 | struct i40e_new_mac_filter *new, *add_head = NULL; | |
3e25a8f3 | 1985 | struct i40e_hw *hw = &vsi->back->hw; |
38326218 | 1986 | unsigned int failed_filters = 0; |
84f5ca6c | 1987 | unsigned int vlan_filters = 0; |
c3c7ea27 | 1988 | bool promisc_changed = false; |
2d1de828 | 1989 | char vsi_name[16] = "PF"; |
41c445ff | 1990 | int filter_list_len = 0; |
ea02e90b | 1991 | i40e_status aq_ret = 0; |
84f5ca6c | 1992 | u32 changed_flags = 0; |
278e7d0b | 1993 | struct hlist_node *h; |
41c445ff JB |
1994 | struct i40e_pf *pf; |
1995 | int num_add = 0; | |
1996 | int num_del = 0; | |
84f5ca6c | 1997 | int retval = 0; |
41c445ff | 1998 | u16 cmd_flags; |
c3c7ea27 | 1999 | int list_size; |
278e7d0b | 2000 | int bkt; |
41c445ff JB |
2001 | |
2002 | /* empty array typed pointers, kcalloc later */ | |
2003 | struct i40e_aqc_add_macvlan_element_data *add_list; | |
2004 | struct i40e_aqc_remove_macvlan_element_data *del_list; | |
2005 | ||
d19cb64b | 2006 | while (test_and_set_bit(__I40E_VSI_SYNCING_FILTERS, &vsi->state)) |
41c445ff JB |
2007 | usleep_range(1000, 2000); |
2008 | pf = vsi->back; | |
2009 | ||
2010 | if (vsi->netdev) { | |
2011 | changed_flags = vsi->current_netdev_flags ^ vsi->netdev->flags; | |
2012 | vsi->current_netdev_flags = vsi->netdev->flags; | |
2013 | } | |
2014 | ||
278e7d0b JK |
2015 | INIT_HLIST_HEAD(&tmp_add_list); |
2016 | INIT_HLIST_HEAD(&tmp_del_list); | |
21659035 | 2017 | |
2d1de828 SN |
2018 | if (vsi->type == I40E_VSI_SRIOV) |
2019 | snprintf(vsi_name, sizeof(vsi_name) - 1, "VF %d", vsi->vf_id); | |
2020 | else if (vsi->type != I40E_VSI_MAIN) | |
2021 | snprintf(vsi_name, sizeof(vsi_name) - 1, "vsi %d", vsi->seid); | |
2022 | ||
41c445ff JB |
2023 | if (vsi->flags & I40E_VSI_FLAG_FILTER_CHANGED) { |
2024 | vsi->flags &= ~I40E_VSI_FLAG_FILTER_CHANGED; | |
2025 | ||
278e7d0b | 2026 | spin_lock_bh(&vsi->mac_filter_hash_lock); |
c3c7ea27 | 2027 | /* Create a list of filters to delete. */ |
278e7d0b | 2028 | hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist) { |
c3c7ea27 | 2029 | if (f->state == I40E_FILTER_REMOVE) { |
c3c7ea27 | 2030 | /* Move the element into temporary del_list */ |
278e7d0b JK |
2031 | hash_del(&f->hlist); |
2032 | hlist_add_head(&f->hlist, &tmp_del_list); | |
84f5ca6c AB |
2033 | |
2034 | /* Avoid counting removed filters */ | |
2035 | continue; | |
c3c7ea27 MW |
2036 | } |
2037 | if (f->state == I40E_FILTER_NEW) { | |
671889e6 JK |
2038 | /* Create a temporary i40e_new_mac_filter */ |
2039 | new = kzalloc(sizeof(*new), GFP_ATOMIC); | |
2040 | if (!new) | |
2041 | goto err_no_memory_locked; | |
2042 | ||
2043 | /* Store pointer to the real filter */ | |
2044 | new->f = f; | |
2045 | new->state = f->state; | |
2046 | ||
2047 | /* Add it to the hash list */ | |
2048 | hlist_add_head(&new->hlist, &tmp_add_list); | |
21659035 | 2049 | } |
84f5ca6c | 2050 | |
489a3265 JK |
2051 | /* Count the number of active (current and new) VLAN |
2052 | * filters we have now. Does not count filters which | |
2053 | * are marked for deletion. | |
84f5ca6c AB |
2054 | */ |
2055 | if (f->vlan > 0) | |
2056 | vlan_filters++; | |
84f5ca6c AB |
2057 | } |
2058 | ||
489a3265 JK |
2059 | retval = i40e_correct_mac_vlan_filters(vsi, |
2060 | &tmp_add_list, | |
2061 | &tmp_del_list, | |
2062 | vlan_filters); | |
2063 | if (retval) | |
2064 | goto err_no_memory_locked; | |
84f5ca6c | 2065 | |
278e7d0b | 2066 | spin_unlock_bh(&vsi->mac_filter_hash_lock); |
21659035 KP |
2067 | } |
2068 | ||
2069 | /* Now process 'del_list' outside the lock */ | |
278e7d0b | 2070 | if (!hlist_empty(&tmp_del_list)) { |
3e25a8f3 | 2071 | filter_list_len = hw->aq.asq_buf_size / |
21659035 | 2072 | sizeof(struct i40e_aqc_remove_macvlan_element_data); |
c3c7ea27 | 2073 | list_size = filter_list_len * |
f1199998 | 2074 | sizeof(struct i40e_aqc_remove_macvlan_element_data); |
c3c7ea27 | 2075 | del_list = kzalloc(list_size, GFP_ATOMIC); |
4a2ce27b JK |
2076 | if (!del_list) |
2077 | goto err_no_memory; | |
21659035 | 2078 | |
278e7d0b | 2079 | hlist_for_each_entry_safe(f, h, &tmp_del_list, hlist) { |
41c445ff JB |
2080 | cmd_flags = 0; |
2081 | ||
435c084a | 2082 | /* handle broadcast filters by updating the broadcast |
d88d40b0 | 2083 | * promiscuous flag and release filter list. |
435c084a JK |
2084 | */ |
2085 | if (is_broadcast_ether_addr(f->macaddr)) { | |
2086 | i40e_aqc_broadcast_filter(vsi, vsi_name, f); | |
2087 | ||
2088 | hlist_del(&f->hlist); | |
2089 | kfree(f); | |
2090 | continue; | |
2091 | } | |
2092 | ||
41c445ff | 2093 | /* add to delete list */ |
9a173901 | 2094 | ether_addr_copy(del_list[num_del].mac_addr, f->macaddr); |
c3c7ea27 MW |
2095 | if (f->vlan == I40E_VLAN_ANY) { |
2096 | del_list[num_del].vlan_tag = 0; | |
a6cb9146 | 2097 | cmd_flags |= I40E_AQC_MACVLAN_DEL_IGNORE_VLAN; |
c3c7ea27 MW |
2098 | } else { |
2099 | del_list[num_del].vlan_tag = | |
2100 | cpu_to_le16((u16)(f->vlan)); | |
2101 | } | |
41c445ff | 2102 | |
41c445ff JB |
2103 | cmd_flags |= I40E_AQC_MACVLAN_DEL_PERFECT_MATCH; |
2104 | del_list[num_del].flags = cmd_flags; | |
2105 | num_del++; | |
2106 | ||
41c445ff JB |
2107 | /* flush a full buffer */ |
2108 | if (num_del == filter_list_len) { | |
00936319 JK |
2109 | i40e_aqc_del_filters(vsi, vsi_name, del_list, |
2110 | num_del, &retval); | |
c3c7ea27 | 2111 | memset(del_list, 0, list_size); |
00936319 | 2112 | num_del = 0; |
41c445ff | 2113 | } |
21659035 KP |
2114 | /* Release memory for MAC filter entries which were |
2115 | * synced up with HW. | |
2116 | */ | |
278e7d0b | 2117 | hlist_del(&f->hlist); |
21659035 | 2118 | kfree(f); |
41c445ff | 2119 | } |
21659035 | 2120 | |
41c445ff | 2121 | if (num_del) { |
00936319 JK |
2122 | i40e_aqc_del_filters(vsi, vsi_name, del_list, |
2123 | num_del, &retval); | |
41c445ff JB |
2124 | } |
2125 | ||
2126 | kfree(del_list); | |
2127 | del_list = NULL; | |
21659035 KP |
2128 | } |
2129 | ||
278e7d0b | 2130 | if (!hlist_empty(&tmp_add_list)) { |
c3c7ea27 | 2131 | /* Do all the adds now. */ |
3e25a8f3 | 2132 | filter_list_len = hw->aq.asq_buf_size / |
f1199998 | 2133 | sizeof(struct i40e_aqc_add_macvlan_element_data); |
c3c7ea27 MW |
2134 | list_size = filter_list_len * |
2135 | sizeof(struct i40e_aqc_add_macvlan_element_data); | |
2136 | add_list = kzalloc(list_size, GFP_ATOMIC); | |
4a2ce27b JK |
2137 | if (!add_list) |
2138 | goto err_no_memory; | |
2139 | ||
c3c7ea27 | 2140 | num_add = 0; |
671889e6 | 2141 | hlist_for_each_entry_safe(new, h, &tmp_add_list, hlist) { |
d19cb64b | 2142 | if (test_bit(__I40E_VSI_OVERFLOW_PROMISC, |
c3c7ea27 | 2143 | &vsi->state)) { |
671889e6 | 2144 | new->state = I40E_FILTER_FAILED; |
c3c7ea27 MW |
2145 | continue; |
2146 | } | |
435c084a JK |
2147 | |
2148 | /* handle broadcast filters by updating the broadcast | |
2149 | * promiscuous flag instead of adding a MAC filter. | |
2150 | */ | |
671889e6 JK |
2151 | if (is_broadcast_ether_addr(new->f->macaddr)) { |
2152 | if (i40e_aqc_broadcast_filter(vsi, vsi_name, | |
2153 | new->f)) | |
2154 | new->state = I40E_FILTER_FAILED; | |
2155 | else | |
2156 | new->state = I40E_FILTER_ACTIVE; | |
435c084a JK |
2157 | continue; |
2158 | } | |
2159 | ||
41c445ff | 2160 | /* add to add array */ |
c3c7ea27 | 2161 | if (num_add == 0) |
671889e6 | 2162 | add_head = new; |
c3c7ea27 | 2163 | cmd_flags = 0; |
671889e6 JK |
2164 | ether_addr_copy(add_list[num_add].mac_addr, |
2165 | new->f->macaddr); | |
2166 | if (new->f->vlan == I40E_VLAN_ANY) { | |
c3c7ea27 MW |
2167 | add_list[num_add].vlan_tag = 0; |
2168 | cmd_flags |= I40E_AQC_MACVLAN_ADD_IGNORE_VLAN; | |
2169 | } else { | |
2170 | add_list[num_add].vlan_tag = | |
671889e6 | 2171 | cpu_to_le16((u16)(new->f->vlan)); |
c3c7ea27 | 2172 | } |
41c445ff | 2173 | add_list[num_add].queue_number = 0; |
ac9e2390 | 2174 | /* set invalid match method for later detection */ |
0266ac45 | 2175 | add_list[num_add].match_method = I40E_AQC_MM_ERR_NO_RES; |
41c445ff | 2176 | cmd_flags |= I40E_AQC_MACVLAN_ADD_PERFECT_MATCH; |
41c445ff JB |
2177 | add_list[num_add].flags = cpu_to_le16(cmd_flags); |
2178 | num_add++; | |
2179 | ||
2180 | /* flush a full buffer */ | |
2181 | if (num_add == filter_list_len) { | |
00936319 JK |
2182 | i40e_aqc_add_filters(vsi, vsi_name, add_list, |
2183 | add_head, num_add, | |
2184 | &promisc_changed); | |
c3c7ea27 | 2185 | memset(add_list, 0, list_size); |
41c445ff | 2186 | num_add = 0; |
41c445ff JB |
2187 | } |
2188 | } | |
2189 | if (num_add) { | |
00936319 JK |
2190 | i40e_aqc_add_filters(vsi, vsi_name, add_list, add_head, |
2191 | num_add, &promisc_changed); | |
41c445ff | 2192 | } |
c3c7ea27 MW |
2193 | /* Now move all of the filters from the temp add list back to |
2194 | * the VSI's list. | |
2195 | */ | |
278e7d0b | 2196 | spin_lock_bh(&vsi->mac_filter_hash_lock); |
671889e6 JK |
2197 | hlist_for_each_entry_safe(new, h, &tmp_add_list, hlist) { |
2198 | /* Only update the state if we're still NEW */ | |
2199 | if (new->f->state == I40E_FILTER_NEW) | |
2200 | new->f->state = new->state; | |
2201 | hlist_del(&new->hlist); | |
2202 | kfree(new); | |
c3c7ea27 | 2203 | } |
278e7d0b | 2204 | spin_unlock_bh(&vsi->mac_filter_hash_lock); |
41c445ff JB |
2205 | kfree(add_list); |
2206 | add_list = NULL; | |
c3c7ea27 | 2207 | } |
41c445ff | 2208 | |
38326218 JK |
2209 | /* Determine the number of active and failed filters. */ |
2210 | spin_lock_bh(&vsi->mac_filter_hash_lock); | |
2211 | vsi->active_filters = 0; | |
2212 | hash_for_each(vsi->mac_filter_hash, bkt, f, hlist) { | |
2213 | if (f->state == I40E_FILTER_ACTIVE) | |
2214 | vsi->active_filters++; | |
2215 | else if (f->state == I40E_FILTER_FAILED) | |
2216 | failed_filters++; | |
2217 | } | |
2218 | spin_unlock_bh(&vsi->mac_filter_hash_lock); | |
2219 | ||
2220 | /* If promiscuous mode has changed, we need to calculate a new | |
2221 | * threshold for when we are safe to exit | |
2222 | */ | |
2223 | if (promisc_changed) | |
2224 | vsi->promisc_threshold = (vsi->active_filters * 3) / 4; | |
2225 | ||
2226 | /* Check if we are able to exit overflow promiscuous mode. We can | |
2227 | * safely exit if we didn't just enter, we no longer have any failed | |
2228 | * filters, and we have reduced filters below the threshold value. | |
2229 | */ | |
d19cb64b | 2230 | if (test_bit(__I40E_VSI_OVERFLOW_PROMISC, &vsi->state) && |
38326218 | 2231 | !promisc_changed && !failed_filters && |
c3c7ea27 | 2232 | (vsi->active_filters < vsi->promisc_threshold)) { |
38326218 JK |
2233 | dev_info(&pf->pdev->dev, |
2234 | "filter logjam cleared on %s, leaving overflow promiscuous mode\n", | |
2235 | vsi_name); | |
d19cb64b | 2236 | clear_bit(__I40E_VSI_OVERFLOW_PROMISC, &vsi->state); |
38326218 JK |
2237 | promisc_changed = true; |
2238 | vsi->promisc_threshold = 0; | |
41c445ff JB |
2239 | } |
2240 | ||
a856b5cb ASJ |
2241 | /* if the VF is not trusted do not do promisc */ |
2242 | if ((vsi->type == I40E_VSI_SRIOV) && !pf->vf[vsi->vf_id].trusted) { | |
d19cb64b | 2243 | clear_bit(__I40E_VSI_OVERFLOW_PROMISC, &vsi->state); |
a856b5cb ASJ |
2244 | goto out; |
2245 | } | |
2246 | ||
41c445ff JB |
2247 | /* check for changes in promiscuous modes */ |
2248 | if (changed_flags & IFF_ALLMULTI) { | |
2249 | bool cur_multipromisc; | |
6995b36c | 2250 | |
41c445ff | 2251 | cur_multipromisc = !!(vsi->current_netdev_flags & IFF_ALLMULTI); |
ea02e90b MW |
2252 | aq_ret = i40e_aq_set_vsi_multicast_promiscuous(&vsi->back->hw, |
2253 | vsi->seid, | |
2254 | cur_multipromisc, | |
2255 | NULL); | |
2256 | if (aq_ret) { | |
2257 | retval = i40e_aq_rc_to_posix(aq_ret, | |
3e25a8f3 | 2258 | hw->aq.asq_last_status); |
41c445ff | 2259 | dev_info(&pf->pdev->dev, |
2d1de828 SN |
2260 | "set multi promisc failed on %s, err %s aq_err %s\n", |
2261 | vsi_name, | |
3e25a8f3 MW |
2262 | i40e_stat_str(hw, aq_ret), |
2263 | i40e_aq_str(hw, hw->aq.asq_last_status)); | |
ea02e90b | 2264 | } |
41c445ff | 2265 | } |
c3c7ea27 MW |
2266 | if ((changed_flags & IFF_PROMISC) || |
2267 | (promisc_changed && | |
d19cb64b | 2268 | test_bit(__I40E_VSI_OVERFLOW_PROMISC, &vsi->state))) { |
41c445ff | 2269 | bool cur_promisc; |
6995b36c | 2270 | |
41c445ff | 2271 | cur_promisc = (!!(vsi->current_netdev_flags & IFF_PROMISC) || |
d19cb64b | 2272 | test_bit(__I40E_VSI_OVERFLOW_PROMISC, |
41c445ff | 2273 | &vsi->state)); |
6784ed5a ASJ |
2274 | if ((vsi->type == I40E_VSI_MAIN) && |
2275 | (pf->lan_veb != I40E_NO_VEB) && | |
2276 | !(pf->flags & I40E_FLAG_MFP_ENABLED)) { | |
92faef85 ASJ |
2277 | /* set defport ON for Main VSI instead of true promisc |
2278 | * this way we will get all unicast/multicast and VLAN | |
2279 | * promisc behavior but will not get VF or VMDq traffic | |
2280 | * replicated on the Main VSI. | |
2281 | */ | |
2282 | if (pf->cur_promisc != cur_promisc) { | |
2283 | pf->cur_promisc = cur_promisc; | |
5bc16031 MW |
2284 | if (cur_promisc) |
2285 | aq_ret = | |
2286 | i40e_aq_set_default_vsi(hw, | |
2287 | vsi->seid, | |
2288 | NULL); | |
2289 | else | |
2290 | aq_ret = | |
2291 | i40e_aq_clear_default_vsi(hw, | |
2292 | vsi->seid, | |
2293 | NULL); | |
2294 | if (aq_ret) { | |
2295 | retval = i40e_aq_rc_to_posix(aq_ret, | |
2296 | hw->aq.asq_last_status); | |
2297 | dev_info(&pf->pdev->dev, | |
2d1de828 SN |
2298 | "Set default VSI failed on %s, err %s, aq_err %s\n", |
2299 | vsi_name, | |
5bc16031 MW |
2300 | i40e_stat_str(hw, aq_ret), |
2301 | i40e_aq_str(hw, | |
2302 | hw->aq.asq_last_status)); | |
2303 | } | |
92faef85 ASJ |
2304 | } |
2305 | } else { | |
ea02e90b | 2306 | aq_ret = i40e_aq_set_vsi_unicast_promiscuous( |
3e25a8f3 | 2307 | hw, |
f1c7e72e | 2308 | vsi->seid, |
b5569892 ASJ |
2309 | cur_promisc, NULL, |
2310 | true); | |
ea02e90b MW |
2311 | if (aq_ret) { |
2312 | retval = | |
2313 | i40e_aq_rc_to_posix(aq_ret, | |
3e25a8f3 | 2314 | hw->aq.asq_last_status); |
92faef85 | 2315 | dev_info(&pf->pdev->dev, |
2d1de828 SN |
2316 | "set unicast promisc failed on %s, err %s, aq_err %s\n", |
2317 | vsi_name, | |
3e25a8f3 MW |
2318 | i40e_stat_str(hw, aq_ret), |
2319 | i40e_aq_str(hw, | |
2320 | hw->aq.asq_last_status)); | |
ea02e90b MW |
2321 | } |
2322 | aq_ret = i40e_aq_set_vsi_multicast_promiscuous( | |
3e25a8f3 | 2323 | hw, |
92faef85 ASJ |
2324 | vsi->seid, |
2325 | cur_promisc, NULL); | |
ea02e90b MW |
2326 | if (aq_ret) { |
2327 | retval = | |
2328 | i40e_aq_rc_to_posix(aq_ret, | |
3e25a8f3 | 2329 | hw->aq.asq_last_status); |
92faef85 | 2330 | dev_info(&pf->pdev->dev, |
2d1de828 SN |
2331 | "set multicast promisc failed on %s, err %s, aq_err %s\n", |
2332 | vsi_name, | |
3e25a8f3 MW |
2333 | i40e_stat_str(hw, aq_ret), |
2334 | i40e_aq_str(hw, | |
2335 | hw->aq.asq_last_status)); | |
ea02e90b | 2336 | } |
92faef85 | 2337 | } |
ea02e90b MW |
2338 | aq_ret = i40e_aq_set_vsi_broadcast(&vsi->back->hw, |
2339 | vsi->seid, | |
2340 | cur_promisc, NULL); | |
2341 | if (aq_ret) { | |
2342 | retval = i40e_aq_rc_to_posix(aq_ret, | |
2343 | pf->hw.aq.asq_last_status); | |
1a10370a | 2344 | dev_info(&pf->pdev->dev, |
f1c7e72e | 2345 | "set brdcast promisc failed, err %s, aq_err %s\n", |
3e25a8f3 MW |
2346 | i40e_stat_str(hw, aq_ret), |
2347 | i40e_aq_str(hw, | |
2348 | hw->aq.asq_last_status)); | |
ea02e90b | 2349 | } |
41c445ff | 2350 | } |
ea02e90b | 2351 | out: |
2818ccd9 JB |
2352 | /* if something went wrong then set the changed flag so we try again */ |
2353 | if (retval) | |
2354 | vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED; | |
2355 | ||
d19cb64b | 2356 | clear_bit(__I40E_VSI_SYNCING_FILTERS, &vsi->state); |
ea02e90b | 2357 | return retval; |
4a2ce27b JK |
2358 | |
2359 | err_no_memory: | |
2360 | /* Restore elements on the temporary add and delete lists */ | |
2361 | spin_lock_bh(&vsi->mac_filter_hash_lock); | |
84f5ca6c | 2362 | err_no_memory_locked: |
671889e6 JK |
2363 | i40e_undo_del_filter_entries(vsi, &tmp_del_list); |
2364 | i40e_undo_add_filter_entries(vsi, &tmp_add_list); | |
4a2ce27b JK |
2365 | spin_unlock_bh(&vsi->mac_filter_hash_lock); |
2366 | ||
2367 | vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED; | |
d19cb64b | 2368 | clear_bit(__I40E_VSI_SYNCING_FILTERS, &vsi->state); |
4a2ce27b | 2369 | return -ENOMEM; |
41c445ff JB |
2370 | } |
2371 | ||
2372 | /** | |
2373 | * i40e_sync_filters_subtask - Sync the VSI filter list with HW | |
2374 | * @pf: board private structure | |
2375 | **/ | |
2376 | static void i40e_sync_filters_subtask(struct i40e_pf *pf) | |
2377 | { | |
2378 | int v; | |
2379 | ||
2380 | if (!pf || !(pf->flags & I40E_FLAG_FILTER_SYNC)) | |
2381 | return; | |
2382 | pf->flags &= ~I40E_FLAG_FILTER_SYNC; | |
2383 | ||
505682cd | 2384 | for (v = 0; v < pf->num_alloc_vsi; v++) { |
41c445ff | 2385 | if (pf->vsi[v] && |
17652c63 JB |
2386 | (pf->vsi[v]->flags & I40E_VSI_FLAG_FILTER_CHANGED)) { |
2387 | int ret = i40e_sync_vsi_filters(pf->vsi[v]); | |
2388 | ||
2389 | if (ret) { | |
2390 | /* come back and try again later */ | |
2391 | pf->flags |= I40E_FLAG_FILTER_SYNC; | |
2392 | break; | |
2393 | } | |
2394 | } | |
41c445ff JB |
2395 | } |
2396 | } | |
2397 | ||
2398 | /** | |
2399 | * i40e_change_mtu - NDO callback to change the Maximum Transfer Unit | |
2400 | * @netdev: network interface device structure | |
2401 | * @new_mtu: new value for maximum frame size | |
2402 | * | |
2403 | * Returns 0 on success, negative on failure | |
2404 | **/ | |
2405 | static int i40e_change_mtu(struct net_device *netdev, int new_mtu) | |
2406 | { | |
2407 | struct i40e_netdev_priv *np = netdev_priv(netdev); | |
41c445ff | 2408 | struct i40e_vsi *vsi = np->vsi; |
0ef2d5af | 2409 | struct i40e_pf *pf = vsi->back; |
41c445ff | 2410 | |
41c445ff JB |
2411 | netdev_info(netdev, "changing MTU from %d to %d\n", |
2412 | netdev->mtu, new_mtu); | |
2413 | netdev->mtu = new_mtu; | |
2414 | if (netif_running(netdev)) | |
2415 | i40e_vsi_reinit_locked(vsi); | |
0ef2d5af MW |
2416 | pf->flags |= (I40E_FLAG_SERVICE_CLIENT_REQUESTED | |
2417 | I40E_FLAG_CLIENT_L2_CHANGE); | |
41c445ff JB |
2418 | return 0; |
2419 | } | |
2420 | ||
beb0dff1 JK |
2421 | /** |
2422 | * i40e_ioctl - Access the hwtstamp interface | |
2423 | * @netdev: network interface device structure | |
2424 | * @ifr: interface request data | |
2425 | * @cmd: ioctl command | |
2426 | **/ | |
2427 | int i40e_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd) | |
2428 | { | |
2429 | struct i40e_netdev_priv *np = netdev_priv(netdev); | |
2430 | struct i40e_pf *pf = np->vsi->back; | |
2431 | ||
2432 | switch (cmd) { | |
2433 | case SIOCGHWTSTAMP: | |
2434 | return i40e_ptp_get_ts_config(pf, ifr); | |
2435 | case SIOCSHWTSTAMP: | |
2436 | return i40e_ptp_set_ts_config(pf, ifr); | |
2437 | default: | |
2438 | return -EOPNOTSUPP; | |
2439 | } | |
2440 | } | |
2441 | ||
41c445ff JB |
2442 | /** |
2443 | * i40e_vlan_stripping_enable - Turn on vlan stripping for the VSI | |
2444 | * @vsi: the vsi being adjusted | |
2445 | **/ | |
2446 | void i40e_vlan_stripping_enable(struct i40e_vsi *vsi) | |
2447 | { | |
2448 | struct i40e_vsi_context ctxt; | |
2449 | i40e_status ret; | |
2450 | ||
2451 | if ((vsi->info.valid_sections & | |
2452 | cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID)) && | |
2453 | ((vsi->info.port_vlan_flags & I40E_AQ_VSI_PVLAN_MODE_MASK) == 0)) | |
2454 | return; /* already enabled */ | |
2455 | ||
2456 | vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID); | |
2457 | vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_ALL | | |
2458 | I40E_AQ_VSI_PVLAN_EMOD_STR_BOTH; | |
2459 | ||
2460 | ctxt.seid = vsi->seid; | |
1a2f6248 | 2461 | ctxt.info = vsi->info; |
41c445ff JB |
2462 | ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL); |
2463 | if (ret) { | |
2464 | dev_info(&vsi->back->pdev->dev, | |
f1c7e72e SN |
2465 | "update vlan stripping failed, err %s aq_err %s\n", |
2466 | i40e_stat_str(&vsi->back->hw, ret), | |
2467 | i40e_aq_str(&vsi->back->hw, | |
2468 | vsi->back->hw.aq.asq_last_status)); | |
41c445ff JB |
2469 | } |
2470 | } | |
2471 | ||
2472 | /** | |
2473 | * i40e_vlan_stripping_disable - Turn off vlan stripping for the VSI | |
2474 | * @vsi: the vsi being adjusted | |
2475 | **/ | |
2476 | void i40e_vlan_stripping_disable(struct i40e_vsi *vsi) | |
2477 | { | |
2478 | struct i40e_vsi_context ctxt; | |
2479 | i40e_status ret; | |
2480 | ||
2481 | if ((vsi->info.valid_sections & | |
2482 | cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID)) && | |
2483 | ((vsi->info.port_vlan_flags & I40E_AQ_VSI_PVLAN_EMOD_MASK) == | |
2484 | I40E_AQ_VSI_PVLAN_EMOD_MASK)) | |
2485 | return; /* already disabled */ | |
2486 | ||
2487 | vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID); | |
2488 | vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_ALL | | |
2489 | I40E_AQ_VSI_PVLAN_EMOD_NOTHING; | |
2490 | ||
2491 | ctxt.seid = vsi->seid; | |
1a2f6248 | 2492 | ctxt.info = vsi->info; |
41c445ff JB |
2493 | ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL); |
2494 | if (ret) { | |
2495 | dev_info(&vsi->back->pdev->dev, | |
f1c7e72e SN |
2496 | "update vlan stripping failed, err %s aq_err %s\n", |
2497 | i40e_stat_str(&vsi->back->hw, ret), | |
2498 | i40e_aq_str(&vsi->back->hw, | |
2499 | vsi->back->hw.aq.asq_last_status)); | |
41c445ff JB |
2500 | } |
2501 | } | |
2502 | ||
2503 | /** | |
2504 | * i40e_vlan_rx_register - Setup or shutdown vlan offload | |
2505 | * @netdev: network interface to be adjusted | |
2506 | * @features: netdev features to test if VLAN offload is enabled or not | |
2507 | **/ | |
2508 | static void i40e_vlan_rx_register(struct net_device *netdev, u32 features) | |
2509 | { | |
2510 | struct i40e_netdev_priv *np = netdev_priv(netdev); | |
2511 | struct i40e_vsi *vsi = np->vsi; | |
2512 | ||
2513 | if (features & NETIF_F_HW_VLAN_CTAG_RX) | |
2514 | i40e_vlan_stripping_enable(vsi); | |
2515 | else | |
2516 | i40e_vlan_stripping_disable(vsi); | |
2517 | } | |
2518 | ||
2519 | /** | |
490a4ad3 | 2520 | * i40e_add_vlan_all_mac - Add a MAC/VLAN filter for each existing MAC address |
41c445ff JB |
2521 | * @vsi: the vsi being configured |
2522 | * @vid: vlan id to be added (0 = untagged only , -1 = any) | |
490a4ad3 JK |
2523 | * |
2524 | * This is a helper function for adding a new MAC/VLAN filter with the | |
2525 | * specified VLAN for each existing MAC address already in the hash table. | |
2526 | * This function does *not* perform any accounting to update filters based on | |
2527 | * VLAN mode. | |
2528 | * | |
2529 | * NOTE: this function expects to be called while under the | |
2530 | * mac_filter_hash_lock | |
41c445ff | 2531 | **/ |
9af52f60 | 2532 | int i40e_add_vlan_all_mac(struct i40e_vsi *vsi, s16 vid) |
41c445ff | 2533 | { |
490a4ad3 | 2534 | struct i40e_mac_filter *f, *add_f; |
278e7d0b JK |
2535 | struct hlist_node *h; |
2536 | int bkt; | |
41c445ff | 2537 | |
278e7d0b | 2538 | hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist) { |
57b341d6 JK |
2539 | if (f->state == I40E_FILTER_REMOVE) |
2540 | continue; | |
1bc87e80 | 2541 | add_f = i40e_add_filter(vsi, f->macaddr, vid); |
41c445ff JB |
2542 | if (!add_f) { |
2543 | dev_info(&vsi->back->pdev->dev, | |
2544 | "Could not add vlan filter %d for %pM\n", | |
2545 | vid, f->macaddr); | |
2546 | return -ENOMEM; | |
2547 | } | |
2548 | } | |
2549 | ||
490a4ad3 JK |
2550 | return 0; |
2551 | } | |
2552 | ||
2553 | /** | |
2554 | * i40e_vsi_add_vlan - Add VSI membership for given VLAN | |
2555 | * @vsi: the VSI being configured | |
f94484b7 | 2556 | * @vid: VLAN id to be added |
490a4ad3 | 2557 | **/ |
f94484b7 | 2558 | int i40e_vsi_add_vlan(struct i40e_vsi *vsi, u16 vid) |
490a4ad3 | 2559 | { |
489a3265 | 2560 | int err; |
490a4ad3 | 2561 | |
f94484b7 JK |
2562 | if (!vid || vsi->info.pvid) |
2563 | return -EINVAL; | |
2564 | ||
490a4ad3 JK |
2565 | /* Locked once because all functions invoked below iterates list*/ |
2566 | spin_lock_bh(&vsi->mac_filter_hash_lock); | |
490a4ad3 | 2567 | err = i40e_add_vlan_all_mac(vsi, vid); |
278e7d0b | 2568 | spin_unlock_bh(&vsi->mac_filter_hash_lock); |
489a3265 JK |
2569 | if (err) |
2570 | return err; | |
21659035 | 2571 | |
0e4425ed JB |
2572 | /* schedule our worker thread which will take care of |
2573 | * applying the new filter changes | |
2574 | */ | |
2575 | i40e_service_event_schedule(vsi->back); | |
2576 | return 0; | |
41c445ff JB |
2577 | } |
2578 | ||
2579 | /** | |
490a4ad3 | 2580 | * i40e_rm_vlan_all_mac - Remove MAC/VLAN pair for all MAC with the given VLAN |
41c445ff JB |
2581 | * @vsi: the vsi being configured |
2582 | * @vid: vlan id to be removed (0 = untagged only , -1 = any) | |
490a4ad3 JK |
2583 | * |
2584 | * This function should be used to remove all VLAN filters which match the | |
2585 | * given VID. It does not schedule the service event and does not take the | |
2586 | * mac_filter_hash_lock so it may be combined with other operations under | |
2587 | * a single invocation of the mac_filter_hash_lock. | |
2588 | * | |
2589 | * NOTE: this function expects to be called while under the | |
2590 | * mac_filter_hash_lock | |
2591 | */ | |
9af52f60 | 2592 | void i40e_rm_vlan_all_mac(struct i40e_vsi *vsi, s16 vid) |
41c445ff | 2593 | { |
84f5ca6c | 2594 | struct i40e_mac_filter *f; |
278e7d0b | 2595 | struct hlist_node *h; |
278e7d0b | 2596 | int bkt; |
41c445ff | 2597 | |
278e7d0b | 2598 | hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist) { |
290d2557 JK |
2599 | if (f->vlan == vid) |
2600 | __i40e_del_filter(vsi, f); | |
2601 | } | |
490a4ad3 | 2602 | } |
41c445ff | 2603 | |
490a4ad3 JK |
2604 | /** |
2605 | * i40e_vsi_kill_vlan - Remove VSI membership for given VLAN | |
2606 | * @vsi: the VSI being configured | |
f94484b7 | 2607 | * @vid: VLAN id to be removed |
490a4ad3 | 2608 | **/ |
f94484b7 | 2609 | void i40e_vsi_kill_vlan(struct i40e_vsi *vsi, u16 vid) |
490a4ad3 | 2610 | { |
f94484b7 JK |
2611 | if (!vid || vsi->info.pvid) |
2612 | return; | |
2613 | ||
490a4ad3 JK |
2614 | spin_lock_bh(&vsi->mac_filter_hash_lock); |
2615 | i40e_rm_vlan_all_mac(vsi, vid); | |
278e7d0b | 2616 | spin_unlock_bh(&vsi->mac_filter_hash_lock); |
21659035 | 2617 | |
0e4425ed JB |
2618 | /* schedule our worker thread which will take care of |
2619 | * applying the new filter changes | |
2620 | */ | |
2621 | i40e_service_event_schedule(vsi->back); | |
41c445ff JB |
2622 | } |
2623 | ||
2624 | /** | |
2625 | * i40e_vlan_rx_add_vid - Add a vlan id filter to HW offload | |
2626 | * @netdev: network interface to be adjusted | |
2627 | * @vid: vlan id to be added | |
078b5876 JB |
2628 | * |
2629 | * net_device_ops implementation for adding vlan ids | |
41c445ff JB |
2630 | **/ |
2631 | static int i40e_vlan_rx_add_vid(struct net_device *netdev, | |
2632 | __always_unused __be16 proto, u16 vid) | |
2633 | { | |
2634 | struct i40e_netdev_priv *np = netdev_priv(netdev); | |
2635 | struct i40e_vsi *vsi = np->vsi; | |
078b5876 | 2636 | int ret = 0; |
41c445ff | 2637 | |
6a112785 | 2638 | if (vid >= VLAN_N_VID) |
078b5876 JB |
2639 | return -EINVAL; |
2640 | ||
6982d429 ASJ |
2641 | /* If the network stack called us with vid = 0 then |
2642 | * it is asking to receive priority tagged packets with | |
2643 | * vlan id 0. Our HW receives them by default when configured | |
2644 | * to receive untagged packets so there is no need to add an | |
2645 | * extra filter for vlan 0 tagged packets. | |
41c445ff | 2646 | */ |
6982d429 ASJ |
2647 | if (vid) |
2648 | ret = i40e_vsi_add_vlan(vsi, vid); | |
41c445ff | 2649 | |
6a112785 | 2650 | if (!ret) |
078b5876 | 2651 | set_bit(vid, vsi->active_vlans); |
41c445ff | 2652 | |
078b5876 | 2653 | return ret; |
41c445ff JB |
2654 | } |
2655 | ||
2656 | /** | |
2657 | * i40e_vlan_rx_kill_vid - Remove a vlan id filter from HW offload | |
2658 | * @netdev: network interface to be adjusted | |
2659 | * @vid: vlan id to be removed | |
078b5876 | 2660 | * |
fdfd943e | 2661 | * net_device_ops implementation for removing vlan ids |
41c445ff JB |
2662 | **/ |
2663 | static int i40e_vlan_rx_kill_vid(struct net_device *netdev, | |
2664 | __always_unused __be16 proto, u16 vid) | |
2665 | { | |
2666 | struct i40e_netdev_priv *np = netdev_priv(netdev); | |
2667 | struct i40e_vsi *vsi = np->vsi; | |
2668 | ||
41c445ff JB |
2669 | /* return code is ignored as there is nothing a user |
2670 | * can do about failure to remove and a log message was | |
078b5876 | 2671 | * already printed from the other function |
41c445ff JB |
2672 | */ |
2673 | i40e_vsi_kill_vlan(vsi, vid); | |
2674 | ||
2675 | clear_bit(vid, vsi->active_vlans); | |
078b5876 | 2676 | |
41c445ff JB |
2677 | return 0; |
2678 | } | |
2679 | ||
b1b15df5 TD |
2680 | /** |
2681 | * i40e_macaddr_init - explicitly write the mac address filters | |
2682 | * | |
2683 | * @vsi: pointer to the vsi | |
2684 | * @macaddr: the MAC address | |
2685 | * | |
2686 | * This is needed when the macaddr has been obtained by other | |
2687 | * means than the default, e.g., from Open Firmware or IDPROM. | |
2688 | * Returns 0 on success, negative on failure | |
2689 | **/ | |
2690 | static int i40e_macaddr_init(struct i40e_vsi *vsi, u8 *macaddr) | |
2691 | { | |
2692 | int ret; | |
2693 | struct i40e_aqc_add_macvlan_element_data element; | |
2694 | ||
2695 | ret = i40e_aq_mac_address_write(&vsi->back->hw, | |
2696 | I40E_AQC_WRITE_TYPE_LAA_WOL, | |
2697 | macaddr, NULL); | |
2698 | if (ret) { | |
2699 | dev_info(&vsi->back->pdev->dev, | |
2700 | "Addr change for VSI failed: %d\n", ret); | |
2701 | return -EADDRNOTAVAIL; | |
2702 | } | |
2703 | ||
2704 | memset(&element, 0, sizeof(element)); | |
2705 | ether_addr_copy(element.mac_addr, macaddr); | |
2706 | element.flags = cpu_to_le16(I40E_AQC_MACVLAN_ADD_PERFECT_MATCH); | |
2707 | ret = i40e_aq_add_macvlan(&vsi->back->hw, vsi->seid, &element, 1, NULL); | |
2708 | if (ret) { | |
2709 | dev_info(&vsi->back->pdev->dev, | |
2710 | "add filter failed err %s aq_err %s\n", | |
2711 | i40e_stat_str(&vsi->back->hw, ret), | |
2712 | i40e_aq_str(&vsi->back->hw, | |
2713 | vsi->back->hw.aq.asq_last_status)); | |
2714 | } | |
2715 | return ret; | |
2716 | } | |
2717 | ||
41c445ff JB |
2718 | /** |
2719 | * i40e_restore_vlan - Reinstate vlans when vsi/netdev comes back up | |
2720 | * @vsi: the vsi being brought back up | |
2721 | **/ | |
2722 | static void i40e_restore_vlan(struct i40e_vsi *vsi) | |
2723 | { | |
2724 | u16 vid; | |
2725 | ||
2726 | if (!vsi->netdev) | |
2727 | return; | |
2728 | ||
2729 | i40e_vlan_rx_register(vsi->netdev, vsi->netdev->features); | |
2730 | ||
2731 | for_each_set_bit(vid, vsi->active_vlans, VLAN_N_VID) | |
2732 | i40e_vlan_rx_add_vid(vsi->netdev, htons(ETH_P_8021Q), | |
2733 | vid); | |
2734 | } | |
2735 | ||
2736 | /** | |
2737 | * i40e_vsi_add_pvid - Add pvid for the VSI | |
2738 | * @vsi: the vsi being adjusted | |
2739 | * @vid: the vlan id to set as a PVID | |
2740 | **/ | |
dcae29be | 2741 | int i40e_vsi_add_pvid(struct i40e_vsi *vsi, u16 vid) |
41c445ff JB |
2742 | { |
2743 | struct i40e_vsi_context ctxt; | |
f1c7e72e | 2744 | i40e_status ret; |
41c445ff JB |
2745 | |
2746 | vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID); | |
2747 | vsi->info.pvid = cpu_to_le16(vid); | |
6c12fcbf GR |
2748 | vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_TAGGED | |
2749 | I40E_AQ_VSI_PVLAN_INSERT_PVID | | |
b774c7dd | 2750 | I40E_AQ_VSI_PVLAN_EMOD_STR; |
41c445ff JB |
2751 | |
2752 | ctxt.seid = vsi->seid; | |
1a2f6248 | 2753 | ctxt.info = vsi->info; |
f1c7e72e SN |
2754 | ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL); |
2755 | if (ret) { | |
41c445ff | 2756 | dev_info(&vsi->back->pdev->dev, |
f1c7e72e SN |
2757 | "add pvid failed, err %s aq_err %s\n", |
2758 | i40e_stat_str(&vsi->back->hw, ret), | |
2759 | i40e_aq_str(&vsi->back->hw, | |
2760 | vsi->back->hw.aq.asq_last_status)); | |
dcae29be | 2761 | return -ENOENT; |
41c445ff JB |
2762 | } |
2763 | ||
dcae29be | 2764 | return 0; |
41c445ff JB |
2765 | } |
2766 | ||
2767 | /** | |
2768 | * i40e_vsi_remove_pvid - Remove the pvid from the VSI | |
2769 | * @vsi: the vsi being adjusted | |
2770 | * | |
2771 | * Just use the vlan_rx_register() service to put it back to normal | |
2772 | **/ | |
2773 | void i40e_vsi_remove_pvid(struct i40e_vsi *vsi) | |
2774 | { | |
6c12fcbf GR |
2775 | i40e_vlan_stripping_disable(vsi); |
2776 | ||
41c445ff | 2777 | vsi->info.pvid = 0; |
41c445ff JB |
2778 | } |
2779 | ||
2780 | /** | |
2781 | * i40e_vsi_setup_tx_resources - Allocate VSI Tx queue resources | |
2782 | * @vsi: ptr to the VSI | |
2783 | * | |
2784 | * If this function returns with an error, then it's possible one or | |
2785 | * more of the rings is populated (while the rest are not). It is the | |
2786 | * callers duty to clean those orphaned rings. | |
2787 | * | |
2788 | * Return 0 on success, negative on failure | |
2789 | **/ | |
2790 | static int i40e_vsi_setup_tx_resources(struct i40e_vsi *vsi) | |
2791 | { | |
2792 | int i, err = 0; | |
2793 | ||
2794 | for (i = 0; i < vsi->num_queue_pairs && !err; i++) | |
9f65e15b | 2795 | err = i40e_setup_tx_descriptors(vsi->tx_rings[i]); |
41c445ff JB |
2796 | |
2797 | return err; | |
2798 | } | |
2799 | ||
2800 | /** | |
2801 | * i40e_vsi_free_tx_resources - Free Tx resources for VSI queues | |
2802 | * @vsi: ptr to the VSI | |
2803 | * | |
2804 | * Free VSI's transmit software resources | |
2805 | **/ | |
2806 | static void i40e_vsi_free_tx_resources(struct i40e_vsi *vsi) | |
2807 | { | |
2808 | int i; | |
2809 | ||
8e9dca53 GR |
2810 | if (!vsi->tx_rings) |
2811 | return; | |
2812 | ||
41c445ff | 2813 | for (i = 0; i < vsi->num_queue_pairs; i++) |
8e9dca53 | 2814 | if (vsi->tx_rings[i] && vsi->tx_rings[i]->desc) |
9f65e15b | 2815 | i40e_free_tx_resources(vsi->tx_rings[i]); |
41c445ff JB |
2816 | } |
2817 | ||
2818 | /** | |
2819 | * i40e_vsi_setup_rx_resources - Allocate VSI queues Rx resources | |
2820 | * @vsi: ptr to the VSI | |
2821 | * | |
2822 | * If this function returns with an error, then it's possible one or | |
2823 | * more of the rings is populated (while the rest are not). It is the | |
2824 | * callers duty to clean those orphaned rings. | |
2825 | * | |
2826 | * Return 0 on success, negative on failure | |
2827 | **/ | |
2828 | static int i40e_vsi_setup_rx_resources(struct i40e_vsi *vsi) | |
2829 | { | |
2830 | int i, err = 0; | |
2831 | ||
2832 | for (i = 0; i < vsi->num_queue_pairs && !err; i++) | |
9f65e15b | 2833 | err = i40e_setup_rx_descriptors(vsi->rx_rings[i]); |
41c445ff JB |
2834 | return err; |
2835 | } | |
2836 | ||
2837 | /** | |
2838 | * i40e_vsi_free_rx_resources - Free Rx Resources for VSI queues | |
2839 | * @vsi: ptr to the VSI | |
2840 | * | |
2841 | * Free all receive software resources | |
2842 | **/ | |
2843 | static void i40e_vsi_free_rx_resources(struct i40e_vsi *vsi) | |
2844 | { | |
2845 | int i; | |
2846 | ||
8e9dca53 GR |
2847 | if (!vsi->rx_rings) |
2848 | return; | |
2849 | ||
41c445ff | 2850 | for (i = 0; i < vsi->num_queue_pairs; i++) |
8e9dca53 | 2851 | if (vsi->rx_rings[i] && vsi->rx_rings[i]->desc) |
9f65e15b | 2852 | i40e_free_rx_resources(vsi->rx_rings[i]); |
41c445ff JB |
2853 | } |
2854 | ||
3ffa037d NP |
2855 | /** |
2856 | * i40e_config_xps_tx_ring - Configure XPS for a Tx ring | |
2857 | * @ring: The Tx ring to configure | |
2858 | * | |
2859 | * This enables/disables XPS for a given Tx descriptor ring | |
2860 | * based on the TCs enabled for the VSI that ring belongs to. | |
2861 | **/ | |
2862 | static void i40e_config_xps_tx_ring(struct i40e_ring *ring) | |
2863 | { | |
2864 | struct i40e_vsi *vsi = ring->vsi; | |
2865 | cpumask_var_t mask; | |
2866 | ||
9a660eea JB |
2867 | if (!ring->q_vector || !ring->netdev) |
2868 | return; | |
2869 | ||
2870 | /* Single TC mode enable XPS */ | |
2871 | if (vsi->tc_config.numtc <= 1) { | |
2872 | if (!test_and_set_bit(__I40E_TX_XPS_INIT_DONE, &ring->state)) | |
3ffa037d NP |
2873 | netif_set_xps_queue(ring->netdev, |
2874 | &ring->q_vector->affinity_mask, | |
2875 | ring->queue_index); | |
9a660eea JB |
2876 | } else if (alloc_cpumask_var(&mask, GFP_KERNEL)) { |
2877 | /* Disable XPS to allow selection based on TC */ | |
2878 | bitmap_zero(cpumask_bits(mask), nr_cpumask_bits); | |
2879 | netif_set_xps_queue(ring->netdev, mask, ring->queue_index); | |
2880 | free_cpumask_var(mask); | |
3ffa037d | 2881 | } |
0e4425ed JB |
2882 | |
2883 | /* schedule our worker thread which will take care of | |
2884 | * applying the new filter changes | |
2885 | */ | |
2886 | i40e_service_event_schedule(vsi->back); | |
3ffa037d NP |
2887 | } |
2888 | ||
41c445ff JB |
2889 | /** |
2890 | * i40e_configure_tx_ring - Configure a transmit ring context and rest | |
2891 | * @ring: The Tx ring to configure | |
2892 | * | |
2893 | * Configure the Tx descriptor ring in the HMC context. | |
2894 | **/ | |
2895 | static int i40e_configure_tx_ring(struct i40e_ring *ring) | |
2896 | { | |
2897 | struct i40e_vsi *vsi = ring->vsi; | |
2898 | u16 pf_q = vsi->base_queue + ring->queue_index; | |
2899 | struct i40e_hw *hw = &vsi->back->hw; | |
2900 | struct i40e_hmc_obj_txq tx_ctx; | |
2901 | i40e_status err = 0; | |
2902 | u32 qtx_ctl = 0; | |
2903 | ||
2904 | /* some ATR related tx ring init */ | |
60ea5f83 | 2905 | if (vsi->back->flags & I40E_FLAG_FD_ATR_ENABLED) { |
41c445ff JB |
2906 | ring->atr_sample_rate = vsi->back->atr_sample_rate; |
2907 | ring->atr_count = 0; | |
2908 | } else { | |
2909 | ring->atr_sample_rate = 0; | |
2910 | } | |
2911 | ||
3ffa037d NP |
2912 | /* configure XPS */ |
2913 | i40e_config_xps_tx_ring(ring); | |
41c445ff JB |
2914 | |
2915 | /* clear the context structure first */ | |
2916 | memset(&tx_ctx, 0, sizeof(tx_ctx)); | |
2917 | ||
2918 | tx_ctx.new_context = 1; | |
2919 | tx_ctx.base = (ring->dma / 128); | |
2920 | tx_ctx.qlen = ring->count; | |
60ea5f83 JB |
2921 | tx_ctx.fd_ena = !!(vsi->back->flags & (I40E_FLAG_FD_SB_ENABLED | |
2922 | I40E_FLAG_FD_ATR_ENABLED)); | |
beb0dff1 | 2923 | tx_ctx.timesync_ena = !!(vsi->back->flags & I40E_FLAG_PTP); |
1943d8ba JB |
2924 | /* FDIR VSI tx ring can still use RS bit and writebacks */ |
2925 | if (vsi->type != I40E_VSI_FDIR) | |
2926 | tx_ctx.head_wb_ena = 1; | |
2927 | tx_ctx.head_wb_addr = ring->dma + | |
2928 | (ring->count * sizeof(struct i40e_tx_desc)); | |
41c445ff JB |
2929 | |
2930 | /* As part of VSI creation/update, FW allocates certain | |
2931 | * Tx arbitration queue sets for each TC enabled for | |
2932 | * the VSI. The FW returns the handles to these queue | |
2933 | * sets as part of the response buffer to Add VSI, | |
2934 | * Update VSI, etc. AQ commands. It is expected that | |
2935 | * these queue set handles be associated with the Tx | |
2936 | * queues by the driver as part of the TX queue context | |
2937 | * initialization. This has to be done regardless of | |
2938 | * DCB as by default everything is mapped to TC0. | |
2939 | */ | |
2940 | tx_ctx.rdylist = le16_to_cpu(vsi->info.qs_handle[ring->dcb_tc]); | |
2941 | tx_ctx.rdylist_act = 0; | |
2942 | ||
2943 | /* clear the context in the HMC */ | |
2944 | err = i40e_clear_lan_tx_queue_context(hw, pf_q); | |
2945 | if (err) { | |
2946 | dev_info(&vsi->back->pdev->dev, | |
2947 | "Failed to clear LAN Tx queue context on Tx ring %d (pf_q %d), error: %d\n", | |
2948 | ring->queue_index, pf_q, err); | |
2949 | return -ENOMEM; | |
2950 | } | |
2951 | ||
2952 | /* set the context in the HMC */ | |
2953 | err = i40e_set_lan_tx_queue_context(hw, pf_q, &tx_ctx); | |
2954 | if (err) { | |
2955 | dev_info(&vsi->back->pdev->dev, | |
2956 | "Failed to set LAN Tx queue context on Tx ring %d (pf_q %d, error: %d\n", | |
2957 | ring->queue_index, pf_q, err); | |
2958 | return -ENOMEM; | |
2959 | } | |
2960 | ||
2961 | /* Now associate this queue with this PCI function */ | |
7a28d885 | 2962 | if (vsi->type == I40E_VSI_VMDQ2) { |
9d8bf547 | 2963 | qtx_ctl = I40E_QTX_CTL_VM_QUEUE; |
7a28d885 MW |
2964 | qtx_ctl |= ((vsi->id) << I40E_QTX_CTL_VFVM_INDX_SHIFT) & |
2965 | I40E_QTX_CTL_VFVM_INDX_MASK; | |
2966 | } else { | |
9d8bf547 | 2967 | qtx_ctl = I40E_QTX_CTL_PF_QUEUE; |
7a28d885 MW |
2968 | } |
2969 | ||
13fd9774 SN |
2970 | qtx_ctl |= ((hw->pf_id << I40E_QTX_CTL_PF_INDX_SHIFT) & |
2971 | I40E_QTX_CTL_PF_INDX_MASK); | |
41c445ff JB |
2972 | wr32(hw, I40E_QTX_CTL(pf_q), qtx_ctl); |
2973 | i40e_flush(hw); | |
2974 | ||
41c445ff JB |
2975 | /* cache tail off for easier writes later */ |
2976 | ring->tail = hw->hw_addr + I40E_QTX_TAIL(pf_q); | |
2977 | ||
2978 | return 0; | |
2979 | } | |
2980 | ||
2981 | /** | |
2982 | * i40e_configure_rx_ring - Configure a receive ring context | |
2983 | * @ring: The Rx ring to configure | |
2984 | * | |
2985 | * Configure the Rx descriptor ring in the HMC context. | |
2986 | **/ | |
2987 | static int i40e_configure_rx_ring(struct i40e_ring *ring) | |
2988 | { | |
2989 | struct i40e_vsi *vsi = ring->vsi; | |
2990 | u32 chain_len = vsi->back->hw.func_caps.rx_buf_chain_len; | |
2991 | u16 pf_q = vsi->base_queue + ring->queue_index; | |
2992 | struct i40e_hw *hw = &vsi->back->hw; | |
2993 | struct i40e_hmc_obj_rxq rx_ctx; | |
2994 | i40e_status err = 0; | |
2995 | ||
2996 | ring->state = 0; | |
2997 | ||
2998 | /* clear the context structure first */ | |
2999 | memset(&rx_ctx, 0, sizeof(rx_ctx)); | |
3000 | ||
3001 | ring->rx_buf_len = vsi->rx_buf_len; | |
41c445ff | 3002 | |
dab86afd AD |
3003 | rx_ctx.dbuff = DIV_ROUND_UP(ring->rx_buf_len, |
3004 | BIT_ULL(I40E_RXQ_CTX_DBUFF_SHIFT)); | |
41c445ff JB |
3005 | |
3006 | rx_ctx.base = (ring->dma / 128); | |
3007 | rx_ctx.qlen = ring->count; | |
3008 | ||
bec60fc4 JB |
3009 | /* use 32 byte descriptors */ |
3010 | rx_ctx.dsize = 1; | |
41c445ff | 3011 | |
bec60fc4 JB |
3012 | /* descriptor type is always zero |
3013 | * rx_ctx.dtype = 0; | |
3014 | */ | |
b32bfa17 | 3015 | rx_ctx.hsplit_0 = 0; |
41c445ff | 3016 | |
b32bfa17 | 3017 | rx_ctx.rxmax = min_t(u16, vsi->max_frame, chain_len * ring->rx_buf_len); |
7134f9ce JB |
3018 | if (hw->revision_id == 0) |
3019 | rx_ctx.lrxqthresh = 0; | |
3020 | else | |
3021 | rx_ctx.lrxqthresh = 2; | |
41c445ff JB |
3022 | rx_ctx.crcstrip = 1; |
3023 | rx_ctx.l2tsel = 1; | |
c4bbac39 JB |
3024 | /* this controls whether VLAN is stripped from inner headers */ |
3025 | rx_ctx.showiv = 0; | |
acb3676b CS |
3026 | /* set the prefena field to 1 because the manual says to */ |
3027 | rx_ctx.prefena = 1; | |
41c445ff JB |
3028 | |
3029 | /* clear the context in the HMC */ | |
3030 | err = i40e_clear_lan_rx_queue_context(hw, pf_q); | |
3031 | if (err) { | |
3032 | dev_info(&vsi->back->pdev->dev, | |
3033 | "Failed to clear LAN Rx queue context on Rx ring %d (pf_q %d), error: %d\n", | |
3034 | ring->queue_index, pf_q, err); | |
3035 | return -ENOMEM; | |
3036 | } | |
3037 | ||
3038 | /* set the context in the HMC */ | |
3039 | err = i40e_set_lan_rx_queue_context(hw, pf_q, &rx_ctx); | |
3040 | if (err) { | |
3041 | dev_info(&vsi->back->pdev->dev, | |
3042 | "Failed to set LAN Rx queue context on Rx ring %d (pf_q %d), error: %d\n", | |
3043 | ring->queue_index, pf_q, err); | |
3044 | return -ENOMEM; | |
3045 | } | |
3046 | ||
ca9ec088 AD |
3047 | /* configure Rx buffer alignment */ |
3048 | if (!vsi->netdev || (vsi->back->flags & I40E_FLAG_LEGACY_RX)) | |
3049 | clear_ring_build_skb_enabled(ring); | |
3050 | else | |
3051 | set_ring_build_skb_enabled(ring); | |
3052 | ||
41c445ff JB |
3053 | /* cache tail for quicker writes, and clear the reg before use */ |
3054 | ring->tail = hw->hw_addr + I40E_QRX_TAIL(pf_q); | |
3055 | writel(0, ring->tail); | |
3056 | ||
1a557afc | 3057 | i40e_alloc_rx_buffers(ring, I40E_DESC_UNUSED(ring)); |
41c445ff JB |
3058 | |
3059 | return 0; | |
3060 | } | |
3061 | ||
3062 | /** | |
3063 | * i40e_vsi_configure_tx - Configure the VSI for Tx | |
3064 | * @vsi: VSI structure describing this set of rings and resources | |
3065 | * | |
3066 | * Configure the Tx VSI for operation. | |
3067 | **/ | |
3068 | static int i40e_vsi_configure_tx(struct i40e_vsi *vsi) | |
3069 | { | |
3070 | int err = 0; | |
3071 | u16 i; | |
3072 | ||
9f65e15b AD |
3073 | for (i = 0; (i < vsi->num_queue_pairs) && !err; i++) |
3074 | err = i40e_configure_tx_ring(vsi->tx_rings[i]); | |
41c445ff JB |
3075 | |
3076 | return err; | |
3077 | } | |
3078 | ||
3079 | /** | |
3080 | * i40e_vsi_configure_rx - Configure the VSI for Rx | |
3081 | * @vsi: the VSI being configured | |
3082 | * | |
3083 | * Configure the Rx VSI for operation. | |
3084 | **/ | |
3085 | static int i40e_vsi_configure_rx(struct i40e_vsi *vsi) | |
3086 | { | |
3087 | int err = 0; | |
3088 | u16 i; | |
3089 | ||
dab86afd AD |
3090 | if (!vsi->netdev || (vsi->back->flags & I40E_FLAG_LEGACY_RX)) { |
3091 | vsi->max_frame = I40E_MAX_RXBUFFER; | |
3092 | vsi->rx_buf_len = I40E_RXBUFFER_2048; | |
3093 | #if (PAGE_SIZE < 8192) | |
ca9ec088 AD |
3094 | } else if (!I40E_2K_TOO_SMALL_WITH_PADDING && |
3095 | (vsi->netdev->mtu <= ETH_DATA_LEN)) { | |
dab86afd AD |
3096 | vsi->max_frame = I40E_RXBUFFER_1536 - NET_IP_ALIGN; |
3097 | vsi->rx_buf_len = I40E_RXBUFFER_1536 - NET_IP_ALIGN; | |
3098 | #endif | |
3099 | } else { | |
3100 | vsi->max_frame = I40E_MAX_RXBUFFER; | |
98efd694 AD |
3101 | vsi->rx_buf_len = (PAGE_SIZE < 8192) ? I40E_RXBUFFER_3072 : |
3102 | I40E_RXBUFFER_2048; | |
dab86afd | 3103 | } |
41c445ff JB |
3104 | |
3105 | /* set up individual rings */ | |
3106 | for (i = 0; i < vsi->num_queue_pairs && !err; i++) | |
9f65e15b | 3107 | err = i40e_configure_rx_ring(vsi->rx_rings[i]); |
41c445ff JB |
3108 | |
3109 | return err; | |
3110 | } | |
3111 | ||
3112 | /** | |
3113 | * i40e_vsi_config_dcb_rings - Update rings to reflect DCB TC | |
3114 | * @vsi: ptr to the VSI | |
3115 | **/ | |
3116 | static void i40e_vsi_config_dcb_rings(struct i40e_vsi *vsi) | |
3117 | { | |
e7046ee1 | 3118 | struct i40e_ring *tx_ring, *rx_ring; |
41c445ff JB |
3119 | u16 qoffset, qcount; |
3120 | int i, n; | |
3121 | ||
cd238a3e PN |
3122 | if (!(vsi->back->flags & I40E_FLAG_DCB_ENABLED)) { |
3123 | /* Reset the TC information */ | |
3124 | for (i = 0; i < vsi->num_queue_pairs; i++) { | |
3125 | rx_ring = vsi->rx_rings[i]; | |
3126 | tx_ring = vsi->tx_rings[i]; | |
3127 | rx_ring->dcb_tc = 0; | |
3128 | tx_ring->dcb_tc = 0; | |
3129 | } | |
3130 | } | |
41c445ff JB |
3131 | |
3132 | for (n = 0; n < I40E_MAX_TRAFFIC_CLASS; n++) { | |
41a1d04b | 3133 | if (!(vsi->tc_config.enabled_tc & BIT_ULL(n))) |
41c445ff JB |
3134 | continue; |
3135 | ||
3136 | qoffset = vsi->tc_config.tc_info[n].qoffset; | |
3137 | qcount = vsi->tc_config.tc_info[n].qcount; | |
3138 | for (i = qoffset; i < (qoffset + qcount); i++) { | |
e7046ee1 AA |
3139 | rx_ring = vsi->rx_rings[i]; |
3140 | tx_ring = vsi->tx_rings[i]; | |
41c445ff JB |
3141 | rx_ring->dcb_tc = n; |
3142 | tx_ring->dcb_tc = n; | |
3143 | } | |
3144 | } | |
3145 | } | |
3146 | ||
3147 | /** | |
3148 | * i40e_set_vsi_rx_mode - Call set_rx_mode on a VSI | |
3149 | * @vsi: ptr to the VSI | |
3150 | **/ | |
3151 | static void i40e_set_vsi_rx_mode(struct i40e_vsi *vsi) | |
3152 | { | |
b1b15df5 TD |
3153 | struct i40e_pf *pf = vsi->back; |
3154 | int err; | |
3155 | ||
41c445ff JB |
3156 | if (vsi->netdev) |
3157 | i40e_set_rx_mode(vsi->netdev); | |
b1b15df5 TD |
3158 | |
3159 | if (!!(pf->flags & I40E_FLAG_PF_MAC)) { | |
3160 | err = i40e_macaddr_init(vsi, pf->hw.mac.addr); | |
3161 | if (err) { | |
3162 | dev_warn(&pf->pdev->dev, | |
3163 | "could not set up macaddr; err %d\n", err); | |
3164 | } | |
3165 | } | |
41c445ff JB |
3166 | } |
3167 | ||
17a73f6b JG |
3168 | /** |
3169 | * i40e_fdir_filter_restore - Restore the Sideband Flow Director filters | |
3170 | * @vsi: Pointer to the targeted VSI | |
3171 | * | |
3172 | * This function replays the hlist on the hw where all the SB Flow Director | |
3173 | * filters were saved. | |
3174 | **/ | |
3175 | static void i40e_fdir_filter_restore(struct i40e_vsi *vsi) | |
3176 | { | |
3177 | struct i40e_fdir_filter *filter; | |
3178 | struct i40e_pf *pf = vsi->back; | |
3179 | struct hlist_node *node; | |
3180 | ||
55a5e60b ASJ |
3181 | if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED)) |
3182 | return; | |
3183 | ||
6d069425 | 3184 | /* Reset FDir counters as we're replaying all existing filters */ |
097dbf52 JK |
3185 | pf->fd_tcp4_filter_cnt = 0; |
3186 | pf->fd_udp4_filter_cnt = 0; | |
f223c875 | 3187 | pf->fd_sctp4_filter_cnt = 0; |
097dbf52 | 3188 | pf->fd_ip4_filter_cnt = 0; |
6d069425 | 3189 | |
17a73f6b JG |
3190 | hlist_for_each_entry_safe(filter, node, |
3191 | &pf->fdir_filter_list, fdir_node) { | |
3192 | i40e_add_del_fdir(vsi, filter, true); | |
3193 | } | |
3194 | } | |
3195 | ||
41c445ff JB |
3196 | /** |
3197 | * i40e_vsi_configure - Set up the VSI for action | |
3198 | * @vsi: the VSI being configured | |
3199 | **/ | |
3200 | static int i40e_vsi_configure(struct i40e_vsi *vsi) | |
3201 | { | |
3202 | int err; | |
3203 | ||
3204 | i40e_set_vsi_rx_mode(vsi); | |
3205 | i40e_restore_vlan(vsi); | |
3206 | i40e_vsi_config_dcb_rings(vsi); | |
3207 | err = i40e_vsi_configure_tx(vsi); | |
3208 | if (!err) | |
3209 | err = i40e_vsi_configure_rx(vsi); | |
3210 | ||
3211 | return err; | |
3212 | } | |
3213 | ||
3214 | /** | |
3215 | * i40e_vsi_configure_msix - MSIX mode Interrupt Config in the HW | |
3216 | * @vsi: the VSI being configured | |
3217 | **/ | |
3218 | static void i40e_vsi_configure_msix(struct i40e_vsi *vsi) | |
3219 | { | |
3220 | struct i40e_pf *pf = vsi->back; | |
41c445ff JB |
3221 | struct i40e_hw *hw = &pf->hw; |
3222 | u16 vector; | |
3223 | int i, q; | |
41c445ff JB |
3224 | u32 qp; |
3225 | ||
3226 | /* The interrupt indexing is offset by 1 in the PFINT_ITRn | |
3227 | * and PFINT_LNKLSTn registers, e.g.: | |
3228 | * PFINT_ITRn[0..n-1] gets msix-1..msix-n (qpair interrupts) | |
3229 | */ | |
3230 | qp = vsi->base_queue; | |
3231 | vector = vsi->base_vector; | |
493fb300 | 3232 | for (i = 0; i < vsi->num_q_vectors; i++, vector++) { |
ac26fc13 JB |
3233 | struct i40e_q_vector *q_vector = vsi->q_vectors[i]; |
3234 | ||
ee2319cf | 3235 | q_vector->itr_countdown = ITR_COUNTDOWN_START; |
a75e8005 | 3236 | q_vector->rx.itr = ITR_TO_REG(vsi->rx_rings[i]->rx_itr_setting); |
41c445ff JB |
3237 | q_vector->rx.latency_range = I40E_LOW_LATENCY; |
3238 | wr32(hw, I40E_PFINT_ITRN(I40E_RX_ITR, vector - 1), | |
3239 | q_vector->rx.itr); | |
a75e8005 | 3240 | q_vector->tx.itr = ITR_TO_REG(vsi->tx_rings[i]->tx_itr_setting); |
41c445ff JB |
3241 | q_vector->tx.latency_range = I40E_LOW_LATENCY; |
3242 | wr32(hw, I40E_PFINT_ITRN(I40E_TX_ITR, vector - 1), | |
3243 | q_vector->tx.itr); | |
ac26fc13 | 3244 | wr32(hw, I40E_PFINT_RATEN(vector - 1), |
1c0e6a36 | 3245 | i40e_intrl_usec_to_reg(vsi->int_rate_limit)); |
41c445ff JB |
3246 | |
3247 | /* Linked list for the queuepairs assigned to this vector */ | |
3248 | wr32(hw, I40E_PFINT_LNKLSTN(vector - 1), qp); | |
3249 | for (q = 0; q < q_vector->num_ringpairs; q++) { | |
ac26fc13 JB |
3250 | u32 val; |
3251 | ||
41c445ff JB |
3252 | val = I40E_QINT_RQCTL_CAUSE_ENA_MASK | |
3253 | (I40E_RX_ITR << I40E_QINT_RQCTL_ITR_INDX_SHIFT) | | |
3254 | (vector << I40E_QINT_RQCTL_MSIX_INDX_SHIFT) | | |
3255 | (qp << I40E_QINT_RQCTL_NEXTQ_INDX_SHIFT)| | |
3256 | (I40E_QUEUE_TYPE_TX | |
3257 | << I40E_QINT_RQCTL_NEXTQ_TYPE_SHIFT); | |
3258 | ||
3259 | wr32(hw, I40E_QINT_RQCTL(qp), val); | |
3260 | ||
3261 | val = I40E_QINT_TQCTL_CAUSE_ENA_MASK | | |
3262 | (I40E_TX_ITR << I40E_QINT_TQCTL_ITR_INDX_SHIFT) | | |
3263 | (vector << I40E_QINT_TQCTL_MSIX_INDX_SHIFT) | | |
3264 | ((qp+1) << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT)| | |
3265 | (I40E_QUEUE_TYPE_RX | |
3266 | << I40E_QINT_TQCTL_NEXTQ_TYPE_SHIFT); | |
3267 | ||
3268 | /* Terminate the linked list */ | |
3269 | if (q == (q_vector->num_ringpairs - 1)) | |
3270 | val |= (I40E_QUEUE_END_OF_LIST | |
3271 | << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT); | |
3272 | ||
3273 | wr32(hw, I40E_QINT_TQCTL(qp), val); | |
3274 | qp++; | |
3275 | } | |
3276 | } | |
3277 | ||
3278 | i40e_flush(hw); | |
3279 | } | |
3280 | ||
3281 | /** | |
3282 | * i40e_enable_misc_int_causes - enable the non-queue interrupts | |
3283 | * @hw: ptr to the hardware info | |
3284 | **/ | |
ab437b5a | 3285 | static void i40e_enable_misc_int_causes(struct i40e_pf *pf) |
41c445ff | 3286 | { |
ab437b5a | 3287 | struct i40e_hw *hw = &pf->hw; |
41c445ff JB |
3288 | u32 val; |
3289 | ||
3290 | /* clear things first */ | |
3291 | wr32(hw, I40E_PFINT_ICR0_ENA, 0); /* disable all */ | |
3292 | rd32(hw, I40E_PFINT_ICR0); /* read to clear */ | |
3293 | ||
3294 | val = I40E_PFINT_ICR0_ENA_ECC_ERR_MASK | | |
3295 | I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK | | |
3296 | I40E_PFINT_ICR0_ENA_GRST_MASK | | |
3297 | I40E_PFINT_ICR0_ENA_PCI_EXCEPTION_MASK | | |
3298 | I40E_PFINT_ICR0_ENA_GPIO_MASK | | |
41c445ff JB |
3299 | I40E_PFINT_ICR0_ENA_HMC_ERR_MASK | |
3300 | I40E_PFINT_ICR0_ENA_VFLR_MASK | | |
3301 | I40E_PFINT_ICR0_ENA_ADMINQ_MASK; | |
3302 | ||
0d8e1439 ASJ |
3303 | if (pf->flags & I40E_FLAG_IWARP_ENABLED) |
3304 | val |= I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK; | |
3305 | ||
ab437b5a JK |
3306 | if (pf->flags & I40E_FLAG_PTP) |
3307 | val |= I40E_PFINT_ICR0_ENA_TIMESYNC_MASK; | |
3308 | ||
41c445ff JB |
3309 | wr32(hw, I40E_PFINT_ICR0_ENA, val); |
3310 | ||
3311 | /* SW_ITR_IDX = 0, but don't change INTENA */ | |
84ed40e7 ASJ |
3312 | wr32(hw, I40E_PFINT_DYN_CTL0, I40E_PFINT_DYN_CTL0_SW_ITR_INDX_MASK | |
3313 | I40E_PFINT_DYN_CTL0_INTENA_MSK_MASK); | |
41c445ff JB |
3314 | |
3315 | /* OTHER_ITR_IDX = 0 */ | |
3316 | wr32(hw, I40E_PFINT_STAT_CTL0, 0); | |
3317 | } | |
3318 | ||
3319 | /** | |
3320 | * i40e_configure_msi_and_legacy - Legacy mode interrupt config in the HW | |
3321 | * @vsi: the VSI being configured | |
3322 | **/ | |
3323 | static void i40e_configure_msi_and_legacy(struct i40e_vsi *vsi) | |
3324 | { | |
493fb300 | 3325 | struct i40e_q_vector *q_vector = vsi->q_vectors[0]; |
41c445ff JB |
3326 | struct i40e_pf *pf = vsi->back; |
3327 | struct i40e_hw *hw = &pf->hw; | |
3328 | u32 val; | |
3329 | ||
3330 | /* set the ITR configuration */ | |
ee2319cf | 3331 | q_vector->itr_countdown = ITR_COUNTDOWN_START; |
a75e8005 | 3332 | q_vector->rx.itr = ITR_TO_REG(vsi->rx_rings[0]->rx_itr_setting); |
41c445ff JB |
3333 | q_vector->rx.latency_range = I40E_LOW_LATENCY; |
3334 | wr32(hw, I40E_PFINT_ITR0(I40E_RX_ITR), q_vector->rx.itr); | |
a75e8005 | 3335 | q_vector->tx.itr = ITR_TO_REG(vsi->tx_rings[0]->tx_itr_setting); |
41c445ff JB |
3336 | q_vector->tx.latency_range = I40E_LOW_LATENCY; |
3337 | wr32(hw, I40E_PFINT_ITR0(I40E_TX_ITR), q_vector->tx.itr); | |
3338 | ||
ab437b5a | 3339 | i40e_enable_misc_int_causes(pf); |
41c445ff JB |
3340 | |
3341 | /* FIRSTQ_INDX = 0, FIRSTQ_TYPE = 0 (rx) */ | |
3342 | wr32(hw, I40E_PFINT_LNKLST0, 0); | |
3343 | ||
f29eaa3d | 3344 | /* Associate the queue pair to the vector and enable the queue int */ |
41c445ff JB |
3345 | val = I40E_QINT_RQCTL_CAUSE_ENA_MASK | |
3346 | (I40E_RX_ITR << I40E_QINT_RQCTL_ITR_INDX_SHIFT) | | |
3347 | (I40E_QUEUE_TYPE_TX << I40E_QINT_TQCTL_NEXTQ_TYPE_SHIFT); | |
3348 | ||
3349 | wr32(hw, I40E_QINT_RQCTL(0), val); | |
3350 | ||
3351 | val = I40E_QINT_TQCTL_CAUSE_ENA_MASK | | |
3352 | (I40E_TX_ITR << I40E_QINT_TQCTL_ITR_INDX_SHIFT) | | |
3353 | (I40E_QUEUE_END_OF_LIST << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT); | |
3354 | ||
3355 | wr32(hw, I40E_QINT_TQCTL(0), val); | |
3356 | i40e_flush(hw); | |
3357 | } | |
3358 | ||
2ef28cfb MW |
3359 | /** |
3360 | * i40e_irq_dynamic_disable_icr0 - Disable default interrupt generation for icr0 | |
3361 | * @pf: board private structure | |
3362 | **/ | |
3363 | void i40e_irq_dynamic_disable_icr0(struct i40e_pf *pf) | |
3364 | { | |
3365 | struct i40e_hw *hw = &pf->hw; | |
3366 | ||
3367 | wr32(hw, I40E_PFINT_DYN_CTL0, | |
3368 | I40E_ITR_NONE << I40E_PFINT_DYN_CTLN_ITR_INDX_SHIFT); | |
3369 | i40e_flush(hw); | |
3370 | } | |
3371 | ||
41c445ff JB |
3372 | /** |
3373 | * i40e_irq_dynamic_enable_icr0 - Enable default interrupt generation for icr0 | |
3374 | * @pf: board private structure | |
40d72a50 | 3375 | * @clearpba: true when all pending interrupt events should be cleared |
41c445ff | 3376 | **/ |
40d72a50 | 3377 | void i40e_irq_dynamic_enable_icr0(struct i40e_pf *pf, bool clearpba) |
41c445ff JB |
3378 | { |
3379 | struct i40e_hw *hw = &pf->hw; | |
3380 | u32 val; | |
3381 | ||
3382 | val = I40E_PFINT_DYN_CTL0_INTENA_MASK | | |
40d72a50 | 3383 | (clearpba ? I40E_PFINT_DYN_CTL0_CLEARPBA_MASK : 0) | |
41c445ff JB |
3384 | (I40E_ITR_NONE << I40E_PFINT_DYN_CTL0_ITR_INDX_SHIFT); |
3385 | ||
3386 | wr32(hw, I40E_PFINT_DYN_CTL0, val); | |
3387 | i40e_flush(hw); | |
3388 | } | |
3389 | ||
41c445ff JB |
3390 | /** |
3391 | * i40e_msix_clean_rings - MSIX mode Interrupt Handler | |
3392 | * @irq: interrupt number | |
3393 | * @data: pointer to a q_vector | |
3394 | **/ | |
3395 | static irqreturn_t i40e_msix_clean_rings(int irq, void *data) | |
3396 | { | |
3397 | struct i40e_q_vector *q_vector = data; | |
3398 | ||
cd0b6fa6 | 3399 | if (!q_vector->tx.ring && !q_vector->rx.ring) |
41c445ff JB |
3400 | return IRQ_HANDLED; |
3401 | ||
5d3465a1 | 3402 | napi_schedule_irqoff(&q_vector->napi); |
41c445ff JB |
3403 | |
3404 | return IRQ_HANDLED; | |
3405 | } | |
3406 | ||
96db776a AB |
3407 | /** |
3408 | * i40e_irq_affinity_notify - Callback for affinity changes | |
3409 | * @notify: context as to what irq was changed | |
3410 | * @mask: the new affinity mask | |
3411 | * | |
3412 | * This is a callback function used by the irq_set_affinity_notifier function | |
3413 | * so that we may register to receive changes to the irq affinity masks. | |
3414 | **/ | |
3415 | static void i40e_irq_affinity_notify(struct irq_affinity_notify *notify, | |
3416 | const cpumask_t *mask) | |
3417 | { | |
3418 | struct i40e_q_vector *q_vector = | |
3419 | container_of(notify, struct i40e_q_vector, affinity_notify); | |
3420 | ||
3421 | q_vector->affinity_mask = *mask; | |
3422 | } | |
3423 | ||
3424 | /** | |
3425 | * i40e_irq_affinity_release - Callback for affinity notifier release | |
3426 | * @ref: internal core kernel usage | |
3427 | * | |
3428 | * This is a callback function used by the irq_set_affinity_notifier function | |
3429 | * to inform the current notification subscriber that they will no longer | |
3430 | * receive notifications. | |
3431 | **/ | |
3432 | static void i40e_irq_affinity_release(struct kref *ref) {} | |
3433 | ||
41c445ff JB |
3434 | /** |
3435 | * i40e_vsi_request_irq_msix - Initialize MSI-X interrupts | |
3436 | * @vsi: the VSI being configured | |
3437 | * @basename: name for the vector | |
3438 | * | |
3439 | * Allocates MSI-X vectors and requests interrupts from the kernel. | |
3440 | **/ | |
3441 | static int i40e_vsi_request_irq_msix(struct i40e_vsi *vsi, char *basename) | |
3442 | { | |
3443 | int q_vectors = vsi->num_q_vectors; | |
3444 | struct i40e_pf *pf = vsi->back; | |
3445 | int base = vsi->base_vector; | |
3446 | int rx_int_idx = 0; | |
3447 | int tx_int_idx = 0; | |
3448 | int vector, err; | |
96db776a | 3449 | int irq_num; |
41c445ff JB |
3450 | |
3451 | for (vector = 0; vector < q_vectors; vector++) { | |
493fb300 | 3452 | struct i40e_q_vector *q_vector = vsi->q_vectors[vector]; |
41c445ff | 3453 | |
96db776a AB |
3454 | irq_num = pf->msix_entries[base + vector].vector; |
3455 | ||
cd0b6fa6 | 3456 | if (q_vector->tx.ring && q_vector->rx.ring) { |
41c445ff JB |
3457 | snprintf(q_vector->name, sizeof(q_vector->name) - 1, |
3458 | "%s-%s-%d", basename, "TxRx", rx_int_idx++); | |
3459 | tx_int_idx++; | |
cd0b6fa6 | 3460 | } else if (q_vector->rx.ring) { |
41c445ff JB |
3461 | snprintf(q_vector->name, sizeof(q_vector->name) - 1, |
3462 | "%s-%s-%d", basename, "rx", rx_int_idx++); | |
cd0b6fa6 | 3463 | } else if (q_vector->tx.ring) { |
41c445ff JB |
3464 | snprintf(q_vector->name, sizeof(q_vector->name) - 1, |
3465 | "%s-%s-%d", basename, "tx", tx_int_idx++); | |
3466 | } else { | |
3467 | /* skip this unused q_vector */ | |
3468 | continue; | |
3469 | } | |
96db776a | 3470 | err = request_irq(irq_num, |
41c445ff JB |
3471 | vsi->irq_handler, |
3472 | 0, | |
3473 | q_vector->name, | |
3474 | q_vector); | |
3475 | if (err) { | |
3476 | dev_info(&pf->pdev->dev, | |
fb43201f | 3477 | "MSIX request_irq failed, error: %d\n", err); |
41c445ff JB |
3478 | goto free_queue_irqs; |
3479 | } | |
96db776a AB |
3480 | |
3481 | /* register for affinity change notifications */ | |
3482 | q_vector->affinity_notify.notify = i40e_irq_affinity_notify; | |
3483 | q_vector->affinity_notify.release = i40e_irq_affinity_release; | |
3484 | irq_set_affinity_notifier(irq_num, &q_vector->affinity_notify); | |
41c445ff | 3485 | /* assign the mask for this irq */ |
96db776a | 3486 | irq_set_affinity_hint(irq_num, &q_vector->affinity_mask); |
41c445ff JB |
3487 | } |
3488 | ||
63741846 | 3489 | vsi->irqs_ready = true; |
41c445ff JB |
3490 | return 0; |
3491 | ||
3492 | free_queue_irqs: | |
3493 | while (vector) { | |
3494 | vector--; | |
96db776a AB |
3495 | irq_num = pf->msix_entries[base + vector].vector; |
3496 | irq_set_affinity_notifier(irq_num, NULL); | |
3497 | irq_set_affinity_hint(irq_num, NULL); | |
3498 | free_irq(irq_num, &vsi->q_vectors[vector]); | |
41c445ff JB |
3499 | } |
3500 | return err; | |
3501 | } | |
3502 | ||
3503 | /** | |
3504 | * i40e_vsi_disable_irq - Mask off queue interrupt generation on the VSI | |
3505 | * @vsi: the VSI being un-configured | |
3506 | **/ | |
3507 | static void i40e_vsi_disable_irq(struct i40e_vsi *vsi) | |
3508 | { | |
3509 | struct i40e_pf *pf = vsi->back; | |
3510 | struct i40e_hw *hw = &pf->hw; | |
3511 | int base = vsi->base_vector; | |
3512 | int i; | |
3513 | ||
3514 | for (i = 0; i < vsi->num_queue_pairs; i++) { | |
9f65e15b AD |
3515 | wr32(hw, I40E_QINT_TQCTL(vsi->tx_rings[i]->reg_idx), 0); |
3516 | wr32(hw, I40E_QINT_RQCTL(vsi->rx_rings[i]->reg_idx), 0); | |
41c445ff JB |
3517 | } |
3518 | ||
3519 | if (pf->flags & I40E_FLAG_MSIX_ENABLED) { | |
3520 | for (i = vsi->base_vector; | |
3521 | i < (vsi->num_q_vectors + vsi->base_vector); i++) | |
3522 | wr32(hw, I40E_PFINT_DYN_CTLN(i - 1), 0); | |
3523 | ||
3524 | i40e_flush(hw); | |
3525 | for (i = 0; i < vsi->num_q_vectors; i++) | |
3526 | synchronize_irq(pf->msix_entries[i + base].vector); | |
3527 | } else { | |
3528 | /* Legacy and MSI mode - this stops all interrupt handling */ | |
3529 | wr32(hw, I40E_PFINT_ICR0_ENA, 0); | |
3530 | wr32(hw, I40E_PFINT_DYN_CTL0, 0); | |
3531 | i40e_flush(hw); | |
3532 | synchronize_irq(pf->pdev->irq); | |
3533 | } | |
3534 | } | |
3535 | ||
3536 | /** | |
3537 | * i40e_vsi_enable_irq - Enable IRQ for the given VSI | |
3538 | * @vsi: the VSI being configured | |
3539 | **/ | |
3540 | static int i40e_vsi_enable_irq(struct i40e_vsi *vsi) | |
3541 | { | |
3542 | struct i40e_pf *pf = vsi->back; | |
3543 | int i; | |
3544 | ||
3545 | if (pf->flags & I40E_FLAG_MSIX_ENABLED) { | |
7845548d | 3546 | for (i = 0; i < vsi->num_q_vectors; i++) |
41c445ff JB |
3547 | i40e_irq_dynamic_enable(vsi, i); |
3548 | } else { | |
40d72a50 | 3549 | i40e_irq_dynamic_enable_icr0(pf, true); |
41c445ff JB |
3550 | } |
3551 | ||
1022cb6c | 3552 | i40e_flush(&pf->hw); |
41c445ff JB |
3553 | return 0; |
3554 | } | |
3555 | ||
3556 | /** | |
3557 | * i40e_stop_misc_vector - Stop the vector that handles non-queue events | |
3558 | * @pf: board private structure | |
3559 | **/ | |
3560 | static void i40e_stop_misc_vector(struct i40e_pf *pf) | |
3561 | { | |
3562 | /* Disable ICR 0 */ | |
3563 | wr32(&pf->hw, I40E_PFINT_ICR0_ENA, 0); | |
3564 | i40e_flush(&pf->hw); | |
3565 | } | |
3566 | ||
3567 | /** | |
3568 | * i40e_intr - MSI/Legacy and non-queue interrupt handler | |
3569 | * @irq: interrupt number | |
3570 | * @data: pointer to a q_vector | |
3571 | * | |
3572 | * This is the handler used for all MSI/Legacy interrupts, and deals | |
3573 | * with both queue and non-queue interrupts. This is also used in | |
3574 | * MSIX mode to handle the non-queue interrupts. | |
3575 | **/ | |
3576 | static irqreturn_t i40e_intr(int irq, void *data) | |
3577 | { | |
3578 | struct i40e_pf *pf = (struct i40e_pf *)data; | |
3579 | struct i40e_hw *hw = &pf->hw; | |
5e823066 | 3580 | irqreturn_t ret = IRQ_NONE; |
41c445ff JB |
3581 | u32 icr0, icr0_remaining; |
3582 | u32 val, ena_mask; | |
3583 | ||
3584 | icr0 = rd32(hw, I40E_PFINT_ICR0); | |
5e823066 | 3585 | ena_mask = rd32(hw, I40E_PFINT_ICR0_ENA); |
41c445ff | 3586 | |
116a57d4 SN |
3587 | /* if sharing a legacy IRQ, we might get called w/o an intr pending */ |
3588 | if ((icr0 & I40E_PFINT_ICR0_INTEVENT_MASK) == 0) | |
5e823066 | 3589 | goto enable_intr; |
41c445ff | 3590 | |
cd92e72f SN |
3591 | /* if interrupt but no bits showing, must be SWINT */ |
3592 | if (((icr0 & ~I40E_PFINT_ICR0_INTEVENT_MASK) == 0) || | |
3593 | (icr0 & I40E_PFINT_ICR0_SWINT_MASK)) | |
3594 | pf->sw_int_count++; | |
3595 | ||
0d8e1439 ASJ |
3596 | if ((pf->flags & I40E_FLAG_IWARP_ENABLED) && |
3597 | (ena_mask & I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK)) { | |
3598 | ena_mask &= ~I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK; | |
3599 | icr0 &= ~I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK; | |
23bb6dc3 | 3600 | dev_dbg(&pf->pdev->dev, "cleared PE_CRITERR\n"); |
0d8e1439 ASJ |
3601 | } |
3602 | ||
41c445ff JB |
3603 | /* only q0 is used in MSI/Legacy mode, and none are used in MSIX */ |
3604 | if (icr0 & I40E_PFINT_ICR0_QUEUE_0_MASK) { | |
5d3465a1 AD |
3605 | struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi]; |
3606 | struct i40e_q_vector *q_vector = vsi->q_vectors[0]; | |
41c445ff | 3607 | |
a16ae2d5 ASJ |
3608 | /* We do not have a way to disarm Queue causes while leaving |
3609 | * interrupt enabled for all other causes, ideally | |
3610 | * interrupt should be disabled while we are in NAPI but | |
3611 | * this is not a performance path and napi_schedule() | |
3612 | * can deal with rescheduling. | |
3613 | */ | |
41c445ff | 3614 | if (!test_bit(__I40E_DOWN, &pf->state)) |
5d3465a1 | 3615 | napi_schedule_irqoff(&q_vector->napi); |
41c445ff JB |
3616 | } |
3617 | ||
3618 | if (icr0 & I40E_PFINT_ICR0_ADMINQ_MASK) { | |
3619 | ena_mask &= ~I40E_PFINT_ICR0_ENA_ADMINQ_MASK; | |
3620 | set_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state); | |
6e93d0c9 | 3621 | i40e_debug(&pf->hw, I40E_DEBUG_NVM, "AdminQ event\n"); |
41c445ff JB |
3622 | } |
3623 | ||
3624 | if (icr0 & I40E_PFINT_ICR0_MAL_DETECT_MASK) { | |
3625 | ena_mask &= ~I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK; | |
3626 | set_bit(__I40E_MDD_EVENT_PENDING, &pf->state); | |
3627 | } | |
3628 | ||
3629 | if (icr0 & I40E_PFINT_ICR0_VFLR_MASK) { | |
3630 | ena_mask &= ~I40E_PFINT_ICR0_ENA_VFLR_MASK; | |
3631 | set_bit(__I40E_VFLR_EVENT_PENDING, &pf->state); | |
3632 | } | |
3633 | ||
3634 | if (icr0 & I40E_PFINT_ICR0_GRST_MASK) { | |
3635 | if (!test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state)) | |
3636 | set_bit(__I40E_RESET_INTR_RECEIVED, &pf->state); | |
3637 | ena_mask &= ~I40E_PFINT_ICR0_ENA_GRST_MASK; | |
3638 | val = rd32(hw, I40E_GLGEN_RSTAT); | |
3639 | val = (val & I40E_GLGEN_RSTAT_RESET_TYPE_MASK) | |
3640 | >> I40E_GLGEN_RSTAT_RESET_TYPE_SHIFT; | |
4eb3f768 | 3641 | if (val == I40E_RESET_CORER) { |
41c445ff | 3642 | pf->corer_count++; |
4eb3f768 | 3643 | } else if (val == I40E_RESET_GLOBR) { |
41c445ff | 3644 | pf->globr_count++; |
4eb3f768 | 3645 | } else if (val == I40E_RESET_EMPR) { |
41c445ff | 3646 | pf->empr_count++; |
9df42d1a | 3647 | set_bit(__I40E_EMP_RESET_INTR_RECEIVED, &pf->state); |
4eb3f768 | 3648 | } |
41c445ff JB |
3649 | } |
3650 | ||
9c010ee0 ASJ |
3651 | if (icr0 & I40E_PFINT_ICR0_HMC_ERR_MASK) { |
3652 | icr0 &= ~I40E_PFINT_ICR0_HMC_ERR_MASK; | |
3653 | dev_info(&pf->pdev->dev, "HMC error interrupt\n"); | |
25fc0e65 ASJ |
3654 | dev_info(&pf->pdev->dev, "HMC error info 0x%x, HMC error data 0x%x\n", |
3655 | rd32(hw, I40E_PFHMC_ERRORINFO), | |
3656 | rd32(hw, I40E_PFHMC_ERRORDATA)); | |
9c010ee0 ASJ |
3657 | } |
3658 | ||
beb0dff1 JK |
3659 | if (icr0 & I40E_PFINT_ICR0_TIMESYNC_MASK) { |
3660 | u32 prttsyn_stat = rd32(hw, I40E_PRTTSYN_STAT_0); | |
3661 | ||
3662 | if (prttsyn_stat & I40E_PRTTSYN_STAT_0_TXTIME_MASK) { | |
cafa1fca | 3663 | icr0 &= ~I40E_PFINT_ICR0_ENA_TIMESYNC_MASK; |
beb0dff1 | 3664 | i40e_ptp_tx_hwtstamp(pf); |
beb0dff1 | 3665 | } |
beb0dff1 JK |
3666 | } |
3667 | ||
41c445ff JB |
3668 | /* If a critical error is pending we have no choice but to reset the |
3669 | * device. | |
3670 | * Report and mask out any remaining unexpected interrupts. | |
3671 | */ | |
3672 | icr0_remaining = icr0 & ena_mask; | |
3673 | if (icr0_remaining) { | |
3674 | dev_info(&pf->pdev->dev, "unhandled interrupt icr0=0x%08x\n", | |
3675 | icr0_remaining); | |
9c010ee0 | 3676 | if ((icr0_remaining & I40E_PFINT_ICR0_PE_CRITERR_MASK) || |
41c445ff | 3677 | (icr0_remaining & I40E_PFINT_ICR0_PCI_EXCEPTION_MASK) || |
c0c28975 | 3678 | (icr0_remaining & I40E_PFINT_ICR0_ECC_ERR_MASK)) { |
9c010ee0 ASJ |
3679 | dev_info(&pf->pdev->dev, "device will be reset\n"); |
3680 | set_bit(__I40E_PF_RESET_REQUESTED, &pf->state); | |
3681 | i40e_service_event_schedule(pf); | |
41c445ff JB |
3682 | } |
3683 | ena_mask &= ~icr0_remaining; | |
3684 | } | |
5e823066 | 3685 | ret = IRQ_HANDLED; |
41c445ff | 3686 | |
5e823066 | 3687 | enable_intr: |
41c445ff JB |
3688 | /* re-enable interrupt causes */ |
3689 | wr32(hw, I40E_PFINT_ICR0_ENA, ena_mask); | |
41c445ff JB |
3690 | if (!test_bit(__I40E_DOWN, &pf->state)) { |
3691 | i40e_service_event_schedule(pf); | |
40d72a50 | 3692 | i40e_irq_dynamic_enable_icr0(pf, false); |
41c445ff JB |
3693 | } |
3694 | ||
5e823066 | 3695 | return ret; |
41c445ff JB |
3696 | } |
3697 | ||
cbf61325 ASJ |
3698 | /** |
3699 | * i40e_clean_fdir_tx_irq - Reclaim resources after transmit completes | |
3700 | * @tx_ring: tx ring to clean | |
3701 | * @budget: how many cleans we're allowed | |
3702 | * | |
3703 | * Returns true if there's any budget left (e.g. the clean is finished) | |
3704 | **/ | |
3705 | static bool i40e_clean_fdir_tx_irq(struct i40e_ring *tx_ring, int budget) | |
3706 | { | |
3707 | struct i40e_vsi *vsi = tx_ring->vsi; | |
3708 | u16 i = tx_ring->next_to_clean; | |
3709 | struct i40e_tx_buffer *tx_buf; | |
3710 | struct i40e_tx_desc *tx_desc; | |
3711 | ||
3712 | tx_buf = &tx_ring->tx_bi[i]; | |
3713 | tx_desc = I40E_TX_DESC(tx_ring, i); | |
3714 | i -= tx_ring->count; | |
3715 | ||
3716 | do { | |
3717 | struct i40e_tx_desc *eop_desc = tx_buf->next_to_watch; | |
3718 | ||
3719 | /* if next_to_watch is not set then there is no work pending */ | |
3720 | if (!eop_desc) | |
3721 | break; | |
3722 | ||
3723 | /* prevent any other reads prior to eop_desc */ | |
3724 | read_barrier_depends(); | |
3725 | ||
3726 | /* if the descriptor isn't done, no work yet to do */ | |
3727 | if (!(eop_desc->cmd_type_offset_bsz & | |
3728 | cpu_to_le64(I40E_TX_DESC_DTYPE_DESC_DONE))) | |
3729 | break; | |
3730 | ||
3731 | /* clear next_to_watch to prevent false hangs */ | |
3732 | tx_buf->next_to_watch = NULL; | |
3733 | ||
49d7d933 ASJ |
3734 | tx_desc->buffer_addr = 0; |
3735 | tx_desc->cmd_type_offset_bsz = 0; | |
3736 | /* move past filter desc */ | |
3737 | tx_buf++; | |
3738 | tx_desc++; | |
3739 | i++; | |
3740 | if (unlikely(!i)) { | |
3741 | i -= tx_ring->count; | |
3742 | tx_buf = tx_ring->tx_bi; | |
3743 | tx_desc = I40E_TX_DESC(tx_ring, 0); | |
3744 | } | |
cbf61325 ASJ |
3745 | /* unmap skb header data */ |
3746 | dma_unmap_single(tx_ring->dev, | |
3747 | dma_unmap_addr(tx_buf, dma), | |
3748 | dma_unmap_len(tx_buf, len), | |
3749 | DMA_TO_DEVICE); | |
49d7d933 ASJ |
3750 | if (tx_buf->tx_flags & I40E_TX_FLAGS_FD_SB) |
3751 | kfree(tx_buf->raw_buf); | |
cbf61325 | 3752 | |
49d7d933 ASJ |
3753 | tx_buf->raw_buf = NULL; |
3754 | tx_buf->tx_flags = 0; | |
3755 | tx_buf->next_to_watch = NULL; | |
cbf61325 | 3756 | dma_unmap_len_set(tx_buf, len, 0); |
49d7d933 ASJ |
3757 | tx_desc->buffer_addr = 0; |
3758 | tx_desc->cmd_type_offset_bsz = 0; | |
cbf61325 | 3759 | |
49d7d933 | 3760 | /* move us past the eop_desc for start of next FD desc */ |
cbf61325 ASJ |
3761 | tx_buf++; |
3762 | tx_desc++; | |
3763 | i++; | |
3764 | if (unlikely(!i)) { | |
3765 | i -= tx_ring->count; | |
3766 | tx_buf = tx_ring->tx_bi; | |
3767 | tx_desc = I40E_TX_DESC(tx_ring, 0); | |
3768 | } | |
3769 | ||
3770 | /* update budget accounting */ | |
3771 | budget--; | |
3772 | } while (likely(budget)); | |
3773 | ||
3774 | i += tx_ring->count; | |
3775 | tx_ring->next_to_clean = i; | |
3776 | ||
6995b36c | 3777 | if (vsi->back->flags & I40E_FLAG_MSIX_ENABLED) |
7845548d | 3778 | i40e_irq_dynamic_enable(vsi, tx_ring->q_vector->v_idx); |
6995b36c | 3779 | |
cbf61325 ASJ |
3780 | return budget > 0; |
3781 | } | |
3782 | ||
3783 | /** | |
3784 | * i40e_fdir_clean_ring - Interrupt Handler for FDIR SB ring | |
3785 | * @irq: interrupt number | |
3786 | * @data: pointer to a q_vector | |
3787 | **/ | |
3788 | static irqreturn_t i40e_fdir_clean_ring(int irq, void *data) | |
3789 | { | |
3790 | struct i40e_q_vector *q_vector = data; | |
3791 | struct i40e_vsi *vsi; | |
3792 | ||
3793 | if (!q_vector->tx.ring) | |
3794 | return IRQ_HANDLED; | |
3795 | ||
3796 | vsi = q_vector->tx.ring->vsi; | |
3797 | i40e_clean_fdir_tx_irq(q_vector->tx.ring, vsi->work_limit); | |
3798 | ||
3799 | return IRQ_HANDLED; | |
3800 | } | |
3801 | ||
41c445ff | 3802 | /** |
cd0b6fa6 | 3803 | * i40e_map_vector_to_qp - Assigns the queue pair to the vector |
41c445ff JB |
3804 | * @vsi: the VSI being configured |
3805 | * @v_idx: vector index | |
cd0b6fa6 | 3806 | * @qp_idx: queue pair index |
41c445ff | 3807 | **/ |
26cdc443 | 3808 | static void i40e_map_vector_to_qp(struct i40e_vsi *vsi, int v_idx, int qp_idx) |
41c445ff | 3809 | { |
493fb300 | 3810 | struct i40e_q_vector *q_vector = vsi->q_vectors[v_idx]; |
9f65e15b AD |
3811 | struct i40e_ring *tx_ring = vsi->tx_rings[qp_idx]; |
3812 | struct i40e_ring *rx_ring = vsi->rx_rings[qp_idx]; | |
41c445ff JB |
3813 | |
3814 | tx_ring->q_vector = q_vector; | |
cd0b6fa6 AD |
3815 | tx_ring->next = q_vector->tx.ring; |
3816 | q_vector->tx.ring = tx_ring; | |
41c445ff | 3817 | q_vector->tx.count++; |
cd0b6fa6 AD |
3818 | |
3819 | rx_ring->q_vector = q_vector; | |
3820 | rx_ring->next = q_vector->rx.ring; | |
3821 | q_vector->rx.ring = rx_ring; | |
3822 | q_vector->rx.count++; | |
41c445ff JB |
3823 | } |
3824 | ||
3825 | /** | |
3826 | * i40e_vsi_map_rings_to_vectors - Maps descriptor rings to vectors | |
3827 | * @vsi: the VSI being configured | |
3828 | * | |
3829 | * This function maps descriptor rings to the queue-specific vectors | |
3830 | * we were allotted through the MSI-X enabling code. Ideally, we'd have | |
3831 | * one vector per queue pair, but on a constrained vector budget, we | |
3832 | * group the queue pairs as "efficiently" as possible. | |
3833 | **/ | |
3834 | static void i40e_vsi_map_rings_to_vectors(struct i40e_vsi *vsi) | |
3835 | { | |
3836 | int qp_remaining = vsi->num_queue_pairs; | |
3837 | int q_vectors = vsi->num_q_vectors; | |
cd0b6fa6 | 3838 | int num_ringpairs; |
41c445ff JB |
3839 | int v_start = 0; |
3840 | int qp_idx = 0; | |
3841 | ||
3842 | /* If we don't have enough vectors for a 1-to-1 mapping, we'll have to | |
3843 | * group them so there are multiple queues per vector. | |
70114ec4 ASJ |
3844 | * It is also important to go through all the vectors available to be |
3845 | * sure that if we don't use all the vectors, that the remaining vectors | |
3846 | * are cleared. This is especially important when decreasing the | |
3847 | * number of queues in use. | |
41c445ff | 3848 | */ |
70114ec4 | 3849 | for (; v_start < q_vectors; v_start++) { |
cd0b6fa6 AD |
3850 | struct i40e_q_vector *q_vector = vsi->q_vectors[v_start]; |
3851 | ||
3852 | num_ringpairs = DIV_ROUND_UP(qp_remaining, q_vectors - v_start); | |
3853 | ||
3854 | q_vector->num_ringpairs = num_ringpairs; | |
3855 | ||
3856 | q_vector->rx.count = 0; | |
3857 | q_vector->tx.count = 0; | |
3858 | q_vector->rx.ring = NULL; | |
3859 | q_vector->tx.ring = NULL; | |
3860 | ||
3861 | while (num_ringpairs--) { | |
26cdc443 | 3862 | i40e_map_vector_to_qp(vsi, v_start, qp_idx); |
cd0b6fa6 AD |
3863 | qp_idx++; |
3864 | qp_remaining--; | |
41c445ff JB |
3865 | } |
3866 | } | |
3867 | } | |
3868 | ||
3869 | /** | |
3870 | * i40e_vsi_request_irq - Request IRQ from the OS | |
3871 | * @vsi: the VSI being configured | |
3872 | * @basename: name for the vector | |
3873 | **/ | |
3874 | static int i40e_vsi_request_irq(struct i40e_vsi *vsi, char *basename) | |
3875 | { | |
3876 | struct i40e_pf *pf = vsi->back; | |
3877 | int err; | |
3878 | ||
3879 | if (pf->flags & I40E_FLAG_MSIX_ENABLED) | |
3880 | err = i40e_vsi_request_irq_msix(vsi, basename); | |
3881 | else if (pf->flags & I40E_FLAG_MSI_ENABLED) | |
3882 | err = request_irq(pf->pdev->irq, i40e_intr, 0, | |
b294ac70 | 3883 | pf->int_name, pf); |
41c445ff JB |
3884 | else |
3885 | err = request_irq(pf->pdev->irq, i40e_intr, IRQF_SHARED, | |
b294ac70 | 3886 | pf->int_name, pf); |
41c445ff JB |
3887 | |
3888 | if (err) | |
3889 | dev_info(&pf->pdev->dev, "request_irq failed, Error %d\n", err); | |
3890 | ||
3891 | return err; | |
3892 | } | |
3893 | ||
3894 | #ifdef CONFIG_NET_POLL_CONTROLLER | |
3895 | /** | |
d89d967f | 3896 | * i40e_netpoll - A Polling 'interrupt' handler |
41c445ff JB |
3897 | * @netdev: network interface device structure |
3898 | * | |
3899 | * This is used by netconsole to send skbs without having to re-enable | |
3900 | * interrupts. It's not called while the normal interrupt routine is executing. | |
3901 | **/ | |
3902 | static void i40e_netpoll(struct net_device *netdev) | |
3903 | { | |
3904 | struct i40e_netdev_priv *np = netdev_priv(netdev); | |
3905 | struct i40e_vsi *vsi = np->vsi; | |
3906 | struct i40e_pf *pf = vsi->back; | |
3907 | int i; | |
3908 | ||
3909 | /* if interface is down do nothing */ | |
d19cb64b | 3910 | if (test_bit(__I40E_VSI_DOWN, &vsi->state)) |
41c445ff JB |
3911 | return; |
3912 | ||
41c445ff JB |
3913 | if (pf->flags & I40E_FLAG_MSIX_ENABLED) { |
3914 | for (i = 0; i < vsi->num_q_vectors; i++) | |
493fb300 | 3915 | i40e_msix_clean_rings(0, vsi->q_vectors[i]); |
41c445ff JB |
3916 | } else { |
3917 | i40e_intr(pf->pdev->irq, netdev); | |
3918 | } | |
41c445ff JB |
3919 | } |
3920 | #endif | |
3921 | ||
c768e490 JK |
3922 | #define I40E_QTX_ENA_WAIT_COUNT 50 |
3923 | ||
23527308 NP |
3924 | /** |
3925 | * i40e_pf_txq_wait - Wait for a PF's Tx queue to be enabled or disabled | |
3926 | * @pf: the PF being configured | |
3927 | * @pf_q: the PF queue | |
3928 | * @enable: enable or disable state of the queue | |
3929 | * | |
3930 | * This routine will wait for the given Tx queue of the PF to reach the | |
3931 | * enabled or disabled state. | |
3932 | * Returns -ETIMEDOUT in case of failing to reach the requested state after | |
3933 | * multiple retries; else will return 0 in case of success. | |
3934 | **/ | |
3935 | static int i40e_pf_txq_wait(struct i40e_pf *pf, int pf_q, bool enable) | |
3936 | { | |
3937 | int i; | |
3938 | u32 tx_reg; | |
3939 | ||
3940 | for (i = 0; i < I40E_QUEUE_WAIT_RETRY_LIMIT; i++) { | |
3941 | tx_reg = rd32(&pf->hw, I40E_QTX_ENA(pf_q)); | |
3942 | if (enable == !!(tx_reg & I40E_QTX_ENA_QENA_STAT_MASK)) | |
3943 | break; | |
3944 | ||
f98a2006 | 3945 | usleep_range(10, 20); |
23527308 NP |
3946 | } |
3947 | if (i >= I40E_QUEUE_WAIT_RETRY_LIMIT) | |
3948 | return -ETIMEDOUT; | |
3949 | ||
3950 | return 0; | |
3951 | } | |
3952 | ||
c768e490 JK |
3953 | /** |
3954 | * i40e_control_tx_q - Start or stop a particular Tx queue | |
3955 | * @pf: the PF structure | |
3956 | * @pf_q: the PF queue to configure | |
3957 | * @enable: start or stop the queue | |
3958 | * | |
3959 | * This function enables or disables a single queue. Note that any delay | |
3960 | * required after the operation is expected to be handled by the caller of | |
3961 | * this function. | |
3962 | **/ | |
3963 | static void i40e_control_tx_q(struct i40e_pf *pf, int pf_q, bool enable) | |
3964 | { | |
3965 | struct i40e_hw *hw = &pf->hw; | |
3966 | u32 tx_reg; | |
3967 | int i; | |
3968 | ||
3969 | /* warn the TX unit of coming changes */ | |
3970 | i40e_pre_tx_queue_cfg(&pf->hw, pf_q, enable); | |
3971 | if (!enable) | |
3972 | usleep_range(10, 20); | |
3973 | ||
3974 | for (i = 0; i < I40E_QTX_ENA_WAIT_COUNT; i++) { | |
3975 | tx_reg = rd32(hw, I40E_QTX_ENA(pf_q)); | |
3976 | if (((tx_reg >> I40E_QTX_ENA_QENA_REQ_SHIFT) & 1) == | |
3977 | ((tx_reg >> I40E_QTX_ENA_QENA_STAT_SHIFT) & 1)) | |
3978 | break; | |
3979 | usleep_range(1000, 2000); | |
3980 | } | |
3981 | ||
3982 | /* Skip if the queue is already in the requested state */ | |
3983 | if (enable == !!(tx_reg & I40E_QTX_ENA_QENA_STAT_MASK)) | |
3984 | return; | |
3985 | ||
3986 | /* turn on/off the queue */ | |
3987 | if (enable) { | |
3988 | wr32(hw, I40E_QTX_HEAD(pf_q), 0); | |
3989 | tx_reg |= I40E_QTX_ENA_QENA_REQ_MASK; | |
3990 | } else { | |
3991 | tx_reg &= ~I40E_QTX_ENA_QENA_REQ_MASK; | |
3992 | } | |
3993 | ||
3994 | wr32(hw, I40E_QTX_ENA(pf_q), tx_reg); | |
3995 | } | |
3996 | ||
41c445ff JB |
3997 | /** |
3998 | * i40e_vsi_control_tx - Start or stop a VSI's rings | |
3999 | * @vsi: the VSI being configured | |
4000 | * @enable: start or stop the rings | |
4001 | **/ | |
4002 | static int i40e_vsi_control_tx(struct i40e_vsi *vsi, bool enable) | |
4003 | { | |
4004 | struct i40e_pf *pf = vsi->back; | |
c768e490 | 4005 | int i, pf_q, ret = 0; |
41c445ff JB |
4006 | |
4007 | pf_q = vsi->base_queue; | |
4008 | for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) { | |
c768e490 | 4009 | i40e_control_tx_q(pf, pf_q, enable); |
351499ab | 4010 | |
41c445ff | 4011 | /* wait for the change to finish */ |
23527308 NP |
4012 | ret = i40e_pf_txq_wait(pf, pf_q, enable); |
4013 | if (ret) { | |
4014 | dev_info(&pf->pdev->dev, | |
fb43201f SN |
4015 | "VSI seid %d Tx ring %d %sable timeout\n", |
4016 | vsi->seid, pf_q, (enable ? "en" : "dis")); | |
23527308 | 4017 | break; |
41c445ff JB |
4018 | } |
4019 | } | |
4020 | ||
23527308 NP |
4021 | return ret; |
4022 | } | |
4023 | ||
4024 | /** | |
4025 | * i40e_pf_rxq_wait - Wait for a PF's Rx queue to be enabled or disabled | |
4026 | * @pf: the PF being configured | |
4027 | * @pf_q: the PF queue | |
4028 | * @enable: enable or disable state of the queue | |
4029 | * | |
4030 | * This routine will wait for the given Rx queue of the PF to reach the | |
4031 | * enabled or disabled state. | |
4032 | * Returns -ETIMEDOUT in case of failing to reach the requested state after | |
4033 | * multiple retries; else will return 0 in case of success. | |
4034 | **/ | |
4035 | static int i40e_pf_rxq_wait(struct i40e_pf *pf, int pf_q, bool enable) | |
4036 | { | |
4037 | int i; | |
4038 | u32 rx_reg; | |
4039 | ||
4040 | for (i = 0; i < I40E_QUEUE_WAIT_RETRY_LIMIT; i++) { | |
4041 | rx_reg = rd32(&pf->hw, I40E_QRX_ENA(pf_q)); | |
4042 | if (enable == !!(rx_reg & I40E_QRX_ENA_QENA_STAT_MASK)) | |
4043 | break; | |
4044 | ||
f98a2006 | 4045 | usleep_range(10, 20); |
23527308 NP |
4046 | } |
4047 | if (i >= I40E_QUEUE_WAIT_RETRY_LIMIT) | |
4048 | return -ETIMEDOUT; | |
7134f9ce | 4049 | |
41c445ff JB |
4050 | return 0; |
4051 | } | |
4052 | ||
c768e490 JK |
4053 | /** |
4054 | * i40e_control_rx_q - Start or stop a particular Rx queue | |
4055 | * @pf: the PF structure | |
4056 | * @pf_q: the PF queue to configure | |
4057 | * @enable: start or stop the queue | |
4058 | * | |
4059 | * This function enables or disables a single queue. Note that any delay | |
4060 | * required after the operation is expected to be handled by the caller of | |
4061 | * this function. | |
4062 | **/ | |
4063 | static void i40e_control_rx_q(struct i40e_pf *pf, int pf_q, bool enable) | |
4064 | { | |
4065 | struct i40e_hw *hw = &pf->hw; | |
4066 | u32 rx_reg; | |
4067 | int i; | |
4068 | ||
4069 | for (i = 0; i < I40E_QTX_ENA_WAIT_COUNT; i++) { | |
4070 | rx_reg = rd32(hw, I40E_QRX_ENA(pf_q)); | |
4071 | if (((rx_reg >> I40E_QRX_ENA_QENA_REQ_SHIFT) & 1) == | |
4072 | ((rx_reg >> I40E_QRX_ENA_QENA_STAT_SHIFT) & 1)) | |
4073 | break; | |
4074 | usleep_range(1000, 2000); | |
4075 | } | |
4076 | ||
4077 | /* Skip if the queue is already in the requested state */ | |
4078 | if (enable == !!(rx_reg & I40E_QRX_ENA_QENA_STAT_MASK)) | |
4079 | return; | |
4080 | ||
4081 | /* turn on/off the queue */ | |
4082 | if (enable) | |
4083 | rx_reg |= I40E_QRX_ENA_QENA_REQ_MASK; | |
4084 | else | |
4085 | rx_reg &= ~I40E_QRX_ENA_QENA_REQ_MASK; | |
4086 | ||
4087 | wr32(hw, I40E_QRX_ENA(pf_q), rx_reg); | |
4088 | } | |
4089 | ||
41c445ff JB |
4090 | /** |
4091 | * i40e_vsi_control_rx - Start or stop a VSI's rings | |
4092 | * @vsi: the VSI being configured | |
4093 | * @enable: start or stop the rings | |
4094 | **/ | |
4095 | static int i40e_vsi_control_rx(struct i40e_vsi *vsi, bool enable) | |
4096 | { | |
4097 | struct i40e_pf *pf = vsi->back; | |
c768e490 | 4098 | int i, pf_q, ret = 0; |
41c445ff JB |
4099 | |
4100 | pf_q = vsi->base_queue; | |
4101 | for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) { | |
c768e490 | 4102 | i40e_control_rx_q(pf, pf_q, enable); |
41c445ff | 4103 | |
41c445ff | 4104 | /* wait for the change to finish */ |
23527308 NP |
4105 | ret = i40e_pf_rxq_wait(pf, pf_q, enable); |
4106 | if (ret) { | |
4107 | dev_info(&pf->pdev->dev, | |
fb43201f SN |
4108 | "VSI seid %d Rx ring %d %sable timeout\n", |
4109 | vsi->seid, pf_q, (enable ? "en" : "dis")); | |
23527308 | 4110 | break; |
41c445ff JB |
4111 | } |
4112 | } | |
4113 | ||
d08a9f6c WC |
4114 | /* Due to HW errata, on Rx disable only, the register can indicate done |
4115 | * before it really is. Needs 50ms to be sure | |
4116 | */ | |
4117 | if (!enable) | |
4118 | mdelay(50); | |
4119 | ||
23527308 | 4120 | return ret; |
41c445ff JB |
4121 | } |
4122 | ||
4123 | /** | |
3aa7b74d | 4124 | * i40e_vsi_start_rings - Start a VSI's rings |
41c445ff | 4125 | * @vsi: the VSI being configured |
41c445ff | 4126 | **/ |
3aa7b74d | 4127 | int i40e_vsi_start_rings(struct i40e_vsi *vsi) |
41c445ff | 4128 | { |
3b867b28 | 4129 | int ret = 0; |
41c445ff JB |
4130 | |
4131 | /* do rx first for enable and last for disable */ | |
3aa7b74d FS |
4132 | ret = i40e_vsi_control_rx(vsi, true); |
4133 | if (ret) | |
4134 | return ret; | |
4135 | ret = i40e_vsi_control_tx(vsi, true); | |
41c445ff JB |
4136 | |
4137 | return ret; | |
4138 | } | |
4139 | ||
3aa7b74d FS |
4140 | /** |
4141 | * i40e_vsi_stop_rings - Stop a VSI's rings | |
4142 | * @vsi: the VSI being configured | |
4143 | **/ | |
4144 | void i40e_vsi_stop_rings(struct i40e_vsi *vsi) | |
4145 | { | |
3480756f JK |
4146 | /* When port TX is suspended, don't wait */ |
4147 | if (test_bit(__I40E_PORT_SUSPENDED, &vsi->back->state)) | |
4148 | return i40e_vsi_stop_rings_no_wait(vsi); | |
4149 | ||
3aa7b74d FS |
4150 | /* do rx first for enable and last for disable |
4151 | * Ignore return value, we need to shutdown whatever we can | |
4152 | */ | |
4153 | i40e_vsi_control_tx(vsi, false); | |
4154 | i40e_vsi_control_rx(vsi, false); | |
4155 | } | |
4156 | ||
e4b433f4 JK |
4157 | /** |
4158 | * i40e_vsi_stop_rings_no_wait - Stop a VSI's rings and do not delay | |
4159 | * @vsi: the VSI being shutdown | |
4160 | * | |
4161 | * This function stops all the rings for a VSI but does not delay to verify | |
4162 | * that rings have been disabled. It is expected that the caller is shutting | |
4163 | * down multiple VSIs at once and will delay together for all the VSIs after | |
4164 | * initiating the shutdown. This is particularly useful for shutting down lots | |
4165 | * of VFs together. Otherwise, a large delay can be incurred while configuring | |
4166 | * each VSI in serial. | |
4167 | **/ | |
4168 | void i40e_vsi_stop_rings_no_wait(struct i40e_vsi *vsi) | |
4169 | { | |
4170 | struct i40e_pf *pf = vsi->back; | |
4171 | int i, pf_q; | |
4172 | ||
4173 | pf_q = vsi->base_queue; | |
4174 | for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) { | |
4175 | i40e_control_tx_q(pf, pf_q, false); | |
4176 | i40e_control_rx_q(pf, pf_q, false); | |
4177 | } | |
4178 | } | |
4179 | ||
41c445ff JB |
4180 | /** |
4181 | * i40e_vsi_free_irq - Free the irq association with the OS | |
4182 | * @vsi: the VSI being configured | |
4183 | **/ | |
4184 | static void i40e_vsi_free_irq(struct i40e_vsi *vsi) | |
4185 | { | |
4186 | struct i40e_pf *pf = vsi->back; | |
4187 | struct i40e_hw *hw = &pf->hw; | |
4188 | int base = vsi->base_vector; | |
4189 | u32 val, qp; | |
4190 | int i; | |
4191 | ||
4192 | if (pf->flags & I40E_FLAG_MSIX_ENABLED) { | |
4193 | if (!vsi->q_vectors) | |
4194 | return; | |
4195 | ||
63741846 SN |
4196 | if (!vsi->irqs_ready) |
4197 | return; | |
4198 | ||
4199 | vsi->irqs_ready = false; | |
41c445ff | 4200 | for (i = 0; i < vsi->num_q_vectors; i++) { |
96db776a AB |
4201 | int irq_num; |
4202 | u16 vector; | |
4203 | ||
4204 | vector = i + base; | |
4205 | irq_num = pf->msix_entries[vector].vector; | |
41c445ff JB |
4206 | |
4207 | /* free only the irqs that were actually requested */ | |
78681b1f SN |
4208 | if (!vsi->q_vectors[i] || |
4209 | !vsi->q_vectors[i]->num_ringpairs) | |
41c445ff JB |
4210 | continue; |
4211 | ||
96db776a AB |
4212 | /* clear the affinity notifier in the IRQ descriptor */ |
4213 | irq_set_affinity_notifier(irq_num, NULL); | |
41c445ff | 4214 | /* clear the affinity_mask in the IRQ descriptor */ |
96db776a AB |
4215 | irq_set_affinity_hint(irq_num, NULL); |
4216 | synchronize_irq(irq_num); | |
4217 | free_irq(irq_num, vsi->q_vectors[i]); | |
41c445ff JB |
4218 | |
4219 | /* Tear down the interrupt queue link list | |
4220 | * | |
4221 | * We know that they come in pairs and always | |
4222 | * the Rx first, then the Tx. To clear the | |
4223 | * link list, stick the EOL value into the | |
4224 | * next_q field of the registers. | |
4225 | */ | |
4226 | val = rd32(hw, I40E_PFINT_LNKLSTN(vector - 1)); | |
4227 | qp = (val & I40E_PFINT_LNKLSTN_FIRSTQ_INDX_MASK) | |
4228 | >> I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT; | |
4229 | val |= I40E_QUEUE_END_OF_LIST | |
4230 | << I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT; | |
4231 | wr32(hw, I40E_PFINT_LNKLSTN(vector - 1), val); | |
4232 | ||
4233 | while (qp != I40E_QUEUE_END_OF_LIST) { | |
4234 | u32 next; | |
4235 | ||
4236 | val = rd32(hw, I40E_QINT_RQCTL(qp)); | |
4237 | ||
4238 | val &= ~(I40E_QINT_RQCTL_MSIX_INDX_MASK | | |
4239 | I40E_QINT_RQCTL_MSIX0_INDX_MASK | | |
4240 | I40E_QINT_RQCTL_CAUSE_ENA_MASK | | |
4241 | I40E_QINT_RQCTL_INTEVENT_MASK); | |
4242 | ||
4243 | val |= (I40E_QINT_RQCTL_ITR_INDX_MASK | | |
4244 | I40E_QINT_RQCTL_NEXTQ_INDX_MASK); | |
4245 | ||
4246 | wr32(hw, I40E_QINT_RQCTL(qp), val); | |
4247 | ||
4248 | val = rd32(hw, I40E_QINT_TQCTL(qp)); | |
4249 | ||
4250 | next = (val & I40E_QINT_TQCTL_NEXTQ_INDX_MASK) | |
4251 | >> I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT; | |
4252 | ||
4253 | val &= ~(I40E_QINT_TQCTL_MSIX_INDX_MASK | | |
4254 | I40E_QINT_TQCTL_MSIX0_INDX_MASK | | |
4255 | I40E_QINT_TQCTL_CAUSE_ENA_MASK | | |
4256 | I40E_QINT_TQCTL_INTEVENT_MASK); | |
4257 | ||
4258 | val |= (I40E_QINT_TQCTL_ITR_INDX_MASK | | |
4259 | I40E_QINT_TQCTL_NEXTQ_INDX_MASK); | |
4260 | ||
4261 | wr32(hw, I40E_QINT_TQCTL(qp), val); | |
4262 | qp = next; | |
4263 | } | |
4264 | } | |
4265 | } else { | |
4266 | free_irq(pf->pdev->irq, pf); | |
4267 | ||
4268 | val = rd32(hw, I40E_PFINT_LNKLST0); | |
4269 | qp = (val & I40E_PFINT_LNKLSTN_FIRSTQ_INDX_MASK) | |
4270 | >> I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT; | |
4271 | val |= I40E_QUEUE_END_OF_LIST | |
4272 | << I40E_PFINT_LNKLST0_FIRSTQ_INDX_SHIFT; | |
4273 | wr32(hw, I40E_PFINT_LNKLST0, val); | |
4274 | ||
4275 | val = rd32(hw, I40E_QINT_RQCTL(qp)); | |
4276 | val &= ~(I40E_QINT_RQCTL_MSIX_INDX_MASK | | |
4277 | I40E_QINT_RQCTL_MSIX0_INDX_MASK | | |
4278 | I40E_QINT_RQCTL_CAUSE_ENA_MASK | | |
4279 | I40E_QINT_RQCTL_INTEVENT_MASK); | |
4280 | ||
4281 | val |= (I40E_QINT_RQCTL_ITR_INDX_MASK | | |
4282 | I40E_QINT_RQCTL_NEXTQ_INDX_MASK); | |
4283 | ||
4284 | wr32(hw, I40E_QINT_RQCTL(qp), val); | |
4285 | ||
4286 | val = rd32(hw, I40E_QINT_TQCTL(qp)); | |
4287 | ||
4288 | val &= ~(I40E_QINT_TQCTL_MSIX_INDX_MASK | | |
4289 | I40E_QINT_TQCTL_MSIX0_INDX_MASK | | |
4290 | I40E_QINT_TQCTL_CAUSE_ENA_MASK | | |
4291 | I40E_QINT_TQCTL_INTEVENT_MASK); | |
4292 | ||
4293 | val |= (I40E_QINT_TQCTL_ITR_INDX_MASK | | |
4294 | I40E_QINT_TQCTL_NEXTQ_INDX_MASK); | |
4295 | ||
4296 | wr32(hw, I40E_QINT_TQCTL(qp), val); | |
4297 | } | |
4298 | } | |
4299 | ||
493fb300 AD |
4300 | /** |
4301 | * i40e_free_q_vector - Free memory allocated for specific interrupt vector | |
4302 | * @vsi: the VSI being configured | |
4303 | * @v_idx: Index of vector to be freed | |
4304 | * | |
4305 | * This function frees the memory allocated to the q_vector. In addition if | |
4306 | * NAPI is enabled it will delete any references to the NAPI struct prior | |
4307 | * to freeing the q_vector. | |
4308 | **/ | |
4309 | static void i40e_free_q_vector(struct i40e_vsi *vsi, int v_idx) | |
4310 | { | |
4311 | struct i40e_q_vector *q_vector = vsi->q_vectors[v_idx]; | |
cd0b6fa6 | 4312 | struct i40e_ring *ring; |
493fb300 AD |
4313 | |
4314 | if (!q_vector) | |
4315 | return; | |
4316 | ||
4317 | /* disassociate q_vector from rings */ | |
cd0b6fa6 AD |
4318 | i40e_for_each_ring(ring, q_vector->tx) |
4319 | ring->q_vector = NULL; | |
4320 | ||
4321 | i40e_for_each_ring(ring, q_vector->rx) | |
4322 | ring->q_vector = NULL; | |
493fb300 AD |
4323 | |
4324 | /* only VSI w/ an associated netdev is set up w/ NAPI */ | |
4325 | if (vsi->netdev) | |
4326 | netif_napi_del(&q_vector->napi); | |
4327 | ||
4328 | vsi->q_vectors[v_idx] = NULL; | |
4329 | ||
4330 | kfree_rcu(q_vector, rcu); | |
4331 | } | |
4332 | ||
41c445ff JB |
4333 | /** |
4334 | * i40e_vsi_free_q_vectors - Free memory allocated for interrupt vectors | |
4335 | * @vsi: the VSI being un-configured | |
4336 | * | |
4337 | * This frees the memory allocated to the q_vectors and | |
4338 | * deletes references to the NAPI struct. | |
4339 | **/ | |
4340 | static void i40e_vsi_free_q_vectors(struct i40e_vsi *vsi) | |
4341 | { | |
4342 | int v_idx; | |
4343 | ||
493fb300 AD |
4344 | for (v_idx = 0; v_idx < vsi->num_q_vectors; v_idx++) |
4345 | i40e_free_q_vector(vsi, v_idx); | |
41c445ff JB |
4346 | } |
4347 | ||
4348 | /** | |
4349 | * i40e_reset_interrupt_capability - Disable interrupt setup in OS | |
4350 | * @pf: board private structure | |
4351 | **/ | |
4352 | static void i40e_reset_interrupt_capability(struct i40e_pf *pf) | |
4353 | { | |
4354 | /* If we're in Legacy mode, the interrupt was cleaned in vsi_close */ | |
4355 | if (pf->flags & I40E_FLAG_MSIX_ENABLED) { | |
4356 | pci_disable_msix(pf->pdev); | |
4357 | kfree(pf->msix_entries); | |
4358 | pf->msix_entries = NULL; | |
3b444399 SN |
4359 | kfree(pf->irq_pile); |
4360 | pf->irq_pile = NULL; | |
41c445ff JB |
4361 | } else if (pf->flags & I40E_FLAG_MSI_ENABLED) { |
4362 | pci_disable_msi(pf->pdev); | |
4363 | } | |
4364 | pf->flags &= ~(I40E_FLAG_MSIX_ENABLED | I40E_FLAG_MSI_ENABLED); | |
4365 | } | |
4366 | ||
4367 | /** | |
4368 | * i40e_clear_interrupt_scheme - Clear the current interrupt scheme settings | |
4369 | * @pf: board private structure | |
4370 | * | |
4371 | * We go through and clear interrupt specific resources and reset the structure | |
4372 | * to pre-load conditions | |
4373 | **/ | |
4374 | static void i40e_clear_interrupt_scheme(struct i40e_pf *pf) | |
4375 | { | |
4376 | int i; | |
4377 | ||
e147758d | 4378 | i40e_stop_misc_vector(pf); |
69278398 | 4379 | if (pf->flags & I40E_FLAG_MSIX_ENABLED && pf->msix_entries) { |
e147758d SN |
4380 | synchronize_irq(pf->msix_entries[0].vector); |
4381 | free_irq(pf->msix_entries[0].vector, pf); | |
4382 | } | |
4383 | ||
e3219ce6 ASJ |
4384 | i40e_put_lump(pf->irq_pile, pf->iwarp_base_vector, |
4385 | I40E_IWARP_IRQ_PILE_ID); | |
4386 | ||
41c445ff | 4387 | i40e_put_lump(pf->irq_pile, 0, I40E_PILE_VALID_BIT-1); |
505682cd | 4388 | for (i = 0; i < pf->num_alloc_vsi; i++) |
41c445ff JB |
4389 | if (pf->vsi[i]) |
4390 | i40e_vsi_free_q_vectors(pf->vsi[i]); | |
4391 | i40e_reset_interrupt_capability(pf); | |
4392 | } | |
4393 | ||
4394 | /** | |
4395 | * i40e_napi_enable_all - Enable NAPI for all q_vectors in the VSI | |
4396 | * @vsi: the VSI being configured | |
4397 | **/ | |
4398 | static void i40e_napi_enable_all(struct i40e_vsi *vsi) | |
4399 | { | |
4400 | int q_idx; | |
4401 | ||
4402 | if (!vsi->netdev) | |
4403 | return; | |
4404 | ||
13a8cd19 AD |
4405 | for (q_idx = 0; q_idx < vsi->num_q_vectors; q_idx++) { |
4406 | struct i40e_q_vector *q_vector = vsi->q_vectors[q_idx]; | |
4407 | ||
4408 | if (q_vector->rx.ring || q_vector->tx.ring) | |
4409 | napi_enable(&q_vector->napi); | |
4410 | } | |
41c445ff JB |
4411 | } |
4412 | ||
4413 | /** | |
4414 | * i40e_napi_disable_all - Disable NAPI for all q_vectors in the VSI | |
4415 | * @vsi: the VSI being configured | |
4416 | **/ | |
4417 | static void i40e_napi_disable_all(struct i40e_vsi *vsi) | |
4418 | { | |
4419 | int q_idx; | |
4420 | ||
4421 | if (!vsi->netdev) | |
4422 | return; | |
4423 | ||
13a8cd19 AD |
4424 | for (q_idx = 0; q_idx < vsi->num_q_vectors; q_idx++) { |
4425 | struct i40e_q_vector *q_vector = vsi->q_vectors[q_idx]; | |
4426 | ||
4427 | if (q_vector->rx.ring || q_vector->tx.ring) | |
4428 | napi_disable(&q_vector->napi); | |
4429 | } | |
41c445ff JB |
4430 | } |
4431 | ||
90ef8d47 SN |
4432 | /** |
4433 | * i40e_vsi_close - Shut down a VSI | |
4434 | * @vsi: the vsi to be quelled | |
4435 | **/ | |
4436 | static void i40e_vsi_close(struct i40e_vsi *vsi) | |
4437 | { | |
0ef2d5af | 4438 | struct i40e_pf *pf = vsi->back; |
d19cb64b | 4439 | if (!test_and_set_bit(__I40E_VSI_DOWN, &vsi->state)) |
90ef8d47 SN |
4440 | i40e_down(vsi); |
4441 | i40e_vsi_free_irq(vsi); | |
4442 | i40e_vsi_free_tx_resources(vsi); | |
4443 | i40e_vsi_free_rx_resources(vsi); | |
92faef85 | 4444 | vsi->current_netdev_flags = 0; |
0ef2d5af MW |
4445 | pf->flags |= I40E_FLAG_SERVICE_CLIENT_REQUESTED; |
4446 | if (test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state)) | |
4447 | pf->flags |= I40E_FLAG_CLIENT_RESET; | |
90ef8d47 SN |
4448 | } |
4449 | ||
41c445ff JB |
4450 | /** |
4451 | * i40e_quiesce_vsi - Pause a given VSI | |
4452 | * @vsi: the VSI being paused | |
4453 | **/ | |
4454 | static void i40e_quiesce_vsi(struct i40e_vsi *vsi) | |
4455 | { | |
d19cb64b | 4456 | if (test_bit(__I40E_VSI_DOWN, &vsi->state)) |
41c445ff JB |
4457 | return; |
4458 | ||
d19cb64b | 4459 | set_bit(__I40E_VSI_NEEDS_RESTART, &vsi->state); |
6995b36c | 4460 | if (vsi->netdev && netif_running(vsi->netdev)) |
41c445ff | 4461 | vsi->netdev->netdev_ops->ndo_stop(vsi->netdev); |
6995b36c | 4462 | else |
90ef8d47 | 4463 | i40e_vsi_close(vsi); |
41c445ff JB |
4464 | } |
4465 | ||
4466 | /** | |
4467 | * i40e_unquiesce_vsi - Resume a given VSI | |
4468 | * @vsi: the VSI being resumed | |
4469 | **/ | |
4470 | static void i40e_unquiesce_vsi(struct i40e_vsi *vsi) | |
4471 | { | |
d19cb64b | 4472 | if (!test_and_clear_bit(__I40E_VSI_NEEDS_RESTART, &vsi->state)) |
41c445ff JB |
4473 | return; |
4474 | ||
41c445ff JB |
4475 | if (vsi->netdev && netif_running(vsi->netdev)) |
4476 | vsi->netdev->netdev_ops->ndo_open(vsi->netdev); | |
4477 | else | |
8276f757 | 4478 | i40e_vsi_open(vsi); /* this clears the DOWN bit */ |
41c445ff JB |
4479 | } |
4480 | ||
4481 | /** | |
4482 | * i40e_pf_quiesce_all_vsi - Pause all VSIs on a PF | |
4483 | * @pf: the PF | |
4484 | **/ | |
4485 | static void i40e_pf_quiesce_all_vsi(struct i40e_pf *pf) | |
4486 | { | |
4487 | int v; | |
4488 | ||
505682cd | 4489 | for (v = 0; v < pf->num_alloc_vsi; v++) { |
41c445ff JB |
4490 | if (pf->vsi[v]) |
4491 | i40e_quiesce_vsi(pf->vsi[v]); | |
4492 | } | |
4493 | } | |
4494 | ||
4495 | /** | |
4496 | * i40e_pf_unquiesce_all_vsi - Resume all VSIs on a PF | |
4497 | * @pf: the PF | |
4498 | **/ | |
4499 | static void i40e_pf_unquiesce_all_vsi(struct i40e_pf *pf) | |
4500 | { | |
4501 | int v; | |
4502 | ||
505682cd | 4503 | for (v = 0; v < pf->num_alloc_vsi; v++) { |
41c445ff JB |
4504 | if (pf->vsi[v]) |
4505 | i40e_unquiesce_vsi(pf->vsi[v]); | |
4506 | } | |
4507 | } | |
4508 | ||
69129dc3 | 4509 | /** |
3fe06f41 | 4510 | * i40e_vsi_wait_queues_disabled - Wait for VSI's queues to be disabled |
69129dc3 NP |
4511 | * @vsi: the VSI being configured |
4512 | * | |
af26ce2d | 4513 | * Wait until all queues on a given VSI have been disabled. |
69129dc3 | 4514 | **/ |
e4b433f4 | 4515 | int i40e_vsi_wait_queues_disabled(struct i40e_vsi *vsi) |
69129dc3 NP |
4516 | { |
4517 | struct i40e_pf *pf = vsi->back; | |
4518 | int i, pf_q, ret; | |
4519 | ||
4520 | pf_q = vsi->base_queue; | |
4521 | for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) { | |
af26ce2d | 4522 | /* Check and wait for the Tx queue */ |
69129dc3 NP |
4523 | ret = i40e_pf_txq_wait(pf, pf_q, false); |
4524 | if (ret) { | |
4525 | dev_info(&pf->pdev->dev, | |
fb43201f SN |
4526 | "VSI seid %d Tx ring %d disable timeout\n", |
4527 | vsi->seid, pf_q); | |
69129dc3 NP |
4528 | return ret; |
4529 | } | |
af26ce2d | 4530 | /* Check and wait for the Tx queue */ |
3fe06f41 NP |
4531 | ret = i40e_pf_rxq_wait(pf, pf_q, false); |
4532 | if (ret) { | |
4533 | dev_info(&pf->pdev->dev, | |
4534 | "VSI seid %d Rx ring %d disable timeout\n", | |
4535 | vsi->seid, pf_q); | |
4536 | return ret; | |
4537 | } | |
4538 | } | |
4539 | ||
69129dc3 NP |
4540 | return 0; |
4541 | } | |
4542 | ||
e4b433f4 | 4543 | #ifdef CONFIG_I40E_DCB |
69129dc3 | 4544 | /** |
3fe06f41 | 4545 | * i40e_pf_wait_queues_disabled - Wait for all queues of PF VSIs to be disabled |
69129dc3 NP |
4546 | * @pf: the PF |
4547 | * | |
3fe06f41 | 4548 | * This function waits for the queues to be in disabled state for all the |
69129dc3 NP |
4549 | * VSIs that are managed by this PF. |
4550 | **/ | |
3fe06f41 | 4551 | static int i40e_pf_wait_queues_disabled(struct i40e_pf *pf) |
69129dc3 NP |
4552 | { |
4553 | int v, ret = 0; | |
4554 | ||
4555 | for (v = 0; v < pf->hw.func_caps.num_vsis; v++) { | |
c76cb6ed | 4556 | if (pf->vsi[v]) { |
3fe06f41 | 4557 | ret = i40e_vsi_wait_queues_disabled(pf->vsi[v]); |
69129dc3 NP |
4558 | if (ret) |
4559 | break; | |
4560 | } | |
4561 | } | |
4562 | ||
4563 | return ret; | |
4564 | } | |
4565 | ||
4566 | #endif | |
b03a8c1f KP |
4567 | |
4568 | /** | |
4569 | * i40e_detect_recover_hung_queue - Function to detect and recover hung_queue | |
4570 | * @q_idx: TX queue number | |
4571 | * @vsi: Pointer to VSI struct | |
4572 | * | |
4573 | * This function checks specified queue for given VSI. Detects hung condition. | |
17daabb5 AB |
4574 | * We proactively detect hung TX queues by checking if interrupts are disabled |
4575 | * but there are pending descriptors. If it appears hung, attempt to recover | |
4576 | * by triggering a SW interrupt. | |
b03a8c1f KP |
4577 | **/ |
4578 | static void i40e_detect_recover_hung_queue(int q_idx, struct i40e_vsi *vsi) | |
4579 | { | |
4580 | struct i40e_ring *tx_ring = NULL; | |
4581 | struct i40e_pf *pf; | |
17daabb5 | 4582 | u32 val, tx_pending; |
b03a8c1f KP |
4583 | int i; |
4584 | ||
4585 | pf = vsi->back; | |
4586 | ||
4587 | /* now that we have an index, find the tx_ring struct */ | |
4588 | for (i = 0; i < vsi->num_queue_pairs; i++) { | |
4589 | if (vsi->tx_rings[i] && vsi->tx_rings[i]->desc) { | |
4590 | if (q_idx == vsi->tx_rings[i]->queue_index) { | |
4591 | tx_ring = vsi->tx_rings[i]; | |
4592 | break; | |
4593 | } | |
4594 | } | |
4595 | } | |
4596 | ||
4597 | if (!tx_ring) | |
4598 | return; | |
4599 | ||
4600 | /* Read interrupt register */ | |
4601 | if (pf->flags & I40E_FLAG_MSIX_ENABLED) | |
4602 | val = rd32(&pf->hw, | |
4603 | I40E_PFINT_DYN_CTLN(tx_ring->q_vector->v_idx + | |
4604 | tx_ring->vsi->base_vector - 1)); | |
4605 | else | |
4606 | val = rd32(&pf->hw, I40E_PFINT_DYN_CTL0); | |
4607 | ||
17daabb5 | 4608 | tx_pending = i40e_get_tx_pending(tx_ring); |
b03a8c1f | 4609 | |
17daabb5 AB |
4610 | /* Interrupts are disabled and TX pending is non-zero, |
4611 | * trigger the SW interrupt (don't wait). Worst case | |
4612 | * there will be one extra interrupt which may result | |
4613 | * into not cleaning any queues because queues are cleaned. | |
b03a8c1f | 4614 | */ |
17daabb5 AB |
4615 | if (tx_pending && (!(val & I40E_PFINT_DYN_CTLN_INTENA_MASK))) |
4616 | i40e_force_wb(vsi, tx_ring->q_vector); | |
b03a8c1f KP |
4617 | } |
4618 | ||
4619 | /** | |
4620 | * i40e_detect_recover_hung - Function to detect and recover hung_queues | |
4621 | * @pf: pointer to PF struct | |
4622 | * | |
4623 | * LAN VSI has netdev and netdev has TX queues. This function is to check | |
4624 | * each of those TX queues if they are hung, trigger recovery by issuing | |
4625 | * SW interrupt. | |
4626 | **/ | |
4627 | static void i40e_detect_recover_hung(struct i40e_pf *pf) | |
4628 | { | |
4629 | struct net_device *netdev; | |
4630 | struct i40e_vsi *vsi; | |
4631 | int i; | |
4632 | ||
4633 | /* Only for LAN VSI */ | |
4634 | vsi = pf->vsi[pf->lan_vsi]; | |
4635 | ||
4636 | if (!vsi) | |
4637 | return; | |
4638 | ||
4639 | /* Make sure, VSI state is not DOWN/RECOVERY_PENDING */ | |
d19cb64b | 4640 | if (test_bit(__I40E_VSI_DOWN, &vsi->back->state) || |
b03a8c1f KP |
4641 | test_bit(__I40E_RESET_RECOVERY_PENDING, &vsi->back->state)) |
4642 | return; | |
4643 | ||
4644 | /* Make sure type is MAIN VSI */ | |
4645 | if (vsi->type != I40E_VSI_MAIN) | |
4646 | return; | |
4647 | ||
4648 | netdev = vsi->netdev; | |
4649 | if (!netdev) | |
4650 | return; | |
4651 | ||
4652 | /* Bail out if netif_carrier is not OK */ | |
4653 | if (!netif_carrier_ok(netdev)) | |
4654 | return; | |
4655 | ||
4656 | /* Go thru' TX queues for netdev */ | |
4657 | for (i = 0; i < netdev->num_tx_queues; i++) { | |
4658 | struct netdev_queue *q; | |
4659 | ||
4660 | q = netdev_get_tx_queue(netdev, i); | |
4661 | if (q) | |
4662 | i40e_detect_recover_hung_queue(i, vsi); | |
4663 | } | |
4664 | } | |
4665 | ||
63d7e5a4 NP |
4666 | /** |
4667 | * i40e_get_iscsi_tc_map - Return TC map for iSCSI APP | |
b40c82e6 | 4668 | * @pf: pointer to PF |
63d7e5a4 NP |
4669 | * |
4670 | * Get TC map for ISCSI PF type that will include iSCSI TC | |
4671 | * and LAN TC. | |
4672 | **/ | |
4673 | static u8 i40e_get_iscsi_tc_map(struct i40e_pf *pf) | |
4674 | { | |
4675 | struct i40e_dcb_app_priority_table app; | |
4676 | struct i40e_hw *hw = &pf->hw; | |
4677 | u8 enabled_tc = 1; /* TC0 is always enabled */ | |
4678 | u8 tc, i; | |
4679 | /* Get the iSCSI APP TLV */ | |
4680 | struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config; | |
4681 | ||
4682 | for (i = 0; i < dcbcfg->numapps; i++) { | |
4683 | app = dcbcfg->app[i]; | |
4684 | if (app.selector == I40E_APP_SEL_TCPIP && | |
4685 | app.protocolid == I40E_APP_PROTOID_ISCSI) { | |
4686 | tc = dcbcfg->etscfg.prioritytable[app.priority]; | |
75f5cea9 | 4687 | enabled_tc |= BIT(tc); |
63d7e5a4 NP |
4688 | break; |
4689 | } | |
4690 | } | |
4691 | ||
4692 | return enabled_tc; | |
4693 | } | |
4694 | ||
41c445ff JB |
4695 | /** |
4696 | * i40e_dcb_get_num_tc - Get the number of TCs from DCBx config | |
4697 | * @dcbcfg: the corresponding DCBx configuration structure | |
4698 | * | |
4699 | * Return the number of TCs from given DCBx configuration | |
4700 | **/ | |
4701 | static u8 i40e_dcb_get_num_tc(struct i40e_dcbx_config *dcbcfg) | |
4702 | { | |
fbfe12c6 | 4703 | int i, tc_unused = 0; |
078b5876 | 4704 | u8 num_tc = 0; |
fbfe12c6 | 4705 | u8 ret = 0; |
41c445ff JB |
4706 | |
4707 | /* Scan the ETS Config Priority Table to find | |
4708 | * traffic class enabled for a given priority | |
fbfe12c6 | 4709 | * and create a bitmask of enabled TCs |
41c445ff | 4710 | */ |
fbfe12c6 DE |
4711 | for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) |
4712 | num_tc |= BIT(dcbcfg->etscfg.prioritytable[i]); | |
41c445ff | 4713 | |
fbfe12c6 DE |
4714 | /* Now scan the bitmask to check for |
4715 | * contiguous TCs starting with TC0 | |
41c445ff | 4716 | */ |
fbfe12c6 DE |
4717 | for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) { |
4718 | if (num_tc & BIT(i)) { | |
4719 | if (!tc_unused) { | |
4720 | ret++; | |
4721 | } else { | |
4722 | pr_err("Non-contiguous TC - Disabling DCB\n"); | |
4723 | return 1; | |
4724 | } | |
4725 | } else { | |
4726 | tc_unused = 1; | |
4727 | } | |
4728 | } | |
4729 | ||
4730 | /* There is always at least TC0 */ | |
4731 | if (!ret) | |
4732 | ret = 1; | |
4733 | ||
4734 | return ret; | |
41c445ff JB |
4735 | } |
4736 | ||
4737 | /** | |
4738 | * i40e_dcb_get_enabled_tc - Get enabled traffic classes | |
4739 | * @dcbcfg: the corresponding DCBx configuration structure | |
4740 | * | |
4741 | * Query the current DCB configuration and return the number of | |
4742 | * traffic classes enabled from the given DCBX config | |
4743 | **/ | |
4744 | static u8 i40e_dcb_get_enabled_tc(struct i40e_dcbx_config *dcbcfg) | |
4745 | { | |
4746 | u8 num_tc = i40e_dcb_get_num_tc(dcbcfg); | |
4747 | u8 enabled_tc = 1; | |
4748 | u8 i; | |
4749 | ||
4750 | for (i = 0; i < num_tc; i++) | |
41a1d04b | 4751 | enabled_tc |= BIT(i); |
41c445ff JB |
4752 | |
4753 | return enabled_tc; | |
4754 | } | |
4755 | ||
4756 | /** | |
4757 | * i40e_pf_get_num_tc - Get enabled traffic classes for PF | |
4758 | * @pf: PF being queried | |
4759 | * | |
4760 | * Return number of traffic classes enabled for the given PF | |
4761 | **/ | |
4762 | static u8 i40e_pf_get_num_tc(struct i40e_pf *pf) | |
4763 | { | |
4764 | struct i40e_hw *hw = &pf->hw; | |
52a08caa | 4765 | u8 i, enabled_tc = 1; |
41c445ff JB |
4766 | u8 num_tc = 0; |
4767 | struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config; | |
4768 | ||
4769 | /* If DCB is not enabled then always in single TC */ | |
4770 | if (!(pf->flags & I40E_FLAG_DCB_ENABLED)) | |
4771 | return 1; | |
4772 | ||
63d7e5a4 NP |
4773 | /* SFP mode will be enabled for all TCs on port */ |
4774 | if (!(pf->flags & I40E_FLAG_MFP_ENABLED)) | |
4775 | return i40e_dcb_get_num_tc(dcbcfg); | |
4776 | ||
41c445ff | 4777 | /* MFP mode return count of enabled TCs for this PF */ |
63d7e5a4 NP |
4778 | if (pf->hw.func_caps.iscsi) |
4779 | enabled_tc = i40e_get_iscsi_tc_map(pf); | |
4780 | else | |
fc51de96 | 4781 | return 1; /* Only TC0 */ |
41c445ff | 4782 | |
63d7e5a4 | 4783 | for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) { |
75f5cea9 | 4784 | if (enabled_tc & BIT(i)) |
63d7e5a4 NP |
4785 | num_tc++; |
4786 | } | |
4787 | return num_tc; | |
41c445ff JB |
4788 | } |
4789 | ||
41c445ff JB |
4790 | /** |
4791 | * i40e_pf_get_pf_tc_map - Get bitmap for enabled traffic classes | |
4792 | * @pf: PF being queried | |
4793 | * | |
4794 | * Return a bitmap for enabled traffic classes for this PF. | |
4795 | **/ | |
4796 | static u8 i40e_pf_get_tc_map(struct i40e_pf *pf) | |
4797 | { | |
4798 | /* If DCB is not enabled for this PF then just return default TC */ | |
4799 | if (!(pf->flags & I40E_FLAG_DCB_ENABLED)) | |
ea6acb7e | 4800 | return I40E_DEFAULT_TRAFFIC_CLASS; |
41c445ff | 4801 | |
41c445ff | 4802 | /* SFP mode we want PF to be enabled for all TCs */ |
63d7e5a4 NP |
4803 | if (!(pf->flags & I40E_FLAG_MFP_ENABLED)) |
4804 | return i40e_dcb_get_enabled_tc(&pf->hw.local_dcbx_config); | |
4805 | ||
fc51de96 | 4806 | /* MFP enabled and iSCSI PF type */ |
63d7e5a4 NP |
4807 | if (pf->hw.func_caps.iscsi) |
4808 | return i40e_get_iscsi_tc_map(pf); | |
4809 | else | |
ea6acb7e | 4810 | return I40E_DEFAULT_TRAFFIC_CLASS; |
41c445ff JB |
4811 | } |
4812 | ||
4813 | /** | |
4814 | * i40e_vsi_get_bw_info - Query VSI BW Information | |
4815 | * @vsi: the VSI being queried | |
4816 | * | |
4817 | * Returns 0 on success, negative value on failure | |
4818 | **/ | |
4819 | static int i40e_vsi_get_bw_info(struct i40e_vsi *vsi) | |
4820 | { | |
4821 | struct i40e_aqc_query_vsi_ets_sla_config_resp bw_ets_config = {0}; | |
4822 | struct i40e_aqc_query_vsi_bw_config_resp bw_config = {0}; | |
4823 | struct i40e_pf *pf = vsi->back; | |
4824 | struct i40e_hw *hw = &pf->hw; | |
f1c7e72e | 4825 | i40e_status ret; |
41c445ff | 4826 | u32 tc_bw_max; |
41c445ff JB |
4827 | int i; |
4828 | ||
4829 | /* Get the VSI level BW configuration */ | |
f1c7e72e SN |
4830 | ret = i40e_aq_query_vsi_bw_config(hw, vsi->seid, &bw_config, NULL); |
4831 | if (ret) { | |
41c445ff | 4832 | dev_info(&pf->pdev->dev, |
f1c7e72e SN |
4833 | "couldn't get PF vsi bw config, err %s aq_err %s\n", |
4834 | i40e_stat_str(&pf->hw, ret), | |
4835 | i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status)); | |
dcae29be | 4836 | return -EINVAL; |
41c445ff JB |
4837 | } |
4838 | ||
4839 | /* Get the VSI level BW configuration per TC */ | |
f1c7e72e SN |
4840 | ret = i40e_aq_query_vsi_ets_sla_config(hw, vsi->seid, &bw_ets_config, |
4841 | NULL); | |
4842 | if (ret) { | |
41c445ff | 4843 | dev_info(&pf->pdev->dev, |
f1c7e72e SN |
4844 | "couldn't get PF vsi ets bw config, err %s aq_err %s\n", |
4845 | i40e_stat_str(&pf->hw, ret), | |
4846 | i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status)); | |
dcae29be | 4847 | return -EINVAL; |
41c445ff JB |
4848 | } |
4849 | ||
4850 | if (bw_config.tc_valid_bits != bw_ets_config.tc_valid_bits) { | |
4851 | dev_info(&pf->pdev->dev, | |
4852 | "Enabled TCs mismatch from querying VSI BW info 0x%08x 0x%08x\n", | |
4853 | bw_config.tc_valid_bits, | |
4854 | bw_ets_config.tc_valid_bits); | |
4855 | /* Still continuing */ | |
4856 | } | |
4857 | ||
4858 | vsi->bw_limit = le16_to_cpu(bw_config.port_bw_limit); | |
4859 | vsi->bw_max_quanta = bw_config.max_bw; | |
4860 | tc_bw_max = le16_to_cpu(bw_ets_config.tc_bw_max[0]) | | |
4861 | (le16_to_cpu(bw_ets_config.tc_bw_max[1]) << 16); | |
4862 | for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) { | |
4863 | vsi->bw_ets_share_credits[i] = bw_ets_config.share_credits[i]; | |
4864 | vsi->bw_ets_limit_credits[i] = | |
4865 | le16_to_cpu(bw_ets_config.credits[i]); | |
4866 | /* 3 bits out of 4 for each TC */ | |
4867 | vsi->bw_ets_max_quanta[i] = (u8)((tc_bw_max >> (i*4)) & 0x7); | |
4868 | } | |
078b5876 | 4869 | |
dcae29be | 4870 | return 0; |
41c445ff JB |
4871 | } |
4872 | ||
4873 | /** | |
4874 | * i40e_vsi_configure_bw_alloc - Configure VSI BW allocation per TC | |
4875 | * @vsi: the VSI being configured | |
4876 | * @enabled_tc: TC bitmap | |
4877 | * @bw_credits: BW shared credits per TC | |
4878 | * | |
4879 | * Returns 0 on success, negative value on failure | |
4880 | **/ | |
dcae29be | 4881 | static int i40e_vsi_configure_bw_alloc(struct i40e_vsi *vsi, u8 enabled_tc, |
41c445ff JB |
4882 | u8 *bw_share) |
4883 | { | |
4884 | struct i40e_aqc_configure_vsi_tc_bw_data bw_data; | |
f1c7e72e | 4885 | i40e_status ret; |
dcae29be | 4886 | int i; |
41c445ff JB |
4887 | |
4888 | bw_data.tc_valid_bits = enabled_tc; | |
4889 | for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) | |
4890 | bw_data.tc_bw_credits[i] = bw_share[i]; | |
4891 | ||
f1c7e72e SN |
4892 | ret = i40e_aq_config_vsi_tc_bw(&vsi->back->hw, vsi->seid, &bw_data, |
4893 | NULL); | |
4894 | if (ret) { | |
41c445ff | 4895 | dev_info(&vsi->back->pdev->dev, |
69bfb110 JB |
4896 | "AQ command Config VSI BW allocation per TC failed = %d\n", |
4897 | vsi->back->hw.aq.asq_last_status); | |
dcae29be | 4898 | return -EINVAL; |
41c445ff JB |
4899 | } |
4900 | ||
4901 | for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) | |
4902 | vsi->info.qs_handle[i] = bw_data.qs_handles[i]; | |
4903 | ||
dcae29be | 4904 | return 0; |
41c445ff JB |
4905 | } |
4906 | ||
4907 | /** | |
4908 | * i40e_vsi_config_netdev_tc - Setup the netdev TC configuration | |
4909 | * @vsi: the VSI being configured | |
4910 | * @enabled_tc: TC map to be enabled | |
4911 | * | |
4912 | **/ | |
4913 | static void i40e_vsi_config_netdev_tc(struct i40e_vsi *vsi, u8 enabled_tc) | |
4914 | { | |
4915 | struct net_device *netdev = vsi->netdev; | |
4916 | struct i40e_pf *pf = vsi->back; | |
4917 | struct i40e_hw *hw = &pf->hw; | |
4918 | u8 netdev_tc = 0; | |
4919 | int i; | |
4920 | struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config; | |
4921 | ||
4922 | if (!netdev) | |
4923 | return; | |
4924 | ||
4925 | if (!enabled_tc) { | |
4926 | netdev_reset_tc(netdev); | |
4927 | return; | |
4928 | } | |
4929 | ||
4930 | /* Set up actual enabled TCs on the VSI */ | |
4931 | if (netdev_set_num_tc(netdev, vsi->tc_config.numtc)) | |
4932 | return; | |
4933 | ||
4934 | /* set per TC queues for the VSI */ | |
4935 | for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) { | |
4936 | /* Only set TC queues for enabled tcs | |
4937 | * | |
4938 | * e.g. For a VSI that has TC0 and TC3 enabled the | |
4939 | * enabled_tc bitmap would be 0x00001001; the driver | |
4940 | * will set the numtc for netdev as 2 that will be | |
4941 | * referenced by the netdev layer as TC 0 and 1. | |
4942 | */ | |
75f5cea9 | 4943 | if (vsi->tc_config.enabled_tc & BIT(i)) |
41c445ff JB |
4944 | netdev_set_tc_queue(netdev, |
4945 | vsi->tc_config.tc_info[i].netdev_tc, | |
4946 | vsi->tc_config.tc_info[i].qcount, | |
4947 | vsi->tc_config.tc_info[i].qoffset); | |
4948 | } | |
4949 | ||
4950 | /* Assign UP2TC map for the VSI */ | |
4951 | for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) { | |
4952 | /* Get the actual TC# for the UP */ | |
4953 | u8 ets_tc = dcbcfg->etscfg.prioritytable[i]; | |
4954 | /* Get the mapped netdev TC# for the UP */ | |
4955 | netdev_tc = vsi->tc_config.tc_info[ets_tc].netdev_tc; | |
4956 | netdev_set_prio_tc_map(netdev, i, netdev_tc); | |
4957 | } | |
4958 | } | |
4959 | ||
4960 | /** | |
4961 | * i40e_vsi_update_queue_map - Update our copy of VSi info with new queue map | |
4962 | * @vsi: the VSI being configured | |
4963 | * @ctxt: the ctxt buffer returned from AQ VSI update param command | |
4964 | **/ | |
4965 | static void i40e_vsi_update_queue_map(struct i40e_vsi *vsi, | |
4966 | struct i40e_vsi_context *ctxt) | |
4967 | { | |
4968 | /* copy just the sections touched not the entire info | |
4969 | * since not all sections are valid as returned by | |
4970 | * update vsi params | |
4971 | */ | |
4972 | vsi->info.mapping_flags = ctxt->info.mapping_flags; | |
4973 | memcpy(&vsi->info.queue_mapping, | |
4974 | &ctxt->info.queue_mapping, sizeof(vsi->info.queue_mapping)); | |
4975 | memcpy(&vsi->info.tc_mapping, ctxt->info.tc_mapping, | |
4976 | sizeof(vsi->info.tc_mapping)); | |
4977 | } | |
4978 | ||
4979 | /** | |
4980 | * i40e_vsi_config_tc - Configure VSI Tx Scheduler for given TC map | |
4981 | * @vsi: VSI to be configured | |
4982 | * @enabled_tc: TC bitmap | |
4983 | * | |
4984 | * This configures a particular VSI for TCs that are mapped to the | |
4985 | * given TC bitmap. It uses default bandwidth share for TCs across | |
4986 | * VSIs to configure TC for a particular VSI. | |
4987 | * | |
4988 | * NOTE: | |
4989 | * It is expected that the VSI queues have been quisced before calling | |
4990 | * this function. | |
4991 | **/ | |
4992 | static int i40e_vsi_config_tc(struct i40e_vsi *vsi, u8 enabled_tc) | |
4993 | { | |
4994 | u8 bw_share[I40E_MAX_TRAFFIC_CLASS] = {0}; | |
4995 | struct i40e_vsi_context ctxt; | |
4996 | int ret = 0; | |
4997 | int i; | |
4998 | ||
4999 | /* Check if enabled_tc is same as existing or new TCs */ | |
5000 | if (vsi->tc_config.enabled_tc == enabled_tc) | |
5001 | return ret; | |
5002 | ||
5003 | /* Enable ETS TCs with equal BW Share for now across all VSIs */ | |
5004 | for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) { | |
75f5cea9 | 5005 | if (enabled_tc & BIT(i)) |
41c445ff JB |
5006 | bw_share[i] = 1; |
5007 | } | |
5008 | ||
5009 | ret = i40e_vsi_configure_bw_alloc(vsi, enabled_tc, bw_share); | |
5010 | if (ret) { | |
5011 | dev_info(&vsi->back->pdev->dev, | |
5012 | "Failed configuring TC map %d for VSI %d\n", | |
5013 | enabled_tc, vsi->seid); | |
5014 | goto out; | |
5015 | } | |
5016 | ||
5017 | /* Update Queue Pairs Mapping for currently enabled UPs */ | |
5018 | ctxt.seid = vsi->seid; | |
5019 | ctxt.pf_num = vsi->back->hw.pf_id; | |
5020 | ctxt.vf_num = 0; | |
5021 | ctxt.uplink_seid = vsi->uplink_seid; | |
1a2f6248 | 5022 | ctxt.info = vsi->info; |
41c445ff JB |
5023 | i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, false); |
5024 | ||
e3219ce6 ASJ |
5025 | if (vsi->back->flags & I40E_FLAG_IWARP_ENABLED) { |
5026 | ctxt.info.valid_sections |= | |
5027 | cpu_to_le16(I40E_AQ_VSI_PROP_QUEUE_OPT_VALID); | |
5028 | ctxt.info.queueing_opt_flags |= I40E_AQ_VSI_QUE_OPT_TCP_ENA; | |
5029 | } | |
5030 | ||
41c445ff JB |
5031 | /* Update the VSI after updating the VSI queue-mapping information */ |
5032 | ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL); | |
5033 | if (ret) { | |
5034 | dev_info(&vsi->back->pdev->dev, | |
f1c7e72e SN |
5035 | "Update vsi tc config failed, err %s aq_err %s\n", |
5036 | i40e_stat_str(&vsi->back->hw, ret), | |
5037 | i40e_aq_str(&vsi->back->hw, | |
5038 | vsi->back->hw.aq.asq_last_status)); | |
41c445ff JB |
5039 | goto out; |
5040 | } | |
5041 | /* update the local VSI info with updated queue map */ | |
5042 | i40e_vsi_update_queue_map(vsi, &ctxt); | |
5043 | vsi->info.valid_sections = 0; | |
5044 | ||
5045 | /* Update current VSI BW information */ | |
5046 | ret = i40e_vsi_get_bw_info(vsi); | |
5047 | if (ret) { | |
5048 | dev_info(&vsi->back->pdev->dev, | |
f1c7e72e SN |
5049 | "Failed updating vsi bw info, err %s aq_err %s\n", |
5050 | i40e_stat_str(&vsi->back->hw, ret), | |
5051 | i40e_aq_str(&vsi->back->hw, | |
5052 | vsi->back->hw.aq.asq_last_status)); | |
41c445ff JB |
5053 | goto out; |
5054 | } | |
5055 | ||
5056 | /* Update the netdev TC setup */ | |
5057 | i40e_vsi_config_netdev_tc(vsi, enabled_tc); | |
5058 | out: | |
5059 | return ret; | |
5060 | } | |
5061 | ||
4e3b35b0 NP |
5062 | /** |
5063 | * i40e_veb_config_tc - Configure TCs for given VEB | |
5064 | * @veb: given VEB | |
5065 | * @enabled_tc: TC bitmap | |
5066 | * | |
5067 | * Configures given TC bitmap for VEB (switching) element | |
5068 | **/ | |
5069 | int i40e_veb_config_tc(struct i40e_veb *veb, u8 enabled_tc) | |
5070 | { | |
5071 | struct i40e_aqc_configure_switching_comp_bw_config_data bw_data = {0}; | |
5072 | struct i40e_pf *pf = veb->pf; | |
5073 | int ret = 0; | |
5074 | int i; | |
5075 | ||
5076 | /* No TCs or already enabled TCs just return */ | |
5077 | if (!enabled_tc || veb->enabled_tc == enabled_tc) | |
5078 | return ret; | |
5079 | ||
5080 | bw_data.tc_valid_bits = enabled_tc; | |
5081 | /* bw_data.absolute_credits is not set (relative) */ | |
5082 | ||
5083 | /* Enable ETS TCs with equal BW Share for now */ | |
5084 | for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) { | |
75f5cea9 | 5085 | if (enabled_tc & BIT(i)) |
4e3b35b0 NP |
5086 | bw_data.tc_bw_share_credits[i] = 1; |
5087 | } | |
5088 | ||
5089 | ret = i40e_aq_config_switch_comp_bw_config(&pf->hw, veb->seid, | |
5090 | &bw_data, NULL); | |
5091 | if (ret) { | |
5092 | dev_info(&pf->pdev->dev, | |
f1c7e72e SN |
5093 | "VEB bw config failed, err %s aq_err %s\n", |
5094 | i40e_stat_str(&pf->hw, ret), | |
5095 | i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status)); | |
4e3b35b0 NP |
5096 | goto out; |
5097 | } | |
5098 | ||
5099 | /* Update the BW information */ | |
5100 | ret = i40e_veb_get_bw_info(veb); | |
5101 | if (ret) { | |
5102 | dev_info(&pf->pdev->dev, | |
f1c7e72e SN |
5103 | "Failed getting veb bw config, err %s aq_err %s\n", |
5104 | i40e_stat_str(&pf->hw, ret), | |
5105 | i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status)); | |
4e3b35b0 NP |
5106 | } |
5107 | ||
5108 | out: | |
5109 | return ret; | |
5110 | } | |
5111 | ||
5112 | #ifdef CONFIG_I40E_DCB | |
5113 | /** | |
5114 | * i40e_dcb_reconfigure - Reconfigure all VEBs and VSIs | |
5115 | * @pf: PF struct | |
5116 | * | |
5117 | * Reconfigure VEB/VSIs on a given PF; it is assumed that | |
5118 | * the caller would've quiesce all the VSIs before calling | |
5119 | * this function | |
5120 | **/ | |
5121 | static void i40e_dcb_reconfigure(struct i40e_pf *pf) | |
5122 | { | |
5123 | u8 tc_map = 0; | |
5124 | int ret; | |
5125 | u8 v; | |
5126 | ||
5127 | /* Enable the TCs available on PF to all VEBs */ | |
5128 | tc_map = i40e_pf_get_tc_map(pf); | |
5129 | for (v = 0; v < I40E_MAX_VEB; v++) { | |
5130 | if (!pf->veb[v]) | |
5131 | continue; | |
5132 | ret = i40e_veb_config_tc(pf->veb[v], tc_map); | |
5133 | if (ret) { | |
5134 | dev_info(&pf->pdev->dev, | |
5135 | "Failed configuring TC for VEB seid=%d\n", | |
5136 | pf->veb[v]->seid); | |
5137 | /* Will try to configure as many components */ | |
5138 | } | |
5139 | } | |
5140 | ||
5141 | /* Update each VSI */ | |
505682cd | 5142 | for (v = 0; v < pf->num_alloc_vsi; v++) { |
4e3b35b0 NP |
5143 | if (!pf->vsi[v]) |
5144 | continue; | |
5145 | ||
5146 | /* - Enable all TCs for the LAN VSI | |
5147 | * - For all others keep them at TC0 for now | |
5148 | */ | |
5149 | if (v == pf->lan_vsi) | |
5150 | tc_map = i40e_pf_get_tc_map(pf); | |
5151 | else | |
ea6acb7e | 5152 | tc_map = I40E_DEFAULT_TRAFFIC_CLASS; |
4e3b35b0 NP |
5153 | |
5154 | ret = i40e_vsi_config_tc(pf->vsi[v], tc_map); | |
5155 | if (ret) { | |
5156 | dev_info(&pf->pdev->dev, | |
5157 | "Failed configuring TC for VSI seid=%d\n", | |
5158 | pf->vsi[v]->seid); | |
5159 | /* Will try to configure as many components */ | |
5160 | } else { | |
0672a091 NP |
5161 | /* Re-configure VSI vectors based on updated TC map */ |
5162 | i40e_vsi_map_rings_to_vectors(pf->vsi[v]); | |
4e3b35b0 NP |
5163 | if (pf->vsi[v]->netdev) |
5164 | i40e_dcbnl_set_all(pf->vsi[v]); | |
5165 | } | |
5166 | } | |
5167 | } | |
5168 | ||
2fd75f31 NP |
5169 | /** |
5170 | * i40e_resume_port_tx - Resume port Tx | |
5171 | * @pf: PF struct | |
5172 | * | |
5173 | * Resume a port's Tx and issue a PF reset in case of failure to | |
5174 | * resume. | |
5175 | **/ | |
5176 | static int i40e_resume_port_tx(struct i40e_pf *pf) | |
5177 | { | |
5178 | struct i40e_hw *hw = &pf->hw; | |
5179 | int ret; | |
5180 | ||
5181 | ret = i40e_aq_resume_port_tx(hw, NULL); | |
5182 | if (ret) { | |
5183 | dev_info(&pf->pdev->dev, | |
f1c7e72e SN |
5184 | "Resume Port Tx failed, err %s aq_err %s\n", |
5185 | i40e_stat_str(&pf->hw, ret), | |
5186 | i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status)); | |
2fd75f31 NP |
5187 | /* Schedule PF reset to recover */ |
5188 | set_bit(__I40E_PF_RESET_REQUESTED, &pf->state); | |
5189 | i40e_service_event_schedule(pf); | |
5190 | } | |
5191 | ||
5192 | return ret; | |
5193 | } | |
5194 | ||
4e3b35b0 NP |
5195 | /** |
5196 | * i40e_init_pf_dcb - Initialize DCB configuration | |
5197 | * @pf: PF being configured | |
5198 | * | |
5199 | * Query the current DCB configuration and cache it | |
5200 | * in the hardware structure | |
5201 | **/ | |
5202 | static int i40e_init_pf_dcb(struct i40e_pf *pf) | |
5203 | { | |
5204 | struct i40e_hw *hw = &pf->hw; | |
5205 | int err = 0; | |
5206 | ||
025b4a54 | 5207 | /* Do not enable DCB for SW1 and SW2 images even if the FW is capable */ |
f1bbad33 | 5208 | if (pf->flags & I40E_FLAG_NO_DCB_SUPPORT) |
025b4a54 ASJ |
5209 | goto out; |
5210 | ||
4e3b35b0 NP |
5211 | /* Get the initial DCB configuration */ |
5212 | err = i40e_init_dcb(hw); | |
5213 | if (!err) { | |
5214 | /* Device/Function is not DCBX capable */ | |
5215 | if ((!hw->func_caps.dcb) || | |
5216 | (hw->dcbx_status == I40E_DCBX_STATUS_DISABLED)) { | |
5217 | dev_info(&pf->pdev->dev, | |
5218 | "DCBX offload is not supported or is disabled for this PF.\n"); | |
4e3b35b0 NP |
5219 | } else { |
5220 | /* When status is not DISABLED then DCBX in FW */ | |
5221 | pf->dcbx_cap = DCB_CAP_DCBX_LLD_MANAGED | | |
5222 | DCB_CAP_DCBX_VER_IEEE; | |
4d9b6043 NP |
5223 | |
5224 | pf->flags |= I40E_FLAG_DCB_CAPABLE; | |
a036244c DE |
5225 | /* Enable DCB tagging only when more than one TC |
5226 | * or explicitly disable if only one TC | |
5227 | */ | |
4d9b6043 NP |
5228 | if (i40e_dcb_get_num_tc(&hw->local_dcbx_config) > 1) |
5229 | pf->flags |= I40E_FLAG_DCB_ENABLED; | |
a036244c DE |
5230 | else |
5231 | pf->flags &= ~I40E_FLAG_DCB_ENABLED; | |
9fa61dd2 NP |
5232 | dev_dbg(&pf->pdev->dev, |
5233 | "DCBX offload is supported for this PF.\n"); | |
4e3b35b0 | 5234 | } |
014269ff | 5235 | } else { |
aebfc816 | 5236 | dev_info(&pf->pdev->dev, |
f1c7e72e SN |
5237 | "Query for DCB configuration failed, err %s aq_err %s\n", |
5238 | i40e_stat_str(&pf->hw, err), | |
5239 | i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status)); | |
4e3b35b0 NP |
5240 | } |
5241 | ||
5242 | out: | |
5243 | return err; | |
5244 | } | |
5245 | #endif /* CONFIG_I40E_DCB */ | |
cf05ed08 JB |
5246 | #define SPEED_SIZE 14 |
5247 | #define FC_SIZE 8 | |
5248 | /** | |
5249 | * i40e_print_link_message - print link up or down | |
5250 | * @vsi: the VSI for which link needs a message | |
5251 | */ | |
c156f856 | 5252 | void i40e_print_link_message(struct i40e_vsi *vsi, bool isup) |
cf05ed08 | 5253 | { |
7ec9ba11 | 5254 | enum i40e_aq_link_speed new_speed; |
a9165490 SN |
5255 | char *speed = "Unknown"; |
5256 | char *fc = "Unknown"; | |
3e03d7cc HT |
5257 | char *fec = ""; |
5258 | char *an = ""; | |
cf05ed08 | 5259 | |
7ec9ba11 FS |
5260 | new_speed = vsi->back->hw.phy.link_info.link_speed; |
5261 | ||
5262 | if ((vsi->current_isup == isup) && (vsi->current_speed == new_speed)) | |
c156f856 MJ |
5263 | return; |
5264 | vsi->current_isup = isup; | |
7ec9ba11 | 5265 | vsi->current_speed = new_speed; |
cf05ed08 JB |
5266 | if (!isup) { |
5267 | netdev_info(vsi->netdev, "NIC Link is Down\n"); | |
5268 | return; | |
5269 | } | |
5270 | ||
148c2d80 GR |
5271 | /* Warn user if link speed on NPAR enabled partition is not at |
5272 | * least 10GB | |
5273 | */ | |
5274 | if (vsi->back->hw.func_caps.npar_enable && | |
5275 | (vsi->back->hw.phy.link_info.link_speed == I40E_LINK_SPEED_1GB || | |
5276 | vsi->back->hw.phy.link_info.link_speed == I40E_LINK_SPEED_100MB)) | |
5277 | netdev_warn(vsi->netdev, | |
5278 | "The partition detected link speed that is less than 10Gbps\n"); | |
5279 | ||
cf05ed08 JB |
5280 | switch (vsi->back->hw.phy.link_info.link_speed) { |
5281 | case I40E_LINK_SPEED_40GB: | |
a9165490 | 5282 | speed = "40 G"; |
cf05ed08 | 5283 | break; |
ae24b409 | 5284 | case I40E_LINK_SPEED_20GB: |
a9165490 | 5285 | speed = "20 G"; |
ae24b409 | 5286 | break; |
3123237a CW |
5287 | case I40E_LINK_SPEED_25GB: |
5288 | speed = "25 G"; | |
5289 | break; | |
cf05ed08 | 5290 | case I40E_LINK_SPEED_10GB: |
a9165490 | 5291 | speed = "10 G"; |
cf05ed08 JB |
5292 | break; |
5293 | case I40E_LINK_SPEED_1GB: | |
a9165490 | 5294 | speed = "1000 M"; |
cf05ed08 | 5295 | break; |
5960d33f | 5296 | case I40E_LINK_SPEED_100MB: |
a9165490 | 5297 | speed = "100 M"; |
5960d33f | 5298 | break; |
cf05ed08 JB |
5299 | default: |
5300 | break; | |
5301 | } | |
5302 | ||
5303 | switch (vsi->back->hw.fc.current_mode) { | |
5304 | case I40E_FC_FULL: | |
a9165490 | 5305 | fc = "RX/TX"; |
cf05ed08 JB |
5306 | break; |
5307 | case I40E_FC_TX_PAUSE: | |
a9165490 | 5308 | fc = "TX"; |
cf05ed08 JB |
5309 | break; |
5310 | case I40E_FC_RX_PAUSE: | |
a9165490 | 5311 | fc = "RX"; |
cf05ed08 JB |
5312 | break; |
5313 | default: | |
a9165490 | 5314 | fc = "None"; |
cf05ed08 JB |
5315 | break; |
5316 | } | |
5317 | ||
3e03d7cc HT |
5318 | if (vsi->back->hw.phy.link_info.link_speed == I40E_LINK_SPEED_25GB) { |
5319 | fec = ", FEC: None"; | |
5320 | an = ", Autoneg: False"; | |
5321 | ||
5322 | if (vsi->back->hw.phy.link_info.an_info & I40E_AQ_AN_COMPLETED) | |
5323 | an = ", Autoneg: True"; | |
5324 | ||
5325 | if (vsi->back->hw.phy.link_info.fec_info & | |
5326 | I40E_AQ_CONFIG_FEC_KR_ENA) | |
5327 | fec = ", FEC: CL74 FC-FEC/BASE-R"; | |
5328 | else if (vsi->back->hw.phy.link_info.fec_info & | |
5329 | I40E_AQ_CONFIG_FEC_RS_ENA) | |
5330 | fec = ", FEC: CL108 RS-FEC"; | |
5331 | } | |
5332 | ||
5333 | netdev_info(vsi->netdev, "NIC Link is Up, %sbps Full Duplex%s%s, Flow Control: %s\n", | |
5334 | speed, fec, an, fc); | |
cf05ed08 | 5335 | } |
4e3b35b0 | 5336 | |
41c445ff JB |
5337 | /** |
5338 | * i40e_up_complete - Finish the last steps of bringing up a connection | |
5339 | * @vsi: the VSI being configured | |
5340 | **/ | |
5341 | static int i40e_up_complete(struct i40e_vsi *vsi) | |
5342 | { | |
5343 | struct i40e_pf *pf = vsi->back; | |
5344 | int err; | |
5345 | ||
5346 | if (pf->flags & I40E_FLAG_MSIX_ENABLED) | |
5347 | i40e_vsi_configure_msix(vsi); | |
5348 | else | |
5349 | i40e_configure_msi_and_legacy(vsi); | |
5350 | ||
5351 | /* start rings */ | |
3aa7b74d | 5352 | err = i40e_vsi_start_rings(vsi); |
41c445ff JB |
5353 | if (err) |
5354 | return err; | |
5355 | ||
d19cb64b | 5356 | clear_bit(__I40E_VSI_DOWN, &vsi->state); |
41c445ff JB |
5357 | i40e_napi_enable_all(vsi); |
5358 | i40e_vsi_enable_irq(vsi); | |
5359 | ||
5360 | if ((pf->hw.phy.link_info.link_info & I40E_AQ_LINK_UP) && | |
5361 | (vsi->netdev)) { | |
cf05ed08 | 5362 | i40e_print_link_message(vsi, true); |
41c445ff JB |
5363 | netif_tx_start_all_queues(vsi->netdev); |
5364 | netif_carrier_on(vsi->netdev); | |
6d779b41 | 5365 | } else if (vsi->netdev) { |
cf05ed08 | 5366 | i40e_print_link_message(vsi, false); |
7b592f61 CW |
5367 | /* need to check for qualified module here*/ |
5368 | if ((pf->hw.phy.link_info.link_info & | |
5369 | I40E_AQ_MEDIA_AVAILABLE) && | |
5370 | (!(pf->hw.phy.link_info.an_info & | |
5371 | I40E_AQ_QUALIFIED_MODULE))) | |
5372 | netdev_err(vsi->netdev, | |
5373 | "the driver failed to link because an unqualified module was detected."); | |
41c445ff | 5374 | } |
ca64fa4e ASJ |
5375 | |
5376 | /* replay FDIR SB filters */ | |
1e1be8f6 ASJ |
5377 | if (vsi->type == I40E_VSI_FDIR) { |
5378 | /* reset fd counters */ | |
097dbf52 JK |
5379 | pf->fd_add_err = 0; |
5380 | pf->fd_atr_cnt = 0; | |
ca64fa4e | 5381 | i40e_fdir_filter_restore(vsi); |
1e1be8f6 | 5382 | } |
e3219ce6 ASJ |
5383 | |
5384 | /* On the next run of the service_task, notify any clients of the new | |
5385 | * opened netdev | |
5386 | */ | |
5387 | pf->flags |= I40E_FLAG_SERVICE_CLIENT_REQUESTED; | |
41c445ff JB |
5388 | i40e_service_event_schedule(pf); |
5389 | ||
5390 | return 0; | |
5391 | } | |
5392 | ||
5393 | /** | |
5394 | * i40e_vsi_reinit_locked - Reset the VSI | |
5395 | * @vsi: the VSI being configured | |
5396 | * | |
5397 | * Rebuild the ring structs after some configuration | |
5398 | * has changed, e.g. MTU size. | |
5399 | **/ | |
5400 | static void i40e_vsi_reinit_locked(struct i40e_vsi *vsi) | |
5401 | { | |
5402 | struct i40e_pf *pf = vsi->back; | |
5403 | ||
5404 | WARN_ON(in_interrupt()); | |
5405 | while (test_and_set_bit(__I40E_CONFIG_BUSY, &pf->state)) | |
5406 | usleep_range(1000, 2000); | |
5407 | i40e_down(vsi); | |
5408 | ||
41c445ff JB |
5409 | i40e_up(vsi); |
5410 | clear_bit(__I40E_CONFIG_BUSY, &pf->state); | |
5411 | } | |
5412 | ||
5413 | /** | |
5414 | * i40e_up - Bring the connection back up after being down | |
5415 | * @vsi: the VSI being configured | |
5416 | **/ | |
5417 | int i40e_up(struct i40e_vsi *vsi) | |
5418 | { | |
5419 | int err; | |
5420 | ||
5421 | err = i40e_vsi_configure(vsi); | |
5422 | if (!err) | |
5423 | err = i40e_up_complete(vsi); | |
5424 | ||
5425 | return err; | |
5426 | } | |
5427 | ||
5428 | /** | |
5429 | * i40e_down - Shutdown the connection processing | |
5430 | * @vsi: the VSI being stopped | |
5431 | **/ | |
5432 | void i40e_down(struct i40e_vsi *vsi) | |
5433 | { | |
5434 | int i; | |
5435 | ||
5436 | /* It is assumed that the caller of this function | |
d19cb64b | 5437 | * sets the vsi->state __I40E_VSI_DOWN bit. |
41c445ff JB |
5438 | */ |
5439 | if (vsi->netdev) { | |
5440 | netif_carrier_off(vsi->netdev); | |
5441 | netif_tx_disable(vsi->netdev); | |
5442 | } | |
5443 | i40e_vsi_disable_irq(vsi); | |
3aa7b74d | 5444 | i40e_vsi_stop_rings(vsi); |
41c445ff JB |
5445 | i40e_napi_disable_all(vsi); |
5446 | ||
5447 | for (i = 0; i < vsi->num_queue_pairs; i++) { | |
9f65e15b AD |
5448 | i40e_clean_tx_ring(vsi->tx_rings[i]); |
5449 | i40e_clean_rx_ring(vsi->rx_rings[i]); | |
41c445ff | 5450 | } |
f980d445 | 5451 | |
41c445ff JB |
5452 | } |
5453 | ||
5454 | /** | |
5455 | * i40e_setup_tc - configure multiple traffic classes | |
5456 | * @netdev: net device to configure | |
5457 | * @tc: number of traffic classes to enable | |
5458 | **/ | |
5459 | static int i40e_setup_tc(struct net_device *netdev, u8 tc) | |
5460 | { | |
5461 | struct i40e_netdev_priv *np = netdev_priv(netdev); | |
5462 | struct i40e_vsi *vsi = np->vsi; | |
5463 | struct i40e_pf *pf = vsi->back; | |
5464 | u8 enabled_tc = 0; | |
5465 | int ret = -EINVAL; | |
5466 | int i; | |
5467 | ||
5468 | /* Check if DCB enabled to continue */ | |
5469 | if (!(pf->flags & I40E_FLAG_DCB_ENABLED)) { | |
5470 | netdev_info(netdev, "DCB is not enabled for adapter\n"); | |
5471 | goto exit; | |
5472 | } | |
5473 | ||
5474 | /* Check if MFP enabled */ | |
5475 | if (pf->flags & I40E_FLAG_MFP_ENABLED) { | |
5476 | netdev_info(netdev, "Configuring TC not supported in MFP mode\n"); | |
5477 | goto exit; | |
5478 | } | |
5479 | ||
5480 | /* Check whether tc count is within enabled limit */ | |
5481 | if (tc > i40e_pf_get_num_tc(pf)) { | |
5482 | netdev_info(netdev, "TC count greater than enabled on link for adapter\n"); | |
5483 | goto exit; | |
5484 | } | |
5485 | ||
5486 | /* Generate TC map for number of tc requested */ | |
5487 | for (i = 0; i < tc; i++) | |
75f5cea9 | 5488 | enabled_tc |= BIT(i); |
41c445ff JB |
5489 | |
5490 | /* Requesting same TC configuration as already enabled */ | |
5491 | if (enabled_tc == vsi->tc_config.enabled_tc) | |
5492 | return 0; | |
5493 | ||
5494 | /* Quiesce VSI queues */ | |
5495 | i40e_quiesce_vsi(vsi); | |
5496 | ||
5497 | /* Configure VSI for enabled TCs */ | |
5498 | ret = i40e_vsi_config_tc(vsi, enabled_tc); | |
5499 | if (ret) { | |
5500 | netdev_info(netdev, "Failed configuring TC for VSI seid=%d\n", | |
5501 | vsi->seid); | |
5502 | goto exit; | |
5503 | } | |
5504 | ||
5505 | /* Unquiesce VSI */ | |
5506 | i40e_unquiesce_vsi(vsi); | |
5507 | ||
5508 | exit: | |
5509 | return ret; | |
5510 | } | |
5511 | ||
16e5cc64 JF |
5512 | static int __i40e_setup_tc(struct net_device *netdev, u32 handle, __be16 proto, |
5513 | struct tc_to_netdev *tc) | |
e4c6734e | 5514 | { |
56f36acd | 5515 | if (tc->type != TC_SETUP_MQPRIO) |
e4c6734e | 5516 | return -EINVAL; |
56f36acd AN |
5517 | |
5518 | tc->mqprio->hw = TC_MQPRIO_HW_OFFLOAD_TCS; | |
5519 | ||
5520 | return i40e_setup_tc(netdev, tc->mqprio->num_tc); | |
e4c6734e JF |
5521 | } |
5522 | ||
41c445ff JB |
5523 | /** |
5524 | * i40e_open - Called when a network interface is made active | |
5525 | * @netdev: network interface device structure | |
5526 | * | |
5527 | * The open entry point is called when a network interface is made | |
5528 | * active by the system (IFF_UP). At this point all resources needed | |
5529 | * for transmit and receive operations are allocated, the interrupt | |
5530 | * handler is registered with the OS, the netdev watchdog subtask is | |
5531 | * enabled, and the stack is notified that the interface is ready. | |
5532 | * | |
5533 | * Returns 0 on success, negative value on failure | |
5534 | **/ | |
38e00438 | 5535 | int i40e_open(struct net_device *netdev) |
41c445ff JB |
5536 | { |
5537 | struct i40e_netdev_priv *np = netdev_priv(netdev); | |
5538 | struct i40e_vsi *vsi = np->vsi; | |
5539 | struct i40e_pf *pf = vsi->back; | |
41c445ff JB |
5540 | int err; |
5541 | ||
4eb3f768 SN |
5542 | /* disallow open during test or if eeprom is broken */ |
5543 | if (test_bit(__I40E_TESTING, &pf->state) || | |
5544 | test_bit(__I40E_BAD_EEPROM, &pf->state)) | |
41c445ff JB |
5545 | return -EBUSY; |
5546 | ||
5547 | netif_carrier_off(netdev); | |
5548 | ||
6c167f58 EK |
5549 | err = i40e_vsi_open(vsi); |
5550 | if (err) | |
5551 | return err; | |
5552 | ||
059dab69 JB |
5553 | /* configure global TSO hardware offload settings */ |
5554 | wr32(&pf->hw, I40E_GLLAN_TSOMSK_F, be32_to_cpu(TCP_FLAG_PSH | | |
5555 | TCP_FLAG_FIN) >> 16); | |
5556 | wr32(&pf->hw, I40E_GLLAN_TSOMSK_M, be32_to_cpu(TCP_FLAG_PSH | | |
5557 | TCP_FLAG_FIN | | |
5558 | TCP_FLAG_CWR) >> 16); | |
5559 | wr32(&pf->hw, I40E_GLLAN_TSOMSK_L, be32_to_cpu(TCP_FLAG_CWR) >> 16); | |
5560 | ||
06a5f7f1 | 5561 | udp_tunnel_get_rx_info(netdev); |
e3219ce6 | 5562 | |
6c167f58 EK |
5563 | return 0; |
5564 | } | |
5565 | ||
5566 | /** | |
5567 | * i40e_vsi_open - | |
5568 | * @vsi: the VSI to open | |
5569 | * | |
5570 | * Finish initialization of the VSI. | |
5571 | * | |
5572 | * Returns 0 on success, negative value on failure | |
373149fc MS |
5573 | * |
5574 | * Note: expects to be called while under rtnl_lock() | |
6c167f58 EK |
5575 | **/ |
5576 | int i40e_vsi_open(struct i40e_vsi *vsi) | |
5577 | { | |
5578 | struct i40e_pf *pf = vsi->back; | |
b294ac70 | 5579 | char int_name[I40E_INT_NAME_STR_LEN]; |
6c167f58 EK |
5580 | int err; |
5581 | ||
41c445ff JB |
5582 | /* allocate descriptors */ |
5583 | err = i40e_vsi_setup_tx_resources(vsi); | |
5584 | if (err) | |
5585 | goto err_setup_tx; | |
5586 | err = i40e_vsi_setup_rx_resources(vsi); | |
5587 | if (err) | |
5588 | goto err_setup_rx; | |
5589 | ||
5590 | err = i40e_vsi_configure(vsi); | |
5591 | if (err) | |
5592 | goto err_setup_rx; | |
5593 | ||
c22e3c6c SN |
5594 | if (vsi->netdev) { |
5595 | snprintf(int_name, sizeof(int_name) - 1, "%s-%s", | |
5596 | dev_driver_string(&pf->pdev->dev), vsi->netdev->name); | |
5597 | err = i40e_vsi_request_irq(vsi, int_name); | |
5598 | if (err) | |
5599 | goto err_setup_rx; | |
41c445ff | 5600 | |
c22e3c6c SN |
5601 | /* Notify the stack of the actual queue counts. */ |
5602 | err = netif_set_real_num_tx_queues(vsi->netdev, | |
5603 | vsi->num_queue_pairs); | |
5604 | if (err) | |
5605 | goto err_set_queues; | |
25946ddb | 5606 | |
c22e3c6c SN |
5607 | err = netif_set_real_num_rx_queues(vsi->netdev, |
5608 | vsi->num_queue_pairs); | |
5609 | if (err) | |
5610 | goto err_set_queues; | |
8a9eb7d3 SN |
5611 | |
5612 | } else if (vsi->type == I40E_VSI_FDIR) { | |
e240f674 | 5613 | snprintf(int_name, sizeof(int_name) - 1, "%s-%s:fdir", |
b2008cbf CW |
5614 | dev_driver_string(&pf->pdev->dev), |
5615 | dev_name(&pf->pdev->dev)); | |
8a9eb7d3 | 5616 | err = i40e_vsi_request_irq(vsi, int_name); |
b2008cbf | 5617 | |
c22e3c6c | 5618 | } else { |
ce9ccb17 | 5619 | err = -EINVAL; |
6c167f58 EK |
5620 | goto err_setup_rx; |
5621 | } | |
25946ddb | 5622 | |
41c445ff JB |
5623 | err = i40e_up_complete(vsi); |
5624 | if (err) | |
5625 | goto err_up_complete; | |
5626 | ||
41c445ff JB |
5627 | return 0; |
5628 | ||
5629 | err_up_complete: | |
5630 | i40e_down(vsi); | |
25946ddb | 5631 | err_set_queues: |
41c445ff JB |
5632 | i40e_vsi_free_irq(vsi); |
5633 | err_setup_rx: | |
5634 | i40e_vsi_free_rx_resources(vsi); | |
5635 | err_setup_tx: | |
5636 | i40e_vsi_free_tx_resources(vsi); | |
5637 | if (vsi == pf->vsi[pf->lan_vsi]) | |
373149fc | 5638 | i40e_do_reset(pf, BIT_ULL(__I40E_PF_RESET_REQUESTED), true); |
41c445ff JB |
5639 | |
5640 | return err; | |
5641 | } | |
5642 | ||
17a73f6b JG |
5643 | /** |
5644 | * i40e_fdir_filter_exit - Cleans up the Flow Director accounting | |
b40c82e6 | 5645 | * @pf: Pointer to PF |
17a73f6b JG |
5646 | * |
5647 | * This function destroys the hlist where all the Flow Director | |
5648 | * filters were saved. | |
5649 | **/ | |
5650 | static void i40e_fdir_filter_exit(struct i40e_pf *pf) | |
5651 | { | |
5652 | struct i40e_fdir_filter *filter; | |
0e588de1 | 5653 | struct i40e_flex_pit *pit_entry, *tmp; |
17a73f6b JG |
5654 | struct hlist_node *node2; |
5655 | ||
5656 | hlist_for_each_entry_safe(filter, node2, | |
5657 | &pf->fdir_filter_list, fdir_node) { | |
5658 | hlist_del(&filter->fdir_node); | |
5659 | kfree(filter); | |
5660 | } | |
097dbf52 | 5661 | |
0e588de1 JK |
5662 | list_for_each_entry_safe(pit_entry, tmp, &pf->l3_flex_pit_list, list) { |
5663 | list_del(&pit_entry->list); | |
5664 | kfree(pit_entry); | |
5665 | } | |
5666 | INIT_LIST_HEAD(&pf->l3_flex_pit_list); | |
5667 | ||
5668 | list_for_each_entry_safe(pit_entry, tmp, &pf->l4_flex_pit_list, list) { | |
5669 | list_del(&pit_entry->list); | |
5670 | kfree(pit_entry); | |
5671 | } | |
5672 | INIT_LIST_HEAD(&pf->l4_flex_pit_list); | |
5673 | ||
17a73f6b | 5674 | pf->fdir_pf_active_filters = 0; |
097dbf52 JK |
5675 | pf->fd_tcp4_filter_cnt = 0; |
5676 | pf->fd_udp4_filter_cnt = 0; | |
f223c875 | 5677 | pf->fd_sctp4_filter_cnt = 0; |
097dbf52 | 5678 | pf->fd_ip4_filter_cnt = 0; |
3bcee1e6 JK |
5679 | |
5680 | /* Reprogram the default input set for TCP/IPv4 */ | |
5681 | i40e_write_fd_input_set(pf, I40E_FILTER_PCTYPE_NONF_IPV4_TCP, | |
5682 | I40E_L3_SRC_MASK | I40E_L3_DST_MASK | | |
5683 | I40E_L4_SRC_MASK | I40E_L4_DST_MASK); | |
5684 | ||
5685 | /* Reprogram the default input set for UDP/IPv4 */ | |
5686 | i40e_write_fd_input_set(pf, I40E_FILTER_PCTYPE_NONF_IPV4_UDP, | |
5687 | I40E_L3_SRC_MASK | I40E_L3_DST_MASK | | |
5688 | I40E_L4_SRC_MASK | I40E_L4_DST_MASK); | |
5689 | ||
5690 | /* Reprogram the default input set for SCTP/IPv4 */ | |
5691 | i40e_write_fd_input_set(pf, I40E_FILTER_PCTYPE_NONF_IPV4_SCTP, | |
5692 | I40E_L3_SRC_MASK | I40E_L3_DST_MASK | | |
5693 | I40E_L4_SRC_MASK | I40E_L4_DST_MASK); | |
5694 | ||
5695 | /* Reprogram the default input set for Other/IPv4 */ | |
5696 | i40e_write_fd_input_set(pf, I40E_FILTER_PCTYPE_NONF_IPV4_OTHER, | |
5697 | I40E_L3_SRC_MASK | I40E_L3_DST_MASK); | |
17a73f6b JG |
5698 | } |
5699 | ||
41c445ff JB |
5700 | /** |
5701 | * i40e_close - Disables a network interface | |
5702 | * @netdev: network interface device structure | |
5703 | * | |
5704 | * The close entry point is called when an interface is de-activated | |
5705 | * by the OS. The hardware is still under the driver's control, but | |
5706 | * this netdev interface is disabled. | |
5707 | * | |
5708 | * Returns 0, this is not allowed to fail | |
5709 | **/ | |
38e00438 | 5710 | int i40e_close(struct net_device *netdev) |
41c445ff JB |
5711 | { |
5712 | struct i40e_netdev_priv *np = netdev_priv(netdev); | |
5713 | struct i40e_vsi *vsi = np->vsi; | |
5714 | ||
90ef8d47 | 5715 | i40e_vsi_close(vsi); |
41c445ff JB |
5716 | |
5717 | return 0; | |
5718 | } | |
5719 | ||
5720 | /** | |
5721 | * i40e_do_reset - Start a PF or Core Reset sequence | |
5722 | * @pf: board private structure | |
5723 | * @reset_flags: which reset is requested | |
373149fc MS |
5724 | * @lock_acquired: indicates whether or not the lock has been acquired |
5725 | * before this function was called. | |
41c445ff JB |
5726 | * |
5727 | * The essential difference in resets is that the PF Reset | |
5728 | * doesn't clear the packet buffers, doesn't reset the PE | |
5729 | * firmware, and doesn't bother the other PFs on the chip. | |
5730 | **/ | |
373149fc | 5731 | void i40e_do_reset(struct i40e_pf *pf, u32 reset_flags, bool lock_acquired) |
41c445ff JB |
5732 | { |
5733 | u32 val; | |
5734 | ||
5735 | WARN_ON(in_interrupt()); | |
5736 | ||
263fc48f | 5737 | |
41c445ff | 5738 | /* do the biggest reset indicated */ |
41a1d04b | 5739 | if (reset_flags & BIT_ULL(__I40E_GLOBAL_RESET_REQUESTED)) { |
41c445ff JB |
5740 | |
5741 | /* Request a Global Reset | |
5742 | * | |
5743 | * This will start the chip's countdown to the actual full | |
5744 | * chip reset event, and a warning interrupt to be sent | |
5745 | * to all PFs, including the requestor. Our handler | |
5746 | * for the warning interrupt will deal with the shutdown | |
5747 | * and recovery of the switch setup. | |
5748 | */ | |
69bfb110 | 5749 | dev_dbg(&pf->pdev->dev, "GlobalR requested\n"); |
41c445ff JB |
5750 | val = rd32(&pf->hw, I40E_GLGEN_RTRIG); |
5751 | val |= I40E_GLGEN_RTRIG_GLOBR_MASK; | |
5752 | wr32(&pf->hw, I40E_GLGEN_RTRIG, val); | |
5753 | ||
41a1d04b | 5754 | } else if (reset_flags & BIT_ULL(__I40E_CORE_RESET_REQUESTED)) { |
41c445ff JB |
5755 | |
5756 | /* Request a Core Reset | |
5757 | * | |
5758 | * Same as Global Reset, except does *not* include the MAC/PHY | |
5759 | */ | |
69bfb110 | 5760 | dev_dbg(&pf->pdev->dev, "CoreR requested\n"); |
41c445ff JB |
5761 | val = rd32(&pf->hw, I40E_GLGEN_RTRIG); |
5762 | val |= I40E_GLGEN_RTRIG_CORER_MASK; | |
5763 | wr32(&pf->hw, I40E_GLGEN_RTRIG, val); | |
5764 | i40e_flush(&pf->hw); | |
5765 | ||
41a1d04b | 5766 | } else if (reset_flags & BIT_ULL(__I40E_PF_RESET_REQUESTED)) { |
41c445ff JB |
5767 | |
5768 | /* Request a PF Reset | |
5769 | * | |
5770 | * Resets only the PF-specific registers | |
5771 | * | |
5772 | * This goes directly to the tear-down and rebuild of | |
5773 | * the switch, since we need to do all the recovery as | |
5774 | * for the Core Reset. | |
5775 | */ | |
69bfb110 | 5776 | dev_dbg(&pf->pdev->dev, "PFR requested\n"); |
373149fc | 5777 | i40e_handle_reset_warning(pf, lock_acquired); |
41c445ff | 5778 | |
41a1d04b | 5779 | } else if (reset_flags & BIT_ULL(__I40E_REINIT_REQUESTED)) { |
41c445ff JB |
5780 | int v; |
5781 | ||
5782 | /* Find the VSI(s) that requested a re-init */ | |
5783 | dev_info(&pf->pdev->dev, | |
5784 | "VSI reinit requested\n"); | |
505682cd | 5785 | for (v = 0; v < pf->num_alloc_vsi; v++) { |
41c445ff | 5786 | struct i40e_vsi *vsi = pf->vsi[v]; |
6995b36c | 5787 | |
41c445ff | 5788 | if (vsi != NULL && |
d19cb64b JK |
5789 | test_and_clear_bit(__I40E_VSI_REINIT_REQUESTED, |
5790 | &vsi->state)) | |
41c445ff | 5791 | i40e_vsi_reinit_locked(pf->vsi[v]); |
41c445ff | 5792 | } |
41a1d04b | 5793 | } else if (reset_flags & BIT_ULL(__I40E_DOWN_REQUESTED)) { |
b5d06f05 NP |
5794 | int v; |
5795 | ||
5796 | /* Find the VSI(s) that needs to be brought down */ | |
5797 | dev_info(&pf->pdev->dev, "VSI down requested\n"); | |
5798 | for (v = 0; v < pf->num_alloc_vsi; v++) { | |
5799 | struct i40e_vsi *vsi = pf->vsi[v]; | |
6995b36c | 5800 | |
b5d06f05 | 5801 | if (vsi != NULL && |
d19cb64b JK |
5802 | test_and_clear_bit(__I40E_VSI_DOWN_REQUESTED, |
5803 | &vsi->state)) { | |
5804 | set_bit(__I40E_VSI_DOWN, &vsi->state); | |
b5d06f05 | 5805 | i40e_down(vsi); |
b5d06f05 NP |
5806 | } |
5807 | } | |
41c445ff JB |
5808 | } else { |
5809 | dev_info(&pf->pdev->dev, | |
5810 | "bad reset request 0x%08x\n", reset_flags); | |
41c445ff JB |
5811 | } |
5812 | } | |
5813 | ||
4e3b35b0 NP |
5814 | #ifdef CONFIG_I40E_DCB |
5815 | /** | |
5816 | * i40e_dcb_need_reconfig - Check if DCB needs reconfig | |
5817 | * @pf: board private structure | |
5818 | * @old_cfg: current DCB config | |
5819 | * @new_cfg: new DCB config | |
5820 | **/ | |
5821 | bool i40e_dcb_need_reconfig(struct i40e_pf *pf, | |
5822 | struct i40e_dcbx_config *old_cfg, | |
5823 | struct i40e_dcbx_config *new_cfg) | |
5824 | { | |
5825 | bool need_reconfig = false; | |
5826 | ||
5827 | /* Check if ETS configuration has changed */ | |
5828 | if (memcmp(&new_cfg->etscfg, | |
5829 | &old_cfg->etscfg, | |
5830 | sizeof(new_cfg->etscfg))) { | |
5831 | /* If Priority Table has changed reconfig is needed */ | |
5832 | if (memcmp(&new_cfg->etscfg.prioritytable, | |
5833 | &old_cfg->etscfg.prioritytable, | |
5834 | sizeof(new_cfg->etscfg.prioritytable))) { | |
5835 | need_reconfig = true; | |
69bfb110 | 5836 | dev_dbg(&pf->pdev->dev, "ETS UP2TC changed.\n"); |
4e3b35b0 NP |
5837 | } |
5838 | ||
5839 | if (memcmp(&new_cfg->etscfg.tcbwtable, | |
5840 | &old_cfg->etscfg.tcbwtable, | |
5841 | sizeof(new_cfg->etscfg.tcbwtable))) | |
69bfb110 | 5842 | dev_dbg(&pf->pdev->dev, "ETS TC BW Table changed.\n"); |
4e3b35b0 NP |
5843 | |
5844 | if (memcmp(&new_cfg->etscfg.tsatable, | |
5845 | &old_cfg->etscfg.tsatable, | |
5846 | sizeof(new_cfg->etscfg.tsatable))) | |
69bfb110 | 5847 | dev_dbg(&pf->pdev->dev, "ETS TSA Table changed.\n"); |
4e3b35b0 NP |
5848 | } |
5849 | ||
5850 | /* Check if PFC configuration has changed */ | |
5851 | if (memcmp(&new_cfg->pfc, | |
5852 | &old_cfg->pfc, | |
5853 | sizeof(new_cfg->pfc))) { | |
5854 | need_reconfig = true; | |
69bfb110 | 5855 | dev_dbg(&pf->pdev->dev, "PFC config change detected.\n"); |
4e3b35b0 NP |
5856 | } |
5857 | ||
5858 | /* Check if APP Table has changed */ | |
5859 | if (memcmp(&new_cfg->app, | |
5860 | &old_cfg->app, | |
3d9667a9 | 5861 | sizeof(new_cfg->app))) { |
4e3b35b0 | 5862 | need_reconfig = true; |
69bfb110 | 5863 | dev_dbg(&pf->pdev->dev, "APP Table change detected.\n"); |
3d9667a9 | 5864 | } |
4e3b35b0 | 5865 | |
fb43201f | 5866 | dev_dbg(&pf->pdev->dev, "dcb need_reconfig=%d\n", need_reconfig); |
4e3b35b0 NP |
5867 | return need_reconfig; |
5868 | } | |
5869 | ||
5870 | /** | |
5871 | * i40e_handle_lldp_event - Handle LLDP Change MIB event | |
5872 | * @pf: board private structure | |
5873 | * @e: event info posted on ARQ | |
5874 | **/ | |
5875 | static int i40e_handle_lldp_event(struct i40e_pf *pf, | |
5876 | struct i40e_arq_event_info *e) | |
5877 | { | |
5878 | struct i40e_aqc_lldp_get_mib *mib = | |
5879 | (struct i40e_aqc_lldp_get_mib *)&e->desc.params.raw; | |
5880 | struct i40e_hw *hw = &pf->hw; | |
4e3b35b0 NP |
5881 | struct i40e_dcbx_config tmp_dcbx_cfg; |
5882 | bool need_reconfig = false; | |
5883 | int ret = 0; | |
5884 | u8 type; | |
5885 | ||
4d9b6043 | 5886 | /* Not DCB capable or capability disabled */ |
ea6acb7e | 5887 | if (!(pf->flags & I40E_FLAG_DCB_CAPABLE)) |
4d9b6043 NP |
5888 | return ret; |
5889 | ||
4e3b35b0 NP |
5890 | /* Ignore if event is not for Nearest Bridge */ |
5891 | type = ((mib->type >> I40E_AQ_LLDP_BRIDGE_TYPE_SHIFT) | |
5892 | & I40E_AQ_LLDP_BRIDGE_TYPE_MASK); | |
fb43201f | 5893 | dev_dbg(&pf->pdev->dev, "LLDP event mib bridge type 0x%x\n", type); |
4e3b35b0 NP |
5894 | if (type != I40E_AQ_LLDP_BRIDGE_TYPE_NEAREST_BRIDGE) |
5895 | return ret; | |
5896 | ||
5897 | /* Check MIB Type and return if event for Remote MIB update */ | |
5898 | type = mib->type & I40E_AQ_LLDP_MIB_TYPE_MASK; | |
9fa61dd2 | 5899 | dev_dbg(&pf->pdev->dev, |
fb43201f | 5900 | "LLDP event mib type %s\n", type ? "remote" : "local"); |
4e3b35b0 NP |
5901 | if (type == I40E_AQ_LLDP_MIB_REMOTE) { |
5902 | /* Update the remote cached instance and return */ | |
5903 | ret = i40e_aq_get_dcb_config(hw, I40E_AQ_LLDP_MIB_REMOTE, | |
5904 | I40E_AQ_LLDP_BRIDGE_TYPE_NEAREST_BRIDGE, | |
5905 | &hw->remote_dcbx_config); | |
5906 | goto exit; | |
5907 | } | |
5908 | ||
9fa61dd2 | 5909 | /* Store the old configuration */ |
1a2f6248 | 5910 | tmp_dcbx_cfg = hw->local_dcbx_config; |
9fa61dd2 | 5911 | |
750fcbcf NP |
5912 | /* Reset the old DCBx configuration data */ |
5913 | memset(&hw->local_dcbx_config, 0, sizeof(hw->local_dcbx_config)); | |
9fa61dd2 NP |
5914 | /* Get updated DCBX data from firmware */ |
5915 | ret = i40e_get_dcb_config(&pf->hw); | |
4e3b35b0 | 5916 | if (ret) { |
f1c7e72e SN |
5917 | dev_info(&pf->pdev->dev, |
5918 | "Failed querying DCB configuration data from firmware, err %s aq_err %s\n", | |
5919 | i40e_stat_str(&pf->hw, ret), | |
5920 | i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status)); | |
4e3b35b0 NP |
5921 | goto exit; |
5922 | } | |
5923 | ||
5924 | /* No change detected in DCBX configs */ | |
750fcbcf NP |
5925 | if (!memcmp(&tmp_dcbx_cfg, &hw->local_dcbx_config, |
5926 | sizeof(tmp_dcbx_cfg))) { | |
69bfb110 | 5927 | dev_dbg(&pf->pdev->dev, "No change detected in DCBX configuration.\n"); |
4e3b35b0 NP |
5928 | goto exit; |
5929 | } | |
5930 | ||
750fcbcf NP |
5931 | need_reconfig = i40e_dcb_need_reconfig(pf, &tmp_dcbx_cfg, |
5932 | &hw->local_dcbx_config); | |
4e3b35b0 | 5933 | |
750fcbcf | 5934 | i40e_dcbnl_flush_apps(pf, &tmp_dcbx_cfg, &hw->local_dcbx_config); |
4e3b35b0 NP |
5935 | |
5936 | if (!need_reconfig) | |
5937 | goto exit; | |
5938 | ||
4d9b6043 | 5939 | /* Enable DCB tagging only when more than one TC */ |
750fcbcf | 5940 | if (i40e_dcb_get_num_tc(&hw->local_dcbx_config) > 1) |
4d9b6043 NP |
5941 | pf->flags |= I40E_FLAG_DCB_ENABLED; |
5942 | else | |
5943 | pf->flags &= ~I40E_FLAG_DCB_ENABLED; | |
5944 | ||
3480756f | 5945 | set_bit(__I40E_PORT_SUSPENDED, &pf->state); |
4e3b35b0 NP |
5946 | /* Reconfiguration needed quiesce all VSIs */ |
5947 | i40e_pf_quiesce_all_vsi(pf); | |
5948 | ||
5949 | /* Changes in configuration update VEB/VSI */ | |
5950 | i40e_dcb_reconfigure(pf); | |
5951 | ||
2fd75f31 NP |
5952 | ret = i40e_resume_port_tx(pf); |
5953 | ||
3480756f | 5954 | clear_bit(__I40E_PORT_SUSPENDED, &pf->state); |
2fd75f31 | 5955 | /* In case of error no point in resuming VSIs */ |
69129dc3 NP |
5956 | if (ret) |
5957 | goto exit; | |
5958 | ||
3fe06f41 NP |
5959 | /* Wait for the PF's queues to be disabled */ |
5960 | ret = i40e_pf_wait_queues_disabled(pf); | |
11e47708 PN |
5961 | if (ret) { |
5962 | /* Schedule PF reset to recover */ | |
5963 | set_bit(__I40E_PF_RESET_REQUESTED, &pf->state); | |
5964 | i40e_service_event_schedule(pf); | |
5965 | } else { | |
2fd75f31 | 5966 | i40e_pf_unquiesce_all_vsi(pf); |
0ef2d5af MW |
5967 | pf->flags |= (I40E_FLAG_SERVICE_CLIENT_REQUESTED | |
5968 | I40E_FLAG_CLIENT_L2_CHANGE); | |
11e47708 PN |
5969 | } |
5970 | ||
4e3b35b0 NP |
5971 | exit: |
5972 | return ret; | |
5973 | } | |
5974 | #endif /* CONFIG_I40E_DCB */ | |
5975 | ||
23326186 ASJ |
5976 | /** |
5977 | * i40e_do_reset_safe - Protected reset path for userland calls. | |
5978 | * @pf: board private structure | |
5979 | * @reset_flags: which reset is requested | |
5980 | * | |
5981 | **/ | |
5982 | void i40e_do_reset_safe(struct i40e_pf *pf, u32 reset_flags) | |
5983 | { | |
5984 | rtnl_lock(); | |
373149fc | 5985 | i40e_do_reset(pf, reset_flags, true); |
23326186 ASJ |
5986 | rtnl_unlock(); |
5987 | } | |
5988 | ||
41c445ff JB |
5989 | /** |
5990 | * i40e_handle_lan_overflow_event - Handler for LAN queue overflow event | |
5991 | * @pf: board private structure | |
5992 | * @e: event info posted on ARQ | |
5993 | * | |
5994 | * Handler for LAN Queue Overflow Event generated by the firmware for PF | |
5995 | * and VF queues | |
5996 | **/ | |
5997 | static void i40e_handle_lan_overflow_event(struct i40e_pf *pf, | |
5998 | struct i40e_arq_event_info *e) | |
5999 | { | |
6000 | struct i40e_aqc_lan_overflow *data = | |
6001 | (struct i40e_aqc_lan_overflow *)&e->desc.params.raw; | |
6002 | u32 queue = le32_to_cpu(data->prtdcb_rupto); | |
6003 | u32 qtx_ctl = le32_to_cpu(data->otx_ctl); | |
6004 | struct i40e_hw *hw = &pf->hw; | |
6005 | struct i40e_vf *vf; | |
6006 | u16 vf_id; | |
6007 | ||
69bfb110 JB |
6008 | dev_dbg(&pf->pdev->dev, "overflow Rx Queue Number = %d QTX_CTL=0x%08x\n", |
6009 | queue, qtx_ctl); | |
41c445ff JB |
6010 | |
6011 | /* Queue belongs to VF, find the VF and issue VF reset */ | |
6012 | if (((qtx_ctl & I40E_QTX_CTL_PFVF_Q_MASK) | |
6013 | >> I40E_QTX_CTL_PFVF_Q_SHIFT) == I40E_QTX_CTL_VF_QUEUE) { | |
6014 | vf_id = (u16)((qtx_ctl & I40E_QTX_CTL_VFVM_INDX_MASK) | |
6015 | >> I40E_QTX_CTL_VFVM_INDX_SHIFT); | |
6016 | vf_id -= hw->func_caps.vf_base_id; | |
6017 | vf = &pf->vf[vf_id]; | |
6018 | i40e_vc_notify_vf_reset(vf); | |
6019 | /* Allow VF to process pending reset notification */ | |
6020 | msleep(20); | |
6021 | i40e_reset_vf(vf, false); | |
6022 | } | |
6023 | } | |
6024 | ||
55a5e60b | 6025 | /** |
12957388 ASJ |
6026 | * i40e_get_cur_guaranteed_fd_count - Get the consumed guaranteed FD filters |
6027 | * @pf: board private structure | |
6028 | **/ | |
04294e38 | 6029 | u32 i40e_get_cur_guaranteed_fd_count(struct i40e_pf *pf) |
12957388 | 6030 | { |
04294e38 | 6031 | u32 val, fcnt_prog; |
12957388 ASJ |
6032 | |
6033 | val = rd32(&pf->hw, I40E_PFQF_FDSTAT); | |
6034 | fcnt_prog = (val & I40E_PFQF_FDSTAT_GUARANT_CNT_MASK); | |
6035 | return fcnt_prog; | |
6036 | } | |
6037 | ||
6038 | /** | |
04294e38 | 6039 | * i40e_get_current_fd_count - Get total FD filters programmed for this PF |
55a5e60b ASJ |
6040 | * @pf: board private structure |
6041 | **/ | |
04294e38 | 6042 | u32 i40e_get_current_fd_count(struct i40e_pf *pf) |
55a5e60b | 6043 | { |
04294e38 ASJ |
6044 | u32 val, fcnt_prog; |
6045 | ||
55a5e60b ASJ |
6046 | val = rd32(&pf->hw, I40E_PFQF_FDSTAT); |
6047 | fcnt_prog = (val & I40E_PFQF_FDSTAT_GUARANT_CNT_MASK) + | |
6048 | ((val & I40E_PFQF_FDSTAT_BEST_CNT_MASK) >> | |
6049 | I40E_PFQF_FDSTAT_BEST_CNT_SHIFT); | |
6050 | return fcnt_prog; | |
6051 | } | |
1e1be8f6 | 6052 | |
04294e38 ASJ |
6053 | /** |
6054 | * i40e_get_global_fd_count - Get total FD filters programmed on device | |
6055 | * @pf: board private structure | |
6056 | **/ | |
6057 | u32 i40e_get_global_fd_count(struct i40e_pf *pf) | |
6058 | { | |
6059 | u32 val, fcnt_prog; | |
6060 | ||
6061 | val = rd32(&pf->hw, I40E_GLQF_FDCNT_0); | |
6062 | fcnt_prog = (val & I40E_GLQF_FDCNT_0_GUARANT_CNT_MASK) + | |
6063 | ((val & I40E_GLQF_FDCNT_0_BESTCNT_MASK) >> | |
6064 | I40E_GLQF_FDCNT_0_BESTCNT_SHIFT); | |
6065 | return fcnt_prog; | |
6066 | } | |
6067 | ||
55a5e60b ASJ |
6068 | /** |
6069 | * i40e_fdir_check_and_reenable - Function to reenabe FD ATR or SB if disabled | |
6070 | * @pf: board private structure | |
6071 | **/ | |
6072 | void i40e_fdir_check_and_reenable(struct i40e_pf *pf) | |
6073 | { | |
3487b6c3 | 6074 | struct i40e_fdir_filter *filter; |
55a5e60b | 6075 | u32 fcnt_prog, fcnt_avail; |
3487b6c3 | 6076 | struct hlist_node *node; |
55a5e60b | 6077 | |
1e1be8f6 ASJ |
6078 | if (test_bit(__I40E_FD_FLUSH_REQUESTED, &pf->state)) |
6079 | return; | |
6080 | ||
55a5e60b ASJ |
6081 | /* Check if, FD SB or ATR was auto disabled and if there is enough room |
6082 | * to re-enable | |
6083 | */ | |
04294e38 | 6084 | fcnt_prog = i40e_get_global_fd_count(pf); |
12957388 | 6085 | fcnt_avail = pf->fdir_pf_filter_count; |
1e1be8f6 ASJ |
6086 | if ((fcnt_prog < (fcnt_avail - I40E_FDIR_BUFFER_HEAD_ROOM)) || |
6087 | (pf->fd_add_err == 0) || | |
6088 | (i40e_get_current_atr_cnt(pf) < pf->fd_atr_cnt)) { | |
55a5e60b | 6089 | if ((pf->flags & I40E_FLAG_FD_SB_ENABLED) && |
b77ac975 HR |
6090 | (pf->hw_disabled_flags & I40E_FLAG_FD_SB_ENABLED)) { |
6091 | pf->hw_disabled_flags &= ~I40E_FLAG_FD_SB_ENABLED; | |
2e4875e3 ASJ |
6092 | if (I40E_DEBUG_FD & pf->hw.debug_mask) |
6093 | dev_info(&pf->pdev->dev, "FD Sideband/ntuple is being enabled since we have space in the table now\n"); | |
55a5e60b ASJ |
6094 | } |
6095 | } | |
a3417d28 JK |
6096 | |
6097 | /* Wait for some more space to be available to turn on ATR. We also | |
6098 | * must check that no existing ntuple rules for TCP are in effect | |
6099 | */ | |
55a5e60b ASJ |
6100 | if (fcnt_prog < (fcnt_avail - I40E_FDIR_BUFFER_HEAD_ROOM * 2)) { |
6101 | if ((pf->flags & I40E_FLAG_FD_ATR_ENABLED) && | |
b77ac975 | 6102 | (pf->hw_disabled_flags & I40E_FLAG_FD_ATR_ENABLED) && |
097dbf52 | 6103 | (pf->fd_tcp4_filter_cnt == 0)) { |
b77ac975 | 6104 | pf->hw_disabled_flags &= ~I40E_FLAG_FD_ATR_ENABLED; |
2e4875e3 | 6105 | if (I40E_DEBUG_FD & pf->hw.debug_mask) |
a3417d28 | 6106 | dev_info(&pf->pdev->dev, "ATR is being enabled since we have space in the table and there are no conflicting ntuple rules\n"); |
55a5e60b ASJ |
6107 | } |
6108 | } | |
3487b6c3 CW |
6109 | |
6110 | /* if hw had a problem adding a filter, delete it */ | |
6111 | if (pf->fd_inv > 0) { | |
6112 | hlist_for_each_entry_safe(filter, node, | |
6113 | &pf->fdir_filter_list, fdir_node) { | |
6114 | if (filter->fd_id == pf->fd_inv) { | |
6115 | hlist_del(&filter->fdir_node); | |
6116 | kfree(filter); | |
6117 | pf->fdir_pf_active_filters--; | |
6118 | } | |
6119 | } | |
6120 | } | |
55a5e60b ASJ |
6121 | } |
6122 | ||
1e1be8f6 | 6123 | #define I40E_MIN_FD_FLUSH_INTERVAL 10 |
04294e38 | 6124 | #define I40E_MIN_FD_FLUSH_SB_ATR_UNSTABLE 30 |
1e1be8f6 ASJ |
6125 | /** |
6126 | * i40e_fdir_flush_and_replay - Function to flush all FD filters and replay SB | |
6127 | * @pf: board private structure | |
6128 | **/ | |
6129 | static void i40e_fdir_flush_and_replay(struct i40e_pf *pf) | |
6130 | { | |
04294e38 | 6131 | unsigned long min_flush_time; |
1e1be8f6 | 6132 | int flush_wait_retry = 50; |
04294e38 ASJ |
6133 | bool disable_atr = false; |
6134 | int fd_room; | |
1e1be8f6 ASJ |
6135 | int reg; |
6136 | ||
a5fdaf34 JB |
6137 | if (!time_after(jiffies, pf->fd_flush_timestamp + |
6138 | (I40E_MIN_FD_FLUSH_INTERVAL * HZ))) | |
6139 | return; | |
04294e38 | 6140 | |
a5fdaf34 JB |
6141 | /* If the flush is happening too quick and we have mostly SB rules we |
6142 | * should not re-enable ATR for some time. | |
6143 | */ | |
6144 | min_flush_time = pf->fd_flush_timestamp + | |
6145 | (I40E_MIN_FD_FLUSH_SB_ATR_UNSTABLE * HZ); | |
6146 | fd_room = pf->fdir_pf_filter_count - pf->fdir_pf_active_filters; | |
6147 | ||
6148 | if (!(time_after(jiffies, min_flush_time)) && | |
6149 | (fd_room < I40E_FDIR_BUFFER_HEAD_ROOM_FOR_ATR)) { | |
6150 | if (I40E_DEBUG_FD & pf->hw.debug_mask) | |
6151 | dev_info(&pf->pdev->dev, "ATR disabled, not enough FD filter space.\n"); | |
6152 | disable_atr = true; | |
6153 | } | |
6154 | ||
6155 | pf->fd_flush_timestamp = jiffies; | |
b77ac975 | 6156 | pf->hw_disabled_flags |= I40E_FLAG_FD_ATR_ENABLED; |
a5fdaf34 JB |
6157 | /* flush all filters */ |
6158 | wr32(&pf->hw, I40E_PFQF_CTL_1, | |
6159 | I40E_PFQF_CTL_1_CLEARFDTABLE_MASK); | |
6160 | i40e_flush(&pf->hw); | |
6161 | pf->fd_flush_cnt++; | |
6162 | pf->fd_add_err = 0; | |
6163 | do { | |
6164 | /* Check FD flush status every 5-6msec */ | |
6165 | usleep_range(5000, 6000); | |
6166 | reg = rd32(&pf->hw, I40E_PFQF_CTL_1); | |
6167 | if (!(reg & I40E_PFQF_CTL_1_CLEARFDTABLE_MASK)) | |
6168 | break; | |
6169 | } while (flush_wait_retry--); | |
6170 | if (reg & I40E_PFQF_CTL_1_CLEARFDTABLE_MASK) { | |
6171 | dev_warn(&pf->pdev->dev, "FD table did not flush, needs more time\n"); | |
6172 | } else { | |
6173 | /* replay sideband filters */ | |
6174 | i40e_fdir_filter_restore(pf->vsi[pf->lan_vsi]); | |
097dbf52 | 6175 | if (!disable_atr && !pf->fd_tcp4_filter_cnt) |
b77ac975 | 6176 | pf->hw_disabled_flags &= ~I40E_FLAG_FD_ATR_ENABLED; |
a5fdaf34 JB |
6177 | clear_bit(__I40E_FD_FLUSH_REQUESTED, &pf->state); |
6178 | if (I40E_DEBUG_FD & pf->hw.debug_mask) | |
6179 | dev_info(&pf->pdev->dev, "FD Filter table flushed and FD-SB replayed.\n"); | |
1e1be8f6 ASJ |
6180 | } |
6181 | } | |
6182 | ||
6183 | /** | |
6184 | * i40e_get_current_atr_count - Get the count of total FD ATR filters programmed | |
6185 | * @pf: board private structure | |
6186 | **/ | |
04294e38 | 6187 | u32 i40e_get_current_atr_cnt(struct i40e_pf *pf) |
1e1be8f6 ASJ |
6188 | { |
6189 | return i40e_get_current_fd_count(pf) - pf->fdir_pf_active_filters; | |
6190 | } | |
6191 | ||
6192 | /* We can see up to 256 filter programming desc in transit if the filters are | |
6193 | * being applied really fast; before we see the first | |
6194 | * filter miss error on Rx queue 0. Accumulating enough error messages before | |
6195 | * reacting will make sure we don't cause flush too often. | |
6196 | */ | |
6197 | #define I40E_MAX_FD_PROGRAM_ERROR 256 | |
6198 | ||
41c445ff JB |
6199 | /** |
6200 | * i40e_fdir_reinit_subtask - Worker thread to reinit FDIR filter table | |
6201 | * @pf: board private structure | |
6202 | **/ | |
6203 | static void i40e_fdir_reinit_subtask(struct i40e_pf *pf) | |
6204 | { | |
41c445ff | 6205 | |
41c445ff JB |
6206 | /* if interface is down do nothing */ |
6207 | if (test_bit(__I40E_DOWN, &pf->state)) | |
6208 | return; | |
1e1be8f6 | 6209 | |
04294e38 | 6210 | if (test_bit(__I40E_FD_FLUSH_REQUESTED, &pf->state)) |
1e1be8f6 ASJ |
6211 | i40e_fdir_flush_and_replay(pf); |
6212 | ||
55a5e60b ASJ |
6213 | i40e_fdir_check_and_reenable(pf); |
6214 | ||
41c445ff JB |
6215 | } |
6216 | ||
6217 | /** | |
6218 | * i40e_vsi_link_event - notify VSI of a link event | |
6219 | * @vsi: vsi to be notified | |
6220 | * @link_up: link up or down | |
6221 | **/ | |
6222 | static void i40e_vsi_link_event(struct i40e_vsi *vsi, bool link_up) | |
6223 | { | |
d19cb64b | 6224 | if (!vsi || test_bit(__I40E_VSI_DOWN, &vsi->state)) |
41c445ff JB |
6225 | return; |
6226 | ||
6227 | switch (vsi->type) { | |
6228 | case I40E_VSI_MAIN: | |
6229 | if (!vsi->netdev || !vsi->netdev_registered) | |
6230 | break; | |
6231 | ||
6232 | if (link_up) { | |
6233 | netif_carrier_on(vsi->netdev); | |
6234 | netif_tx_wake_all_queues(vsi->netdev); | |
6235 | } else { | |
6236 | netif_carrier_off(vsi->netdev); | |
6237 | netif_tx_stop_all_queues(vsi->netdev); | |
6238 | } | |
6239 | break; | |
6240 | ||
6241 | case I40E_VSI_SRIOV: | |
41c445ff JB |
6242 | case I40E_VSI_VMDQ2: |
6243 | case I40E_VSI_CTRL: | |
e3219ce6 | 6244 | case I40E_VSI_IWARP: |
41c445ff JB |
6245 | case I40E_VSI_MIRROR: |
6246 | default: | |
6247 | /* there is no notification for other VSIs */ | |
6248 | break; | |
6249 | } | |
6250 | } | |
6251 | ||
6252 | /** | |
6253 | * i40e_veb_link_event - notify elements on the veb of a link event | |
6254 | * @veb: veb to be notified | |
6255 | * @link_up: link up or down | |
6256 | **/ | |
6257 | static void i40e_veb_link_event(struct i40e_veb *veb, bool link_up) | |
6258 | { | |
6259 | struct i40e_pf *pf; | |
6260 | int i; | |
6261 | ||
6262 | if (!veb || !veb->pf) | |
6263 | return; | |
6264 | pf = veb->pf; | |
6265 | ||
6266 | /* depth first... */ | |
6267 | for (i = 0; i < I40E_MAX_VEB; i++) | |
6268 | if (pf->veb[i] && (pf->veb[i]->uplink_seid == veb->seid)) | |
6269 | i40e_veb_link_event(pf->veb[i], link_up); | |
6270 | ||
6271 | /* ... now the local VSIs */ | |
505682cd | 6272 | for (i = 0; i < pf->num_alloc_vsi; i++) |
41c445ff JB |
6273 | if (pf->vsi[i] && (pf->vsi[i]->uplink_seid == veb->seid)) |
6274 | i40e_vsi_link_event(pf->vsi[i], link_up); | |
6275 | } | |
6276 | ||
6277 | /** | |
6278 | * i40e_link_event - Update netif_carrier status | |
6279 | * @pf: board private structure | |
6280 | **/ | |
6281 | static void i40e_link_event(struct i40e_pf *pf) | |
6282 | { | |
320684cd | 6283 | struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi]; |
fef59ddf | 6284 | u8 new_link_speed, old_link_speed; |
a72a5abc JB |
6285 | i40e_status status; |
6286 | bool new_link, old_link; | |
41c445ff | 6287 | |
1f9610e4 CS |
6288 | /* save off old link status information */ |
6289 | pf->hw.phy.link_info_old = pf->hw.phy.link_info; | |
6290 | ||
1e701e09 JB |
6291 | /* set this to force the get_link_status call to refresh state */ |
6292 | pf->hw.phy.get_link_info = true; | |
6293 | ||
41c445ff | 6294 | old_link = (pf->hw.phy.link_info_old.link_info & I40E_AQ_LINK_UP); |
a72a5abc JB |
6295 | |
6296 | status = i40e_get_link_status(&pf->hw, &new_link); | |
ae136708 HR |
6297 | |
6298 | /* On success, disable temp link polling */ | |
6299 | if (status == I40E_SUCCESS) { | |
6300 | if (pf->flags & I40E_FLAG_TEMP_LINK_POLLING) | |
6301 | pf->flags &= ~I40E_FLAG_TEMP_LINK_POLLING; | |
6302 | } else { | |
6303 | /* Enable link polling temporarily until i40e_get_link_status | |
6304 | * returns I40E_SUCCESS | |
6305 | */ | |
6306 | pf->flags |= I40E_FLAG_TEMP_LINK_POLLING; | |
a72a5abc JB |
6307 | dev_dbg(&pf->pdev->dev, "couldn't get link state, status: %d\n", |
6308 | status); | |
6309 | return; | |
6310 | } | |
6311 | ||
fef59ddf CS |
6312 | old_link_speed = pf->hw.phy.link_info_old.link_speed; |
6313 | new_link_speed = pf->hw.phy.link_info.link_speed; | |
41c445ff | 6314 | |
1e701e09 | 6315 | if (new_link == old_link && |
fef59ddf | 6316 | new_link_speed == old_link_speed && |
d19cb64b | 6317 | (test_bit(__I40E_VSI_DOWN, &vsi->state) || |
320684cd | 6318 | new_link == netif_carrier_ok(vsi->netdev))) |
41c445ff | 6319 | return; |
320684cd | 6320 | |
d19cb64b | 6321 | if (!test_bit(__I40E_VSI_DOWN, &vsi->state)) |
320684cd | 6322 | i40e_print_link_message(vsi, new_link); |
41c445ff JB |
6323 | |
6324 | /* Notify the base of the switch tree connected to | |
6325 | * the link. Floating VEBs are not notified. | |
6326 | */ | |
6327 | if (pf->lan_veb != I40E_NO_VEB && pf->veb[pf->lan_veb]) | |
6328 | i40e_veb_link_event(pf->veb[pf->lan_veb], new_link); | |
6329 | else | |
320684cd | 6330 | i40e_vsi_link_event(vsi, new_link); |
41c445ff JB |
6331 | |
6332 | if (pf->vf) | |
6333 | i40e_vc_notify_link_state(pf); | |
beb0dff1 JK |
6334 | |
6335 | if (pf->flags & I40E_FLAG_PTP) | |
6336 | i40e_ptp_set_increment(pf); | |
41c445ff JB |
6337 | } |
6338 | ||
41c445ff | 6339 | /** |
21536717 | 6340 | * i40e_watchdog_subtask - periodic checks not using event driven response |
41c445ff JB |
6341 | * @pf: board private structure |
6342 | **/ | |
6343 | static void i40e_watchdog_subtask(struct i40e_pf *pf) | |
6344 | { | |
6345 | int i; | |
6346 | ||
6347 | /* if interface is down do nothing */ | |
6348 | if (test_bit(__I40E_DOWN, &pf->state) || | |
6349 | test_bit(__I40E_CONFIG_BUSY, &pf->state)) | |
6350 | return; | |
6351 | ||
21536717 SN |
6352 | /* make sure we don't do these things too often */ |
6353 | if (time_before(jiffies, (pf->service_timer_previous + | |
6354 | pf->service_timer_period))) | |
6355 | return; | |
6356 | pf->service_timer_previous = jiffies; | |
6357 | ||
ae136708 HR |
6358 | if ((pf->flags & I40E_FLAG_LINK_POLLING_ENABLED) || |
6359 | (pf->flags & I40E_FLAG_TEMP_LINK_POLLING)) | |
9ac77266 | 6360 | i40e_link_event(pf); |
21536717 | 6361 | |
41c445ff JB |
6362 | /* Update the stats for active netdevs so the network stack |
6363 | * can look at updated numbers whenever it cares to | |
6364 | */ | |
505682cd | 6365 | for (i = 0; i < pf->num_alloc_vsi; i++) |
41c445ff JB |
6366 | if (pf->vsi[i] && pf->vsi[i]->netdev) |
6367 | i40e_update_stats(pf->vsi[i]); | |
6368 | ||
d1a8d275 ASJ |
6369 | if (pf->flags & I40E_FLAG_VEB_STATS_ENABLED) { |
6370 | /* Update the stats for the active switching components */ | |
6371 | for (i = 0; i < I40E_MAX_VEB; i++) | |
6372 | if (pf->veb[i]) | |
6373 | i40e_update_veb_stats(pf->veb[i]); | |
6374 | } | |
beb0dff1 JK |
6375 | |
6376 | i40e_ptp_rx_hang(pf->vsi[pf->lan_vsi]); | |
41c445ff JB |
6377 | } |
6378 | ||
6379 | /** | |
6380 | * i40e_reset_subtask - Set up for resetting the device and driver | |
6381 | * @pf: board private structure | |
6382 | **/ | |
6383 | static void i40e_reset_subtask(struct i40e_pf *pf) | |
6384 | { | |
6385 | u32 reset_flags = 0; | |
6386 | ||
6387 | if (test_bit(__I40E_REINIT_REQUESTED, &pf->state)) { | |
75f5cea9 | 6388 | reset_flags |= BIT(__I40E_REINIT_REQUESTED); |
41c445ff JB |
6389 | clear_bit(__I40E_REINIT_REQUESTED, &pf->state); |
6390 | } | |
6391 | if (test_bit(__I40E_PF_RESET_REQUESTED, &pf->state)) { | |
75f5cea9 | 6392 | reset_flags |= BIT(__I40E_PF_RESET_REQUESTED); |
41c445ff JB |
6393 | clear_bit(__I40E_PF_RESET_REQUESTED, &pf->state); |
6394 | } | |
6395 | if (test_bit(__I40E_CORE_RESET_REQUESTED, &pf->state)) { | |
75f5cea9 | 6396 | reset_flags |= BIT(__I40E_CORE_RESET_REQUESTED); |
41c445ff JB |
6397 | clear_bit(__I40E_CORE_RESET_REQUESTED, &pf->state); |
6398 | } | |
6399 | if (test_bit(__I40E_GLOBAL_RESET_REQUESTED, &pf->state)) { | |
75f5cea9 | 6400 | reset_flags |= BIT(__I40E_GLOBAL_RESET_REQUESTED); |
41c445ff JB |
6401 | clear_bit(__I40E_GLOBAL_RESET_REQUESTED, &pf->state); |
6402 | } | |
b5d06f05 | 6403 | if (test_bit(__I40E_DOWN_REQUESTED, &pf->state)) { |
75f5cea9 | 6404 | reset_flags |= BIT(__I40E_DOWN_REQUESTED); |
b5d06f05 NP |
6405 | clear_bit(__I40E_DOWN_REQUESTED, &pf->state); |
6406 | } | |
41c445ff JB |
6407 | |
6408 | /* If there's a recovery already waiting, it takes | |
6409 | * precedence before starting a new reset sequence. | |
6410 | */ | |
6411 | if (test_bit(__I40E_RESET_INTR_RECEIVED, &pf->state)) { | |
373149fc MS |
6412 | i40e_prep_for_reset(pf, false); |
6413 | i40e_reset(pf); | |
6414 | i40e_rebuild(pf, false, false); | |
41c445ff JB |
6415 | } |
6416 | ||
6417 | /* If we're already down or resetting, just bail */ | |
6418 | if (reset_flags && | |
6419 | !test_bit(__I40E_DOWN, &pf->state) && | |
373149fc MS |
6420 | !test_bit(__I40E_CONFIG_BUSY, &pf->state)) { |
6421 | rtnl_lock(); | |
6422 | i40e_do_reset(pf, reset_flags, true); | |
6423 | rtnl_unlock(); | |
6424 | } | |
41c445ff JB |
6425 | } |
6426 | ||
6427 | /** | |
6428 | * i40e_handle_link_event - Handle link event | |
6429 | * @pf: board private structure | |
6430 | * @e: event info posted on ARQ | |
6431 | **/ | |
6432 | static void i40e_handle_link_event(struct i40e_pf *pf, | |
6433 | struct i40e_arq_event_info *e) | |
6434 | { | |
41c445ff JB |
6435 | struct i40e_aqc_get_link_status *status = |
6436 | (struct i40e_aqc_get_link_status *)&e->desc.params.raw; | |
41c445ff | 6437 | |
1e701e09 JB |
6438 | /* Do a new status request to re-enable LSE reporting |
6439 | * and load new status information into the hw struct | |
6440 | * This completely ignores any state information | |
6441 | * in the ARQ event info, instead choosing to always | |
6442 | * issue the AQ update link status command. | |
6443 | */ | |
6444 | i40e_link_event(pf); | |
6445 | ||
7b592f61 CW |
6446 | /* check for unqualified module, if link is down */ |
6447 | if ((status->link_info & I40E_AQ_MEDIA_AVAILABLE) && | |
6448 | (!(status->an_info & I40E_AQ_QUALIFIED_MODULE)) && | |
6449 | (!(status->link_info & I40E_AQ_LINK_UP))) | |
6450 | dev_err(&pf->pdev->dev, | |
6451 | "The driver failed to link because an unqualified module was detected.\n"); | |
41c445ff JB |
6452 | } |
6453 | ||
6454 | /** | |
6455 | * i40e_clean_adminq_subtask - Clean the AdminQ rings | |
6456 | * @pf: board private structure | |
6457 | **/ | |
6458 | static void i40e_clean_adminq_subtask(struct i40e_pf *pf) | |
6459 | { | |
6460 | struct i40e_arq_event_info event; | |
6461 | struct i40e_hw *hw = &pf->hw; | |
6462 | u16 pending, i = 0; | |
6463 | i40e_status ret; | |
6464 | u16 opcode; | |
86df242b | 6465 | u32 oldval; |
41c445ff JB |
6466 | u32 val; |
6467 | ||
a316f651 ASJ |
6468 | /* Do not run clean AQ when PF reset fails */ |
6469 | if (test_bit(__I40E_RESET_FAILED, &pf->state)) | |
6470 | return; | |
6471 | ||
86df242b SN |
6472 | /* check for error indications */ |
6473 | val = rd32(&pf->hw, pf->hw.aq.arq.len); | |
6474 | oldval = val; | |
6475 | if (val & I40E_PF_ARQLEN_ARQVFE_MASK) { | |
75eb73c1 MW |
6476 | if (hw->debug_mask & I40E_DEBUG_AQ) |
6477 | dev_info(&pf->pdev->dev, "ARQ VF Error detected\n"); | |
86df242b SN |
6478 | val &= ~I40E_PF_ARQLEN_ARQVFE_MASK; |
6479 | } | |
6480 | if (val & I40E_PF_ARQLEN_ARQOVFL_MASK) { | |
75eb73c1 MW |
6481 | if (hw->debug_mask & I40E_DEBUG_AQ) |
6482 | dev_info(&pf->pdev->dev, "ARQ Overflow Error detected\n"); | |
86df242b | 6483 | val &= ~I40E_PF_ARQLEN_ARQOVFL_MASK; |
1d0a4ada | 6484 | pf->arq_overflows++; |
86df242b SN |
6485 | } |
6486 | if (val & I40E_PF_ARQLEN_ARQCRIT_MASK) { | |
75eb73c1 MW |
6487 | if (hw->debug_mask & I40E_DEBUG_AQ) |
6488 | dev_info(&pf->pdev->dev, "ARQ Critical Error detected\n"); | |
86df242b SN |
6489 | val &= ~I40E_PF_ARQLEN_ARQCRIT_MASK; |
6490 | } | |
6491 | if (oldval != val) | |
6492 | wr32(&pf->hw, pf->hw.aq.arq.len, val); | |
6493 | ||
6494 | val = rd32(&pf->hw, pf->hw.aq.asq.len); | |
6495 | oldval = val; | |
6496 | if (val & I40E_PF_ATQLEN_ATQVFE_MASK) { | |
75eb73c1 MW |
6497 | if (pf->hw.debug_mask & I40E_DEBUG_AQ) |
6498 | dev_info(&pf->pdev->dev, "ASQ VF Error detected\n"); | |
86df242b SN |
6499 | val &= ~I40E_PF_ATQLEN_ATQVFE_MASK; |
6500 | } | |
6501 | if (val & I40E_PF_ATQLEN_ATQOVFL_MASK) { | |
75eb73c1 MW |
6502 | if (pf->hw.debug_mask & I40E_DEBUG_AQ) |
6503 | dev_info(&pf->pdev->dev, "ASQ Overflow Error detected\n"); | |
86df242b SN |
6504 | val &= ~I40E_PF_ATQLEN_ATQOVFL_MASK; |
6505 | } | |
6506 | if (val & I40E_PF_ATQLEN_ATQCRIT_MASK) { | |
75eb73c1 MW |
6507 | if (pf->hw.debug_mask & I40E_DEBUG_AQ) |
6508 | dev_info(&pf->pdev->dev, "ASQ Critical Error detected\n"); | |
86df242b SN |
6509 | val &= ~I40E_PF_ATQLEN_ATQCRIT_MASK; |
6510 | } | |
6511 | if (oldval != val) | |
6512 | wr32(&pf->hw, pf->hw.aq.asq.len, val); | |
6513 | ||
1001dc37 MW |
6514 | event.buf_len = I40E_MAX_AQ_BUF_SIZE; |
6515 | event.msg_buf = kzalloc(event.buf_len, GFP_KERNEL); | |
41c445ff JB |
6516 | if (!event.msg_buf) |
6517 | return; | |
6518 | ||
6519 | do { | |
6520 | ret = i40e_clean_arq_element(hw, &event, &pending); | |
56497978 | 6521 | if (ret == I40E_ERR_ADMIN_QUEUE_NO_WORK) |
41c445ff | 6522 | break; |
56497978 | 6523 | else if (ret) { |
41c445ff JB |
6524 | dev_info(&pf->pdev->dev, "ARQ event error %d\n", ret); |
6525 | break; | |
6526 | } | |
6527 | ||
6528 | opcode = le16_to_cpu(event.desc.opcode); | |
6529 | switch (opcode) { | |
6530 | ||
6531 | case i40e_aqc_opc_get_link_status: | |
6532 | i40e_handle_link_event(pf, &event); | |
6533 | break; | |
6534 | case i40e_aqc_opc_send_msg_to_pf: | |
6535 | ret = i40e_vc_process_vf_msg(pf, | |
6536 | le16_to_cpu(event.desc.retval), | |
6537 | le32_to_cpu(event.desc.cookie_high), | |
6538 | le32_to_cpu(event.desc.cookie_low), | |
6539 | event.msg_buf, | |
1001dc37 | 6540 | event.msg_len); |
41c445ff JB |
6541 | break; |
6542 | case i40e_aqc_opc_lldp_update_mib: | |
69bfb110 | 6543 | dev_dbg(&pf->pdev->dev, "ARQ: Update LLDP MIB event received\n"); |
4e3b35b0 NP |
6544 | #ifdef CONFIG_I40E_DCB |
6545 | rtnl_lock(); | |
6546 | ret = i40e_handle_lldp_event(pf, &event); | |
6547 | rtnl_unlock(); | |
6548 | #endif /* CONFIG_I40E_DCB */ | |
41c445ff JB |
6549 | break; |
6550 | case i40e_aqc_opc_event_lan_overflow: | |
69bfb110 | 6551 | dev_dbg(&pf->pdev->dev, "ARQ LAN queue overflow event received\n"); |
41c445ff JB |
6552 | i40e_handle_lan_overflow_event(pf, &event); |
6553 | break; | |
0467bc91 SN |
6554 | case i40e_aqc_opc_send_msg_to_peer: |
6555 | dev_info(&pf->pdev->dev, "ARQ: Msg from other pf\n"); | |
6556 | break; | |
91a0f930 SN |
6557 | case i40e_aqc_opc_nvm_erase: |
6558 | case i40e_aqc_opc_nvm_update: | |
00ada50d | 6559 | case i40e_aqc_opc_oem_post_update: |
6e93d0c9 SN |
6560 | i40e_debug(&pf->hw, I40E_DEBUG_NVM, |
6561 | "ARQ NVM operation 0x%04x completed\n", | |
6562 | opcode); | |
91a0f930 | 6563 | break; |
41c445ff JB |
6564 | default: |
6565 | dev_info(&pf->pdev->dev, | |
56e5ca68 | 6566 | "ARQ: Unknown event 0x%04x ignored\n", |
0467bc91 | 6567 | opcode); |
41c445ff JB |
6568 | break; |
6569 | } | |
1fca3265 CB |
6570 | } while (i++ < pf->adminq_work_limit); |
6571 | ||
6572 | if (i < pf->adminq_work_limit) | |
6573 | clear_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state); | |
41c445ff | 6574 | |
41c445ff JB |
6575 | /* re-enable Admin queue interrupt cause */ |
6576 | val = rd32(hw, I40E_PFINT_ICR0_ENA); | |
6577 | val |= I40E_PFINT_ICR0_ENA_ADMINQ_MASK; | |
6578 | wr32(hw, I40E_PFINT_ICR0_ENA, val); | |
6579 | i40e_flush(hw); | |
6580 | ||
6581 | kfree(event.msg_buf); | |
6582 | } | |
6583 | ||
4eb3f768 SN |
6584 | /** |
6585 | * i40e_verify_eeprom - make sure eeprom is good to use | |
6586 | * @pf: board private structure | |
6587 | **/ | |
6588 | static void i40e_verify_eeprom(struct i40e_pf *pf) | |
6589 | { | |
6590 | int err; | |
6591 | ||
6592 | err = i40e_diag_eeprom_test(&pf->hw); | |
6593 | if (err) { | |
6594 | /* retry in case of garbage read */ | |
6595 | err = i40e_diag_eeprom_test(&pf->hw); | |
6596 | if (err) { | |
6597 | dev_info(&pf->pdev->dev, "eeprom check failed (%d), Tx/Rx traffic disabled\n", | |
6598 | err); | |
6599 | set_bit(__I40E_BAD_EEPROM, &pf->state); | |
6600 | } | |
6601 | } | |
6602 | ||
6603 | if (!err && test_bit(__I40E_BAD_EEPROM, &pf->state)) { | |
6604 | dev_info(&pf->pdev->dev, "eeprom check passed, Tx/Rx traffic enabled\n"); | |
6605 | clear_bit(__I40E_BAD_EEPROM, &pf->state); | |
6606 | } | |
6607 | } | |
6608 | ||
386a0afa AA |
6609 | /** |
6610 | * i40e_enable_pf_switch_lb | |
b40c82e6 | 6611 | * @pf: pointer to the PF structure |
386a0afa AA |
6612 | * |
6613 | * enable switch loop back or die - no point in a return value | |
6614 | **/ | |
6615 | static void i40e_enable_pf_switch_lb(struct i40e_pf *pf) | |
6616 | { | |
6617 | struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi]; | |
6618 | struct i40e_vsi_context ctxt; | |
f1c7e72e | 6619 | int ret; |
386a0afa AA |
6620 | |
6621 | ctxt.seid = pf->main_vsi_seid; | |
6622 | ctxt.pf_num = pf->hw.pf_id; | |
6623 | ctxt.vf_num = 0; | |
f1c7e72e SN |
6624 | ret = i40e_aq_get_vsi_params(&pf->hw, &ctxt, NULL); |
6625 | if (ret) { | |
386a0afa | 6626 | dev_info(&pf->pdev->dev, |
f1c7e72e SN |
6627 | "couldn't get PF vsi config, err %s aq_err %s\n", |
6628 | i40e_stat_str(&pf->hw, ret), | |
6629 | i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status)); | |
386a0afa AA |
6630 | return; |
6631 | } | |
6632 | ctxt.flags = I40E_AQ_VSI_TYPE_PF; | |
6633 | ctxt.info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID); | |
6634 | ctxt.info.switch_id |= cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB); | |
6635 | ||
f1c7e72e SN |
6636 | ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL); |
6637 | if (ret) { | |
386a0afa | 6638 | dev_info(&pf->pdev->dev, |
f1c7e72e SN |
6639 | "update vsi switch failed, err %s aq_err %s\n", |
6640 | i40e_stat_str(&pf->hw, ret), | |
6641 | i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status)); | |
386a0afa AA |
6642 | } |
6643 | } | |
6644 | ||
6645 | /** | |
6646 | * i40e_disable_pf_switch_lb | |
b40c82e6 | 6647 | * @pf: pointer to the PF structure |
386a0afa AA |
6648 | * |
6649 | * disable switch loop back or die - no point in a return value | |
6650 | **/ | |
6651 | static void i40e_disable_pf_switch_lb(struct i40e_pf *pf) | |
6652 | { | |
6653 | struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi]; | |
6654 | struct i40e_vsi_context ctxt; | |
f1c7e72e | 6655 | int ret; |
386a0afa AA |
6656 | |
6657 | ctxt.seid = pf->main_vsi_seid; | |
6658 | ctxt.pf_num = pf->hw.pf_id; | |
6659 | ctxt.vf_num = 0; | |
f1c7e72e SN |
6660 | ret = i40e_aq_get_vsi_params(&pf->hw, &ctxt, NULL); |
6661 | if (ret) { | |
386a0afa | 6662 | dev_info(&pf->pdev->dev, |
f1c7e72e SN |
6663 | "couldn't get PF vsi config, err %s aq_err %s\n", |
6664 | i40e_stat_str(&pf->hw, ret), | |
6665 | i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status)); | |
386a0afa AA |
6666 | return; |
6667 | } | |
6668 | ctxt.flags = I40E_AQ_VSI_TYPE_PF; | |
6669 | ctxt.info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID); | |
6670 | ctxt.info.switch_id &= ~cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB); | |
6671 | ||
f1c7e72e SN |
6672 | ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL); |
6673 | if (ret) { | |
386a0afa | 6674 | dev_info(&pf->pdev->dev, |
f1c7e72e SN |
6675 | "update vsi switch failed, err %s aq_err %s\n", |
6676 | i40e_stat_str(&pf->hw, ret), | |
6677 | i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status)); | |
386a0afa AA |
6678 | } |
6679 | } | |
6680 | ||
51616018 NP |
6681 | /** |
6682 | * i40e_config_bridge_mode - Configure the HW bridge mode | |
6683 | * @veb: pointer to the bridge instance | |
6684 | * | |
6685 | * Configure the loop back mode for the LAN VSI that is downlink to the | |
6686 | * specified HW bridge instance. It is expected this function is called | |
6687 | * when a new HW bridge is instantiated. | |
6688 | **/ | |
6689 | static void i40e_config_bridge_mode(struct i40e_veb *veb) | |
6690 | { | |
6691 | struct i40e_pf *pf = veb->pf; | |
6692 | ||
6dec1017 SN |
6693 | if (pf->hw.debug_mask & I40E_DEBUG_LAN) |
6694 | dev_info(&pf->pdev->dev, "enabling bridge mode: %s\n", | |
6695 | veb->bridge_mode == BRIDGE_MODE_VEPA ? "VEPA" : "VEB"); | |
51616018 NP |
6696 | if (veb->bridge_mode & BRIDGE_MODE_VEPA) |
6697 | i40e_disable_pf_switch_lb(pf); | |
6698 | else | |
6699 | i40e_enable_pf_switch_lb(pf); | |
6700 | } | |
6701 | ||
41c445ff JB |
6702 | /** |
6703 | * i40e_reconstitute_veb - rebuild the VEB and anything connected to it | |
6704 | * @veb: pointer to the VEB instance | |
6705 | * | |
6706 | * This is a recursive function that first builds the attached VSIs then | |
6707 | * recurses in to build the next layer of VEB. We track the connections | |
6708 | * through our own index numbers because the seid's from the HW could | |
6709 | * change across the reset. | |
6710 | **/ | |
6711 | static int i40e_reconstitute_veb(struct i40e_veb *veb) | |
6712 | { | |
6713 | struct i40e_vsi *ctl_vsi = NULL; | |
6714 | struct i40e_pf *pf = veb->pf; | |
6715 | int v, veb_idx; | |
6716 | int ret; | |
6717 | ||
6718 | /* build VSI that owns this VEB, temporarily attached to base VEB */ | |
505682cd | 6719 | for (v = 0; v < pf->num_alloc_vsi && !ctl_vsi; v++) { |
41c445ff JB |
6720 | if (pf->vsi[v] && |
6721 | pf->vsi[v]->veb_idx == veb->idx && | |
6722 | pf->vsi[v]->flags & I40E_VSI_FLAG_VEB_OWNER) { | |
6723 | ctl_vsi = pf->vsi[v]; | |
6724 | break; | |
6725 | } | |
6726 | } | |
6727 | if (!ctl_vsi) { | |
6728 | dev_info(&pf->pdev->dev, | |
6729 | "missing owner VSI for veb_idx %d\n", veb->idx); | |
6730 | ret = -ENOENT; | |
6731 | goto end_reconstitute; | |
6732 | } | |
6733 | if (ctl_vsi != pf->vsi[pf->lan_vsi]) | |
6734 | ctl_vsi->uplink_seid = pf->vsi[pf->lan_vsi]->uplink_seid; | |
6735 | ret = i40e_add_vsi(ctl_vsi); | |
6736 | if (ret) { | |
6737 | dev_info(&pf->pdev->dev, | |
f1c7e72e SN |
6738 | "rebuild of veb_idx %d owner VSI failed: %d\n", |
6739 | veb->idx, ret); | |
41c445ff JB |
6740 | goto end_reconstitute; |
6741 | } | |
6742 | i40e_vsi_reset_stats(ctl_vsi); | |
6743 | ||
6744 | /* create the VEB in the switch and move the VSI onto the VEB */ | |
6745 | ret = i40e_add_veb(veb, ctl_vsi); | |
6746 | if (ret) | |
6747 | goto end_reconstitute; | |
6748 | ||
fc60861e ASJ |
6749 | if (pf->flags & I40E_FLAG_VEB_MODE_ENABLED) |
6750 | veb->bridge_mode = BRIDGE_MODE_VEB; | |
6751 | else | |
6752 | veb->bridge_mode = BRIDGE_MODE_VEPA; | |
51616018 | 6753 | i40e_config_bridge_mode(veb); |
b64ba084 | 6754 | |
41c445ff | 6755 | /* create the remaining VSIs attached to this VEB */ |
505682cd | 6756 | for (v = 0; v < pf->num_alloc_vsi; v++) { |
41c445ff JB |
6757 | if (!pf->vsi[v] || pf->vsi[v] == ctl_vsi) |
6758 | continue; | |
6759 | ||
6760 | if (pf->vsi[v]->veb_idx == veb->idx) { | |
6761 | struct i40e_vsi *vsi = pf->vsi[v]; | |
6995b36c | 6762 | |
41c445ff JB |
6763 | vsi->uplink_seid = veb->seid; |
6764 | ret = i40e_add_vsi(vsi); | |
6765 | if (ret) { | |
6766 | dev_info(&pf->pdev->dev, | |
6767 | "rebuild of vsi_idx %d failed: %d\n", | |
6768 | v, ret); | |
6769 | goto end_reconstitute; | |
6770 | } | |
6771 | i40e_vsi_reset_stats(vsi); | |
6772 | } | |
6773 | } | |
6774 | ||
6775 | /* create any VEBs attached to this VEB - RECURSION */ | |
6776 | for (veb_idx = 0; veb_idx < I40E_MAX_VEB; veb_idx++) { | |
6777 | if (pf->veb[veb_idx] && pf->veb[veb_idx]->veb_idx == veb->idx) { | |
6778 | pf->veb[veb_idx]->uplink_seid = veb->seid; | |
6779 | ret = i40e_reconstitute_veb(pf->veb[veb_idx]); | |
6780 | if (ret) | |
6781 | break; | |
6782 | } | |
6783 | } | |
6784 | ||
6785 | end_reconstitute: | |
6786 | return ret; | |
6787 | } | |
6788 | ||
6789 | /** | |
6790 | * i40e_get_capabilities - get info about the HW | |
6791 | * @pf: the PF struct | |
6792 | **/ | |
6793 | static int i40e_get_capabilities(struct i40e_pf *pf) | |
6794 | { | |
6795 | struct i40e_aqc_list_capabilities_element_resp *cap_buf; | |
6796 | u16 data_size; | |
6797 | int buf_len; | |
6798 | int err; | |
6799 | ||
6800 | buf_len = 40 * sizeof(struct i40e_aqc_list_capabilities_element_resp); | |
6801 | do { | |
6802 | cap_buf = kzalloc(buf_len, GFP_KERNEL); | |
6803 | if (!cap_buf) | |
6804 | return -ENOMEM; | |
6805 | ||
6806 | /* this loads the data into the hw struct for us */ | |
6807 | err = i40e_aq_discover_capabilities(&pf->hw, cap_buf, buf_len, | |
6808 | &data_size, | |
6809 | i40e_aqc_opc_list_func_capabilities, | |
6810 | NULL); | |
6811 | /* data loaded, buffer no longer needed */ | |
6812 | kfree(cap_buf); | |
6813 | ||
6814 | if (pf->hw.aq.asq_last_status == I40E_AQ_RC_ENOMEM) { | |
6815 | /* retry with a larger buffer */ | |
6816 | buf_len = data_size; | |
6817 | } else if (pf->hw.aq.asq_last_status != I40E_AQ_RC_OK) { | |
6818 | dev_info(&pf->pdev->dev, | |
f1c7e72e SN |
6819 | "capability discovery failed, err %s aq_err %s\n", |
6820 | i40e_stat_str(&pf->hw, err), | |
6821 | i40e_aq_str(&pf->hw, | |
6822 | pf->hw.aq.asq_last_status)); | |
41c445ff JB |
6823 | return -ENODEV; |
6824 | } | |
6825 | } while (err); | |
6826 | ||
6827 | if (pf->hw.debug_mask & I40E_DEBUG_USER) | |
6828 | dev_info(&pf->pdev->dev, | |
6829 | "pf=%d, num_vfs=%d, msix_pf=%d, msix_vf=%d, fd_g=%d, fd_b=%d, pf_max_q=%d num_vsi=%d\n", | |
6830 | pf->hw.pf_id, pf->hw.func_caps.num_vfs, | |
6831 | pf->hw.func_caps.num_msix_vectors, | |
6832 | pf->hw.func_caps.num_msix_vectors_vf, | |
6833 | pf->hw.func_caps.fd_filters_guaranteed, | |
6834 | pf->hw.func_caps.fd_filters_best_effort, | |
6835 | pf->hw.func_caps.num_tx_qp, | |
6836 | pf->hw.func_caps.num_vsis); | |
6837 | ||
7134f9ce JB |
6838 | #define DEF_NUM_VSI (1 + (pf->hw.func_caps.fcoe ? 1 : 0) \ |
6839 | + pf->hw.func_caps.num_vfs) | |
6840 | if (pf->hw.revision_id == 0 && (DEF_NUM_VSI > pf->hw.func_caps.num_vsis)) { | |
6841 | dev_info(&pf->pdev->dev, | |
6842 | "got num_vsis %d, setting num_vsis to %d\n", | |
6843 | pf->hw.func_caps.num_vsis, DEF_NUM_VSI); | |
6844 | pf->hw.func_caps.num_vsis = DEF_NUM_VSI; | |
6845 | } | |
6846 | ||
41c445ff JB |
6847 | return 0; |
6848 | } | |
6849 | ||
cbf61325 ASJ |
6850 | static int i40e_vsi_clear(struct i40e_vsi *vsi); |
6851 | ||
41c445ff | 6852 | /** |
cbf61325 | 6853 | * i40e_fdir_sb_setup - initialize the Flow Director resources for Sideband |
41c445ff JB |
6854 | * @pf: board private structure |
6855 | **/ | |
cbf61325 | 6856 | static void i40e_fdir_sb_setup(struct i40e_pf *pf) |
41c445ff JB |
6857 | { |
6858 | struct i40e_vsi *vsi; | |
41c445ff | 6859 | |
407e063c JB |
6860 | /* quick workaround for an NVM issue that leaves a critical register |
6861 | * uninitialized | |
6862 | */ | |
6863 | if (!rd32(&pf->hw, I40E_GLQF_HKEY(0))) { | |
6864 | static const u32 hkey[] = { | |
6865 | 0xe640d33f, 0xcdfe98ab, 0x73fa7161, 0x0d7a7d36, | |
6866 | 0xeacb7d61, 0xaa4f05b6, 0x9c5c89ed, 0xfc425ddb, | |
6867 | 0xa4654832, 0xfc7461d4, 0x8f827619, 0xf5c63c21, | |
6868 | 0x95b3a76d}; | |
4b816446 | 6869 | int i; |
407e063c JB |
6870 | |
6871 | for (i = 0; i <= I40E_GLQF_HKEY_MAX_INDEX; i++) | |
6872 | wr32(&pf->hw, I40E_GLQF_HKEY(i), hkey[i]); | |
6873 | } | |
6874 | ||
cbf61325 | 6875 | if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED)) |
41c445ff JB |
6876 | return; |
6877 | ||
cbf61325 | 6878 | /* find existing VSI and see if it needs configuring */ |
4b816446 | 6879 | vsi = i40e_find_vsi_by_type(pf, I40E_VSI_FDIR); |
cbf61325 ASJ |
6880 | |
6881 | /* create a new VSI if none exists */ | |
41c445ff | 6882 | if (!vsi) { |
cbf61325 ASJ |
6883 | vsi = i40e_vsi_setup(pf, I40E_VSI_FDIR, |
6884 | pf->vsi[pf->lan_vsi]->seid, 0); | |
41c445ff JB |
6885 | if (!vsi) { |
6886 | dev_info(&pf->pdev->dev, "Couldn't create FDir VSI\n"); | |
8a9eb7d3 SN |
6887 | pf->flags &= ~I40E_FLAG_FD_SB_ENABLED; |
6888 | return; | |
41c445ff | 6889 | } |
cbf61325 | 6890 | } |
41c445ff | 6891 | |
8a9eb7d3 | 6892 | i40e_vsi_setup_irqhandler(vsi, i40e_fdir_clean_ring); |
41c445ff JB |
6893 | } |
6894 | ||
6895 | /** | |
6896 | * i40e_fdir_teardown - release the Flow Director resources | |
6897 | * @pf: board private structure | |
6898 | **/ | |
6899 | static void i40e_fdir_teardown(struct i40e_pf *pf) | |
6900 | { | |
4b816446 | 6901 | struct i40e_vsi *vsi; |
41c445ff | 6902 | |
17a73f6b | 6903 | i40e_fdir_filter_exit(pf); |
4b816446 AD |
6904 | vsi = i40e_find_vsi_by_type(pf, I40E_VSI_FDIR); |
6905 | if (vsi) | |
6906 | i40e_vsi_release(vsi); | |
41c445ff JB |
6907 | } |
6908 | ||
6909 | /** | |
f650a38b | 6910 | * i40e_prep_for_reset - prep for the core to reset |
41c445ff | 6911 | * @pf: board private structure |
373149fc MS |
6912 | * @lock_acquired: indicates whether or not the lock has been acquired |
6913 | * before this function was called. | |
41c445ff | 6914 | * |
b40c82e6 | 6915 | * Close up the VFs and other things in prep for PF Reset. |
f650a38b | 6916 | **/ |
373149fc | 6917 | static void i40e_prep_for_reset(struct i40e_pf *pf, bool lock_acquired) |
41c445ff | 6918 | { |
41c445ff | 6919 | struct i40e_hw *hw = &pf->hw; |
60442dea | 6920 | i40e_status ret = 0; |
41c445ff JB |
6921 | u32 v; |
6922 | ||
6923 | clear_bit(__I40E_RESET_INTR_RECEIVED, &pf->state); | |
6924 | if (test_and_set_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state)) | |
23cfbe07 | 6925 | return; |
d3ce5734 MW |
6926 | if (i40e_check_asq_alive(&pf->hw)) |
6927 | i40e_vc_notify_reset(pf); | |
41c445ff | 6928 | |
69bfb110 | 6929 | dev_dbg(&pf->pdev->dev, "Tearing down internal switch for reset\n"); |
41c445ff | 6930 | |
41c445ff | 6931 | /* quiesce the VSIs and their queues that are not already DOWN */ |
373149fc MS |
6932 | /* pf_quiesce_all_vsi modifies netdev structures -rtnl_lock needed */ |
6933 | if (!lock_acquired) | |
6934 | rtnl_lock(); | |
41c445ff | 6935 | i40e_pf_quiesce_all_vsi(pf); |
373149fc MS |
6936 | if (!lock_acquired) |
6937 | rtnl_unlock(); | |
41c445ff | 6938 | |
505682cd | 6939 | for (v = 0; v < pf->num_alloc_vsi; v++) { |
41c445ff JB |
6940 | if (pf->vsi[v]) |
6941 | pf->vsi[v]->seid = 0; | |
6942 | } | |
6943 | ||
6944 | i40e_shutdown_adminq(&pf->hw); | |
6945 | ||
f650a38b | 6946 | /* call shutdown HMC */ |
60442dea SN |
6947 | if (hw->hmc.hmc_obj) { |
6948 | ret = i40e_shutdown_lan_hmc(hw); | |
23cfbe07 | 6949 | if (ret) |
60442dea SN |
6950 | dev_warn(&pf->pdev->dev, |
6951 | "shutdown_lan_hmc failed: %d\n", ret); | |
f650a38b | 6952 | } |
f650a38b ASJ |
6953 | } |
6954 | ||
44033fac JB |
6955 | /** |
6956 | * i40e_send_version - update firmware with driver version | |
6957 | * @pf: PF struct | |
6958 | */ | |
6959 | static void i40e_send_version(struct i40e_pf *pf) | |
6960 | { | |
6961 | struct i40e_driver_version dv; | |
6962 | ||
6963 | dv.major_version = DRV_VERSION_MAJOR; | |
6964 | dv.minor_version = DRV_VERSION_MINOR; | |
6965 | dv.build_version = DRV_VERSION_BUILD; | |
6966 | dv.subbuild_version = 0; | |
35a7d804 | 6967 | strlcpy(dv.driver_string, DRV_VERSION, sizeof(dv.driver_string)); |
44033fac JB |
6968 | i40e_aq_send_driver_version(&pf->hw, &dv, NULL); |
6969 | } | |
6970 | ||
f650a38b | 6971 | /** |
373149fc | 6972 | * i40e_reset - wait for core reset to finish reset, reset pf if corer not seen |
f650a38b ASJ |
6973 | * @pf: board private structure |
6974 | **/ | |
373149fc | 6975 | static int i40e_reset(struct i40e_pf *pf) |
f650a38b | 6976 | { |
f650a38b ASJ |
6977 | struct i40e_hw *hw = &pf->hw; |
6978 | i40e_status ret; | |
f650a38b | 6979 | |
41c445ff | 6980 | ret = i40e_pf_reset(hw); |
b5565400 | 6981 | if (ret) { |
41c445ff | 6982 | dev_info(&pf->pdev->dev, "PF reset failed, %d\n", ret); |
a316f651 | 6983 | set_bit(__I40E_RESET_FAILED, &pf->state); |
373149fc MS |
6984 | clear_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state); |
6985 | } else { | |
6986 | pf->pfr_count++; | |
b5565400 | 6987 | } |
373149fc MS |
6988 | return ret; |
6989 | } | |
6990 | ||
6991 | /** | |
6992 | * i40e_rebuild - rebuild using a saved config | |
6993 | * @pf: board private structure | |
6994 | * @reinit: if the Main VSI needs to re-initialized. | |
6995 | * @lock_acquired: indicates whether or not the lock has been acquired | |
6996 | * before this function was called. | |
6997 | **/ | |
6998 | static void i40e_rebuild(struct i40e_pf *pf, bool reinit, bool lock_acquired) | |
6999 | { | |
7000 | struct i40e_hw *hw = &pf->hw; | |
7001 | u8 set_fc_aq_fail = 0; | |
7002 | i40e_status ret; | |
7003 | u32 val; | |
7004 | int v; | |
41c445ff JB |
7005 | |
7006 | if (test_bit(__I40E_DOWN, &pf->state)) | |
a316f651 | 7007 | goto clear_recovery; |
69bfb110 | 7008 | dev_dbg(&pf->pdev->dev, "Rebuilding internal switch\n"); |
41c445ff JB |
7009 | |
7010 | /* rebuild the basics for the AdminQ, HMC, and initial HW switch */ | |
7011 | ret = i40e_init_adminq(&pf->hw); | |
7012 | if (ret) { | |
f1c7e72e SN |
7013 | dev_info(&pf->pdev->dev, "Rebuild AdminQ failed, err %s aq_err %s\n", |
7014 | i40e_stat_str(&pf->hw, ret), | |
7015 | i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status)); | |
a316f651 | 7016 | goto clear_recovery; |
41c445ff JB |
7017 | } |
7018 | ||
4eb3f768 | 7019 | /* re-verify the eeprom if we just had an EMP reset */ |
9df42d1a | 7020 | if (test_and_clear_bit(__I40E_EMP_RESET_INTR_RECEIVED, &pf->state)) |
4eb3f768 | 7021 | i40e_verify_eeprom(pf); |
4eb3f768 | 7022 | |
e78ac4bf | 7023 | i40e_clear_pxe_mode(hw); |
41c445ff | 7024 | ret = i40e_get_capabilities(pf); |
f1c7e72e | 7025 | if (ret) |
41c445ff | 7026 | goto end_core_reset; |
41c445ff | 7027 | |
41c445ff | 7028 | ret = i40e_init_lan_hmc(hw, hw->func_caps.num_tx_qp, |
c76cb6ed | 7029 | hw->func_caps.num_rx_qp, 0, 0); |
41c445ff JB |
7030 | if (ret) { |
7031 | dev_info(&pf->pdev->dev, "init_lan_hmc failed: %d\n", ret); | |
7032 | goto end_core_reset; | |
7033 | } | |
7034 | ret = i40e_configure_lan_hmc(hw, I40E_HMC_MODEL_DIRECT_ONLY); | |
7035 | if (ret) { | |
7036 | dev_info(&pf->pdev->dev, "configure_lan_hmc failed: %d\n", ret); | |
7037 | goto end_core_reset; | |
7038 | } | |
7039 | ||
4e3b35b0 NP |
7040 | #ifdef CONFIG_I40E_DCB |
7041 | ret = i40e_init_pf_dcb(pf); | |
7042 | if (ret) { | |
aebfc816 SN |
7043 | dev_info(&pf->pdev->dev, "DCB init failed %d, disabled\n", ret); |
7044 | pf->flags &= ~I40E_FLAG_DCB_CAPABLE; | |
7045 | /* Continue without DCB enabled */ | |
4e3b35b0 NP |
7046 | } |
7047 | #endif /* CONFIG_I40E_DCB */ | |
41c445ff | 7048 | /* do basic switch setup */ |
373149fc MS |
7049 | if (!lock_acquired) |
7050 | rtnl_lock(); | |
bc7d338f | 7051 | ret = i40e_setup_pf_switch(pf, reinit); |
41c445ff | 7052 | if (ret) |
373149fc | 7053 | goto end_unlock; |
41c445ff | 7054 | |
2f0aff41 SN |
7055 | /* The driver only wants link up/down and module qualification |
7056 | * reports from firmware. Note the negative logic. | |
7e2453fe JB |
7057 | */ |
7058 | ret = i40e_aq_set_phy_int_mask(&pf->hw, | |
2f0aff41 | 7059 | ~(I40E_AQ_EVENT_LINK_UPDOWN | |
867a79e3 | 7060 | I40E_AQ_EVENT_MEDIA_NA | |
2f0aff41 | 7061 | I40E_AQ_EVENT_MODULE_QUAL_FAIL), NULL); |
7e2453fe | 7062 | if (ret) |
f1c7e72e SN |
7063 | dev_info(&pf->pdev->dev, "set phy mask fail, err %s aq_err %s\n", |
7064 | i40e_stat_str(&pf->hw, ret), | |
7065 | i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status)); | |
7e2453fe | 7066 | |
cafa2ee6 ASJ |
7067 | /* make sure our flow control settings are restored */ |
7068 | ret = i40e_set_fc(&pf->hw, &set_fc_aq_fail, true); | |
7069 | if (ret) | |
8279e495 NP |
7070 | dev_dbg(&pf->pdev->dev, "setting flow control: ret = %s last_status = %s\n", |
7071 | i40e_stat_str(&pf->hw, ret), | |
7072 | i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status)); | |
cafa2ee6 | 7073 | |
41c445ff JB |
7074 | /* Rebuild the VSIs and VEBs that existed before reset. |
7075 | * They are still in our local switch element arrays, so only | |
7076 | * need to rebuild the switch model in the HW. | |
7077 | * | |
7078 | * If there were VEBs but the reconstitution failed, we'll try | |
7079 | * try to recover minimal use by getting the basic PF VSI working. | |
7080 | */ | |
7081 | if (pf->vsi[pf->lan_vsi]->uplink_seid != pf->mac_seid) { | |
69bfb110 | 7082 | dev_dbg(&pf->pdev->dev, "attempting to rebuild switch\n"); |
41c445ff JB |
7083 | /* find the one VEB connected to the MAC, and find orphans */ |
7084 | for (v = 0; v < I40E_MAX_VEB; v++) { | |
7085 | if (!pf->veb[v]) | |
7086 | continue; | |
7087 | ||
7088 | if (pf->veb[v]->uplink_seid == pf->mac_seid || | |
7089 | pf->veb[v]->uplink_seid == 0) { | |
7090 | ret = i40e_reconstitute_veb(pf->veb[v]); | |
7091 | ||
7092 | if (!ret) | |
7093 | continue; | |
7094 | ||
7095 | /* If Main VEB failed, we're in deep doodoo, | |
7096 | * so give up rebuilding the switch and set up | |
7097 | * for minimal rebuild of PF VSI. | |
7098 | * If orphan failed, we'll report the error | |
7099 | * but try to keep going. | |
7100 | */ | |
7101 | if (pf->veb[v]->uplink_seid == pf->mac_seid) { | |
7102 | dev_info(&pf->pdev->dev, | |
7103 | "rebuild of switch failed: %d, will try to set up simple PF connection\n", | |
7104 | ret); | |
7105 | pf->vsi[pf->lan_vsi]->uplink_seid | |
7106 | = pf->mac_seid; | |
7107 | break; | |
7108 | } else if (pf->veb[v]->uplink_seid == 0) { | |
7109 | dev_info(&pf->pdev->dev, | |
7110 | "rebuild of orphan VEB failed: %d\n", | |
7111 | ret); | |
7112 | } | |
7113 | } | |
7114 | } | |
7115 | } | |
7116 | ||
7117 | if (pf->vsi[pf->lan_vsi]->uplink_seid == pf->mac_seid) { | |
cde4cbc7 | 7118 | dev_dbg(&pf->pdev->dev, "attempting to rebuild PF VSI\n"); |
41c445ff JB |
7119 | /* no VEB, so rebuild only the Main VSI */ |
7120 | ret = i40e_add_vsi(pf->vsi[pf->lan_vsi]); | |
7121 | if (ret) { | |
7122 | dev_info(&pf->pdev->dev, | |
7123 | "rebuild of Main VSI failed: %d\n", ret); | |
373149fc | 7124 | goto end_unlock; |
41c445ff JB |
7125 | } |
7126 | } | |
7127 | ||
4f2f017c ASJ |
7128 | /* Reconfigure hardware for allowing smaller MSS in the case |
7129 | * of TSO, so that we avoid the MDD being fired and causing | |
7130 | * a reset in the case of small MSS+TSO. | |
7131 | */ | |
7132 | #define I40E_REG_MSS 0x000E64DC | |
7133 | #define I40E_REG_MSS_MIN_MASK 0x3FF0000 | |
7134 | #define I40E_64BYTE_MSS 0x400000 | |
7135 | val = rd32(hw, I40E_REG_MSS); | |
7136 | if ((val & I40E_REG_MSS_MIN_MASK) > I40E_64BYTE_MSS) { | |
7137 | val &= ~I40E_REG_MSS_MIN_MASK; | |
7138 | val |= I40E_64BYTE_MSS; | |
7139 | wr32(hw, I40E_REG_MSS, val); | |
7140 | } | |
7141 | ||
8eed76fa | 7142 | if (pf->flags & I40E_FLAG_RESTART_AUTONEG) { |
025b4a54 ASJ |
7143 | msleep(75); |
7144 | ret = i40e_aq_set_link_restart_an(&pf->hw, true, NULL); | |
7145 | if (ret) | |
f1c7e72e SN |
7146 | dev_info(&pf->pdev->dev, "link restart failed, err %s aq_err %s\n", |
7147 | i40e_stat_str(&pf->hw, ret), | |
7148 | i40e_aq_str(&pf->hw, | |
7149 | pf->hw.aq.asq_last_status)); | |
cafa2ee6 | 7150 | } |
41c445ff JB |
7151 | /* reinit the misc interrupt */ |
7152 | if (pf->flags & I40E_FLAG_MSIX_ENABLED) | |
7153 | ret = i40e_setup_misc_vector(pf); | |
7154 | ||
e7358f54 ASJ |
7155 | /* Add a filter to drop all Flow control frames from any VSI from being |
7156 | * transmitted. By doing so we stop a malicious VF from sending out | |
7157 | * PAUSE or PFC frames and potentially controlling traffic for other | |
7158 | * PF/VF VSIs. | |
7159 | * The FW can still send Flow control frames if enabled. | |
7160 | */ | |
7161 | i40e_add_filter_to_drop_tx_flow_control_frames(&pf->hw, | |
7162 | pf->main_vsi_seid); | |
7163 | ||
41c445ff JB |
7164 | /* restart the VSIs that were rebuilt and running before the reset */ |
7165 | i40e_pf_unquiesce_all_vsi(pf); | |
7166 | ||
024b05f4 JK |
7167 | /* Release the RTNL lock before we start resetting VFs */ |
7168 | if (!lock_acquired) | |
7169 | rtnl_unlock(); | |
7170 | ||
e4b433f4 | 7171 | i40e_reset_all_vfs(pf, true); |
69f64b2b | 7172 | |
41c445ff | 7173 | /* tell the firmware that we're starting */ |
44033fac | 7174 | i40e_send_version(pf); |
41c445ff | 7175 | |
024b05f4 JK |
7176 | /* We've already released the lock, so don't do it again */ |
7177 | goto end_core_reset; | |
7178 | ||
373149fc | 7179 | end_unlock: |
024b05f4 JK |
7180 | if (!lock_acquired) |
7181 | rtnl_unlock(); | |
41c445ff | 7182 | end_core_reset: |
a316f651 ASJ |
7183 | clear_bit(__I40E_RESET_FAILED, &pf->state); |
7184 | clear_recovery: | |
41c445ff JB |
7185 | clear_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state); |
7186 | } | |
7187 | ||
373149fc MS |
7188 | /** |
7189 | * i40e_reset_and_rebuild - reset and rebuild using a saved config | |
7190 | * @pf: board private structure | |
7191 | * @reinit: if the Main VSI needs to re-initialized. | |
7192 | * @lock_acquired: indicates whether or not the lock has been acquired | |
7193 | * before this function was called. | |
7194 | **/ | |
7195 | static void i40e_reset_and_rebuild(struct i40e_pf *pf, bool reinit, | |
7196 | bool lock_acquired) | |
7197 | { | |
7198 | int ret; | |
7199 | /* Now we wait for GRST to settle out. | |
7200 | * We don't have to delete the VEBs or VSIs from the hw switch | |
7201 | * because the reset will make them disappear. | |
7202 | */ | |
7203 | ret = i40e_reset(pf); | |
7204 | if (!ret) | |
7205 | i40e_rebuild(pf, reinit, lock_acquired); | |
7206 | } | |
7207 | ||
f650a38b | 7208 | /** |
b40c82e6 | 7209 | * i40e_handle_reset_warning - prep for the PF to reset, reset and rebuild |
f650a38b ASJ |
7210 | * @pf: board private structure |
7211 | * | |
7212 | * Close up the VFs and other things in prep for a Core Reset, | |
7213 | * then get ready to rebuild the world. | |
373149fc MS |
7214 | * @lock_acquired: indicates whether or not the lock has been acquired |
7215 | * before this function was called. | |
f650a38b | 7216 | **/ |
373149fc | 7217 | static void i40e_handle_reset_warning(struct i40e_pf *pf, bool lock_acquired) |
f650a38b | 7218 | { |
373149fc MS |
7219 | i40e_prep_for_reset(pf, lock_acquired); |
7220 | i40e_reset_and_rebuild(pf, false, lock_acquired); | |
f650a38b ASJ |
7221 | } |
7222 | ||
41c445ff JB |
7223 | /** |
7224 | * i40e_handle_mdd_event | |
b40c82e6 | 7225 | * @pf: pointer to the PF structure |
41c445ff JB |
7226 | * |
7227 | * Called from the MDD irq handler to identify possibly malicious vfs | |
7228 | **/ | |
7229 | static void i40e_handle_mdd_event(struct i40e_pf *pf) | |
7230 | { | |
7231 | struct i40e_hw *hw = &pf->hw; | |
7232 | bool mdd_detected = false; | |
df430b12 | 7233 | bool pf_mdd_detected = false; |
41c445ff JB |
7234 | struct i40e_vf *vf; |
7235 | u32 reg; | |
7236 | int i; | |
7237 | ||
7238 | if (!test_bit(__I40E_MDD_EVENT_PENDING, &pf->state)) | |
7239 | return; | |
7240 | ||
7241 | /* find what triggered the MDD event */ | |
7242 | reg = rd32(hw, I40E_GL_MDET_TX); | |
7243 | if (reg & I40E_GL_MDET_TX_VALID_MASK) { | |
4c33f83a ASJ |
7244 | u8 pf_num = (reg & I40E_GL_MDET_TX_PF_NUM_MASK) >> |
7245 | I40E_GL_MDET_TX_PF_NUM_SHIFT; | |
2089ad03 | 7246 | u16 vf_num = (reg & I40E_GL_MDET_TX_VF_NUM_MASK) >> |
4c33f83a | 7247 | I40E_GL_MDET_TX_VF_NUM_SHIFT; |
013f6579 | 7248 | u8 event = (reg & I40E_GL_MDET_TX_EVENT_MASK) >> |
4c33f83a | 7249 | I40E_GL_MDET_TX_EVENT_SHIFT; |
2089ad03 MW |
7250 | u16 queue = ((reg & I40E_GL_MDET_TX_QUEUE_MASK) >> |
7251 | I40E_GL_MDET_TX_QUEUE_SHIFT) - | |
7252 | pf->hw.func_caps.base_queue; | |
faf32978 | 7253 | if (netif_msg_tx_err(pf)) |
b40c82e6 | 7254 | dev_info(&pf->pdev->dev, "Malicious Driver Detection event 0x%02x on TX queue %d PF number 0x%02x VF number 0x%02x\n", |
faf32978 | 7255 | event, queue, pf_num, vf_num); |
41c445ff JB |
7256 | wr32(hw, I40E_GL_MDET_TX, 0xffffffff); |
7257 | mdd_detected = true; | |
7258 | } | |
7259 | reg = rd32(hw, I40E_GL_MDET_RX); | |
7260 | if (reg & I40E_GL_MDET_RX_VALID_MASK) { | |
4c33f83a ASJ |
7261 | u8 func = (reg & I40E_GL_MDET_RX_FUNCTION_MASK) >> |
7262 | I40E_GL_MDET_RX_FUNCTION_SHIFT; | |
013f6579 | 7263 | u8 event = (reg & I40E_GL_MDET_RX_EVENT_MASK) >> |
4c33f83a | 7264 | I40E_GL_MDET_RX_EVENT_SHIFT; |
2089ad03 MW |
7265 | u16 queue = ((reg & I40E_GL_MDET_RX_QUEUE_MASK) >> |
7266 | I40E_GL_MDET_RX_QUEUE_SHIFT) - | |
7267 | pf->hw.func_caps.base_queue; | |
faf32978 JB |
7268 | if (netif_msg_rx_err(pf)) |
7269 | dev_info(&pf->pdev->dev, "Malicious Driver Detection event 0x%02x on RX queue %d of function 0x%02x\n", | |
7270 | event, queue, func); | |
41c445ff JB |
7271 | wr32(hw, I40E_GL_MDET_RX, 0xffffffff); |
7272 | mdd_detected = true; | |
7273 | } | |
7274 | ||
df430b12 NP |
7275 | if (mdd_detected) { |
7276 | reg = rd32(hw, I40E_PF_MDET_TX); | |
7277 | if (reg & I40E_PF_MDET_TX_VALID_MASK) { | |
7278 | wr32(hw, I40E_PF_MDET_TX, 0xFFFF); | |
faf32978 | 7279 | dev_info(&pf->pdev->dev, "TX driver issue detected, PF reset issued\n"); |
df430b12 NP |
7280 | pf_mdd_detected = true; |
7281 | } | |
7282 | reg = rd32(hw, I40E_PF_MDET_RX); | |
7283 | if (reg & I40E_PF_MDET_RX_VALID_MASK) { | |
7284 | wr32(hw, I40E_PF_MDET_RX, 0xFFFF); | |
faf32978 | 7285 | dev_info(&pf->pdev->dev, "RX driver issue detected, PF reset issued\n"); |
df430b12 NP |
7286 | pf_mdd_detected = true; |
7287 | } | |
7288 | /* Queue belongs to the PF, initiate a reset */ | |
7289 | if (pf_mdd_detected) { | |
7290 | set_bit(__I40E_PF_RESET_REQUESTED, &pf->state); | |
7291 | i40e_service_event_schedule(pf); | |
7292 | } | |
7293 | } | |
7294 | ||
41c445ff JB |
7295 | /* see if one of the VFs needs its hand slapped */ |
7296 | for (i = 0; i < pf->num_alloc_vfs && mdd_detected; i++) { | |
7297 | vf = &(pf->vf[i]); | |
7298 | reg = rd32(hw, I40E_VP_MDET_TX(i)); | |
7299 | if (reg & I40E_VP_MDET_TX_VALID_MASK) { | |
7300 | wr32(hw, I40E_VP_MDET_TX(i), 0xFFFF); | |
7301 | vf->num_mdd_events++; | |
faf32978 JB |
7302 | dev_info(&pf->pdev->dev, "TX driver issue detected on VF %d\n", |
7303 | i); | |
41c445ff JB |
7304 | } |
7305 | ||
7306 | reg = rd32(hw, I40E_VP_MDET_RX(i)); | |
7307 | if (reg & I40E_VP_MDET_RX_VALID_MASK) { | |
7308 | wr32(hw, I40E_VP_MDET_RX(i), 0xFFFF); | |
7309 | vf->num_mdd_events++; | |
faf32978 JB |
7310 | dev_info(&pf->pdev->dev, "RX driver issue detected on VF %d\n", |
7311 | i); | |
41c445ff JB |
7312 | } |
7313 | ||
7314 | if (vf->num_mdd_events > I40E_DEFAULT_NUM_MDD_EVENTS_ALLOWED) { | |
7315 | dev_info(&pf->pdev->dev, | |
7316 | "Too many MDD events on VF %d, disabled\n", i); | |
7317 | dev_info(&pf->pdev->dev, | |
7318 | "Use PF Control I/F to re-enable the VF\n"); | |
6322e63c | 7319 | set_bit(I40E_VF_STATE_DISABLED, &vf->vf_states); |
41c445ff JB |
7320 | } |
7321 | } | |
7322 | ||
7323 | /* re-enable mdd interrupt cause */ | |
7324 | clear_bit(__I40E_MDD_EVENT_PENDING, &pf->state); | |
7325 | reg = rd32(hw, I40E_PFINT_ICR0_ENA); | |
7326 | reg |= I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK; | |
7327 | wr32(hw, I40E_PFINT_ICR0_ENA, reg); | |
7328 | i40e_flush(hw); | |
7329 | } | |
7330 | ||
1f190d93 AD |
7331 | /** |
7332 | * i40e_sync_udp_filters - Trigger a sync event for existing UDP filters | |
7333 | * @pf: board private structure | |
7334 | **/ | |
7335 | static void i40e_sync_udp_filters(struct i40e_pf *pf) | |
7336 | { | |
7337 | int i; | |
7338 | ||
7339 | /* loop through and set pending bit for all active UDP filters */ | |
7340 | for (i = 0; i < I40E_MAX_PF_UDP_OFFLOAD_PORTS; i++) { | |
7341 | if (pf->udp_ports[i].port) | |
7342 | pf->pending_udp_bitmap |= BIT_ULL(i); | |
7343 | } | |
7344 | ||
7345 | pf->flags |= I40E_FLAG_UDP_FILTER_SYNC; | |
7346 | } | |
7347 | ||
a1c9a9d9 | 7348 | /** |
6a899024 | 7349 | * i40e_sync_udp_filters_subtask - Sync the VSI filter list with HW |
a1c9a9d9 JK |
7350 | * @pf: board private structure |
7351 | **/ | |
6a899024 | 7352 | static void i40e_sync_udp_filters_subtask(struct i40e_pf *pf) |
a1c9a9d9 | 7353 | { |
a1c9a9d9 JK |
7354 | struct i40e_hw *hw = &pf->hw; |
7355 | i40e_status ret; | |
fe0b0cd9 | 7356 | u16 port; |
a1c9a9d9 JK |
7357 | int i; |
7358 | ||
6a899024 | 7359 | if (!(pf->flags & I40E_FLAG_UDP_FILTER_SYNC)) |
a1c9a9d9 JK |
7360 | return; |
7361 | ||
6a899024 | 7362 | pf->flags &= ~I40E_FLAG_UDP_FILTER_SYNC; |
a1c9a9d9 JK |
7363 | |
7364 | for (i = 0; i < I40E_MAX_PF_UDP_OFFLOAD_PORTS; i++) { | |
6a899024 SA |
7365 | if (pf->pending_udp_bitmap & BIT_ULL(i)) { |
7366 | pf->pending_udp_bitmap &= ~BIT_ULL(i); | |
27826fd5 | 7367 | port = pf->udp_ports[i].port; |
c22c06c8 | 7368 | if (port) |
b3f5c7bc CW |
7369 | ret = i40e_aq_add_udp_tunnel(hw, port, |
7370 | pf->udp_ports[i].type, | |
7371 | NULL, NULL); | |
c22c06c8 SN |
7372 | else |
7373 | ret = i40e_aq_del_udp_tunnel(hw, i, NULL); | |
a1c9a9d9 JK |
7374 | |
7375 | if (ret) { | |
730a8f87 CW |
7376 | dev_dbg(&pf->pdev->dev, |
7377 | "%s %s port %d, index %d failed, err %s aq_err %s\n", | |
7378 | pf->udp_ports[i].type ? "vxlan" : "geneve", | |
7379 | port ? "add" : "delete", | |
fe0b0cd9 | 7380 | port, i, |
730a8f87 CW |
7381 | i40e_stat_str(&pf->hw, ret), |
7382 | i40e_aq_str(&pf->hw, | |
f1c7e72e | 7383 | pf->hw.aq.asq_last_status)); |
27826fd5 | 7384 | pf->udp_ports[i].port = 0; |
a1c9a9d9 JK |
7385 | } |
7386 | } | |
7387 | } | |
7388 | } | |
7389 | ||
41c445ff JB |
7390 | /** |
7391 | * i40e_service_task - Run the driver's async subtasks | |
7392 | * @work: pointer to work_struct containing our data | |
7393 | **/ | |
7394 | static void i40e_service_task(struct work_struct *work) | |
7395 | { | |
7396 | struct i40e_pf *pf = container_of(work, | |
7397 | struct i40e_pf, | |
7398 | service_task); | |
7399 | unsigned long start_time = jiffies; | |
7400 | ||
e57a2fea SN |
7401 | /* don't bother with service tasks if a reset is in progress */ |
7402 | if (test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state)) { | |
e57a2fea SN |
7403 | return; |
7404 | } | |
7405 | ||
91089033 MW |
7406 | if (test_and_set_bit(__I40E_SERVICE_SCHED, &pf->state)) |
7407 | return; | |
7408 | ||
b03a8c1f | 7409 | i40e_detect_recover_hung(pf); |
2818ccd9 | 7410 | i40e_sync_filters_subtask(pf); |
41c445ff JB |
7411 | i40e_reset_subtask(pf); |
7412 | i40e_handle_mdd_event(pf); | |
7413 | i40e_vc_process_vflr_event(pf); | |
7414 | i40e_watchdog_subtask(pf); | |
7415 | i40e_fdir_reinit_subtask(pf); | |
0ef2d5af MW |
7416 | if (pf->flags & I40E_FLAG_CLIENT_RESET) { |
7417 | /* Client subtask will reopen next time through. */ | |
7418 | i40e_notify_client_of_netdev_close(pf->vsi[pf->lan_vsi], true); | |
7419 | pf->flags &= ~I40E_FLAG_CLIENT_RESET; | |
7420 | } else { | |
7421 | i40e_client_subtask(pf); | |
7422 | if (pf->flags & I40E_FLAG_CLIENT_L2_CHANGE) { | |
7423 | i40e_notify_client_of_l2_param_changes( | |
7424 | pf->vsi[pf->lan_vsi]); | |
7425 | pf->flags &= ~I40E_FLAG_CLIENT_L2_CHANGE; | |
7426 | } | |
7427 | } | |
41c445ff | 7428 | i40e_sync_filters_subtask(pf); |
6a899024 | 7429 | i40e_sync_udp_filters_subtask(pf); |
41c445ff JB |
7430 | i40e_clean_adminq_subtask(pf); |
7431 | ||
91089033 MW |
7432 | /* flush memory to make sure state is correct before next watchdog */ |
7433 | smp_mb__before_atomic(); | |
7434 | clear_bit(__I40E_SERVICE_SCHED, &pf->state); | |
41c445ff JB |
7435 | |
7436 | /* If the tasks have taken longer than one timer cycle or there | |
7437 | * is more work to be done, reschedule the service task now | |
7438 | * rather than wait for the timer to tick again. | |
7439 | */ | |
7440 | if (time_after(jiffies, (start_time + pf->service_timer_period)) || | |
7441 | test_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state) || | |
7442 | test_bit(__I40E_MDD_EVENT_PENDING, &pf->state) || | |
7443 | test_bit(__I40E_VFLR_EVENT_PENDING, &pf->state)) | |
7444 | i40e_service_event_schedule(pf); | |
7445 | } | |
7446 | ||
7447 | /** | |
7448 | * i40e_service_timer - timer callback | |
7449 | * @data: pointer to PF struct | |
7450 | **/ | |
7451 | static void i40e_service_timer(unsigned long data) | |
7452 | { | |
7453 | struct i40e_pf *pf = (struct i40e_pf *)data; | |
7454 | ||
7455 | mod_timer(&pf->service_timer, | |
7456 | round_jiffies(jiffies + pf->service_timer_period)); | |
7457 | i40e_service_event_schedule(pf); | |
7458 | } | |
7459 | ||
7460 | /** | |
7461 | * i40e_set_num_rings_in_vsi - Determine number of rings in the VSI | |
7462 | * @vsi: the VSI being configured | |
7463 | **/ | |
7464 | static int i40e_set_num_rings_in_vsi(struct i40e_vsi *vsi) | |
7465 | { | |
7466 | struct i40e_pf *pf = vsi->back; | |
7467 | ||
7468 | switch (vsi->type) { | |
7469 | case I40E_VSI_MAIN: | |
7470 | vsi->alloc_queue_pairs = pf->num_lan_qps; | |
7471 | vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS, | |
7472 | I40E_REQ_DESCRIPTOR_MULTIPLE); | |
7473 | if (pf->flags & I40E_FLAG_MSIX_ENABLED) | |
7474 | vsi->num_q_vectors = pf->num_lan_msix; | |
7475 | else | |
7476 | vsi->num_q_vectors = 1; | |
7477 | ||
7478 | break; | |
7479 | ||
7480 | case I40E_VSI_FDIR: | |
7481 | vsi->alloc_queue_pairs = 1; | |
7482 | vsi->num_desc = ALIGN(I40E_FDIR_RING_COUNT, | |
7483 | I40E_REQ_DESCRIPTOR_MULTIPLE); | |
a70e407f | 7484 | vsi->num_q_vectors = pf->num_fdsb_msix; |
41c445ff JB |
7485 | break; |
7486 | ||
7487 | case I40E_VSI_VMDQ2: | |
7488 | vsi->alloc_queue_pairs = pf->num_vmdq_qps; | |
7489 | vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS, | |
7490 | I40E_REQ_DESCRIPTOR_MULTIPLE); | |
7491 | vsi->num_q_vectors = pf->num_vmdq_msix; | |
7492 | break; | |
7493 | ||
7494 | case I40E_VSI_SRIOV: | |
7495 | vsi->alloc_queue_pairs = pf->num_vf_qps; | |
7496 | vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS, | |
7497 | I40E_REQ_DESCRIPTOR_MULTIPLE); | |
7498 | break; | |
7499 | ||
7500 | default: | |
7501 | WARN_ON(1); | |
7502 | return -ENODATA; | |
7503 | } | |
7504 | ||
7505 | return 0; | |
7506 | } | |
7507 | ||
f650a38b ASJ |
7508 | /** |
7509 | * i40e_vsi_alloc_arrays - Allocate queue and vector pointer arrays for the vsi | |
7510 | * @type: VSI pointer | |
bc7d338f | 7511 | * @alloc_qvectors: a bool to specify if q_vectors need to be allocated. |
f650a38b ASJ |
7512 | * |
7513 | * On error: returns error code (negative) | |
7514 | * On success: returns 0 | |
7515 | **/ | |
bc7d338f | 7516 | static int i40e_vsi_alloc_arrays(struct i40e_vsi *vsi, bool alloc_qvectors) |
f650a38b ASJ |
7517 | { |
7518 | int size; | |
7519 | int ret = 0; | |
7520 | ||
ac6c5e3d | 7521 | /* allocate memory for both Tx and Rx ring pointers */ |
f650a38b ASJ |
7522 | size = sizeof(struct i40e_ring *) * vsi->alloc_queue_pairs * 2; |
7523 | vsi->tx_rings = kzalloc(size, GFP_KERNEL); | |
7524 | if (!vsi->tx_rings) | |
7525 | return -ENOMEM; | |
f650a38b ASJ |
7526 | vsi->rx_rings = &vsi->tx_rings[vsi->alloc_queue_pairs]; |
7527 | ||
bc7d338f ASJ |
7528 | if (alloc_qvectors) { |
7529 | /* allocate memory for q_vector pointers */ | |
f57e4fbd | 7530 | size = sizeof(struct i40e_q_vector *) * vsi->num_q_vectors; |
bc7d338f ASJ |
7531 | vsi->q_vectors = kzalloc(size, GFP_KERNEL); |
7532 | if (!vsi->q_vectors) { | |
7533 | ret = -ENOMEM; | |
7534 | goto err_vectors; | |
7535 | } | |
f650a38b ASJ |
7536 | } |
7537 | return ret; | |
7538 | ||
7539 | err_vectors: | |
7540 | kfree(vsi->tx_rings); | |
7541 | return ret; | |
7542 | } | |
7543 | ||
41c445ff JB |
7544 | /** |
7545 | * i40e_vsi_mem_alloc - Allocates the next available struct vsi in the PF | |
7546 | * @pf: board private structure | |
7547 | * @type: type of VSI | |
7548 | * | |
7549 | * On error: returns error code (negative) | |
7550 | * On success: returns vsi index in PF (positive) | |
7551 | **/ | |
7552 | static int i40e_vsi_mem_alloc(struct i40e_pf *pf, enum i40e_vsi_type type) | |
7553 | { | |
7554 | int ret = -ENODEV; | |
7555 | struct i40e_vsi *vsi; | |
7556 | int vsi_idx; | |
7557 | int i; | |
7558 | ||
7559 | /* Need to protect the allocation of the VSIs at the PF level */ | |
7560 | mutex_lock(&pf->switch_mutex); | |
7561 | ||
7562 | /* VSI list may be fragmented if VSI creation/destruction has | |
7563 | * been happening. We can afford to do a quick scan to look | |
7564 | * for any free VSIs in the list. | |
7565 | * | |
7566 | * find next empty vsi slot, looping back around if necessary | |
7567 | */ | |
7568 | i = pf->next_vsi; | |
505682cd | 7569 | while (i < pf->num_alloc_vsi && pf->vsi[i]) |
41c445ff | 7570 | i++; |
505682cd | 7571 | if (i >= pf->num_alloc_vsi) { |
41c445ff JB |
7572 | i = 0; |
7573 | while (i < pf->next_vsi && pf->vsi[i]) | |
7574 | i++; | |
7575 | } | |
7576 | ||
505682cd | 7577 | if (i < pf->num_alloc_vsi && !pf->vsi[i]) { |
41c445ff JB |
7578 | vsi_idx = i; /* Found one! */ |
7579 | } else { | |
7580 | ret = -ENODEV; | |
493fb300 | 7581 | goto unlock_pf; /* out of VSI slots! */ |
41c445ff JB |
7582 | } |
7583 | pf->next_vsi = ++i; | |
7584 | ||
7585 | vsi = kzalloc(sizeof(*vsi), GFP_KERNEL); | |
7586 | if (!vsi) { | |
7587 | ret = -ENOMEM; | |
493fb300 | 7588 | goto unlock_pf; |
41c445ff JB |
7589 | } |
7590 | vsi->type = type; | |
7591 | vsi->back = pf; | |
d19cb64b | 7592 | set_bit(__I40E_VSI_DOWN, &vsi->state); |
41c445ff JB |
7593 | vsi->flags = 0; |
7594 | vsi->idx = vsi_idx; | |
ac26fc13 | 7595 | vsi->int_rate_limit = 0; |
5db4cb59 ASJ |
7596 | vsi->rss_table_size = (vsi->type == I40E_VSI_MAIN) ? |
7597 | pf->rss_table_size : 64; | |
41c445ff JB |
7598 | vsi->netdev_registered = false; |
7599 | vsi->work_limit = I40E_DEFAULT_IRQ_WORK; | |
278e7d0b | 7600 | hash_init(vsi->mac_filter_hash); |
63741846 | 7601 | vsi->irqs_ready = false; |
41c445ff | 7602 | |
9f65e15b AD |
7603 | ret = i40e_set_num_rings_in_vsi(vsi); |
7604 | if (ret) | |
7605 | goto err_rings; | |
7606 | ||
bc7d338f | 7607 | ret = i40e_vsi_alloc_arrays(vsi, true); |
f650a38b | 7608 | if (ret) |
9f65e15b | 7609 | goto err_rings; |
493fb300 | 7610 | |
41c445ff JB |
7611 | /* Setup default MSIX irq handler for VSI */ |
7612 | i40e_vsi_setup_irqhandler(vsi, i40e_msix_clean_rings); | |
7613 | ||
21659035 | 7614 | /* Initialize VSI lock */ |
278e7d0b | 7615 | spin_lock_init(&vsi->mac_filter_hash_lock); |
41c445ff JB |
7616 | pf->vsi[vsi_idx] = vsi; |
7617 | ret = vsi_idx; | |
493fb300 AD |
7618 | goto unlock_pf; |
7619 | ||
9f65e15b | 7620 | err_rings: |
493fb300 AD |
7621 | pf->next_vsi = i - 1; |
7622 | kfree(vsi); | |
7623 | unlock_pf: | |
41c445ff JB |
7624 | mutex_unlock(&pf->switch_mutex); |
7625 | return ret; | |
7626 | } | |
7627 | ||
f650a38b ASJ |
7628 | /** |
7629 | * i40e_vsi_free_arrays - Free queue and vector pointer arrays for the VSI | |
7630 | * @type: VSI pointer | |
bc7d338f | 7631 | * @free_qvectors: a bool to specify if q_vectors need to be freed. |
f650a38b ASJ |
7632 | * |
7633 | * On error: returns error code (negative) | |
7634 | * On success: returns 0 | |
7635 | **/ | |
bc7d338f | 7636 | static void i40e_vsi_free_arrays(struct i40e_vsi *vsi, bool free_qvectors) |
f650a38b ASJ |
7637 | { |
7638 | /* free the ring and vector containers */ | |
bc7d338f ASJ |
7639 | if (free_qvectors) { |
7640 | kfree(vsi->q_vectors); | |
7641 | vsi->q_vectors = NULL; | |
7642 | } | |
f650a38b ASJ |
7643 | kfree(vsi->tx_rings); |
7644 | vsi->tx_rings = NULL; | |
7645 | vsi->rx_rings = NULL; | |
7646 | } | |
7647 | ||
28c5869f HZ |
7648 | /** |
7649 | * i40e_clear_rss_config_user - clear the user configured RSS hash keys | |
7650 | * and lookup table | |
7651 | * @vsi: Pointer to VSI structure | |
7652 | */ | |
7653 | static void i40e_clear_rss_config_user(struct i40e_vsi *vsi) | |
7654 | { | |
7655 | if (!vsi) | |
7656 | return; | |
7657 | ||
7658 | kfree(vsi->rss_hkey_user); | |
7659 | vsi->rss_hkey_user = NULL; | |
7660 | ||
7661 | kfree(vsi->rss_lut_user); | |
7662 | vsi->rss_lut_user = NULL; | |
7663 | } | |
7664 | ||
41c445ff JB |
7665 | /** |
7666 | * i40e_vsi_clear - Deallocate the VSI provided | |
7667 | * @vsi: the VSI being un-configured | |
7668 | **/ | |
7669 | static int i40e_vsi_clear(struct i40e_vsi *vsi) | |
7670 | { | |
7671 | struct i40e_pf *pf; | |
7672 | ||
7673 | if (!vsi) | |
7674 | return 0; | |
7675 | ||
7676 | if (!vsi->back) | |
7677 | goto free_vsi; | |
7678 | pf = vsi->back; | |
7679 | ||
7680 | mutex_lock(&pf->switch_mutex); | |
7681 | if (!pf->vsi[vsi->idx]) { | |
7682 | dev_err(&pf->pdev->dev, "pf->vsi[%d] is NULL, just free vsi[%d](%p,type %d)\n", | |
7683 | vsi->idx, vsi->idx, vsi, vsi->type); | |
7684 | goto unlock_vsi; | |
7685 | } | |
7686 | ||
7687 | if (pf->vsi[vsi->idx] != vsi) { | |
7688 | dev_err(&pf->pdev->dev, | |
7689 | "pf->vsi[%d](%p, type %d) != vsi[%d](%p,type %d): no free!\n", | |
7690 | pf->vsi[vsi->idx]->idx, | |
7691 | pf->vsi[vsi->idx], | |
7692 | pf->vsi[vsi->idx]->type, | |
7693 | vsi->idx, vsi, vsi->type); | |
7694 | goto unlock_vsi; | |
7695 | } | |
7696 | ||
b40c82e6 | 7697 | /* updates the PF for this cleared vsi */ |
41c445ff JB |
7698 | i40e_put_lump(pf->qp_pile, vsi->base_queue, vsi->idx); |
7699 | i40e_put_lump(pf->irq_pile, vsi->base_vector, vsi->idx); | |
7700 | ||
bc7d338f | 7701 | i40e_vsi_free_arrays(vsi, true); |
28c5869f | 7702 | i40e_clear_rss_config_user(vsi); |
493fb300 | 7703 | |
41c445ff JB |
7704 | pf->vsi[vsi->idx] = NULL; |
7705 | if (vsi->idx < pf->next_vsi) | |
7706 | pf->next_vsi = vsi->idx; | |
7707 | ||
7708 | unlock_vsi: | |
7709 | mutex_unlock(&pf->switch_mutex); | |
7710 | free_vsi: | |
7711 | kfree(vsi); | |
7712 | ||
7713 | return 0; | |
7714 | } | |
7715 | ||
9f65e15b AD |
7716 | /** |
7717 | * i40e_vsi_clear_rings - Deallocates the Rx and Tx rings for the provided VSI | |
7718 | * @vsi: the VSI being cleaned | |
7719 | **/ | |
be1d5eea | 7720 | static void i40e_vsi_clear_rings(struct i40e_vsi *vsi) |
9f65e15b AD |
7721 | { |
7722 | int i; | |
7723 | ||
8e9dca53 | 7724 | if (vsi->tx_rings && vsi->tx_rings[0]) { |
d7397644 | 7725 | for (i = 0; i < vsi->alloc_queue_pairs; i++) { |
00403f04 MW |
7726 | kfree_rcu(vsi->tx_rings[i], rcu); |
7727 | vsi->tx_rings[i] = NULL; | |
7728 | vsi->rx_rings[i] = NULL; | |
7729 | } | |
be1d5eea | 7730 | } |
9f65e15b AD |
7731 | } |
7732 | ||
41c445ff JB |
7733 | /** |
7734 | * i40e_alloc_rings - Allocates the Rx and Tx rings for the provided VSI | |
7735 | * @vsi: the VSI being configured | |
7736 | **/ | |
7737 | static int i40e_alloc_rings(struct i40e_vsi *vsi) | |
7738 | { | |
e7046ee1 | 7739 | struct i40e_ring *tx_ring, *rx_ring; |
41c445ff | 7740 | struct i40e_pf *pf = vsi->back; |
41c445ff JB |
7741 | int i; |
7742 | ||
41c445ff | 7743 | /* Set basic values in the rings to be used later during open() */ |
d7397644 | 7744 | for (i = 0; i < vsi->alloc_queue_pairs; i++) { |
ac6c5e3d | 7745 | /* allocate space for both Tx and Rx in one shot */ |
9f65e15b AD |
7746 | tx_ring = kzalloc(sizeof(struct i40e_ring) * 2, GFP_KERNEL); |
7747 | if (!tx_ring) | |
7748 | goto err_out; | |
41c445ff JB |
7749 | |
7750 | tx_ring->queue_index = i; | |
7751 | tx_ring->reg_idx = vsi->base_queue + i; | |
7752 | tx_ring->ring_active = false; | |
7753 | tx_ring->vsi = vsi; | |
7754 | tx_ring->netdev = vsi->netdev; | |
7755 | tx_ring->dev = &pf->pdev->dev; | |
7756 | tx_ring->count = vsi->num_desc; | |
7757 | tx_ring->size = 0; | |
7758 | tx_ring->dcb_tc = 0; | |
8e0764b4 ASJ |
7759 | if (vsi->back->flags & I40E_FLAG_WB_ON_ITR_CAPABLE) |
7760 | tx_ring->flags = I40E_TXR_FLAGS_WB_ON_ITR; | |
a75e8005 | 7761 | tx_ring->tx_itr_setting = pf->tx_itr_default; |
9f65e15b | 7762 | vsi->tx_rings[i] = tx_ring; |
41c445ff | 7763 | |
9f65e15b | 7764 | rx_ring = &tx_ring[1]; |
41c445ff JB |
7765 | rx_ring->queue_index = i; |
7766 | rx_ring->reg_idx = vsi->base_queue + i; | |
7767 | rx_ring->ring_active = false; | |
7768 | rx_ring->vsi = vsi; | |
7769 | rx_ring->netdev = vsi->netdev; | |
7770 | rx_ring->dev = &pf->pdev->dev; | |
7771 | rx_ring->count = vsi->num_desc; | |
7772 | rx_ring->size = 0; | |
7773 | rx_ring->dcb_tc = 0; | |
a75e8005 | 7774 | rx_ring->rx_itr_setting = pf->rx_itr_default; |
9f65e15b | 7775 | vsi->rx_rings[i] = rx_ring; |
41c445ff JB |
7776 | } |
7777 | ||
7778 | return 0; | |
9f65e15b AD |
7779 | |
7780 | err_out: | |
7781 | i40e_vsi_clear_rings(vsi); | |
7782 | return -ENOMEM; | |
41c445ff JB |
7783 | } |
7784 | ||
7785 | /** | |
7786 | * i40e_reserve_msix_vectors - Reserve MSI-X vectors in the kernel | |
7787 | * @pf: board private structure | |
7788 | * @vectors: the number of MSI-X vectors to request | |
7789 | * | |
7790 | * Returns the number of vectors reserved, or error | |
7791 | **/ | |
7792 | static int i40e_reserve_msix_vectors(struct i40e_pf *pf, int vectors) | |
7793 | { | |
7b37f376 AG |
7794 | vectors = pci_enable_msix_range(pf->pdev, pf->msix_entries, |
7795 | I40E_MIN_MSIX, vectors); | |
7796 | if (vectors < 0) { | |
41c445ff | 7797 | dev_info(&pf->pdev->dev, |
7b37f376 | 7798 | "MSI-X vector reservation failed: %d\n", vectors); |
41c445ff JB |
7799 | vectors = 0; |
7800 | } | |
7801 | ||
7802 | return vectors; | |
7803 | } | |
7804 | ||
7805 | /** | |
7806 | * i40e_init_msix - Setup the MSIX capability | |
7807 | * @pf: board private structure | |
7808 | * | |
7809 | * Work with the OS to set up the MSIX vectors needed. | |
7810 | * | |
3b444399 | 7811 | * Returns the number of vectors reserved or negative on failure |
41c445ff JB |
7812 | **/ |
7813 | static int i40e_init_msix(struct i40e_pf *pf) | |
7814 | { | |
41c445ff | 7815 | struct i40e_hw *hw = &pf->hw; |
c0cf70a6 | 7816 | int cpus, extra_vectors; |
1e200e4a | 7817 | int vectors_left; |
41c445ff | 7818 | int v_budget, i; |
3b444399 | 7819 | int v_actual; |
e3219ce6 | 7820 | int iwarp_requested = 0; |
41c445ff JB |
7821 | |
7822 | if (!(pf->flags & I40E_FLAG_MSIX_ENABLED)) | |
7823 | return -ENODEV; | |
7824 | ||
7825 | /* The number of vectors we'll request will be comprised of: | |
7826 | * - Add 1 for "other" cause for Admin Queue events, etc. | |
7827 | * - The number of LAN queue pairs | |
f8ff1464 ASJ |
7828 | * - Queues being used for RSS. |
7829 | * We don't need as many as max_rss_size vectors. | |
7830 | * use rss_size instead in the calculation since that | |
7831 | * is governed by number of cpus in the system. | |
7832 | * - assumes symmetric Tx/Rx pairing | |
41c445ff | 7833 | * - The number of VMDq pairs |
e3219ce6 | 7834 | * - The CPU count within the NUMA node if iWARP is enabled |
41c445ff JB |
7835 | * Once we count this up, try the request. |
7836 | * | |
7837 | * If we can't get what we want, we'll simplify to nearly nothing | |
7838 | * and try again. If that still fails, we punt. | |
7839 | */ | |
1e200e4a SN |
7840 | vectors_left = hw->func_caps.num_msix_vectors; |
7841 | v_budget = 0; | |
7842 | ||
7843 | /* reserve one vector for miscellaneous handler */ | |
7844 | if (vectors_left) { | |
7845 | v_budget++; | |
7846 | vectors_left--; | |
7847 | } | |
7848 | ||
c0cf70a6 JK |
7849 | /* reserve some vectors for the main PF traffic queues. Initially we |
7850 | * only reserve at most 50% of the available vectors, in the case that | |
7851 | * the number of online CPUs is large. This ensures that we can enable | |
7852 | * extra features as well. Once we've enabled the other features, we | |
7853 | * will use any remaining vectors to reach as close as we can to the | |
7854 | * number of online CPUs. | |
7855 | */ | |
7856 | cpus = num_online_cpus(); | |
7857 | pf->num_lan_msix = min_t(int, cpus, vectors_left / 2); | |
1e200e4a | 7858 | vectors_left -= pf->num_lan_msix; |
1e200e4a SN |
7859 | |
7860 | /* reserve one vector for sideband flow director */ | |
7861 | if (pf->flags & I40E_FLAG_FD_SB_ENABLED) { | |
7862 | if (vectors_left) { | |
a70e407f | 7863 | pf->num_fdsb_msix = 1; |
1e200e4a SN |
7864 | v_budget++; |
7865 | vectors_left--; | |
7866 | } else { | |
a70e407f | 7867 | pf->num_fdsb_msix = 0; |
1e200e4a SN |
7868 | } |
7869 | } | |
83840e4b | 7870 | |
e3219ce6 ASJ |
7871 | /* can we reserve enough for iWARP? */ |
7872 | if (pf->flags & I40E_FLAG_IWARP_ENABLED) { | |
4ce20abc SA |
7873 | iwarp_requested = pf->num_iwarp_msix; |
7874 | ||
e3219ce6 ASJ |
7875 | if (!vectors_left) |
7876 | pf->num_iwarp_msix = 0; | |
7877 | else if (vectors_left < pf->num_iwarp_msix) | |
7878 | pf->num_iwarp_msix = 1; | |
7879 | v_budget += pf->num_iwarp_msix; | |
7880 | vectors_left -= pf->num_iwarp_msix; | |
7881 | } | |
7882 | ||
1e200e4a SN |
7883 | /* any vectors left over go for VMDq support */ |
7884 | if (pf->flags & I40E_FLAG_VMDQ_ENABLED) { | |
7885 | int vmdq_vecs_wanted = pf->num_vmdq_vsis * pf->num_vmdq_qps; | |
7886 | int vmdq_vecs = min_t(int, vectors_left, vmdq_vecs_wanted); | |
7887 | ||
9ca57e97 SA |
7888 | if (!vectors_left) { |
7889 | pf->num_vmdq_msix = 0; | |
7890 | pf->num_vmdq_qps = 0; | |
7891 | } else { | |
7892 | /* if we're short on vectors for what's desired, we limit | |
7893 | * the queues per vmdq. If this is still more than are | |
7894 | * available, the user will need to change the number of | |
7895 | * queues/vectors used by the PF later with the ethtool | |
7896 | * channels command | |
7897 | */ | |
7898 | if (vmdq_vecs < vmdq_vecs_wanted) | |
7899 | pf->num_vmdq_qps = 1; | |
7900 | pf->num_vmdq_msix = pf->num_vmdq_qps; | |
1e200e4a | 7901 | |
9ca57e97 SA |
7902 | v_budget += vmdq_vecs; |
7903 | vectors_left -= vmdq_vecs; | |
7904 | } | |
1e200e4a | 7905 | } |
41c445ff | 7906 | |
c0cf70a6 JK |
7907 | /* On systems with a large number of SMP cores, we previously limited |
7908 | * the number of vectors for num_lan_msix to be at most 50% of the | |
7909 | * available vectors, to allow for other features. Now, we add back | |
7910 | * the remaining vectors. However, we ensure that the total | |
7911 | * num_lan_msix will not exceed num_online_cpus(). To do this, we | |
7912 | * calculate the number of vectors we can add without going over the | |
7913 | * cap of CPUs. For systems with a small number of CPUs this will be | |
7914 | * zero. | |
7915 | */ | |
7916 | extra_vectors = min_t(int, cpus - pf->num_lan_msix, vectors_left); | |
7917 | pf->num_lan_msix += extra_vectors; | |
7918 | vectors_left -= extra_vectors; | |
7919 | ||
7920 | WARN(vectors_left < 0, | |
7921 | "Calculation of remaining vectors underflowed. This is an accounting bug when determining total MSI-X vectors.\n"); | |
7922 | ||
7923 | v_budget += pf->num_lan_msix; | |
41c445ff JB |
7924 | pf->msix_entries = kcalloc(v_budget, sizeof(struct msix_entry), |
7925 | GFP_KERNEL); | |
7926 | if (!pf->msix_entries) | |
7927 | return -ENOMEM; | |
7928 | ||
7929 | for (i = 0; i < v_budget; i++) | |
7930 | pf->msix_entries[i].entry = i; | |
3b444399 | 7931 | v_actual = i40e_reserve_msix_vectors(pf, v_budget); |
a34977ba | 7932 | |
3b444399 | 7933 | if (v_actual < I40E_MIN_MSIX) { |
41c445ff JB |
7934 | pf->flags &= ~I40E_FLAG_MSIX_ENABLED; |
7935 | kfree(pf->msix_entries); | |
7936 | pf->msix_entries = NULL; | |
4c95aa5d | 7937 | pci_disable_msix(pf->pdev); |
41c445ff JB |
7938 | return -ENODEV; |
7939 | ||
3b444399 | 7940 | } else if (v_actual == I40E_MIN_MSIX) { |
41c445ff | 7941 | /* Adjust for minimal MSIX use */ |
41c445ff JB |
7942 | pf->num_vmdq_vsis = 0; |
7943 | pf->num_vmdq_qps = 0; | |
41c445ff JB |
7944 | pf->num_lan_qps = 1; |
7945 | pf->num_lan_msix = 1; | |
7946 | ||
4ce20abc SA |
7947 | } else if (!vectors_left) { |
7948 | /* If we have limited resources, we will start with no vectors | |
7949 | * for the special features and then allocate vectors to some | |
7950 | * of these features based on the policy and at the end disable | |
7951 | * the features that did not get any vectors. | |
7952 | */ | |
3b444399 SN |
7953 | int vec; |
7954 | ||
4ce20abc SA |
7955 | dev_info(&pf->pdev->dev, |
7956 | "MSI-X vector limit reached, attempting to redistribute vectors\n"); | |
a34977ba | 7957 | /* reserve the misc vector */ |
3b444399 | 7958 | vec = v_actual - 1; |
a34977ba | 7959 | |
41c445ff JB |
7960 | /* Scale vector usage down */ |
7961 | pf->num_vmdq_msix = 1; /* force VMDqs to only one vector */ | |
a34977ba | 7962 | pf->num_vmdq_vsis = 1; |
1e200e4a | 7963 | pf->num_vmdq_qps = 1; |
41c445ff JB |
7964 | |
7965 | /* partition out the remaining vectors */ | |
7966 | switch (vec) { | |
7967 | case 2: | |
41c445ff JB |
7968 | pf->num_lan_msix = 1; |
7969 | break; | |
7970 | case 3: | |
e3219ce6 ASJ |
7971 | if (pf->flags & I40E_FLAG_IWARP_ENABLED) { |
7972 | pf->num_lan_msix = 1; | |
7973 | pf->num_iwarp_msix = 1; | |
7974 | } else { | |
7975 | pf->num_lan_msix = 2; | |
7976 | } | |
41c445ff JB |
7977 | break; |
7978 | default: | |
e3219ce6 ASJ |
7979 | if (pf->flags & I40E_FLAG_IWARP_ENABLED) { |
7980 | pf->num_iwarp_msix = min_t(int, (vec / 3), | |
7981 | iwarp_requested); | |
7982 | pf->num_vmdq_vsis = min_t(int, (vec / 3), | |
7983 | I40E_DEFAULT_NUM_VMDQ_VSI); | |
7984 | } else { | |
7985 | pf->num_vmdq_vsis = min_t(int, (vec / 2), | |
7986 | I40E_DEFAULT_NUM_VMDQ_VSI); | |
7987 | } | |
abd97a94 SA |
7988 | if (pf->flags & I40E_FLAG_FD_SB_ENABLED) { |
7989 | pf->num_fdsb_msix = 1; | |
7990 | vec--; | |
7991 | } | |
e3219ce6 ASJ |
7992 | pf->num_lan_msix = min_t(int, |
7993 | (vec - (pf->num_iwarp_msix + pf->num_vmdq_vsis)), | |
7994 | pf->num_lan_msix); | |
4ce20abc | 7995 | pf->num_lan_qps = pf->num_lan_msix; |
41c445ff JB |
7996 | break; |
7997 | } | |
7998 | } | |
7999 | ||
abd97a94 SA |
8000 | if ((pf->flags & I40E_FLAG_FD_SB_ENABLED) && |
8001 | (pf->num_fdsb_msix == 0)) { | |
8002 | dev_info(&pf->pdev->dev, "Sideband Flowdir disabled, not enough MSI-X vectors\n"); | |
8003 | pf->flags &= ~I40E_FLAG_FD_SB_ENABLED; | |
8004 | } | |
a34977ba ASJ |
8005 | if ((pf->flags & I40E_FLAG_VMDQ_ENABLED) && |
8006 | (pf->num_vmdq_msix == 0)) { | |
8007 | dev_info(&pf->pdev->dev, "VMDq disabled, not enough MSI-X vectors\n"); | |
8008 | pf->flags &= ~I40E_FLAG_VMDQ_ENABLED; | |
8009 | } | |
e3219ce6 ASJ |
8010 | |
8011 | if ((pf->flags & I40E_FLAG_IWARP_ENABLED) && | |
8012 | (pf->num_iwarp_msix == 0)) { | |
8013 | dev_info(&pf->pdev->dev, "IWARP disabled, not enough MSI-X vectors\n"); | |
8014 | pf->flags &= ~I40E_FLAG_IWARP_ENABLED; | |
8015 | } | |
4ce20abc SA |
8016 | i40e_debug(&pf->hw, I40E_DEBUG_INIT, |
8017 | "MSI-X vector distribution: PF %d, VMDq %d, FDSB %d, iWARP %d\n", | |
8018 | pf->num_lan_msix, | |
8019 | pf->num_vmdq_msix * pf->num_vmdq_vsis, | |
8020 | pf->num_fdsb_msix, | |
8021 | pf->num_iwarp_msix); | |
8022 | ||
3b444399 | 8023 | return v_actual; |
41c445ff JB |
8024 | } |
8025 | ||
493fb300 | 8026 | /** |
90e04070 | 8027 | * i40e_vsi_alloc_q_vector - Allocate memory for a single interrupt vector |
493fb300 AD |
8028 | * @vsi: the VSI being configured |
8029 | * @v_idx: index of the vector in the vsi struct | |
7f6c5539 | 8030 | * @cpu: cpu to be used on affinity_mask |
493fb300 AD |
8031 | * |
8032 | * We allocate one q_vector. If allocation fails we return -ENOMEM. | |
8033 | **/ | |
7f6c5539 | 8034 | static int i40e_vsi_alloc_q_vector(struct i40e_vsi *vsi, int v_idx, int cpu) |
493fb300 AD |
8035 | { |
8036 | struct i40e_q_vector *q_vector; | |
8037 | ||
8038 | /* allocate q_vector */ | |
8039 | q_vector = kzalloc(sizeof(struct i40e_q_vector), GFP_KERNEL); | |
8040 | if (!q_vector) | |
8041 | return -ENOMEM; | |
8042 | ||
8043 | q_vector->vsi = vsi; | |
8044 | q_vector->v_idx = v_idx; | |
7f6c5539 GP |
8045 | cpumask_set_cpu(cpu, &q_vector->affinity_mask); |
8046 | ||
493fb300 AD |
8047 | if (vsi->netdev) |
8048 | netif_napi_add(vsi->netdev, &q_vector->napi, | |
eefeacee | 8049 | i40e_napi_poll, NAPI_POLL_WEIGHT); |
493fb300 | 8050 | |
cd0b6fa6 AD |
8051 | q_vector->rx.latency_range = I40E_LOW_LATENCY; |
8052 | q_vector->tx.latency_range = I40E_LOW_LATENCY; | |
8053 | ||
493fb300 AD |
8054 | /* tie q_vector and vsi together */ |
8055 | vsi->q_vectors[v_idx] = q_vector; | |
8056 | ||
8057 | return 0; | |
8058 | } | |
8059 | ||
41c445ff | 8060 | /** |
90e04070 | 8061 | * i40e_vsi_alloc_q_vectors - Allocate memory for interrupt vectors |
41c445ff JB |
8062 | * @vsi: the VSI being configured |
8063 | * | |
8064 | * We allocate one q_vector per queue interrupt. If allocation fails we | |
8065 | * return -ENOMEM. | |
8066 | **/ | |
90e04070 | 8067 | static int i40e_vsi_alloc_q_vectors(struct i40e_vsi *vsi) |
41c445ff JB |
8068 | { |
8069 | struct i40e_pf *pf = vsi->back; | |
7f6c5539 | 8070 | int err, v_idx, num_q_vectors, current_cpu; |
41c445ff JB |
8071 | |
8072 | /* if not MSIX, give the one vector only to the LAN VSI */ | |
8073 | if (pf->flags & I40E_FLAG_MSIX_ENABLED) | |
8074 | num_q_vectors = vsi->num_q_vectors; | |
8075 | else if (vsi == pf->vsi[pf->lan_vsi]) | |
8076 | num_q_vectors = 1; | |
8077 | else | |
8078 | return -EINVAL; | |
8079 | ||
7f6c5539 GP |
8080 | current_cpu = cpumask_first(cpu_online_mask); |
8081 | ||
41c445ff | 8082 | for (v_idx = 0; v_idx < num_q_vectors; v_idx++) { |
7f6c5539 | 8083 | err = i40e_vsi_alloc_q_vector(vsi, v_idx, current_cpu); |
493fb300 AD |
8084 | if (err) |
8085 | goto err_out; | |
7f6c5539 GP |
8086 | current_cpu = cpumask_next(current_cpu, cpu_online_mask); |
8087 | if (unlikely(current_cpu >= nr_cpu_ids)) | |
8088 | current_cpu = cpumask_first(cpu_online_mask); | |
41c445ff JB |
8089 | } |
8090 | ||
8091 | return 0; | |
493fb300 AD |
8092 | |
8093 | err_out: | |
8094 | while (v_idx--) | |
8095 | i40e_free_q_vector(vsi, v_idx); | |
8096 | ||
8097 | return err; | |
41c445ff JB |
8098 | } |
8099 | ||
8100 | /** | |
8101 | * i40e_init_interrupt_scheme - Determine proper interrupt scheme | |
8102 | * @pf: board private structure to initialize | |
8103 | **/ | |
c1147280 | 8104 | static int i40e_init_interrupt_scheme(struct i40e_pf *pf) |
41c445ff | 8105 | { |
3b444399 SN |
8106 | int vectors = 0; |
8107 | ssize_t size; | |
41c445ff JB |
8108 | |
8109 | if (pf->flags & I40E_FLAG_MSIX_ENABLED) { | |
3b444399 SN |
8110 | vectors = i40e_init_msix(pf); |
8111 | if (vectors < 0) { | |
60ea5f83 | 8112 | pf->flags &= ~(I40E_FLAG_MSIX_ENABLED | |
e3219ce6 | 8113 | I40E_FLAG_IWARP_ENABLED | |
60ea5f83 | 8114 | I40E_FLAG_RSS_ENABLED | |
4d9b6043 | 8115 | I40E_FLAG_DCB_CAPABLE | |
a036244c | 8116 | I40E_FLAG_DCB_ENABLED | |
60ea5f83 JB |
8117 | I40E_FLAG_SRIOV_ENABLED | |
8118 | I40E_FLAG_FD_SB_ENABLED | | |
8119 | I40E_FLAG_FD_ATR_ENABLED | | |
8120 | I40E_FLAG_VMDQ_ENABLED); | |
41c445ff JB |
8121 | |
8122 | /* rework the queue expectations without MSIX */ | |
8123 | i40e_determine_queue_usage(pf); | |
8124 | } | |
8125 | } | |
8126 | ||
8127 | if (!(pf->flags & I40E_FLAG_MSIX_ENABLED) && | |
8128 | (pf->flags & I40E_FLAG_MSI_ENABLED)) { | |
77fa28be | 8129 | dev_info(&pf->pdev->dev, "MSI-X not available, trying MSI\n"); |
3b444399 SN |
8130 | vectors = pci_enable_msi(pf->pdev); |
8131 | if (vectors < 0) { | |
8132 | dev_info(&pf->pdev->dev, "MSI init failed - %d\n", | |
8133 | vectors); | |
41c445ff JB |
8134 | pf->flags &= ~I40E_FLAG_MSI_ENABLED; |
8135 | } | |
3b444399 | 8136 | vectors = 1; /* one MSI or Legacy vector */ |
41c445ff JB |
8137 | } |
8138 | ||
958a3e3b | 8139 | if (!(pf->flags & (I40E_FLAG_MSIX_ENABLED | I40E_FLAG_MSI_ENABLED))) |
77fa28be | 8140 | dev_info(&pf->pdev->dev, "MSI-X and MSI not available, falling back to Legacy IRQ\n"); |
958a3e3b | 8141 | |
3b444399 SN |
8142 | /* set up vector assignment tracking */ |
8143 | size = sizeof(struct i40e_lump_tracking) + (sizeof(u16) * vectors); | |
8144 | pf->irq_pile = kzalloc(size, GFP_KERNEL); | |
c1147280 JB |
8145 | if (!pf->irq_pile) { |
8146 | dev_err(&pf->pdev->dev, "error allocating irq_pile memory\n"); | |
8147 | return -ENOMEM; | |
8148 | } | |
3b444399 SN |
8149 | pf->irq_pile->num_entries = vectors; |
8150 | pf->irq_pile->search_hint = 0; | |
8151 | ||
c1147280 | 8152 | /* track first vector for misc interrupts, ignore return */ |
3b444399 | 8153 | (void)i40e_get_lump(pf, pf->irq_pile, 1, I40E_PILE_VALID_BIT - 1); |
c1147280 JB |
8154 | |
8155 | return 0; | |
41c445ff JB |
8156 | } |
8157 | ||
8158 | /** | |
8159 | * i40e_setup_misc_vector - Setup the misc vector to handle non queue events | |
8160 | * @pf: board private structure | |
8161 | * | |
8162 | * This sets up the handler for MSIX 0, which is used to manage the | |
8163 | * non-queue interrupts, e.g. AdminQ and errors. This is not used | |
8164 | * when in MSI or Legacy interrupt mode. | |
8165 | **/ | |
8166 | static int i40e_setup_misc_vector(struct i40e_pf *pf) | |
8167 | { | |
8168 | struct i40e_hw *hw = &pf->hw; | |
8169 | int err = 0; | |
8170 | ||
8171 | /* Only request the irq if this is the first time through, and | |
8172 | * not when we're rebuilding after a Reset | |
8173 | */ | |
8174 | if (!test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state)) { | |
8175 | err = request_irq(pf->msix_entries[0].vector, | |
b294ac70 | 8176 | i40e_intr, 0, pf->int_name, pf); |
41c445ff JB |
8177 | if (err) { |
8178 | dev_info(&pf->pdev->dev, | |
77fa28be | 8179 | "request_irq for %s failed: %d\n", |
b294ac70 | 8180 | pf->int_name, err); |
41c445ff JB |
8181 | return -EFAULT; |
8182 | } | |
8183 | } | |
8184 | ||
ab437b5a | 8185 | i40e_enable_misc_int_causes(pf); |
41c445ff JB |
8186 | |
8187 | /* associate no queues to the misc vector */ | |
8188 | wr32(hw, I40E_PFINT_LNKLST0, I40E_QUEUE_END_OF_LIST); | |
8189 | wr32(hw, I40E_PFINT_ITR0(I40E_RX_ITR), I40E_ITR_8K); | |
8190 | ||
8191 | i40e_flush(hw); | |
8192 | ||
40d72a50 | 8193 | i40e_irq_dynamic_enable_icr0(pf, true); |
41c445ff JB |
8194 | |
8195 | return err; | |
8196 | } | |
8197 | ||
8198 | /** | |
e25d00b8 ASJ |
8199 | * i40e_config_rss_aq - Prepare for RSS using AQ commands |
8200 | * @vsi: vsi structure | |
8201 | * @seed: RSS hash seed | |
8202 | **/ | |
e69ff813 HZ |
8203 | static int i40e_config_rss_aq(struct i40e_vsi *vsi, const u8 *seed, |
8204 | u8 *lut, u16 lut_size) | |
e25d00b8 | 8205 | { |
e25d00b8 ASJ |
8206 | struct i40e_pf *pf = vsi->back; |
8207 | struct i40e_hw *hw = &pf->hw; | |
776b2e15 | 8208 | int ret = 0; |
e25d00b8 | 8209 | |
776b2e15 JK |
8210 | if (seed) { |
8211 | struct i40e_aqc_get_set_rss_key_data *seed_dw = | |
8212 | (struct i40e_aqc_get_set_rss_key_data *)seed; | |
8213 | ret = i40e_aq_set_rss_key(hw, vsi->id, seed_dw); | |
8214 | if (ret) { | |
8215 | dev_info(&pf->pdev->dev, | |
8216 | "Cannot set RSS key, err %s aq_err %s\n", | |
8217 | i40e_stat_str(hw, ret), | |
8218 | i40e_aq_str(hw, hw->aq.asq_last_status)); | |
8219 | return ret; | |
8220 | } | |
e25d00b8 | 8221 | } |
776b2e15 JK |
8222 | if (lut) { |
8223 | bool pf_lut = vsi->type == I40E_VSI_MAIN ? true : false; | |
e25d00b8 | 8224 | |
776b2e15 JK |
8225 | ret = i40e_aq_set_rss_lut(hw, vsi->id, pf_lut, lut, lut_size); |
8226 | if (ret) { | |
8227 | dev_info(&pf->pdev->dev, | |
8228 | "Cannot set RSS lut, err %s aq_err %s\n", | |
8229 | i40e_stat_str(hw, ret), | |
8230 | i40e_aq_str(hw, hw->aq.asq_last_status)); | |
8231 | return ret; | |
8232 | } | |
8233 | } | |
e25d00b8 ASJ |
8234 | return ret; |
8235 | } | |
8236 | ||
95a73780 ASJ |
8237 | /** |
8238 | * i40e_get_rss_aq - Get RSS keys and lut by using AQ commands | |
8239 | * @vsi: Pointer to vsi structure | |
8240 | * @seed: Buffter to store the hash keys | |
8241 | * @lut: Buffer to store the lookup table entries | |
8242 | * @lut_size: Size of buffer to store the lookup table entries | |
8243 | * | |
8244 | * Return 0 on success, negative on failure | |
8245 | */ | |
8246 | static int i40e_get_rss_aq(struct i40e_vsi *vsi, const u8 *seed, | |
8247 | u8 *lut, u16 lut_size) | |
8248 | { | |
8249 | struct i40e_pf *pf = vsi->back; | |
8250 | struct i40e_hw *hw = &pf->hw; | |
8251 | int ret = 0; | |
8252 | ||
8253 | if (seed) { | |
8254 | ret = i40e_aq_get_rss_key(hw, vsi->id, | |
8255 | (struct i40e_aqc_get_set_rss_key_data *)seed); | |
8256 | if (ret) { | |
8257 | dev_info(&pf->pdev->dev, | |
8258 | "Cannot get RSS key, err %s aq_err %s\n", | |
8259 | i40e_stat_str(&pf->hw, ret), | |
8260 | i40e_aq_str(&pf->hw, | |
8261 | pf->hw.aq.asq_last_status)); | |
8262 | return ret; | |
8263 | } | |
8264 | } | |
8265 | ||
8266 | if (lut) { | |
8267 | bool pf_lut = vsi->type == I40E_VSI_MAIN ? true : false; | |
8268 | ||
8269 | ret = i40e_aq_get_rss_lut(hw, vsi->id, pf_lut, lut, lut_size); | |
8270 | if (ret) { | |
8271 | dev_info(&pf->pdev->dev, | |
8272 | "Cannot get RSS lut, err %s aq_err %s\n", | |
8273 | i40e_stat_str(&pf->hw, ret), | |
8274 | i40e_aq_str(&pf->hw, | |
8275 | pf->hw.aq.asq_last_status)); | |
8276 | return ret; | |
8277 | } | |
8278 | } | |
8279 | ||
8280 | return ret; | |
8281 | } | |
8282 | ||
0582b964 JK |
8283 | /** |
8284 | * i40e_vsi_config_rss - Prepare for VSI(VMDq) RSS if used | |
8285 | * @vsi: VSI structure | |
8286 | **/ | |
8287 | static int i40e_vsi_config_rss(struct i40e_vsi *vsi) | |
8288 | { | |
8289 | u8 seed[I40E_HKEY_ARRAY_SIZE]; | |
8290 | struct i40e_pf *pf = vsi->back; | |
8291 | u8 *lut; | |
8292 | int ret; | |
8293 | ||
8294 | if (!(pf->flags & I40E_FLAG_RSS_AQ_CAPABLE)) | |
8295 | return 0; | |
8296 | ||
552b9962 JK |
8297 | if (!vsi->rss_size) |
8298 | vsi->rss_size = min_t(int, pf->alloc_rss_size, | |
8299 | vsi->num_queue_pairs); | |
8300 | if (!vsi->rss_size) | |
8301 | return -EINVAL; | |
8302 | ||
0582b964 JK |
8303 | lut = kzalloc(vsi->rss_table_size, GFP_KERNEL); |
8304 | if (!lut) | |
8305 | return -ENOMEM; | |
552b9962 JK |
8306 | /* Use the user configured hash keys and lookup table if there is one, |
8307 | * otherwise use default | |
8308 | */ | |
8309 | if (vsi->rss_lut_user) | |
8310 | memcpy(lut, vsi->rss_lut_user, vsi->rss_table_size); | |
8311 | else | |
8312 | i40e_fill_rss_lut(pf, lut, vsi->rss_table_size, vsi->rss_size); | |
8313 | if (vsi->rss_hkey_user) | |
8314 | memcpy(seed, vsi->rss_hkey_user, I40E_HKEY_ARRAY_SIZE); | |
8315 | else | |
8316 | netdev_rss_key_fill((void *)seed, I40E_HKEY_ARRAY_SIZE); | |
0582b964 JK |
8317 | ret = i40e_config_rss_aq(vsi, seed, lut, vsi->rss_table_size); |
8318 | kfree(lut); | |
8319 | ||
8320 | return ret; | |
8321 | } | |
8322 | ||
e25d00b8 | 8323 | /** |
043dd650 | 8324 | * i40e_config_rss_reg - Configure RSS keys and lut by writing registers |
e69ff813 | 8325 | * @vsi: Pointer to vsi structure |
e25d00b8 | 8326 | * @seed: RSS hash seed |
e69ff813 HZ |
8327 | * @lut: Lookup table |
8328 | * @lut_size: Lookup table size | |
8329 | * | |
8330 | * Returns 0 on success, negative on failure | |
41c445ff | 8331 | **/ |
e69ff813 HZ |
8332 | static int i40e_config_rss_reg(struct i40e_vsi *vsi, const u8 *seed, |
8333 | const u8 *lut, u16 lut_size) | |
41c445ff | 8334 | { |
e69ff813 | 8335 | struct i40e_pf *pf = vsi->back; |
4617e8c0 | 8336 | struct i40e_hw *hw = &pf->hw; |
c4e1868c | 8337 | u16 vf_id = vsi->vf_id; |
e69ff813 | 8338 | u8 i; |
41c445ff | 8339 | |
e25d00b8 | 8340 | /* Fill out hash function seed */ |
e69ff813 HZ |
8341 | if (seed) { |
8342 | u32 *seed_dw = (u32 *)seed; | |
8343 | ||
c4e1868c MW |
8344 | if (vsi->type == I40E_VSI_MAIN) { |
8345 | for (i = 0; i <= I40E_PFQF_HKEY_MAX_INDEX; i++) | |
26f77e53 | 8346 | wr32(hw, I40E_PFQF_HKEY(i), seed_dw[i]); |
c4e1868c MW |
8347 | } else if (vsi->type == I40E_VSI_SRIOV) { |
8348 | for (i = 0; i <= I40E_VFQF_HKEY1_MAX_INDEX; i++) | |
26f77e53 | 8349 | wr32(hw, I40E_VFQF_HKEY1(i, vf_id), seed_dw[i]); |
c4e1868c MW |
8350 | } else { |
8351 | dev_err(&pf->pdev->dev, "Cannot set RSS seed - invalid VSI type\n"); | |
8352 | } | |
e69ff813 HZ |
8353 | } |
8354 | ||
8355 | if (lut) { | |
8356 | u32 *lut_dw = (u32 *)lut; | |
8357 | ||
c4e1868c MW |
8358 | if (vsi->type == I40E_VSI_MAIN) { |
8359 | if (lut_size != I40E_HLUT_ARRAY_SIZE) | |
8360 | return -EINVAL; | |
8361 | for (i = 0; i <= I40E_PFQF_HLUT_MAX_INDEX; i++) | |
8362 | wr32(hw, I40E_PFQF_HLUT(i), lut_dw[i]); | |
8363 | } else if (vsi->type == I40E_VSI_SRIOV) { | |
8364 | if (lut_size != I40E_VF_HLUT_ARRAY_SIZE) | |
8365 | return -EINVAL; | |
8366 | for (i = 0; i <= I40E_VFQF_HLUT_MAX_INDEX; i++) | |
26f77e53 | 8367 | wr32(hw, I40E_VFQF_HLUT1(i, vf_id), lut_dw[i]); |
c4e1868c MW |
8368 | } else { |
8369 | dev_err(&pf->pdev->dev, "Cannot set RSS LUT - invalid VSI type\n"); | |
8370 | } | |
e25d00b8 ASJ |
8371 | } |
8372 | i40e_flush(hw); | |
8373 | ||
8374 | return 0; | |
8375 | } | |
8376 | ||
043dd650 HZ |
8377 | /** |
8378 | * i40e_get_rss_reg - Get the RSS keys and lut by reading registers | |
8379 | * @vsi: Pointer to VSI structure | |
8380 | * @seed: Buffer to store the keys | |
8381 | * @lut: Buffer to store the lookup table entries | |
8382 | * @lut_size: Size of buffer to store the lookup table entries | |
8383 | * | |
8384 | * Returns 0 on success, negative on failure | |
8385 | */ | |
8386 | static int i40e_get_rss_reg(struct i40e_vsi *vsi, u8 *seed, | |
8387 | u8 *lut, u16 lut_size) | |
8388 | { | |
8389 | struct i40e_pf *pf = vsi->back; | |
8390 | struct i40e_hw *hw = &pf->hw; | |
8391 | u16 i; | |
8392 | ||
8393 | if (seed) { | |
8394 | u32 *seed_dw = (u32 *)seed; | |
8395 | ||
8396 | for (i = 0; i <= I40E_PFQF_HKEY_MAX_INDEX; i++) | |
272cdaf2 | 8397 | seed_dw[i] = i40e_read_rx_ctl(hw, I40E_PFQF_HKEY(i)); |
043dd650 HZ |
8398 | } |
8399 | if (lut) { | |
8400 | u32 *lut_dw = (u32 *)lut; | |
8401 | ||
8402 | if (lut_size != I40E_HLUT_ARRAY_SIZE) | |
8403 | return -EINVAL; | |
8404 | for (i = 0; i <= I40E_PFQF_HLUT_MAX_INDEX; i++) | |
8405 | lut_dw[i] = rd32(hw, I40E_PFQF_HLUT(i)); | |
8406 | } | |
8407 | ||
8408 | return 0; | |
8409 | } | |
8410 | ||
8411 | /** | |
8412 | * i40e_config_rss - Configure RSS keys and lut | |
8413 | * @vsi: Pointer to VSI structure | |
8414 | * @seed: RSS hash seed | |
8415 | * @lut: Lookup table | |
8416 | * @lut_size: Lookup table size | |
8417 | * | |
8418 | * Returns 0 on success, negative on failure | |
8419 | */ | |
8420 | int i40e_config_rss(struct i40e_vsi *vsi, u8 *seed, u8 *lut, u16 lut_size) | |
8421 | { | |
8422 | struct i40e_pf *pf = vsi->back; | |
8423 | ||
8424 | if (pf->flags & I40E_FLAG_RSS_AQ_CAPABLE) | |
8425 | return i40e_config_rss_aq(vsi, seed, lut, lut_size); | |
8426 | else | |
8427 | return i40e_config_rss_reg(vsi, seed, lut, lut_size); | |
8428 | } | |
8429 | ||
8430 | /** | |
8431 | * i40e_get_rss - Get RSS keys and lut | |
8432 | * @vsi: Pointer to VSI structure | |
8433 | * @seed: Buffer to store the keys | |
8434 | * @lut: Buffer to store the lookup table entries | |
8435 | * lut_size: Size of buffer to store the lookup table entries | |
8436 | * | |
8437 | * Returns 0 on success, negative on failure | |
8438 | */ | |
8439 | int i40e_get_rss(struct i40e_vsi *vsi, u8 *seed, u8 *lut, u16 lut_size) | |
8440 | { | |
95a73780 ASJ |
8441 | struct i40e_pf *pf = vsi->back; |
8442 | ||
8443 | if (pf->flags & I40E_FLAG_RSS_AQ_CAPABLE) | |
8444 | return i40e_get_rss_aq(vsi, seed, lut, lut_size); | |
8445 | else | |
8446 | return i40e_get_rss_reg(vsi, seed, lut, lut_size); | |
043dd650 HZ |
8447 | } |
8448 | ||
e69ff813 HZ |
8449 | /** |
8450 | * i40e_fill_rss_lut - Fill the RSS lookup table with default values | |
8451 | * @pf: Pointer to board private structure | |
8452 | * @lut: Lookup table | |
8453 | * @rss_table_size: Lookup table size | |
8454 | * @rss_size: Range of queue number for hashing | |
8455 | */ | |
f1582351 AB |
8456 | void i40e_fill_rss_lut(struct i40e_pf *pf, u8 *lut, |
8457 | u16 rss_table_size, u16 rss_size) | |
e69ff813 HZ |
8458 | { |
8459 | u16 i; | |
8460 | ||
8461 | for (i = 0; i < rss_table_size; i++) | |
8462 | lut[i] = i % rss_size; | |
8463 | } | |
8464 | ||
e25d00b8 | 8465 | /** |
043dd650 | 8466 | * i40e_pf_config_rss - Prepare for RSS if used |
e25d00b8 ASJ |
8467 | * @pf: board private structure |
8468 | **/ | |
043dd650 | 8469 | static int i40e_pf_config_rss(struct i40e_pf *pf) |
e25d00b8 ASJ |
8470 | { |
8471 | struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi]; | |
8472 | u8 seed[I40E_HKEY_ARRAY_SIZE]; | |
e69ff813 | 8473 | u8 *lut; |
e25d00b8 ASJ |
8474 | struct i40e_hw *hw = &pf->hw; |
8475 | u32 reg_val; | |
8476 | u64 hena; | |
e69ff813 | 8477 | int ret; |
e25d00b8 | 8478 | |
41c445ff | 8479 | /* By default we enable TCP/UDP with IPv4/IPv6 ptypes */ |
272cdaf2 SN |
8480 | hena = (u64)i40e_read_rx_ctl(hw, I40E_PFQF_HENA(0)) | |
8481 | ((u64)i40e_read_rx_ctl(hw, I40E_PFQF_HENA(1)) << 32); | |
e25d00b8 ASJ |
8482 | hena |= i40e_pf_get_default_rss_hena(pf); |
8483 | ||
272cdaf2 SN |
8484 | i40e_write_rx_ctl(hw, I40E_PFQF_HENA(0), (u32)hena); |
8485 | i40e_write_rx_ctl(hw, I40E_PFQF_HENA(1), (u32)(hena >> 32)); | |
41c445ff | 8486 | |
e25d00b8 | 8487 | /* Determine the RSS table size based on the hardware capabilities */ |
272cdaf2 | 8488 | reg_val = i40e_read_rx_ctl(hw, I40E_PFQF_CTL_0); |
e25d00b8 ASJ |
8489 | reg_val = (pf->rss_table_size == 512) ? |
8490 | (reg_val | I40E_PFQF_CTL_0_HASHLUTSIZE_512) : | |
8491 | (reg_val & ~I40E_PFQF_CTL_0_HASHLUTSIZE_512); | |
272cdaf2 | 8492 | i40e_write_rx_ctl(hw, I40E_PFQF_CTL_0, reg_val); |
e157ea30 | 8493 | |
28c5869f | 8494 | /* Determine the RSS size of the VSI */ |
f25571b5 HR |
8495 | if (!vsi->rss_size) { |
8496 | u16 qcount; | |
8497 | ||
8498 | qcount = vsi->num_queue_pairs / vsi->tc_config.numtc; | |
8499 | vsi->rss_size = min_t(int, pf->alloc_rss_size, qcount); | |
8500 | } | |
a4fa59cc MW |
8501 | if (!vsi->rss_size) |
8502 | return -EINVAL; | |
28c5869f | 8503 | |
e69ff813 HZ |
8504 | lut = kzalloc(vsi->rss_table_size, GFP_KERNEL); |
8505 | if (!lut) | |
8506 | return -ENOMEM; | |
8507 | ||
28c5869f HZ |
8508 | /* Use user configured lut if there is one, otherwise use default */ |
8509 | if (vsi->rss_lut_user) | |
8510 | memcpy(lut, vsi->rss_lut_user, vsi->rss_table_size); | |
8511 | else | |
8512 | i40e_fill_rss_lut(pf, lut, vsi->rss_table_size, vsi->rss_size); | |
e69ff813 | 8513 | |
28c5869f HZ |
8514 | /* Use user configured hash key if there is one, otherwise |
8515 | * use default. | |
8516 | */ | |
8517 | if (vsi->rss_hkey_user) | |
8518 | memcpy(seed, vsi->rss_hkey_user, I40E_HKEY_ARRAY_SIZE); | |
8519 | else | |
8520 | netdev_rss_key_fill((void *)seed, I40E_HKEY_ARRAY_SIZE); | |
043dd650 | 8521 | ret = i40e_config_rss(vsi, seed, lut, vsi->rss_table_size); |
e69ff813 HZ |
8522 | kfree(lut); |
8523 | ||
8524 | return ret; | |
41c445ff JB |
8525 | } |
8526 | ||
f8ff1464 ASJ |
8527 | /** |
8528 | * i40e_reconfig_rss_queues - change number of queues for rss and rebuild | |
8529 | * @pf: board private structure | |
8530 | * @queue_count: the requested queue count for rss. | |
8531 | * | |
8532 | * returns 0 if rss is not enabled, if enabled returns the final rss queue | |
8533 | * count which may be different from the requested queue count. | |
373149fc | 8534 | * Note: expects to be called while under rtnl_lock() |
f8ff1464 ASJ |
8535 | **/ |
8536 | int i40e_reconfig_rss_queues(struct i40e_pf *pf, int queue_count) | |
8537 | { | |
9a3bd2f1 ASJ |
8538 | struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi]; |
8539 | int new_rss_size; | |
8540 | ||
f8ff1464 ASJ |
8541 | if (!(pf->flags & I40E_FLAG_RSS_ENABLED)) |
8542 | return 0; | |
8543 | ||
9a3bd2f1 | 8544 | new_rss_size = min_t(int, queue_count, pf->rss_size_max); |
f8ff1464 | 8545 | |
9a3bd2f1 | 8546 | if (queue_count != vsi->num_queue_pairs) { |
f25571b5 HR |
8547 | u16 qcount; |
8548 | ||
9a3bd2f1 | 8549 | vsi->req_queue_pairs = queue_count; |
373149fc | 8550 | i40e_prep_for_reset(pf, true); |
f8ff1464 | 8551 | |
acd65448 | 8552 | pf->alloc_rss_size = new_rss_size; |
f8ff1464 | 8553 | |
373149fc | 8554 | i40e_reset_and_rebuild(pf, true, true); |
28c5869f HZ |
8555 | |
8556 | /* Discard the user configured hash keys and lut, if less | |
8557 | * queues are enabled. | |
8558 | */ | |
8559 | if (queue_count < vsi->rss_size) { | |
8560 | i40e_clear_rss_config_user(vsi); | |
8561 | dev_dbg(&pf->pdev->dev, | |
8562 | "discard user configured hash keys and lut\n"); | |
8563 | } | |
8564 | ||
8565 | /* Reset vsi->rss_size, as number of enabled queues changed */ | |
f25571b5 HR |
8566 | qcount = vsi->num_queue_pairs / vsi->tc_config.numtc; |
8567 | vsi->rss_size = min_t(int, pf->alloc_rss_size, qcount); | |
28c5869f | 8568 | |
043dd650 | 8569 | i40e_pf_config_rss(pf); |
f8ff1464 | 8570 | } |
12815057 LY |
8571 | dev_info(&pf->pdev->dev, "User requested queue count/HW max RSS count: %d/%d\n", |
8572 | vsi->req_queue_pairs, pf->rss_size_max); | |
acd65448 | 8573 | return pf->alloc_rss_size; |
f8ff1464 ASJ |
8574 | } |
8575 | ||
f4492db1 GR |
8576 | /** |
8577 | * i40e_get_npar_bw_setting - Retrieve BW settings for this PF partition | |
8578 | * @pf: board private structure | |
8579 | **/ | |
8580 | i40e_status i40e_get_npar_bw_setting(struct i40e_pf *pf) | |
8581 | { | |
8582 | i40e_status status; | |
8583 | bool min_valid, max_valid; | |
8584 | u32 max_bw, min_bw; | |
8585 | ||
8586 | status = i40e_read_bw_from_alt_ram(&pf->hw, &max_bw, &min_bw, | |
8587 | &min_valid, &max_valid); | |
8588 | ||
8589 | if (!status) { | |
8590 | if (min_valid) | |
8591 | pf->npar_min_bw = min_bw; | |
8592 | if (max_valid) | |
8593 | pf->npar_max_bw = max_bw; | |
8594 | } | |
8595 | ||
8596 | return status; | |
8597 | } | |
8598 | ||
8599 | /** | |
8600 | * i40e_set_npar_bw_setting - Set BW settings for this PF partition | |
8601 | * @pf: board private structure | |
8602 | **/ | |
8603 | i40e_status i40e_set_npar_bw_setting(struct i40e_pf *pf) | |
8604 | { | |
8605 | struct i40e_aqc_configure_partition_bw_data bw_data; | |
8606 | i40e_status status; | |
8607 | ||
b40c82e6 | 8608 | /* Set the valid bit for this PF */ |
41a1d04b | 8609 | bw_data.pf_valid_bits = cpu_to_le16(BIT(pf->hw.pf_id)); |
f4492db1 GR |
8610 | bw_data.max_bw[pf->hw.pf_id] = pf->npar_max_bw & I40E_ALT_BW_VALUE_MASK; |
8611 | bw_data.min_bw[pf->hw.pf_id] = pf->npar_min_bw & I40E_ALT_BW_VALUE_MASK; | |
8612 | ||
8613 | /* Set the new bandwidths */ | |
8614 | status = i40e_aq_configure_partition_bw(&pf->hw, &bw_data, NULL); | |
8615 | ||
8616 | return status; | |
8617 | } | |
8618 | ||
8619 | /** | |
8620 | * i40e_commit_npar_bw_setting - Commit BW settings for this PF partition | |
8621 | * @pf: board private structure | |
8622 | **/ | |
8623 | i40e_status i40e_commit_npar_bw_setting(struct i40e_pf *pf) | |
8624 | { | |
8625 | /* Commit temporary BW setting to permanent NVM image */ | |
8626 | enum i40e_admin_queue_err last_aq_status; | |
8627 | i40e_status ret; | |
8628 | u16 nvm_word; | |
8629 | ||
8630 | if (pf->hw.partition_id != 1) { | |
8631 | dev_info(&pf->pdev->dev, | |
8632 | "Commit BW only works on partition 1! This is partition %d", | |
8633 | pf->hw.partition_id); | |
8634 | ret = I40E_NOT_SUPPORTED; | |
8635 | goto bw_commit_out; | |
8636 | } | |
8637 | ||
8638 | /* Acquire NVM for read access */ | |
8639 | ret = i40e_acquire_nvm(&pf->hw, I40E_RESOURCE_READ); | |
8640 | last_aq_status = pf->hw.aq.asq_last_status; | |
8641 | if (ret) { | |
8642 | dev_info(&pf->pdev->dev, | |
f1c7e72e SN |
8643 | "Cannot acquire NVM for read access, err %s aq_err %s\n", |
8644 | i40e_stat_str(&pf->hw, ret), | |
8645 | i40e_aq_str(&pf->hw, last_aq_status)); | |
f4492db1 GR |
8646 | goto bw_commit_out; |
8647 | } | |
8648 | ||
8649 | /* Read word 0x10 of NVM - SW compatibility word 1 */ | |
8650 | ret = i40e_aq_read_nvm(&pf->hw, | |
8651 | I40E_SR_NVM_CONTROL_WORD, | |
8652 | 0x10, sizeof(nvm_word), &nvm_word, | |
8653 | false, NULL); | |
8654 | /* Save off last admin queue command status before releasing | |
8655 | * the NVM | |
8656 | */ | |
8657 | last_aq_status = pf->hw.aq.asq_last_status; | |
8658 | i40e_release_nvm(&pf->hw); | |
8659 | if (ret) { | |
f1c7e72e SN |
8660 | dev_info(&pf->pdev->dev, "NVM read error, err %s aq_err %s\n", |
8661 | i40e_stat_str(&pf->hw, ret), | |
8662 | i40e_aq_str(&pf->hw, last_aq_status)); | |
f4492db1 GR |
8663 | goto bw_commit_out; |
8664 | } | |
8665 | ||
8666 | /* Wait a bit for NVM release to complete */ | |
8667 | msleep(50); | |
8668 | ||
8669 | /* Acquire NVM for write access */ | |
8670 | ret = i40e_acquire_nvm(&pf->hw, I40E_RESOURCE_WRITE); | |
8671 | last_aq_status = pf->hw.aq.asq_last_status; | |
8672 | if (ret) { | |
8673 | dev_info(&pf->pdev->dev, | |
f1c7e72e SN |
8674 | "Cannot acquire NVM for write access, err %s aq_err %s\n", |
8675 | i40e_stat_str(&pf->hw, ret), | |
8676 | i40e_aq_str(&pf->hw, last_aq_status)); | |
f4492db1 GR |
8677 | goto bw_commit_out; |
8678 | } | |
8679 | /* Write it back out unchanged to initiate update NVM, | |
8680 | * which will force a write of the shadow (alt) RAM to | |
8681 | * the NVM - thus storing the bandwidth values permanently. | |
8682 | */ | |
8683 | ret = i40e_aq_update_nvm(&pf->hw, | |
8684 | I40E_SR_NVM_CONTROL_WORD, | |
8685 | 0x10, sizeof(nvm_word), | |
8686 | &nvm_word, true, NULL); | |
8687 | /* Save off last admin queue command status before releasing | |
8688 | * the NVM | |
8689 | */ | |
8690 | last_aq_status = pf->hw.aq.asq_last_status; | |
8691 | i40e_release_nvm(&pf->hw); | |
8692 | if (ret) | |
8693 | dev_info(&pf->pdev->dev, | |
f1c7e72e SN |
8694 | "BW settings NOT SAVED, err %s aq_err %s\n", |
8695 | i40e_stat_str(&pf->hw, ret), | |
8696 | i40e_aq_str(&pf->hw, last_aq_status)); | |
f4492db1 GR |
8697 | bw_commit_out: |
8698 | ||
8699 | return ret; | |
8700 | } | |
8701 | ||
41c445ff JB |
8702 | /** |
8703 | * i40e_sw_init - Initialize general software structures (struct i40e_pf) | |
8704 | * @pf: board private structure to initialize | |
8705 | * | |
8706 | * i40e_sw_init initializes the Adapter private data structure. | |
8707 | * Fields are initialized based on PCI device information and | |
8708 | * OS network device settings (MTU size). | |
8709 | **/ | |
8710 | static int i40e_sw_init(struct i40e_pf *pf) | |
8711 | { | |
8712 | int err = 0; | |
8713 | int size; | |
8714 | ||
41c445ff JB |
8715 | /* Set default capability flags */ |
8716 | pf->flags = I40E_FLAG_RX_CSUM_ENABLED | | |
8717 | I40E_FLAG_MSI_ENABLED | | |
2bc7ee8a MW |
8718 | I40E_FLAG_MSIX_ENABLED; |
8719 | ||
ca99eb99 MW |
8720 | /* Set default ITR */ |
8721 | pf->rx_itr_default = I40E_ITR_DYNAMIC | I40E_ITR_RX_DEF; | |
8722 | pf->tx_itr_default = I40E_ITR_DYNAMIC | I40E_ITR_TX_DEF; | |
8723 | ||
7134f9ce JB |
8724 | /* Depending on PF configurations, it is possible that the RSS |
8725 | * maximum might end up larger than the available queues | |
8726 | */ | |
41a1d04b | 8727 | pf->rss_size_max = BIT(pf->hw.func_caps.rss_table_entry_width); |
acd65448 | 8728 | pf->alloc_rss_size = 1; |
5db4cb59 | 8729 | pf->rss_table_size = pf->hw.func_caps.rss_table_size; |
7134f9ce JB |
8730 | pf->rss_size_max = min_t(int, pf->rss_size_max, |
8731 | pf->hw.func_caps.num_tx_qp); | |
41c445ff JB |
8732 | if (pf->hw.func_caps.rss) { |
8733 | pf->flags |= I40E_FLAG_RSS_ENABLED; | |
acd65448 HZ |
8734 | pf->alloc_rss_size = min_t(int, pf->rss_size_max, |
8735 | num_online_cpus()); | |
41c445ff JB |
8736 | } |
8737 | ||
2050bc65 | 8738 | /* MFP mode enabled */ |
c78b953e | 8739 | if (pf->hw.func_caps.npar_enable || pf->hw.func_caps.flex10_enable) { |
2050bc65 CS |
8740 | pf->flags |= I40E_FLAG_MFP_ENABLED; |
8741 | dev_info(&pf->pdev->dev, "MFP mode Enabled\n"); | |
f4492db1 GR |
8742 | if (i40e_get_npar_bw_setting(pf)) |
8743 | dev_warn(&pf->pdev->dev, | |
8744 | "Could not get NPAR bw settings\n"); | |
8745 | else | |
8746 | dev_info(&pf->pdev->dev, | |
8747 | "Min BW = %8.8x, Max BW = %8.8x\n", | |
8748 | pf->npar_min_bw, pf->npar_max_bw); | |
2050bc65 CS |
8749 | } |
8750 | ||
cbf61325 ASJ |
8751 | /* FW/NVM is not yet fixed in this regard */ |
8752 | if ((pf->hw.func_caps.fd_filters_guaranteed > 0) || | |
8753 | (pf->hw.func_caps.fd_filters_best_effort > 0)) { | |
8754 | pf->flags |= I40E_FLAG_FD_ATR_ENABLED; | |
8755 | pf->atr_sample_rate = I40E_DEFAULT_ATR_SAMPLE_RATE; | |
6eae9c6a SN |
8756 | if (pf->flags & I40E_FLAG_MFP_ENABLED && |
8757 | pf->hw.num_partitions > 1) | |
cbf61325 | 8758 | dev_info(&pf->pdev->dev, |
0b67584f | 8759 | "Flow Director Sideband mode Disabled in MFP mode\n"); |
6eae9c6a SN |
8760 | else |
8761 | pf->flags |= I40E_FLAG_FD_SB_ENABLED; | |
cbf61325 ASJ |
8762 | pf->fdir_pf_filter_count = |
8763 | pf->hw.func_caps.fd_filters_guaranteed; | |
8764 | pf->hw.fdir_shared_filter_count = | |
8765 | pf->hw.func_caps.fd_filters_best_effort; | |
41c445ff JB |
8766 | } |
8767 | ||
6de432c5 | 8768 | if ((pf->hw.mac.type == I40E_MAC_XL710) && |
8eed76fa | 8769 | (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver < 33)) || |
f1bbad33 | 8770 | (pf->hw.aq.fw_maj_ver < 4))) { |
8eed76fa | 8771 | pf->flags |= I40E_FLAG_RESTART_AUTONEG; |
f1bbad33 NP |
8772 | /* No DCB support for FW < v4.33 */ |
8773 | pf->flags |= I40E_FLAG_NO_DCB_SUPPORT; | |
8774 | } | |
8775 | ||
8776 | /* Disable FW LLDP if FW < v4.3 */ | |
6de432c5 | 8777 | if ((pf->hw.mac.type == I40E_MAC_XL710) && |
f1bbad33 NP |
8778 | (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver < 3)) || |
8779 | (pf->hw.aq.fw_maj_ver < 4))) | |
8780 | pf->flags |= I40E_FLAG_STOP_FW_LLDP; | |
8781 | ||
8782 | /* Use the FW Set LLDP MIB API if FW > v4.40 */ | |
6de432c5 | 8783 | if ((pf->hw.mac.type == I40E_MAC_XL710) && |
f1bbad33 NP |
8784 | (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver >= 40)) || |
8785 | (pf->hw.aq.fw_maj_ver >= 5))) | |
8786 | pf->flags |= I40E_FLAG_USE_SET_LLDP_MIB; | |
8eed76fa | 8787 | |
41c445ff | 8788 | if (pf->hw.func_caps.vmdq) { |
41c445ff | 8789 | pf->num_vmdq_vsis = I40E_DEFAULT_NUM_VMDQ_VSI; |
e25d00b8 | 8790 | pf->flags |= I40E_FLAG_VMDQ_ENABLED; |
e9e53662 | 8791 | pf->num_vmdq_qps = i40e_default_queues_per_vmdq(pf); |
41c445ff JB |
8792 | } |
8793 | ||
e3219ce6 ASJ |
8794 | if (pf->hw.func_caps.iwarp) { |
8795 | pf->flags |= I40E_FLAG_IWARP_ENABLED; | |
8796 | /* IWARP needs one extra vector for CQP just like MISC.*/ | |
8797 | pf->num_iwarp_msix = (int)num_online_cpus() + 1; | |
8798 | } | |
8799 | ||
41c445ff | 8800 | #ifdef CONFIG_PCI_IOV |
ba252f13 | 8801 | if (pf->hw.func_caps.num_vfs && pf->hw.partition_id == 1) { |
41c445ff JB |
8802 | pf->num_vf_qps = I40E_DEFAULT_QUEUES_PER_VF; |
8803 | pf->flags |= I40E_FLAG_SRIOV_ENABLED; | |
8804 | pf->num_req_vfs = min_t(int, | |
8805 | pf->hw.func_caps.num_vfs, | |
8806 | I40E_MAX_VF_COUNT); | |
8807 | } | |
8808 | #endif /* CONFIG_PCI_IOV */ | |
d502ce01 | 8809 | if (pf->hw.mac.type == I40E_MAC_X722) { |
1d68005d JH |
8810 | pf->flags |= I40E_FLAG_RSS_AQ_CAPABLE |
8811 | | I40E_FLAG_128_QP_RSS_CAPABLE | |
8812 | | I40E_FLAG_HW_ATR_EVICT_CAPABLE | |
8813 | | I40E_FLAG_OUTER_UDP_CSUM_CAPABLE | |
8814 | | I40E_FLAG_WB_ON_ITR_CAPABLE | |
8815 | | I40E_FLAG_MULTIPLE_TCP_UDP_RSS_PCTYPE | |
8816 | | I40E_FLAG_NO_PCI_LINK_CHECK | |
8817 | | I40E_FLAG_USE_SET_LLDP_MIB | |
8818 | | I40E_FLAG_GENEVE_OFFLOAD_CAPABLE | |
8819 | | I40E_FLAG_PTP_L4_CAPABLE | |
8820 | | I40E_FLAG_WOL_MC_MAGIC_PKT_WAKE; | |
a340c789 AS |
8821 | } else if ((pf->hw.aq.api_maj_ver > 1) || |
8822 | ((pf->hw.aq.api_maj_ver == 1) && | |
8823 | (pf->hw.aq.api_min_ver > 4))) { | |
8824 | /* Supported in FW API version higher than 1.4 */ | |
8825 | pf->flags |= I40E_FLAG_GENEVE_OFFLOAD_CAPABLE; | |
b77ac975 | 8826 | pf->hw_disabled_flags = I40E_FLAG_HW_ATR_EVICT_CAPABLE; |
72b74869 | 8827 | } else { |
b77ac975 | 8828 | pf->hw_disabled_flags = I40E_FLAG_HW_ATR_EVICT_CAPABLE; |
d502ce01 | 8829 | } |
a340c789 | 8830 | |
41c445ff JB |
8831 | pf->eeprom_version = 0xDEAD; |
8832 | pf->lan_veb = I40E_NO_VEB; | |
8833 | pf->lan_vsi = I40E_NO_VSI; | |
8834 | ||
d1a8d275 ASJ |
8835 | /* By default FW has this off for performance reasons */ |
8836 | pf->flags &= ~I40E_FLAG_VEB_STATS_ENABLED; | |
8837 | ||
41c445ff JB |
8838 | /* set up queue assignment tracking */ |
8839 | size = sizeof(struct i40e_lump_tracking) | |
8840 | + (sizeof(u16) * pf->hw.func_caps.num_tx_qp); | |
8841 | pf->qp_pile = kzalloc(size, GFP_KERNEL); | |
8842 | if (!pf->qp_pile) { | |
8843 | err = -ENOMEM; | |
8844 | goto sw_init_done; | |
8845 | } | |
8846 | pf->qp_pile->num_entries = pf->hw.func_caps.num_tx_qp; | |
8847 | pf->qp_pile->search_hint = 0; | |
8848 | ||
327fe04b ASJ |
8849 | pf->tx_timeout_recovery_level = 1; |
8850 | ||
41c445ff JB |
8851 | mutex_init(&pf->switch_mutex); |
8852 | ||
c668a12c GR |
8853 | /* If NPAR is enabled nudge the Tx scheduler */ |
8854 | if (pf->hw.func_caps.npar_enable && (!i40e_get_npar_bw_setting(pf))) | |
8855 | i40e_set_npar_bw_setting(pf); | |
8856 | ||
41c445ff JB |
8857 | sw_init_done: |
8858 | return err; | |
8859 | } | |
8860 | ||
7c3c288b ASJ |
8861 | /** |
8862 | * i40e_set_ntuple - set the ntuple feature flag and take action | |
8863 | * @pf: board private structure to initialize | |
8864 | * @features: the feature set that the stack is suggesting | |
8865 | * | |
8866 | * returns a bool to indicate if reset needs to happen | |
8867 | **/ | |
8868 | bool i40e_set_ntuple(struct i40e_pf *pf, netdev_features_t features) | |
8869 | { | |
8870 | bool need_reset = false; | |
8871 | ||
8872 | /* Check if Flow Director n-tuple support was enabled or disabled. If | |
8873 | * the state changed, we need to reset. | |
8874 | */ | |
8875 | if (features & NETIF_F_NTUPLE) { | |
8876 | /* Enable filters and mark for reset */ | |
8877 | if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED)) | |
8878 | need_reset = true; | |
a70e407f TD |
8879 | /* enable FD_SB only if there is MSI-X vector */ |
8880 | if (pf->num_fdsb_msix > 0) | |
8881 | pf->flags |= I40E_FLAG_FD_SB_ENABLED; | |
7c3c288b ASJ |
8882 | } else { |
8883 | /* turn off filters, mark for reset and clear SW filter list */ | |
8884 | if (pf->flags & I40E_FLAG_FD_SB_ENABLED) { | |
8885 | need_reset = true; | |
8886 | i40e_fdir_filter_exit(pf); | |
8887 | } | |
8888 | pf->flags &= ~I40E_FLAG_FD_SB_ENABLED; | |
b77ac975 | 8889 | pf->hw_disabled_flags &= ~I40E_FLAG_FD_SB_ENABLED; |
1e1be8f6 | 8890 | /* reset fd counters */ |
097dbf52 JK |
8891 | pf->fd_add_err = 0; |
8892 | pf->fd_atr_cnt = 0; | |
8a4f34fb ASJ |
8893 | /* if ATR was auto disabled it can be re-enabled. */ |
8894 | if ((pf->flags & I40E_FLAG_FD_ATR_ENABLED) && | |
b77ac975 HR |
8895 | (pf->hw_disabled_flags & I40E_FLAG_FD_ATR_ENABLED)) { |
8896 | pf->hw_disabled_flags &= ~I40E_FLAG_FD_ATR_ENABLED; | |
234dc4e6 JK |
8897 | if (I40E_DEBUG_FD & pf->hw.debug_mask) |
8898 | dev_info(&pf->pdev->dev, "ATR re-enabled.\n"); | |
8899 | } | |
7c3c288b ASJ |
8900 | } |
8901 | return need_reset; | |
8902 | } | |
8903 | ||
d8ec9864 AB |
8904 | /** |
8905 | * i40e_clear_rss_lut - clear the rx hash lookup table | |
8906 | * @vsi: the VSI being configured | |
8907 | **/ | |
8908 | static void i40e_clear_rss_lut(struct i40e_vsi *vsi) | |
8909 | { | |
8910 | struct i40e_pf *pf = vsi->back; | |
8911 | struct i40e_hw *hw = &pf->hw; | |
8912 | u16 vf_id = vsi->vf_id; | |
8913 | u8 i; | |
8914 | ||
8915 | if (vsi->type == I40E_VSI_MAIN) { | |
8916 | for (i = 0; i <= I40E_PFQF_HLUT_MAX_INDEX; i++) | |
8917 | wr32(hw, I40E_PFQF_HLUT(i), 0); | |
8918 | } else if (vsi->type == I40E_VSI_SRIOV) { | |
8919 | for (i = 0; i <= I40E_VFQF_HLUT_MAX_INDEX; i++) | |
8920 | i40e_write_rx_ctl(hw, I40E_VFQF_HLUT1(i, vf_id), 0); | |
8921 | } else { | |
8922 | dev_err(&pf->pdev->dev, "Cannot set RSS LUT - invalid VSI type\n"); | |
8923 | } | |
8924 | } | |
8925 | ||
41c445ff JB |
8926 | /** |
8927 | * i40e_set_features - set the netdev feature flags | |
8928 | * @netdev: ptr to the netdev being adjusted | |
8929 | * @features: the feature set that the stack is suggesting | |
373149fc | 8930 | * Note: expects to be called while under rtnl_lock() |
41c445ff JB |
8931 | **/ |
8932 | static int i40e_set_features(struct net_device *netdev, | |
8933 | netdev_features_t features) | |
8934 | { | |
8935 | struct i40e_netdev_priv *np = netdev_priv(netdev); | |
8936 | struct i40e_vsi *vsi = np->vsi; | |
7c3c288b ASJ |
8937 | struct i40e_pf *pf = vsi->back; |
8938 | bool need_reset; | |
41c445ff | 8939 | |
d8ec9864 AB |
8940 | if (features & NETIF_F_RXHASH && !(netdev->features & NETIF_F_RXHASH)) |
8941 | i40e_pf_config_rss(pf); | |
8942 | else if (!(features & NETIF_F_RXHASH) && | |
8943 | netdev->features & NETIF_F_RXHASH) | |
8944 | i40e_clear_rss_lut(vsi); | |
8945 | ||
41c445ff JB |
8946 | if (features & NETIF_F_HW_VLAN_CTAG_RX) |
8947 | i40e_vlan_stripping_enable(vsi); | |
8948 | else | |
8949 | i40e_vlan_stripping_disable(vsi); | |
8950 | ||
7c3c288b ASJ |
8951 | need_reset = i40e_set_ntuple(pf, features); |
8952 | ||
8953 | if (need_reset) | |
373149fc | 8954 | i40e_do_reset(pf, BIT_ULL(__I40E_PF_RESET_REQUESTED), true); |
7c3c288b | 8955 | |
41c445ff JB |
8956 | return 0; |
8957 | } | |
8958 | ||
a1c9a9d9 | 8959 | /** |
6a899024 | 8960 | * i40e_get_udp_port_idx - Lookup a possibly offloaded for Rx UDP port |
a1c9a9d9 JK |
8961 | * @pf: board private structure |
8962 | * @port: The UDP port to look up | |
8963 | * | |
8964 | * Returns the index number or I40E_MAX_PF_UDP_OFFLOAD_PORTS if port not found | |
8965 | **/ | |
fe0b0cd9 | 8966 | static u8 i40e_get_udp_port_idx(struct i40e_pf *pf, u16 port) |
a1c9a9d9 JK |
8967 | { |
8968 | u8 i; | |
8969 | ||
8970 | for (i = 0; i < I40E_MAX_PF_UDP_OFFLOAD_PORTS; i++) { | |
27826fd5 | 8971 | if (pf->udp_ports[i].port == port) |
a1c9a9d9 JK |
8972 | return i; |
8973 | } | |
8974 | ||
8975 | return i; | |
8976 | } | |
8977 | ||
8978 | /** | |
06a5f7f1 | 8979 | * i40e_udp_tunnel_add - Get notifications about UDP tunnel ports that come up |
a1c9a9d9 | 8980 | * @netdev: This physical port's netdev |
06a5f7f1 | 8981 | * @ti: Tunnel endpoint information |
a1c9a9d9 | 8982 | **/ |
06a5f7f1 AD |
8983 | static void i40e_udp_tunnel_add(struct net_device *netdev, |
8984 | struct udp_tunnel_info *ti) | |
a1c9a9d9 JK |
8985 | { |
8986 | struct i40e_netdev_priv *np = netdev_priv(netdev); | |
8987 | struct i40e_vsi *vsi = np->vsi; | |
8988 | struct i40e_pf *pf = vsi->back; | |
fe0b0cd9 | 8989 | u16 port = ntohs(ti->port); |
a1c9a9d9 JK |
8990 | u8 next_idx; |
8991 | u8 idx; | |
8992 | ||
6a899024 | 8993 | idx = i40e_get_udp_port_idx(pf, port); |
a1c9a9d9 JK |
8994 | |
8995 | /* Check if port already exists */ | |
8996 | if (idx < I40E_MAX_PF_UDP_OFFLOAD_PORTS) { | |
fe0b0cd9 | 8997 | netdev_info(netdev, "port %d already offloaded\n", port); |
a1c9a9d9 JK |
8998 | return; |
8999 | } | |
9000 | ||
9001 | /* Now check if there is space to add the new port */ | |
6a899024 | 9002 | next_idx = i40e_get_udp_port_idx(pf, 0); |
a1c9a9d9 JK |
9003 | |
9004 | if (next_idx == I40E_MAX_PF_UDP_OFFLOAD_PORTS) { | |
06a5f7f1 | 9005 | netdev_info(netdev, "maximum number of offloaded UDP ports reached, not adding port %d\n", |
fe0b0cd9 | 9006 | port); |
6a899024 SA |
9007 | return; |
9008 | } | |
9009 | ||
06a5f7f1 AD |
9010 | switch (ti->type) { |
9011 | case UDP_TUNNEL_TYPE_VXLAN: | |
9012 | pf->udp_ports[next_idx].type = I40E_AQC_TUNNEL_TYPE_VXLAN; | |
9013 | break; | |
9014 | case UDP_TUNNEL_TYPE_GENEVE: | |
9015 | if (!(pf->flags & I40E_FLAG_GENEVE_OFFLOAD_CAPABLE)) | |
9016 | return; | |
9017 | pf->udp_ports[next_idx].type = I40E_AQC_TUNNEL_TYPE_NGE; | |
9018 | break; | |
9019 | default: | |
6a899024 SA |
9020 | return; |
9021 | } | |
9022 | ||
9023 | /* New port: add it and mark its index in the bitmap */ | |
27826fd5 | 9024 | pf->udp_ports[next_idx].port = port; |
6a899024 SA |
9025 | pf->pending_udp_bitmap |= BIT_ULL(next_idx); |
9026 | pf->flags |= I40E_FLAG_UDP_FILTER_SYNC; | |
a1c9a9d9 JK |
9027 | } |
9028 | ||
6a899024 | 9029 | /** |
06a5f7f1 | 9030 | * i40e_udp_tunnel_del - Get notifications about UDP tunnel ports that go away |
6a899024 | 9031 | * @netdev: This physical port's netdev |
06a5f7f1 | 9032 | * @ti: Tunnel endpoint information |
6a899024 | 9033 | **/ |
06a5f7f1 AD |
9034 | static void i40e_udp_tunnel_del(struct net_device *netdev, |
9035 | struct udp_tunnel_info *ti) | |
6a899024 | 9036 | { |
6a899024 SA |
9037 | struct i40e_netdev_priv *np = netdev_priv(netdev); |
9038 | struct i40e_vsi *vsi = np->vsi; | |
9039 | struct i40e_pf *pf = vsi->back; | |
fe0b0cd9 | 9040 | u16 port = ntohs(ti->port); |
6a899024 SA |
9041 | u8 idx; |
9042 | ||
6a899024 SA |
9043 | idx = i40e_get_udp_port_idx(pf, port); |
9044 | ||
9045 | /* Check if port already exists */ | |
06a5f7f1 AD |
9046 | if (idx >= I40E_MAX_PF_UDP_OFFLOAD_PORTS) |
9047 | goto not_found; | |
6a899024 | 9048 | |
06a5f7f1 AD |
9049 | switch (ti->type) { |
9050 | case UDP_TUNNEL_TYPE_VXLAN: | |
9051 | if (pf->udp_ports[idx].type != I40E_AQC_TUNNEL_TYPE_VXLAN) | |
9052 | goto not_found; | |
9053 | break; | |
9054 | case UDP_TUNNEL_TYPE_GENEVE: | |
9055 | if (pf->udp_ports[idx].type != I40E_AQC_TUNNEL_TYPE_NGE) | |
9056 | goto not_found; | |
9057 | break; | |
9058 | default: | |
9059 | goto not_found; | |
6a899024 | 9060 | } |
06a5f7f1 AD |
9061 | |
9062 | /* if port exists, set it to 0 (mark for deletion) | |
9063 | * and make it pending | |
9064 | */ | |
27826fd5 | 9065 | pf->udp_ports[idx].port = 0; |
06a5f7f1 AD |
9066 | pf->pending_udp_bitmap |= BIT_ULL(idx); |
9067 | pf->flags |= I40E_FLAG_UDP_FILTER_SYNC; | |
9068 | ||
9069 | return; | |
9070 | not_found: | |
9071 | netdev_warn(netdev, "UDP port %d was not found, not deleting\n", | |
fe0b0cd9 | 9072 | port); |
6a899024 SA |
9073 | } |
9074 | ||
1f224ad2 | 9075 | static int i40e_get_phys_port_id(struct net_device *netdev, |
02637fce | 9076 | struct netdev_phys_item_id *ppid) |
1f224ad2 NP |
9077 | { |
9078 | struct i40e_netdev_priv *np = netdev_priv(netdev); | |
9079 | struct i40e_pf *pf = np->vsi->back; | |
9080 | struct i40e_hw *hw = &pf->hw; | |
9081 | ||
9082 | if (!(pf->flags & I40E_FLAG_PORT_ID_VALID)) | |
9083 | return -EOPNOTSUPP; | |
9084 | ||
9085 | ppid->id_len = min_t(int, sizeof(hw->mac.port_addr), sizeof(ppid->id)); | |
9086 | memcpy(ppid->id, hw->mac.port_addr, ppid->id_len); | |
9087 | ||
9088 | return 0; | |
9089 | } | |
9090 | ||
2f90ade6 JB |
9091 | /** |
9092 | * i40e_ndo_fdb_add - add an entry to the hardware database | |
9093 | * @ndm: the input from the stack | |
9094 | * @tb: pointer to array of nladdr (unused) | |
9095 | * @dev: the net device pointer | |
9096 | * @addr: the MAC address entry being added | |
9097 | * @flags: instructions from stack about fdb operation | |
9098 | */ | |
4ba0dea5 GR |
9099 | static int i40e_ndo_fdb_add(struct ndmsg *ndm, struct nlattr *tb[], |
9100 | struct net_device *dev, | |
f6f6424b | 9101 | const unsigned char *addr, u16 vid, |
4ba0dea5 | 9102 | u16 flags) |
4ba0dea5 GR |
9103 | { |
9104 | struct i40e_netdev_priv *np = netdev_priv(dev); | |
9105 | struct i40e_pf *pf = np->vsi->back; | |
9106 | int err = 0; | |
9107 | ||
9108 | if (!(pf->flags & I40E_FLAG_SRIOV_ENABLED)) | |
9109 | return -EOPNOTSUPP; | |
9110 | ||
65891fea OG |
9111 | if (vid) { |
9112 | pr_info("%s: vlans aren't supported yet for dev_uc|mc_add()\n", dev->name); | |
9113 | return -EINVAL; | |
9114 | } | |
9115 | ||
4ba0dea5 GR |
9116 | /* Hardware does not support aging addresses so if a |
9117 | * ndm_state is given only allow permanent addresses | |
9118 | */ | |
9119 | if (ndm->ndm_state && !(ndm->ndm_state & NUD_PERMANENT)) { | |
9120 | netdev_info(dev, "FDB only supports static addresses\n"); | |
9121 | return -EINVAL; | |
9122 | } | |
9123 | ||
9124 | if (is_unicast_ether_addr(addr) || is_link_local_ether_addr(addr)) | |
9125 | err = dev_uc_add_excl(dev, addr); | |
9126 | else if (is_multicast_ether_addr(addr)) | |
9127 | err = dev_mc_add_excl(dev, addr); | |
9128 | else | |
9129 | err = -EINVAL; | |
9130 | ||
9131 | /* Only return duplicate errors if NLM_F_EXCL is set */ | |
9132 | if (err == -EEXIST && !(flags & NLM_F_EXCL)) | |
9133 | err = 0; | |
9134 | ||
9135 | return err; | |
9136 | } | |
9137 | ||
51616018 NP |
9138 | /** |
9139 | * i40e_ndo_bridge_setlink - Set the hardware bridge mode | |
9140 | * @dev: the netdev being configured | |
9141 | * @nlh: RTNL message | |
9142 | * | |
9143 | * Inserts a new hardware bridge if not already created and | |
9144 | * enables the bridging mode requested (VEB or VEPA). If the | |
9145 | * hardware bridge has already been inserted and the request | |
9146 | * is to change the mode then that requires a PF reset to | |
9147 | * allow rebuild of the components with required hardware | |
9148 | * bridge mode enabled. | |
373149fc MS |
9149 | * |
9150 | * Note: expects to be called while under rtnl_lock() | |
51616018 NP |
9151 | **/ |
9152 | static int i40e_ndo_bridge_setlink(struct net_device *dev, | |
9df70b66 CW |
9153 | struct nlmsghdr *nlh, |
9154 | u16 flags) | |
51616018 NP |
9155 | { |
9156 | struct i40e_netdev_priv *np = netdev_priv(dev); | |
9157 | struct i40e_vsi *vsi = np->vsi; | |
9158 | struct i40e_pf *pf = vsi->back; | |
9159 | struct i40e_veb *veb = NULL; | |
9160 | struct nlattr *attr, *br_spec; | |
9161 | int i, rem; | |
9162 | ||
9163 | /* Only for PF VSI for now */ | |
9164 | if (vsi->seid != pf->vsi[pf->lan_vsi]->seid) | |
9165 | return -EOPNOTSUPP; | |
9166 | ||
9167 | /* Find the HW bridge for PF VSI */ | |
9168 | for (i = 0; i < I40E_MAX_VEB && !veb; i++) { | |
9169 | if (pf->veb[i] && pf->veb[i]->seid == vsi->uplink_seid) | |
9170 | veb = pf->veb[i]; | |
9171 | } | |
9172 | ||
9173 | br_spec = nlmsg_find_attr(nlh, sizeof(struct ifinfomsg), IFLA_AF_SPEC); | |
9174 | ||
9175 | nla_for_each_nested(attr, br_spec, rem) { | |
9176 | __u16 mode; | |
9177 | ||
9178 | if (nla_type(attr) != IFLA_BRIDGE_MODE) | |
9179 | continue; | |
9180 | ||
9181 | mode = nla_get_u16(attr); | |
9182 | if ((mode != BRIDGE_MODE_VEPA) && | |
9183 | (mode != BRIDGE_MODE_VEB)) | |
9184 | return -EINVAL; | |
9185 | ||
9186 | /* Insert a new HW bridge */ | |
9187 | if (!veb) { | |
9188 | veb = i40e_veb_setup(pf, 0, vsi->uplink_seid, vsi->seid, | |
9189 | vsi->tc_config.enabled_tc); | |
9190 | if (veb) { | |
9191 | veb->bridge_mode = mode; | |
9192 | i40e_config_bridge_mode(veb); | |
9193 | } else { | |
9194 | /* No Bridge HW offload available */ | |
9195 | return -ENOENT; | |
9196 | } | |
9197 | break; | |
9198 | } else if (mode != veb->bridge_mode) { | |
9199 | /* Existing HW bridge but different mode needs reset */ | |
9200 | veb->bridge_mode = mode; | |
fc60861e ASJ |
9201 | /* TODO: If no VFs or VMDq VSIs, disallow VEB mode */ |
9202 | if (mode == BRIDGE_MODE_VEB) | |
9203 | pf->flags |= I40E_FLAG_VEB_MODE_ENABLED; | |
9204 | else | |
9205 | pf->flags &= ~I40E_FLAG_VEB_MODE_ENABLED; | |
373149fc MS |
9206 | i40e_do_reset(pf, BIT_ULL(__I40E_PF_RESET_REQUESTED), |
9207 | true); | |
51616018 NP |
9208 | break; |
9209 | } | |
9210 | } | |
9211 | ||
9212 | return 0; | |
9213 | } | |
9214 | ||
9215 | /** | |
9216 | * i40e_ndo_bridge_getlink - Get the hardware bridge mode | |
9217 | * @skb: skb buff | |
9218 | * @pid: process id | |
9219 | * @seq: RTNL message seq # | |
9220 | * @dev: the netdev being configured | |
9221 | * @filter_mask: unused | |
d4b2f9fe | 9222 | * @nlflags: netlink flags passed in |
51616018 NP |
9223 | * |
9224 | * Return the mode in which the hardware bridge is operating in | |
9225 | * i.e VEB or VEPA. | |
9226 | **/ | |
51616018 NP |
9227 | static int i40e_ndo_bridge_getlink(struct sk_buff *skb, u32 pid, u32 seq, |
9228 | struct net_device *dev, | |
9f4ffc44 CW |
9229 | u32 __always_unused filter_mask, |
9230 | int nlflags) | |
51616018 NP |
9231 | { |
9232 | struct i40e_netdev_priv *np = netdev_priv(dev); | |
9233 | struct i40e_vsi *vsi = np->vsi; | |
9234 | struct i40e_pf *pf = vsi->back; | |
9235 | struct i40e_veb *veb = NULL; | |
9236 | int i; | |
9237 | ||
9238 | /* Only for PF VSI for now */ | |
9239 | if (vsi->seid != pf->vsi[pf->lan_vsi]->seid) | |
9240 | return -EOPNOTSUPP; | |
9241 | ||
9242 | /* Find the HW bridge for the PF VSI */ | |
9243 | for (i = 0; i < I40E_MAX_VEB && !veb; i++) { | |
9244 | if (pf->veb[i] && pf->veb[i]->seid == vsi->uplink_seid) | |
9245 | veb = pf->veb[i]; | |
9246 | } | |
9247 | ||
9248 | if (!veb) | |
9249 | return 0; | |
9250 | ||
46c264da | 9251 | return ndo_dflt_bridge_getlink(skb, pid, seq, dev, veb->bridge_mode, |
599b076d | 9252 | 0, 0, nlflags, filter_mask, NULL); |
51616018 | 9253 | } |
51616018 | 9254 | |
f44a75e2 JS |
9255 | /** |
9256 | * i40e_features_check - Validate encapsulated packet conforms to limits | |
9257 | * @skb: skb buff | |
2bc11c63 | 9258 | * @dev: This physical port's netdev |
f44a75e2 JS |
9259 | * @features: Offload features that the stack believes apply |
9260 | **/ | |
9261 | static netdev_features_t i40e_features_check(struct sk_buff *skb, | |
9262 | struct net_device *dev, | |
9263 | netdev_features_t features) | |
9264 | { | |
f114dca2 AD |
9265 | size_t len; |
9266 | ||
9267 | /* No point in doing any of this if neither checksum nor GSO are | |
9268 | * being requested for this frame. We can rule out both by just | |
9269 | * checking for CHECKSUM_PARTIAL | |
9270 | */ | |
9271 | if (skb->ip_summed != CHECKSUM_PARTIAL) | |
9272 | return features; | |
9273 | ||
9274 | /* We cannot support GSO if the MSS is going to be less than | |
9275 | * 64 bytes. If it is then we need to drop support for GSO. | |
9276 | */ | |
9277 | if (skb_is_gso(skb) && (skb_shinfo(skb)->gso_size < 64)) | |
9278 | features &= ~NETIF_F_GSO_MASK; | |
9279 | ||
9280 | /* MACLEN can support at most 63 words */ | |
9281 | len = skb_network_header(skb) - skb->data; | |
9282 | if (len & ~(63 * 2)) | |
9283 | goto out_err; | |
9284 | ||
9285 | /* IPLEN and EIPLEN can support at most 127 dwords */ | |
9286 | len = skb_transport_header(skb) - skb_network_header(skb); | |
9287 | if (len & ~(127 * 4)) | |
9288 | goto out_err; | |
9289 | ||
9290 | if (skb->encapsulation) { | |
9291 | /* L4TUNLEN can support 127 words */ | |
9292 | len = skb_inner_network_header(skb) - skb_transport_header(skb); | |
9293 | if (len & ~(127 * 2)) | |
9294 | goto out_err; | |
9295 | ||
9296 | /* IPLEN can support at most 127 dwords */ | |
9297 | len = skb_inner_transport_header(skb) - | |
9298 | skb_inner_network_header(skb); | |
9299 | if (len & ~(127 * 4)) | |
9300 | goto out_err; | |
9301 | } | |
9302 | ||
9303 | /* No need to validate L4LEN as TCP is the only protocol with a | |
9304 | * a flexible value and we support all possible values supported | |
9305 | * by TCP, which is at most 15 dwords | |
9306 | */ | |
f44a75e2 JS |
9307 | |
9308 | return features; | |
f114dca2 AD |
9309 | out_err: |
9310 | return features & ~(NETIF_F_CSUM_MASK | NETIF_F_GSO_MASK); | |
f44a75e2 JS |
9311 | } |
9312 | ||
37a2973a | 9313 | static const struct net_device_ops i40e_netdev_ops = { |
41c445ff JB |
9314 | .ndo_open = i40e_open, |
9315 | .ndo_stop = i40e_close, | |
9316 | .ndo_start_xmit = i40e_lan_xmit_frame, | |
9317 | .ndo_get_stats64 = i40e_get_netdev_stats_struct, | |
9318 | .ndo_set_rx_mode = i40e_set_rx_mode, | |
9319 | .ndo_validate_addr = eth_validate_addr, | |
9320 | .ndo_set_mac_address = i40e_set_mac, | |
9321 | .ndo_change_mtu = i40e_change_mtu, | |
beb0dff1 | 9322 | .ndo_do_ioctl = i40e_ioctl, |
41c445ff JB |
9323 | .ndo_tx_timeout = i40e_tx_timeout, |
9324 | .ndo_vlan_rx_add_vid = i40e_vlan_rx_add_vid, | |
9325 | .ndo_vlan_rx_kill_vid = i40e_vlan_rx_kill_vid, | |
9326 | #ifdef CONFIG_NET_POLL_CONTROLLER | |
9327 | .ndo_poll_controller = i40e_netpoll, | |
9328 | #endif | |
e4c6734e | 9329 | .ndo_setup_tc = __i40e_setup_tc, |
41c445ff JB |
9330 | .ndo_set_features = i40e_set_features, |
9331 | .ndo_set_vf_mac = i40e_ndo_set_vf_mac, | |
9332 | .ndo_set_vf_vlan = i40e_ndo_set_vf_port_vlan, | |
ed616689 | 9333 | .ndo_set_vf_rate = i40e_ndo_set_vf_bw, |
41c445ff | 9334 | .ndo_get_vf_config = i40e_ndo_get_vf_config, |
588aefa0 | 9335 | .ndo_set_vf_link_state = i40e_ndo_set_vf_link_state, |
e6d9004d | 9336 | .ndo_set_vf_spoofchk = i40e_ndo_set_vf_spoofchk, |
c3bbbd20 | 9337 | .ndo_set_vf_trust = i40e_ndo_set_vf_trust, |
06a5f7f1 AD |
9338 | .ndo_udp_tunnel_add = i40e_udp_tunnel_add, |
9339 | .ndo_udp_tunnel_del = i40e_udp_tunnel_del, | |
1f224ad2 | 9340 | .ndo_get_phys_port_id = i40e_get_phys_port_id, |
4ba0dea5 | 9341 | .ndo_fdb_add = i40e_ndo_fdb_add, |
f44a75e2 | 9342 | .ndo_features_check = i40e_features_check, |
51616018 NP |
9343 | .ndo_bridge_getlink = i40e_ndo_bridge_getlink, |
9344 | .ndo_bridge_setlink = i40e_ndo_bridge_setlink, | |
41c445ff JB |
9345 | }; |
9346 | ||
9347 | /** | |
9348 | * i40e_config_netdev - Setup the netdev flags | |
9349 | * @vsi: the VSI being configured | |
9350 | * | |
9351 | * Returns 0 on success, negative value on failure | |
9352 | **/ | |
9353 | static int i40e_config_netdev(struct i40e_vsi *vsi) | |
9354 | { | |
9355 | struct i40e_pf *pf = vsi->back; | |
9356 | struct i40e_hw *hw = &pf->hw; | |
9357 | struct i40e_netdev_priv *np; | |
9358 | struct net_device *netdev; | |
435c084a | 9359 | u8 broadcast[ETH_ALEN]; |
41c445ff JB |
9360 | u8 mac_addr[ETH_ALEN]; |
9361 | int etherdev_size; | |
bacd75cf PB |
9362 | netdev_features_t hw_enc_features; |
9363 | netdev_features_t hw_features; | |
41c445ff JB |
9364 | |
9365 | etherdev_size = sizeof(struct i40e_netdev_priv); | |
f8ff1464 | 9366 | netdev = alloc_etherdev_mq(etherdev_size, vsi->alloc_queue_pairs); |
41c445ff JB |
9367 | if (!netdev) |
9368 | return -ENOMEM; | |
9369 | ||
9370 | vsi->netdev = netdev; | |
9371 | np = netdev_priv(netdev); | |
9372 | np->vsi = vsi; | |
9373 | ||
bacd75cf PB |
9374 | hw_enc_features = NETIF_F_SG | |
9375 | NETIF_F_IP_CSUM | | |
9376 | NETIF_F_IPV6_CSUM | | |
9377 | NETIF_F_HIGHDMA | | |
9378 | NETIF_F_SOFT_FEATURES | | |
9379 | NETIF_F_TSO | | |
9380 | NETIF_F_TSO_ECN | | |
9381 | NETIF_F_TSO6 | | |
9382 | NETIF_F_GSO_GRE | | |
9383 | NETIF_F_GSO_GRE_CSUM | | |
9384 | NETIF_F_GSO_PARTIAL | | |
9385 | NETIF_F_GSO_UDP_TUNNEL | | |
9386 | NETIF_F_GSO_UDP_TUNNEL_CSUM | | |
9387 | NETIF_F_SCTP_CRC | | |
9388 | NETIF_F_RXHASH | | |
9389 | NETIF_F_RXCSUM | | |
9390 | 0; | |
41c445ff | 9391 | |
b0fe3306 | 9392 | if (!(pf->flags & I40E_FLAG_OUTER_UDP_CSUM_CAPABLE)) |
1c7b4a23 AD |
9393 | netdev->gso_partial_features |= NETIF_F_GSO_UDP_TUNNEL_CSUM; |
9394 | ||
9395 | netdev->gso_partial_features |= NETIF_F_GSO_GRE_CSUM; | |
b0fe3306 | 9396 | |
bacd75cf PB |
9397 | netdev->hw_enc_features |= hw_enc_features; |
9398 | ||
b0fe3306 | 9399 | /* record features VLANs can make use of */ |
bacd75cf | 9400 | netdev->vlan_features |= hw_enc_features | NETIF_F_TSO_MANGLEID; |
41c445ff | 9401 | |
2e86a0b6 | 9402 | if (!(pf->flags & I40E_FLAG_MFP_ENABLED)) |
b0fe3306 | 9403 | netdev->hw_features |= NETIF_F_NTUPLE; |
bacd75cf PB |
9404 | hw_features = hw_enc_features | |
9405 | NETIF_F_HW_VLAN_CTAG_TX | | |
9406 | NETIF_F_HW_VLAN_CTAG_RX; | |
b0fe3306 | 9407 | |
bacd75cf | 9408 | netdev->hw_features |= hw_features; |
2e86a0b6 | 9409 | |
bacd75cf | 9410 | netdev->features |= hw_features | NETIF_F_HW_VLAN_CTAG_FILTER; |
1c7b4a23 | 9411 | netdev->hw_enc_features |= NETIF_F_TSO_MANGLEID; |
41c445ff JB |
9412 | |
9413 | if (vsi->type == I40E_VSI_MAIN) { | |
9414 | SET_NETDEV_DEV(netdev, &pf->pdev->dev); | |
9a173901 | 9415 | ether_addr_copy(mac_addr, hw->mac.perm_addr); |
41c4c2b5 JK |
9416 | /* The following steps are necessary for two reasons. First, |
9417 | * some older NVM configurations load a default MAC-VLAN | |
9418 | * filter that will accept any tagged packet, and we want to | |
9419 | * replace this with a normal filter. Additionally, it is | |
9420 | * possible our MAC address was provided by the platform using | |
9421 | * Open Firmware or similar. | |
9422 | * | |
9423 | * Thus, we need to remove the default filter and install one | |
9424 | * specific to the MAC address. | |
1596b5dd JK |
9425 | */ |
9426 | i40e_rm_default_mac_filter(vsi, mac_addr); | |
278e7d0b | 9427 | spin_lock_bh(&vsi->mac_filter_hash_lock); |
9569a9a4 | 9428 | i40e_add_mac_filter(vsi, mac_addr); |
278e7d0b | 9429 | spin_unlock_bh(&vsi->mac_filter_hash_lock); |
41c445ff JB |
9430 | } else { |
9431 | /* relate the VSI_VMDQ name to the VSI_MAIN name */ | |
9432 | snprintf(netdev->name, IFNAMSIZ, "%sv%%d", | |
9433 | pf->vsi[pf->lan_vsi]->netdev->name); | |
9434 | random_ether_addr(mac_addr); | |
21659035 | 9435 | |
278e7d0b | 9436 | spin_lock_bh(&vsi->mac_filter_hash_lock); |
9569a9a4 | 9437 | i40e_add_mac_filter(vsi, mac_addr); |
278e7d0b | 9438 | spin_unlock_bh(&vsi->mac_filter_hash_lock); |
41c445ff | 9439 | } |
21659035 | 9440 | |
435c084a JK |
9441 | /* Add the broadcast filter so that we initially will receive |
9442 | * broadcast packets. Note that when a new VLAN is first added the | |
9443 | * driver will convert all filters marked I40E_VLAN_ANY into VLAN | |
9444 | * specific filters as part of transitioning into "vlan" operation. | |
9445 | * When more VLANs are added, the driver will copy each existing MAC | |
9446 | * filter and add it for the new VLAN. | |
9447 | * | |
9448 | * Broadcast filters are handled specially by | |
9449 | * i40e_sync_filters_subtask, as the driver must to set the broadcast | |
9450 | * promiscuous bit instead of adding this directly as a MAC/VLAN | |
9451 | * filter. The subtask will update the correct broadcast promiscuous | |
9452 | * bits as VLANs become active or inactive. | |
9453 | */ | |
9454 | eth_broadcast_addr(broadcast); | |
9455 | spin_lock_bh(&vsi->mac_filter_hash_lock); | |
9569a9a4 | 9456 | i40e_add_mac_filter(vsi, broadcast); |
435c084a JK |
9457 | spin_unlock_bh(&vsi->mac_filter_hash_lock); |
9458 | ||
9a173901 GR |
9459 | ether_addr_copy(netdev->dev_addr, mac_addr); |
9460 | ether_addr_copy(netdev->perm_addr, mac_addr); | |
b0fe3306 | 9461 | |
41c445ff JB |
9462 | netdev->priv_flags |= IFF_UNICAST_FLT; |
9463 | netdev->priv_flags |= IFF_SUPP_NOFCS; | |
9464 | /* Setup netdev TC information */ | |
9465 | i40e_vsi_config_netdev_tc(vsi, vsi->tc_config.enabled_tc); | |
9466 | ||
9467 | netdev->netdev_ops = &i40e_netdev_ops; | |
9468 | netdev->watchdog_timeo = 5 * HZ; | |
9469 | i40e_set_ethtool_ops(netdev); | |
9470 | ||
91c527a5 JW |
9471 | /* MTU range: 68 - 9706 */ |
9472 | netdev->min_mtu = ETH_MIN_MTU; | |
9473 | netdev->max_mtu = I40E_MAX_RXBUFFER - | |
9474 | (ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN); | |
9475 | ||
41c445ff JB |
9476 | return 0; |
9477 | } | |
9478 | ||
9479 | /** | |
9480 | * i40e_vsi_delete - Delete a VSI from the switch | |
9481 | * @vsi: the VSI being removed | |
9482 | * | |
9483 | * Returns 0 on success, negative value on failure | |
9484 | **/ | |
9485 | static void i40e_vsi_delete(struct i40e_vsi *vsi) | |
9486 | { | |
9487 | /* remove default VSI is not allowed */ | |
9488 | if (vsi == vsi->back->vsi[vsi->back->lan_vsi]) | |
9489 | return; | |
9490 | ||
41c445ff | 9491 | i40e_aq_delete_element(&vsi->back->hw, vsi->seid, NULL); |
41c445ff JB |
9492 | } |
9493 | ||
51616018 NP |
9494 | /** |
9495 | * i40e_is_vsi_uplink_mode_veb - Check if the VSI's uplink bridge mode is VEB | |
9496 | * @vsi: the VSI being queried | |
9497 | * | |
9498 | * Returns 1 if HW bridge mode is VEB and return 0 in case of VEPA mode | |
9499 | **/ | |
9500 | int i40e_is_vsi_uplink_mode_veb(struct i40e_vsi *vsi) | |
9501 | { | |
9502 | struct i40e_veb *veb; | |
9503 | struct i40e_pf *pf = vsi->back; | |
9504 | ||
9505 | /* Uplink is not a bridge so default to VEB */ | |
9506 | if (vsi->veb_idx == I40E_NO_VEB) | |
9507 | return 1; | |
9508 | ||
9509 | veb = pf->veb[vsi->veb_idx]; | |
09603eaa AA |
9510 | if (!veb) { |
9511 | dev_info(&pf->pdev->dev, | |
9512 | "There is no veb associated with the bridge\n"); | |
9513 | return -ENOENT; | |
9514 | } | |
9515 | ||
51616018 | 9516 | /* Uplink is a bridge in VEPA mode */ |
09603eaa | 9517 | if (veb->bridge_mode & BRIDGE_MODE_VEPA) { |
51616018 | 9518 | return 0; |
09603eaa AA |
9519 | } else { |
9520 | /* Uplink is a bridge in VEB mode */ | |
9521 | return 1; | |
9522 | } | |
51616018 | 9523 | |
09603eaa AA |
9524 | /* VEPA is now default bridge, so return 0 */ |
9525 | return 0; | |
51616018 NP |
9526 | } |
9527 | ||
41c445ff JB |
9528 | /** |
9529 | * i40e_add_vsi - Add a VSI to the switch | |
9530 | * @vsi: the VSI being configured | |
9531 | * | |
9532 | * This initializes a VSI context depending on the VSI type to be added and | |
9533 | * passes it down to the add_vsi aq command. | |
9534 | **/ | |
9535 | static int i40e_add_vsi(struct i40e_vsi *vsi) | |
9536 | { | |
9537 | int ret = -ENODEV; | |
41c445ff JB |
9538 | struct i40e_pf *pf = vsi->back; |
9539 | struct i40e_hw *hw = &pf->hw; | |
9540 | struct i40e_vsi_context ctxt; | |
278e7d0b JK |
9541 | struct i40e_mac_filter *f; |
9542 | struct hlist_node *h; | |
9543 | int bkt; | |
21659035 | 9544 | |
41c445ff JB |
9545 | u8 enabled_tc = 0x1; /* TC0 enabled */ |
9546 | int f_count = 0; | |
9547 | ||
9548 | memset(&ctxt, 0, sizeof(ctxt)); | |
9549 | switch (vsi->type) { | |
9550 | case I40E_VSI_MAIN: | |
9551 | /* The PF's main VSI is already setup as part of the | |
9552 | * device initialization, so we'll not bother with | |
9553 | * the add_vsi call, but we will retrieve the current | |
9554 | * VSI context. | |
9555 | */ | |
9556 | ctxt.seid = pf->main_vsi_seid; | |
9557 | ctxt.pf_num = pf->hw.pf_id; | |
9558 | ctxt.vf_num = 0; | |
9559 | ret = i40e_aq_get_vsi_params(&pf->hw, &ctxt, NULL); | |
9560 | ctxt.flags = I40E_AQ_VSI_TYPE_PF; | |
9561 | if (ret) { | |
9562 | dev_info(&pf->pdev->dev, | |
f1c7e72e SN |
9563 | "couldn't get PF vsi config, err %s aq_err %s\n", |
9564 | i40e_stat_str(&pf->hw, ret), | |
9565 | i40e_aq_str(&pf->hw, | |
9566 | pf->hw.aq.asq_last_status)); | |
41c445ff JB |
9567 | return -ENOENT; |
9568 | } | |
1a2f6248 | 9569 | vsi->info = ctxt.info; |
41c445ff JB |
9570 | vsi->info.valid_sections = 0; |
9571 | ||
9572 | vsi->seid = ctxt.seid; | |
9573 | vsi->id = ctxt.vsi_number; | |
9574 | ||
9575 | enabled_tc = i40e_pf_get_tc_map(pf); | |
9576 | ||
9577 | /* MFP mode setup queue map and update VSI */ | |
63d7e5a4 NP |
9578 | if ((pf->flags & I40E_FLAG_MFP_ENABLED) && |
9579 | !(pf->hw.func_caps.iscsi)) { /* NIC type PF */ | |
41c445ff JB |
9580 | memset(&ctxt, 0, sizeof(ctxt)); |
9581 | ctxt.seid = pf->main_vsi_seid; | |
9582 | ctxt.pf_num = pf->hw.pf_id; | |
9583 | ctxt.vf_num = 0; | |
9584 | i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, false); | |
9585 | ret = i40e_aq_update_vsi_params(hw, &ctxt, NULL); | |
9586 | if (ret) { | |
9587 | dev_info(&pf->pdev->dev, | |
f1c7e72e SN |
9588 | "update vsi failed, err %s aq_err %s\n", |
9589 | i40e_stat_str(&pf->hw, ret), | |
9590 | i40e_aq_str(&pf->hw, | |
9591 | pf->hw.aq.asq_last_status)); | |
41c445ff JB |
9592 | ret = -ENOENT; |
9593 | goto err; | |
9594 | } | |
9595 | /* update the local VSI info queue map */ | |
9596 | i40e_vsi_update_queue_map(vsi, &ctxt); | |
9597 | vsi->info.valid_sections = 0; | |
9598 | } else { | |
9599 | /* Default/Main VSI is only enabled for TC0 | |
9600 | * reconfigure it to enable all TCs that are | |
9601 | * available on the port in SFP mode. | |
63d7e5a4 NP |
9602 | * For MFP case the iSCSI PF would use this |
9603 | * flow to enable LAN+iSCSI TC. | |
41c445ff JB |
9604 | */ |
9605 | ret = i40e_vsi_config_tc(vsi, enabled_tc); | |
9606 | if (ret) { | |
9607 | dev_info(&pf->pdev->dev, | |
f1c7e72e SN |
9608 | "failed to configure TCs for main VSI tc_map 0x%08x, err %s aq_err %s\n", |
9609 | enabled_tc, | |
9610 | i40e_stat_str(&pf->hw, ret), | |
9611 | i40e_aq_str(&pf->hw, | |
9612 | pf->hw.aq.asq_last_status)); | |
41c445ff JB |
9613 | ret = -ENOENT; |
9614 | } | |
9615 | } | |
9616 | break; | |
9617 | ||
9618 | case I40E_VSI_FDIR: | |
cbf61325 ASJ |
9619 | ctxt.pf_num = hw->pf_id; |
9620 | ctxt.vf_num = 0; | |
9621 | ctxt.uplink_seid = vsi->uplink_seid; | |
2b18e591 | 9622 | ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL; |
cbf61325 | 9623 | ctxt.flags = I40E_AQ_VSI_TYPE_PF; |
fc60861e ASJ |
9624 | if ((pf->flags & I40E_FLAG_VEB_MODE_ENABLED) && |
9625 | (i40e_is_vsi_uplink_mode_veb(vsi))) { | |
51616018 | 9626 | ctxt.info.valid_sections |= |
fc60861e | 9627 | cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID); |
51616018 | 9628 | ctxt.info.switch_id = |
fc60861e | 9629 | cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB); |
51616018 | 9630 | } |
41c445ff | 9631 | i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true); |
41c445ff JB |
9632 | break; |
9633 | ||
9634 | case I40E_VSI_VMDQ2: | |
9635 | ctxt.pf_num = hw->pf_id; | |
9636 | ctxt.vf_num = 0; | |
9637 | ctxt.uplink_seid = vsi->uplink_seid; | |
2b18e591 | 9638 | ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL; |
41c445ff JB |
9639 | ctxt.flags = I40E_AQ_VSI_TYPE_VMDQ2; |
9640 | ||
41c445ff JB |
9641 | /* This VSI is connected to VEB so the switch_id |
9642 | * should be set to zero by default. | |
9643 | */ | |
51616018 NP |
9644 | if (i40e_is_vsi_uplink_mode_veb(vsi)) { |
9645 | ctxt.info.valid_sections |= | |
9646 | cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID); | |
9647 | ctxt.info.switch_id = | |
9648 | cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB); | |
9649 | } | |
41c445ff JB |
9650 | |
9651 | /* Setup the VSI tx/rx queue map for TC0 only for now */ | |
9652 | i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true); | |
9653 | break; | |
9654 | ||
9655 | case I40E_VSI_SRIOV: | |
9656 | ctxt.pf_num = hw->pf_id; | |
9657 | ctxt.vf_num = vsi->vf_id + hw->func_caps.vf_base_id; | |
9658 | ctxt.uplink_seid = vsi->uplink_seid; | |
2b18e591 | 9659 | ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL; |
41c445ff JB |
9660 | ctxt.flags = I40E_AQ_VSI_TYPE_VF; |
9661 | ||
41c445ff JB |
9662 | /* This VSI is connected to VEB so the switch_id |
9663 | * should be set to zero by default. | |
9664 | */ | |
51616018 NP |
9665 | if (i40e_is_vsi_uplink_mode_veb(vsi)) { |
9666 | ctxt.info.valid_sections |= | |
9667 | cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID); | |
9668 | ctxt.info.switch_id = | |
9669 | cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB); | |
9670 | } | |
41c445ff | 9671 | |
e3219ce6 ASJ |
9672 | if (vsi->back->flags & I40E_FLAG_IWARP_ENABLED) { |
9673 | ctxt.info.valid_sections |= | |
9674 | cpu_to_le16(I40E_AQ_VSI_PROP_QUEUE_OPT_VALID); | |
9675 | ctxt.info.queueing_opt_flags |= | |
4b28cdba AS |
9676 | (I40E_AQ_VSI_QUE_OPT_TCP_ENA | |
9677 | I40E_AQ_VSI_QUE_OPT_RSS_LUT_VSI); | |
e3219ce6 ASJ |
9678 | } |
9679 | ||
41c445ff JB |
9680 | ctxt.info.valid_sections |= cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID); |
9681 | ctxt.info.port_vlan_flags |= I40E_AQ_VSI_PVLAN_MODE_ALL; | |
c674d125 MW |
9682 | if (pf->vf[vsi->vf_id].spoofchk) { |
9683 | ctxt.info.valid_sections |= | |
9684 | cpu_to_le16(I40E_AQ_VSI_PROP_SECURITY_VALID); | |
9685 | ctxt.info.sec_flags |= | |
9686 | (I40E_AQ_VSI_SEC_FLAG_ENABLE_VLAN_CHK | | |
9687 | I40E_AQ_VSI_SEC_FLAG_ENABLE_MAC_CHK); | |
9688 | } | |
41c445ff JB |
9689 | /* Setup the VSI tx/rx queue map for TC0 only for now */ |
9690 | i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true); | |
9691 | break; | |
9692 | ||
e3219ce6 ASJ |
9693 | case I40E_VSI_IWARP: |
9694 | /* send down message to iWARP */ | |
9695 | break; | |
9696 | ||
41c445ff JB |
9697 | default: |
9698 | return -ENODEV; | |
9699 | } | |
9700 | ||
9701 | if (vsi->type != I40E_VSI_MAIN) { | |
9702 | ret = i40e_aq_add_vsi(hw, &ctxt, NULL); | |
9703 | if (ret) { | |
9704 | dev_info(&vsi->back->pdev->dev, | |
f1c7e72e SN |
9705 | "add vsi failed, err %s aq_err %s\n", |
9706 | i40e_stat_str(&pf->hw, ret), | |
9707 | i40e_aq_str(&pf->hw, | |
9708 | pf->hw.aq.asq_last_status)); | |
41c445ff JB |
9709 | ret = -ENOENT; |
9710 | goto err; | |
9711 | } | |
1a2f6248 | 9712 | vsi->info = ctxt.info; |
41c445ff JB |
9713 | vsi->info.valid_sections = 0; |
9714 | vsi->seid = ctxt.seid; | |
9715 | vsi->id = ctxt.vsi_number; | |
9716 | } | |
9717 | ||
c3c7ea27 | 9718 | vsi->active_filters = 0; |
d19cb64b | 9719 | clear_bit(__I40E_VSI_OVERFLOW_PROMISC, &vsi->state); |
278e7d0b | 9720 | spin_lock_bh(&vsi->mac_filter_hash_lock); |
41c445ff | 9721 | /* If macvlan filters already exist, force them to get loaded */ |
278e7d0b | 9722 | hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist) { |
c3c7ea27 | 9723 | f->state = I40E_FILTER_NEW; |
41c445ff | 9724 | f_count++; |
21659035 | 9725 | } |
278e7d0b | 9726 | spin_unlock_bh(&vsi->mac_filter_hash_lock); |
30650cc5 | 9727 | |
41c445ff JB |
9728 | if (f_count) { |
9729 | vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED; | |
9730 | pf->flags |= I40E_FLAG_FILTER_SYNC; | |
9731 | } | |
9732 | ||
9733 | /* Update VSI BW information */ | |
9734 | ret = i40e_vsi_get_bw_info(vsi); | |
9735 | if (ret) { | |
9736 | dev_info(&pf->pdev->dev, | |
f1c7e72e SN |
9737 | "couldn't get vsi bw info, err %s aq_err %s\n", |
9738 | i40e_stat_str(&pf->hw, ret), | |
9739 | i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status)); | |
41c445ff JB |
9740 | /* VSI is already added so not tearing that up */ |
9741 | ret = 0; | |
9742 | } | |
9743 | ||
9744 | err: | |
9745 | return ret; | |
9746 | } | |
9747 | ||
9748 | /** | |
9749 | * i40e_vsi_release - Delete a VSI and free its resources | |
9750 | * @vsi: the VSI being removed | |
9751 | * | |
9752 | * Returns 0 on success or < 0 on error | |
9753 | **/ | |
9754 | int i40e_vsi_release(struct i40e_vsi *vsi) | |
9755 | { | |
278e7d0b JK |
9756 | struct i40e_mac_filter *f; |
9757 | struct hlist_node *h; | |
41c445ff JB |
9758 | struct i40e_veb *veb = NULL; |
9759 | struct i40e_pf *pf; | |
9760 | u16 uplink_seid; | |
278e7d0b | 9761 | int i, n, bkt; |
41c445ff JB |
9762 | |
9763 | pf = vsi->back; | |
9764 | ||
9765 | /* release of a VEB-owner or last VSI is not allowed */ | |
9766 | if (vsi->flags & I40E_VSI_FLAG_VEB_OWNER) { | |
9767 | dev_info(&pf->pdev->dev, "VSI %d has existing VEB %d\n", | |
9768 | vsi->seid, vsi->uplink_seid); | |
9769 | return -ENODEV; | |
9770 | } | |
9771 | if (vsi == pf->vsi[pf->lan_vsi] && | |
9772 | !test_bit(__I40E_DOWN, &pf->state)) { | |
9773 | dev_info(&pf->pdev->dev, "Can't remove PF VSI\n"); | |
9774 | return -ENODEV; | |
9775 | } | |
9776 | ||
9777 | uplink_seid = vsi->uplink_seid; | |
9778 | if (vsi->type != I40E_VSI_SRIOV) { | |
9779 | if (vsi->netdev_registered) { | |
9780 | vsi->netdev_registered = false; | |
9781 | if (vsi->netdev) { | |
9782 | /* results in a call to i40e_close() */ | |
9783 | unregister_netdev(vsi->netdev); | |
41c445ff JB |
9784 | } |
9785 | } else { | |
90ef8d47 | 9786 | i40e_vsi_close(vsi); |
41c445ff JB |
9787 | } |
9788 | i40e_vsi_disable_irq(vsi); | |
9789 | } | |
9790 | ||
278e7d0b | 9791 | spin_lock_bh(&vsi->mac_filter_hash_lock); |
6622f5cd JK |
9792 | |
9793 | /* clear the sync flag on all filters */ | |
9794 | if (vsi->netdev) { | |
9795 | __dev_uc_unsync(vsi->netdev, NULL); | |
9796 | __dev_mc_unsync(vsi->netdev, NULL); | |
9797 | } | |
9798 | ||
9799 | /* make sure any remaining filters are marked for deletion */ | |
278e7d0b | 9800 | hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist) |
290d2557 | 9801 | __i40e_del_filter(vsi, f); |
6622f5cd | 9802 | |
278e7d0b | 9803 | spin_unlock_bh(&vsi->mac_filter_hash_lock); |
21659035 | 9804 | |
17652c63 | 9805 | i40e_sync_vsi_filters(vsi); |
41c445ff JB |
9806 | |
9807 | i40e_vsi_delete(vsi); | |
9808 | i40e_vsi_free_q_vectors(vsi); | |
a4866597 SN |
9809 | if (vsi->netdev) { |
9810 | free_netdev(vsi->netdev); | |
9811 | vsi->netdev = NULL; | |
9812 | } | |
41c445ff JB |
9813 | i40e_vsi_clear_rings(vsi); |
9814 | i40e_vsi_clear(vsi); | |
9815 | ||
9816 | /* If this was the last thing on the VEB, except for the | |
9817 | * controlling VSI, remove the VEB, which puts the controlling | |
9818 | * VSI onto the next level down in the switch. | |
9819 | * | |
9820 | * Well, okay, there's one more exception here: don't remove | |
9821 | * the orphan VEBs yet. We'll wait for an explicit remove request | |
9822 | * from up the network stack. | |
9823 | */ | |
505682cd | 9824 | for (n = 0, i = 0; i < pf->num_alloc_vsi; i++) { |
41c445ff JB |
9825 | if (pf->vsi[i] && |
9826 | pf->vsi[i]->uplink_seid == uplink_seid && | |
9827 | (pf->vsi[i]->flags & I40E_VSI_FLAG_VEB_OWNER) == 0) { | |
9828 | n++; /* count the VSIs */ | |
9829 | } | |
9830 | } | |
9831 | for (i = 0; i < I40E_MAX_VEB; i++) { | |
9832 | if (!pf->veb[i]) | |
9833 | continue; | |
9834 | if (pf->veb[i]->uplink_seid == uplink_seid) | |
9835 | n++; /* count the VEBs */ | |
9836 | if (pf->veb[i]->seid == uplink_seid) | |
9837 | veb = pf->veb[i]; | |
9838 | } | |
9839 | if (n == 0 && veb && veb->uplink_seid != 0) | |
9840 | i40e_veb_release(veb); | |
9841 | ||
9842 | return 0; | |
9843 | } | |
9844 | ||
9845 | /** | |
9846 | * i40e_vsi_setup_vectors - Set up the q_vectors for the given VSI | |
9847 | * @vsi: ptr to the VSI | |
9848 | * | |
9849 | * This should only be called after i40e_vsi_mem_alloc() which allocates the | |
9850 | * corresponding SW VSI structure and initializes num_queue_pairs for the | |
9851 | * newly allocated VSI. | |
9852 | * | |
9853 | * Returns 0 on success or negative on failure | |
9854 | **/ | |
9855 | static int i40e_vsi_setup_vectors(struct i40e_vsi *vsi) | |
9856 | { | |
9857 | int ret = -ENOENT; | |
9858 | struct i40e_pf *pf = vsi->back; | |
9859 | ||
493fb300 | 9860 | if (vsi->q_vectors[0]) { |
41c445ff JB |
9861 | dev_info(&pf->pdev->dev, "VSI %d has existing q_vectors\n", |
9862 | vsi->seid); | |
9863 | return -EEXIST; | |
9864 | } | |
9865 | ||
9866 | if (vsi->base_vector) { | |
f29eaa3d | 9867 | dev_info(&pf->pdev->dev, "VSI %d has non-zero base vector %d\n", |
41c445ff JB |
9868 | vsi->seid, vsi->base_vector); |
9869 | return -EEXIST; | |
9870 | } | |
9871 | ||
90e04070 | 9872 | ret = i40e_vsi_alloc_q_vectors(vsi); |
41c445ff JB |
9873 | if (ret) { |
9874 | dev_info(&pf->pdev->dev, | |
9875 | "failed to allocate %d q_vector for VSI %d, ret=%d\n", | |
9876 | vsi->num_q_vectors, vsi->seid, ret); | |
9877 | vsi->num_q_vectors = 0; | |
9878 | goto vector_setup_out; | |
9879 | } | |
9880 | ||
26cdc443 ASJ |
9881 | /* In Legacy mode, we do not have to get any other vector since we |
9882 | * piggyback on the misc/ICR0 for queue interrupts. | |
9883 | */ | |
9884 | if (!(pf->flags & I40E_FLAG_MSIX_ENABLED)) | |
9885 | return ret; | |
958a3e3b SN |
9886 | if (vsi->num_q_vectors) |
9887 | vsi->base_vector = i40e_get_lump(pf, pf->irq_pile, | |
9888 | vsi->num_q_vectors, vsi->idx); | |
41c445ff JB |
9889 | if (vsi->base_vector < 0) { |
9890 | dev_info(&pf->pdev->dev, | |
049a2be8 SN |
9891 | "failed to get tracking for %d vectors for VSI %d, err=%d\n", |
9892 | vsi->num_q_vectors, vsi->seid, vsi->base_vector); | |
41c445ff JB |
9893 | i40e_vsi_free_q_vectors(vsi); |
9894 | ret = -ENOENT; | |
9895 | goto vector_setup_out; | |
9896 | } | |
9897 | ||
9898 | vector_setup_out: | |
9899 | return ret; | |
9900 | } | |
9901 | ||
bc7d338f ASJ |
9902 | /** |
9903 | * i40e_vsi_reinit_setup - return and reallocate resources for a VSI | |
9904 | * @vsi: pointer to the vsi. | |
9905 | * | |
9906 | * This re-allocates a vsi's queue resources. | |
9907 | * | |
9908 | * Returns pointer to the successfully allocated and configured VSI sw struct | |
9909 | * on success, otherwise returns NULL on failure. | |
9910 | **/ | |
9911 | static struct i40e_vsi *i40e_vsi_reinit_setup(struct i40e_vsi *vsi) | |
9912 | { | |
f534039d | 9913 | struct i40e_pf *pf; |
bc7d338f ASJ |
9914 | u8 enabled_tc; |
9915 | int ret; | |
9916 | ||
f534039d JU |
9917 | if (!vsi) |
9918 | return NULL; | |
9919 | ||
9920 | pf = vsi->back; | |
9921 | ||
bc7d338f ASJ |
9922 | i40e_put_lump(pf->qp_pile, vsi->base_queue, vsi->idx); |
9923 | i40e_vsi_clear_rings(vsi); | |
9924 | ||
9925 | i40e_vsi_free_arrays(vsi, false); | |
9926 | i40e_set_num_rings_in_vsi(vsi); | |
9927 | ret = i40e_vsi_alloc_arrays(vsi, false); | |
9928 | if (ret) | |
9929 | goto err_vsi; | |
9930 | ||
9931 | ret = i40e_get_lump(pf, pf->qp_pile, vsi->alloc_queue_pairs, vsi->idx); | |
9932 | if (ret < 0) { | |
049a2be8 | 9933 | dev_info(&pf->pdev->dev, |
f1c7e72e | 9934 | "failed to get tracking for %d queues for VSI %d err %d\n", |
049a2be8 | 9935 | vsi->alloc_queue_pairs, vsi->seid, ret); |
bc7d338f ASJ |
9936 | goto err_vsi; |
9937 | } | |
9938 | vsi->base_queue = ret; | |
9939 | ||
9940 | /* Update the FW view of the VSI. Force a reset of TC and queue | |
9941 | * layout configurations. | |
9942 | */ | |
9943 | enabled_tc = pf->vsi[pf->lan_vsi]->tc_config.enabled_tc; | |
9944 | pf->vsi[pf->lan_vsi]->tc_config.enabled_tc = 0; | |
9945 | pf->vsi[pf->lan_vsi]->seid = pf->main_vsi_seid; | |
9946 | i40e_vsi_config_tc(pf->vsi[pf->lan_vsi], enabled_tc); | |
1596b5dd JK |
9947 | if (vsi->type == I40E_VSI_MAIN) |
9948 | i40e_rm_default_mac_filter(vsi, pf->hw.mac.perm_addr); | |
bc7d338f ASJ |
9949 | |
9950 | /* assign it some queues */ | |
9951 | ret = i40e_alloc_rings(vsi); | |
9952 | if (ret) | |
9953 | goto err_rings; | |
9954 | ||
9955 | /* map all of the rings to the q_vectors */ | |
9956 | i40e_vsi_map_rings_to_vectors(vsi); | |
9957 | return vsi; | |
9958 | ||
9959 | err_rings: | |
9960 | i40e_vsi_free_q_vectors(vsi); | |
9961 | if (vsi->netdev_registered) { | |
9962 | vsi->netdev_registered = false; | |
9963 | unregister_netdev(vsi->netdev); | |
9964 | free_netdev(vsi->netdev); | |
9965 | vsi->netdev = NULL; | |
9966 | } | |
9967 | i40e_aq_delete_element(&pf->hw, vsi->seid, NULL); | |
9968 | err_vsi: | |
9969 | i40e_vsi_clear(vsi); | |
9970 | return NULL; | |
9971 | } | |
9972 | ||
41c445ff JB |
9973 | /** |
9974 | * i40e_vsi_setup - Set up a VSI by a given type | |
9975 | * @pf: board private structure | |
9976 | * @type: VSI type | |
9977 | * @uplink_seid: the switch element to link to | |
9978 | * @param1: usage depends upon VSI type. For VF types, indicates VF id | |
9979 | * | |
9980 | * This allocates the sw VSI structure and its queue resources, then add a VSI | |
9981 | * to the identified VEB. | |
9982 | * | |
9983 | * Returns pointer to the successfully allocated and configure VSI sw struct on | |
9984 | * success, otherwise returns NULL on failure. | |
9985 | **/ | |
9986 | struct i40e_vsi *i40e_vsi_setup(struct i40e_pf *pf, u8 type, | |
9987 | u16 uplink_seid, u32 param1) | |
9988 | { | |
9989 | struct i40e_vsi *vsi = NULL; | |
9990 | struct i40e_veb *veb = NULL; | |
9991 | int ret, i; | |
9992 | int v_idx; | |
9993 | ||
9994 | /* The requested uplink_seid must be either | |
9995 | * - the PF's port seid | |
9996 | * no VEB is needed because this is the PF | |
9997 | * or this is a Flow Director special case VSI | |
9998 | * - seid of an existing VEB | |
9999 | * - seid of a VSI that owns an existing VEB | |
10000 | * - seid of a VSI that doesn't own a VEB | |
10001 | * a new VEB is created and the VSI becomes the owner | |
10002 | * - seid of the PF VSI, which is what creates the first VEB | |
10003 | * this is a special case of the previous | |
10004 | * | |
10005 | * Find which uplink_seid we were given and create a new VEB if needed | |
10006 | */ | |
10007 | for (i = 0; i < I40E_MAX_VEB; i++) { | |
10008 | if (pf->veb[i] && pf->veb[i]->seid == uplink_seid) { | |
10009 | veb = pf->veb[i]; | |
10010 | break; | |
10011 | } | |
10012 | } | |
10013 | ||
10014 | if (!veb && uplink_seid != pf->mac_seid) { | |
10015 | ||
505682cd | 10016 | for (i = 0; i < pf->num_alloc_vsi; i++) { |
41c445ff JB |
10017 | if (pf->vsi[i] && pf->vsi[i]->seid == uplink_seid) { |
10018 | vsi = pf->vsi[i]; | |
10019 | break; | |
10020 | } | |
10021 | } | |
10022 | if (!vsi) { | |
10023 | dev_info(&pf->pdev->dev, "no such uplink_seid %d\n", | |
10024 | uplink_seid); | |
10025 | return NULL; | |
10026 | } | |
10027 | ||
10028 | if (vsi->uplink_seid == pf->mac_seid) | |
10029 | veb = i40e_veb_setup(pf, 0, pf->mac_seid, vsi->seid, | |
10030 | vsi->tc_config.enabled_tc); | |
10031 | else if ((vsi->flags & I40E_VSI_FLAG_VEB_OWNER) == 0) | |
10032 | veb = i40e_veb_setup(pf, 0, vsi->uplink_seid, vsi->seid, | |
10033 | vsi->tc_config.enabled_tc); | |
79c21a82 ASJ |
10034 | if (veb) { |
10035 | if (vsi->seid != pf->vsi[pf->lan_vsi]->seid) { | |
10036 | dev_info(&vsi->back->pdev->dev, | |
fb43201f | 10037 | "New VSI creation error, uplink seid of LAN VSI expected.\n"); |
79c21a82 ASJ |
10038 | return NULL; |
10039 | } | |
fa11cb3d ASJ |
10040 | /* We come up by default in VEPA mode if SRIOV is not |
10041 | * already enabled, in which case we can't force VEPA | |
10042 | * mode. | |
10043 | */ | |
10044 | if (!(pf->flags & I40E_FLAG_VEB_MODE_ENABLED)) { | |
10045 | veb->bridge_mode = BRIDGE_MODE_VEPA; | |
10046 | pf->flags &= ~I40E_FLAG_VEB_MODE_ENABLED; | |
10047 | } | |
51616018 | 10048 | i40e_config_bridge_mode(veb); |
79c21a82 | 10049 | } |
41c445ff JB |
10050 | for (i = 0; i < I40E_MAX_VEB && !veb; i++) { |
10051 | if (pf->veb[i] && pf->veb[i]->seid == vsi->uplink_seid) | |
10052 | veb = pf->veb[i]; | |
10053 | } | |
10054 | if (!veb) { | |
10055 | dev_info(&pf->pdev->dev, "couldn't add VEB\n"); | |
10056 | return NULL; | |
10057 | } | |
10058 | ||
10059 | vsi->flags |= I40E_VSI_FLAG_VEB_OWNER; | |
10060 | uplink_seid = veb->seid; | |
10061 | } | |
10062 | ||
10063 | /* get vsi sw struct */ | |
10064 | v_idx = i40e_vsi_mem_alloc(pf, type); | |
10065 | if (v_idx < 0) | |
10066 | goto err_alloc; | |
10067 | vsi = pf->vsi[v_idx]; | |
cbf61325 ASJ |
10068 | if (!vsi) |
10069 | goto err_alloc; | |
41c445ff JB |
10070 | vsi->type = type; |
10071 | vsi->veb_idx = (veb ? veb->idx : I40E_NO_VEB); | |
10072 | ||
10073 | if (type == I40E_VSI_MAIN) | |
10074 | pf->lan_vsi = v_idx; | |
10075 | else if (type == I40E_VSI_SRIOV) | |
10076 | vsi->vf_id = param1; | |
10077 | /* assign it some queues */ | |
cbf61325 ASJ |
10078 | ret = i40e_get_lump(pf, pf->qp_pile, vsi->alloc_queue_pairs, |
10079 | vsi->idx); | |
41c445ff | 10080 | if (ret < 0) { |
049a2be8 SN |
10081 | dev_info(&pf->pdev->dev, |
10082 | "failed to get tracking for %d queues for VSI %d err=%d\n", | |
10083 | vsi->alloc_queue_pairs, vsi->seid, ret); | |
41c445ff JB |
10084 | goto err_vsi; |
10085 | } | |
10086 | vsi->base_queue = ret; | |
10087 | ||
10088 | /* get a VSI from the hardware */ | |
10089 | vsi->uplink_seid = uplink_seid; | |
10090 | ret = i40e_add_vsi(vsi); | |
10091 | if (ret) | |
10092 | goto err_vsi; | |
10093 | ||
10094 | switch (vsi->type) { | |
10095 | /* setup the netdev if needed */ | |
10096 | case I40E_VSI_MAIN: | |
b499ffb0 SV |
10097 | /* Apply relevant filters if a platform-specific mac |
10098 | * address was selected. | |
10099 | */ | |
10100 | if (!!(pf->flags & I40E_FLAG_PF_MAC)) { | |
10101 | ret = i40e_macaddr_init(vsi, pf->hw.mac.addr); | |
10102 | if (ret) { | |
10103 | dev_warn(&pf->pdev->dev, | |
10104 | "could not set up macaddr; err %d\n", | |
10105 | ret); | |
10106 | } | |
10107 | } | |
41c445ff JB |
10108 | case I40E_VSI_VMDQ2: |
10109 | ret = i40e_config_netdev(vsi); | |
10110 | if (ret) | |
10111 | goto err_netdev; | |
10112 | ret = register_netdev(vsi->netdev); | |
10113 | if (ret) | |
10114 | goto err_netdev; | |
10115 | vsi->netdev_registered = true; | |
10116 | netif_carrier_off(vsi->netdev); | |
4e3b35b0 NP |
10117 | #ifdef CONFIG_I40E_DCB |
10118 | /* Setup DCB netlink interface */ | |
10119 | i40e_dcbnl_setup(vsi); | |
10120 | #endif /* CONFIG_I40E_DCB */ | |
41c445ff JB |
10121 | /* fall through */ |
10122 | ||
10123 | case I40E_VSI_FDIR: | |
10124 | /* set up vectors and rings if needed */ | |
10125 | ret = i40e_vsi_setup_vectors(vsi); | |
10126 | if (ret) | |
10127 | goto err_msix; | |
10128 | ||
10129 | ret = i40e_alloc_rings(vsi); | |
10130 | if (ret) | |
10131 | goto err_rings; | |
10132 | ||
10133 | /* map all of the rings to the q_vectors */ | |
10134 | i40e_vsi_map_rings_to_vectors(vsi); | |
10135 | ||
10136 | i40e_vsi_reset_stats(vsi); | |
10137 | break; | |
10138 | ||
10139 | default: | |
10140 | /* no netdev or rings for the other VSI types */ | |
10141 | break; | |
10142 | } | |
10143 | ||
e25d00b8 ASJ |
10144 | if ((pf->flags & I40E_FLAG_RSS_AQ_CAPABLE) && |
10145 | (vsi->type == I40E_VSI_VMDQ2)) { | |
10146 | ret = i40e_vsi_config_rss(vsi); | |
10147 | } | |
41c445ff JB |
10148 | return vsi; |
10149 | ||
10150 | err_rings: | |
10151 | i40e_vsi_free_q_vectors(vsi); | |
10152 | err_msix: | |
10153 | if (vsi->netdev_registered) { | |
10154 | vsi->netdev_registered = false; | |
10155 | unregister_netdev(vsi->netdev); | |
10156 | free_netdev(vsi->netdev); | |
10157 | vsi->netdev = NULL; | |
10158 | } | |
10159 | err_netdev: | |
10160 | i40e_aq_delete_element(&pf->hw, vsi->seid, NULL); | |
10161 | err_vsi: | |
10162 | i40e_vsi_clear(vsi); | |
10163 | err_alloc: | |
10164 | return NULL; | |
10165 | } | |
10166 | ||
10167 | /** | |
10168 | * i40e_veb_get_bw_info - Query VEB BW information | |
10169 | * @veb: the veb to query | |
10170 | * | |
10171 | * Query the Tx scheduler BW configuration data for given VEB | |
10172 | **/ | |
10173 | static int i40e_veb_get_bw_info(struct i40e_veb *veb) | |
10174 | { | |
10175 | struct i40e_aqc_query_switching_comp_ets_config_resp ets_data; | |
10176 | struct i40e_aqc_query_switching_comp_bw_config_resp bw_data; | |
10177 | struct i40e_pf *pf = veb->pf; | |
10178 | struct i40e_hw *hw = &pf->hw; | |
10179 | u32 tc_bw_max; | |
10180 | int ret = 0; | |
10181 | int i; | |
10182 | ||
10183 | ret = i40e_aq_query_switch_comp_bw_config(hw, veb->seid, | |
10184 | &bw_data, NULL); | |
10185 | if (ret) { | |
10186 | dev_info(&pf->pdev->dev, | |
f1c7e72e SN |
10187 | "query veb bw config failed, err %s aq_err %s\n", |
10188 | i40e_stat_str(&pf->hw, ret), | |
10189 | i40e_aq_str(&pf->hw, hw->aq.asq_last_status)); | |
41c445ff JB |
10190 | goto out; |
10191 | } | |
10192 | ||
10193 | ret = i40e_aq_query_switch_comp_ets_config(hw, veb->seid, | |
10194 | &ets_data, NULL); | |
10195 | if (ret) { | |
10196 | dev_info(&pf->pdev->dev, | |
f1c7e72e SN |
10197 | "query veb bw ets config failed, err %s aq_err %s\n", |
10198 | i40e_stat_str(&pf->hw, ret), | |
10199 | i40e_aq_str(&pf->hw, hw->aq.asq_last_status)); | |
41c445ff JB |
10200 | goto out; |
10201 | } | |
10202 | ||
10203 | veb->bw_limit = le16_to_cpu(ets_data.port_bw_limit); | |
10204 | veb->bw_max_quanta = ets_data.tc_bw_max; | |
10205 | veb->is_abs_credits = bw_data.absolute_credits_enable; | |
23cd1f09 | 10206 | veb->enabled_tc = ets_data.tc_valid_bits; |
41c445ff JB |
10207 | tc_bw_max = le16_to_cpu(bw_data.tc_bw_max[0]) | |
10208 | (le16_to_cpu(bw_data.tc_bw_max[1]) << 16); | |
10209 | for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) { | |
10210 | veb->bw_tc_share_credits[i] = bw_data.tc_bw_share_credits[i]; | |
10211 | veb->bw_tc_limit_credits[i] = | |
10212 | le16_to_cpu(bw_data.tc_bw_limits[i]); | |
10213 | veb->bw_tc_max_quanta[i] = ((tc_bw_max >> (i*4)) & 0x7); | |
10214 | } | |
10215 | ||
10216 | out: | |
10217 | return ret; | |
10218 | } | |
10219 | ||
10220 | /** | |
10221 | * i40e_veb_mem_alloc - Allocates the next available struct veb in the PF | |
10222 | * @pf: board private structure | |
10223 | * | |
10224 | * On error: returns error code (negative) | |
10225 | * On success: returns vsi index in PF (positive) | |
10226 | **/ | |
10227 | static int i40e_veb_mem_alloc(struct i40e_pf *pf) | |
10228 | { | |
10229 | int ret = -ENOENT; | |
10230 | struct i40e_veb *veb; | |
10231 | int i; | |
10232 | ||
10233 | /* Need to protect the allocation of switch elements at the PF level */ | |
10234 | mutex_lock(&pf->switch_mutex); | |
10235 | ||
10236 | /* VEB list may be fragmented if VEB creation/destruction has | |
10237 | * been happening. We can afford to do a quick scan to look | |
10238 | * for any free slots in the list. | |
10239 | * | |
10240 | * find next empty veb slot, looping back around if necessary | |
10241 | */ | |
10242 | i = 0; | |
10243 | while ((i < I40E_MAX_VEB) && (pf->veb[i] != NULL)) | |
10244 | i++; | |
10245 | if (i >= I40E_MAX_VEB) { | |
10246 | ret = -ENOMEM; | |
10247 | goto err_alloc_veb; /* out of VEB slots! */ | |
10248 | } | |
10249 | ||
10250 | veb = kzalloc(sizeof(*veb), GFP_KERNEL); | |
10251 | if (!veb) { | |
10252 | ret = -ENOMEM; | |
10253 | goto err_alloc_veb; | |
10254 | } | |
10255 | veb->pf = pf; | |
10256 | veb->idx = i; | |
10257 | veb->enabled_tc = 1; | |
10258 | ||
10259 | pf->veb[i] = veb; | |
10260 | ret = i; | |
10261 | err_alloc_veb: | |
10262 | mutex_unlock(&pf->switch_mutex); | |
10263 | return ret; | |
10264 | } | |
10265 | ||
10266 | /** | |
10267 | * i40e_switch_branch_release - Delete a branch of the switch tree | |
10268 | * @branch: where to start deleting | |
10269 | * | |
10270 | * This uses recursion to find the tips of the branch to be | |
10271 | * removed, deleting until we get back to and can delete this VEB. | |
10272 | **/ | |
10273 | static void i40e_switch_branch_release(struct i40e_veb *branch) | |
10274 | { | |
10275 | struct i40e_pf *pf = branch->pf; | |
10276 | u16 branch_seid = branch->seid; | |
10277 | u16 veb_idx = branch->idx; | |
10278 | int i; | |
10279 | ||
10280 | /* release any VEBs on this VEB - RECURSION */ | |
10281 | for (i = 0; i < I40E_MAX_VEB; i++) { | |
10282 | if (!pf->veb[i]) | |
10283 | continue; | |
10284 | if (pf->veb[i]->uplink_seid == branch->seid) | |
10285 | i40e_switch_branch_release(pf->veb[i]); | |
10286 | } | |
10287 | ||
10288 | /* Release the VSIs on this VEB, but not the owner VSI. | |
10289 | * | |
10290 | * NOTE: Removing the last VSI on a VEB has the SIDE EFFECT of removing | |
10291 | * the VEB itself, so don't use (*branch) after this loop. | |
10292 | */ | |
505682cd | 10293 | for (i = 0; i < pf->num_alloc_vsi; i++) { |
41c445ff JB |
10294 | if (!pf->vsi[i]) |
10295 | continue; | |
10296 | if (pf->vsi[i]->uplink_seid == branch_seid && | |
10297 | (pf->vsi[i]->flags & I40E_VSI_FLAG_VEB_OWNER) == 0) { | |
10298 | i40e_vsi_release(pf->vsi[i]); | |
10299 | } | |
10300 | } | |
10301 | ||
10302 | /* There's one corner case where the VEB might not have been | |
10303 | * removed, so double check it here and remove it if needed. | |
10304 | * This case happens if the veb was created from the debugfs | |
10305 | * commands and no VSIs were added to it. | |
10306 | */ | |
10307 | if (pf->veb[veb_idx]) | |
10308 | i40e_veb_release(pf->veb[veb_idx]); | |
10309 | } | |
10310 | ||
10311 | /** | |
10312 | * i40e_veb_clear - remove veb struct | |
10313 | * @veb: the veb to remove | |
10314 | **/ | |
10315 | static void i40e_veb_clear(struct i40e_veb *veb) | |
10316 | { | |
10317 | if (!veb) | |
10318 | return; | |
10319 | ||
10320 | if (veb->pf) { | |
10321 | struct i40e_pf *pf = veb->pf; | |
10322 | ||
10323 | mutex_lock(&pf->switch_mutex); | |
10324 | if (pf->veb[veb->idx] == veb) | |
10325 | pf->veb[veb->idx] = NULL; | |
10326 | mutex_unlock(&pf->switch_mutex); | |
10327 | } | |
10328 | ||
10329 | kfree(veb); | |
10330 | } | |
10331 | ||
10332 | /** | |
10333 | * i40e_veb_release - Delete a VEB and free its resources | |
10334 | * @veb: the VEB being removed | |
10335 | **/ | |
10336 | void i40e_veb_release(struct i40e_veb *veb) | |
10337 | { | |
10338 | struct i40e_vsi *vsi = NULL; | |
10339 | struct i40e_pf *pf; | |
10340 | int i, n = 0; | |
10341 | ||
10342 | pf = veb->pf; | |
10343 | ||
10344 | /* find the remaining VSI and check for extras */ | |
505682cd | 10345 | for (i = 0; i < pf->num_alloc_vsi; i++) { |
41c445ff JB |
10346 | if (pf->vsi[i] && pf->vsi[i]->uplink_seid == veb->seid) { |
10347 | n++; | |
10348 | vsi = pf->vsi[i]; | |
10349 | } | |
10350 | } | |
10351 | if (n != 1) { | |
10352 | dev_info(&pf->pdev->dev, | |
10353 | "can't remove VEB %d with %d VSIs left\n", | |
10354 | veb->seid, n); | |
10355 | return; | |
10356 | } | |
10357 | ||
10358 | /* move the remaining VSI to uplink veb */ | |
10359 | vsi->flags &= ~I40E_VSI_FLAG_VEB_OWNER; | |
10360 | if (veb->uplink_seid) { | |
10361 | vsi->uplink_seid = veb->uplink_seid; | |
10362 | if (veb->uplink_seid == pf->mac_seid) | |
10363 | vsi->veb_idx = I40E_NO_VEB; | |
10364 | else | |
10365 | vsi->veb_idx = veb->veb_idx; | |
10366 | } else { | |
10367 | /* floating VEB */ | |
10368 | vsi->uplink_seid = pf->vsi[pf->lan_vsi]->uplink_seid; | |
10369 | vsi->veb_idx = pf->vsi[pf->lan_vsi]->veb_idx; | |
10370 | } | |
10371 | ||
10372 | i40e_aq_delete_element(&pf->hw, veb->seid, NULL); | |
10373 | i40e_veb_clear(veb); | |
41c445ff JB |
10374 | } |
10375 | ||
10376 | /** | |
10377 | * i40e_add_veb - create the VEB in the switch | |
10378 | * @veb: the VEB to be instantiated | |
10379 | * @vsi: the controlling VSI | |
10380 | **/ | |
10381 | static int i40e_add_veb(struct i40e_veb *veb, struct i40e_vsi *vsi) | |
10382 | { | |
f1c7e72e | 10383 | struct i40e_pf *pf = veb->pf; |
66fc360a | 10384 | bool enable_stats = !!(pf->flags & I40E_FLAG_VEB_STATS_ENABLED); |
41c445ff JB |
10385 | int ret; |
10386 | ||
f1c7e72e | 10387 | ret = i40e_aq_add_veb(&pf->hw, veb->uplink_seid, vsi->seid, |
5bc16031 | 10388 | veb->enabled_tc, false, |
66fc360a | 10389 | &veb->seid, enable_stats, NULL); |
5bc16031 MW |
10390 | |
10391 | /* get a VEB from the hardware */ | |
41c445ff | 10392 | if (ret) { |
f1c7e72e SN |
10393 | dev_info(&pf->pdev->dev, |
10394 | "couldn't add VEB, err %s aq_err %s\n", | |
10395 | i40e_stat_str(&pf->hw, ret), | |
10396 | i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status)); | |
41c445ff JB |
10397 | return -EPERM; |
10398 | } | |
10399 | ||
10400 | /* get statistics counter */ | |
f1c7e72e | 10401 | ret = i40e_aq_get_veb_parameters(&pf->hw, veb->seid, NULL, NULL, |
41c445ff JB |
10402 | &veb->stats_idx, NULL, NULL, NULL); |
10403 | if (ret) { | |
f1c7e72e SN |
10404 | dev_info(&pf->pdev->dev, |
10405 | "couldn't get VEB statistics idx, err %s aq_err %s\n", | |
10406 | i40e_stat_str(&pf->hw, ret), | |
10407 | i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status)); | |
41c445ff JB |
10408 | return -EPERM; |
10409 | } | |
10410 | ret = i40e_veb_get_bw_info(veb); | |
10411 | if (ret) { | |
f1c7e72e SN |
10412 | dev_info(&pf->pdev->dev, |
10413 | "couldn't get VEB bw info, err %s aq_err %s\n", | |
10414 | i40e_stat_str(&pf->hw, ret), | |
10415 | i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status)); | |
10416 | i40e_aq_delete_element(&pf->hw, veb->seid, NULL); | |
41c445ff JB |
10417 | return -ENOENT; |
10418 | } | |
10419 | ||
10420 | vsi->uplink_seid = veb->seid; | |
10421 | vsi->veb_idx = veb->idx; | |
10422 | vsi->flags |= I40E_VSI_FLAG_VEB_OWNER; | |
10423 | ||
10424 | return 0; | |
10425 | } | |
10426 | ||
10427 | /** | |
10428 | * i40e_veb_setup - Set up a VEB | |
10429 | * @pf: board private structure | |
10430 | * @flags: VEB setup flags | |
10431 | * @uplink_seid: the switch element to link to | |
10432 | * @vsi_seid: the initial VSI seid | |
10433 | * @enabled_tc: Enabled TC bit-map | |
10434 | * | |
10435 | * This allocates the sw VEB structure and links it into the switch | |
10436 | * It is possible and legal for this to be a duplicate of an already | |
10437 | * existing VEB. It is also possible for both uplink and vsi seids | |
10438 | * to be zero, in order to create a floating VEB. | |
10439 | * | |
10440 | * Returns pointer to the successfully allocated VEB sw struct on | |
10441 | * success, otherwise returns NULL on failure. | |
10442 | **/ | |
10443 | struct i40e_veb *i40e_veb_setup(struct i40e_pf *pf, u16 flags, | |
10444 | u16 uplink_seid, u16 vsi_seid, | |
10445 | u8 enabled_tc) | |
10446 | { | |
10447 | struct i40e_veb *veb, *uplink_veb = NULL; | |
10448 | int vsi_idx, veb_idx; | |
10449 | int ret; | |
10450 | ||
10451 | /* if one seid is 0, the other must be 0 to create a floating relay */ | |
10452 | if ((uplink_seid == 0 || vsi_seid == 0) && | |
10453 | (uplink_seid + vsi_seid != 0)) { | |
10454 | dev_info(&pf->pdev->dev, | |
10455 | "one, not both seid's are 0: uplink=%d vsi=%d\n", | |
10456 | uplink_seid, vsi_seid); | |
10457 | return NULL; | |
10458 | } | |
10459 | ||
10460 | /* make sure there is such a vsi and uplink */ | |
505682cd | 10461 | for (vsi_idx = 0; vsi_idx < pf->num_alloc_vsi; vsi_idx++) |
41c445ff JB |
10462 | if (pf->vsi[vsi_idx] && pf->vsi[vsi_idx]->seid == vsi_seid) |
10463 | break; | |
505682cd | 10464 | if (vsi_idx >= pf->num_alloc_vsi && vsi_seid != 0) { |
41c445ff JB |
10465 | dev_info(&pf->pdev->dev, "vsi seid %d not found\n", |
10466 | vsi_seid); | |
10467 | return NULL; | |
10468 | } | |
10469 | ||
10470 | if (uplink_seid && uplink_seid != pf->mac_seid) { | |
10471 | for (veb_idx = 0; veb_idx < I40E_MAX_VEB; veb_idx++) { | |
10472 | if (pf->veb[veb_idx] && | |
10473 | pf->veb[veb_idx]->seid == uplink_seid) { | |
10474 | uplink_veb = pf->veb[veb_idx]; | |
10475 | break; | |
10476 | } | |
10477 | } | |
10478 | if (!uplink_veb) { | |
10479 | dev_info(&pf->pdev->dev, | |
10480 | "uplink seid %d not found\n", uplink_seid); | |
10481 | return NULL; | |
10482 | } | |
10483 | } | |
10484 | ||
10485 | /* get veb sw struct */ | |
10486 | veb_idx = i40e_veb_mem_alloc(pf); | |
10487 | if (veb_idx < 0) | |
10488 | goto err_alloc; | |
10489 | veb = pf->veb[veb_idx]; | |
10490 | veb->flags = flags; | |
10491 | veb->uplink_seid = uplink_seid; | |
10492 | veb->veb_idx = (uplink_veb ? uplink_veb->idx : I40E_NO_VEB); | |
10493 | veb->enabled_tc = (enabled_tc ? enabled_tc : 0x1); | |
10494 | ||
10495 | /* create the VEB in the switch */ | |
10496 | ret = i40e_add_veb(veb, pf->vsi[vsi_idx]); | |
10497 | if (ret) | |
10498 | goto err_veb; | |
1bb8b935 SN |
10499 | if (vsi_idx == pf->lan_vsi) |
10500 | pf->lan_veb = veb->idx; | |
41c445ff JB |
10501 | |
10502 | return veb; | |
10503 | ||
10504 | err_veb: | |
10505 | i40e_veb_clear(veb); | |
10506 | err_alloc: | |
10507 | return NULL; | |
10508 | } | |
10509 | ||
10510 | /** | |
b40c82e6 | 10511 | * i40e_setup_pf_switch_element - set PF vars based on switch type |
41c445ff JB |
10512 | * @pf: board private structure |
10513 | * @ele: element we are building info from | |
10514 | * @num_reported: total number of elements | |
10515 | * @printconfig: should we print the contents | |
10516 | * | |
10517 | * helper function to assist in extracting a few useful SEID values. | |
10518 | **/ | |
10519 | static void i40e_setup_pf_switch_element(struct i40e_pf *pf, | |
10520 | struct i40e_aqc_switch_config_element_resp *ele, | |
10521 | u16 num_reported, bool printconfig) | |
10522 | { | |
10523 | u16 downlink_seid = le16_to_cpu(ele->downlink_seid); | |
10524 | u16 uplink_seid = le16_to_cpu(ele->uplink_seid); | |
10525 | u8 element_type = ele->element_type; | |
10526 | u16 seid = le16_to_cpu(ele->seid); | |
10527 | ||
10528 | if (printconfig) | |
10529 | dev_info(&pf->pdev->dev, | |
10530 | "type=%d seid=%d uplink=%d downlink=%d\n", | |
10531 | element_type, seid, uplink_seid, downlink_seid); | |
10532 | ||
10533 | switch (element_type) { | |
10534 | case I40E_SWITCH_ELEMENT_TYPE_MAC: | |
10535 | pf->mac_seid = seid; | |
10536 | break; | |
10537 | case I40E_SWITCH_ELEMENT_TYPE_VEB: | |
10538 | /* Main VEB? */ | |
10539 | if (uplink_seid != pf->mac_seid) | |
10540 | break; | |
10541 | if (pf->lan_veb == I40E_NO_VEB) { | |
10542 | int v; | |
10543 | ||
10544 | /* find existing or else empty VEB */ | |
10545 | for (v = 0; v < I40E_MAX_VEB; v++) { | |
10546 | if (pf->veb[v] && (pf->veb[v]->seid == seid)) { | |
10547 | pf->lan_veb = v; | |
10548 | break; | |
10549 | } | |
10550 | } | |
10551 | if (pf->lan_veb == I40E_NO_VEB) { | |
10552 | v = i40e_veb_mem_alloc(pf); | |
10553 | if (v < 0) | |
10554 | break; | |
10555 | pf->lan_veb = v; | |
10556 | } | |
10557 | } | |
10558 | ||
10559 | pf->veb[pf->lan_veb]->seid = seid; | |
10560 | pf->veb[pf->lan_veb]->uplink_seid = pf->mac_seid; | |
10561 | pf->veb[pf->lan_veb]->pf = pf; | |
10562 | pf->veb[pf->lan_veb]->veb_idx = I40E_NO_VEB; | |
10563 | break; | |
10564 | case I40E_SWITCH_ELEMENT_TYPE_VSI: | |
10565 | if (num_reported != 1) | |
10566 | break; | |
10567 | /* This is immediately after a reset so we can assume this is | |
10568 | * the PF's VSI | |
10569 | */ | |
10570 | pf->mac_seid = uplink_seid; | |
10571 | pf->pf_seid = downlink_seid; | |
10572 | pf->main_vsi_seid = seid; | |
10573 | if (printconfig) | |
10574 | dev_info(&pf->pdev->dev, | |
10575 | "pf_seid=%d main_vsi_seid=%d\n", | |
10576 | pf->pf_seid, pf->main_vsi_seid); | |
10577 | break; | |
10578 | case I40E_SWITCH_ELEMENT_TYPE_PF: | |
10579 | case I40E_SWITCH_ELEMENT_TYPE_VF: | |
10580 | case I40E_SWITCH_ELEMENT_TYPE_EMP: | |
10581 | case I40E_SWITCH_ELEMENT_TYPE_BMC: | |
10582 | case I40E_SWITCH_ELEMENT_TYPE_PE: | |
10583 | case I40E_SWITCH_ELEMENT_TYPE_PA: | |
10584 | /* ignore these for now */ | |
10585 | break; | |
10586 | default: | |
10587 | dev_info(&pf->pdev->dev, "unknown element type=%d seid=%d\n", | |
10588 | element_type, seid); | |
10589 | break; | |
10590 | } | |
10591 | } | |
10592 | ||
10593 | /** | |
10594 | * i40e_fetch_switch_configuration - Get switch config from firmware | |
10595 | * @pf: board private structure | |
10596 | * @printconfig: should we print the contents | |
10597 | * | |
10598 | * Get the current switch configuration from the device and | |
10599 | * extract a few useful SEID values. | |
10600 | **/ | |
10601 | int i40e_fetch_switch_configuration(struct i40e_pf *pf, bool printconfig) | |
10602 | { | |
10603 | struct i40e_aqc_get_switch_config_resp *sw_config; | |
10604 | u16 next_seid = 0; | |
10605 | int ret = 0; | |
10606 | u8 *aq_buf; | |
10607 | int i; | |
10608 | ||
10609 | aq_buf = kzalloc(I40E_AQ_LARGE_BUF, GFP_KERNEL); | |
10610 | if (!aq_buf) | |
10611 | return -ENOMEM; | |
10612 | ||
10613 | sw_config = (struct i40e_aqc_get_switch_config_resp *)aq_buf; | |
10614 | do { | |
10615 | u16 num_reported, num_total; | |
10616 | ||
10617 | ret = i40e_aq_get_switch_config(&pf->hw, sw_config, | |
10618 | I40E_AQ_LARGE_BUF, | |
10619 | &next_seid, NULL); | |
10620 | if (ret) { | |
10621 | dev_info(&pf->pdev->dev, | |
f1c7e72e SN |
10622 | "get switch config failed err %s aq_err %s\n", |
10623 | i40e_stat_str(&pf->hw, ret), | |
10624 | i40e_aq_str(&pf->hw, | |
10625 | pf->hw.aq.asq_last_status)); | |
41c445ff JB |
10626 | kfree(aq_buf); |
10627 | return -ENOENT; | |
10628 | } | |
10629 | ||
10630 | num_reported = le16_to_cpu(sw_config->header.num_reported); | |
10631 | num_total = le16_to_cpu(sw_config->header.num_total); | |
10632 | ||
10633 | if (printconfig) | |
10634 | dev_info(&pf->pdev->dev, | |
10635 | "header: %d reported %d total\n", | |
10636 | num_reported, num_total); | |
10637 | ||
41c445ff JB |
10638 | for (i = 0; i < num_reported; i++) { |
10639 | struct i40e_aqc_switch_config_element_resp *ele = | |
10640 | &sw_config->element[i]; | |
10641 | ||
10642 | i40e_setup_pf_switch_element(pf, ele, num_reported, | |
10643 | printconfig); | |
10644 | } | |
10645 | } while (next_seid != 0); | |
10646 | ||
10647 | kfree(aq_buf); | |
10648 | return ret; | |
10649 | } | |
10650 | ||
10651 | /** | |
10652 | * i40e_setup_pf_switch - Setup the HW switch on startup or after reset | |
10653 | * @pf: board private structure | |
bc7d338f | 10654 | * @reinit: if the Main VSI needs to re-initialized. |
41c445ff JB |
10655 | * |
10656 | * Returns 0 on success, negative value on failure | |
10657 | **/ | |
bc7d338f | 10658 | static int i40e_setup_pf_switch(struct i40e_pf *pf, bool reinit) |
41c445ff | 10659 | { |
b5569892 | 10660 | u16 flags = 0; |
41c445ff JB |
10661 | int ret; |
10662 | ||
10663 | /* find out what's out there already */ | |
10664 | ret = i40e_fetch_switch_configuration(pf, false); | |
10665 | if (ret) { | |
10666 | dev_info(&pf->pdev->dev, | |
f1c7e72e SN |
10667 | "couldn't fetch switch config, err %s aq_err %s\n", |
10668 | i40e_stat_str(&pf->hw, ret), | |
10669 | i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status)); | |
41c445ff JB |
10670 | return ret; |
10671 | } | |
10672 | i40e_pf_reset_stats(pf); | |
10673 | ||
b5569892 ASJ |
10674 | /* set the switch config bit for the whole device to |
10675 | * support limited promisc or true promisc | |
10676 | * when user requests promisc. The default is limited | |
10677 | * promisc. | |
10678 | */ | |
10679 | ||
10680 | if ((pf->hw.pf_id == 0) && | |
10681 | !(pf->flags & I40E_FLAG_TRUE_PROMISC_SUPPORT)) | |
10682 | flags = I40E_AQ_SET_SWITCH_CFG_PROMISC; | |
10683 | ||
10684 | if (pf->hw.pf_id == 0) { | |
10685 | u16 valid_flags; | |
10686 | ||
10687 | valid_flags = I40E_AQ_SET_SWITCH_CFG_PROMISC; | |
10688 | ret = i40e_aq_set_switch_config(&pf->hw, flags, valid_flags, | |
10689 | NULL); | |
10690 | if (ret && pf->hw.aq.asq_last_status != I40E_AQ_RC_ESRCH) { | |
10691 | dev_info(&pf->pdev->dev, | |
10692 | "couldn't set switch config bits, err %s aq_err %s\n", | |
10693 | i40e_stat_str(&pf->hw, ret), | |
10694 | i40e_aq_str(&pf->hw, | |
10695 | pf->hw.aq.asq_last_status)); | |
10696 | /* not a fatal problem, just keep going */ | |
10697 | } | |
10698 | } | |
10699 | ||
41c445ff | 10700 | /* first time setup */ |
bc7d338f | 10701 | if (pf->lan_vsi == I40E_NO_VSI || reinit) { |
41c445ff JB |
10702 | struct i40e_vsi *vsi = NULL; |
10703 | u16 uplink_seid; | |
10704 | ||
10705 | /* Set up the PF VSI associated with the PF's main VSI | |
10706 | * that is already in the HW switch | |
10707 | */ | |
10708 | if (pf->lan_veb != I40E_NO_VEB && pf->veb[pf->lan_veb]) | |
10709 | uplink_seid = pf->veb[pf->lan_veb]->seid; | |
10710 | else | |
10711 | uplink_seid = pf->mac_seid; | |
bc7d338f ASJ |
10712 | if (pf->lan_vsi == I40E_NO_VSI) |
10713 | vsi = i40e_vsi_setup(pf, I40E_VSI_MAIN, uplink_seid, 0); | |
10714 | else if (reinit) | |
10715 | vsi = i40e_vsi_reinit_setup(pf->vsi[pf->lan_vsi]); | |
41c445ff JB |
10716 | if (!vsi) { |
10717 | dev_info(&pf->pdev->dev, "setup of MAIN VSI failed\n"); | |
10718 | i40e_fdir_teardown(pf); | |
10719 | return -EAGAIN; | |
10720 | } | |
41c445ff JB |
10721 | } else { |
10722 | /* force a reset of TC and queue layout configurations */ | |
10723 | u8 enabled_tc = pf->vsi[pf->lan_vsi]->tc_config.enabled_tc; | |
6995b36c | 10724 | |
41c445ff JB |
10725 | pf->vsi[pf->lan_vsi]->tc_config.enabled_tc = 0; |
10726 | pf->vsi[pf->lan_vsi]->seid = pf->main_vsi_seid; | |
10727 | i40e_vsi_config_tc(pf->vsi[pf->lan_vsi], enabled_tc); | |
10728 | } | |
10729 | i40e_vlan_stripping_disable(pf->vsi[pf->lan_vsi]); | |
10730 | ||
cbf61325 ASJ |
10731 | i40e_fdir_sb_setup(pf); |
10732 | ||
41c445ff JB |
10733 | /* Setup static PF queue filter control settings */ |
10734 | ret = i40e_setup_pf_filter_control(pf); | |
10735 | if (ret) { | |
10736 | dev_info(&pf->pdev->dev, "setup_pf_filter_control failed: %d\n", | |
10737 | ret); | |
10738 | /* Failure here should not stop continuing other steps */ | |
10739 | } | |
10740 | ||
10741 | /* enable RSS in the HW, even for only one queue, as the stack can use | |
10742 | * the hash | |
10743 | */ | |
10744 | if ((pf->flags & I40E_FLAG_RSS_ENABLED)) | |
043dd650 | 10745 | i40e_pf_config_rss(pf); |
41c445ff JB |
10746 | |
10747 | /* fill in link information and enable LSE reporting */ | |
a34a6711 MW |
10748 | i40e_link_event(pf); |
10749 | ||
d52c20b7 | 10750 | /* Initialize user-specific link properties */ |
41c445ff JB |
10751 | pf->fc_autoneg_status = ((pf->hw.phy.link_info.an_info & |
10752 | I40E_AQ_AN_COMPLETED) ? true : false); | |
d52c20b7 | 10753 | |
beb0dff1 JK |
10754 | i40e_ptp_init(pf); |
10755 | ||
1f190d93 AD |
10756 | /* repopulate tunnel port filters */ |
10757 | i40e_sync_udp_filters(pf); | |
10758 | ||
41c445ff JB |
10759 | return ret; |
10760 | } | |
10761 | ||
41c445ff JB |
10762 | /** |
10763 | * i40e_determine_queue_usage - Work out queue distribution | |
10764 | * @pf: board private structure | |
10765 | **/ | |
10766 | static void i40e_determine_queue_usage(struct i40e_pf *pf) | |
10767 | { | |
41c445ff JB |
10768 | int queues_left; |
10769 | ||
10770 | pf->num_lan_qps = 0; | |
41c445ff JB |
10771 | |
10772 | /* Find the max queues to be put into basic use. We'll always be | |
10773 | * using TC0, whether or not DCB is running, and TC0 will get the | |
10774 | * big RSS set. | |
10775 | */ | |
10776 | queues_left = pf->hw.func_caps.num_tx_qp; | |
10777 | ||
cbf61325 | 10778 | if ((queues_left == 1) || |
9aa7e935 | 10779 | !(pf->flags & I40E_FLAG_MSIX_ENABLED)) { |
41c445ff JB |
10780 | /* one qp for PF, no queues for anything else */ |
10781 | queues_left = 0; | |
acd65448 | 10782 | pf->alloc_rss_size = pf->num_lan_qps = 1; |
41c445ff JB |
10783 | |
10784 | /* make sure all the fancies are disabled */ | |
60ea5f83 | 10785 | pf->flags &= ~(I40E_FLAG_RSS_ENABLED | |
e3219ce6 | 10786 | I40E_FLAG_IWARP_ENABLED | |
60ea5f83 JB |
10787 | I40E_FLAG_FD_SB_ENABLED | |
10788 | I40E_FLAG_FD_ATR_ENABLED | | |
4d9b6043 | 10789 | I40E_FLAG_DCB_CAPABLE | |
a036244c | 10790 | I40E_FLAG_DCB_ENABLED | |
60ea5f83 JB |
10791 | I40E_FLAG_SRIOV_ENABLED | |
10792 | I40E_FLAG_VMDQ_ENABLED); | |
9aa7e935 FZ |
10793 | } else if (!(pf->flags & (I40E_FLAG_RSS_ENABLED | |
10794 | I40E_FLAG_FD_SB_ENABLED | | |
bbe7d0e0 | 10795 | I40E_FLAG_FD_ATR_ENABLED | |
4d9b6043 | 10796 | I40E_FLAG_DCB_CAPABLE))) { |
9aa7e935 | 10797 | /* one qp for PF */ |
acd65448 | 10798 | pf->alloc_rss_size = pf->num_lan_qps = 1; |
9aa7e935 FZ |
10799 | queues_left -= pf->num_lan_qps; |
10800 | ||
10801 | pf->flags &= ~(I40E_FLAG_RSS_ENABLED | | |
e3219ce6 | 10802 | I40E_FLAG_IWARP_ENABLED | |
9aa7e935 FZ |
10803 | I40E_FLAG_FD_SB_ENABLED | |
10804 | I40E_FLAG_FD_ATR_ENABLED | | |
10805 | I40E_FLAG_DCB_ENABLED | | |
10806 | I40E_FLAG_VMDQ_ENABLED); | |
41c445ff | 10807 | } else { |
cbf61325 | 10808 | /* Not enough queues for all TCs */ |
4d9b6043 | 10809 | if ((pf->flags & I40E_FLAG_DCB_CAPABLE) && |
cbf61325 | 10810 | (queues_left < I40E_MAX_TRAFFIC_CLASS)) { |
a036244c DE |
10811 | pf->flags &= ~(I40E_FLAG_DCB_CAPABLE | |
10812 | I40E_FLAG_DCB_ENABLED); | |
cbf61325 ASJ |
10813 | dev_info(&pf->pdev->dev, "not enough queues for DCB. DCB is disabled.\n"); |
10814 | } | |
9a3bd2f1 ASJ |
10815 | pf->num_lan_qps = max_t(int, pf->rss_size_max, |
10816 | num_online_cpus()); | |
10817 | pf->num_lan_qps = min_t(int, pf->num_lan_qps, | |
10818 | pf->hw.func_caps.num_tx_qp); | |
10819 | ||
cbf61325 ASJ |
10820 | queues_left -= pf->num_lan_qps; |
10821 | } | |
10822 | ||
10823 | if (pf->flags & I40E_FLAG_FD_SB_ENABLED) { | |
10824 | if (queues_left > 1) { | |
10825 | queues_left -= 1; /* save 1 queue for FD */ | |
10826 | } else { | |
10827 | pf->flags &= ~I40E_FLAG_FD_SB_ENABLED; | |
10828 | dev_info(&pf->pdev->dev, "not enough queues for Flow Director. Flow Director feature is disabled\n"); | |
10829 | } | |
41c445ff JB |
10830 | } |
10831 | ||
10832 | if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) && | |
10833 | pf->num_vf_qps && pf->num_req_vfs && queues_left) { | |
cbf61325 ASJ |
10834 | pf->num_req_vfs = min_t(int, pf->num_req_vfs, |
10835 | (queues_left / pf->num_vf_qps)); | |
41c445ff JB |
10836 | queues_left -= (pf->num_req_vfs * pf->num_vf_qps); |
10837 | } | |
10838 | ||
10839 | if ((pf->flags & I40E_FLAG_VMDQ_ENABLED) && | |
10840 | pf->num_vmdq_vsis && pf->num_vmdq_qps && queues_left) { | |
10841 | pf->num_vmdq_vsis = min_t(int, pf->num_vmdq_vsis, | |
10842 | (queues_left / pf->num_vmdq_qps)); | |
10843 | queues_left -= (pf->num_vmdq_vsis * pf->num_vmdq_qps); | |
10844 | } | |
10845 | ||
f8ff1464 | 10846 | pf->queues_left = queues_left; |
8279e495 NP |
10847 | dev_dbg(&pf->pdev->dev, |
10848 | "qs_avail=%d FD SB=%d lan_qs=%d lan_tc0=%d vf=%d*%d vmdq=%d*%d, remaining=%d\n", | |
10849 | pf->hw.func_caps.num_tx_qp, | |
10850 | !!(pf->flags & I40E_FLAG_FD_SB_ENABLED), | |
acd65448 HZ |
10851 | pf->num_lan_qps, pf->alloc_rss_size, pf->num_req_vfs, |
10852 | pf->num_vf_qps, pf->num_vmdq_vsis, pf->num_vmdq_qps, | |
10853 | queues_left); | |
41c445ff JB |
10854 | } |
10855 | ||
10856 | /** | |
10857 | * i40e_setup_pf_filter_control - Setup PF static filter control | |
10858 | * @pf: PF to be setup | |
10859 | * | |
b40c82e6 | 10860 | * i40e_setup_pf_filter_control sets up a PF's initial filter control |
41c445ff JB |
10861 | * settings. If PE/FCoE are enabled then it will also set the per PF |
10862 | * based filter sizes required for them. It also enables Flow director, | |
10863 | * ethertype and macvlan type filter settings for the pf. | |
10864 | * | |
10865 | * Returns 0 on success, negative on failure | |
10866 | **/ | |
10867 | static int i40e_setup_pf_filter_control(struct i40e_pf *pf) | |
10868 | { | |
10869 | struct i40e_filter_control_settings *settings = &pf->filter_settings; | |
10870 | ||
10871 | settings->hash_lut_size = I40E_HASH_LUT_SIZE_128; | |
10872 | ||
10873 | /* Flow Director is enabled */ | |
60ea5f83 | 10874 | if (pf->flags & (I40E_FLAG_FD_SB_ENABLED | I40E_FLAG_FD_ATR_ENABLED)) |
41c445ff JB |
10875 | settings->enable_fdir = true; |
10876 | ||
10877 | /* Ethtype and MACVLAN filters enabled for PF */ | |
10878 | settings->enable_ethtype = true; | |
10879 | settings->enable_macvlan = true; | |
10880 | ||
10881 | if (i40e_set_filter_control(&pf->hw, settings)) | |
10882 | return -ENOENT; | |
10883 | ||
10884 | return 0; | |
10885 | } | |
10886 | ||
0c22b3dd | 10887 | #define INFO_STRING_LEN 255 |
7fd89545 | 10888 | #define REMAIN(__x) (INFO_STRING_LEN - (__x)) |
0c22b3dd JB |
10889 | static void i40e_print_features(struct i40e_pf *pf) |
10890 | { | |
10891 | struct i40e_hw *hw = &pf->hw; | |
3b195843 JP |
10892 | char *buf; |
10893 | int i; | |
0c22b3dd | 10894 | |
3b195843 JP |
10895 | buf = kmalloc(INFO_STRING_LEN, GFP_KERNEL); |
10896 | if (!buf) | |
0c22b3dd | 10897 | return; |
0c22b3dd | 10898 | |
3b195843 | 10899 | i = snprintf(buf, INFO_STRING_LEN, "Features: PF-id[%d]", hw->pf_id); |
0c22b3dd | 10900 | #ifdef CONFIG_PCI_IOV |
3b195843 | 10901 | i += snprintf(&buf[i], REMAIN(i), " VFs: %d", pf->num_req_vfs); |
0c22b3dd | 10902 | #endif |
1a557afc | 10903 | i += snprintf(&buf[i], REMAIN(i), " VSIs: %d QP: %d", |
7fd89545 | 10904 | pf->hw.func_caps.num_vsis, |
1a557afc | 10905 | pf->vsi[pf->lan_vsi]->num_queue_pairs); |
0c22b3dd | 10906 | if (pf->flags & I40E_FLAG_RSS_ENABLED) |
3b195843 | 10907 | i += snprintf(&buf[i], REMAIN(i), " RSS"); |
0c22b3dd | 10908 | if (pf->flags & I40E_FLAG_FD_ATR_ENABLED) |
3b195843 | 10909 | i += snprintf(&buf[i], REMAIN(i), " FD_ATR"); |
c6423ff1 | 10910 | if (pf->flags & I40E_FLAG_FD_SB_ENABLED) { |
3b195843 JP |
10911 | i += snprintf(&buf[i], REMAIN(i), " FD_SB"); |
10912 | i += snprintf(&buf[i], REMAIN(i), " NTUPLE"); | |
c6423ff1 | 10913 | } |
4d9b6043 | 10914 | if (pf->flags & I40E_FLAG_DCB_CAPABLE) |
3b195843 | 10915 | i += snprintf(&buf[i], REMAIN(i), " DCB"); |
3b195843 | 10916 | i += snprintf(&buf[i], REMAIN(i), " VxLAN"); |
6a899024 | 10917 | i += snprintf(&buf[i], REMAIN(i), " Geneve"); |
0c22b3dd | 10918 | if (pf->flags & I40E_FLAG_PTP) |
3b195843 | 10919 | i += snprintf(&buf[i], REMAIN(i), " PTP"); |
6dec1017 | 10920 | if (pf->flags & I40E_FLAG_VEB_MODE_ENABLED) |
3b195843 | 10921 | i += snprintf(&buf[i], REMAIN(i), " VEB"); |
6dec1017 | 10922 | else |
3b195843 | 10923 | i += snprintf(&buf[i], REMAIN(i), " VEPA"); |
0c22b3dd | 10924 | |
3b195843 JP |
10925 | dev_info(&pf->pdev->dev, "%s\n", buf); |
10926 | kfree(buf); | |
7fd89545 | 10927 | WARN_ON(i > INFO_STRING_LEN); |
0c22b3dd JB |
10928 | } |
10929 | ||
b499ffb0 SV |
10930 | /** |
10931 | * i40e_get_platform_mac_addr - get platform-specific MAC address | |
b499ffb0 SV |
10932 | * @pdev: PCI device information struct |
10933 | * @pf: board private structure | |
10934 | * | |
41c4c2b5 JK |
10935 | * Look up the MAC address for the device. First we'll try |
10936 | * eth_platform_get_mac_address, which will check Open Firmware, or arch | |
10937 | * specific fallback. Otherwise, we'll default to the stored value in | |
10938 | * firmware. | |
b499ffb0 SV |
10939 | **/ |
10940 | static void i40e_get_platform_mac_addr(struct pci_dev *pdev, struct i40e_pf *pf) | |
10941 | { | |
41c4c2b5 JK |
10942 | if (eth_platform_get_mac_address(&pdev->dev, pf->hw.mac.addr)) |
10943 | i40e_get_mac_addr(&pf->hw, pf->hw.mac.addr); | |
b499ffb0 SV |
10944 | } |
10945 | ||
41c445ff JB |
10946 | /** |
10947 | * i40e_probe - Device initialization routine | |
10948 | * @pdev: PCI device information struct | |
10949 | * @ent: entry in i40e_pci_tbl | |
10950 | * | |
b40c82e6 JK |
10951 | * i40e_probe initializes a PF identified by a pci_dev structure. |
10952 | * The OS initialization, configuring of the PF private structure, | |
41c445ff JB |
10953 | * and a hardware reset occur. |
10954 | * | |
10955 | * Returns 0 on success, negative on failure | |
10956 | **/ | |
10957 | static int i40e_probe(struct pci_dev *pdev, const struct pci_device_id *ent) | |
10958 | { | |
e827845c | 10959 | struct i40e_aq_get_phy_abilities_resp abilities; |
41c445ff JB |
10960 | struct i40e_pf *pf; |
10961 | struct i40e_hw *hw; | |
93cd765b | 10962 | static u16 pfs_found; |
1d5109d1 | 10963 | u16 wol_nvm_bits; |
d4dfb81a | 10964 | u16 link_status; |
6f66a484 | 10965 | int err; |
4f2f017c | 10966 | u32 val; |
8a9eb7d3 | 10967 | u32 i; |
58fc3267 | 10968 | u8 set_fc_aq_fail; |
41c445ff JB |
10969 | |
10970 | err = pci_enable_device_mem(pdev); | |
10971 | if (err) | |
10972 | return err; | |
10973 | ||
10974 | /* set up for high or low dma */ | |
6494294f | 10975 | err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64)); |
6494294f | 10976 | if (err) { |
e3e3bfdd JS |
10977 | err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32)); |
10978 | if (err) { | |
10979 | dev_err(&pdev->dev, | |
10980 | "DMA configuration failed: 0x%x\n", err); | |
10981 | goto err_dma; | |
10982 | } | |
41c445ff JB |
10983 | } |
10984 | ||
10985 | /* set up pci connections */ | |
56d766d6 | 10986 | err = pci_request_mem_regions(pdev, i40e_driver_name); |
41c445ff JB |
10987 | if (err) { |
10988 | dev_info(&pdev->dev, | |
10989 | "pci_request_selected_regions failed %d\n", err); | |
10990 | goto err_pci_reg; | |
10991 | } | |
10992 | ||
10993 | pci_enable_pcie_error_reporting(pdev); | |
10994 | pci_set_master(pdev); | |
10995 | ||
10996 | /* Now that we have a PCI connection, we need to do the | |
10997 | * low level device setup. This is primarily setting up | |
10998 | * the Admin Queue structures and then querying for the | |
10999 | * device's current profile information. | |
11000 | */ | |
11001 | pf = kzalloc(sizeof(*pf), GFP_KERNEL); | |
11002 | if (!pf) { | |
11003 | err = -ENOMEM; | |
11004 | goto err_pf_alloc; | |
11005 | } | |
11006 | pf->next_vsi = 0; | |
11007 | pf->pdev = pdev; | |
11008 | set_bit(__I40E_DOWN, &pf->state); | |
11009 | ||
11010 | hw = &pf->hw; | |
11011 | hw->back = pf; | |
232f4706 | 11012 | |
2ac8b675 SN |
11013 | pf->ioremap_len = min_t(int, pci_resource_len(pdev, 0), |
11014 | I40E_MAX_CSR_SPACE); | |
232f4706 | 11015 | |
2ac8b675 | 11016 | hw->hw_addr = ioremap(pci_resource_start(pdev, 0), pf->ioremap_len); |
41c445ff JB |
11017 | if (!hw->hw_addr) { |
11018 | err = -EIO; | |
11019 | dev_info(&pdev->dev, "ioremap(0x%04x, 0x%04x) failed: 0x%x\n", | |
11020 | (unsigned int)pci_resource_start(pdev, 0), | |
2ac8b675 | 11021 | pf->ioremap_len, err); |
41c445ff JB |
11022 | goto err_ioremap; |
11023 | } | |
11024 | hw->vendor_id = pdev->vendor; | |
11025 | hw->device_id = pdev->device; | |
11026 | pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id); | |
11027 | hw->subsystem_vendor_id = pdev->subsystem_vendor; | |
11028 | hw->subsystem_device_id = pdev->subsystem_device; | |
11029 | hw->bus.device = PCI_SLOT(pdev->devfn); | |
11030 | hw->bus.func = PCI_FUNC(pdev->devfn); | |
b3f028fc | 11031 | hw->bus.bus_id = pdev->bus->number; |
93cd765b | 11032 | pf->instance = pfs_found; |
41c445ff | 11033 | |
0e588de1 JK |
11034 | INIT_LIST_HEAD(&pf->l3_flex_pit_list); |
11035 | INIT_LIST_HEAD(&pf->l4_flex_pit_list); | |
11036 | ||
de03d2b0 SN |
11037 | /* set up the locks for the AQ, do this only once in probe |
11038 | * and destroy them only once in remove | |
11039 | */ | |
11040 | mutex_init(&hw->aq.asq_mutex); | |
11041 | mutex_init(&hw->aq.arq_mutex); | |
11042 | ||
5d4ca23e AD |
11043 | pf->msg_enable = netif_msg_init(debug, |
11044 | NETIF_MSG_DRV | | |
11045 | NETIF_MSG_PROBE | | |
11046 | NETIF_MSG_LINK); | |
11047 | if (debug < -1) | |
11048 | pf->hw.debug_mask = debug; | |
5b5faa43 | 11049 | |
7134f9ce JB |
11050 | /* do a special CORER for clearing PXE mode once at init */ |
11051 | if (hw->revision_id == 0 && | |
11052 | (rd32(hw, I40E_GLLAN_RCTL_0) & I40E_GLLAN_RCTL_0_PXE_MODE_MASK)) { | |
11053 | wr32(hw, I40E_GLGEN_RTRIG, I40E_GLGEN_RTRIG_CORER_MASK); | |
11054 | i40e_flush(hw); | |
11055 | msleep(200); | |
11056 | pf->corer_count++; | |
11057 | ||
11058 | i40e_clear_pxe_mode(hw); | |
11059 | } | |
11060 | ||
41c445ff | 11061 | /* Reset here to make sure all is clean and to define PF 'n' */ |
838d41d9 | 11062 | i40e_clear_hw(hw); |
41c445ff JB |
11063 | err = i40e_pf_reset(hw); |
11064 | if (err) { | |
11065 | dev_info(&pdev->dev, "Initial pf_reset failed: %d\n", err); | |
11066 | goto err_pf_reset; | |
11067 | } | |
11068 | pf->pfr_count++; | |
11069 | ||
11070 | hw->aq.num_arq_entries = I40E_AQ_LEN; | |
11071 | hw->aq.num_asq_entries = I40E_AQ_LEN; | |
11072 | hw->aq.arq_buf_size = I40E_MAX_AQ_BUF_SIZE; | |
11073 | hw->aq.asq_buf_size = I40E_MAX_AQ_BUF_SIZE; | |
11074 | pf->adminq_work_limit = I40E_AQ_WORK_LIMIT; | |
b2008cbf | 11075 | |
b294ac70 | 11076 | snprintf(pf->int_name, sizeof(pf->int_name) - 1, |
b2008cbf CW |
11077 | "%s-%s:misc", |
11078 | dev_driver_string(&pf->pdev->dev), dev_name(&pdev->dev)); | |
41c445ff JB |
11079 | |
11080 | err = i40e_init_shared_code(hw); | |
11081 | if (err) { | |
b2a75c58 ASJ |
11082 | dev_warn(&pdev->dev, "unidentified MAC or BLANK NVM: %d\n", |
11083 | err); | |
41c445ff JB |
11084 | goto err_pf_reset; |
11085 | } | |
11086 | ||
d52c20b7 JB |
11087 | /* set up a default setting for link flow control */ |
11088 | pf->hw.fc.requested_mode = I40E_FC_NONE; | |
11089 | ||
41c445ff | 11090 | err = i40e_init_adminq(hw); |
2b2426a7 CW |
11091 | if (err) { |
11092 | if (err == I40E_ERR_FIRMWARE_API_VERSION) | |
11093 | dev_info(&pdev->dev, | |
11094 | "The driver for the device stopped because the NVM image is newer than expected. You must install the most recent version of the network driver.\n"); | |
11095 | else | |
11096 | dev_info(&pdev->dev, | |
11097 | "The driver for the device stopped because the device firmware failed to init. Try updating your NVM image.\n"); | |
11098 | ||
11099 | goto err_pf_reset; | |
11100 | } | |
f0b44440 | 11101 | |
6dec1017 SN |
11102 | /* provide nvm, fw, api versions */ |
11103 | dev_info(&pdev->dev, "fw %d.%d.%05d api %d.%d nvm %s\n", | |
11104 | hw->aq.fw_maj_ver, hw->aq.fw_min_ver, hw->aq.fw_build, | |
11105 | hw->aq.api_maj_ver, hw->aq.api_min_ver, | |
11106 | i40e_nvm_version_str(hw)); | |
f0b44440 | 11107 | |
7aa67613 CS |
11108 | if (hw->aq.api_maj_ver == I40E_FW_API_VERSION_MAJOR && |
11109 | hw->aq.api_min_ver > I40E_FW_API_VERSION_MINOR) | |
278b6f62 | 11110 | dev_info(&pdev->dev, |
7aa67613 CS |
11111 | "The driver for the device detected a newer version of the NVM image than expected. Please install the most recent version of the network driver.\n"); |
11112 | else if (hw->aq.api_maj_ver < I40E_FW_API_VERSION_MAJOR || | |
11113 | hw->aq.api_min_ver < (I40E_FW_API_VERSION_MINOR - 1)) | |
278b6f62 | 11114 | dev_info(&pdev->dev, |
7aa67613 | 11115 | "The driver for the device detected an older version of the NVM image than expected. Please update the NVM image.\n"); |
278b6f62 | 11116 | |
4eb3f768 SN |
11117 | i40e_verify_eeprom(pf); |
11118 | ||
2c5fe33b JB |
11119 | /* Rev 0 hardware was never productized */ |
11120 | if (hw->revision_id < 1) | |
11121 | dev_warn(&pdev->dev, "This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\n"); | |
11122 | ||
6ff4ef86 | 11123 | i40e_clear_pxe_mode(hw); |
41c445ff JB |
11124 | err = i40e_get_capabilities(pf); |
11125 | if (err) | |
11126 | goto err_adminq_setup; | |
11127 | ||
11128 | err = i40e_sw_init(pf); | |
11129 | if (err) { | |
11130 | dev_info(&pdev->dev, "sw_init failed: %d\n", err); | |
11131 | goto err_sw_init; | |
11132 | } | |
11133 | ||
11134 | err = i40e_init_lan_hmc(hw, hw->func_caps.num_tx_qp, | |
c76cb6ed | 11135 | hw->func_caps.num_rx_qp, 0, 0); |
41c445ff JB |
11136 | if (err) { |
11137 | dev_info(&pdev->dev, "init_lan_hmc failed: %d\n", err); | |
11138 | goto err_init_lan_hmc; | |
11139 | } | |
11140 | ||
11141 | err = i40e_configure_lan_hmc(hw, I40E_HMC_MODEL_DIRECT_ONLY); | |
11142 | if (err) { | |
11143 | dev_info(&pdev->dev, "configure_lan_hmc failed: %d\n", err); | |
11144 | err = -ENOENT; | |
11145 | goto err_configure_lan_hmc; | |
11146 | } | |
11147 | ||
b686ece5 NP |
11148 | /* Disable LLDP for NICs that have firmware versions lower than v4.3. |
11149 | * Ignore error return codes because if it was already disabled via | |
11150 | * hardware settings this will fail | |
11151 | */ | |
f1bbad33 | 11152 | if (pf->flags & I40E_FLAG_STOP_FW_LLDP) { |
b686ece5 NP |
11153 | dev_info(&pdev->dev, "Stopping firmware LLDP agent.\n"); |
11154 | i40e_aq_stop_lldp(hw, true, NULL); | |
11155 | } | |
11156 | ||
b499ffb0 SV |
11157 | /* allow a platform config to override the HW addr */ |
11158 | i40e_get_platform_mac_addr(pdev, pf); | |
41c4c2b5 | 11159 | |
f62b5060 | 11160 | if (!is_valid_ether_addr(hw->mac.addr)) { |
41c445ff JB |
11161 | dev_info(&pdev->dev, "invalid MAC address %pM\n", hw->mac.addr); |
11162 | err = -EIO; | |
11163 | goto err_mac_addr; | |
11164 | } | |
11165 | dev_info(&pdev->dev, "MAC address: %pM\n", hw->mac.addr); | |
9a173901 | 11166 | ether_addr_copy(hw->mac.perm_addr, hw->mac.addr); |
1f224ad2 NP |
11167 | i40e_get_port_mac_addr(hw, hw->mac.port_addr); |
11168 | if (is_valid_ether_addr(hw->mac.port_addr)) | |
11169 | pf->flags |= I40E_FLAG_PORT_ID_VALID; | |
41c445ff JB |
11170 | |
11171 | pci_set_drvdata(pdev, pf); | |
11172 | pci_save_state(pdev); | |
4e3b35b0 NP |
11173 | #ifdef CONFIG_I40E_DCB |
11174 | err = i40e_init_pf_dcb(pf); | |
11175 | if (err) { | |
aebfc816 | 11176 | dev_info(&pdev->dev, "DCB init failed %d, disabled\n", err); |
c17ef430 | 11177 | pf->flags &= ~(I40E_FLAG_DCB_CAPABLE | I40E_FLAG_DCB_ENABLED); |
014269ff | 11178 | /* Continue without DCB enabled */ |
4e3b35b0 NP |
11179 | } |
11180 | #endif /* CONFIG_I40E_DCB */ | |
41c445ff JB |
11181 | |
11182 | /* set up periodic task facility */ | |
11183 | setup_timer(&pf->service_timer, i40e_service_timer, (unsigned long)pf); | |
11184 | pf->service_timer_period = HZ; | |
11185 | ||
11186 | INIT_WORK(&pf->service_task, i40e_service_task); | |
11187 | clear_bit(__I40E_SERVICE_SCHED, &pf->state); | |
41c445ff | 11188 | |
1d5109d1 SN |
11189 | /* NVM bit on means WoL disabled for the port */ |
11190 | i40e_read_nvm_word(hw, I40E_SR_NVM_WAKE_ON_LAN, &wol_nvm_bits); | |
75f5cea9 | 11191 | if (BIT (hw->port) & wol_nvm_bits || hw->partition_id != 1) |
1d5109d1 SN |
11192 | pf->wol_en = false; |
11193 | else | |
11194 | pf->wol_en = true; | |
8e2773ae SN |
11195 | device_set_wakeup_enable(&pf->pdev->dev, pf->wol_en); |
11196 | ||
41c445ff JB |
11197 | /* set up the main switch operations */ |
11198 | i40e_determine_queue_usage(pf); | |
c1147280 JB |
11199 | err = i40e_init_interrupt_scheme(pf); |
11200 | if (err) | |
11201 | goto err_switch_setup; | |
41c445ff | 11202 | |
505682cd MW |
11203 | /* The number of VSIs reported by the FW is the minimum guaranteed |
11204 | * to us; HW supports far more and we share the remaining pool with | |
11205 | * the other PFs. We allocate space for more than the guarantee with | |
11206 | * the understanding that we might not get them all later. | |
41c445ff | 11207 | */ |
505682cd MW |
11208 | if (pf->hw.func_caps.num_vsis < I40E_MIN_VSI_ALLOC) |
11209 | pf->num_alloc_vsi = I40E_MIN_VSI_ALLOC; | |
11210 | else | |
11211 | pf->num_alloc_vsi = pf->hw.func_caps.num_vsis; | |
11212 | ||
11213 | /* Set up the *vsi struct and our local tracking of the MAIN PF vsi. */ | |
d17038d6 JB |
11214 | pf->vsi = kcalloc(pf->num_alloc_vsi, sizeof(struct i40e_vsi *), |
11215 | GFP_KERNEL); | |
ed87ac09 WY |
11216 | if (!pf->vsi) { |
11217 | err = -ENOMEM; | |
41c445ff | 11218 | goto err_switch_setup; |
ed87ac09 | 11219 | } |
41c445ff | 11220 | |
fa11cb3d ASJ |
11221 | #ifdef CONFIG_PCI_IOV |
11222 | /* prep for VF support */ | |
11223 | if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) && | |
11224 | (pf->flags & I40E_FLAG_MSIX_ENABLED) && | |
11225 | !test_bit(__I40E_BAD_EEPROM, &pf->state)) { | |
11226 | if (pci_num_vf(pdev)) | |
11227 | pf->flags |= I40E_FLAG_VEB_MODE_ENABLED; | |
11228 | } | |
11229 | #endif | |
bc7d338f | 11230 | err = i40e_setup_pf_switch(pf, false); |
41c445ff JB |
11231 | if (err) { |
11232 | dev_info(&pdev->dev, "setup_pf_switch failed: %d\n", err); | |
11233 | goto err_vsis; | |
11234 | } | |
58fc3267 HZ |
11235 | |
11236 | /* Make sure flow control is set according to current settings */ | |
11237 | err = i40e_set_fc(hw, &set_fc_aq_fail, true); | |
11238 | if (set_fc_aq_fail & I40E_SET_FC_AQ_FAIL_GET) | |
11239 | dev_dbg(&pf->pdev->dev, | |
11240 | "Set fc with err %s aq_err %s on get_phy_cap\n", | |
11241 | i40e_stat_str(hw, err), | |
11242 | i40e_aq_str(hw, hw->aq.asq_last_status)); | |
11243 | if (set_fc_aq_fail & I40E_SET_FC_AQ_FAIL_SET) | |
11244 | dev_dbg(&pf->pdev->dev, | |
11245 | "Set fc with err %s aq_err %s on set_phy_config\n", | |
11246 | i40e_stat_str(hw, err), | |
11247 | i40e_aq_str(hw, hw->aq.asq_last_status)); | |
11248 | if (set_fc_aq_fail & I40E_SET_FC_AQ_FAIL_UPDATE) | |
11249 | dev_dbg(&pf->pdev->dev, | |
11250 | "Set fc with err %s aq_err %s on get_link_info\n", | |
11251 | i40e_stat_str(hw, err), | |
11252 | i40e_aq_str(hw, hw->aq.asq_last_status)); | |
11253 | ||
8a9eb7d3 | 11254 | /* if FDIR VSI was set up, start it now */ |
505682cd | 11255 | for (i = 0; i < pf->num_alloc_vsi; i++) { |
8a9eb7d3 SN |
11256 | if (pf->vsi[i] && pf->vsi[i]->type == I40E_VSI_FDIR) { |
11257 | i40e_vsi_open(pf->vsi[i]); | |
11258 | break; | |
11259 | } | |
11260 | } | |
41c445ff | 11261 | |
2f0aff41 SN |
11262 | /* The driver only wants link up/down and module qualification |
11263 | * reports from firmware. Note the negative logic. | |
7e2453fe JB |
11264 | */ |
11265 | err = i40e_aq_set_phy_int_mask(&pf->hw, | |
2f0aff41 | 11266 | ~(I40E_AQ_EVENT_LINK_UPDOWN | |
867a79e3 | 11267 | I40E_AQ_EVENT_MEDIA_NA | |
2f0aff41 | 11268 | I40E_AQ_EVENT_MODULE_QUAL_FAIL), NULL); |
7e2453fe | 11269 | if (err) |
f1c7e72e SN |
11270 | dev_info(&pf->pdev->dev, "set phy mask fail, err %s aq_err %s\n", |
11271 | i40e_stat_str(&pf->hw, err), | |
11272 | i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status)); | |
7e2453fe | 11273 | |
4f2f017c ASJ |
11274 | /* Reconfigure hardware for allowing smaller MSS in the case |
11275 | * of TSO, so that we avoid the MDD being fired and causing | |
11276 | * a reset in the case of small MSS+TSO. | |
11277 | */ | |
11278 | val = rd32(hw, I40E_REG_MSS); | |
11279 | if ((val & I40E_REG_MSS_MIN_MASK) > I40E_64BYTE_MSS) { | |
11280 | val &= ~I40E_REG_MSS_MIN_MASK; | |
11281 | val |= I40E_64BYTE_MSS; | |
11282 | wr32(hw, I40E_REG_MSS, val); | |
11283 | } | |
11284 | ||
8eed76fa | 11285 | if (pf->flags & I40E_FLAG_RESTART_AUTONEG) { |
025b4a54 ASJ |
11286 | msleep(75); |
11287 | err = i40e_aq_set_link_restart_an(&pf->hw, true, NULL); | |
11288 | if (err) | |
f1c7e72e SN |
11289 | dev_info(&pf->pdev->dev, "link restart failed, err %s aq_err %s\n", |
11290 | i40e_stat_str(&pf->hw, err), | |
11291 | i40e_aq_str(&pf->hw, | |
11292 | pf->hw.aq.asq_last_status)); | |
cafa2ee6 | 11293 | } |
41c445ff JB |
11294 | /* The main driver is (mostly) up and happy. We need to set this state |
11295 | * before setting up the misc vector or we get a race and the vector | |
11296 | * ends up disabled forever. | |
11297 | */ | |
11298 | clear_bit(__I40E_DOWN, &pf->state); | |
11299 | ||
11300 | /* In case of MSIX we are going to setup the misc vector right here | |
11301 | * to handle admin queue events etc. In case of legacy and MSI | |
11302 | * the misc functionality and queue processing is combined in | |
11303 | * the same vector and that gets setup at open. | |
11304 | */ | |
11305 | if (pf->flags & I40E_FLAG_MSIX_ENABLED) { | |
11306 | err = i40e_setup_misc_vector(pf); | |
11307 | if (err) { | |
11308 | dev_info(&pdev->dev, | |
11309 | "setup of misc vector failed: %d\n", err); | |
11310 | goto err_vsis; | |
11311 | } | |
11312 | } | |
11313 | ||
df805f62 | 11314 | #ifdef CONFIG_PCI_IOV |
41c445ff JB |
11315 | /* prep for VF support */ |
11316 | if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) && | |
4eb3f768 SN |
11317 | (pf->flags & I40E_FLAG_MSIX_ENABLED) && |
11318 | !test_bit(__I40E_BAD_EEPROM, &pf->state)) { | |
41c445ff JB |
11319 | /* disable link interrupts for VFs */ |
11320 | val = rd32(hw, I40E_PFGEN_PORTMDIO_NUM); | |
11321 | val &= ~I40E_PFGEN_PORTMDIO_NUM_VFLINK_STAT_ENA_MASK; | |
11322 | wr32(hw, I40E_PFGEN_PORTMDIO_NUM, val); | |
11323 | i40e_flush(hw); | |
4aeec010 MW |
11324 | |
11325 | if (pci_num_vf(pdev)) { | |
11326 | dev_info(&pdev->dev, | |
11327 | "Active VFs found, allocating resources.\n"); | |
11328 | err = i40e_alloc_vfs(pf, pci_num_vf(pdev)); | |
11329 | if (err) | |
11330 | dev_info(&pdev->dev, | |
11331 | "Error %d allocating resources for existing VFs\n", | |
11332 | err); | |
11333 | } | |
41c445ff | 11334 | } |
df805f62 | 11335 | #endif /* CONFIG_PCI_IOV */ |
41c445ff | 11336 | |
e3219ce6 ASJ |
11337 | if (pf->flags & I40E_FLAG_IWARP_ENABLED) { |
11338 | pf->iwarp_base_vector = i40e_get_lump(pf, pf->irq_pile, | |
11339 | pf->num_iwarp_msix, | |
11340 | I40E_IWARP_IRQ_PILE_ID); | |
11341 | if (pf->iwarp_base_vector < 0) { | |
11342 | dev_info(&pdev->dev, | |
11343 | "failed to get tracking for %d vectors for IWARP err=%d\n", | |
11344 | pf->num_iwarp_msix, pf->iwarp_base_vector); | |
11345 | pf->flags &= ~I40E_FLAG_IWARP_ENABLED; | |
11346 | } | |
11347 | } | |
93cd765b | 11348 | |
41c445ff JB |
11349 | i40e_dbg_pf_init(pf); |
11350 | ||
11351 | /* tell the firmware that we're starting */ | |
44033fac | 11352 | i40e_send_version(pf); |
41c445ff JB |
11353 | |
11354 | /* since everything's happy, start the service_task timer */ | |
11355 | mod_timer(&pf->service_timer, | |
11356 | round_jiffies(jiffies + pf->service_timer_period)); | |
11357 | ||
e3219ce6 | 11358 | /* add this PF to client device list and launch a client service task */ |
004eb614 MW |
11359 | if (pf->flags & I40E_FLAG_IWARP_ENABLED) { |
11360 | err = i40e_lan_add_device(pf); | |
11361 | if (err) | |
11362 | dev_info(&pdev->dev, "Failed to add PF to client API service list: %d\n", | |
11363 | err); | |
11364 | } | |
e3219ce6 | 11365 | |
3fced535 ASJ |
11366 | #define PCI_SPEED_SIZE 8 |
11367 | #define PCI_WIDTH_SIZE 8 | |
11368 | /* Devices on the IOSF bus do not have this information | |
11369 | * and will report PCI Gen 1 x 1 by default so don't bother | |
11370 | * checking them. | |
11371 | */ | |
11372 | if (!(pf->flags & I40E_FLAG_NO_PCI_LINK_CHECK)) { | |
11373 | char speed[PCI_SPEED_SIZE] = "Unknown"; | |
11374 | char width[PCI_WIDTH_SIZE] = "Unknown"; | |
11375 | ||
11376 | /* Get the negotiated link width and speed from PCI config | |
11377 | * space | |
11378 | */ | |
11379 | pcie_capability_read_word(pf->pdev, PCI_EXP_LNKSTA, | |
11380 | &link_status); | |
11381 | ||
11382 | i40e_set_pci_config_data(hw, link_status); | |
11383 | ||
11384 | switch (hw->bus.speed) { | |
11385 | case i40e_bus_speed_8000: | |
11386 | strncpy(speed, "8.0", PCI_SPEED_SIZE); break; | |
11387 | case i40e_bus_speed_5000: | |
11388 | strncpy(speed, "5.0", PCI_SPEED_SIZE); break; | |
11389 | case i40e_bus_speed_2500: | |
11390 | strncpy(speed, "2.5", PCI_SPEED_SIZE); break; | |
11391 | default: | |
11392 | break; | |
11393 | } | |
11394 | switch (hw->bus.width) { | |
11395 | case i40e_bus_width_pcie_x8: | |
11396 | strncpy(width, "8", PCI_WIDTH_SIZE); break; | |
11397 | case i40e_bus_width_pcie_x4: | |
11398 | strncpy(width, "4", PCI_WIDTH_SIZE); break; | |
11399 | case i40e_bus_width_pcie_x2: | |
11400 | strncpy(width, "2", PCI_WIDTH_SIZE); break; | |
11401 | case i40e_bus_width_pcie_x1: | |
11402 | strncpy(width, "1", PCI_WIDTH_SIZE); break; | |
11403 | default: | |
11404 | break; | |
11405 | } | |
11406 | ||
11407 | dev_info(&pdev->dev, "PCI-Express: Speed %sGT/s Width x%s\n", | |
11408 | speed, width); | |
11409 | ||
11410 | if (hw->bus.width < i40e_bus_width_pcie_x8 || | |
11411 | hw->bus.speed < i40e_bus_speed_8000) { | |
11412 | dev_warn(&pdev->dev, "PCI-Express bandwidth available for this device may be insufficient for optimal performance.\n"); | |
11413 | dev_warn(&pdev->dev, "Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\n"); | |
11414 | } | |
d4dfb81a CS |
11415 | } |
11416 | ||
e827845c CS |
11417 | /* get the requested speeds from the fw */ |
11418 | err = i40e_aq_get_phy_capabilities(hw, false, false, &abilities, NULL); | |
11419 | if (err) | |
8279e495 NP |
11420 | dev_dbg(&pf->pdev->dev, "get requested speeds ret = %s last_status = %s\n", |
11421 | i40e_stat_str(&pf->hw, err), | |
11422 | i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status)); | |
e827845c CS |
11423 | pf->hw.phy.link_info.requested_speeds = abilities.link_speed; |
11424 | ||
fc72dbce CS |
11425 | /* get the supported phy types from the fw */ |
11426 | err = i40e_aq_get_phy_capabilities(hw, false, true, &abilities, NULL); | |
11427 | if (err) | |
11428 | dev_dbg(&pf->pdev->dev, "get supported phy types ret = %s last_status = %s\n", | |
11429 | i40e_stat_str(&pf->hw, err), | |
11430 | i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status)); | |
fc72dbce | 11431 | |
e7358f54 ASJ |
11432 | /* Add a filter to drop all Flow control frames from any VSI from being |
11433 | * transmitted. By doing so we stop a malicious VF from sending out | |
11434 | * PAUSE or PFC frames and potentially controlling traffic for other | |
11435 | * PF/VF VSIs. | |
11436 | * The FW can still send Flow control frames if enabled. | |
11437 | */ | |
11438 | i40e_add_filter_to_drop_tx_flow_control_frames(&pf->hw, | |
11439 | pf->main_vsi_seid); | |
11440 | ||
31b606d0 | 11441 | if ((pf->hw.device_id == I40E_DEV_ID_10G_BASE_T) || |
4f9b4307 HT |
11442 | (pf->hw.device_id == I40E_DEV_ID_10G_BASE_T4)) |
11443 | pf->flags |= I40E_FLAG_PHY_CONTROLS_LEDS; | |
4ad9f4f9 HR |
11444 | if (pf->hw.device_id == I40E_DEV_ID_SFP_I_X722) |
11445 | pf->flags |= I40E_FLAG_HAVE_CRT_RETIMER; | |
0c22b3dd JB |
11446 | /* print a string summarizing features */ |
11447 | i40e_print_features(pf); | |
11448 | ||
41c445ff JB |
11449 | return 0; |
11450 | ||
11451 | /* Unwind what we've done if something failed in the setup */ | |
11452 | err_vsis: | |
11453 | set_bit(__I40E_DOWN, &pf->state); | |
41c445ff JB |
11454 | i40e_clear_interrupt_scheme(pf); |
11455 | kfree(pf->vsi); | |
04b03013 SN |
11456 | err_switch_setup: |
11457 | i40e_reset_interrupt_capability(pf); | |
41c445ff JB |
11458 | del_timer_sync(&pf->service_timer); |
11459 | err_mac_addr: | |
11460 | err_configure_lan_hmc: | |
11461 | (void)i40e_shutdown_lan_hmc(hw); | |
11462 | err_init_lan_hmc: | |
11463 | kfree(pf->qp_pile); | |
41c445ff JB |
11464 | err_sw_init: |
11465 | err_adminq_setup: | |
41c445ff JB |
11466 | err_pf_reset: |
11467 | iounmap(hw->hw_addr); | |
11468 | err_ioremap: | |
11469 | kfree(pf); | |
11470 | err_pf_alloc: | |
11471 | pci_disable_pcie_error_reporting(pdev); | |
56d766d6 | 11472 | pci_release_mem_regions(pdev); |
41c445ff JB |
11473 | err_pci_reg: |
11474 | err_dma: | |
11475 | pci_disable_device(pdev); | |
11476 | return err; | |
11477 | } | |
11478 | ||
11479 | /** | |
11480 | * i40e_remove - Device removal routine | |
11481 | * @pdev: PCI device information struct | |
11482 | * | |
11483 | * i40e_remove is called by the PCI subsystem to alert the driver | |
11484 | * that is should release a PCI device. This could be caused by a | |
11485 | * Hot-Plug event, or because the driver is going to be removed from | |
11486 | * memory. | |
11487 | **/ | |
11488 | static void i40e_remove(struct pci_dev *pdev) | |
11489 | { | |
11490 | struct i40e_pf *pf = pci_get_drvdata(pdev); | |
bcab2db9 | 11491 | struct i40e_hw *hw = &pf->hw; |
41c445ff | 11492 | i40e_status ret_code; |
41c445ff JB |
11493 | int i; |
11494 | ||
11495 | i40e_dbg_pf_exit(pf); | |
11496 | ||
beb0dff1 JK |
11497 | i40e_ptp_stop(pf); |
11498 | ||
bcab2db9 | 11499 | /* Disable RSS in hw */ |
272cdaf2 SN |
11500 | i40e_write_rx_ctl(hw, I40E_PFQF_HENA(0), 0); |
11501 | i40e_write_rx_ctl(hw, I40E_PFQF_HENA(1), 0); | |
bcab2db9 | 11502 | |
41c445ff | 11503 | /* no more scheduling of any task */ |
a4618ec8 | 11504 | set_bit(__I40E_SUSPENDED, &pf->state); |
41c445ff | 11505 | set_bit(__I40E_DOWN, &pf->state); |
c99abb4c SN |
11506 | if (pf->service_timer.data) |
11507 | del_timer_sync(&pf->service_timer); | |
11508 | if (pf->service_task.func) | |
11509 | cancel_work_sync(&pf->service_task); | |
41c445ff | 11510 | |
921c467c MW |
11511 | /* Client close must be called explicitly here because the timer |
11512 | * has been stopped. | |
11513 | */ | |
11514 | i40e_notify_client_of_netdev_close(pf->vsi[pf->lan_vsi], false); | |
11515 | ||
eb2d80bc MW |
11516 | if (pf->flags & I40E_FLAG_SRIOV_ENABLED) { |
11517 | i40e_free_vfs(pf); | |
11518 | pf->flags &= ~I40E_FLAG_SRIOV_ENABLED; | |
11519 | } | |
11520 | ||
41c445ff JB |
11521 | i40e_fdir_teardown(pf); |
11522 | ||
11523 | /* If there is a switch structure or any orphans, remove them. | |
11524 | * This will leave only the PF's VSI remaining. | |
11525 | */ | |
11526 | for (i = 0; i < I40E_MAX_VEB; i++) { | |
11527 | if (!pf->veb[i]) | |
11528 | continue; | |
11529 | ||
11530 | if (pf->veb[i]->uplink_seid == pf->mac_seid || | |
11531 | pf->veb[i]->uplink_seid == 0) | |
11532 | i40e_switch_branch_release(pf->veb[i]); | |
11533 | } | |
11534 | ||
11535 | /* Now we can shutdown the PF's VSI, just before we kill | |
11536 | * adminq and hmc. | |
11537 | */ | |
11538 | if (pf->vsi[pf->lan_vsi]) | |
11539 | i40e_vsi_release(pf->vsi[pf->lan_vsi]); | |
11540 | ||
e3219ce6 | 11541 | /* remove attached clients */ |
004eb614 MW |
11542 | if (pf->flags & I40E_FLAG_IWARP_ENABLED) { |
11543 | ret_code = i40e_lan_del_device(pf); | |
11544 | if (ret_code) | |
11545 | dev_warn(&pdev->dev, "Failed to delete client device: %d\n", | |
11546 | ret_code); | |
e3219ce6 ASJ |
11547 | } |
11548 | ||
41c445ff | 11549 | /* shutdown and destroy the HMC */ |
f734dfff JB |
11550 | if (hw->hmc.hmc_obj) { |
11551 | ret_code = i40e_shutdown_lan_hmc(hw); | |
60442dea SN |
11552 | if (ret_code) |
11553 | dev_warn(&pdev->dev, | |
11554 | "Failed to destroy the HMC resources: %d\n", | |
11555 | ret_code); | |
11556 | } | |
41c445ff JB |
11557 | |
11558 | /* shutdown the adminq */ | |
ac9c5c6d | 11559 | i40e_shutdown_adminq(hw); |
41c445ff | 11560 | |
8ddb3326 JB |
11561 | /* destroy the locks only once, here */ |
11562 | mutex_destroy(&hw->aq.arq_mutex); | |
11563 | mutex_destroy(&hw->aq.asq_mutex); | |
11564 | ||
41c445ff JB |
11565 | /* Clear all dynamic memory lists of rings, q_vectors, and VSIs */ |
11566 | i40e_clear_interrupt_scheme(pf); | |
505682cd | 11567 | for (i = 0; i < pf->num_alloc_vsi; i++) { |
41c445ff JB |
11568 | if (pf->vsi[i]) { |
11569 | i40e_vsi_clear_rings(pf->vsi[i]); | |
11570 | i40e_vsi_clear(pf->vsi[i]); | |
11571 | pf->vsi[i] = NULL; | |
11572 | } | |
11573 | } | |
11574 | ||
11575 | for (i = 0; i < I40E_MAX_VEB; i++) { | |
11576 | kfree(pf->veb[i]); | |
11577 | pf->veb[i] = NULL; | |
11578 | } | |
11579 | ||
11580 | kfree(pf->qp_pile); | |
41c445ff JB |
11581 | kfree(pf->vsi); |
11582 | ||
f734dfff | 11583 | iounmap(hw->hw_addr); |
41c445ff | 11584 | kfree(pf); |
56d766d6 | 11585 | pci_release_mem_regions(pdev); |
41c445ff JB |
11586 | |
11587 | pci_disable_pcie_error_reporting(pdev); | |
11588 | pci_disable_device(pdev); | |
11589 | } | |
11590 | ||
11591 | /** | |
11592 | * i40e_pci_error_detected - warning that something funky happened in PCI land | |
11593 | * @pdev: PCI device information struct | |
11594 | * | |
11595 | * Called to warn that something happened and the error handling steps | |
11596 | * are in progress. Allows the driver to quiesce things, be ready for | |
11597 | * remediation. | |
11598 | **/ | |
11599 | static pci_ers_result_t i40e_pci_error_detected(struct pci_dev *pdev, | |
11600 | enum pci_channel_state error) | |
11601 | { | |
11602 | struct i40e_pf *pf = pci_get_drvdata(pdev); | |
11603 | ||
11604 | dev_info(&pdev->dev, "%s: error %d\n", __func__, error); | |
11605 | ||
edfc23ee GP |
11606 | if (!pf) { |
11607 | dev_info(&pdev->dev, | |
11608 | "Cannot recover - error happened during device probe\n"); | |
11609 | return PCI_ERS_RESULT_DISCONNECT; | |
11610 | } | |
11611 | ||
41c445ff | 11612 | /* shutdown all operations */ |
9007bccd SN |
11613 | if (!test_bit(__I40E_SUSPENDED, &pf->state)) { |
11614 | rtnl_lock(); | |
373149fc | 11615 | i40e_prep_for_reset(pf, true); |
9007bccd SN |
11616 | rtnl_unlock(); |
11617 | } | |
41c445ff JB |
11618 | |
11619 | /* Request a slot reset */ | |
11620 | return PCI_ERS_RESULT_NEED_RESET; | |
11621 | } | |
11622 | ||
11623 | /** | |
11624 | * i40e_pci_error_slot_reset - a PCI slot reset just happened | |
11625 | * @pdev: PCI device information struct | |
11626 | * | |
11627 | * Called to find if the driver can work with the device now that | |
11628 | * the pci slot has been reset. If a basic connection seems good | |
11629 | * (registers are readable and have sane content) then return a | |
11630 | * happy little PCI_ERS_RESULT_xxx. | |
11631 | **/ | |
11632 | static pci_ers_result_t i40e_pci_error_slot_reset(struct pci_dev *pdev) | |
11633 | { | |
11634 | struct i40e_pf *pf = pci_get_drvdata(pdev); | |
11635 | pci_ers_result_t result; | |
11636 | int err; | |
11637 | u32 reg; | |
11638 | ||
fb43201f | 11639 | dev_dbg(&pdev->dev, "%s\n", __func__); |
41c445ff JB |
11640 | if (pci_enable_device_mem(pdev)) { |
11641 | dev_info(&pdev->dev, | |
11642 | "Cannot re-enable PCI device after reset.\n"); | |
11643 | result = PCI_ERS_RESULT_DISCONNECT; | |
11644 | } else { | |
11645 | pci_set_master(pdev); | |
11646 | pci_restore_state(pdev); | |
11647 | pci_save_state(pdev); | |
11648 | pci_wake_from_d3(pdev, false); | |
11649 | ||
11650 | reg = rd32(&pf->hw, I40E_GLGEN_RTRIG); | |
11651 | if (reg == 0) | |
11652 | result = PCI_ERS_RESULT_RECOVERED; | |
11653 | else | |
11654 | result = PCI_ERS_RESULT_DISCONNECT; | |
11655 | } | |
11656 | ||
11657 | err = pci_cleanup_aer_uncorrect_error_status(pdev); | |
11658 | if (err) { | |
11659 | dev_info(&pdev->dev, | |
11660 | "pci_cleanup_aer_uncorrect_error_status failed 0x%0x\n", | |
11661 | err); | |
11662 | /* non-fatal, continue */ | |
11663 | } | |
11664 | ||
11665 | return result; | |
11666 | } | |
11667 | ||
11668 | /** | |
11669 | * i40e_pci_error_resume - restart operations after PCI error recovery | |
11670 | * @pdev: PCI device information struct | |
11671 | * | |
11672 | * Called to allow the driver to bring things back up after PCI error | |
11673 | * and/or reset recovery has finished. | |
11674 | **/ | |
11675 | static void i40e_pci_error_resume(struct pci_dev *pdev) | |
11676 | { | |
11677 | struct i40e_pf *pf = pci_get_drvdata(pdev); | |
11678 | ||
fb43201f | 11679 | dev_dbg(&pdev->dev, "%s\n", __func__); |
9007bccd SN |
11680 | if (test_bit(__I40E_SUSPENDED, &pf->state)) |
11681 | return; | |
11682 | ||
11683 | rtnl_lock(); | |
373149fc | 11684 | i40e_handle_reset_warning(pf, true); |
4c4935a9 | 11685 | rtnl_unlock(); |
9007bccd SN |
11686 | } |
11687 | ||
1d68005d JH |
11688 | /** |
11689 | * i40e_enable_mc_magic_wake - enable multicast magic packet wake up | |
11690 | * using the mac_address_write admin q function | |
11691 | * @pf: pointer to i40e_pf struct | |
11692 | **/ | |
11693 | static void i40e_enable_mc_magic_wake(struct i40e_pf *pf) | |
11694 | { | |
11695 | struct i40e_hw *hw = &pf->hw; | |
11696 | i40e_status ret; | |
11697 | u8 mac_addr[6]; | |
11698 | u16 flags = 0; | |
11699 | ||
11700 | /* Get current MAC address in case it's an LAA */ | |
11701 | if (pf->vsi[pf->lan_vsi] && pf->vsi[pf->lan_vsi]->netdev) { | |
11702 | ether_addr_copy(mac_addr, | |
11703 | pf->vsi[pf->lan_vsi]->netdev->dev_addr); | |
11704 | } else { | |
11705 | dev_err(&pf->pdev->dev, | |
11706 | "Failed to retrieve MAC address; using default\n"); | |
11707 | ether_addr_copy(mac_addr, hw->mac.addr); | |
11708 | } | |
11709 | ||
11710 | /* The FW expects the mac address write cmd to first be called with | |
11711 | * one of these flags before calling it again with the multicast | |
11712 | * enable flags. | |
11713 | */ | |
11714 | flags = I40E_AQC_WRITE_TYPE_LAA_WOL; | |
11715 | ||
11716 | if (hw->func_caps.flex10_enable && hw->partition_id != 1) | |
11717 | flags = I40E_AQC_WRITE_TYPE_LAA_ONLY; | |
11718 | ||
11719 | ret = i40e_aq_mac_address_write(hw, flags, mac_addr, NULL); | |
11720 | if (ret) { | |
11721 | dev_err(&pf->pdev->dev, | |
11722 | "Failed to update MAC address registers; cannot enable Multicast Magic packet wake up"); | |
11723 | return; | |
11724 | } | |
11725 | ||
11726 | flags = I40E_AQC_MC_MAG_EN | |
11727 | | I40E_AQC_WOL_PRESERVE_ON_PFR | |
11728 | | I40E_AQC_WRITE_TYPE_UPDATE_MC_MAG; | |
11729 | ret = i40e_aq_mac_address_write(hw, flags, mac_addr, NULL); | |
11730 | if (ret) | |
11731 | dev_err(&pf->pdev->dev, | |
11732 | "Failed to enable Multicast Magic Packet wake up\n"); | |
11733 | } | |
11734 | ||
9007bccd SN |
11735 | /** |
11736 | * i40e_shutdown - PCI callback for shutting down | |
11737 | * @pdev: PCI device information struct | |
11738 | **/ | |
11739 | static void i40e_shutdown(struct pci_dev *pdev) | |
11740 | { | |
11741 | struct i40e_pf *pf = pci_get_drvdata(pdev); | |
8e2773ae | 11742 | struct i40e_hw *hw = &pf->hw; |
9007bccd SN |
11743 | |
11744 | set_bit(__I40E_SUSPENDED, &pf->state); | |
11745 | set_bit(__I40E_DOWN, &pf->state); | |
11746 | rtnl_lock(); | |
373149fc | 11747 | i40e_prep_for_reset(pf, true); |
9007bccd SN |
11748 | rtnl_unlock(); |
11749 | ||
8e2773ae SN |
11750 | wr32(hw, I40E_PFPM_APM, (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0)); |
11751 | wr32(hw, I40E_PFPM_WUFC, (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0)); | |
11752 | ||
02b42498 CS |
11753 | del_timer_sync(&pf->service_timer); |
11754 | cancel_work_sync(&pf->service_task); | |
11755 | i40e_fdir_teardown(pf); | |
11756 | ||
921c467c MW |
11757 | /* Client close must be called explicitly here because the timer |
11758 | * has been stopped. | |
11759 | */ | |
11760 | i40e_notify_client_of_netdev_close(pf->vsi[pf->lan_vsi], false); | |
11761 | ||
1d68005d JH |
11762 | if (pf->wol_en && (pf->flags & I40E_FLAG_WOL_MC_MAGIC_PKT_WAKE)) |
11763 | i40e_enable_mc_magic_wake(pf); | |
11764 | ||
02b42498 | 11765 | rtnl_lock(); |
373149fc | 11766 | i40e_prep_for_reset(pf, true); |
02b42498 CS |
11767 | rtnl_unlock(); |
11768 | ||
11769 | wr32(hw, I40E_PFPM_APM, | |
11770 | (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0)); | |
11771 | wr32(hw, I40E_PFPM_WUFC, | |
11772 | (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0)); | |
11773 | ||
e147758d SN |
11774 | i40e_clear_interrupt_scheme(pf); |
11775 | ||
9007bccd | 11776 | if (system_state == SYSTEM_POWER_OFF) { |
8e2773ae | 11777 | pci_wake_from_d3(pdev, pf->wol_en); |
9007bccd SN |
11778 | pci_set_power_state(pdev, PCI_D3hot); |
11779 | } | |
11780 | } | |
11781 | ||
11782 | #ifdef CONFIG_PM | |
11783 | /** | |
11784 | * i40e_suspend - PCI callback for moving to D3 | |
11785 | * @pdev: PCI device information struct | |
11786 | **/ | |
11787 | static int i40e_suspend(struct pci_dev *pdev, pm_message_t state) | |
11788 | { | |
11789 | struct i40e_pf *pf = pci_get_drvdata(pdev); | |
8e2773ae | 11790 | struct i40e_hw *hw = &pf->hw; |
059ff69b | 11791 | int retval = 0; |
9007bccd SN |
11792 | |
11793 | set_bit(__I40E_SUSPENDED, &pf->state); | |
11794 | set_bit(__I40E_DOWN, &pf->state); | |
3932dbfe | 11795 | |
1d68005d JH |
11796 | if (pf->wol_en && (pf->flags & I40E_FLAG_WOL_MC_MAGIC_PKT_WAKE)) |
11797 | i40e_enable_mc_magic_wake(pf); | |
11798 | ||
9007bccd | 11799 | rtnl_lock(); |
373149fc | 11800 | i40e_prep_for_reset(pf, true); |
9007bccd SN |
11801 | rtnl_unlock(); |
11802 | ||
8e2773ae SN |
11803 | wr32(hw, I40E_PFPM_APM, (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0)); |
11804 | wr32(hw, I40E_PFPM_WUFC, (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0)); | |
11805 | ||
b33d3b73 GR |
11806 | i40e_stop_misc_vector(pf); |
11807 | ||
059ff69b GR |
11808 | retval = pci_save_state(pdev); |
11809 | if (retval) | |
11810 | return retval; | |
11811 | ||
8e2773ae | 11812 | pci_wake_from_d3(pdev, pf->wol_en); |
9007bccd SN |
11813 | pci_set_power_state(pdev, PCI_D3hot); |
11814 | ||
059ff69b | 11815 | return retval; |
41c445ff JB |
11816 | } |
11817 | ||
9007bccd SN |
11818 | /** |
11819 | * i40e_resume - PCI callback for waking up from D3 | |
11820 | * @pdev: PCI device information struct | |
11821 | **/ | |
11822 | static int i40e_resume(struct pci_dev *pdev) | |
11823 | { | |
11824 | struct i40e_pf *pf = pci_get_drvdata(pdev); | |
11825 | u32 err; | |
11826 | ||
11827 | pci_set_power_state(pdev, PCI_D0); | |
11828 | pci_restore_state(pdev); | |
11829 | /* pci_restore_state() clears dev->state_saves, so | |
11830 | * call pci_save_state() again to restore it. | |
11831 | */ | |
11832 | pci_save_state(pdev); | |
11833 | ||
11834 | err = pci_enable_device_mem(pdev); | |
11835 | if (err) { | |
fb43201f | 11836 | dev_err(&pdev->dev, "Cannot enable PCI device from suspend\n"); |
9007bccd SN |
11837 | return err; |
11838 | } | |
11839 | pci_set_master(pdev); | |
11840 | ||
11841 | /* no wakeup events while running */ | |
11842 | pci_wake_from_d3(pdev, false); | |
11843 | ||
11844 | /* handling the reset will rebuild the device state */ | |
11845 | if (test_and_clear_bit(__I40E_SUSPENDED, &pf->state)) { | |
11846 | clear_bit(__I40E_DOWN, &pf->state); | |
11847 | rtnl_lock(); | |
373149fc | 11848 | i40e_reset_and_rebuild(pf, false, true); |
9007bccd SN |
11849 | rtnl_unlock(); |
11850 | } | |
11851 | ||
11852 | return 0; | |
11853 | } | |
11854 | ||
11855 | #endif | |
41c445ff JB |
11856 | static const struct pci_error_handlers i40e_err_handler = { |
11857 | .error_detected = i40e_pci_error_detected, | |
11858 | .slot_reset = i40e_pci_error_slot_reset, | |
11859 | .resume = i40e_pci_error_resume, | |
11860 | }; | |
11861 | ||
11862 | static struct pci_driver i40e_driver = { | |
11863 | .name = i40e_driver_name, | |
11864 | .id_table = i40e_pci_tbl, | |
11865 | .probe = i40e_probe, | |
11866 | .remove = i40e_remove, | |
9007bccd SN |
11867 | #ifdef CONFIG_PM |
11868 | .suspend = i40e_suspend, | |
11869 | .resume = i40e_resume, | |
11870 | #endif | |
11871 | .shutdown = i40e_shutdown, | |
41c445ff JB |
11872 | .err_handler = &i40e_err_handler, |
11873 | .sriov_configure = i40e_pci_sriov_configure, | |
11874 | }; | |
11875 | ||
11876 | /** | |
11877 | * i40e_init_module - Driver registration routine | |
11878 | * | |
11879 | * i40e_init_module is the first routine called when the driver is | |
11880 | * loaded. All it does is register with the PCI subsystem. | |
11881 | **/ | |
11882 | static int __init i40e_init_module(void) | |
11883 | { | |
11884 | pr_info("%s: %s - version %s\n", i40e_driver_name, | |
11885 | i40e_driver_string, i40e_driver_version_str); | |
11886 | pr_info("%s: %s\n", i40e_driver_name, i40e_copyright); | |
96664483 | 11887 | |
2803b16c JB |
11888 | /* we will see if single thread per module is enough for now, |
11889 | * it can't be any worse than using the system workqueue which | |
11890 | * was already single threaded | |
11891 | */ | |
6992a6c9 JK |
11892 | i40e_wq = alloc_workqueue("%s", WQ_UNBOUND | WQ_MEM_RECLAIM, 1, |
11893 | i40e_driver_name); | |
2803b16c JB |
11894 | if (!i40e_wq) { |
11895 | pr_err("%s: Failed to create workqueue\n", i40e_driver_name); | |
11896 | return -ENOMEM; | |
11897 | } | |
11898 | ||
41c445ff JB |
11899 | i40e_dbg_init(); |
11900 | return pci_register_driver(&i40e_driver); | |
11901 | } | |
11902 | module_init(i40e_init_module); | |
11903 | ||
11904 | /** | |
11905 | * i40e_exit_module - Driver exit cleanup routine | |
11906 | * | |
11907 | * i40e_exit_module is called just before the driver is removed | |
11908 | * from memory. | |
11909 | **/ | |
11910 | static void __exit i40e_exit_module(void) | |
11911 | { | |
11912 | pci_unregister_driver(&i40e_driver); | |
2803b16c | 11913 | destroy_workqueue(i40e_wq); |
41c445ff JB |
11914 | i40e_dbg_exit(); |
11915 | } | |
11916 | module_exit(i40e_exit_module); |