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[mirror_ubuntu-artful-kernel.git] / drivers / net / ethernet / intel / ixgbevf / ixgbevf_main.c
CommitLineData
92915f71
GR		 1/*******************************************************************************
2
3 Intel 82599 Virtual Function driver
66c87bd5 4 Copyright(c) 1999 - 2010 Intel Corporation.
92915f71
GR		 5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
9
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 more details.
14
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
21
22 Contact Information:
23 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
24 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
25
26*******************************************************************************/
27
28
29/******************************************************************************
30 Copyright (c)2006 - 2007 Myricom, Inc. for some LRO specific code
31******************************************************************************/
dbd9636e
JK		 32
33#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
34
92915f71 35#include <linux/types.h>
dadcd65f 36#include <linux/bitops.h>
92915f71
GR		 37#include <linux/module.h>
38#include <linux/pci.h>
39#include <linux/netdevice.h>
40#include <linux/vmalloc.h>
41#include <linux/string.h>
42#include <linux/in.h>
43#include <linux/ip.h>
44#include <linux/tcp.h>
45#include <linux/ipv6.h>
5a0e3ad6 46#include <linux/slab.h>
92915f71
GR		 47#include <net/checksum.h>
48#include <net/ip6_checksum.h>
49#include <linux/ethtool.h>
01789349 50#include <linux/if.h>
92915f71 51#include <linux/if_vlan.h>
70c71606 52#include <linux/prefetch.h>
92915f71
GR		 53
54#include "ixgbevf.h"
55
3d8fe98f 56const char ixgbevf_driver_name[] = "ixgbevf";
92915f71 57static const char ixgbevf_driver_string[] =
422e05d1 58 "Intel(R) 10 Gigabit PCI Express Virtual Function Network Driver";
92915f71 59
c1a7e1eb 60#define DRV_VERSION "2.2.0-k"
92915f71 61const char ixgbevf_driver_version[] = DRV_VERSION;
66c87bd5
GR		 62static char ixgbevf_copyright[] =
63 "Copyright (c) 2009 - 2010 Intel Corporation.";
92915f71
GR		 64
65static const struct ixgbevf_info *ixgbevf_info_tbl[] = {
2316aa2a
GR		 66 [board_82599_vf] = &ixgbevf_82599_vf_info,
67 [board_X540_vf] = &ixgbevf_X540_vf_info,
92915f71
GR		 68};
69
70/* ixgbevf_pci_tbl - PCI Device ID Table
71 *
72 * Wildcard entries (PCI_ANY_ID) should come last
73 * Last entry must be all 0s
74 *
75 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
76 * Class, Class Mask, private data (not used) }
77 */
78static struct pci_device_id ixgbevf_pci_tbl[] = {
79 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_VF),
80 board_82599_vf},
2316aa2a
GR		 81 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X540_VF),
82 board_X540_vf},
92915f71
GR		 83
84 /* required last entry */
85 {0, }
86};
87MODULE_DEVICE_TABLE(pci, ixgbevf_pci_tbl);
88
89MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
90MODULE_DESCRIPTION("Intel(R) 82599 Virtual Function Driver");
91MODULE_LICENSE("GPL");
92MODULE_VERSION(DRV_VERSION);
93
94#define DEFAULT_DEBUG_LEVEL_SHIFT 3
95
96/* forward decls */
97static void ixgbevf_set_itr_msix(struct ixgbevf_q_vector *q_vector);
98static void ixgbevf_write_eitr(struct ixgbevf_adapter *adapter, int v_idx,
99 u32 itr_reg);
100
101static inline void ixgbevf_release_rx_desc(struct ixgbe_hw *hw,
102 struct ixgbevf_ring *rx_ring,
103 u32 val)
104{
105 /*
106 * Force memory writes to complete before letting h/w
107 * know there are new descriptors to fetch. (Only
108 * applicable for weak-ordered memory model archs,
109 * such as IA-64).
110 */
111 wmb();
112 IXGBE_WRITE_REG(hw, IXGBE_VFRDT(rx_ring->reg_idx), val);
113}
114
115/*
65d676c8 116 * ixgbevf_set_ivar - set IVAR registers - maps interrupt causes to vectors
92915f71
GR		 117 * @adapter: pointer to adapter struct
118 * @direction: 0 for Rx, 1 for Tx, -1 for other causes
119 * @queue: queue to map the corresponding interrupt to
120 * @msix_vector: the vector to map to the corresponding queue
121 *
122 */
123static void ixgbevf_set_ivar(struct ixgbevf_adapter *adapter, s8 direction,
124 u8 queue, u8 msix_vector)
125{
126 u32 ivar, index;
127 struct ixgbe_hw *hw = &adapter->hw;
128 if (direction == -1) {
129 /* other causes */
130 msix_vector |= IXGBE_IVAR_ALLOC_VAL;
131 ivar = IXGBE_READ_REG(hw, IXGBE_VTIVAR_MISC);
132 ivar &= ~0xFF;
133 ivar |= msix_vector;
134 IXGBE_WRITE_REG(hw, IXGBE_VTIVAR_MISC, ivar);
135 } else {
136 /* tx or rx causes */
137 msix_vector |= IXGBE_IVAR_ALLOC_VAL;
138 index = ((16 * (queue & 1)) + (8 * direction));
139 ivar = IXGBE_READ_REG(hw, IXGBE_VTIVAR(queue >> 1));
140 ivar &= ~(0xFF << index);
141 ivar |= (msix_vector << index);
142 IXGBE_WRITE_REG(hw, IXGBE_VTIVAR(queue >> 1), ivar);
143 }
144}
145
146static void ixgbevf_unmap_and_free_tx_resource(struct ixgbevf_adapter *adapter,
147 struct ixgbevf_tx_buffer
148 *tx_buffer_info)
149{
150 if (tx_buffer_info->dma) {
151 if (tx_buffer_info->mapped_as_page)
2a1f8794 152 dma_unmap_page(&adapter->pdev->dev,
92915f71
GR		 153 tx_buffer_info->dma,
154 tx_buffer_info->length,
2a1f8794 155 DMA_TO_DEVICE);
92915f71 156 else
2a1f8794 157 dma_unmap_single(&adapter->pdev->dev,
92915f71
GR		 158 tx_buffer_info->dma,
159 tx_buffer_info->length,
2a1f8794 160 DMA_TO_DEVICE);
92915f71
GR		 161 tx_buffer_info->dma = 0;
162 }
163 if (tx_buffer_info->skb) {
164 dev_kfree_skb_any(tx_buffer_info->skb);
165 tx_buffer_info->skb = NULL;
166 }
167 tx_buffer_info->time_stamp = 0;
168 /* tx_buffer_info must be completely set up in the transmit path */
169}
170
92915f71
GR		 171#define IXGBE_MAX_TXD_PWR 14
172#define IXGBE_MAX_DATA_PER_TXD (1 << IXGBE_MAX_TXD_PWR)
173
174/* Tx Descriptors needed, worst case */
175#define TXD_USE_COUNT(S) (((S) >> IXGBE_MAX_TXD_PWR) + \
176 (((S) & (IXGBE_MAX_DATA_PER_TXD - 1)) ? 1 : 0))
177#ifdef MAX_SKB_FRAGS
178#define DESC_NEEDED (TXD_USE_COUNT(IXGBE_MAX_DATA_PER_TXD) /* skb->data */ + \
179 MAX_SKB_FRAGS * TXD_USE_COUNT(PAGE_SIZE) + 1) /* for context */
180#else
181#define DESC_NEEDED TXD_USE_COUNT(IXGBE_MAX_DATA_PER_TXD)
182#endif
183
184static void ixgbevf_tx_timeout(struct net_device *netdev);
185
186/**
187 * ixgbevf_clean_tx_irq - Reclaim resources after transmit completes
188 * @adapter: board private structure
189 * @tx_ring: tx ring to clean
190 **/
191static bool ixgbevf_clean_tx_irq(struct ixgbevf_adapter *adapter,
192 struct ixgbevf_ring *tx_ring)
193{
194 struct net_device *netdev = adapter->netdev;
195 struct ixgbe_hw *hw = &adapter->hw;
196 union ixgbe_adv_tx_desc *tx_desc, *eop_desc;
197 struct ixgbevf_tx_buffer *tx_buffer_info;
198 unsigned int i, eop, count = 0;
199 unsigned int total_bytes = 0, total_packets = 0;
200
201 i = tx_ring->next_to_clean;
202 eop = tx_ring->tx_buffer_info[i].next_to_watch;
203 eop_desc = IXGBE_TX_DESC_ADV(*tx_ring, eop);
204
205 while ((eop_desc->wb.status & cpu_to_le32(IXGBE_TXD_STAT_DD)) &&
206 (count < tx_ring->work_limit)) {
207 bool cleaned = false;
2d0bb1c1 208 rmb(); /* read buffer_info after eop_desc */
98b9e48f
GR		 209 /* eop could change between read and DD-check */
210 if (unlikely(eop != tx_ring->tx_buffer_info[i].next_to_watch))
211 goto cont_loop;
92915f71
GR		 212 for ( ; !cleaned; count++) {
213 struct sk_buff *skb;
214 tx_desc = IXGBE_TX_DESC_ADV(*tx_ring, i);
215 tx_buffer_info = &tx_ring->tx_buffer_info[i];
216 cleaned = (i == eop);
217 skb = tx_buffer_info->skb;
218
219 if (cleaned && skb) {
220 unsigned int segs, bytecount;
221
222 /* gso_segs is currently only valid for tcp */
223 segs = skb_shinfo(skb)->gso_segs ?: 1;
224 /* multiply data chunks by size of headers */
225 bytecount = ((segs - 1) * skb_headlen(skb)) +
226 skb->len;
227 total_packets += segs;
228 total_bytes += bytecount;
229 }
230
231 ixgbevf_unmap_and_free_tx_resource(adapter,
232 tx_buffer_info);
233
234 tx_desc->wb.status = 0;
235
236 i++;
237 if (i == tx_ring->count)
238 i = 0;
239 }
240
98b9e48f 241cont_loop:
92915f71
GR		 242 eop = tx_ring->tx_buffer_info[i].next_to_watch;
243 eop_desc = IXGBE_TX_DESC_ADV(*tx_ring, eop);
244 }
245
246 tx_ring->next_to_clean = i;
247
248#define TX_WAKE_THRESHOLD (DESC_NEEDED * 2)
249 if (unlikely(count && netif_carrier_ok(netdev) &&
250 (IXGBE_DESC_UNUSED(tx_ring) >= TX_WAKE_THRESHOLD))) {
251 /* Make sure that anybody stopping the queue after this
252 * sees the new next_to_clean.
253 */
254 smp_mb();
255#ifdef HAVE_TX_MQ
256 if (__netif_subqueue_stopped(netdev, tx_ring->queue_index) &&
257 !test_bit(__IXGBEVF_DOWN, &adapter->state)) {
258 netif_wake_subqueue(netdev, tx_ring->queue_index);
259 ++adapter->restart_queue;
260 }
261#else
262 if (netif_queue_stopped(netdev) &&
263 !test_bit(__IXGBEVF_DOWN, &adapter->state)) {
264 netif_wake_queue(netdev);
265 ++adapter->restart_queue;
266 }
267#endif
268 }
269
92915f71
GR		 270 /* re-arm the interrupt */
271 if ((count >= tx_ring->work_limit) &&
272 (!test_bit(__IXGBEVF_DOWN, &adapter->state))) {
273 IXGBE_WRITE_REG(hw, IXGBE_VTEICS, tx_ring->v_idx);
274 }
275
4197aa7b 276 u64_stats_update_begin(&tx_ring->syncp);
92915f71
GR		 277 tx_ring->total_bytes += total_bytes;
278 tx_ring->total_packets += total_packets;
4197aa7b 279 u64_stats_update_end(&tx_ring->syncp);
92915f71 280
807540ba 281 return count < tx_ring->work_limit;
92915f71
GR		 282}
283
284/**
285 * ixgbevf_receive_skb - Send a completed packet up the stack
286 * @q_vector: structure containing interrupt and ring information
287 * @skb: packet to send up
288 * @status: hardware indication of status of receive
289 * @rx_ring: rx descriptor ring (for a specific queue) to setup
290 * @rx_desc: rx descriptor
291 **/
292static void ixgbevf_receive_skb(struct ixgbevf_q_vector *q_vector,
293 struct sk_buff *skb, u8 status,
294 struct ixgbevf_ring *ring,
295 union ixgbe_adv_rx_desc *rx_desc)
296{
297 struct ixgbevf_adapter *adapter = q_vector->adapter;
298 bool is_vlan = (status & IXGBE_RXD_STAT_VP);
dd1ed3b7 299 u16 tag = le16_to_cpu(rx_desc->wb.upper.vlan);
92915f71 300
dd1ed3b7 301 if (is_vlan && test_bit(tag, adapter->active_vlans))
dadcd65f 302 __vlan_hwaccel_put_tag(skb, tag);
dadcd65f
JP		 303
304 if (!(adapter->flags & IXGBE_FLAG_IN_NETPOLL))
92915f71 305 napi_gro_receive(&q_vector->napi, skb);
dadcd65f 306 else
c82a538e 307 netif_rx(skb);
92915f71
GR		 308}
309
310/**
311 * ixgbevf_rx_checksum - indicate in skb if hw indicated a good cksum
312 * @adapter: address of board private structure
313 * @status_err: hardware indication of status of receive
314 * @skb: skb currently being received and modified
315 **/
316static inline void ixgbevf_rx_checksum(struct ixgbevf_adapter *adapter,
317 u32 status_err, struct sk_buff *skb)
318{
bc8acf2c 319 skb_checksum_none_assert(skb);
92915f71
GR		 320
321 /* Rx csum disabled */
322 if (!(adapter->flags & IXGBE_FLAG_RX_CSUM_ENABLED))
323 return;
324
325 /* if IP and error */
326 if ((status_err & IXGBE_RXD_STAT_IPCS) &&
327 (status_err & IXGBE_RXDADV_ERR_IPE)) {
328 adapter->hw_csum_rx_error++;
329 return;
330 }
331
332 if (!(status_err & IXGBE_RXD_STAT_L4CS))
333 return;
334
335 if (status_err & IXGBE_RXDADV_ERR_TCPE) {
336 adapter->hw_csum_rx_error++;
337 return;
338 }
339
340 /* It must be a TCP or UDP packet with a valid checksum */
341 skb->ip_summed = CHECKSUM_UNNECESSARY;
342 adapter->hw_csum_rx_good++;
343}
344
345/**
346 * ixgbevf_alloc_rx_buffers - Replace used receive buffers; packet split
347 * @adapter: address of board private structure
348 **/
349static void ixgbevf_alloc_rx_buffers(struct ixgbevf_adapter *adapter,
350 struct ixgbevf_ring *rx_ring,
351 int cleaned_count)
352{
353 struct pci_dev *pdev = adapter->pdev;
354 union ixgbe_adv_rx_desc *rx_desc;
355 struct ixgbevf_rx_buffer *bi;
356 struct sk_buff *skb;
357 unsigned int i;
358 unsigned int bufsz = rx_ring->rx_buf_len + NET_IP_ALIGN;
359
360 i = rx_ring->next_to_use;
361 bi = &rx_ring->rx_buffer_info[i];
362
363 while (cleaned_count--) {
364 rx_desc = IXGBE_RX_DESC_ADV(*rx_ring, i);
365
366 if (!bi->page_dma &&
367 (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED)) {
368 if (!bi->page) {
1f2149c1 369 bi->page = alloc_page(GFP_ATOMIC | __GFP_COLD);
92915f71
GR		 370 if (!bi->page) {
371 adapter->alloc_rx_page_failed++;
372 goto no_buffers;
373 }
374 bi->page_offset = 0;
375 } else {
376 /* use a half page if we're re-using */
377 bi->page_offset ^= (PAGE_SIZE / 2);
378 }
379
2a1f8794 380 bi->page_dma = dma_map_page(&pdev->dev, bi->page,
92915f71
GR		 381 bi->page_offset,
382 (PAGE_SIZE / 2),
2a1f8794 383 DMA_FROM_DEVICE);
92915f71
GR		 384 }
385
386 skb = bi->skb;
387 if (!skb) {
388 skb = netdev_alloc_skb(adapter->netdev,
389 bufsz);
390
391 if (!skb) {
392 adapter->alloc_rx_buff_failed++;
393 goto no_buffers;
394 }
395
396 /*
397 * Make buffer alignment 2 beyond a 16 byte boundary
398 * this will result in a 16 byte aligned IP header after
399 * the 14 byte MAC header is removed
400 */
401 skb_reserve(skb, NET_IP_ALIGN);
402
403 bi->skb = skb;
404 }
405 if (!bi->dma) {
2a1f8794 406 bi->dma = dma_map_single(&pdev->dev, skb->data,
92915f71 407 rx_ring->rx_buf_len,
2a1f8794 408 DMA_FROM_DEVICE);
92915f71
GR		 409 }
410 /* Refresh the desc even if buffer_addrs didn't change because
411 * each write-back erases this info. */
412 if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) {
413 rx_desc->read.pkt_addr = cpu_to_le64(bi->page_dma);
414 rx_desc->read.hdr_addr = cpu_to_le64(bi->dma);
415 } else {
416 rx_desc->read.pkt_addr = cpu_to_le64(bi->dma);
417 }
418
419 i++;
420 if (i == rx_ring->count)
421 i = 0;
422 bi = &rx_ring->rx_buffer_info[i];
423 }
424
425no_buffers:
426 if (rx_ring->next_to_use != i) {
427 rx_ring->next_to_use = i;
428 if (i-- == 0)
429 i = (rx_ring->count - 1);
430
431 ixgbevf_release_rx_desc(&adapter->hw, rx_ring, i);
432 }
433}
434
435static inline void ixgbevf_irq_enable_queues(struct ixgbevf_adapter *adapter,
436 u64 qmask)
437{
438 u32 mask;
439 struct ixgbe_hw *hw = &adapter->hw;
440
441 mask = (qmask & 0xFFFFFFFF);
442 IXGBE_WRITE_REG(hw, IXGBE_VTEIMS, mask);
443}
444
445static inline u16 ixgbevf_get_hdr_info(union ixgbe_adv_rx_desc *rx_desc)
446{
447 return rx_desc->wb.lower.lo_dword.hs_rss.hdr_info;
448}
449
450static inline u16 ixgbevf_get_pkt_info(union ixgbe_adv_rx_desc *rx_desc)
451{
452 return rx_desc->wb.lower.lo_dword.hs_rss.pkt_info;
453}
454
455static bool ixgbevf_clean_rx_irq(struct ixgbevf_q_vector *q_vector,
456 struct ixgbevf_ring *rx_ring,
457 int *work_done, int work_to_do)
458{
459 struct ixgbevf_adapter *adapter = q_vector->adapter;
460 struct pci_dev *pdev = adapter->pdev;
461 union ixgbe_adv_rx_desc *rx_desc, *next_rxd;
462 struct ixgbevf_rx_buffer *rx_buffer_info, *next_buffer;
463 struct sk_buff *skb;
464 unsigned int i;
465 u32 len, staterr;
466 u16 hdr_info;
467 bool cleaned = false;
468 int cleaned_count = 0;
469 unsigned int total_rx_bytes = 0, total_rx_packets = 0;
470
471 i = rx_ring->next_to_clean;
472 rx_desc = IXGBE_RX_DESC_ADV(*rx_ring, i);
473 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
474 rx_buffer_info = &rx_ring->rx_buffer_info[i];
475
476 while (staterr & IXGBE_RXD_STAT_DD) {
477 u32 upper_len = 0;
478 if (*work_done >= work_to_do)
479 break;
480 (*work_done)++;
481
2d0bb1c1 482 rmb(); /* read descriptor and rx_buffer_info after status DD */
92915f71
GR		 483 if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) {
484 hdr_info = le16_to_cpu(ixgbevf_get_hdr_info(rx_desc));
485 len = (hdr_info & IXGBE_RXDADV_HDRBUFLEN_MASK) >>
486 IXGBE_RXDADV_HDRBUFLEN_SHIFT;
487 if (hdr_info & IXGBE_RXDADV_SPH)
488 adapter->rx_hdr_split++;
489 if (len > IXGBEVF_RX_HDR_SIZE)
490 len = IXGBEVF_RX_HDR_SIZE;
491 upper_len = le16_to_cpu(rx_desc->wb.upper.length);
492 } else {
493 len = le16_to_cpu(rx_desc->wb.upper.length);
494 }
495 cleaned = true;
496 skb = rx_buffer_info->skb;
497 prefetch(skb->data - NET_IP_ALIGN);
498 rx_buffer_info->skb = NULL;
499
500 if (rx_buffer_info->dma) {
2a1f8794 501 dma_unmap_single(&pdev->dev, rx_buffer_info->dma,
92915f71 502 rx_ring->rx_buf_len,
2a1f8794 503 DMA_FROM_DEVICE);
92915f71
GR		 504 rx_buffer_info->dma = 0;
505 skb_put(skb, len);
506 }
507
508 if (upper_len) {
2a1f8794
NN		 509 dma_unmap_page(&pdev->dev, rx_buffer_info->page_dma,
510 PAGE_SIZE / 2, DMA_FROM_DEVICE);
92915f71
GR		 511 rx_buffer_info->page_dma = 0;
512 skb_fill_page_desc(skb, skb_shinfo(skb)->nr_frags,
513 rx_buffer_info->page,
514 rx_buffer_info->page_offset,
515 upper_len);
516
517 if ((rx_ring->rx_buf_len > (PAGE_SIZE / 2)) ||
518 (page_count(rx_buffer_info->page) != 1))
519 rx_buffer_info->page = NULL;
520 else
521 get_page(rx_buffer_info->page);
522
523 skb->len += upper_len;
524 skb->data_len += upper_len;
525 skb->truesize += upper_len;
526 }
527
528 i++;
529 if (i == rx_ring->count)
530 i = 0;
531
532 next_rxd = IXGBE_RX_DESC_ADV(*rx_ring, i);
533 prefetch(next_rxd);
534 cleaned_count++;
535
536 next_buffer = &rx_ring->rx_buffer_info[i];
537
538 if (!(staterr & IXGBE_RXD_STAT_EOP)) {
539 if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) {
540 rx_buffer_info->skb = next_buffer->skb;
541 rx_buffer_info->dma = next_buffer->dma;
542 next_buffer->skb = skb;
543 next_buffer->dma = 0;
544 } else {
545 skb->next = next_buffer->skb;
546 skb->next->prev = skb;
547 }
548 adapter->non_eop_descs++;
549 goto next_desc;
550 }
551
552 /* ERR_MASK will only have valid bits if EOP set */
553 if (unlikely(staterr & IXGBE_RXDADV_ERR_FRAME_ERR_MASK)) {
554 dev_kfree_skb_irq(skb);
555 goto next_desc;
556 }
557
558 ixgbevf_rx_checksum(adapter, staterr, skb);
559
560 /* probably a little skewed due to removing CRC */
561 total_rx_bytes += skb->len;
562 total_rx_packets++;
563
564 /*
565 * Work around issue of some types of VM to VM loop back
566 * packets not getting split correctly
567 */
568 if (staterr & IXGBE_RXD_STAT_LB) {
e743d313 569 u32 header_fixup_len = skb_headlen(skb);
92915f71
GR		 570 if (header_fixup_len < 14)
571 skb_push(skb, header_fixup_len);
572 }
573 skb->protocol = eth_type_trans(skb, adapter->netdev);
574
575 ixgbevf_receive_skb(q_vector, skb, staterr, rx_ring, rx_desc);
92915f71
GR		 576
577next_desc:
578 rx_desc->wb.upper.status_error = 0;
579
580 /* return some buffers to hardware, one at a time is too slow */
581 if (cleaned_count >= IXGBEVF_RX_BUFFER_WRITE) {
582 ixgbevf_alloc_rx_buffers(adapter, rx_ring,
583 cleaned_count);
584 cleaned_count = 0;
585 }
586
587 /* use prefetched values */
588 rx_desc = next_rxd;
589 rx_buffer_info = &rx_ring->rx_buffer_info[i];
590
591 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
592 }
593
594 rx_ring->next_to_clean = i;
595 cleaned_count = IXGBE_DESC_UNUSED(rx_ring);
596
597 if (cleaned_count)
598 ixgbevf_alloc_rx_buffers(adapter, rx_ring, cleaned_count);
599
4197aa7b 600 u64_stats_update_begin(&rx_ring->syncp);
92915f71
GR		 601 rx_ring->total_packets += total_rx_packets;
602 rx_ring->total_bytes += total_rx_bytes;
4197aa7b 603 u64_stats_update_end(&rx_ring->syncp);
92915f71
GR		 604
605 return cleaned;
606}
607
608/**
609 * ixgbevf_clean_rxonly - msix (aka one shot) rx clean routine
610 * @napi: napi struct with our devices info in it
611 * @budget: amount of work driver is allowed to do this pass, in packets
612 *
613 * This function is optimized for cleaning one queue only on a single
614 * q_vector!!!
615 **/
616static int ixgbevf_clean_rxonly(struct napi_struct *napi, int budget)
617{
618 struct ixgbevf_q_vector *q_vector =
619 container_of(napi, struct ixgbevf_q_vector, napi);
620 struct ixgbevf_adapter *adapter = q_vector->adapter;
621 struct ixgbevf_ring *rx_ring = NULL;
622 int work_done = 0;
623 long r_idx;
624
625 r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues);
626 rx_ring = &(adapter->rx_ring[r_idx]);
627
628 ixgbevf_clean_rx_irq(q_vector, rx_ring, &work_done, budget);
629
630 /* If all Rx work done, exit the polling mode */
631 if (work_done < budget) {
632 napi_complete(napi);
633 if (adapter->itr_setting & 1)
634 ixgbevf_set_itr_msix(q_vector);
635 if (!test_bit(__IXGBEVF_DOWN, &adapter->state))
636 ixgbevf_irq_enable_queues(adapter, rx_ring->v_idx);
637 }
638
639 return work_done;
640}
641
642/**
643 * ixgbevf_clean_rxonly_many - msix (aka one shot) rx clean routine
644 * @napi: napi struct with our devices info in it
645 * @budget: amount of work driver is allowed to do this pass, in packets
646 *
647 * This function will clean more than one rx queue associated with a
648 * q_vector.
649 **/
650static int ixgbevf_clean_rxonly_many(struct napi_struct *napi, int budget)
651{
652 struct ixgbevf_q_vector *q_vector =
653 container_of(napi, struct ixgbevf_q_vector, napi);
654 struct ixgbevf_adapter *adapter = q_vector->adapter;
655 struct ixgbevf_ring *rx_ring = NULL;
656 int work_done = 0, i;
657 long r_idx;
658 u64 enable_mask = 0;
659
660 /* attempt to distribute budget to each queue fairly, but don't allow
661 * the budget to go below 1 because we'll exit polling */
662 budget /= (q_vector->rxr_count ?: 1);
663 budget = max(budget, 1);
664 r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues);
665 for (i = 0; i < q_vector->rxr_count; i++) {
666 rx_ring = &(adapter->rx_ring[r_idx]);
667 ixgbevf_clean_rx_irq(q_vector, rx_ring, &work_done, budget);
668 enable_mask |= rx_ring->v_idx;
669 r_idx = find_next_bit(q_vector->rxr_idx, adapter->num_rx_queues,
670 r_idx + 1);
671 }
672
673#ifndef HAVE_NETDEV_NAPI_LIST
674 if (!netif_running(adapter->netdev))
675 work_done = 0;
676
677#endif
678 r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues);
679 rx_ring = &(adapter->rx_ring[r_idx]);
680
681 /* If all Rx work done, exit the polling mode */
682 if (work_done < budget) {
683 napi_complete(napi);
684 if (adapter->itr_setting & 1)
685 ixgbevf_set_itr_msix(q_vector);
686 if (!test_bit(__IXGBEVF_DOWN, &adapter->state))
687 ixgbevf_irq_enable_queues(adapter, enable_mask);
688 }
689
690 return work_done;
691}
692
693
694/**
695 * ixgbevf_configure_msix - Configure MSI-X hardware
696 * @adapter: board private structure
697 *
698 * ixgbevf_configure_msix sets up the hardware to properly generate MSI-X
699 * interrupts.
700 **/
701static void ixgbevf_configure_msix(struct ixgbevf_adapter *adapter)
702{
703 struct ixgbevf_q_vector *q_vector;
704 struct ixgbe_hw *hw = &adapter->hw;
705 int i, j, q_vectors, v_idx, r_idx;
706 u32 mask;
707
708 q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
709
710 /*
711 * Populate the IVAR table and set the ITR values to the
712 * corresponding register.
713 */
714 for (v_idx = 0; v_idx < q_vectors; v_idx++) {
715 q_vector = adapter->q_vector[v_idx];
984b3f57 716 /* XXX for_each_set_bit(...) */
92915f71
GR		 717 r_idx = find_first_bit(q_vector->rxr_idx,
718 adapter->num_rx_queues);
719
720 for (i = 0; i < q_vector->rxr_count; i++) {
721 j = adapter->rx_ring[r_idx].reg_idx;
722 ixgbevf_set_ivar(adapter, 0, j, v_idx);
723 r_idx = find_next_bit(q_vector->rxr_idx,
724 adapter->num_rx_queues,
725 r_idx + 1);
726 }
727 r_idx = find_first_bit(q_vector->txr_idx,
728 adapter->num_tx_queues);
729
730 for (i = 0; i < q_vector->txr_count; i++) {
731 j = adapter->tx_ring[r_idx].reg_idx;
732 ixgbevf_set_ivar(adapter, 1, j, v_idx);
733 r_idx = find_next_bit(q_vector->txr_idx,
734 adapter->num_tx_queues,
735 r_idx + 1);
736 }
737
738 /* if this is a tx only vector halve the interrupt rate */
739 if (q_vector->txr_count && !q_vector->rxr_count)
740 q_vector->eitr = (adapter->eitr_param >> 1);
741 else if (q_vector->rxr_count)
742 /* rx only */
743 q_vector->eitr = adapter->eitr_param;
744
745 ixgbevf_write_eitr(adapter, v_idx, q_vector->eitr);
746 }
747
748 ixgbevf_set_ivar(adapter, -1, 1, v_idx);
749
750 /* set up to autoclear timer, and the vectors */
751 mask = IXGBE_EIMS_ENABLE_MASK;
752 mask &= ~IXGBE_EIMS_OTHER;
753 IXGBE_WRITE_REG(hw, IXGBE_VTEIAC, mask);
754}
755
756enum latency_range {
757 lowest_latency = 0,
758 low_latency = 1,
759 bulk_latency = 2,
760 latency_invalid = 255
761};
762
763/**
764 * ixgbevf_update_itr - update the dynamic ITR value based on statistics
765 * @adapter: pointer to adapter
766 * @eitr: eitr setting (ints per sec) to give last timeslice
767 * @itr_setting: current throttle rate in ints/second
768 * @packets: the number of packets during this measurement interval
769 * @bytes: the number of bytes during this measurement interval
770 *
771 * Stores a new ITR value based on packets and byte
772 * counts during the last interrupt. The advantage of per interrupt
773 * computation is faster updates and more accurate ITR for the current
774 * traffic pattern. Constants in this function were computed
775 * based on theoretical maximum wire speed and thresholds were set based
776 * on testing data as well as attempting to minimize response time
777 * while increasing bulk throughput.
778 **/
779static u8 ixgbevf_update_itr(struct ixgbevf_adapter *adapter,
780 u32 eitr, u8 itr_setting,
781 int packets, int bytes)
782{
783 unsigned int retval = itr_setting;
784 u32 timepassed_us;
785 u64 bytes_perint;
786
787 if (packets == 0)
788 goto update_itr_done;
789
790
791 /* simple throttlerate management
792 * 0-20MB/s lowest (100000 ints/s)
793 * 20-100MB/s low (20000 ints/s)
794 * 100-1249MB/s bulk (8000 ints/s)
795 */
796 /* what was last interrupt timeslice? */
797 timepassed_us = 1000000/eitr;
798 bytes_perint = bytes / timepassed_us; /* bytes/usec */
799
800 switch (itr_setting) {
801 case lowest_latency:
802 if (bytes_perint > adapter->eitr_low)
803 retval = low_latency;
804 break;
805 case low_latency:
806 if (bytes_perint > adapter->eitr_high)
807 retval = bulk_latency;
808 else if (bytes_perint <= adapter->eitr_low)
809 retval = lowest_latency;
810 break;
811 case bulk_latency:
812 if (bytes_perint <= adapter->eitr_high)
813 retval = low_latency;
814 break;
815 }
816
817update_itr_done:
818 return retval;
819}
820
821/**
822 * ixgbevf_write_eitr - write VTEITR register in hardware specific way
823 * @adapter: pointer to adapter struct
824 * @v_idx: vector index into q_vector array
825 * @itr_reg: new value to be written in *register* format, not ints/s
826 *
827 * This function is made to be called by ethtool and by the driver
828 * when it needs to update VTEITR registers at runtime. Hardware
829 * specific quirks/differences are taken care of here.
830 */
831static void ixgbevf_write_eitr(struct ixgbevf_adapter *adapter, int v_idx,
832 u32 itr_reg)
833{
834 struct ixgbe_hw *hw = &adapter->hw;
835
836 itr_reg = EITR_INTS_PER_SEC_TO_REG(itr_reg);
837
838 /*
839 * set the WDIS bit to not clear the timer bits and cause an
840 * immediate assertion of the interrupt
841 */
842 itr_reg |= IXGBE_EITR_CNT_WDIS;
843
844 IXGBE_WRITE_REG(hw, IXGBE_VTEITR(v_idx), itr_reg);
845}
846
847static void ixgbevf_set_itr_msix(struct ixgbevf_q_vector *q_vector)
848{
849 struct ixgbevf_adapter *adapter = q_vector->adapter;
850 u32 new_itr;
851 u8 current_itr, ret_itr;
852 int i, r_idx, v_idx = q_vector->v_idx;
853 struct ixgbevf_ring *rx_ring, *tx_ring;
854
855 r_idx = find_first_bit(q_vector->txr_idx, adapter->num_tx_queues);
856 for (i = 0; i < q_vector->txr_count; i++) {
857 tx_ring = &(adapter->tx_ring[r_idx]);
858 ret_itr = ixgbevf_update_itr(adapter, q_vector->eitr,
859 q_vector->tx_itr,
860 tx_ring->total_packets,
861 tx_ring->total_bytes);
862 /* if the result for this queue would decrease interrupt
863 * rate for this vector then use that result */
864 q_vector->tx_itr = ((q_vector->tx_itr > ret_itr) ?
865 q_vector->tx_itr - 1 : ret_itr);
866 r_idx = find_next_bit(q_vector->txr_idx, adapter->num_tx_queues,
867 r_idx + 1);
868 }
869
870 r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues);
871 for (i = 0; i < q_vector->rxr_count; i++) {
872 rx_ring = &(adapter->rx_ring[r_idx]);
873 ret_itr = ixgbevf_update_itr(adapter, q_vector->eitr,
874 q_vector->rx_itr,
875 rx_ring->total_packets,
876 rx_ring->total_bytes);
877 /* if the result for this queue would decrease interrupt
878 * rate for this vector then use that result */
879 q_vector->rx_itr = ((q_vector->rx_itr > ret_itr) ?
880 q_vector->rx_itr - 1 : ret_itr);
881 r_idx = find_next_bit(q_vector->rxr_idx, adapter->num_rx_queues,
882 r_idx + 1);
883 }
884
885 current_itr = max(q_vector->rx_itr, q_vector->tx_itr);
886
887 switch (current_itr) {
888 /* counts and packets in update_itr are dependent on these numbers */
889 case lowest_latency:
890 new_itr = 100000;
891 break;
892 case low_latency:
893 new_itr = 20000; /* aka hwitr = ~200 */
894 break;
895 case bulk_latency:
896 default:
897 new_itr = 8000;
898 break;
899 }
900
901 if (new_itr != q_vector->eitr) {
902 u32 itr_reg;
903
904 /* save the algorithm value here, not the smoothed one */
905 q_vector->eitr = new_itr;
906 /* do an exponential smoothing */
907 new_itr = ((q_vector->eitr * 90)/100) + ((new_itr * 10)/100);
908 itr_reg = EITR_INTS_PER_SEC_TO_REG(new_itr);
909 ixgbevf_write_eitr(adapter, v_idx, itr_reg);
910 }
92915f71
GR		 911}
912
913static irqreturn_t ixgbevf_msix_mbx(int irq, void *data)
914{
915 struct net_device *netdev = data;
916 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
917 struct ixgbe_hw *hw = &adapter->hw;
918 u32 eicr;
a9ee25a2 919 u32 msg;
375b27cf 920 bool got_ack = false;
92915f71
GR		 921
922 eicr = IXGBE_READ_REG(hw, IXGBE_VTEICS);
923 IXGBE_WRITE_REG(hw, IXGBE_VTEICR, eicr);
924
375b27cf
GR		 925 if (!hw->mbx.ops.check_for_ack(hw))
926 got_ack = true;
08259594 927
375b27cf
GR		 928 if (!hw->mbx.ops.check_for_msg(hw)) {
929 hw->mbx.ops.read(hw, &msg, 1);
a9ee25a2 930
375b27cf
GR		 931 if ((msg & IXGBE_MBVFICR_VFREQ_MASK) == IXGBE_PF_CONTROL_MSG)
932 mod_timer(&adapter->watchdog_timer,
933 round_jiffies(jiffies + 1));
a9ee25a2 934
375b27cf
GR		 935 if (msg & IXGBE_VT_MSGTYPE_NACK)
936 pr_warn("Last Request of type %2.2x to PF Nacked\n",
937 msg & 0xFF);
938 goto out;
939 }
940
941 /*
942 * checking for the ack clears the PFACK bit. Place
943 * it back in the v2p_mailbox cache so that anyone
944 * polling for an ack will not miss it
945 */
946 if (got_ack)
947 hw->mbx.v2p_mailbox |= IXGBE_VFMAILBOX_PFACK;
08259594 948out:
92915f71
GR		 949 return IRQ_HANDLED;
950}
951
952static irqreturn_t ixgbevf_msix_clean_tx(int irq, void *data)
953{
954 struct ixgbevf_q_vector *q_vector = data;
955 struct ixgbevf_adapter *adapter = q_vector->adapter;
956 struct ixgbevf_ring *tx_ring;
957 int i, r_idx;
958
959 if (!q_vector->txr_count)
960 return IRQ_HANDLED;
961
962 r_idx = find_first_bit(q_vector->txr_idx, adapter->num_tx_queues);
963 for (i = 0; i < q_vector->txr_count; i++) {
964 tx_ring = &(adapter->tx_ring[r_idx]);
965 tx_ring->total_bytes = 0;
966 tx_ring->total_packets = 0;
967 ixgbevf_clean_tx_irq(adapter, tx_ring);
968 r_idx = find_next_bit(q_vector->txr_idx, adapter->num_tx_queues,
969 r_idx + 1);
970 }
971
972 if (adapter->itr_setting & 1)
973 ixgbevf_set_itr_msix(q_vector);
974
975 return IRQ_HANDLED;
976}
977
978/**
65d676c8 979 * ixgbevf_msix_clean_rx - single unshared vector rx clean (all queues)
92915f71
GR		 980 * @irq: unused
981 * @data: pointer to our q_vector struct for this interrupt vector
982 **/
983static irqreturn_t ixgbevf_msix_clean_rx(int irq, void *data)
984{
985 struct ixgbevf_q_vector *q_vector = data;
986 struct ixgbevf_adapter *adapter = q_vector->adapter;
987 struct ixgbe_hw *hw = &adapter->hw;
988 struct ixgbevf_ring *rx_ring;
989 int r_idx;
990 int i;
991
992 r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues);
993 for (i = 0; i < q_vector->rxr_count; i++) {
994 rx_ring = &(adapter->rx_ring[r_idx]);
995 rx_ring->total_bytes = 0;
996 rx_ring->total_packets = 0;
997 r_idx = find_next_bit(q_vector->rxr_idx, adapter->num_rx_queues,
998 r_idx + 1);
999 }
1000
1001 if (!q_vector->rxr_count)
1002 return IRQ_HANDLED;
1003
1004 r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues);
1005 rx_ring = &(adapter->rx_ring[r_idx]);
1006 /* disable interrupts on this vector only */
1007 IXGBE_WRITE_REG(hw, IXGBE_VTEIMC, rx_ring->v_idx);
1008 napi_schedule(&q_vector->napi);
1009
1010
1011 return IRQ_HANDLED;
1012}
1013
1014static irqreturn_t ixgbevf_msix_clean_many(int irq, void *data)
1015{
1016 ixgbevf_msix_clean_rx(irq, data);
1017 ixgbevf_msix_clean_tx(irq, data);
1018
1019 return IRQ_HANDLED;
1020}
1021
1022static inline void map_vector_to_rxq(struct ixgbevf_adapter *a, int v_idx,
1023 int r_idx)
1024{
1025 struct ixgbevf_q_vector *q_vector = a->q_vector[v_idx];
1026
1027 set_bit(r_idx, q_vector->rxr_idx);
1028 q_vector->rxr_count++;
1029 a->rx_ring[r_idx].v_idx = 1 << v_idx;
1030}
1031
1032static inline void map_vector_to_txq(struct ixgbevf_adapter *a, int v_idx,
1033 int t_idx)
1034{
1035 struct ixgbevf_q_vector *q_vector = a->q_vector[v_idx];
1036
1037 set_bit(t_idx, q_vector->txr_idx);
1038 q_vector->txr_count++;
1039 a->tx_ring[t_idx].v_idx = 1 << v_idx;
1040}
1041
1042/**
1043 * ixgbevf_map_rings_to_vectors - Maps descriptor rings to vectors
1044 * @adapter: board private structure to initialize
1045 *
1046 * This function maps descriptor rings to the queue-specific vectors
1047 * we were allotted through the MSI-X enabling code. Ideally, we'd have
1048 * one vector per ring/queue, but on a constrained vector budget, we
1049 * group the rings as "efficiently" as possible. You would add new
1050 * mapping configurations in here.
1051 **/
1052static int ixgbevf_map_rings_to_vectors(struct ixgbevf_adapter *adapter)
1053{
1054 int q_vectors;
1055 int v_start = 0;
1056 int rxr_idx = 0, txr_idx = 0;
1057 int rxr_remaining = adapter->num_rx_queues;
1058 int txr_remaining = adapter->num_tx_queues;
1059 int i, j;
1060 int rqpv, tqpv;
1061 int err = 0;
1062
1063 q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
1064
1065 /*
1066 * The ideal configuration...
1067 * We have enough vectors to map one per queue.
1068 */
1069 if (q_vectors == adapter->num_rx_queues + adapter->num_tx_queues) {
1070 for (; rxr_idx < rxr_remaining; v_start++, rxr_idx++)
1071 map_vector_to_rxq(adapter, v_start, rxr_idx);
1072
1073 for (; txr_idx < txr_remaining; v_start++, txr_idx++)
1074 map_vector_to_txq(adapter, v_start, txr_idx);
1075 goto out;
1076 }
1077
1078 /*
1079 * If we don't have enough vectors for a 1-to-1
1080 * mapping, we'll have to group them so there are
1081 * multiple queues per vector.
1082 */
1083 /* Re-adjusting *qpv takes care of the remainder. */
1084 for (i = v_start; i < q_vectors; i++) {
1085 rqpv = DIV_ROUND_UP(rxr_remaining, q_vectors - i);
1086 for (j = 0; j < rqpv; j++) {
1087 map_vector_to_rxq(adapter, i, rxr_idx);
1088 rxr_idx++;
1089 rxr_remaining--;
1090 }
1091 }
1092 for (i = v_start; i < q_vectors; i++) {
1093 tqpv = DIV_ROUND_UP(txr_remaining, q_vectors - i);
1094 for (j = 0; j < tqpv; j++) {
1095 map_vector_to_txq(adapter, i, txr_idx);
1096 txr_idx++;
1097 txr_remaining--;
1098 }
1099 }
1100
1101out:
1102 return err;
1103}
1104
1105/**
1106 * ixgbevf_request_msix_irqs - Initialize MSI-X interrupts
1107 * @adapter: board private structure
1108 *
1109 * ixgbevf_request_msix_irqs allocates MSI-X vectors and requests
1110 * interrupts from the kernel.
1111 **/
1112static int ixgbevf_request_msix_irqs(struct ixgbevf_adapter *adapter)
1113{
1114 struct net_device *netdev = adapter->netdev;
1115 irqreturn_t (*handler)(int, void *);
1116 int i, vector, q_vectors, err;
1117 int ri = 0, ti = 0;
1118
1119 /* Decrement for Other and TCP Timer vectors */
1120 q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
1121
1122#define SET_HANDLER(_v) (((_v)->rxr_count && (_v)->txr_count) \
1123 ? &ixgbevf_msix_clean_many : \
1124 (_v)->rxr_count ? &ixgbevf_msix_clean_rx : \
1125 (_v)->txr_count ? &ixgbevf_msix_clean_tx : \
1126 NULL)
1127 for (vector = 0; vector < q_vectors; vector++) {
1128 handler = SET_HANDLER(adapter->q_vector[vector]);
1129
1130 if (handler == &ixgbevf_msix_clean_rx) {
1131 sprintf(adapter->name[vector], "%s-%s-%d",
1132 netdev->name, "rx", ri++);
1133 } else if (handler == &ixgbevf_msix_clean_tx) {
1134 sprintf(adapter->name[vector], "%s-%s-%d",
1135 netdev->name, "tx", ti++);
1136 } else if (handler == &ixgbevf_msix_clean_many) {
1137 sprintf(adapter->name[vector], "%s-%s-%d",
1138 netdev->name, "TxRx", vector);
1139 } else {
1140 /* skip this unused q_vector */
1141 continue;
1142 }
1143 err = request_irq(adapter->msix_entries[vector].vector,
1144 handler, 0, adapter->name[vector],
1145 adapter->q_vector[vector]);
1146 if (err) {
1147 hw_dbg(&adapter->hw,
1148 "request_irq failed for MSIX interrupt "
1149 "Error: %d\n", err);
1150 goto free_queue_irqs;
1151 }
1152 }
1153
1154 sprintf(adapter->name[vector], "%s:mbx", netdev->name);
1155 err = request_irq(adapter->msix_entries[vector].vector,
1156 &ixgbevf_msix_mbx, 0, adapter->name[vector], netdev);
1157 if (err) {
1158 hw_dbg(&adapter->hw,
1159 "request_irq for msix_mbx failed: %d\n", err);
1160 goto free_queue_irqs;
1161 }
1162
1163 return 0;
1164
1165free_queue_irqs:
1166 for (i = vector - 1; i >= 0; i--)
1167 free_irq(adapter->msix_entries[--vector].vector,
1168 &(adapter->q_vector[i]));
1169 pci_disable_msix(adapter->pdev);
1170 kfree(adapter->msix_entries);
1171 adapter->msix_entries = NULL;
1172 return err;
1173}
1174
1175static inline void ixgbevf_reset_q_vectors(struct ixgbevf_adapter *adapter)
1176{
1177 int i, q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
1178
1179 for (i = 0; i < q_vectors; i++) {
1180 struct ixgbevf_q_vector *q_vector = adapter->q_vector[i];
1181 bitmap_zero(q_vector->rxr_idx, MAX_RX_QUEUES);
1182 bitmap_zero(q_vector->txr_idx, MAX_TX_QUEUES);
1183 q_vector->rxr_count = 0;
1184 q_vector->txr_count = 0;
1185 q_vector->eitr = adapter->eitr_param;
1186 }
1187}
1188
1189/**
1190 * ixgbevf_request_irq - initialize interrupts
1191 * @adapter: board private structure
1192 *
1193 * Attempts to configure interrupts using the best available
1194 * capabilities of the hardware and kernel.
1195 **/
1196static int ixgbevf_request_irq(struct ixgbevf_adapter *adapter)
1197{
1198 int err = 0;
1199
1200 err = ixgbevf_request_msix_irqs(adapter);
1201
1202 if (err)
1203 hw_dbg(&adapter->hw,
1204 "request_irq failed, Error %d\n", err);
1205
1206 return err;
1207}
1208
1209static void ixgbevf_free_irq(struct ixgbevf_adapter *adapter)
1210{
1211 struct net_device *netdev = adapter->netdev;
1212 int i, q_vectors;
1213
1214 q_vectors = adapter->num_msix_vectors;
1215
1216 i = q_vectors - 1;
1217
1218 free_irq(adapter->msix_entries[i].vector, netdev);
1219 i--;
1220
1221 for (; i >= 0; i--) {
1222 free_irq(adapter->msix_entries[i].vector,
1223 adapter->q_vector[i]);
1224 }
1225
1226 ixgbevf_reset_q_vectors(adapter);
1227}
1228
1229/**
1230 * ixgbevf_irq_disable - Mask off interrupt generation on the NIC
1231 * @adapter: board private structure
1232 **/
1233static inline void ixgbevf_irq_disable(struct ixgbevf_adapter *adapter)
1234{
1235 int i;
1236 struct ixgbe_hw *hw = &adapter->hw;
1237
1238 IXGBE_WRITE_REG(hw, IXGBE_VTEIMC, ~0);
1239
1240 IXGBE_WRITE_FLUSH(hw);
1241
1242 for (i = 0; i < adapter->num_msix_vectors; i++)
1243 synchronize_irq(adapter->msix_entries[i].vector);
1244}
1245
1246/**
1247 * ixgbevf_irq_enable - Enable default interrupt generation settings
1248 * @adapter: board private structure
1249 **/
1250static inline void ixgbevf_irq_enable(struct ixgbevf_adapter *adapter,
1251 bool queues, bool flush)
1252{
1253 struct ixgbe_hw *hw = &adapter->hw;
1254 u32 mask;
1255 u64 qmask;
1256
1257 mask = (IXGBE_EIMS_ENABLE_MASK & ~IXGBE_EIMS_RTX_QUEUE);
1258 qmask = ~0;
1259
1260 IXGBE_WRITE_REG(hw, IXGBE_VTEIMS, mask);
1261
1262 if (queues)
1263 ixgbevf_irq_enable_queues(adapter, qmask);
1264
1265 if (flush)
1266 IXGBE_WRITE_FLUSH(hw);
1267}
1268
1269/**
1270 * ixgbevf_configure_tx - Configure 82599 VF Transmit Unit after Reset
1271 * @adapter: board private structure
1272 *
1273 * Configure the Tx unit of the MAC after a reset.
1274 **/
1275static void ixgbevf_configure_tx(struct ixgbevf_adapter *adapter)
1276{
1277 u64 tdba;
1278 struct ixgbe_hw *hw = &adapter->hw;
1279 u32 i, j, tdlen, txctrl;
1280
1281 /* Setup the HW Tx Head and Tail descriptor pointers */
1282 for (i = 0; i < adapter->num_tx_queues; i++) {
1283 struct ixgbevf_ring *ring = &adapter->tx_ring[i];
1284 j = ring->reg_idx;
1285 tdba = ring->dma;
1286 tdlen = ring->count * sizeof(union ixgbe_adv_tx_desc);
1287 IXGBE_WRITE_REG(hw, IXGBE_VFTDBAL(j),
1288 (tdba & DMA_BIT_MASK(32)));
1289 IXGBE_WRITE_REG(hw, IXGBE_VFTDBAH(j), (tdba >> 32));
1290 IXGBE_WRITE_REG(hw, IXGBE_VFTDLEN(j), tdlen);
1291 IXGBE_WRITE_REG(hw, IXGBE_VFTDH(j), 0);
1292 IXGBE_WRITE_REG(hw, IXGBE_VFTDT(j), 0);
1293 adapter->tx_ring[i].head = IXGBE_VFTDH(j);
1294 adapter->tx_ring[i].tail = IXGBE_VFTDT(j);
1295 /* Disable Tx Head Writeback RO bit, since this hoses
1296 * bookkeeping if things aren't delivered in order.
1297 */
1298 txctrl = IXGBE_READ_REG(hw, IXGBE_VFDCA_TXCTRL(j));
1299 txctrl &= ~IXGBE_DCA_TXCTRL_TX_WB_RO_EN;
1300 IXGBE_WRITE_REG(hw, IXGBE_VFDCA_TXCTRL(j), txctrl);
1301 }
1302}
1303
1304#define IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT 2
1305
1306static void ixgbevf_configure_srrctl(struct ixgbevf_adapter *adapter, int index)
1307{
1308 struct ixgbevf_ring *rx_ring;
1309 struct ixgbe_hw *hw = &adapter->hw;
1310 u32 srrctl;
1311
1312 rx_ring = &adapter->rx_ring[index];
1313
1314 srrctl = IXGBE_SRRCTL_DROP_EN;
1315
1316 if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) {
1317 u16 bufsz = IXGBEVF_RXBUFFER_2048;
1318 /* grow the amount we can receive on large page machines */
1319 if (bufsz < (PAGE_SIZE / 2))
1320 bufsz = (PAGE_SIZE / 2);
1321 /* cap the bufsz at our largest descriptor size */
1322 bufsz = min((u16)IXGBEVF_MAX_RXBUFFER, bufsz);
1323
1324 srrctl |= bufsz >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
1325 srrctl |= IXGBE_SRRCTL_DESCTYPE_HDR_SPLIT_ALWAYS;
1326 srrctl |= ((IXGBEVF_RX_HDR_SIZE <<
1327 IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT) &
1328 IXGBE_SRRCTL_BSIZEHDR_MASK);
1329 } else {
1330 srrctl |= IXGBE_SRRCTL_DESCTYPE_ADV_ONEBUF;
1331
1332 if (rx_ring->rx_buf_len == MAXIMUM_ETHERNET_VLAN_SIZE)
1333 srrctl |= IXGBEVF_RXBUFFER_2048 >>
1334 IXGBE_SRRCTL_BSIZEPKT_SHIFT;
1335 else
1336 srrctl |= rx_ring->rx_buf_len >>
1337 IXGBE_SRRCTL_BSIZEPKT_SHIFT;
1338 }
1339 IXGBE_WRITE_REG(hw, IXGBE_VFSRRCTL(index), srrctl);
1340}
1341
1342/**
1343 * ixgbevf_configure_rx - Configure 82599 VF Receive Unit after Reset
1344 * @adapter: board private structure
1345 *
1346 * Configure the Rx unit of the MAC after a reset.
1347 **/
1348static void ixgbevf_configure_rx(struct ixgbevf_adapter *adapter)
1349{
1350 u64 rdba;
1351 struct ixgbe_hw *hw = &adapter->hw;
1352 struct net_device *netdev = adapter->netdev;
1353 int max_frame = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
1354 int i, j;
1355 u32 rdlen;
1356 int rx_buf_len;
1357
1358 /* Decide whether to use packet split mode or not */
1359 if (netdev->mtu > ETH_DATA_LEN) {
1360 if (adapter->flags & IXGBE_FLAG_RX_PS_CAPABLE)
1361 adapter->flags |= IXGBE_FLAG_RX_PS_ENABLED;
1362 else
1363 adapter->flags &= ~IXGBE_FLAG_RX_PS_ENABLED;
1364 } else {
1365 if (adapter->flags & IXGBE_FLAG_RX_1BUF_CAPABLE)
1366 adapter->flags &= ~IXGBE_FLAG_RX_PS_ENABLED;
1367 else
1368 adapter->flags |= IXGBE_FLAG_RX_PS_ENABLED;
1369 }
1370
1371 /* Set the RX buffer length according to the mode */
1372 if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) {
1373 /* PSRTYPE must be initialized in 82599 */
1374 u32 psrtype = IXGBE_PSRTYPE_TCPHDR |
1375 IXGBE_PSRTYPE_UDPHDR |
1376 IXGBE_PSRTYPE_IPV4HDR |
1377 IXGBE_PSRTYPE_IPV6HDR |
1378 IXGBE_PSRTYPE_L2HDR;
1379 IXGBE_WRITE_REG(hw, IXGBE_VFPSRTYPE, psrtype);
1380 rx_buf_len = IXGBEVF_RX_HDR_SIZE;
1381 } else {
1382 IXGBE_WRITE_REG(hw, IXGBE_VFPSRTYPE, 0);
1383 if (netdev->mtu <= ETH_DATA_LEN)
1384 rx_buf_len = MAXIMUM_ETHERNET_VLAN_SIZE;
1385 else
1386 rx_buf_len = ALIGN(max_frame, 1024);
1387 }
1388
1389 rdlen = adapter->rx_ring[0].count * sizeof(union ixgbe_adv_rx_desc);
1390 /* Setup the HW Rx Head and Tail Descriptor Pointers and
1391 * the Base and Length of the Rx Descriptor Ring */
1392 for (i = 0; i < adapter->num_rx_queues; i++) {
1393 rdba = adapter->rx_ring[i].dma;
1394 j = adapter->rx_ring[i].reg_idx;
1395 IXGBE_WRITE_REG(hw, IXGBE_VFRDBAL(j),
1396 (rdba & DMA_BIT_MASK(32)));
1397 IXGBE_WRITE_REG(hw, IXGBE_VFRDBAH(j), (rdba >> 32));
1398 IXGBE_WRITE_REG(hw, IXGBE_VFRDLEN(j), rdlen);
1399 IXGBE_WRITE_REG(hw, IXGBE_VFRDH(j), 0);
1400 IXGBE_WRITE_REG(hw, IXGBE_VFRDT(j), 0);
1401 adapter->rx_ring[i].head = IXGBE_VFRDH(j);
1402 adapter->rx_ring[i].tail = IXGBE_VFRDT(j);
1403 adapter->rx_ring[i].rx_buf_len = rx_buf_len;
1404
1405 ixgbevf_configure_srrctl(adapter, j);
1406 }
1407}
1408
8e586137 1409static int ixgbevf_vlan_rx_add_vid(struct net_device *netdev, u16 vid)
92915f71
GR		 1410{
1411 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
1412 struct ixgbe_hw *hw = &adapter->hw;
92915f71
GR		 1413
1414 /* add VID to filter table */
1415 if (hw->mac.ops.set_vfta)
1416 hw->mac.ops.set_vfta(hw, vid, 0, true);
dadcd65f 1417 set_bit(vid, adapter->active_vlans);
8e586137
JP		 1418
1419 return 0;
92915f71
GR		 1420}
1421
8e586137 1422static int ixgbevf_vlan_rx_kill_vid(struct net_device *netdev, u16 vid)
92915f71
GR		 1423{
1424 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
1425 struct ixgbe_hw *hw = &adapter->hw;
1426
92915f71
GR		 1427 /* remove VID from filter table */
1428 if (hw->mac.ops.set_vfta)
1429 hw->mac.ops.set_vfta(hw, vid, 0, false);
dadcd65f 1430 clear_bit(vid, adapter->active_vlans);
8e586137
JP		 1431
1432 return 0;
92915f71
GR		 1433}
1434
1435static void ixgbevf_restore_vlan(struct ixgbevf_adapter *adapter)
1436{
dadcd65f 1437 u16 vid;
92915f71 1438
dadcd65f
JP		 1439 for_each_set_bit(vid, adapter->active_vlans, VLAN_N_VID)
1440 ixgbevf_vlan_rx_add_vid(adapter->netdev, vid);
92915f71
GR		 1441}
1442
46ec20ff
GR		 1443static int ixgbevf_write_uc_addr_list(struct net_device *netdev)
1444{
1445 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
1446 struct ixgbe_hw *hw = &adapter->hw;
1447 int count = 0;
1448
1449 if ((netdev_uc_count(netdev)) > 10) {
dbd9636e 1450 pr_err("Too many unicast filters - No Space\n");
46ec20ff
GR		 1451 return -ENOSPC;
1452 }
1453
1454 if (!netdev_uc_empty(netdev)) {
1455 struct netdev_hw_addr *ha;
1456 netdev_for_each_uc_addr(ha, netdev) {
1457 hw->mac.ops.set_uc_addr(hw, ++count, ha->addr);
1458 udelay(200);
1459 }
1460 } else {
1461 /*
1462 * If the list is empty then send message to PF driver to
1463 * clear all macvlans on this VF.
1464 */
1465 hw->mac.ops.set_uc_addr(hw, 0, NULL);
1466 }
1467
1468 return count;
1469}
1470
92915f71
GR		 1471/**
1472 * ixgbevf_set_rx_mode - Multicast set
1473 * @netdev: network interface device structure
1474 *
1475 * The set_rx_method entry point is called whenever the multicast address
1476 * list or the network interface flags are updated. This routine is
1477 * responsible for configuring the hardware for proper multicast mode.
1478 **/
1479static void ixgbevf_set_rx_mode(struct net_device *netdev)
1480{
1481 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
1482 struct ixgbe_hw *hw = &adapter->hw;
92915f71
GR		 1483
1484 /* reprogram multicast list */
92915f71 1485 if (hw->mac.ops.update_mc_addr_list)
5c58c47a 1486 hw->mac.ops.update_mc_addr_list(hw, netdev);
46ec20ff
GR		 1487
1488 ixgbevf_write_uc_addr_list(netdev);
92915f71
GR		 1489}
1490
1491static void ixgbevf_napi_enable_all(struct ixgbevf_adapter *adapter)
1492{
1493 int q_idx;
1494 struct ixgbevf_q_vector *q_vector;
1495 int q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
1496
1497 for (q_idx = 0; q_idx < q_vectors; q_idx++) {
1498 struct napi_struct *napi;
1499 q_vector = adapter->q_vector[q_idx];
1500 if (!q_vector->rxr_count)
1501 continue;
1502 napi = &q_vector->napi;
1503 if (q_vector->rxr_count > 1)
1504 napi->poll = &ixgbevf_clean_rxonly_many;
1505
1506 napi_enable(napi);
1507 }
1508}
1509
1510static void ixgbevf_napi_disable_all(struct ixgbevf_adapter *adapter)
1511{
1512 int q_idx;
1513 struct ixgbevf_q_vector *q_vector;
1514 int q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
1515
1516 for (q_idx = 0; q_idx < q_vectors; q_idx++) {
1517 q_vector = adapter->q_vector[q_idx];
1518 if (!q_vector->rxr_count)
1519 continue;
1520 napi_disable(&q_vector->napi);
1521 }
1522}
1523
1524static void ixgbevf_configure(struct ixgbevf_adapter *adapter)
1525{
1526 struct net_device *netdev = adapter->netdev;
1527 int i;
1528
1529 ixgbevf_set_rx_mode(netdev);
1530
1531 ixgbevf_restore_vlan(adapter);
1532
1533 ixgbevf_configure_tx(adapter);
1534 ixgbevf_configure_rx(adapter);
1535 for (i = 0; i < adapter->num_rx_queues; i++) {
1536 struct ixgbevf_ring *ring = &adapter->rx_ring[i];
1537 ixgbevf_alloc_rx_buffers(adapter, ring, ring->count);
1538 ring->next_to_use = ring->count - 1;
1539 writel(ring->next_to_use, adapter->hw.hw_addr + ring->tail);
1540 }
1541}
1542
1543#define IXGBE_MAX_RX_DESC_POLL 10
1544static inline void ixgbevf_rx_desc_queue_enable(struct ixgbevf_adapter *adapter,
1545 int rxr)
1546{
1547 struct ixgbe_hw *hw = &adapter->hw;
1548 int j = adapter->rx_ring[rxr].reg_idx;
1549 int k;
1550
1551 for (k = 0; k < IXGBE_MAX_RX_DESC_POLL; k++) {
1552 if (IXGBE_READ_REG(hw, IXGBE_VFRXDCTL(j)) & IXGBE_RXDCTL_ENABLE)
1553 break;
1554 else
1555 msleep(1);
1556 }
1557 if (k >= IXGBE_MAX_RX_DESC_POLL) {
1558 hw_dbg(hw, "RXDCTL.ENABLE on Rx queue %d "
1559 "not set within the polling period\n", rxr);
1560 }
1561
1562 ixgbevf_release_rx_desc(&adapter->hw, &adapter->rx_ring[rxr],
1563 (adapter->rx_ring[rxr].count - 1));
1564}
1565
33bd9f60
GR		 1566static void ixgbevf_save_reset_stats(struct ixgbevf_adapter *adapter)
1567{
1568 /* Only save pre-reset stats if there are some */
1569 if (adapter->stats.vfgprc || adapter->stats.vfgptc) {
1570 adapter->stats.saved_reset_vfgprc += adapter->stats.vfgprc -
1571 adapter->stats.base_vfgprc;
1572 adapter->stats.saved_reset_vfgptc += adapter->stats.vfgptc -
1573 adapter->stats.base_vfgptc;
1574 adapter->stats.saved_reset_vfgorc += adapter->stats.vfgorc -
1575 adapter->stats.base_vfgorc;
1576 adapter->stats.saved_reset_vfgotc += adapter->stats.vfgotc -
1577 adapter->stats.base_vfgotc;
1578 adapter->stats.saved_reset_vfmprc += adapter->stats.vfmprc -
1579 adapter->stats.base_vfmprc;
1580 }
1581}
1582
1583static void ixgbevf_init_last_counter_stats(struct ixgbevf_adapter *adapter)
1584{
1585 struct ixgbe_hw *hw = &adapter->hw;
1586
1587 adapter->stats.last_vfgprc = IXGBE_READ_REG(hw, IXGBE_VFGPRC);
1588 adapter->stats.last_vfgorc = IXGBE_READ_REG(hw, IXGBE_VFGORC_LSB);
1589 adapter->stats.last_vfgorc |=
1590 (((u64)(IXGBE_READ_REG(hw, IXGBE_VFGORC_MSB))) << 32);
1591 adapter->stats.last_vfgptc = IXGBE_READ_REG(hw, IXGBE_VFGPTC);
1592 adapter->stats.last_vfgotc = IXGBE_READ_REG(hw, IXGBE_VFGOTC_LSB);
1593 adapter->stats.last_vfgotc |=
1594 (((u64)(IXGBE_READ_REG(hw, IXGBE_VFGOTC_MSB))) << 32);
1595 adapter->stats.last_vfmprc = IXGBE_READ_REG(hw, IXGBE_VFMPRC);
1596
1597 adapter->stats.base_vfgprc = adapter->stats.last_vfgprc;
1598 adapter->stats.base_vfgorc = adapter->stats.last_vfgorc;
1599 adapter->stats.base_vfgptc = adapter->stats.last_vfgptc;
1600 adapter->stats.base_vfgotc = adapter->stats.last_vfgotc;
1601 adapter->stats.base_vfmprc = adapter->stats.last_vfmprc;
1602}
1603
92915f71
GR		 1604static int ixgbevf_up_complete(struct ixgbevf_adapter *adapter)
1605{
1606 struct net_device *netdev = adapter->netdev;
1607 struct ixgbe_hw *hw = &adapter->hw;
1608 int i, j = 0;
1609 int num_rx_rings = adapter->num_rx_queues;
1610 u32 txdctl, rxdctl;
1611
1612 for (i = 0; i < adapter->num_tx_queues; i++) {
1613 j = adapter->tx_ring[i].reg_idx;
1614 txdctl = IXGBE_READ_REG(hw, IXGBE_VFTXDCTL(j));
1615 /* enable WTHRESH=8 descriptors, to encourage burst writeback */
1616 txdctl |= (8 << 16);
1617 IXGBE_WRITE_REG(hw, IXGBE_VFTXDCTL(j), txdctl);
1618 }
1619
1620 for (i = 0; i < adapter->num_tx_queues; i++) {
1621 j = adapter->tx_ring[i].reg_idx;
1622 txdctl = IXGBE_READ_REG(hw, IXGBE_VFTXDCTL(j));
1623 txdctl |= IXGBE_TXDCTL_ENABLE;
1624 IXGBE_WRITE_REG(hw, IXGBE_VFTXDCTL(j), txdctl);
1625 }
1626
1627 for (i = 0; i < num_rx_rings; i++) {
1628 j = adapter->rx_ring[i].reg_idx;
1629 rxdctl = IXGBE_READ_REG(hw, IXGBE_VFRXDCTL(j));
dadcd65f 1630 rxdctl |= IXGBE_RXDCTL_ENABLE | IXGBE_RXDCTL_VME;
69bfbec4
GR		 1631 if (hw->mac.type == ixgbe_mac_X540_vf) {
1632 rxdctl &= ~IXGBE_RXDCTL_RLPMLMASK;
1633 rxdctl |= ((netdev->mtu + ETH_HLEN + ETH_FCS_LEN) |
1634 IXGBE_RXDCTL_RLPML_EN);
1635 }
92915f71
GR		 1636 IXGBE_WRITE_REG(hw, IXGBE_VFRXDCTL(j), rxdctl);
1637 ixgbevf_rx_desc_queue_enable(adapter, i);
1638 }
1639
1640 ixgbevf_configure_msix(adapter);
1641
1642 if (hw->mac.ops.set_rar) {
1643 if (is_valid_ether_addr(hw->mac.addr))
1644 hw->mac.ops.set_rar(hw, 0, hw->mac.addr, 0);
1645 else
1646 hw->mac.ops.set_rar(hw, 0, hw->mac.perm_addr, 0);
1647 }
1648
1649 clear_bit(__IXGBEVF_DOWN, &adapter->state);
1650 ixgbevf_napi_enable_all(adapter);
1651
1652 /* enable transmits */
1653 netif_tx_start_all_queues(netdev);
1654
33bd9f60
GR		 1655 ixgbevf_save_reset_stats(adapter);
1656 ixgbevf_init_last_counter_stats(adapter);
1657
92915f71
GR		 1658 /* bring the link up in the watchdog, this could race with our first
1659 * link up interrupt but shouldn't be a problem */
1660 adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE;
1661 adapter->link_check_timeout = jiffies;
1662 mod_timer(&adapter->watchdog_timer, jiffies);
1663 return 0;
1664}
1665
1666int ixgbevf_up(struct ixgbevf_adapter *adapter)
1667{
1668 int err;
1669 struct ixgbe_hw *hw = &adapter->hw;
1670
1671 ixgbevf_configure(adapter);
1672
1673 err = ixgbevf_up_complete(adapter);
1674
1675 /* clear any pending interrupts, may auto mask */
1676 IXGBE_READ_REG(hw, IXGBE_VTEICR);
1677
1678 ixgbevf_irq_enable(adapter, true, true);
1679
1680 return err;
1681}
1682
1683/**
1684 * ixgbevf_clean_rx_ring - Free Rx Buffers per Queue
1685 * @adapter: board private structure
1686 * @rx_ring: ring to free buffers from
1687 **/
1688static void ixgbevf_clean_rx_ring(struct ixgbevf_adapter *adapter,
1689 struct ixgbevf_ring *rx_ring)
1690{
1691 struct pci_dev *pdev = adapter->pdev;
1692 unsigned long size;
1693 unsigned int i;
1694
c0456c23
GR		 1695 if (!rx_ring->rx_buffer_info)
1696 return;
92915f71 1697
c0456c23 1698 /* Free all the Rx ring sk_buffs */
92915f71
GR		 1699 for (i = 0; i < rx_ring->count; i++) {
1700 struct ixgbevf_rx_buffer *rx_buffer_info;
1701
1702 rx_buffer_info = &rx_ring->rx_buffer_info[i];
1703 if (rx_buffer_info->dma) {
2a1f8794 1704 dma_unmap_single(&pdev->dev, rx_buffer_info->dma,
92915f71 1705 rx_ring->rx_buf_len,
2a1f8794 1706 DMA_FROM_DEVICE);
92915f71
GR		 1707 rx_buffer_info->dma = 0;
1708 }
1709 if (rx_buffer_info->skb) {
1710 struct sk_buff *skb = rx_buffer_info->skb;
1711 rx_buffer_info->skb = NULL;
1712 do {
1713 struct sk_buff *this = skb;
1714 skb = skb->prev;
1715 dev_kfree_skb(this);
1716 } while (skb);
1717 }
1718 if (!rx_buffer_info->page)
1719 continue;
2a1f8794
NN		 1720 dma_unmap_page(&pdev->dev, rx_buffer_info->page_dma,
1721 PAGE_SIZE / 2, DMA_FROM_DEVICE);
92915f71
GR		 1722 rx_buffer_info->page_dma = 0;
1723 put_page(rx_buffer_info->page);
1724 rx_buffer_info->page = NULL;
1725 rx_buffer_info->page_offset = 0;
1726 }
1727
1728 size = sizeof(struct ixgbevf_rx_buffer) * rx_ring->count;
1729 memset(rx_ring->rx_buffer_info, 0, size);
1730
1731 /* Zero out the descriptor ring */
1732 memset(rx_ring->desc, 0, rx_ring->size);
1733
1734 rx_ring->next_to_clean = 0;
1735 rx_ring->next_to_use = 0;
1736
1737 if (rx_ring->head)
1738 writel(0, adapter->hw.hw_addr + rx_ring->head);
1739 if (rx_ring->tail)
1740 writel(0, adapter->hw.hw_addr + rx_ring->tail);
1741}
1742
1743/**
1744 * ixgbevf_clean_tx_ring - Free Tx Buffers
1745 * @adapter: board private structure
1746 * @tx_ring: ring to be cleaned
1747 **/
1748static void ixgbevf_clean_tx_ring(struct ixgbevf_adapter *adapter,
1749 struct ixgbevf_ring *tx_ring)
1750{
1751 struct ixgbevf_tx_buffer *tx_buffer_info;
1752 unsigned long size;
1753 unsigned int i;
1754
c0456c23
GR		 1755 if (!tx_ring->tx_buffer_info)
1756 return;
1757
92915f71
GR		 1758 /* Free all the Tx ring sk_buffs */
1759
1760 for (i = 0; i < tx_ring->count; i++) {
1761 tx_buffer_info = &tx_ring->tx_buffer_info[i];
1762 ixgbevf_unmap_and_free_tx_resource(adapter, tx_buffer_info);
1763 }
1764
1765 size = sizeof(struct ixgbevf_tx_buffer) * tx_ring->count;
1766 memset(tx_ring->tx_buffer_info, 0, size);
1767
1768 memset(tx_ring->desc, 0, tx_ring->size);
1769
1770 tx_ring->next_to_use = 0;
1771 tx_ring->next_to_clean = 0;
1772
1773 if (tx_ring->head)
1774 writel(0, adapter->hw.hw_addr + tx_ring->head);
1775 if (tx_ring->tail)
1776 writel(0, adapter->hw.hw_addr + tx_ring->tail);
1777}
1778
1779/**
1780 * ixgbevf_clean_all_rx_rings - Free Rx Buffers for all queues
1781 * @adapter: board private structure
1782 **/
1783static void ixgbevf_clean_all_rx_rings(struct ixgbevf_adapter *adapter)
1784{
1785 int i;
1786
1787 for (i = 0; i < adapter->num_rx_queues; i++)
1788 ixgbevf_clean_rx_ring(adapter, &adapter->rx_ring[i]);
1789}
1790
1791/**
1792 * ixgbevf_clean_all_tx_rings - Free Tx Buffers for all queues
1793 * @adapter: board private structure
1794 **/
1795static void ixgbevf_clean_all_tx_rings(struct ixgbevf_adapter *adapter)
1796{
1797 int i;
1798
1799 for (i = 0; i < adapter->num_tx_queues; i++)
1800 ixgbevf_clean_tx_ring(adapter, &adapter->tx_ring[i]);
1801}
1802
1803void ixgbevf_down(struct ixgbevf_adapter *adapter)
1804{
1805 struct net_device *netdev = adapter->netdev;
1806 struct ixgbe_hw *hw = &adapter->hw;
1807 u32 txdctl;
1808 int i, j;
1809
1810 /* signal that we are down to the interrupt handler */
1811 set_bit(__IXGBEVF_DOWN, &adapter->state);
1812 /* disable receives */
1813
1814 netif_tx_disable(netdev);
1815
1816 msleep(10);
1817
1818 netif_tx_stop_all_queues(netdev);
1819
1820 ixgbevf_irq_disable(adapter);
1821
1822 ixgbevf_napi_disable_all(adapter);
1823
1824 del_timer_sync(&adapter->watchdog_timer);
1825 /* can't call flush scheduled work here because it can deadlock
1826 * if linkwatch_event tries to acquire the rtnl_lock which we are
1827 * holding */
1828 while (adapter->flags & IXGBE_FLAG_IN_WATCHDOG_TASK)
1829 msleep(1);
1830
1831 /* disable transmits in the hardware now that interrupts are off */
1832 for (i = 0; i < adapter->num_tx_queues; i++) {
1833 j = adapter->tx_ring[i].reg_idx;
1834 txdctl = IXGBE_READ_REG(hw, IXGBE_VFTXDCTL(j));
1835 IXGBE_WRITE_REG(hw, IXGBE_VFTXDCTL(j),
1836 (txdctl & ~IXGBE_TXDCTL_ENABLE));
1837 }
1838
1839 netif_carrier_off(netdev);
1840
1841 if (!pci_channel_offline(adapter->pdev))
1842 ixgbevf_reset(adapter);
1843
1844 ixgbevf_clean_all_tx_rings(adapter);
1845 ixgbevf_clean_all_rx_rings(adapter);
1846}
1847
1848void ixgbevf_reinit_locked(struct ixgbevf_adapter *adapter)
1849{
c0456c23
GR		 1850 struct ixgbe_hw *hw = &adapter->hw;
1851
92915f71 1852 WARN_ON(in_interrupt());
c0456c23 1853
92915f71
GR		 1854 while (test_and_set_bit(__IXGBEVF_RESETTING, &adapter->state))
1855 msleep(1);
1856
c0456c23
GR		 1857 /*
1858 * Check if PF is up before re-init. If not then skip until
1859 * later when the PF is up and ready to service requests from
1860 * the VF via mailbox. If the VF is up and running then the
1861 * watchdog task will continue to schedule reset tasks until
1862 * the PF is up and running.
1863 */
1864 if (!hw->mac.ops.reset_hw(hw)) {
1865 ixgbevf_down(adapter);
1866 ixgbevf_up(adapter);
1867 }
92915f71
GR		 1868
1869 clear_bit(__IXGBEVF_RESETTING, &adapter->state);
1870}
1871
1872void ixgbevf_reset(struct ixgbevf_adapter *adapter)
1873{
1874 struct ixgbe_hw *hw = &adapter->hw;
1875 struct net_device *netdev = adapter->netdev;
1876
1877 if (hw->mac.ops.reset_hw(hw))
1878 hw_dbg(hw, "PF still resetting\n");
1879 else
1880 hw->mac.ops.init_hw(hw);
1881
1882 if (is_valid_ether_addr(adapter->hw.mac.addr)) {
1883 memcpy(netdev->dev_addr, adapter->hw.mac.addr,
1884 netdev->addr_len);
1885 memcpy(netdev->perm_addr, adapter->hw.mac.addr,
1886 netdev->addr_len);
1887 }
1888}
1889
1890static void ixgbevf_acquire_msix_vectors(struct ixgbevf_adapter *adapter,
1891 int vectors)
1892{
1893 int err, vector_threshold;
1894
1895 /* We'll want at least 3 (vector_threshold):
1896 * 1) TxQ[0] Cleanup
1897 * 2) RxQ[0] Cleanup
1898 * 3) Other (Link Status Change, etc.)
1899 */
1900 vector_threshold = MIN_MSIX_COUNT;
1901
1902 /* The more we get, the more we will assign to Tx/Rx Cleanup
1903 * for the separate queues...where Rx Cleanup >= Tx Cleanup.
1904 * Right now, we simply care about how many we'll get; we'll
1905 * set them up later while requesting irq's.
1906 */
1907 while (vectors >= vector_threshold) {
1908 err = pci_enable_msix(adapter->pdev, adapter->msix_entries,
1909 vectors);
1910 if (!err) /* Success in acquiring all requested vectors. */
1911 break;
1912 else if (err < 0)
1913 vectors = 0; /* Nasty failure, quit now */
1914 else /* err == number of vectors we should try again with */
1915 vectors = err;
1916 }
1917
1918 if (vectors < vector_threshold) {
1919 /* Can't allocate enough MSI-X interrupts? Oh well.
1920 * This just means we'll go with either a single MSI
1921 * vector or fall back to legacy interrupts.
1922 */
1923 hw_dbg(&adapter->hw,
1924 "Unable to allocate MSI-X interrupts\n");
1925 kfree(adapter->msix_entries);
1926 adapter->msix_entries = NULL;
1927 } else {
1928 /*
1929 * Adjust for only the vectors we'll use, which is minimum
1930 * of max_msix_q_vectors + NON_Q_VECTORS, or the number of
1931 * vectors we were allocated.
1932 */
1933 adapter->num_msix_vectors = vectors;
1934 }
1935}
1936
1937/*
25985edc 1938 * ixgbevf_set_num_queues: Allocate queues for device, feature dependent
92915f71
GR		 1939 * @adapter: board private structure to initialize
1940 *
1941 * This is the top level queue allocation routine. The order here is very
1942 * important, starting with the "most" number of features turned on at once,
1943 * and ending with the smallest set of features. This way large combinations
1944 * can be allocated if they're turned on, and smaller combinations are the
1945 * fallthrough conditions.
1946 *
1947 **/
1948static void ixgbevf_set_num_queues(struct ixgbevf_adapter *adapter)
1949{
1950 /* Start with base case */
1951 adapter->num_rx_queues = 1;
1952 adapter->num_tx_queues = 1;
1953 adapter->num_rx_pools = adapter->num_rx_queues;
1954 adapter->num_rx_queues_per_pool = 1;
1955}
1956
1957/**
1958 * ixgbevf_alloc_queues - Allocate memory for all rings
1959 * @adapter: board private structure to initialize
1960 *
1961 * We allocate one ring per queue at run-time since we don't know the
1962 * number of queues at compile-time. The polling_netdev array is
1963 * intended for Multiqueue, but should work fine with a single queue.
1964 **/
1965static int ixgbevf_alloc_queues(struct ixgbevf_adapter *adapter)
1966{
1967 int i;
1968
1969 adapter->tx_ring = kcalloc(adapter->num_tx_queues,
1970 sizeof(struct ixgbevf_ring), GFP_KERNEL);
1971 if (!adapter->tx_ring)
1972 goto err_tx_ring_allocation;
1973
1974 adapter->rx_ring = kcalloc(adapter->num_rx_queues,
1975 sizeof(struct ixgbevf_ring), GFP_KERNEL);
1976 if (!adapter->rx_ring)
1977 goto err_rx_ring_allocation;
1978
1979 for (i = 0; i < adapter->num_tx_queues; i++) {
1980 adapter->tx_ring[i].count = adapter->tx_ring_count;
1981 adapter->tx_ring[i].queue_index = i;
1982 adapter->tx_ring[i].reg_idx = i;
1983 }
1984
1985 for (i = 0; i < adapter->num_rx_queues; i++) {
1986 adapter->rx_ring[i].count = adapter->rx_ring_count;
1987 adapter->rx_ring[i].queue_index = i;
1988 adapter->rx_ring[i].reg_idx = i;
1989 }
1990
1991 return 0;
1992
1993err_rx_ring_allocation:
1994 kfree(adapter->tx_ring);
1995err_tx_ring_allocation:
1996 return -ENOMEM;
1997}
1998
1999/**
2000 * ixgbevf_set_interrupt_capability - set MSI-X or FAIL if not supported
2001 * @adapter: board private structure to initialize
2002 *
2003 * Attempt to configure the interrupts using the best available
2004 * capabilities of the hardware and the kernel.
2005 **/
2006static int ixgbevf_set_interrupt_capability(struct ixgbevf_adapter *adapter)
2007{
2008 int err = 0;
2009 int vector, v_budget;
2010
2011 /*
2012 * It's easy to be greedy for MSI-X vectors, but it really
2013 * doesn't do us much good if we have a lot more vectors
2014 * than CPU's. So let's be conservative and only ask for
2015 * (roughly) twice the number of vectors as there are CPU's.
2016 */
2017 v_budget = min(adapter->num_rx_queues + adapter->num_tx_queues,
2018 (int)(num_online_cpus() * 2)) + NON_Q_VECTORS;
2019
2020 /* A failure in MSI-X entry allocation isn't fatal, but it does
2021 * mean we disable MSI-X capabilities of the adapter. */
2022 adapter->msix_entries = kcalloc(v_budget,
2023 sizeof(struct msix_entry), GFP_KERNEL);
2024 if (!adapter->msix_entries) {
2025 err = -ENOMEM;
2026 goto out;
2027 }
2028
2029 for (vector = 0; vector < v_budget; vector++)
2030 adapter->msix_entries[vector].entry = vector;
2031
2032 ixgbevf_acquire_msix_vectors(adapter, v_budget);
2033
2034out:
2035 return err;
2036}
2037
2038/**
2039 * ixgbevf_alloc_q_vectors - Allocate memory for interrupt vectors
2040 * @adapter: board private structure to initialize
2041 *
2042 * We allocate one q_vector per queue interrupt. If allocation fails we
2043 * return -ENOMEM.
2044 **/
2045static int ixgbevf_alloc_q_vectors(struct ixgbevf_adapter *adapter)
2046{
2047 int q_idx, num_q_vectors;
2048 struct ixgbevf_q_vector *q_vector;
2049 int napi_vectors;
2050 int (*poll)(struct napi_struct *, int);
2051
2052 num_q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
2053 napi_vectors = adapter->num_rx_queues;
2054 poll = &ixgbevf_clean_rxonly;
2055
2056 for (q_idx = 0; q_idx < num_q_vectors; q_idx++) {
2057 q_vector = kzalloc(sizeof(struct ixgbevf_q_vector), GFP_KERNEL);
2058 if (!q_vector)
2059 goto err_out;
2060 q_vector->adapter = adapter;
2061 q_vector->v_idx = q_idx;
2062 q_vector->eitr = adapter->eitr_param;
2063 if (q_idx < napi_vectors)
2064 netif_napi_add(adapter->netdev, &q_vector->napi,
2065 (*poll), 64);
2066 adapter->q_vector[q_idx] = q_vector;
2067 }
2068
2069 return 0;
2070
2071err_out:
2072 while (q_idx) {
2073 q_idx--;
2074 q_vector = adapter->q_vector[q_idx];
2075 netif_napi_del(&q_vector->napi);
2076 kfree(q_vector);
2077 adapter->q_vector[q_idx] = NULL;
2078 }
2079 return -ENOMEM;
2080}
2081
2082/**
2083 * ixgbevf_free_q_vectors - Free memory allocated for interrupt vectors
2084 * @adapter: board private structure to initialize
2085 *
2086 * This function frees the memory allocated to the q_vectors. In addition if
2087 * NAPI is enabled it will delete any references to the NAPI struct prior
2088 * to freeing the q_vector.
2089 **/
2090static void ixgbevf_free_q_vectors(struct ixgbevf_adapter *adapter)
2091{
2092 int q_idx, num_q_vectors;
2093 int napi_vectors;
2094
2095 num_q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
2096 napi_vectors = adapter->num_rx_queues;
2097
2098 for (q_idx = 0; q_idx < num_q_vectors; q_idx++) {
2099 struct ixgbevf_q_vector *q_vector = adapter->q_vector[q_idx];
2100
2101 adapter->q_vector[q_idx] = NULL;
2102 if (q_idx < napi_vectors)
2103 netif_napi_del(&q_vector->napi);
2104 kfree(q_vector);
2105 }
2106}
2107
2108/**
2109 * ixgbevf_reset_interrupt_capability - Reset MSIX setup
2110 * @adapter: board private structure
2111 *
2112 **/
2113static void ixgbevf_reset_interrupt_capability(struct ixgbevf_adapter *adapter)
2114{
2115 pci_disable_msix(adapter->pdev);
2116 kfree(adapter->msix_entries);
2117 adapter->msix_entries = NULL;
92915f71
GR		 2118}
2119
2120/**
2121 * ixgbevf_init_interrupt_scheme - Determine if MSIX is supported and init
2122 * @adapter: board private structure to initialize
2123 *
2124 **/
2125static int ixgbevf_init_interrupt_scheme(struct ixgbevf_adapter *adapter)
2126{
2127 int err;
2128
2129 /* Number of supported queues */
2130 ixgbevf_set_num_queues(adapter);
2131
2132 err = ixgbevf_set_interrupt_capability(adapter);
2133 if (err) {
2134 hw_dbg(&adapter->hw,
2135 "Unable to setup interrupt capabilities\n");
2136 goto err_set_interrupt;
2137 }
2138
2139 err = ixgbevf_alloc_q_vectors(adapter);
2140 if (err) {
2141 hw_dbg(&adapter->hw, "Unable to allocate memory for queue "
2142 "vectors\n");
2143 goto err_alloc_q_vectors;
2144 }
2145
2146 err = ixgbevf_alloc_queues(adapter);
2147 if (err) {
dbd9636e 2148 pr_err("Unable to allocate memory for queues\n");
92915f71
GR		 2149 goto err_alloc_queues;
2150 }
2151
2152 hw_dbg(&adapter->hw, "Multiqueue %s: Rx Queue count = %u, "
2153 "Tx Queue count = %u\n",
2154 (adapter->num_rx_queues > 1) ? "Enabled" :
2155 "Disabled", adapter->num_rx_queues, adapter->num_tx_queues);
2156
2157 set_bit(__IXGBEVF_DOWN, &adapter->state);
2158
2159 return 0;
2160err_alloc_queues:
2161 ixgbevf_free_q_vectors(adapter);
2162err_alloc_q_vectors:
2163 ixgbevf_reset_interrupt_capability(adapter);
2164err_set_interrupt:
2165 return err;
2166}
2167
2168/**
2169 * ixgbevf_sw_init - Initialize general software structures
2170 * (struct ixgbevf_adapter)
2171 * @adapter: board private structure to initialize
2172 *
2173 * ixgbevf_sw_init initializes the Adapter private data structure.
2174 * Fields are initialized based on PCI device information and
2175 * OS network device settings (MTU size).
2176 **/
2177static int __devinit ixgbevf_sw_init(struct ixgbevf_adapter *adapter)
2178{
2179 struct ixgbe_hw *hw = &adapter->hw;
2180 struct pci_dev *pdev = adapter->pdev;
2181 int err;
2182
2183 /* PCI config space info */
2184
2185 hw->vendor_id = pdev->vendor;
2186 hw->device_id = pdev->device;
ff938e43 2187 hw->revision_id = pdev->revision;
92915f71
GR		 2188 hw->subsystem_vendor_id = pdev->subsystem_vendor;
2189 hw->subsystem_device_id = pdev->subsystem_device;
2190
2191 hw->mbx.ops.init_params(hw);
2192 hw->mac.max_tx_queues = MAX_TX_QUEUES;
2193 hw->mac.max_rx_queues = MAX_RX_QUEUES;
2194 err = hw->mac.ops.reset_hw(hw);
2195 if (err) {
2196 dev_info(&pdev->dev,
2197 "PF still in reset state, assigning new address\n");
2c6952df 2198 dev_hw_addr_random(adapter->netdev, hw->mac.addr);
92915f71
GR		 2199 } else {
2200 err = hw->mac.ops.init_hw(hw);
2201 if (err) {
dbd9636e 2202 pr_err("init_shared_code failed: %d\n", err);
92915f71
GR		 2203 goto out;
2204 }
2205 }
2206
2207 /* Enable dynamic interrupt throttling rates */
2208 adapter->eitr_param = 20000;
2209 adapter->itr_setting = 1;
2210
2211 /* set defaults for eitr in MegaBytes */
2212 adapter->eitr_low = 10;
2213 adapter->eitr_high = 20;
2214
2215 /* set default ring sizes */
2216 adapter->tx_ring_count = IXGBEVF_DEFAULT_TXD;
2217 adapter->rx_ring_count = IXGBEVF_DEFAULT_RXD;
2218
2219 /* enable rx csum by default */
2220 adapter->flags |= IXGBE_FLAG_RX_CSUM_ENABLED;
2221
2222 set_bit(__IXGBEVF_DOWN, &adapter->state);
2223
2224out:
2225 return err;
2226}
2227
92915f71
GR		 2228#define UPDATE_VF_COUNTER_32bit(reg, last_counter, counter) \
2229 { \
2230 u32 current_counter = IXGBE_READ_REG(hw, reg); \
2231 if (current_counter < last_counter) \
2232 counter += 0x100000000LL; \
2233 last_counter = current_counter; \
2234 counter &= 0xFFFFFFFF00000000LL; \
2235 counter |= current_counter; \
2236 }
2237
2238#define UPDATE_VF_COUNTER_36bit(reg_lsb, reg_msb, last_counter, counter) \
2239 { \
2240 u64 current_counter_lsb = IXGBE_READ_REG(hw, reg_lsb); \
2241 u64 current_counter_msb = IXGBE_READ_REG(hw, reg_msb); \
2242 u64 current_counter = (current_counter_msb << 32) | \
2243 current_counter_lsb; \
2244 if (current_counter < last_counter) \
2245 counter += 0x1000000000LL; \
2246 last_counter = current_counter; \
2247 counter &= 0xFFFFFFF000000000LL; \
2248 counter |= current_counter; \
2249 }
2250/**
2251 * ixgbevf_update_stats - Update the board statistics counters.
2252 * @adapter: board private structure
2253 **/
2254void ixgbevf_update_stats(struct ixgbevf_adapter *adapter)
2255{
2256 struct ixgbe_hw *hw = &adapter->hw;
2257
2258 UPDATE_VF_COUNTER_32bit(IXGBE_VFGPRC, adapter->stats.last_vfgprc,
2259 adapter->stats.vfgprc);
2260 UPDATE_VF_COUNTER_32bit(IXGBE_VFGPTC, adapter->stats.last_vfgptc,
2261 adapter->stats.vfgptc);
2262 UPDATE_VF_COUNTER_36bit(IXGBE_VFGORC_LSB, IXGBE_VFGORC_MSB,
2263 adapter->stats.last_vfgorc,
2264 adapter->stats.vfgorc);
2265 UPDATE_VF_COUNTER_36bit(IXGBE_VFGOTC_LSB, IXGBE_VFGOTC_MSB,
2266 adapter->stats.last_vfgotc,
2267 adapter->stats.vfgotc);
2268 UPDATE_VF_COUNTER_32bit(IXGBE_VFMPRC, adapter->stats.last_vfmprc,
2269 adapter->stats.vfmprc);
92915f71
GR		 2270}
2271
2272/**
2273 * ixgbevf_watchdog - Timer Call-back
2274 * @data: pointer to adapter cast into an unsigned long
2275 **/
2276static void ixgbevf_watchdog(unsigned long data)
2277{
2278 struct ixgbevf_adapter *adapter = (struct ixgbevf_adapter *)data;
2279 struct ixgbe_hw *hw = &adapter->hw;
2280 u64 eics = 0;
2281 int i;
2282
2283 /*
2284 * Do the watchdog outside of interrupt context due to the lovely
2285 * delays that some of the newer hardware requires
2286 */
2287
2288 if (test_bit(__IXGBEVF_DOWN, &adapter->state))
2289 goto watchdog_short_circuit;
2290
2291 /* get one bit for every active tx/rx interrupt vector */
2292 for (i = 0; i < adapter->num_msix_vectors - NON_Q_VECTORS; i++) {
2293 struct ixgbevf_q_vector *qv = adapter->q_vector[i];
2294 if (qv->rxr_count || qv->txr_count)
2295 eics |= (1 << i);
2296 }
2297
2298 IXGBE_WRITE_REG(hw, IXGBE_VTEICS, (u32)eics);
2299
2300watchdog_short_circuit:
2301 schedule_work(&adapter->watchdog_task);
2302}
2303
2304/**
2305 * ixgbevf_tx_timeout - Respond to a Tx Hang
2306 * @netdev: network interface device structure
2307 **/
2308static void ixgbevf_tx_timeout(struct net_device *netdev)
2309{
2310 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
2311
2312 /* Do the reset outside of interrupt context */
2313 schedule_work(&adapter->reset_task);
2314}
2315
2316static void ixgbevf_reset_task(struct work_struct *work)
2317{
2318 struct ixgbevf_adapter *adapter;
2319 adapter = container_of(work, struct ixgbevf_adapter, reset_task);
2320
2321 /* If we're already down or resetting, just bail */
2322 if (test_bit(__IXGBEVF_DOWN, &adapter->state) ||
2323 test_bit(__IXGBEVF_RESETTING, &adapter->state))
2324 return;
2325
2326 adapter->tx_timeout_count++;
2327
2328 ixgbevf_reinit_locked(adapter);
2329}
2330
2331/**
2332 * ixgbevf_watchdog_task - worker thread to bring link up
2333 * @work: pointer to work_struct containing our data
2334 **/
2335static void ixgbevf_watchdog_task(struct work_struct *work)
2336{
2337 struct ixgbevf_adapter *adapter = container_of(work,
2338 struct ixgbevf_adapter,
2339 watchdog_task);
2340 struct net_device *netdev = adapter->netdev;
2341 struct ixgbe_hw *hw = &adapter->hw;
2342 u32 link_speed = adapter->link_speed;
2343 bool link_up = adapter->link_up;
2344
2345 adapter->flags |= IXGBE_FLAG_IN_WATCHDOG_TASK;
2346
2347 /*
2348 * Always check the link on the watchdog because we have
2349 * no LSC interrupt
2350 */
2351 if (hw->mac.ops.check_link) {
2352 if ((hw->mac.ops.check_link(hw, &link_speed,
2353 &link_up, false)) != 0) {
2354 adapter->link_up = link_up;
2355 adapter->link_speed = link_speed;
da6b3330
GR		 2356 netif_carrier_off(netdev);
2357 netif_tx_stop_all_queues(netdev);
92915f71
GR		 2358 schedule_work(&adapter->reset_task);
2359 goto pf_has_reset;
2360 }
2361 } else {
2362 /* always assume link is up, if no check link
2363 * function */
2364 link_speed = IXGBE_LINK_SPEED_10GB_FULL;
2365 link_up = true;
2366 }
2367 adapter->link_up = link_up;
2368 adapter->link_speed = link_speed;
2369
2370 if (link_up) {
2371 if (!netif_carrier_ok(netdev)) {
300bc060
JP		 2372 hw_dbg(&adapter->hw, "NIC Link is Up, %u Gbps\n",
2373 (link_speed == IXGBE_LINK_SPEED_10GB_FULL) ?
2374 10 : 1);
92915f71
GR		 2375 netif_carrier_on(netdev);
2376 netif_tx_wake_all_queues(netdev);
92915f71
GR		 2377 }
2378 } else {
2379 adapter->link_up = false;
2380 adapter->link_speed = 0;
2381 if (netif_carrier_ok(netdev)) {
2382 hw_dbg(&adapter->hw, "NIC Link is Down\n");
2383 netif_carrier_off(netdev);
2384 netif_tx_stop_all_queues(netdev);
2385 }
2386 }
2387
92915f71
GR		 2388 ixgbevf_update_stats(adapter);
2389
33bd9f60 2390pf_has_reset:
92915f71
GR		 2391 /* Reset the timer */
2392 if (!test_bit(__IXGBEVF_DOWN, &adapter->state))
2393 mod_timer(&adapter->watchdog_timer,
2394 round_jiffies(jiffies + (2 * HZ)));
2395
2396 adapter->flags &= ~IXGBE_FLAG_IN_WATCHDOG_TASK;
2397}
2398
2399/**
2400 * ixgbevf_free_tx_resources - Free Tx Resources per Queue
2401 * @adapter: board private structure
2402 * @tx_ring: Tx descriptor ring for a specific queue
2403 *
2404 * Free all transmit software resources
2405 **/
2406void ixgbevf_free_tx_resources(struct ixgbevf_adapter *adapter,
2407 struct ixgbevf_ring *tx_ring)
2408{
2409 struct pci_dev *pdev = adapter->pdev;
2410
92915f71
GR		 2411 ixgbevf_clean_tx_ring(adapter, tx_ring);
2412
2413 vfree(tx_ring->tx_buffer_info);
2414 tx_ring->tx_buffer_info = NULL;
2415
2a1f8794
NN		 2416 dma_free_coherent(&pdev->dev, tx_ring->size, tx_ring->desc,
2417 tx_ring->dma);
92915f71
GR		 2418
2419 tx_ring->desc = NULL;
2420}
2421
2422/**
2423 * ixgbevf_free_all_tx_resources - Free Tx Resources for All Queues
2424 * @adapter: board private structure
2425 *
2426 * Free all transmit software resources
2427 **/
2428static void ixgbevf_free_all_tx_resources(struct ixgbevf_adapter *adapter)
2429{
2430 int i;
2431
2432 for (i = 0; i < adapter->num_tx_queues; i++)
2433 if (adapter->tx_ring[i].desc)
2434 ixgbevf_free_tx_resources(adapter,
2435 &adapter->tx_ring[i]);
2436
2437}
2438
2439/**
2440 * ixgbevf_setup_tx_resources - allocate Tx resources (Descriptors)
2441 * @adapter: board private structure
2442 * @tx_ring: tx descriptor ring (for a specific queue) to setup
2443 *
2444 * Return 0 on success, negative on failure
2445 **/
2446int ixgbevf_setup_tx_resources(struct ixgbevf_adapter *adapter,
2447 struct ixgbevf_ring *tx_ring)
2448{
2449 struct pci_dev *pdev = adapter->pdev;
2450 int size;
2451
2452 size = sizeof(struct ixgbevf_tx_buffer) * tx_ring->count;
89bf67f1 2453 tx_ring->tx_buffer_info = vzalloc(size);
92915f71
GR		 2454 if (!tx_ring->tx_buffer_info)
2455 goto err;
92915f71
GR		 2456
2457 /* round up to nearest 4K */
2458 tx_ring->size = tx_ring->count * sizeof(union ixgbe_adv_tx_desc);
2459 tx_ring->size = ALIGN(tx_ring->size, 4096);
2460
2a1f8794
NN		 2461 tx_ring->desc = dma_alloc_coherent(&pdev->dev, tx_ring->size,
2462 &tx_ring->dma, GFP_KERNEL);
92915f71
GR		 2463 if (!tx_ring->desc)
2464 goto err;
2465
2466 tx_ring->next_to_use = 0;
2467 tx_ring->next_to_clean = 0;
2468 tx_ring->work_limit = tx_ring->count;
2469 return 0;
2470
2471err:
2472 vfree(tx_ring->tx_buffer_info);
2473 tx_ring->tx_buffer_info = NULL;
2474 hw_dbg(&adapter->hw, "Unable to allocate memory for the transmit "
2475 "descriptor ring\n");
2476 return -ENOMEM;
2477}
2478
2479/**
2480 * ixgbevf_setup_all_tx_resources - allocate all queues Tx resources
2481 * @adapter: board private structure
2482 *
2483 * If this function returns with an error, then it's possible one or
2484 * more of the rings is populated (while the rest are not). It is the
2485 * callers duty to clean those orphaned rings.
2486 *
2487 * Return 0 on success, negative on failure
2488 **/
2489static int ixgbevf_setup_all_tx_resources(struct ixgbevf_adapter *adapter)
2490{
2491 int i, err = 0;
2492
2493 for (i = 0; i < adapter->num_tx_queues; i++) {
2494 err = ixgbevf_setup_tx_resources(adapter, &adapter->tx_ring[i]);
2495 if (!err)
2496 continue;
2497 hw_dbg(&adapter->hw,
2498 "Allocation for Tx Queue %u failed\n", i);
2499 break;
2500 }
2501
2502 return err;
2503}
2504
2505/**
2506 * ixgbevf_setup_rx_resources - allocate Rx resources (Descriptors)
2507 * @adapter: board private structure
2508 * @rx_ring: rx descriptor ring (for a specific queue) to setup
2509 *
2510 * Returns 0 on success, negative on failure
2511 **/
2512int ixgbevf_setup_rx_resources(struct ixgbevf_adapter *adapter,
2513 struct ixgbevf_ring *rx_ring)
2514{
2515 struct pci_dev *pdev = adapter->pdev;
2516 int size;
2517
2518 size = sizeof(struct ixgbevf_rx_buffer) * rx_ring->count;
89bf67f1 2519 rx_ring->rx_buffer_info = vzalloc(size);
92915f71
GR		 2520 if (!rx_ring->rx_buffer_info) {
2521 hw_dbg(&adapter->hw,
2522 "Unable to vmalloc buffer memory for "
2523 "the receive descriptor ring\n");
2524 goto alloc_failed;
2525 }
92915f71
GR		 2526
2527 /* Round up to nearest 4K */
2528 rx_ring->size = rx_ring->count * sizeof(union ixgbe_adv_rx_desc);
2529 rx_ring->size = ALIGN(rx_ring->size, 4096);
2530
2a1f8794
NN		 2531 rx_ring->desc = dma_alloc_coherent(&pdev->dev, rx_ring->size,
2532 &rx_ring->dma, GFP_KERNEL);
92915f71
GR		 2533
2534 if (!rx_ring->desc) {
2535 hw_dbg(&adapter->hw,
2536 "Unable to allocate memory for "
2537 "the receive descriptor ring\n");
2538 vfree(rx_ring->rx_buffer_info);
2539 rx_ring->rx_buffer_info = NULL;
2540 goto alloc_failed;
2541 }
2542
2543 rx_ring->next_to_clean = 0;
2544 rx_ring->next_to_use = 0;
2545
2546 return 0;
2547alloc_failed:
2548 return -ENOMEM;
2549}
2550
2551/**
2552 * ixgbevf_setup_all_rx_resources - allocate all queues Rx resources
2553 * @adapter: board private structure
2554 *
2555 * If this function returns with an error, then it's possible one or
2556 * more of the rings is populated (while the rest are not). It is the
2557 * callers duty to clean those orphaned rings.
2558 *
2559 * Return 0 on success, negative on failure
2560 **/
2561static int ixgbevf_setup_all_rx_resources(struct ixgbevf_adapter *adapter)
2562{
2563 int i, err = 0;
2564
2565 for (i = 0; i < adapter->num_rx_queues; i++) {
2566 err = ixgbevf_setup_rx_resources(adapter, &adapter->rx_ring[i]);
2567 if (!err)
2568 continue;
2569 hw_dbg(&adapter->hw,
2570 "Allocation for Rx Queue %u failed\n", i);
2571 break;
2572 }
2573 return err;
2574}
2575
2576/**
2577 * ixgbevf_free_rx_resources - Free Rx Resources
2578 * @adapter: board private structure
2579 * @rx_ring: ring to clean the resources from
2580 *
2581 * Free all receive software resources
2582 **/
2583void ixgbevf_free_rx_resources(struct ixgbevf_adapter *adapter,
2584 struct ixgbevf_ring *rx_ring)
2585{
2586 struct pci_dev *pdev = adapter->pdev;
2587
2588 ixgbevf_clean_rx_ring(adapter, rx_ring);
2589
2590 vfree(rx_ring->rx_buffer_info);
2591 rx_ring->rx_buffer_info = NULL;
2592
2a1f8794
NN		 2593 dma_free_coherent(&pdev->dev, rx_ring->size, rx_ring->desc,
2594 rx_ring->dma);
92915f71
GR		 2595
2596 rx_ring->desc = NULL;
2597}
2598
2599/**
2600 * ixgbevf_free_all_rx_resources - Free Rx Resources for All Queues
2601 * @adapter: board private structure
2602 *
2603 * Free all receive software resources
2604 **/
2605static void ixgbevf_free_all_rx_resources(struct ixgbevf_adapter *adapter)
2606{
2607 int i;
2608
2609 for (i = 0; i < adapter->num_rx_queues; i++)
2610 if (adapter->rx_ring[i].desc)
2611 ixgbevf_free_rx_resources(adapter,
2612 &adapter->rx_ring[i]);
2613}
2614
2615/**
2616 * ixgbevf_open - Called when a network interface is made active
2617 * @netdev: network interface device structure
2618 *
2619 * Returns 0 on success, negative value on failure
2620 *
2621 * The open entry point is called when a network interface is made
2622 * active by the system (IFF_UP). At this point all resources needed
2623 * for transmit and receive operations are allocated, the interrupt
2624 * handler is registered with the OS, the watchdog timer is started,
2625 * and the stack is notified that the interface is ready.
2626 **/
2627static int ixgbevf_open(struct net_device *netdev)
2628{
2629 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
2630 struct ixgbe_hw *hw = &adapter->hw;
2631 int err;
2632
2633 /* disallow open during test */
2634 if (test_bit(__IXGBEVF_TESTING, &adapter->state))
2635 return -EBUSY;
2636
2637 if (hw->adapter_stopped) {
2638 ixgbevf_reset(adapter);
2639 /* if adapter is still stopped then PF isn't up and
2640 * the vf can't start. */
2641 if (hw->adapter_stopped) {
2642 err = IXGBE_ERR_MBX;
dbd9636e
JK		 2643 pr_err("Unable to start - perhaps the PF Driver isn't "
2644 "up yet\n");
92915f71
GR		 2645 goto err_setup_reset;
2646 }
2647 }
2648
2649 /* allocate transmit descriptors */
2650 err = ixgbevf_setup_all_tx_resources(adapter);
2651 if (err)
2652 goto err_setup_tx;
2653
2654 /* allocate receive descriptors */
2655 err = ixgbevf_setup_all_rx_resources(adapter);
2656 if (err)
2657 goto err_setup_rx;
2658
2659 ixgbevf_configure(adapter);
2660
2661 /*
2662 * Map the Tx/Rx rings to the vectors we were allotted.
2663 * if request_irq will be called in this function map_rings
2664 * must be called *before* up_complete
2665 */
2666 ixgbevf_map_rings_to_vectors(adapter);
2667
2668 err = ixgbevf_up_complete(adapter);
2669 if (err)
2670 goto err_up;
2671
2672 /* clear any pending interrupts, may auto mask */
2673 IXGBE_READ_REG(hw, IXGBE_VTEICR);
2674 err = ixgbevf_request_irq(adapter);
2675 if (err)
2676 goto err_req_irq;
2677
2678 ixgbevf_irq_enable(adapter, true, true);
2679
2680 return 0;
2681
2682err_req_irq:
2683 ixgbevf_down(adapter);
2684err_up:
2685 ixgbevf_free_irq(adapter);
2686err_setup_rx:
2687 ixgbevf_free_all_rx_resources(adapter);
2688err_setup_tx:
2689 ixgbevf_free_all_tx_resources(adapter);
2690 ixgbevf_reset(adapter);
2691
2692err_setup_reset:
2693
2694 return err;
2695}
2696
2697/**
2698 * ixgbevf_close - Disables a network interface
2699 * @netdev: network interface device structure
2700 *
2701 * Returns 0, this is not allowed to fail
2702 *
2703 * The close entry point is called when an interface is de-activated
2704 * by the OS. The hardware is still under the drivers control, but
2705 * needs to be disabled. A global MAC reset is issued to stop the
2706 * hardware, and all transmit and receive resources are freed.
2707 **/
2708static int ixgbevf_close(struct net_device *netdev)
2709{
2710 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
2711
2712 ixgbevf_down(adapter);
2713 ixgbevf_free_irq(adapter);
2714
2715 ixgbevf_free_all_tx_resources(adapter);
2716 ixgbevf_free_all_rx_resources(adapter);
2717
2718 return 0;
2719}
2720
2721static int ixgbevf_tso(struct ixgbevf_adapter *adapter,
2722 struct ixgbevf_ring *tx_ring,
2723 struct sk_buff *skb, u32 tx_flags, u8 *hdr_len)
2724{
2725 struct ixgbe_adv_tx_context_desc *context_desc;
2726 unsigned int i;
2727 int err;
2728 struct ixgbevf_tx_buffer *tx_buffer_info;
2729 u32 vlan_macip_lens = 0, type_tucmd_mlhl;
2730 u32 mss_l4len_idx, l4len;
2731
2732 if (skb_is_gso(skb)) {
2733 if (skb_header_cloned(skb)) {
2734 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
2735 if (err)
2736 return err;
2737 }
2738 l4len = tcp_hdrlen(skb);
2739 *hdr_len += l4len;
2740
2741 if (skb->protocol == htons(ETH_P_IP)) {
2742 struct iphdr *iph = ip_hdr(skb);
2743 iph->tot_len = 0;
2744 iph->check = 0;
2745 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
2746 iph->daddr, 0,
2747 IPPROTO_TCP,
2748 0);
2749 adapter->hw_tso_ctxt++;
9010bc33 2750 } else if (skb_is_gso_v6(skb)) {
92915f71
GR		 2751 ipv6_hdr(skb)->payload_len = 0;
2752 tcp_hdr(skb)->check =
2753 ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
2754 &ipv6_hdr(skb)->daddr,
2755 0, IPPROTO_TCP, 0);
2756 adapter->hw_tso6_ctxt++;
2757 }
2758
2759 i = tx_ring->next_to_use;
2760
2761 tx_buffer_info = &tx_ring->tx_buffer_info[i];
2762 context_desc = IXGBE_TX_CTXTDESC_ADV(*tx_ring, i);
2763
2764 /* VLAN MACLEN IPLEN */
2765 if (tx_flags & IXGBE_TX_FLAGS_VLAN)
2766 vlan_macip_lens |=
2767 (tx_flags & IXGBE_TX_FLAGS_VLAN_MASK);
2768 vlan_macip_lens |= ((skb_network_offset(skb)) <<
2769 IXGBE_ADVTXD_MACLEN_SHIFT);
2770 *hdr_len += skb_network_offset(skb);
2771 vlan_macip_lens |=
2772 (skb_transport_header(skb) - skb_network_header(skb));
2773 *hdr_len +=
2774 (skb_transport_header(skb) - skb_network_header(skb));
2775 context_desc->vlan_macip_lens = cpu_to_le32(vlan_macip_lens);
2776 context_desc->seqnum_seed = 0;
2777
2778 /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
2779 type_tucmd_mlhl = (IXGBE_TXD_CMD_DEXT |
2780 IXGBE_ADVTXD_DTYP_CTXT);
2781
2782 if (skb->protocol == htons(ETH_P_IP))
2783 type_tucmd_mlhl |= IXGBE_ADVTXD_TUCMD_IPV4;
2784 type_tucmd_mlhl |= IXGBE_ADVTXD_TUCMD_L4T_TCP;
2785 context_desc->type_tucmd_mlhl = cpu_to_le32(type_tucmd_mlhl);
2786
2787 /* MSS L4LEN IDX */
2788 mss_l4len_idx =
2789 (skb_shinfo(skb)->gso_size << IXGBE_ADVTXD_MSS_SHIFT);
2790 mss_l4len_idx |= (l4len << IXGBE_ADVTXD_L4LEN_SHIFT);
2791 /* use index 1 for TSO */
2792 mss_l4len_idx |= (1 << IXGBE_ADVTXD_IDX_SHIFT);
2793 context_desc->mss_l4len_idx = cpu_to_le32(mss_l4len_idx);
2794
2795 tx_buffer_info->time_stamp = jiffies;
2796 tx_buffer_info->next_to_watch = i;
2797
2798 i++;
2799 if (i == tx_ring->count)
2800 i = 0;
2801 tx_ring->next_to_use = i;
2802
2803 return true;
2804 }
2805
2806 return false;
2807}
2808
2809static bool ixgbevf_tx_csum(struct ixgbevf_adapter *adapter,
2810 struct ixgbevf_ring *tx_ring,
2811 struct sk_buff *skb, u32 tx_flags)
2812{
2813 struct ixgbe_adv_tx_context_desc *context_desc;
2814 unsigned int i;
2815 struct ixgbevf_tx_buffer *tx_buffer_info;
2816 u32 vlan_macip_lens = 0, type_tucmd_mlhl = 0;
2817
2818 if (skb->ip_summed == CHECKSUM_PARTIAL ||
2819 (tx_flags & IXGBE_TX_FLAGS_VLAN)) {
2820 i = tx_ring->next_to_use;
2821 tx_buffer_info = &tx_ring->tx_buffer_info[i];
2822 context_desc = IXGBE_TX_CTXTDESC_ADV(*tx_ring, i);
2823
2824 if (tx_flags & IXGBE_TX_FLAGS_VLAN)
2825 vlan_macip_lens |= (tx_flags &
2826 IXGBE_TX_FLAGS_VLAN_MASK);
2827 vlan_macip_lens |= (skb_network_offset(skb) <<
2828 IXGBE_ADVTXD_MACLEN_SHIFT);
2829 if (skb->ip_summed == CHECKSUM_PARTIAL)
2830 vlan_macip_lens |= (skb_transport_header(skb) -
2831 skb_network_header(skb));
2832
2833 context_desc->vlan_macip_lens = cpu_to_le32(vlan_macip_lens);
2834 context_desc->seqnum_seed = 0;
2835
2836 type_tucmd_mlhl |= (IXGBE_TXD_CMD_DEXT |
2837 IXGBE_ADVTXD_DTYP_CTXT);
2838
2839 if (skb->ip_summed == CHECKSUM_PARTIAL) {
2840 switch (skb->protocol) {
2841 case __constant_htons(ETH_P_IP):
2842 type_tucmd_mlhl |= IXGBE_ADVTXD_TUCMD_IPV4;
2843 if (ip_hdr(skb)->protocol == IPPROTO_TCP)
2844 type_tucmd_mlhl |=
2845 IXGBE_ADVTXD_TUCMD_L4T_TCP;
2846 break;
2847 case __constant_htons(ETH_P_IPV6):
2848 /* XXX what about other V6 headers?? */
2849 if (ipv6_hdr(skb)->nexthdr == IPPROTO_TCP)
2850 type_tucmd_mlhl |=
2851 IXGBE_ADVTXD_TUCMD_L4T_TCP;
2852 break;
2853 default:
2854 if (unlikely(net_ratelimit())) {
dbd9636e
JK		 2855 pr_warn("partial checksum but "
2856 "proto=%x!\n", skb->protocol);
92915f71
GR		 2857 }
2858 break;
2859 }
2860 }
2861
2862 context_desc->type_tucmd_mlhl = cpu_to_le32(type_tucmd_mlhl);
2863 /* use index zero for tx checksum offload */
2864 context_desc->mss_l4len_idx = 0;
2865
2866 tx_buffer_info->time_stamp = jiffies;
2867 tx_buffer_info->next_to_watch = i;
2868
2869 adapter->hw_csum_tx_good++;
2870 i++;
2871 if (i == tx_ring->count)
2872 i = 0;
2873 tx_ring->next_to_use = i;
2874
2875 return true;
2876 }
2877
2878 return false;
2879}
2880
2881static int ixgbevf_tx_map(struct ixgbevf_adapter *adapter,
2882 struct ixgbevf_ring *tx_ring,
2883 struct sk_buff *skb, u32 tx_flags,
2884 unsigned int first)
2885{
2886 struct pci_dev *pdev = adapter->pdev;
2887 struct ixgbevf_tx_buffer *tx_buffer_info;
2888 unsigned int len;
2889 unsigned int total = skb->len;
2540ddb5
KV		 2890 unsigned int offset = 0, size;
2891 int count = 0;
92915f71
GR		 2892 unsigned int nr_frags = skb_shinfo(skb)->nr_frags;
2893 unsigned int f;
65deeed7 2894 int i;
92915f71
GR		 2895
2896 i = tx_ring->next_to_use;
2897
2898 len = min(skb_headlen(skb), total);
2899 while (len) {
2900 tx_buffer_info = &tx_ring->tx_buffer_info[i];
2901 size = min(len, (unsigned int)IXGBE_MAX_DATA_PER_TXD);
2902
2903 tx_buffer_info->length = size;
2904 tx_buffer_info->mapped_as_page = false;
2a1f8794 2905 tx_buffer_info->dma = dma_map_single(&adapter->pdev->dev,
92915f71 2906 skb->data + offset,
2a1f8794
NN		 2907 size, DMA_TO_DEVICE);
2908 if (dma_mapping_error(&pdev->dev, tx_buffer_info->dma))
92915f71
GR		 2909 goto dma_error;
2910 tx_buffer_info->time_stamp = jiffies;
2911 tx_buffer_info->next_to_watch = i;
2912
2913 len -= size;
2914 total -= size;
2915 offset += size;
2916 count++;
2917 i++;
2918 if (i == tx_ring->count)
2919 i = 0;
2920 }
2921
2922 for (f = 0; f < nr_frags; f++) {
9e903e08 2923 const struct skb_frag_struct *frag;
92915f71
GR		 2924
2925 frag = &skb_shinfo(skb)->frags[f];
9e903e08 2926 len = min((unsigned int)skb_frag_size(frag), total);
877749bf 2927 offset = 0;
92915f71
GR		 2928
2929 while (len) {
2930 tx_buffer_info = &tx_ring->tx_buffer_info[i];
2931 size = min(len, (unsigned int)IXGBE_MAX_DATA_PER_TXD);
2932
2933 tx_buffer_info->length = size;
877749bf
IC		 2934 tx_buffer_info->dma =
2935 skb_frag_dma_map(&adapter->pdev->dev, frag,
2936 offset, size, DMA_TO_DEVICE);
92915f71 2937 tx_buffer_info->mapped_as_page = true;
2a1f8794 2938 if (dma_mapping_error(&pdev->dev, tx_buffer_info->dma))
92915f71
GR		 2939 goto dma_error;
2940 tx_buffer_info->time_stamp = jiffies;
2941 tx_buffer_info->next_to_watch = i;
2942
2943 len -= size;
2944 total -= size;
2945 offset += size;
2946 count++;
2947 i++;
2948 if (i == tx_ring->count)
2949 i = 0;
2950 }
2951 if (total == 0)
2952 break;
2953 }
2954
2955 if (i == 0)
2956 i = tx_ring->count - 1;
2957 else
2958 i = i - 1;
2959 tx_ring->tx_buffer_info[i].skb = skb;
2960 tx_ring->tx_buffer_info[first].next_to_watch = i;
2961
2962 return count;
2963
2964dma_error:
2965 dev_err(&pdev->dev, "TX DMA map failed\n");
2966
2967 /* clear timestamp and dma mappings for failed tx_buffer_info map */
2968 tx_buffer_info->dma = 0;
2969 tx_buffer_info->time_stamp = 0;
2970 tx_buffer_info->next_to_watch = 0;
2971 count--;
2972
2973 /* clear timestamp and dma mappings for remaining portion of packet */
2974 while (count >= 0) {
2975 count--;
2976 i--;
2977 if (i < 0)
2978 i += tx_ring->count;
2979 tx_buffer_info = &tx_ring->tx_buffer_info[i];
2980 ixgbevf_unmap_and_free_tx_resource(adapter, tx_buffer_info);
2981 }
2982
2983 return count;
2984}
2985
2986static void ixgbevf_tx_queue(struct ixgbevf_adapter *adapter,
2987 struct ixgbevf_ring *tx_ring, int tx_flags,
2988 int count, u32 paylen, u8 hdr_len)
2989{
2990 union ixgbe_adv_tx_desc *tx_desc = NULL;
2991 struct ixgbevf_tx_buffer *tx_buffer_info;
2992 u32 olinfo_status = 0, cmd_type_len = 0;
2993 unsigned int i;
2994
2995 u32 txd_cmd = IXGBE_TXD_CMD_EOP | IXGBE_TXD_CMD_RS | IXGBE_TXD_CMD_IFCS;
2996
2997 cmd_type_len |= IXGBE_ADVTXD_DTYP_DATA;
2998
2999 cmd_type_len |= IXGBE_ADVTXD_DCMD_IFCS | IXGBE_ADVTXD_DCMD_DEXT;
3000
3001 if (tx_flags & IXGBE_TX_FLAGS_VLAN)
3002 cmd_type_len |= IXGBE_ADVTXD_DCMD_VLE;
3003
3004 if (tx_flags & IXGBE_TX_FLAGS_TSO) {
3005 cmd_type_len |= IXGBE_ADVTXD_DCMD_TSE;
3006
3007 olinfo_status |= IXGBE_TXD_POPTS_TXSM <<
3008 IXGBE_ADVTXD_POPTS_SHIFT;
3009
3010 /* use index 1 context for tso */
3011 olinfo_status |= (1 << IXGBE_ADVTXD_IDX_SHIFT);
3012 if (tx_flags & IXGBE_TX_FLAGS_IPV4)
3013 olinfo_status |= IXGBE_TXD_POPTS_IXSM <<
3014 IXGBE_ADVTXD_POPTS_SHIFT;
3015
3016 } else if (tx_flags & IXGBE_TX_FLAGS_CSUM)
3017 olinfo_status |= IXGBE_TXD_POPTS_TXSM <<
3018 IXGBE_ADVTXD_POPTS_SHIFT;
3019
3020 olinfo_status |= ((paylen - hdr_len) << IXGBE_ADVTXD_PAYLEN_SHIFT);
3021
3022 i = tx_ring->next_to_use;
3023 while (count--) {
3024 tx_buffer_info = &tx_ring->tx_buffer_info[i];
3025 tx_desc = IXGBE_TX_DESC_ADV(*tx_ring, i);
3026 tx_desc->read.buffer_addr = cpu_to_le64(tx_buffer_info->dma);
3027 tx_desc->read.cmd_type_len =
3028 cpu_to_le32(cmd_type_len | tx_buffer_info->length);
3029 tx_desc->read.olinfo_status = cpu_to_le32(olinfo_status);
3030 i++;
3031 if (i == tx_ring->count)
3032 i = 0;
3033 }
3034
3035 tx_desc->read.cmd_type_len |= cpu_to_le32(txd_cmd);
3036
3037 /*
3038 * Force memory writes to complete before letting h/w
3039 * know there are new descriptors to fetch. (Only
3040 * applicable for weak-ordered memory model archs,
3041 * such as IA-64).
3042 */
3043 wmb();
3044
3045 tx_ring->next_to_use = i;
3046 writel(i, adapter->hw.hw_addr + tx_ring->tail);
3047}
3048
3049static int __ixgbevf_maybe_stop_tx(struct net_device *netdev,
3050 struct ixgbevf_ring *tx_ring, int size)
3051{
3052 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
3053
3054 netif_stop_subqueue(netdev, tx_ring->queue_index);
3055 /* Herbert's original patch had:
3056 * smp_mb__after_netif_stop_queue();
3057 * but since that doesn't exist yet, just open code it. */
3058 smp_mb();
3059
3060 /* We need to check again in a case another CPU has just
3061 * made room available. */
3062 if (likely(IXGBE_DESC_UNUSED(tx_ring) < size))
3063 return -EBUSY;
3064
3065 /* A reprieve! - use start_queue because it doesn't call schedule */
3066 netif_start_subqueue(netdev, tx_ring->queue_index);
3067 ++adapter->restart_queue;
3068 return 0;
3069}
3070
3071static int ixgbevf_maybe_stop_tx(struct net_device *netdev,
3072 struct ixgbevf_ring *tx_ring, int size)
3073{
3074 if (likely(IXGBE_DESC_UNUSED(tx_ring) >= size))
3075 return 0;
3076 return __ixgbevf_maybe_stop_tx(netdev, tx_ring, size);
3077}
3078
3079static int ixgbevf_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
3080{
3081 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
3082 struct ixgbevf_ring *tx_ring;
3083 unsigned int first;
3084 unsigned int tx_flags = 0;
3085 u8 hdr_len = 0;
3086 int r_idx = 0, tso;
3087 int count = 0;
3088
3089 unsigned int f;
3090
3091 tx_ring = &adapter->tx_ring[r_idx];
3092
eab6d18d 3093 if (vlan_tx_tag_present(skb)) {
92915f71
GR		 3094 tx_flags |= vlan_tx_tag_get(skb);
3095 tx_flags <<= IXGBE_TX_FLAGS_VLAN_SHIFT;
3096 tx_flags |= IXGBE_TX_FLAGS_VLAN;
3097 }
3098
3099 /* four things can cause us to need a context descriptor */
3100 if (skb_is_gso(skb) ||
3101 (skb->ip_summed == CHECKSUM_PARTIAL) ||
3102 (tx_flags & IXGBE_TX_FLAGS_VLAN))
3103 count++;
3104
3105 count += TXD_USE_COUNT(skb_headlen(skb));
3106 for (f = 0; f < skb_shinfo(skb)->nr_frags; f++)
9e903e08 3107 count += TXD_USE_COUNT(skb_frag_size(&skb_shinfo(skb)->frags[f]));
92915f71
GR		 3108
3109 if (ixgbevf_maybe_stop_tx(netdev, tx_ring, count)) {
3110 adapter->tx_busy++;
3111 return NETDEV_TX_BUSY;
3112 }
3113
3114 first = tx_ring->next_to_use;
3115
3116 if (skb->protocol == htons(ETH_P_IP))
3117 tx_flags |= IXGBE_TX_FLAGS_IPV4;
3118 tso = ixgbevf_tso(adapter, tx_ring, skb, tx_flags, &hdr_len);
3119 if (tso < 0) {
3120 dev_kfree_skb_any(skb);
3121 return NETDEV_TX_OK;
3122 }
3123
3124 if (tso)
3125 tx_flags |= IXGBE_TX_FLAGS_TSO;
3126 else if (ixgbevf_tx_csum(adapter, tx_ring, skb, tx_flags) &&
3127 (skb->ip_summed == CHECKSUM_PARTIAL))
3128 tx_flags |= IXGBE_TX_FLAGS_CSUM;
3129
3130 ixgbevf_tx_queue(adapter, tx_ring, tx_flags,
3131 ixgbevf_tx_map(adapter, tx_ring, skb, tx_flags, first),
3132 skb->len, hdr_len);
3133
92915f71
GR		 3134 ixgbevf_maybe_stop_tx(netdev, tx_ring, DESC_NEEDED);
3135
3136 return NETDEV_TX_OK;
3137}
3138
92915f71
GR		 3139/**
3140 * ixgbevf_set_mac - Change the Ethernet Address of the NIC
3141 * @netdev: network interface device structure
3142 * @p: pointer to an address structure
3143 *
3144 * Returns 0 on success, negative on failure
3145 **/
3146static int ixgbevf_set_mac(struct net_device *netdev, void *p)
3147{
3148 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
3149 struct ixgbe_hw *hw = &adapter->hw;
3150 struct sockaddr *addr = p;
3151
3152 if (!is_valid_ether_addr(addr->sa_data))
3153 return -EADDRNOTAVAIL;
3154
3155 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
3156 memcpy(hw->mac.addr, addr->sa_data, netdev->addr_len);
3157
3158 if (hw->mac.ops.set_rar)
3159 hw->mac.ops.set_rar(hw, 0, hw->mac.addr, 0);
3160
3161 return 0;
3162}
3163
3164/**
3165 * ixgbevf_change_mtu - Change the Maximum Transfer Unit
3166 * @netdev: network interface device structure
3167 * @new_mtu: new value for maximum frame size
3168 *
3169 * Returns 0 on success, negative on failure
3170 **/
3171static int ixgbevf_change_mtu(struct net_device *netdev, int new_mtu)
3172{
3173 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
69bfbec4 3174 struct ixgbe_hw *hw = &adapter->hw;
92915f71 3175 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN;
69bfbec4
GR		 3176 int max_possible_frame = MAXIMUM_ETHERNET_VLAN_SIZE;
3177 u32 msg[2];
3178
3179 if (adapter->hw.mac.type == ixgbe_mac_X540_vf)
3180 max_possible_frame = IXGBE_MAX_JUMBO_FRAME_SIZE;
92915f71
GR		 3181
3182 /* MTU < 68 is an error and causes problems on some kernels */
69bfbec4 3183 if ((new_mtu < 68) || (max_frame > max_possible_frame))
92915f71
GR		 3184 return -EINVAL;
3185
3186 hw_dbg(&adapter->hw, "changing MTU from %d to %d\n",
3187 netdev->mtu, new_mtu);
3188 /* must set new MTU before calling down or up */
3189 netdev->mtu = new_mtu;
3190
69bfbec4
GR		 3191 msg[0] = IXGBE_VF_SET_LPE;
3192 msg[1] = max_frame;
3193 hw->mbx.ops.write_posted(hw, msg, 2);
3194
92915f71
GR		 3195 if (netif_running(netdev))
3196 ixgbevf_reinit_locked(adapter);
3197
3198 return 0;
3199}
3200
3201static void ixgbevf_shutdown(struct pci_dev *pdev)
3202{
3203 struct net_device *netdev = pci_get_drvdata(pdev);
3204 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
3205
3206 netif_device_detach(netdev);
3207
3208 if (netif_running(netdev)) {
3209 ixgbevf_down(adapter);
3210 ixgbevf_free_irq(adapter);
3211 ixgbevf_free_all_tx_resources(adapter);
3212 ixgbevf_free_all_rx_resources(adapter);
3213 }
3214
3215#ifdef CONFIG_PM
3216 pci_save_state(pdev);
3217#endif
3218
3219 pci_disable_device(pdev);
3220}
3221
4197aa7b
ED		 3222static struct rtnl_link_stats64 *ixgbevf_get_stats(struct net_device *netdev,
3223 struct rtnl_link_stats64 *stats)
3224{
3225 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
3226 unsigned int start;
3227 u64 bytes, packets;
3228 const struct ixgbevf_ring *ring;
3229 int i;
3230
3231 ixgbevf_update_stats(adapter);
3232
3233 stats->multicast = adapter->stats.vfmprc - adapter->stats.base_vfmprc;
3234
3235 for (i = 0; i < adapter->num_rx_queues; i++) {
3236 ring = &adapter->rx_ring[i];
3237 do {
3238 start = u64_stats_fetch_begin_bh(&ring->syncp);
3239 bytes = ring->total_bytes;
3240 packets = ring->total_packets;
3241 } while (u64_stats_fetch_retry_bh(&ring->syncp, start));
3242 stats->rx_bytes += bytes;
3243 stats->rx_packets += packets;
3244 }
3245
3246 for (i = 0; i < adapter->num_tx_queues; i++) {
3247 ring = &adapter->tx_ring[i];
3248 do {
3249 start = u64_stats_fetch_begin_bh(&ring->syncp);
3250 bytes = ring->total_bytes;
3251 packets = ring->total_packets;
3252 } while (u64_stats_fetch_retry_bh(&ring->syncp, start));
3253 stats->tx_bytes += bytes;
3254 stats->tx_packets += packets;
3255 }
3256
3257 return stats;
3258}
3259
c8f44aff
MM		 3260static int ixgbevf_set_features(struct net_device *netdev,
3261 netdev_features_t features)
471a76de
MM		 3262{
3263 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
3264
3265 if (features & NETIF_F_RXCSUM)
3266 adapter->flags |= IXGBE_FLAG_RX_CSUM_ENABLED;
3267 else
3268 adapter->flags &= ~IXGBE_FLAG_RX_CSUM_ENABLED;
3269
3270 return 0;
3271}
3272
92915f71 3273static const struct net_device_ops ixgbe_netdev_ops = {
c12db769
SH		 3274 .ndo_open = ixgbevf_open,
3275 .ndo_stop = ixgbevf_close,
3276 .ndo_start_xmit = ixgbevf_xmit_frame,
3277 .ndo_set_rx_mode = ixgbevf_set_rx_mode,
4197aa7b 3278 .ndo_get_stats64 = ixgbevf_get_stats,
92915f71 3279 .ndo_validate_addr = eth_validate_addr,
c12db769
SH		 3280 .ndo_set_mac_address = ixgbevf_set_mac,
3281 .ndo_change_mtu = ixgbevf_change_mtu,
3282 .ndo_tx_timeout = ixgbevf_tx_timeout,
c12db769
SH		 3283 .ndo_vlan_rx_add_vid = ixgbevf_vlan_rx_add_vid,
3284 .ndo_vlan_rx_kill_vid = ixgbevf_vlan_rx_kill_vid,
471a76de 3285 .ndo_set_features = ixgbevf_set_features,
92915f71 3286};
92915f71
GR		 3287
3288static void ixgbevf_assign_netdev_ops(struct net_device *dev)
3289{
92915f71 3290 dev->netdev_ops = &ixgbe_netdev_ops;
92915f71
GR		 3291 ixgbevf_set_ethtool_ops(dev);
3292 dev->watchdog_timeo = 5 * HZ;
3293}
3294
3295/**
3296 * ixgbevf_probe - Device Initialization Routine
3297 * @pdev: PCI device information struct
3298 * @ent: entry in ixgbevf_pci_tbl
3299 *
3300 * Returns 0 on success, negative on failure
3301 *
3302 * ixgbevf_probe initializes an adapter identified by a pci_dev structure.
3303 * The OS initialization, configuring of the adapter private structure,
3304 * and a hardware reset occur.
3305 **/
3306static int __devinit ixgbevf_probe(struct pci_dev *pdev,
3307 const struct pci_device_id *ent)
3308{
3309 struct net_device *netdev;
3310 struct ixgbevf_adapter *adapter = NULL;
3311 struct ixgbe_hw *hw = NULL;
3312 const struct ixgbevf_info *ii = ixgbevf_info_tbl[ent->driver_data];
3313 static int cards_found;
3314 int err, pci_using_dac;
3315
3316 err = pci_enable_device(pdev);
3317 if (err)
3318 return err;
3319
2a1f8794
NN		 3320 if (!dma_set_mask(&pdev->dev, DMA_BIT_MASK(64)) &&
3321 !dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(64))) {
92915f71
GR		 3322 pci_using_dac = 1;
3323 } else {
2a1f8794 3324 err = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32));
92915f71 3325 if (err) {
2a1f8794
NN		 3326 err = dma_set_coherent_mask(&pdev->dev,
3327 DMA_BIT_MASK(32));
92915f71
GR		 3328 if (err) {
3329 dev_err(&pdev->dev, "No usable DMA "
3330 "configuration, aborting\n");
3331 goto err_dma;
3332 }
3333 }
3334 pci_using_dac = 0;
3335 }
3336
3337 err = pci_request_regions(pdev, ixgbevf_driver_name);
3338 if (err) {
3339 dev_err(&pdev->dev, "pci_request_regions failed 0x%x\n", err);
3340 goto err_pci_reg;
3341 }
3342
3343 pci_set_master(pdev);
3344
3345#ifdef HAVE_TX_MQ
3346 netdev = alloc_etherdev_mq(sizeof(struct ixgbevf_adapter),
3347 MAX_TX_QUEUES);
3348#else
3349 netdev = alloc_etherdev(sizeof(struct ixgbevf_adapter));
3350#endif
3351 if (!netdev) {
3352 err = -ENOMEM;
3353 goto err_alloc_etherdev;
3354 }
3355
3356 SET_NETDEV_DEV(netdev, &pdev->dev);
3357
3358 pci_set_drvdata(pdev, netdev);
3359 adapter = netdev_priv(netdev);
3360
3361 adapter->netdev = netdev;
3362 adapter->pdev = pdev;
3363 hw = &adapter->hw;
3364 hw->back = adapter;
3365 adapter->msg_enable = (1 << DEFAULT_DEBUG_LEVEL_SHIFT) - 1;
3366
3367 /*
3368 * call save state here in standalone driver because it relies on
3369 * adapter struct to exist, and needs to call netdev_priv
3370 */
3371 pci_save_state(pdev);
3372
3373 hw->hw_addr = ioremap(pci_resource_start(pdev, 0),
3374 pci_resource_len(pdev, 0));
3375 if (!hw->hw_addr) {
3376 err = -EIO;
3377 goto err_ioremap;
3378 }
3379
3380 ixgbevf_assign_netdev_ops(netdev);
3381
3382 adapter->bd_number = cards_found;
3383
3384 /* Setup hw api */
3385 memcpy(&hw->mac.ops, ii->mac_ops, sizeof(hw->mac.ops));
3386 hw->mac.type = ii->mac;
3387
3388 memcpy(&hw->mbx.ops, &ixgbevf_mbx_ops,
f416dfc0 3389 sizeof(struct ixgbe_mbx_operations));
92915f71
GR		 3390
3391 adapter->flags &= ~IXGBE_FLAG_RX_PS_CAPABLE;
3392 adapter->flags &= ~IXGBE_FLAG_RX_PS_ENABLED;
3393 adapter->flags |= IXGBE_FLAG_RX_1BUF_CAPABLE;
3394
3395 /* setup the private structure */
3396 err = ixgbevf_sw_init(adapter);
3397
471a76de 3398 netdev->hw_features = NETIF_F_SG |
92915f71 3399 NETIF_F_IP_CSUM |
471a76de
MM		 3400 NETIF_F_IPV6_CSUM |
3401 NETIF_F_TSO |
3402 NETIF_F_TSO6 |
3403 NETIF_F_RXCSUM;
3404
3405 netdev->features = netdev->hw_features |
92915f71
GR		 3406 NETIF_F_HW_VLAN_TX |
3407 NETIF_F_HW_VLAN_RX |
3408 NETIF_F_HW_VLAN_FILTER;
3409
92915f71
GR		 3410 netdev->vlan_features |= NETIF_F_TSO;
3411 netdev->vlan_features |= NETIF_F_TSO6;
3412 netdev->vlan_features |= NETIF_F_IP_CSUM;
3bfacf96 3413 netdev->vlan_features |= NETIF_F_IPV6_CSUM;
92915f71
GR		 3414 netdev->vlan_features |= NETIF_F_SG;
3415
3416 if (pci_using_dac)
3417 netdev->features |= NETIF_F_HIGHDMA;
3418
01789349
JP		 3419 netdev->priv_flags |= IFF_UNICAST_FLT;
3420
92915f71
GR		 3421 /* The HW MAC address was set and/or determined in sw_init */
3422 memcpy(netdev->dev_addr, adapter->hw.mac.addr, netdev->addr_len);
3423 memcpy(netdev->perm_addr, adapter->hw.mac.addr, netdev->addr_len);
3424
3425 if (!is_valid_ether_addr(netdev->dev_addr)) {
dbd9636e 3426 pr_err("invalid MAC address\n");
92915f71
GR		 3427 err = -EIO;
3428 goto err_sw_init;
3429 }
3430
3431 init_timer(&adapter->watchdog_timer);
c061b18d 3432 adapter->watchdog_timer.function = ixgbevf_watchdog;
92915f71
GR		 3433 adapter->watchdog_timer.data = (unsigned long)adapter;
3434
3435 INIT_WORK(&adapter->reset_task, ixgbevf_reset_task);
3436 INIT_WORK(&adapter->watchdog_task, ixgbevf_watchdog_task);
3437
3438 err = ixgbevf_init_interrupt_scheme(adapter);
3439 if (err)
3440 goto err_sw_init;
3441
3442 /* pick up the PCI bus settings for reporting later */
3443 if (hw->mac.ops.get_bus_info)
3444 hw->mac.ops.get_bus_info(hw);
3445
92915f71
GR		 3446 strcpy(netdev->name, "eth%d");
3447
3448 err = register_netdev(netdev);
3449 if (err)
3450 goto err_register;
3451
3452 adapter->netdev_registered = true;
3453
5d426ad1
GR		 3454 netif_carrier_off(netdev);
3455
33bd9f60
GR		 3456 ixgbevf_init_last_counter_stats(adapter);
3457
92915f71
GR		 3458 /* print the MAC address */
3459 hw_dbg(hw, "%2.2x:%2.2x:%2.2x:%2.2x:%2.2x:%2.2x\n",
3460 netdev->dev_addr[0],
3461 netdev->dev_addr[1],
3462 netdev->dev_addr[2],
3463 netdev->dev_addr[3],
3464 netdev->dev_addr[4],
3465 netdev->dev_addr[5]);
3466
3467 hw_dbg(hw, "MAC: %d\n", hw->mac.type);
3468
d6dbee86 3469 hw_dbg(hw, "LRO is disabled\n");
92915f71
GR		 3470
3471 hw_dbg(hw, "Intel(R) 82599 Virtual Function\n");
3472 cards_found++;
3473 return 0;
3474
3475err_register:
3476err_sw_init:
3477 ixgbevf_reset_interrupt_capability(adapter);
3478 iounmap(hw->hw_addr);
3479err_ioremap:
3480 free_netdev(netdev);
3481err_alloc_etherdev:
3482 pci_release_regions(pdev);
3483err_pci_reg:
3484err_dma:
3485 pci_disable_device(pdev);
3486 return err;
3487}
3488
3489/**
3490 * ixgbevf_remove - Device Removal Routine
3491 * @pdev: PCI device information struct
3492 *
3493 * ixgbevf_remove is called by the PCI subsystem to alert the driver
3494 * that it should release a PCI device. The could be caused by a
3495 * Hot-Plug event, or because the driver is going to be removed from
3496 * memory.
3497 **/
3498static void __devexit ixgbevf_remove(struct pci_dev *pdev)
3499{
3500 struct net_device *netdev = pci_get_drvdata(pdev);
3501 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
3502
3503 set_bit(__IXGBEVF_DOWN, &adapter->state);
3504
3505 del_timer_sync(&adapter->watchdog_timer);
3506
23f333a2 3507 cancel_work_sync(&adapter->reset_task);
92915f71
GR		 3508 cancel_work_sync(&adapter->watchdog_task);
3509
92915f71
GR		 3510 if (adapter->netdev_registered) {
3511 unregister_netdev(netdev);
3512 adapter->netdev_registered = false;
3513 }
3514
3515 ixgbevf_reset_interrupt_capability(adapter);
3516
3517 iounmap(adapter->hw.hw_addr);
3518 pci_release_regions(pdev);
3519
3520 hw_dbg(&adapter->hw, "Remove complete\n");
3521
3522 kfree(adapter->tx_ring);
3523 kfree(adapter->rx_ring);
3524
3525 free_netdev(netdev);
3526
3527 pci_disable_device(pdev);
3528}
3529
3530static struct pci_driver ixgbevf_driver = {
3531 .name = ixgbevf_driver_name,
3532 .id_table = ixgbevf_pci_tbl,
3533 .probe = ixgbevf_probe,
3534 .remove = __devexit_p(ixgbevf_remove),
3535 .shutdown = ixgbevf_shutdown,
3536};
3537
3538/**
65d676c8 3539 * ixgbevf_init_module - Driver Registration Routine
92915f71 3540 *
65d676c8 3541 * ixgbevf_init_module is the first routine called when the driver is
92915f71
GR		 3542 * loaded. All it does is register with the PCI subsystem.
3543 **/
3544static int __init ixgbevf_init_module(void)
3545{
3546 int ret;
dbd9636e
JK		 3547 pr_info("%s - version %s\n", ixgbevf_driver_string,
3548 ixgbevf_driver_version);
92915f71 3549
dbd9636e 3550 pr_info("%s\n", ixgbevf_copyright);
92915f71
GR		 3551
3552 ret = pci_register_driver(&ixgbevf_driver);
3553 return ret;
3554}
3555
3556module_init(ixgbevf_init_module);
3557
3558/**
65d676c8 3559 * ixgbevf_exit_module - Driver Exit Cleanup Routine
92915f71 3560 *
65d676c8 3561 * ixgbevf_exit_module is called just before the driver is removed
92915f71
GR		 3562 * from memory.
3563 **/
3564static void __exit ixgbevf_exit_module(void)
3565{
3566 pci_unregister_driver(&ixgbevf_driver);
3567}
3568
3569#ifdef DEBUG
3570/**
65d676c8 3571 * ixgbevf_get_hw_dev_name - return device name string
92915f71
GR		 3572 * used by hardware layer to print debugging information
3573 **/
3574char *ixgbevf_get_hw_dev_name(struct ixgbe_hw *hw)
3575{
3576 struct ixgbevf_adapter *adapter = hw->back;
3577 return adapter->netdev->name;
3578}
3579
3580#endif
3581module_exit(ixgbevf_exit_module);
3582
3583/* ixgbevf_main.c */
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