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ixgbevf: rewrite watchdog task to function similar to igbvf
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1/*******************************************************************************
2
3 Intel 82599 Virtual Function driver
2e7cfbdd 4 Copyright(c) 1999 - 2014 Intel Corporation.
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5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
9
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 more details.
14
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
21
22 Contact Information:
23 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
24 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
25
26*******************************************************************************/
27
28
29/******************************************************************************
30 Copyright (c)2006 - 2007 Myricom, Inc. for some LRO specific code
31******************************************************************************/
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32
33#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
34
92915f71 35#include <linux/types.h>
dadcd65f 36#include <linux/bitops.h>
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37#include <linux/module.h>
38#include <linux/pci.h>
39#include <linux/netdevice.h>
40#include <linux/vmalloc.h>
41#include <linux/string.h>
42#include <linux/in.h>
43#include <linux/ip.h>
44#include <linux/tcp.h>
70a10e25 45#include <linux/sctp.h>
92915f71 46#include <linux/ipv6.h>
5a0e3ad6 47#include <linux/slab.h>
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48#include <net/checksum.h>
49#include <net/ip6_checksum.h>
50#include <linux/ethtool.h>
01789349 51#include <linux/if.h>
92915f71 52#include <linux/if_vlan.h>
70c71606 53#include <linux/prefetch.h>
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54
55#include "ixgbevf.h"
56
3d8fe98f 57const char ixgbevf_driver_name[] = "ixgbevf";
92915f71 58static const char ixgbevf_driver_string[] =
422e05d1 59 "Intel(R) 10 Gigabit PCI Express Virtual Function Network Driver";
92915f71 60
86f359f6 61#define DRV_VERSION "2.12.1-k"
92915f71 62const char ixgbevf_driver_version[] = DRV_VERSION;
66c87bd5 63static char ixgbevf_copyright[] =
5c47a2b6 64 "Copyright (c) 2009 - 2012 Intel Corporation.";
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65
66static const struct ixgbevf_info *ixgbevf_info_tbl[] = {
2316aa2a
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67 [board_82599_vf] = &ixgbevf_82599_vf_info,
68 [board_X540_vf] = &ixgbevf_X540_vf_info,
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69 [board_X550_vf] = &ixgbevf_X550_vf_info,
70 [board_X550EM_x_vf] = &ixgbevf_X550EM_x_vf_info,
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71};
72
73/* ixgbevf_pci_tbl - PCI Device ID Table
74 *
75 * Wildcard entries (PCI_ANY_ID) should come last
76 * Last entry must be all 0s
77 *
78 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
79 * Class, Class Mask, private data (not used) }
80 */
9baa3c34 81static const struct pci_device_id ixgbevf_pci_tbl[] = {
39ba22b4
SH
82 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_VF), board_82599_vf },
83 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X540_VF), board_X540_vf },
47068b0d
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84 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550_VF), board_X550_vf },
85 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_VF), board_X550EM_x_vf },
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86 /* required last entry */
87 {0, }
88};
89MODULE_DEVICE_TABLE(pci, ixgbevf_pci_tbl);
90
91MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
b8ce18cd 92MODULE_DESCRIPTION("Intel(R) 10 Gigabit Virtual Function Network Driver");
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93MODULE_LICENSE("GPL");
94MODULE_VERSION(DRV_VERSION);
95
b3f4d599 96#define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK)
97static int debug = -1;
98module_param(debug, int, 0);
99MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
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100
101/* forward decls */
220fe050 102static void ixgbevf_queue_reset_subtask(struct ixgbevf_adapter *adapter);
fa71ae27 103static void ixgbevf_set_itr(struct ixgbevf_q_vector *q_vector);
56e94095 104static void ixgbevf_free_all_rx_resources(struct ixgbevf_adapter *adapter);
92915f71 105
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106static void ixgbevf_remove_adapter(struct ixgbe_hw *hw)
107{
108 struct ixgbevf_adapter *adapter = hw->back;
109
110 if (!hw->hw_addr)
111 return;
112 hw->hw_addr = NULL;
113 dev_err(&adapter->pdev->dev, "Adapter removed\n");
ea699569
MR
114 if (test_bit(__IXGBEVF_WORK_INIT, &adapter->state))
115 schedule_work(&adapter->watchdog_task);
dbf8b0d8
MR
116}
117
118static void ixgbevf_check_remove(struct ixgbe_hw *hw, u32 reg)
119{
120 u32 value;
121
122 /* The following check not only optimizes a bit by not
123 * performing a read on the status register when the
124 * register just read was a status register read that
125 * returned IXGBE_FAILED_READ_REG. It also blocks any
126 * potential recursion.
127 */
128 if (reg == IXGBE_VFSTATUS) {
129 ixgbevf_remove_adapter(hw);
130 return;
131 }
32c74949 132 value = ixgbevf_read_reg(hw, IXGBE_VFSTATUS);
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133 if (value == IXGBE_FAILED_READ_REG)
134 ixgbevf_remove_adapter(hw);
135}
136
32c74949 137u32 ixgbevf_read_reg(struct ixgbe_hw *hw, u32 reg)
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MR
138{
139 u8 __iomem *reg_addr = ACCESS_ONCE(hw->hw_addr);
140 u32 value;
141
142 if (IXGBE_REMOVED(reg_addr))
143 return IXGBE_FAILED_READ_REG;
144 value = readl(reg_addr + reg);
145 if (unlikely(value == IXGBE_FAILED_READ_REG))
146 ixgbevf_check_remove(hw, reg);
147 return value;
148}
149
49ce9c2c 150/**
65d676c8 151 * ixgbevf_set_ivar - set IVAR registers - maps interrupt causes to vectors
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152 * @adapter: pointer to adapter struct
153 * @direction: 0 for Rx, 1 for Tx, -1 for other causes
154 * @queue: queue to map the corresponding interrupt to
155 * @msix_vector: the vector to map to the corresponding queue
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156 */
157static void ixgbevf_set_ivar(struct ixgbevf_adapter *adapter, s8 direction,
158 u8 queue, u8 msix_vector)
159{
160 u32 ivar, index;
161 struct ixgbe_hw *hw = &adapter->hw;
162 if (direction == -1) {
163 /* other causes */
164 msix_vector |= IXGBE_IVAR_ALLOC_VAL;
165 ivar = IXGBE_READ_REG(hw, IXGBE_VTIVAR_MISC);
166 ivar &= ~0xFF;
167 ivar |= msix_vector;
168 IXGBE_WRITE_REG(hw, IXGBE_VTIVAR_MISC, ivar);
169 } else {
170 /* tx or rx causes */
171 msix_vector |= IXGBE_IVAR_ALLOC_VAL;
172 index = ((16 * (queue & 1)) + (8 * direction));
173 ivar = IXGBE_READ_REG(hw, IXGBE_VTIVAR(queue >> 1));
174 ivar &= ~(0xFF << index);
175 ivar |= (msix_vector << index);
176 IXGBE_WRITE_REG(hw, IXGBE_VTIVAR(queue >> 1), ivar);
177 }
178}
179
70a10e25 180static void ixgbevf_unmap_and_free_tx_resource(struct ixgbevf_ring *tx_ring,
9bdfefd2
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181 struct ixgbevf_tx_buffer *tx_buffer)
182{
183 if (tx_buffer->skb) {
184 dev_kfree_skb_any(tx_buffer->skb);
185 if (dma_unmap_len(tx_buffer, len))
70a10e25 186 dma_unmap_single(tx_ring->dev,
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187 dma_unmap_addr(tx_buffer, dma),
188 dma_unmap_len(tx_buffer, len),
2a1f8794 189 DMA_TO_DEVICE);
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190 } else if (dma_unmap_len(tx_buffer, len)) {
191 dma_unmap_page(tx_ring->dev,
192 dma_unmap_addr(tx_buffer, dma),
193 dma_unmap_len(tx_buffer, len),
194 DMA_TO_DEVICE);
92915f71 195 }
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196 tx_buffer->next_to_watch = NULL;
197 tx_buffer->skb = NULL;
198 dma_unmap_len_set(tx_buffer, len, 0);
199 /* tx_buffer must be completely set up in the transmit path */
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200}
201
e08400b7
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202static u64 ixgbevf_get_tx_completed(struct ixgbevf_ring *ring)
203{
204 return ring->stats.packets;
205}
92915f71 206
e08400b7
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207static u32 ixgbevf_get_tx_pending(struct ixgbevf_ring *ring)
208{
209 struct ixgbevf_adapter *adapter = netdev_priv(ring->netdev);
210 struct ixgbe_hw *hw = &adapter->hw;
92915f71 211
e08400b7
ET
212 u32 head = IXGBE_READ_REG(hw, IXGBE_VFTDH(ring->reg_idx));
213 u32 tail = IXGBE_READ_REG(hw, IXGBE_VFTDT(ring->reg_idx));
214
215 if (head != tail)
216 return (head < tail) ?
217 tail - head : (tail + ring->count - head);
218
219 return 0;
220}
221
222static inline bool ixgbevf_check_tx_hang(struct ixgbevf_ring *tx_ring)
223{
224 u32 tx_done = ixgbevf_get_tx_completed(tx_ring);
225 u32 tx_done_old = tx_ring->tx_stats.tx_done_old;
226 u32 tx_pending = ixgbevf_get_tx_pending(tx_ring);
227
228 clear_check_for_tx_hang(tx_ring);
229
230 /* Check for a hung queue, but be thorough. This verifies
231 * that a transmit has been completed since the previous
232 * check AND there is at least one packet pending. The
233 * ARMED bit is set to indicate a potential hang.
234 */
235 if ((tx_done_old == tx_done) && tx_pending) {
236 /* make sure it is true for two checks in a row */
237 return test_and_set_bit(__IXGBEVF_HANG_CHECK_ARMED,
238 &tx_ring->state);
239 }
240 /* reset the countdown */
241 clear_bit(__IXGBEVF_HANG_CHECK_ARMED, &tx_ring->state);
242
243 /* update completed stats and continue */
244 tx_ring->tx_stats.tx_done_old = tx_done;
245
246 return false;
247}
248
249/**
250 * ixgbevf_tx_timeout - Respond to a Tx Hang
251 * @netdev: network interface device structure
252 **/
253static void ixgbevf_tx_timeout(struct net_device *netdev)
254{
255 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
256
257 /* Do the reset outside of interrupt context */
258 schedule_work(&adapter->reset_task);
259}
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260
261/**
262 * ixgbevf_clean_tx_irq - Reclaim resources after transmit completes
fa71ae27 263 * @q_vector: board private structure
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264 * @tx_ring: tx ring to clean
265 **/
fa71ae27 266static bool ixgbevf_clean_tx_irq(struct ixgbevf_q_vector *q_vector,
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267 struct ixgbevf_ring *tx_ring)
268{
fa71ae27 269 struct ixgbevf_adapter *adapter = q_vector->adapter;
7ad1a093
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270 struct ixgbevf_tx_buffer *tx_buffer;
271 union ixgbe_adv_tx_desc *tx_desc;
92915f71 272 unsigned int total_bytes = 0, total_packets = 0;
7ad1a093
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273 unsigned int budget = tx_ring->count / 2;
274 unsigned int i = tx_ring->next_to_clean;
92915f71 275
10cc1bdd
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276 if (test_bit(__IXGBEVF_DOWN, &adapter->state))
277 return true;
278
7ad1a093
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279 tx_buffer = &tx_ring->tx_buffer_info[i];
280 tx_desc = IXGBEVF_TX_DESC(tx_ring, i);
281 i -= tx_ring->count;
92915f71 282
e757e3e1 283 do {
7ad1a093 284 union ixgbe_adv_tx_desc *eop_desc = tx_buffer->next_to_watch;
e757e3e1
AD
285
286 /* if next_to_watch is not set then there is no work pending */
287 if (!eop_desc)
288 break;
289
290 /* prevent any other reads prior to eop_desc */
291 read_barrier_depends();
292
293 /* if DD is not set pending work has not been completed */
294 if (!(eop_desc->wb.status & cpu_to_le32(IXGBE_TXD_STAT_DD)))
295 break;
296
297 /* clear next_to_watch to prevent false hangs */
7ad1a093 298 tx_buffer->next_to_watch = NULL;
e757e3e1 299
7ad1a093
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300 /* update the statistics for this packet */
301 total_bytes += tx_buffer->bytecount;
302 total_packets += tx_buffer->gso_segs;
92915f71 303
9bdfefd2
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304 /* free the skb */
305 dev_kfree_skb_any(tx_buffer->skb);
306
307 /* unmap skb header data */
308 dma_unmap_single(tx_ring->dev,
309 dma_unmap_addr(tx_buffer, dma),
310 dma_unmap_len(tx_buffer, len),
311 DMA_TO_DEVICE);
312
7ad1a093 313 /* clear tx_buffer data */
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314 tx_buffer->skb = NULL;
315 dma_unmap_len_set(tx_buffer, len, 0);
92915f71 316
7ad1a093
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317 /* unmap remaining buffers */
318 while (tx_desc != eop_desc) {
7ad1a093
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319 tx_buffer++;
320 tx_desc++;
92915f71 321 i++;
7ad1a093
ET
322 if (unlikely(!i)) {
323 i -= tx_ring->count;
324 tx_buffer = tx_ring->tx_buffer_info;
325 tx_desc = IXGBEVF_TX_DESC(tx_ring, 0);
326 }
e757e3e1 327
9bdfefd2
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328 /* unmap any remaining paged data */
329 if (dma_unmap_len(tx_buffer, len)) {
330 dma_unmap_page(tx_ring->dev,
331 dma_unmap_addr(tx_buffer, dma),
332 dma_unmap_len(tx_buffer, len),
333 DMA_TO_DEVICE);
334 dma_unmap_len_set(tx_buffer, len, 0);
335 }
92915f71
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336 }
337
7ad1a093
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338 /* move us one more past the eop_desc for start of next pkt */
339 tx_buffer++;
340 tx_desc++;
341 i++;
342 if (unlikely(!i)) {
343 i -= tx_ring->count;
344 tx_buffer = tx_ring->tx_buffer_info;
345 tx_desc = IXGBEVF_TX_DESC(tx_ring, 0);
346 }
347
348 /* issue prefetch for next Tx descriptor */
349 prefetch(tx_desc);
350
351 /* update budget accounting */
352 budget--;
353 } while (likely(budget));
354
355 i += tx_ring->count;
92915f71 356 tx_ring->next_to_clean = i;
7ad1a093
ET
357 u64_stats_update_begin(&tx_ring->syncp);
358 tx_ring->stats.bytes += total_bytes;
359 tx_ring->stats.packets += total_packets;
360 u64_stats_update_end(&tx_ring->syncp);
361 q_vector->tx.total_bytes += total_bytes;
362 q_vector->tx.total_packets += total_packets;
92915f71 363
e08400b7
ET
364 if (check_for_tx_hang(tx_ring) && ixgbevf_check_tx_hang(tx_ring)) {
365 struct ixgbe_hw *hw = &adapter->hw;
366 union ixgbe_adv_tx_desc *eop_desc;
367
368 eop_desc = tx_ring->tx_buffer_info[i].next_to_watch;
369
370 pr_err("Detected Tx Unit Hang\n"
371 " Tx Queue <%d>\n"
372 " TDH, TDT <%x>, <%x>\n"
373 " next_to_use <%x>\n"
374 " next_to_clean <%x>\n"
375 "tx_buffer_info[next_to_clean]\n"
376 " next_to_watch <%p>\n"
377 " eop_desc->wb.status <%x>\n"
378 " time_stamp <%lx>\n"
379 " jiffies <%lx>\n",
380 tx_ring->queue_index,
381 IXGBE_READ_REG(hw, IXGBE_VFTDH(tx_ring->reg_idx)),
382 IXGBE_READ_REG(hw, IXGBE_VFTDT(tx_ring->reg_idx)),
383 tx_ring->next_to_use, i,
384 eop_desc, (eop_desc ? eop_desc->wb.status : 0),
385 tx_ring->tx_buffer_info[i].time_stamp, jiffies);
386
387 netif_stop_subqueue(tx_ring->netdev, tx_ring->queue_index);
388
389 /* schedule immediate reset if we believe we hung */
390 schedule_work(&adapter->reset_task);
391
392 return true;
393 }
394
92915f71 395#define TX_WAKE_THRESHOLD (DESC_NEEDED * 2)
7ad1a093 396 if (unlikely(total_packets && netif_carrier_ok(tx_ring->netdev) &&
f880d07b 397 (ixgbevf_desc_unused(tx_ring) >= TX_WAKE_THRESHOLD))) {
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398 /* Make sure that anybody stopping the queue after this
399 * sees the new next_to_clean.
400 */
401 smp_mb();
7ad1a093 402
fb40195c
AD
403 if (__netif_subqueue_stopped(tx_ring->netdev,
404 tx_ring->queue_index) &&
92915f71 405 !test_bit(__IXGBEVF_DOWN, &adapter->state)) {
fb40195c
AD
406 netif_wake_subqueue(tx_ring->netdev,
407 tx_ring->queue_index);
7ad1a093 408 ++tx_ring->tx_stats.restart_queue;
92915f71 409 }
92915f71
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410 }
411
7ad1a093 412 return !!budget;
92915f71
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413}
414
08681618
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415/**
416 * ixgbevf_rx_skb - Helper function to determine proper Rx method
417 * @q_vector: structure containing interrupt and ring information
418 * @skb: packet to send up
08681618
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419 **/
420static void ixgbevf_rx_skb(struct ixgbevf_q_vector *q_vector,
dff80520 421 struct sk_buff *skb)
08681618 422{
c777cdfa
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423#ifdef CONFIG_NET_RX_BUSY_POLL
424 skb_mark_napi_id(skb, &q_vector->napi);
425
426 if (ixgbevf_qv_busy_polling(q_vector)) {
427 netif_receive_skb(skb);
428 /* exit early if we busy polled */
429 return;
430 }
431#endif /* CONFIG_NET_RX_BUSY_POLL */
688ff32d
ET
432
433 napi_gro_receive(&q_vector->napi, skb);
08681618
JK
434}
435
ec62fe26
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436/* ixgbevf_rx_checksum - indicate in skb if hw indicated a good cksum
437 * @ring: structure containig ring specific data
438 * @rx_desc: current Rx descriptor being processed
92915f71 439 * @skb: skb currently being received and modified
ec62fe26 440 */
55fb277c 441static inline void ixgbevf_rx_checksum(struct ixgbevf_ring *ring,
ec62fe26
ET
442 union ixgbe_adv_rx_desc *rx_desc,
443 struct sk_buff *skb)
92915f71 444{
bc8acf2c 445 skb_checksum_none_assert(skb);
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446
447 /* Rx csum disabled */
fb40195c 448 if (!(ring->netdev->features & NETIF_F_RXCSUM))
92915f71
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449 return;
450
451 /* if IP and error */
ec62fe26
ET
452 if (ixgbevf_test_staterr(rx_desc, IXGBE_RXD_STAT_IPCS) &&
453 ixgbevf_test_staterr(rx_desc, IXGBE_RXDADV_ERR_IPE)) {
095e2617 454 ring->rx_stats.csum_err++;
92915f71
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455 return;
456 }
457
ec62fe26 458 if (!ixgbevf_test_staterr(rx_desc, IXGBE_RXD_STAT_L4CS))
92915f71
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459 return;
460
ec62fe26 461 if (ixgbevf_test_staterr(rx_desc, IXGBE_RXDADV_ERR_TCPE)) {
095e2617 462 ring->rx_stats.csum_err++;
92915f71
GR
463 return;
464 }
465
466 /* It must be a TCP or UDP packet with a valid checksum */
467 skb->ip_summed = CHECKSUM_UNNECESSARY;
92915f71
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468}
469
dff80520
ET
470/* ixgbevf_process_skb_fields - Populate skb header fields from Rx descriptor
471 * @rx_ring: rx descriptor ring packet is being transacted on
472 * @rx_desc: pointer to the EOP Rx descriptor
473 * @skb: pointer to current skb being populated
474 *
475 * This function checks the ring, descriptor, and packet information in
476 * order to populate the checksum, VLAN, protocol, and other fields within
477 * the skb.
478 */
479static void ixgbevf_process_skb_fields(struct ixgbevf_ring *rx_ring,
480 union ixgbe_adv_rx_desc *rx_desc,
481 struct sk_buff *skb)
482{
483 ixgbevf_rx_checksum(rx_ring, rx_desc, skb);
484
485 if (ixgbevf_test_staterr(rx_desc, IXGBE_RXD_STAT_VP)) {
486 u16 vid = le16_to_cpu(rx_desc->wb.upper.vlan);
487 unsigned long *active_vlans = netdev_priv(rx_ring->netdev);
488
489 if (test_bit(vid & VLAN_VID_MASK, active_vlans))
490 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vid);
491 }
492
493 skb->protocol = eth_type_trans(skb, rx_ring->netdev);
494}
495
4b95fe3d
ET
496/**
497 * ixgbevf_is_non_eop - process handling of non-EOP buffers
498 * @rx_ring: Rx ring being processed
499 * @rx_desc: Rx descriptor for current buffer
500 * @skb: current socket buffer containing buffer in progress
501 *
502 * This function updates next to clean. If the buffer is an EOP buffer
503 * this function exits returning false, otherwise it will place the
504 * sk_buff in the next buffer to be chained and return true indicating
505 * that this is in fact a non-EOP buffer.
506 **/
507static bool ixgbevf_is_non_eop(struct ixgbevf_ring *rx_ring,
bad17234 508 union ixgbe_adv_rx_desc *rx_desc)
4b95fe3d
ET
509{
510 u32 ntc = rx_ring->next_to_clean + 1;
511
512 /* fetch, update, and store next to clean */
513 ntc = (ntc < rx_ring->count) ? ntc : 0;
514 rx_ring->next_to_clean = ntc;
515
516 prefetch(IXGBEVF_RX_DESC(rx_ring, ntc));
517
518 if (likely(ixgbevf_test_staterr(rx_desc, IXGBE_RXD_STAT_EOP)))
519 return false;
520
521 return true;
522}
523
bad17234
ET
524static bool ixgbevf_alloc_mapped_page(struct ixgbevf_ring *rx_ring,
525 struct ixgbevf_rx_buffer *bi)
bafa578f 526{
bad17234 527 struct page *page = bi->page;
bafa578f
ET
528 dma_addr_t dma = bi->dma;
529
bad17234
ET
530 /* since we are recycling buffers we should seldom need to alloc */
531 if (likely(page))
bafa578f
ET
532 return true;
533
bad17234
ET
534 /* alloc new page for storage */
535 page = dev_alloc_page();
536 if (unlikely(!page)) {
537 rx_ring->rx_stats.alloc_rx_page_failed++;
bafa578f
ET
538 return false;
539 }
540
bad17234
ET
541 /* map page for use */
542 dma = dma_map_page(rx_ring->dev, page, 0,
543 PAGE_SIZE, DMA_FROM_DEVICE);
bafa578f
ET
544
545 /* if mapping failed free memory back to system since
546 * there isn't much point in holding memory we can't use
547 */
548 if (dma_mapping_error(rx_ring->dev, dma)) {
bad17234 549 __free_page(page);
bafa578f
ET
550
551 rx_ring->rx_stats.alloc_rx_buff_failed++;
552 return false;
553 }
554
bafa578f 555 bi->dma = dma;
bad17234
ET
556 bi->page = page;
557 bi->page_offset = 0;
bafa578f
ET
558
559 return true;
560}
561
92915f71
GR
562/**
563 * ixgbevf_alloc_rx_buffers - Replace used receive buffers; packet split
095e2617 564 * @rx_ring: rx descriptor ring (for a specific queue) to setup buffers on
bafa578f 565 * @cleaned_count: number of buffers to replace
92915f71 566 **/
095e2617 567static void ixgbevf_alloc_rx_buffers(struct ixgbevf_ring *rx_ring,
bafa578f 568 u16 cleaned_count)
92915f71 569{
92915f71
GR
570 union ixgbe_adv_rx_desc *rx_desc;
571 struct ixgbevf_rx_buffer *bi;
fb40195c 572 unsigned int i = rx_ring->next_to_use;
92915f71 573
bafa578f
ET
574 /* nothing to do or no valid netdev defined */
575 if (!cleaned_count || !rx_ring->netdev)
576 return;
b9dd245b 577
bafa578f
ET
578 rx_desc = IXGBEVF_RX_DESC(rx_ring, i);
579 bi = &rx_ring->rx_buffer_info[i];
580 i -= rx_ring->count;
05d063aa 581
bafa578f 582 do {
bad17234 583 if (!ixgbevf_alloc_mapped_page(rx_ring, bi))
bafa578f 584 break;
b9dd245b 585
bafa578f
ET
586 /* Refresh the desc even if pkt_addr didn't change
587 * because each write-back erases this info.
588 */
bad17234 589 rx_desc->read.pkt_addr = cpu_to_le64(bi->dma + bi->page_offset);
92915f71 590
bafa578f
ET
591 rx_desc++;
592 bi++;
92915f71 593 i++;
bafa578f
ET
594 if (unlikely(!i)) {
595 rx_desc = IXGBEVF_RX_DESC(rx_ring, 0);
596 bi = rx_ring->rx_buffer_info;
597 i -= rx_ring->count;
598 }
599
600 /* clear the hdr_addr for the next_to_use descriptor */
601 rx_desc->read.hdr_addr = 0;
602
603 cleaned_count--;
604 } while (cleaned_count);
605
606 i += rx_ring->count;
92915f71 607
bafa578f
ET
608 if (rx_ring->next_to_use != i) {
609 /* record the next descriptor to use */
610 rx_ring->next_to_use = i;
611
bad17234
ET
612 /* update next to alloc since we have filled the ring */
613 rx_ring->next_to_alloc = i;
614
bafa578f
ET
615 /* Force memory writes to complete before letting h/w
616 * know there are new descriptors to fetch. (Only
617 * applicable for weak-ordered memory model archs,
618 * such as IA-64).
619 */
620 wmb();
621 ixgbevf_write_tail(rx_ring, i);
622 }
92915f71
GR
623}
624
bad17234
ET
625/* ixgbevf_pull_tail - ixgbevf specific version of skb_pull_tail
626 * @rx_ring: rx descriptor ring packet is being transacted on
627 * @skb: pointer to current skb being adjusted
628 *
629 * This function is an ixgbevf specific version of __pskb_pull_tail. The
630 * main difference between this version and the original function is that
631 * this function can make several assumptions about the state of things
632 * that allow for significant optimizations versus the standard function.
633 * As a result we can do things like drop a frag and maintain an accurate
634 * truesize for the skb.
635 */
636static void ixgbevf_pull_tail(struct ixgbevf_ring *rx_ring,
637 struct sk_buff *skb)
638{
639 struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[0];
640 unsigned char *va;
641 unsigned int pull_len;
642
643 /* it is valid to use page_address instead of kmap since we are
644 * working with pages allocated out of the lomem pool per
645 * alloc_page(GFP_ATOMIC)
646 */
647 va = skb_frag_address(frag);
648
649 /* we need the header to contain the greater of either ETH_HLEN or
650 * 60 bytes if the skb->len is less than 60 for skb_pad.
651 */
652 pull_len = eth_get_headlen(va, IXGBEVF_RX_HDR_SIZE);
653
654 /* align pull length to size of long to optimize memcpy performance */
655 skb_copy_to_linear_data(skb, va, ALIGN(pull_len, sizeof(long)));
656
657 /* update all of the pointers */
658 skb_frag_size_sub(frag, pull_len);
659 frag->page_offset += pull_len;
660 skb->data_len -= pull_len;
661 skb->tail += pull_len;
662}
663
664/* ixgbevf_cleanup_headers - Correct corrupted or empty headers
665 * @rx_ring: rx descriptor ring packet is being transacted on
666 * @rx_desc: pointer to the EOP Rx descriptor
667 * @skb: pointer to current skb being fixed
668 *
669 * Check for corrupted packet headers caused by senders on the local L2
670 * embedded NIC switch not setting up their Tx Descriptors right. These
671 * should be very rare.
672 *
673 * Also address the case where we are pulling data in on pages only
674 * and as such no data is present in the skb header.
675 *
676 * In addition if skb is not at least 60 bytes we need to pad it so that
677 * it is large enough to qualify as a valid Ethernet frame.
678 *
679 * Returns true if an error was encountered and skb was freed.
680 */
681static bool ixgbevf_cleanup_headers(struct ixgbevf_ring *rx_ring,
682 union ixgbe_adv_rx_desc *rx_desc,
683 struct sk_buff *skb)
684{
685 /* verify that the packet does not have any known errors */
686 if (unlikely(ixgbevf_test_staterr(rx_desc,
687 IXGBE_RXDADV_ERR_FRAME_ERR_MASK))) {
688 struct net_device *netdev = rx_ring->netdev;
689
690 if (!(netdev->features & NETIF_F_RXALL)) {
691 dev_kfree_skb_any(skb);
692 return true;
693 }
694 }
695
696 /* place header in linear portion of buffer */
697 if (skb_is_nonlinear(skb))
698 ixgbevf_pull_tail(rx_ring, skb);
699
a94d9e22
AD
700 /* if eth_skb_pad returns an error the skb was freed */
701 if (eth_skb_pad(skb))
702 return true;
bad17234
ET
703
704 return false;
705}
706
707/* ixgbevf_reuse_rx_page - page flip buffer and store it back on the ring
708 * @rx_ring: rx descriptor ring to store buffers on
709 * @old_buff: donor buffer to have page reused
710 *
711 * Synchronizes page for reuse by the adapter
712 */
713static void ixgbevf_reuse_rx_page(struct ixgbevf_ring *rx_ring,
714 struct ixgbevf_rx_buffer *old_buff)
715{
716 struct ixgbevf_rx_buffer *new_buff;
717 u16 nta = rx_ring->next_to_alloc;
718
719 new_buff = &rx_ring->rx_buffer_info[nta];
720
721 /* update, and store next to alloc */
722 nta++;
723 rx_ring->next_to_alloc = (nta < rx_ring->count) ? nta : 0;
724
725 /* transfer page from old buffer to new buffer */
726 new_buff->page = old_buff->page;
727 new_buff->dma = old_buff->dma;
728 new_buff->page_offset = old_buff->page_offset;
729
730 /* sync the buffer for use by the device */
731 dma_sync_single_range_for_device(rx_ring->dev, new_buff->dma,
732 new_buff->page_offset,
733 IXGBEVF_RX_BUFSZ,
734 DMA_FROM_DEVICE);
735}
736
737static inline bool ixgbevf_page_is_reserved(struct page *page)
738{
739 return (page_to_nid(page) != numa_mem_id()) || page->pfmemalloc;
740}
741
742/* ixgbevf_add_rx_frag - Add contents of Rx buffer to sk_buff
743 * @rx_ring: rx descriptor ring to transact packets on
744 * @rx_buffer: buffer containing page to add
745 * @rx_desc: descriptor containing length of buffer written by hardware
746 * @skb: sk_buff to place the data into
747 *
748 * This function will add the data contained in rx_buffer->page to the skb.
749 * This is done either through a direct copy if the data in the buffer is
750 * less than the skb header size, otherwise it will just attach the page as
751 * a frag to the skb.
752 *
753 * The function will then update the page offset if necessary and return
754 * true if the buffer can be reused by the adapter.
755 */
756static bool ixgbevf_add_rx_frag(struct ixgbevf_ring *rx_ring,
757 struct ixgbevf_rx_buffer *rx_buffer,
758 union ixgbe_adv_rx_desc *rx_desc,
759 struct sk_buff *skb)
760{
761 struct page *page = rx_buffer->page;
762 unsigned int size = le16_to_cpu(rx_desc->wb.upper.length);
763#if (PAGE_SIZE < 8192)
764 unsigned int truesize = IXGBEVF_RX_BUFSZ;
765#else
766 unsigned int truesize = ALIGN(size, L1_CACHE_BYTES);
767#endif
768
769 if ((size <= IXGBEVF_RX_HDR_SIZE) && !skb_is_nonlinear(skb)) {
770 unsigned char *va = page_address(page) + rx_buffer->page_offset;
771
772 memcpy(__skb_put(skb, size), va, ALIGN(size, sizeof(long)));
773
774 /* page is not reserved, we can reuse buffer as is */
775 if (likely(!ixgbevf_page_is_reserved(page)))
776 return true;
777
778 /* this page cannot be reused so discard it */
779 put_page(page);
780 return false;
781 }
782
783 skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags, page,
784 rx_buffer->page_offset, size, truesize);
785
786 /* avoid re-using remote pages */
787 if (unlikely(ixgbevf_page_is_reserved(page)))
788 return false;
789
790#if (PAGE_SIZE < 8192)
791 /* if we are only owner of page we can reuse it */
792 if (unlikely(page_count(page) != 1))
793 return false;
794
795 /* flip page offset to other buffer */
796 rx_buffer->page_offset ^= IXGBEVF_RX_BUFSZ;
797
798#else
799 /* move offset up to the next cache line */
800 rx_buffer->page_offset += truesize;
801
802 if (rx_buffer->page_offset > (PAGE_SIZE - IXGBEVF_RX_BUFSZ))
803 return false;
804
805#endif
806 /* Even if we own the page, we are not allowed to use atomic_set()
807 * This would break get_page_unless_zero() users.
808 */
809 atomic_inc(&page->_count);
810
811 return true;
812}
813
814static struct sk_buff *ixgbevf_fetch_rx_buffer(struct ixgbevf_ring *rx_ring,
815 union ixgbe_adv_rx_desc *rx_desc,
816 struct sk_buff *skb)
817{
818 struct ixgbevf_rx_buffer *rx_buffer;
819 struct page *page;
820
821 rx_buffer = &rx_ring->rx_buffer_info[rx_ring->next_to_clean];
822 page = rx_buffer->page;
823 prefetchw(page);
824
825 if (likely(!skb)) {
826 void *page_addr = page_address(page) +
827 rx_buffer->page_offset;
828
829 /* prefetch first cache line of first page */
830 prefetch(page_addr);
831#if L1_CACHE_BYTES < 128
832 prefetch(page_addr + L1_CACHE_BYTES);
833#endif
834
835 /* allocate a skb to store the frags */
836 skb = netdev_alloc_skb_ip_align(rx_ring->netdev,
837 IXGBEVF_RX_HDR_SIZE);
838 if (unlikely(!skb)) {
839 rx_ring->rx_stats.alloc_rx_buff_failed++;
840 return NULL;
841 }
842
843 /* we will be copying header into skb->data in
844 * pskb_may_pull so it is in our interest to prefetch
845 * it now to avoid a possible cache miss
846 */
847 prefetchw(skb->data);
848 }
849
850 /* we are reusing so sync this buffer for CPU use */
851 dma_sync_single_range_for_cpu(rx_ring->dev,
852 rx_buffer->dma,
853 rx_buffer->page_offset,
854 IXGBEVF_RX_BUFSZ,
855 DMA_FROM_DEVICE);
856
857 /* pull page into skb */
858 if (ixgbevf_add_rx_frag(rx_ring, rx_buffer, rx_desc, skb)) {
859 /* hand second half of page back to the ring */
860 ixgbevf_reuse_rx_page(rx_ring, rx_buffer);
861 } else {
862 /* we are not reusing the buffer so unmap it */
863 dma_unmap_page(rx_ring->dev, rx_buffer->dma,
864 PAGE_SIZE, DMA_FROM_DEVICE);
865 }
866
867 /* clear contents of buffer_info */
868 rx_buffer->dma = 0;
869 rx_buffer->page = NULL;
870
871 return skb;
872}
873
92915f71 874static inline void ixgbevf_irq_enable_queues(struct ixgbevf_adapter *adapter,
5f3600eb 875 u32 qmask)
92915f71 876{
92915f71
GR
877 struct ixgbe_hw *hw = &adapter->hw;
878
5f3600eb 879 IXGBE_WRITE_REG(hw, IXGBE_VTEIMS, qmask);
92915f71
GR
880}
881
08e50a20
JK
882static int ixgbevf_clean_rx_irq(struct ixgbevf_q_vector *q_vector,
883 struct ixgbevf_ring *rx_ring,
884 int budget)
92915f71 885{
92915f71 886 unsigned int total_rx_bytes = 0, total_rx_packets = 0;
bafa578f 887 u16 cleaned_count = ixgbevf_desc_unused(rx_ring);
bad17234 888 struct sk_buff *skb = rx_ring->skb;
92915f71 889
6622402a 890 while (likely(total_rx_packets < budget)) {
4b95fe3d 891 union ixgbe_adv_rx_desc *rx_desc;
b97fe3b1 892
0579eefc
ET
893 /* return some buffers to hardware, one at a time is too slow */
894 if (cleaned_count >= IXGBEVF_RX_BUFFER_WRITE) {
895 ixgbevf_alloc_rx_buffers(rx_ring, cleaned_count);
896 cleaned_count = 0;
897 }
898
bad17234 899 rx_desc = IXGBEVF_RX_DESC(rx_ring, rx_ring->next_to_clean);
0579eefc
ET
900
901 if (!ixgbevf_test_staterr(rx_desc, IXGBE_RXD_STAT_DD))
92915f71 902 break;
92915f71 903
0579eefc
ET
904 /* This memory barrier is needed to keep us from reading
905 * any other fields out of the rx_desc until we know the
906 * RXD_STAT_DD bit is set
907 */
908 rmb();
ec62fe26 909
bad17234
ET
910 /* retrieve a buffer from the ring */
911 skb = ixgbevf_fetch_rx_buffer(rx_ring, rx_desc, skb);
0579eefc 912
bad17234
ET
913 /* exit if we failed to retrieve a buffer */
914 if (!skb)
915 break;
92915f71 916
b97fe3b1
ET
917 cleaned_count++;
918
bad17234
ET
919 /* fetch next buffer in frame if non-eop */
920 if (ixgbevf_is_non_eop(rx_ring, rx_desc))
0579eefc 921 continue;
5c60f81a 922
bad17234
ET
923 /* verify the packet layout is correct */
924 if (ixgbevf_cleanup_headers(rx_ring, rx_desc, skb)) {
925 skb = NULL;
0579eefc 926 continue;
92915f71
GR
927 }
928
92915f71
GR
929 /* probably a little skewed due to removing CRC */
930 total_rx_bytes += skb->len;
92915f71 931
815cccbf
JF
932 /* Workaround hardware that can't do proper VEPA multicast
933 * source pruning.
934 */
bd9d5592
FF
935 if ((skb->pkt_type == PACKET_BROADCAST ||
936 skb->pkt_type == PACKET_MULTICAST) &&
095e2617 937 ether_addr_equal(rx_ring->netdev->dev_addr,
7367d0b5 938 eth_hdr(skb)->h_source)) {
815cccbf 939 dev_kfree_skb_irq(skb);
0579eefc 940 continue;
815cccbf
JF
941 }
942
dff80520
ET
943 /* populate checksum, VLAN, and protocol */
944 ixgbevf_process_skb_fields(rx_ring, rx_desc, skb);
945
946 ixgbevf_rx_skb(q_vector, skb);
92915f71 947
bad17234
ET
948 /* reset skb pointer */
949 skb = NULL;
950
0579eefc 951 /* update budget accounting */
6622402a
ET
952 total_rx_packets++;
953 }
92915f71 954
bad17234
ET
955 /* place incomplete frames back on ring for completion */
956 rx_ring->skb = skb;
957
4197aa7b 958 u64_stats_update_begin(&rx_ring->syncp);
095e2617
ET
959 rx_ring->stats.packets += total_rx_packets;
960 rx_ring->stats.bytes += total_rx_bytes;
4197aa7b 961 u64_stats_update_end(&rx_ring->syncp);
ac6ed8f0
GR
962 q_vector->rx.total_packets += total_rx_packets;
963 q_vector->rx.total_bytes += total_rx_bytes;
92915f71 964
08e50a20 965 return total_rx_packets;
92915f71
GR
966}
967
968/**
fa71ae27 969 * ixgbevf_poll - NAPI polling calback
92915f71
GR
970 * @napi: napi struct with our devices info in it
971 * @budget: amount of work driver is allowed to do this pass, in packets
972 *
fa71ae27 973 * This function will clean more than one or more rings associated with a
92915f71
GR
974 * q_vector.
975 **/
fa71ae27 976static int ixgbevf_poll(struct napi_struct *napi, int budget)
92915f71
GR
977{
978 struct ixgbevf_q_vector *q_vector =
979 container_of(napi, struct ixgbevf_q_vector, napi);
980 struct ixgbevf_adapter *adapter = q_vector->adapter;
fa71ae27
AD
981 struct ixgbevf_ring *ring;
982 int per_ring_budget;
983 bool clean_complete = true;
984
985 ixgbevf_for_each_ring(ring, q_vector->tx)
986 clean_complete &= ixgbevf_clean_tx_irq(q_vector, ring);
92915f71 987
c777cdfa
JK
988#ifdef CONFIG_NET_RX_BUSY_POLL
989 if (!ixgbevf_qv_lock_napi(q_vector))
990 return budget;
991#endif
992
92915f71
GR
993 /* attempt to distribute budget to each queue fairly, but don't allow
994 * the budget to go below 1 because we'll exit polling */
fa71ae27
AD
995 if (q_vector->rx.count > 1)
996 per_ring_budget = max(budget/q_vector->rx.count, 1);
997 else
998 per_ring_budget = budget;
999
1000 ixgbevf_for_each_ring(ring, q_vector->rx)
08e50a20
JK
1001 clean_complete &= (ixgbevf_clean_rx_irq(q_vector, ring,
1002 per_ring_budget)
1003 < per_ring_budget);
fa71ae27 1004
c777cdfa
JK
1005#ifdef CONFIG_NET_RX_BUSY_POLL
1006 ixgbevf_qv_unlock_napi(q_vector);
1007#endif
1008
fa71ae27
AD
1009 /* If all work not completed, return budget and keep polling */
1010 if (!clean_complete)
1011 return budget;
1012 /* all work done, exit the polling mode */
1013 napi_complete(napi);
1014 if (adapter->rx_itr_setting & 1)
1015 ixgbevf_set_itr(q_vector);
2e7cfbdd
MR
1016 if (!test_bit(__IXGBEVF_DOWN, &adapter->state) &&
1017 !test_bit(__IXGBEVF_REMOVING, &adapter->state))
fa71ae27
AD
1018 ixgbevf_irq_enable_queues(adapter,
1019 1 << q_vector->v_idx);
92915f71 1020
fa71ae27 1021 return 0;
92915f71
GR
1022}
1023
ce422606
GR
1024/**
1025 * ixgbevf_write_eitr - write VTEITR register in hardware specific way
1026 * @q_vector: structure containing interrupt and ring information
1027 */
3849623e 1028void ixgbevf_write_eitr(struct ixgbevf_q_vector *q_vector)
ce422606
GR
1029{
1030 struct ixgbevf_adapter *adapter = q_vector->adapter;
1031 struct ixgbe_hw *hw = &adapter->hw;
1032 int v_idx = q_vector->v_idx;
1033 u32 itr_reg = q_vector->itr & IXGBE_MAX_EITR;
1034
1035 /*
1036 * set the WDIS bit to not clear the timer bits and cause an
1037 * immediate assertion of the interrupt
1038 */
1039 itr_reg |= IXGBE_EITR_CNT_WDIS;
1040
1041 IXGBE_WRITE_REG(hw, IXGBE_VTEITR(v_idx), itr_reg);
1042}
92915f71 1043
c777cdfa
JK
1044#ifdef CONFIG_NET_RX_BUSY_POLL
1045/* must be called with local_bh_disable()d */
1046static int ixgbevf_busy_poll_recv(struct napi_struct *napi)
1047{
1048 struct ixgbevf_q_vector *q_vector =
1049 container_of(napi, struct ixgbevf_q_vector, napi);
1050 struct ixgbevf_adapter *adapter = q_vector->adapter;
1051 struct ixgbevf_ring *ring;
1052 int found = 0;
1053
1054 if (test_bit(__IXGBEVF_DOWN, &adapter->state))
1055 return LL_FLUSH_FAILED;
1056
1057 if (!ixgbevf_qv_lock_poll(q_vector))
1058 return LL_FLUSH_BUSY;
1059
1060 ixgbevf_for_each_ring(ring, q_vector->rx) {
1061 found = ixgbevf_clean_rx_irq(q_vector, ring, 4);
3b5dca26
JK
1062#ifdef BP_EXTENDED_STATS
1063 if (found)
095e2617 1064 ring->stats.cleaned += found;
3b5dca26 1065 else
095e2617 1066 ring->stats.misses++;
3b5dca26 1067#endif
c777cdfa
JK
1068 if (found)
1069 break;
1070 }
1071
1072 ixgbevf_qv_unlock_poll(q_vector);
1073
1074 return found;
1075}
1076#endif /* CONFIG_NET_RX_BUSY_POLL */
1077
92915f71
GR
1078/**
1079 * ixgbevf_configure_msix - Configure MSI-X hardware
1080 * @adapter: board private structure
1081 *
1082 * ixgbevf_configure_msix sets up the hardware to properly generate MSI-X
1083 * interrupts.
1084 **/
1085static void ixgbevf_configure_msix(struct ixgbevf_adapter *adapter)
1086{
1087 struct ixgbevf_q_vector *q_vector;
6b43c446 1088 int q_vectors, v_idx;
92915f71
GR
1089
1090 q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
5f3600eb 1091 adapter->eims_enable_mask = 0;
92915f71
GR
1092
1093 /*
1094 * Populate the IVAR table and set the ITR values to the
1095 * corresponding register.
1096 */
1097 for (v_idx = 0; v_idx < q_vectors; v_idx++) {
6b43c446 1098 struct ixgbevf_ring *ring;
92915f71 1099 q_vector = adapter->q_vector[v_idx];
6b43c446
AD
1100
1101 ixgbevf_for_each_ring(ring, q_vector->rx)
1102 ixgbevf_set_ivar(adapter, 0, ring->reg_idx, v_idx);
1103
1104 ixgbevf_for_each_ring(ring, q_vector->tx)
1105 ixgbevf_set_ivar(adapter, 1, ring->reg_idx, v_idx);
92915f71 1106
5f3600eb
AD
1107 if (q_vector->tx.ring && !q_vector->rx.ring) {
1108 /* tx only vector */
1109 if (adapter->tx_itr_setting == 1)
1110 q_vector->itr = IXGBE_10K_ITR;
1111 else
1112 q_vector->itr = adapter->tx_itr_setting;
1113 } else {
1114 /* rx or rx/tx vector */
1115 if (adapter->rx_itr_setting == 1)
1116 q_vector->itr = IXGBE_20K_ITR;
1117 else
1118 q_vector->itr = adapter->rx_itr_setting;
1119 }
1120
1121 /* add q_vector eims value to global eims_enable_mask */
1122 adapter->eims_enable_mask |= 1 << v_idx;
92915f71 1123
5f3600eb 1124 ixgbevf_write_eitr(q_vector);
92915f71
GR
1125 }
1126
1127 ixgbevf_set_ivar(adapter, -1, 1, v_idx);
5f3600eb
AD
1128 /* setup eims_other and add value to global eims_enable_mask */
1129 adapter->eims_other = 1 << v_idx;
1130 adapter->eims_enable_mask |= adapter->eims_other;
92915f71
GR
1131}
1132
1133enum latency_range {
1134 lowest_latency = 0,
1135 low_latency = 1,
1136 bulk_latency = 2,
1137 latency_invalid = 255
1138};
1139
1140/**
1141 * ixgbevf_update_itr - update the dynamic ITR value based on statistics
5f3600eb
AD
1142 * @q_vector: structure containing interrupt and ring information
1143 * @ring_container: structure containing ring performance data
92915f71
GR
1144 *
1145 * Stores a new ITR value based on packets and byte
1146 * counts during the last interrupt. The advantage of per interrupt
1147 * computation is faster updates and more accurate ITR for the current
1148 * traffic pattern. Constants in this function were computed
1149 * based on theoretical maximum wire speed and thresholds were set based
1150 * on testing data as well as attempting to minimize response time
1151 * while increasing bulk throughput.
1152 **/
5f3600eb
AD
1153static void ixgbevf_update_itr(struct ixgbevf_q_vector *q_vector,
1154 struct ixgbevf_ring_container *ring_container)
92915f71 1155{
5f3600eb
AD
1156 int bytes = ring_container->total_bytes;
1157 int packets = ring_container->total_packets;
92915f71
GR
1158 u32 timepassed_us;
1159 u64 bytes_perint;
5f3600eb 1160 u8 itr_setting = ring_container->itr;
92915f71
GR
1161
1162 if (packets == 0)
5f3600eb 1163 return;
92915f71
GR
1164
1165 /* simple throttlerate management
1166 * 0-20MB/s lowest (100000 ints/s)
1167 * 20-100MB/s low (20000 ints/s)
1168 * 100-1249MB/s bulk (8000 ints/s)
1169 */
1170 /* what was last interrupt timeslice? */
5f3600eb 1171 timepassed_us = q_vector->itr >> 2;
92915f71
GR
1172 bytes_perint = bytes / timepassed_us; /* bytes/usec */
1173
1174 switch (itr_setting) {
1175 case lowest_latency:
e2c28ce7 1176 if (bytes_perint > 10)
5f3600eb 1177 itr_setting = low_latency;
92915f71
GR
1178 break;
1179 case low_latency:
e2c28ce7 1180 if (bytes_perint > 20)
5f3600eb 1181 itr_setting = bulk_latency;
e2c28ce7 1182 else if (bytes_perint <= 10)
5f3600eb 1183 itr_setting = lowest_latency;
92915f71
GR
1184 break;
1185 case bulk_latency:
e2c28ce7 1186 if (bytes_perint <= 20)
5f3600eb 1187 itr_setting = low_latency;
92915f71
GR
1188 break;
1189 }
1190
5f3600eb
AD
1191 /* clear work counters since we have the values we need */
1192 ring_container->total_bytes = 0;
1193 ring_container->total_packets = 0;
1194
1195 /* write updated itr to ring container */
1196 ring_container->itr = itr_setting;
92915f71
GR
1197}
1198
fa71ae27 1199static void ixgbevf_set_itr(struct ixgbevf_q_vector *q_vector)
92915f71 1200{
5f3600eb
AD
1201 u32 new_itr = q_vector->itr;
1202 u8 current_itr;
92915f71 1203
5f3600eb
AD
1204 ixgbevf_update_itr(q_vector, &q_vector->tx);
1205 ixgbevf_update_itr(q_vector, &q_vector->rx);
92915f71 1206
6b43c446 1207 current_itr = max(q_vector->rx.itr, q_vector->tx.itr);
92915f71
GR
1208
1209 switch (current_itr) {
1210 /* counts and packets in update_itr are dependent on these numbers */
1211 case lowest_latency:
5f3600eb 1212 new_itr = IXGBE_100K_ITR;
92915f71
GR
1213 break;
1214 case low_latency:
5f3600eb 1215 new_itr = IXGBE_20K_ITR;
92915f71
GR
1216 break;
1217 case bulk_latency:
1218 default:
5f3600eb 1219 new_itr = IXGBE_8K_ITR;
92915f71
GR
1220 break;
1221 }
1222
5f3600eb 1223 if (new_itr != q_vector->itr) {
92915f71 1224 /* do an exponential smoothing */
5f3600eb
AD
1225 new_itr = (10 * new_itr * q_vector->itr) /
1226 ((9 * new_itr) + q_vector->itr);
1227
1228 /* save the algorithm value here */
1229 q_vector->itr = new_itr;
1230
1231 ixgbevf_write_eitr(q_vector);
92915f71 1232 }
92915f71
GR
1233}
1234
4b2cd27f 1235static irqreturn_t ixgbevf_msix_other(int irq, void *data)
92915f71 1236{
fa71ae27 1237 struct ixgbevf_adapter *adapter = data;
92915f71 1238 struct ixgbe_hw *hw = &adapter->hw;
08259594 1239
4b2cd27f 1240 hw->mac.get_link_status = 1;
1e72bfc3 1241
2e7cfbdd
MR
1242 if (!test_bit(__IXGBEVF_DOWN, &adapter->state) &&
1243 !test_bit(__IXGBEVF_REMOVING, &adapter->state))
c7bb417d 1244 mod_timer(&adapter->watchdog_timer, jiffies);
3a2c4033 1245
5f3600eb
AD
1246 IXGBE_WRITE_REG(hw, IXGBE_VTEIMS, adapter->eims_other);
1247
92915f71
GR
1248 return IRQ_HANDLED;
1249}
1250
92915f71 1251/**
fa71ae27 1252 * ixgbevf_msix_clean_rings - single unshared vector rx clean (all queues)
92915f71
GR
1253 * @irq: unused
1254 * @data: pointer to our q_vector struct for this interrupt vector
1255 **/
fa71ae27 1256static irqreturn_t ixgbevf_msix_clean_rings(int irq, void *data)
92915f71
GR
1257{
1258 struct ixgbevf_q_vector *q_vector = data;
92915f71 1259
5f3600eb 1260 /* EIAM disabled interrupts (on this vector) for us */
fa71ae27
AD
1261 if (q_vector->rx.ring || q_vector->tx.ring)
1262 napi_schedule(&q_vector->napi);
92915f71
GR
1263
1264 return IRQ_HANDLED;
1265}
1266
1267static inline void map_vector_to_rxq(struct ixgbevf_adapter *a, int v_idx,
1268 int r_idx)
1269{
1270 struct ixgbevf_q_vector *q_vector = a->q_vector[v_idx];
1271
87e70ab9
DS
1272 a->rx_ring[r_idx]->next = q_vector->rx.ring;
1273 q_vector->rx.ring = a->rx_ring[r_idx];
6b43c446 1274 q_vector->rx.count++;
92915f71
GR
1275}
1276
1277static inline void map_vector_to_txq(struct ixgbevf_adapter *a, int v_idx,
1278 int t_idx)
1279{
1280 struct ixgbevf_q_vector *q_vector = a->q_vector[v_idx];
1281
87e70ab9
DS
1282 a->tx_ring[t_idx]->next = q_vector->tx.ring;
1283 q_vector->tx.ring = a->tx_ring[t_idx];
6b43c446 1284 q_vector->tx.count++;
92915f71
GR
1285}
1286
1287/**
1288 * ixgbevf_map_rings_to_vectors - Maps descriptor rings to vectors
1289 * @adapter: board private structure to initialize
1290 *
1291 * This function maps descriptor rings to the queue-specific vectors
1292 * we were allotted through the MSI-X enabling code. Ideally, we'd have
1293 * one vector per ring/queue, but on a constrained vector budget, we
1294 * group the rings as "efficiently" as possible. You would add new
1295 * mapping configurations in here.
1296 **/
1297static int ixgbevf_map_rings_to_vectors(struct ixgbevf_adapter *adapter)
1298{
1299 int q_vectors;
1300 int v_start = 0;
1301 int rxr_idx = 0, txr_idx = 0;
1302 int rxr_remaining = adapter->num_rx_queues;
1303 int txr_remaining = adapter->num_tx_queues;
1304 int i, j;
1305 int rqpv, tqpv;
1306 int err = 0;
1307
1308 q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
1309
1310 /*
1311 * The ideal configuration...
1312 * We have enough vectors to map one per queue.
1313 */
1314 if (q_vectors == adapter->num_rx_queues + adapter->num_tx_queues) {
1315 for (; rxr_idx < rxr_remaining; v_start++, rxr_idx++)
1316 map_vector_to_rxq(adapter, v_start, rxr_idx);
1317
1318 for (; txr_idx < txr_remaining; v_start++, txr_idx++)
1319 map_vector_to_txq(adapter, v_start, txr_idx);
1320 goto out;
1321 }
1322
1323 /*
1324 * If we don't have enough vectors for a 1-to-1
1325 * mapping, we'll have to group them so there are
1326 * multiple queues per vector.
1327 */
1328 /* Re-adjusting *qpv takes care of the remainder. */
1329 for (i = v_start; i < q_vectors; i++) {
1330 rqpv = DIV_ROUND_UP(rxr_remaining, q_vectors - i);
1331 for (j = 0; j < rqpv; j++) {
1332 map_vector_to_rxq(adapter, i, rxr_idx);
1333 rxr_idx++;
1334 rxr_remaining--;
1335 }
1336 }
1337 for (i = v_start; i < q_vectors; i++) {
1338 tqpv = DIV_ROUND_UP(txr_remaining, q_vectors - i);
1339 for (j = 0; j < tqpv; j++) {
1340 map_vector_to_txq(adapter, i, txr_idx);
1341 txr_idx++;
1342 txr_remaining--;
1343 }
1344 }
1345
1346out:
1347 return err;
1348}
1349
1350/**
1351 * ixgbevf_request_msix_irqs - Initialize MSI-X interrupts
1352 * @adapter: board private structure
1353 *
1354 * ixgbevf_request_msix_irqs allocates MSI-X vectors and requests
1355 * interrupts from the kernel.
1356 **/
1357static int ixgbevf_request_msix_irqs(struct ixgbevf_adapter *adapter)
1358{
1359 struct net_device *netdev = adapter->netdev;
fa71ae27
AD
1360 int q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
1361 int vector, err;
92915f71
GR
1362 int ri = 0, ti = 0;
1363
92915f71 1364 for (vector = 0; vector < q_vectors; vector++) {
fa71ae27
AD
1365 struct ixgbevf_q_vector *q_vector = adapter->q_vector[vector];
1366 struct msix_entry *entry = &adapter->msix_entries[vector];
1367
1368 if (q_vector->tx.ring && q_vector->rx.ring) {
1369 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
1370 "%s-%s-%d", netdev->name, "TxRx", ri++);
1371 ti++;
1372 } else if (q_vector->rx.ring) {
1373 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
1374 "%s-%s-%d", netdev->name, "rx", ri++);
1375 } else if (q_vector->tx.ring) {
1376 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
1377 "%s-%s-%d", netdev->name, "tx", ti++);
92915f71
GR
1378 } else {
1379 /* skip this unused q_vector */
1380 continue;
1381 }
fa71ae27
AD
1382 err = request_irq(entry->vector, &ixgbevf_msix_clean_rings, 0,
1383 q_vector->name, q_vector);
92915f71
GR
1384 if (err) {
1385 hw_dbg(&adapter->hw,
1386 "request_irq failed for MSIX interrupt "
1387 "Error: %d\n", err);
1388 goto free_queue_irqs;
1389 }
1390 }
1391
92915f71 1392 err = request_irq(adapter->msix_entries[vector].vector,
4b2cd27f 1393 &ixgbevf_msix_other, 0, netdev->name, adapter);
92915f71
GR
1394 if (err) {
1395 hw_dbg(&adapter->hw,
4b2cd27f 1396 "request_irq for msix_other failed: %d\n", err);
92915f71
GR
1397 goto free_queue_irqs;
1398 }
1399
1400 return 0;
1401
1402free_queue_irqs:
fa71ae27
AD
1403 while (vector) {
1404 vector--;
1405 free_irq(adapter->msix_entries[vector].vector,
1406 adapter->q_vector[vector]);
1407 }
a1f6c6b1 1408 /* This failure is non-recoverable - it indicates the system is
1409 * out of MSIX vector resources and the VF driver cannot run
1410 * without them. Set the number of msix vectors to zero
1411 * indicating that not enough can be allocated. The error
1412 * will be returned to the user indicating device open failed.
1413 * Any further attempts to force the driver to open will also
1414 * fail. The only way to recover is to unload the driver and
1415 * reload it again. If the system has recovered some MSIX
1416 * vectors then it may succeed.
1417 */
1418 adapter->num_msix_vectors = 0;
92915f71
GR
1419 return err;
1420}
1421
1422static inline void ixgbevf_reset_q_vectors(struct ixgbevf_adapter *adapter)
1423{
1424 int i, q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
1425
1426 for (i = 0; i < q_vectors; i++) {
1427 struct ixgbevf_q_vector *q_vector = adapter->q_vector[i];
6b43c446
AD
1428 q_vector->rx.ring = NULL;
1429 q_vector->tx.ring = NULL;
1430 q_vector->rx.count = 0;
1431 q_vector->tx.count = 0;
92915f71
GR
1432 }
1433}
1434
1435/**
1436 * ixgbevf_request_irq - initialize interrupts
1437 * @adapter: board private structure
1438 *
1439 * Attempts to configure interrupts using the best available
1440 * capabilities of the hardware and kernel.
1441 **/
1442static int ixgbevf_request_irq(struct ixgbevf_adapter *adapter)
1443{
1444 int err = 0;
1445
1446 err = ixgbevf_request_msix_irqs(adapter);
1447
1448 if (err)
1449 hw_dbg(&adapter->hw,
1450 "request_irq failed, Error %d\n", err);
1451
1452 return err;
1453}
1454
1455static void ixgbevf_free_irq(struct ixgbevf_adapter *adapter)
1456{
92915f71
GR
1457 int i, q_vectors;
1458
1459 q_vectors = adapter->num_msix_vectors;
92915f71
GR
1460 i = q_vectors - 1;
1461
fa71ae27 1462 free_irq(adapter->msix_entries[i].vector, adapter);
92915f71
GR
1463 i--;
1464
1465 for (; i >= 0; i--) {
fa71ae27
AD
1466 /* free only the irqs that were actually requested */
1467 if (!adapter->q_vector[i]->rx.ring &&
1468 !adapter->q_vector[i]->tx.ring)
1469 continue;
1470
92915f71
GR
1471 free_irq(adapter->msix_entries[i].vector,
1472 adapter->q_vector[i]);
1473 }
1474
1475 ixgbevf_reset_q_vectors(adapter);
1476}
1477
1478/**
1479 * ixgbevf_irq_disable - Mask off interrupt generation on the NIC
1480 * @adapter: board private structure
1481 **/
1482static inline void ixgbevf_irq_disable(struct ixgbevf_adapter *adapter)
1483{
92915f71 1484 struct ixgbe_hw *hw = &adapter->hw;
5f3600eb 1485 int i;
92915f71 1486
5f3600eb 1487 IXGBE_WRITE_REG(hw, IXGBE_VTEIAM, 0);
92915f71 1488 IXGBE_WRITE_REG(hw, IXGBE_VTEIMC, ~0);
5f3600eb 1489 IXGBE_WRITE_REG(hw, IXGBE_VTEIAC, 0);
92915f71
GR
1490
1491 IXGBE_WRITE_FLUSH(hw);
1492
1493 for (i = 0; i < adapter->num_msix_vectors; i++)
1494 synchronize_irq(adapter->msix_entries[i].vector);
1495}
1496
1497/**
1498 * ixgbevf_irq_enable - Enable default interrupt generation settings
1499 * @adapter: board private structure
1500 **/
5f3600eb 1501static inline void ixgbevf_irq_enable(struct ixgbevf_adapter *adapter)
92915f71
GR
1502{
1503 struct ixgbe_hw *hw = &adapter->hw;
92915f71 1504
5f3600eb
AD
1505 IXGBE_WRITE_REG(hw, IXGBE_VTEIAM, adapter->eims_enable_mask);
1506 IXGBE_WRITE_REG(hw, IXGBE_VTEIAC, adapter->eims_enable_mask);
1507 IXGBE_WRITE_REG(hw, IXGBE_VTEIMS, adapter->eims_enable_mask);
92915f71
GR
1508}
1509
de02decb
DS
1510/**
1511 * ixgbevf_configure_tx_ring - Configure 82599 VF Tx ring after Reset
1512 * @adapter: board private structure
1513 * @ring: structure containing ring specific data
1514 *
1515 * Configure the Tx descriptor ring after a reset.
1516 **/
1517static void ixgbevf_configure_tx_ring(struct ixgbevf_adapter *adapter,
1518 struct ixgbevf_ring *ring)
1519{
1520 struct ixgbe_hw *hw = &adapter->hw;
1521 u64 tdba = ring->dma;
1522 int wait_loop = 10;
1523 u32 txdctl = IXGBE_TXDCTL_ENABLE;
1524 u8 reg_idx = ring->reg_idx;
1525
1526 /* disable queue to avoid issues while updating state */
1527 IXGBE_WRITE_REG(hw, IXGBE_VFTXDCTL(reg_idx), IXGBE_TXDCTL_SWFLSH);
1528 IXGBE_WRITE_FLUSH(hw);
1529
1530 IXGBE_WRITE_REG(hw, IXGBE_VFTDBAL(reg_idx), tdba & DMA_BIT_MASK(32));
1531 IXGBE_WRITE_REG(hw, IXGBE_VFTDBAH(reg_idx), tdba >> 32);
1532 IXGBE_WRITE_REG(hw, IXGBE_VFTDLEN(reg_idx),
1533 ring->count * sizeof(union ixgbe_adv_tx_desc));
1534
1535 /* disable head writeback */
1536 IXGBE_WRITE_REG(hw, IXGBE_VFTDWBAH(reg_idx), 0);
1537 IXGBE_WRITE_REG(hw, IXGBE_VFTDWBAL(reg_idx), 0);
1538
1539 /* enable relaxed ordering */
1540 IXGBE_WRITE_REG(hw, IXGBE_VFDCA_TXCTRL(reg_idx),
1541 (IXGBE_DCA_TXCTRL_DESC_RRO_EN |
1542 IXGBE_DCA_TXCTRL_DATA_RRO_EN));
1543
1544 /* reset head and tail pointers */
1545 IXGBE_WRITE_REG(hw, IXGBE_VFTDH(reg_idx), 0);
1546 IXGBE_WRITE_REG(hw, IXGBE_VFTDT(reg_idx), 0);
dbf8b0d8 1547 ring->tail = adapter->io_addr + IXGBE_VFTDT(reg_idx);
de02decb
DS
1548
1549 /* reset ntu and ntc to place SW in sync with hardwdare */
1550 ring->next_to_clean = 0;
1551 ring->next_to_use = 0;
1552
1553 /* In order to avoid issues WTHRESH + PTHRESH should always be equal
1554 * to or less than the number of on chip descriptors, which is
1555 * currently 40.
1556 */
1557 txdctl |= (8 << 16); /* WTHRESH = 8 */
1558
1559 /* Setting PTHRESH to 32 both improves performance */
1560 txdctl |= (1 << 8) | /* HTHRESH = 1 */
1561 32; /* PTHRESH = 32 */
1562
e08400b7
ET
1563 clear_bit(__IXGBEVF_HANG_CHECK_ARMED, &ring->state);
1564
de02decb
DS
1565 IXGBE_WRITE_REG(hw, IXGBE_VFTXDCTL(reg_idx), txdctl);
1566
1567 /* poll to verify queue is enabled */
1568 do {
1569 usleep_range(1000, 2000);
1570 txdctl = IXGBE_READ_REG(hw, IXGBE_VFTXDCTL(reg_idx));
1571 } while (--wait_loop && !(txdctl & IXGBE_TXDCTL_ENABLE));
1572 if (!wait_loop)
1573 pr_err("Could not enable Tx Queue %d\n", reg_idx);
1574}
1575
92915f71
GR
1576/**
1577 * ixgbevf_configure_tx - Configure 82599 VF Transmit Unit after Reset
1578 * @adapter: board private structure
1579 *
1580 * Configure the Tx unit of the MAC after a reset.
1581 **/
1582static void ixgbevf_configure_tx(struct ixgbevf_adapter *adapter)
1583{
de02decb 1584 u32 i;
92915f71
GR
1585
1586 /* Setup the HW Tx Head and Tail descriptor pointers */
de02decb
DS
1587 for (i = 0; i < adapter->num_tx_queues; i++)
1588 ixgbevf_configure_tx_ring(adapter, adapter->tx_ring[i]);
92915f71
GR
1589}
1590
1591#define IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT 2
1592
1593static void ixgbevf_configure_srrctl(struct ixgbevf_adapter *adapter, int index)
1594{
92915f71
GR
1595 struct ixgbe_hw *hw = &adapter->hw;
1596 u32 srrctl;
1597
92915f71
GR
1598 srrctl = IXGBE_SRRCTL_DROP_EN;
1599
bad17234
ET
1600 srrctl |= IXGBEVF_RX_HDR_SIZE << IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT;
1601 srrctl |= IXGBEVF_RX_BUFSZ >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
77d5dfca 1602 srrctl |= IXGBE_SRRCTL_DESCTYPE_ADV_ONEBUF;
92915f71 1603
92915f71
GR
1604 IXGBE_WRITE_REG(hw, IXGBE_VFSRRCTL(index), srrctl);
1605}
1606
1bb9c639
DS
1607static void ixgbevf_setup_psrtype(struct ixgbevf_adapter *adapter)
1608{
1609 struct ixgbe_hw *hw = &adapter->hw;
1610
1611 /* PSRTYPE must be initialized in 82599 */
1612 u32 psrtype = IXGBE_PSRTYPE_TCPHDR | IXGBE_PSRTYPE_UDPHDR |
1613 IXGBE_PSRTYPE_IPV4HDR | IXGBE_PSRTYPE_IPV6HDR |
1614 IXGBE_PSRTYPE_L2HDR;
1615
1616 if (adapter->num_rx_queues > 1)
1617 psrtype |= 1 << 29;
1618
1619 IXGBE_WRITE_REG(hw, IXGBE_VFPSRTYPE, psrtype);
1620}
1621
de02decb
DS
1622#define IXGBEVF_MAX_RX_DESC_POLL 10
1623static void ixgbevf_disable_rx_queue(struct ixgbevf_adapter *adapter,
1624 struct ixgbevf_ring *ring)
1625{
1626 struct ixgbe_hw *hw = &adapter->hw;
1627 int wait_loop = IXGBEVF_MAX_RX_DESC_POLL;
1628 u32 rxdctl;
1629 u8 reg_idx = ring->reg_idx;
1630
26597802
MR
1631 if (IXGBE_REMOVED(hw->hw_addr))
1632 return;
de02decb
DS
1633 rxdctl = IXGBE_READ_REG(hw, IXGBE_VFRXDCTL(reg_idx));
1634 rxdctl &= ~IXGBE_RXDCTL_ENABLE;
1635
1636 /* write value back with RXDCTL.ENABLE bit cleared */
1637 IXGBE_WRITE_REG(hw, IXGBE_VFRXDCTL(reg_idx), rxdctl);
1638
1639 /* the hardware may take up to 100us to really disable the rx queue */
1640 do {
1641 udelay(10);
1642 rxdctl = IXGBE_READ_REG(hw, IXGBE_VFRXDCTL(reg_idx));
1643 } while (--wait_loop && (rxdctl & IXGBE_RXDCTL_ENABLE));
1644
1645 if (!wait_loop)
1646 pr_err("RXDCTL.ENABLE queue %d not cleared while polling\n",
1647 reg_idx);
1648}
1649
1650static void ixgbevf_rx_desc_queue_enable(struct ixgbevf_adapter *adapter,
1651 struct ixgbevf_ring *ring)
1652{
1653 struct ixgbe_hw *hw = &adapter->hw;
1654 int wait_loop = IXGBEVF_MAX_RX_DESC_POLL;
1655 u32 rxdctl;
1656 u8 reg_idx = ring->reg_idx;
1657
26597802
MR
1658 if (IXGBE_REMOVED(hw->hw_addr))
1659 return;
de02decb
DS
1660 do {
1661 usleep_range(1000, 2000);
1662 rxdctl = IXGBE_READ_REG(hw, IXGBE_VFRXDCTL(reg_idx));
1663 } while (--wait_loop && !(rxdctl & IXGBE_RXDCTL_ENABLE));
1664
1665 if (!wait_loop)
1666 pr_err("RXDCTL.ENABLE queue %d not set while polling\n",
1667 reg_idx);
1668}
1669
9295edb4
ET
1670static void ixgbevf_setup_vfmrqc(struct ixgbevf_adapter *adapter)
1671{
1672 struct ixgbe_hw *hw = &adapter->hw;
1673 u32 vfmrqc = 0, vfreta = 0;
1674 u32 rss_key[10];
1675 u16 rss_i = adapter->num_rx_queues;
1676 int i, j;
1677
1678 /* Fill out hash function seeds */
1679 netdev_rss_key_fill(rss_key, sizeof(rss_key));
1680 for (i = 0; i < 10; i++)
1681 IXGBE_WRITE_REG(hw, IXGBE_VFRSSRK(i), rss_key[i]);
1682
1683 /* Fill out redirection table */
1684 for (i = 0, j = 0; i < 64; i++, j++) {
1685 if (j == rss_i)
1686 j = 0;
1687 vfreta = (vfreta << 8) | (j * 0x1);
1688 if ((i & 3) == 3)
1689 IXGBE_WRITE_REG(hw, IXGBE_VFRETA(i >> 2), vfreta);
1690 }
1691
1692 /* Perform hash on these packet types */
1693 vfmrqc |= IXGBE_VFMRQC_RSS_FIELD_IPV4 |
1694 IXGBE_VFMRQC_RSS_FIELD_IPV4_TCP |
1695 IXGBE_VFMRQC_RSS_FIELD_IPV6 |
1696 IXGBE_VFMRQC_RSS_FIELD_IPV6_TCP;
1697
1698 vfmrqc |= IXGBE_VFMRQC_RSSEN;
1699
1700 IXGBE_WRITE_REG(hw, IXGBE_VFMRQC, vfmrqc);
1701}
1702
de02decb
DS
1703static void ixgbevf_configure_rx_ring(struct ixgbevf_adapter *adapter,
1704 struct ixgbevf_ring *ring)
1705{
1706 struct ixgbe_hw *hw = &adapter->hw;
1707 u64 rdba = ring->dma;
1708 u32 rxdctl;
1709 u8 reg_idx = ring->reg_idx;
1710
1711 /* disable queue to avoid issues while updating state */
1712 rxdctl = IXGBE_READ_REG(hw, IXGBE_VFRXDCTL(reg_idx));
1713 ixgbevf_disable_rx_queue(adapter, ring);
1714
1715 IXGBE_WRITE_REG(hw, IXGBE_VFRDBAL(reg_idx), rdba & DMA_BIT_MASK(32));
1716 IXGBE_WRITE_REG(hw, IXGBE_VFRDBAH(reg_idx), rdba >> 32);
1717 IXGBE_WRITE_REG(hw, IXGBE_VFRDLEN(reg_idx),
1718 ring->count * sizeof(union ixgbe_adv_rx_desc));
1719
1720 /* enable relaxed ordering */
1721 IXGBE_WRITE_REG(hw, IXGBE_VFDCA_RXCTRL(reg_idx),
1722 IXGBE_DCA_RXCTRL_DESC_RRO_EN);
1723
1724 /* reset head and tail pointers */
1725 IXGBE_WRITE_REG(hw, IXGBE_VFRDH(reg_idx), 0);
1726 IXGBE_WRITE_REG(hw, IXGBE_VFRDT(reg_idx), 0);
dbf8b0d8 1727 ring->tail = adapter->io_addr + IXGBE_VFRDT(reg_idx);
de02decb
DS
1728
1729 /* reset ntu and ntc to place SW in sync with hardwdare */
1730 ring->next_to_clean = 0;
1731 ring->next_to_use = 0;
bad17234 1732 ring->next_to_alloc = 0;
de02decb
DS
1733
1734 ixgbevf_configure_srrctl(adapter, reg_idx);
1735
bad17234
ET
1736 /* allow any size packet since we can handle overflow */
1737 rxdctl &= ~IXGBE_RXDCTL_RLPML_EN;
1738
de02decb
DS
1739 rxdctl |= IXGBE_RXDCTL_ENABLE | IXGBE_RXDCTL_VME;
1740 IXGBE_WRITE_REG(hw, IXGBE_VFRXDCTL(reg_idx), rxdctl);
1741
1742 ixgbevf_rx_desc_queue_enable(adapter, ring);
095e2617 1743 ixgbevf_alloc_rx_buffers(ring, ixgbevf_desc_unused(ring));
de02decb
DS
1744}
1745
92915f71
GR
1746/**
1747 * ixgbevf_configure_rx - Configure 82599 VF Receive Unit after Reset
1748 * @adapter: board private structure
1749 *
1750 * Configure the Rx unit of the MAC after a reset.
1751 **/
1752static void ixgbevf_configure_rx(struct ixgbevf_adapter *adapter)
1753{
de02decb 1754 int i;
bad17234
ET
1755 struct ixgbe_hw *hw = &adapter->hw;
1756 struct net_device *netdev = adapter->netdev;
92915f71 1757
1bb9c639 1758 ixgbevf_setup_psrtype(adapter);
9295edb4
ET
1759 if (hw->mac.type >= ixgbe_mac_X550_vf)
1760 ixgbevf_setup_vfmrqc(adapter);
dd1fe113 1761
bad17234
ET
1762 /* notify the PF of our intent to use this size of frame */
1763 ixgbevf_rlpml_set_vf(hw, netdev->mtu + ETH_HLEN + ETH_FCS_LEN);
92915f71 1764
92915f71
GR
1765 /* Setup the HW Rx Head and Tail Descriptor Pointers and
1766 * the Base and Length of the Rx Descriptor Ring */
de02decb
DS
1767 for (i = 0; i < adapter->num_rx_queues; i++)
1768 ixgbevf_configure_rx_ring(adapter, adapter->rx_ring[i]);
92915f71
GR
1769}
1770
80d5c368
PM
1771static int ixgbevf_vlan_rx_add_vid(struct net_device *netdev,
1772 __be16 proto, u16 vid)
92915f71
GR
1773{
1774 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
1775 struct ixgbe_hw *hw = &adapter->hw;
2ddc7fe1
AD
1776 int err;
1777
55fdd45b 1778 spin_lock_bh(&adapter->mbx_lock);
1c55ed76 1779
92915f71 1780 /* add VID to filter table */
2ddc7fe1 1781 err = hw->mac.ops.set_vfta(hw, vid, 0, true);
1c55ed76 1782
55fdd45b 1783 spin_unlock_bh(&adapter->mbx_lock);
1c55ed76 1784
2ddc7fe1
AD
1785 /* translate error return types so error makes sense */
1786 if (err == IXGBE_ERR_MBX)
1787 return -EIO;
1788
1789 if (err == IXGBE_ERR_INVALID_ARGUMENT)
1790 return -EACCES;
1791
dadcd65f 1792 set_bit(vid, adapter->active_vlans);
8e586137 1793
2ddc7fe1 1794 return err;
92915f71
GR
1795}
1796
80d5c368
PM
1797static int ixgbevf_vlan_rx_kill_vid(struct net_device *netdev,
1798 __be16 proto, u16 vid)
92915f71
GR
1799{
1800 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
1801 struct ixgbe_hw *hw = &adapter->hw;
2ddc7fe1 1802 int err = -EOPNOTSUPP;
92915f71 1803
55fdd45b 1804 spin_lock_bh(&adapter->mbx_lock);
1c55ed76 1805
92915f71 1806 /* remove VID from filter table */
92fe0bf7 1807 err = hw->mac.ops.set_vfta(hw, vid, 0, false);
1c55ed76 1808
55fdd45b 1809 spin_unlock_bh(&adapter->mbx_lock);
1c55ed76 1810
dadcd65f 1811 clear_bit(vid, adapter->active_vlans);
8e586137 1812
2ddc7fe1 1813 return err;
92915f71
GR
1814}
1815
1816static void ixgbevf_restore_vlan(struct ixgbevf_adapter *adapter)
1817{
dadcd65f 1818 u16 vid;
92915f71 1819
dadcd65f 1820 for_each_set_bit(vid, adapter->active_vlans, VLAN_N_VID)
80d5c368
PM
1821 ixgbevf_vlan_rx_add_vid(adapter->netdev,
1822 htons(ETH_P_8021Q), vid);
92915f71
GR
1823}
1824
46ec20ff
GR
1825static int ixgbevf_write_uc_addr_list(struct net_device *netdev)
1826{
1827 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
1828 struct ixgbe_hw *hw = &adapter->hw;
1829 int count = 0;
1830
1831 if ((netdev_uc_count(netdev)) > 10) {
dbd9636e 1832 pr_err("Too many unicast filters - No Space\n");
46ec20ff
GR
1833 return -ENOSPC;
1834 }
1835
1836 if (!netdev_uc_empty(netdev)) {
1837 struct netdev_hw_addr *ha;
1838 netdev_for_each_uc_addr(ha, netdev) {
1839 hw->mac.ops.set_uc_addr(hw, ++count, ha->addr);
1840 udelay(200);
1841 }
1842 } else {
1843 /*
1844 * If the list is empty then send message to PF driver to
1845 * clear all macvlans on this VF.
1846 */
1847 hw->mac.ops.set_uc_addr(hw, 0, NULL);
1848 }
1849
1850 return count;
1851}
1852
92915f71 1853/**
dee847f5 1854 * ixgbevf_set_rx_mode - Multicast and unicast set
92915f71
GR
1855 * @netdev: network interface device structure
1856 *
1857 * The set_rx_method entry point is called whenever the multicast address
dee847f5
GR
1858 * list, unicast address list or the network interface flags are updated.
1859 * This routine is responsible for configuring the hardware for proper
1860 * multicast mode and configuring requested unicast filters.
92915f71
GR
1861 **/
1862static void ixgbevf_set_rx_mode(struct net_device *netdev)
1863{
1864 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
1865 struct ixgbe_hw *hw = &adapter->hw;
92915f71 1866
55fdd45b 1867 spin_lock_bh(&adapter->mbx_lock);
1c55ed76 1868
92915f71 1869 /* reprogram multicast list */
92fe0bf7 1870 hw->mac.ops.update_mc_addr_list(hw, netdev);
46ec20ff
GR
1871
1872 ixgbevf_write_uc_addr_list(netdev);
1c55ed76 1873
55fdd45b 1874 spin_unlock_bh(&adapter->mbx_lock);
92915f71
GR
1875}
1876
1877static void ixgbevf_napi_enable_all(struct ixgbevf_adapter *adapter)
1878{
1879 int q_idx;
1880 struct ixgbevf_q_vector *q_vector;
1881 int q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
1882
1883 for (q_idx = 0; q_idx < q_vectors; q_idx++) {
92915f71 1884 q_vector = adapter->q_vector[q_idx];
c777cdfa
JK
1885#ifdef CONFIG_NET_RX_BUSY_POLL
1886 ixgbevf_qv_init_lock(adapter->q_vector[q_idx]);
1887#endif
fa71ae27 1888 napi_enable(&q_vector->napi);
92915f71
GR
1889 }
1890}
1891
1892static void ixgbevf_napi_disable_all(struct ixgbevf_adapter *adapter)
1893{
1894 int q_idx;
1895 struct ixgbevf_q_vector *q_vector;
1896 int q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
1897
1898 for (q_idx = 0; q_idx < q_vectors; q_idx++) {
1899 q_vector = adapter->q_vector[q_idx];
92915f71 1900 napi_disable(&q_vector->napi);
c777cdfa
JK
1901#ifdef CONFIG_NET_RX_BUSY_POLL
1902 while (!ixgbevf_qv_disable(adapter->q_vector[q_idx])) {
1903 pr_info("QV %d locked\n", q_idx);
1904 usleep_range(1000, 20000);
1905 }
1906#endif /* CONFIG_NET_RX_BUSY_POLL */
92915f71
GR
1907 }
1908}
1909
220fe050
DS
1910static int ixgbevf_configure_dcb(struct ixgbevf_adapter *adapter)
1911{
1912 struct ixgbe_hw *hw = &adapter->hw;
1913 unsigned int def_q = 0;
1914 unsigned int num_tcs = 0;
2dc571aa
ET
1915 unsigned int num_rx_queues = adapter->num_rx_queues;
1916 unsigned int num_tx_queues = adapter->num_tx_queues;
220fe050
DS
1917 int err;
1918
1919 spin_lock_bh(&adapter->mbx_lock);
1920
1921 /* fetch queue configuration from the PF */
1922 err = ixgbevf_get_queues(hw, &num_tcs, &def_q);
1923
1924 spin_unlock_bh(&adapter->mbx_lock);
1925
1926 if (err)
1927 return err;
1928
1929 if (num_tcs > 1) {
2dc571aa
ET
1930 /* we need only one Tx queue */
1931 num_tx_queues = 1;
1932
220fe050 1933 /* update default Tx ring register index */
87e70ab9 1934 adapter->tx_ring[0]->reg_idx = def_q;
220fe050
DS
1935
1936 /* we need as many queues as traffic classes */
1937 num_rx_queues = num_tcs;
1938 }
1939
1940 /* if we have a bad config abort request queue reset */
2dc571aa
ET
1941 if ((adapter->num_rx_queues != num_rx_queues) ||
1942 (adapter->num_tx_queues != num_tx_queues)) {
220fe050
DS
1943 /* force mailbox timeout to prevent further messages */
1944 hw->mbx.timeout = 0;
1945
1946 /* wait for watchdog to come around and bail us out */
1947 adapter->flags |= IXGBEVF_FLAG_QUEUE_RESET_REQUESTED;
1948 }
1949
1950 return 0;
1951}
1952
92915f71
GR
1953static void ixgbevf_configure(struct ixgbevf_adapter *adapter)
1954{
220fe050
DS
1955 ixgbevf_configure_dcb(adapter);
1956
de02decb 1957 ixgbevf_set_rx_mode(adapter->netdev);
92915f71
GR
1958
1959 ixgbevf_restore_vlan(adapter);
1960
1961 ixgbevf_configure_tx(adapter);
1962 ixgbevf_configure_rx(adapter);
92915f71
GR
1963}
1964
33bd9f60
GR
1965static void ixgbevf_save_reset_stats(struct ixgbevf_adapter *adapter)
1966{
1967 /* Only save pre-reset stats if there are some */
1968 if (adapter->stats.vfgprc || adapter->stats.vfgptc) {
1969 adapter->stats.saved_reset_vfgprc += adapter->stats.vfgprc -
1970 adapter->stats.base_vfgprc;
1971 adapter->stats.saved_reset_vfgptc += adapter->stats.vfgptc -
1972 adapter->stats.base_vfgptc;
1973 adapter->stats.saved_reset_vfgorc += adapter->stats.vfgorc -
1974 adapter->stats.base_vfgorc;
1975 adapter->stats.saved_reset_vfgotc += adapter->stats.vfgotc -
1976 adapter->stats.base_vfgotc;
1977 adapter->stats.saved_reset_vfmprc += adapter->stats.vfmprc -
1978 adapter->stats.base_vfmprc;
1979 }
1980}
1981
1982static void ixgbevf_init_last_counter_stats(struct ixgbevf_adapter *adapter)
1983{
1984 struct ixgbe_hw *hw = &adapter->hw;
1985
1986 adapter->stats.last_vfgprc = IXGBE_READ_REG(hw, IXGBE_VFGPRC);
1987 adapter->stats.last_vfgorc = IXGBE_READ_REG(hw, IXGBE_VFGORC_LSB);
1988 adapter->stats.last_vfgorc |=
1989 (((u64)(IXGBE_READ_REG(hw, IXGBE_VFGORC_MSB))) << 32);
1990 adapter->stats.last_vfgptc = IXGBE_READ_REG(hw, IXGBE_VFGPTC);
1991 adapter->stats.last_vfgotc = IXGBE_READ_REG(hw, IXGBE_VFGOTC_LSB);
1992 adapter->stats.last_vfgotc |=
1993 (((u64)(IXGBE_READ_REG(hw, IXGBE_VFGOTC_MSB))) << 32);
1994 adapter->stats.last_vfmprc = IXGBE_READ_REG(hw, IXGBE_VFMPRC);
1995
1996 adapter->stats.base_vfgprc = adapter->stats.last_vfgprc;
1997 adapter->stats.base_vfgorc = adapter->stats.last_vfgorc;
1998 adapter->stats.base_vfgptc = adapter->stats.last_vfgptc;
1999 adapter->stats.base_vfgotc = adapter->stats.last_vfgotc;
2000 adapter->stats.base_vfmprc = adapter->stats.last_vfmprc;
2001}
2002
31186785
AD
2003static void ixgbevf_negotiate_api(struct ixgbevf_adapter *adapter)
2004{
2005 struct ixgbe_hw *hw = &adapter->hw;
56e94095
AD
2006 int api[] = { ixgbe_mbox_api_11,
2007 ixgbe_mbox_api_10,
31186785
AD
2008 ixgbe_mbox_api_unknown };
2009 int err = 0, idx = 0;
2010
55fdd45b 2011 spin_lock_bh(&adapter->mbx_lock);
31186785
AD
2012
2013 while (api[idx] != ixgbe_mbox_api_unknown) {
2014 err = ixgbevf_negotiate_api_version(hw, api[idx]);
2015 if (!err)
2016 break;
2017 idx++;
2018 }
2019
55fdd45b 2020 spin_unlock_bh(&adapter->mbx_lock);
31186785
AD
2021}
2022
795180d8 2023static void ixgbevf_up_complete(struct ixgbevf_adapter *adapter)
92915f71
GR
2024{
2025 struct net_device *netdev = adapter->netdev;
2026 struct ixgbe_hw *hw = &adapter->hw;
92915f71
GR
2027
2028 ixgbevf_configure_msix(adapter);
2029
55fdd45b 2030 spin_lock_bh(&adapter->mbx_lock);
1c55ed76 2031
92fe0bf7
GR
2032 if (is_valid_ether_addr(hw->mac.addr))
2033 hw->mac.ops.set_rar(hw, 0, hw->mac.addr, 0);
2034 else
2035 hw->mac.ops.set_rar(hw, 0, hw->mac.perm_addr, 0);
92915f71 2036
55fdd45b 2037 spin_unlock_bh(&adapter->mbx_lock);
1c55ed76 2038
4e857c58 2039 smp_mb__before_atomic();
92915f71
GR
2040 clear_bit(__IXGBEVF_DOWN, &adapter->state);
2041 ixgbevf_napi_enable_all(adapter);
2042
d9bdb57f
ET
2043 /* clear any pending interrupts, may auto mask */
2044 IXGBE_READ_REG(hw, IXGBE_VTEICR);
2045 ixgbevf_irq_enable(adapter);
2046
92915f71
GR
2047 /* enable transmits */
2048 netif_tx_start_all_queues(netdev);
2049
33bd9f60
GR
2050 ixgbevf_save_reset_stats(adapter);
2051 ixgbevf_init_last_counter_stats(adapter);
2052
4b2cd27f 2053 hw->mac.get_link_status = 1;
92915f71 2054 mod_timer(&adapter->watchdog_timer, jiffies);
92915f71
GR
2055}
2056
795180d8 2057void ixgbevf_up(struct ixgbevf_adapter *adapter)
92915f71 2058{
92915f71
GR
2059 ixgbevf_configure(adapter);
2060
795180d8 2061 ixgbevf_up_complete(adapter);
92915f71
GR
2062}
2063
2064/**
2065 * ixgbevf_clean_rx_ring - Free Rx Buffers per Queue
92915f71
GR
2066 * @rx_ring: ring to free buffers from
2067 **/
05d063aa 2068static void ixgbevf_clean_rx_ring(struct ixgbevf_ring *rx_ring)
92915f71 2069{
bad17234 2070 struct device *dev = rx_ring->dev;
92915f71
GR
2071 unsigned long size;
2072 unsigned int i;
2073
bad17234
ET
2074 /* Free Rx ring sk_buff */
2075 if (rx_ring->skb) {
2076 dev_kfree_skb(rx_ring->skb);
2077 rx_ring->skb = NULL;
2078 }
2079
2080 /* ring already cleared, nothing to do */
c0456c23
GR
2081 if (!rx_ring->rx_buffer_info)
2082 return;
92915f71 2083
bad17234 2084 /* Free all the Rx ring pages */
92915f71 2085 for (i = 0; i < rx_ring->count; i++) {
bad17234 2086 struct ixgbevf_rx_buffer *rx_buffer;
92915f71 2087
bad17234
ET
2088 rx_buffer = &rx_ring->rx_buffer_info[i];
2089 if (rx_buffer->dma)
2090 dma_unmap_page(dev, rx_buffer->dma,
2091 PAGE_SIZE, DMA_FROM_DEVICE);
2092 rx_buffer->dma = 0;
2093 if (rx_buffer->page)
2094 __free_page(rx_buffer->page);
2095 rx_buffer->page = NULL;
92915f71
GR
2096 }
2097
2098 size = sizeof(struct ixgbevf_rx_buffer) * rx_ring->count;
2099 memset(rx_ring->rx_buffer_info, 0, size);
2100
2101 /* Zero out the descriptor ring */
2102 memset(rx_ring->desc, 0, rx_ring->size);
92915f71
GR
2103}
2104
2105/**
2106 * ixgbevf_clean_tx_ring - Free Tx Buffers
92915f71
GR
2107 * @tx_ring: ring to be cleaned
2108 **/
05d063aa 2109static void ixgbevf_clean_tx_ring(struct ixgbevf_ring *tx_ring)
92915f71
GR
2110{
2111 struct ixgbevf_tx_buffer *tx_buffer_info;
2112 unsigned long size;
2113 unsigned int i;
2114
c0456c23
GR
2115 if (!tx_ring->tx_buffer_info)
2116 return;
2117
92915f71 2118 /* Free all the Tx ring sk_buffs */
92915f71
GR
2119 for (i = 0; i < tx_ring->count; i++) {
2120 tx_buffer_info = &tx_ring->tx_buffer_info[i];
70a10e25 2121 ixgbevf_unmap_and_free_tx_resource(tx_ring, tx_buffer_info);
92915f71
GR
2122 }
2123
2124 size = sizeof(struct ixgbevf_tx_buffer) * tx_ring->count;
2125 memset(tx_ring->tx_buffer_info, 0, size);
2126
2127 memset(tx_ring->desc, 0, tx_ring->size);
92915f71
GR
2128}
2129
2130/**
2131 * ixgbevf_clean_all_rx_rings - Free Rx Buffers for all queues
2132 * @adapter: board private structure
2133 **/
2134static void ixgbevf_clean_all_rx_rings(struct ixgbevf_adapter *adapter)
2135{
2136 int i;
2137
2138 for (i = 0; i < adapter->num_rx_queues; i++)
05d063aa 2139 ixgbevf_clean_rx_ring(adapter->rx_ring[i]);
92915f71
GR
2140}
2141
2142/**
2143 * ixgbevf_clean_all_tx_rings - Free Tx Buffers for all queues
2144 * @adapter: board private structure
2145 **/
2146static void ixgbevf_clean_all_tx_rings(struct ixgbevf_adapter *adapter)
2147{
2148 int i;
2149
2150 for (i = 0; i < adapter->num_tx_queues; i++)
05d063aa 2151 ixgbevf_clean_tx_ring(adapter->tx_ring[i]);
92915f71
GR
2152}
2153
2154void ixgbevf_down(struct ixgbevf_adapter *adapter)
2155{
2156 struct net_device *netdev = adapter->netdev;
2157 struct ixgbe_hw *hw = &adapter->hw;
de02decb 2158 int i;
92915f71
GR
2159
2160 /* signal that we are down to the interrupt handler */
5b346dc9
MR
2161 if (test_and_set_bit(__IXGBEVF_DOWN, &adapter->state))
2162 return; /* do nothing if already down */
858c3dda
DS
2163
2164 /* disable all enabled rx queues */
2165 for (i = 0; i < adapter->num_rx_queues; i++)
87e70ab9 2166 ixgbevf_disable_rx_queue(adapter, adapter->rx_ring[i]);
92915f71 2167
d9bdb57f 2168 usleep_range(10000, 20000);
92915f71
GR
2169
2170 netif_tx_stop_all_queues(netdev);
2171
d9bdb57f
ET
2172 /* call carrier off first to avoid false dev_watchdog timeouts */
2173 netif_carrier_off(netdev);
2174 netif_tx_disable(netdev);
2175
92915f71
GR
2176 ixgbevf_irq_disable(adapter);
2177
2178 ixgbevf_napi_disable_all(adapter);
2179
2180 del_timer_sync(&adapter->watchdog_timer);
d9bdb57f 2181
92915f71
GR
2182 /* can't call flush scheduled work here because it can deadlock
2183 * if linkwatch_event tries to acquire the rtnl_lock which we are
2184 * holding */
2185 while (adapter->flags & IXGBE_FLAG_IN_WATCHDOG_TASK)
2186 msleep(1);
2187
2188 /* disable transmits in the hardware now that interrupts are off */
2189 for (i = 0; i < adapter->num_tx_queues; i++) {
de02decb
DS
2190 u8 reg_idx = adapter->tx_ring[i]->reg_idx;
2191
2192 IXGBE_WRITE_REG(hw, IXGBE_VFTXDCTL(reg_idx),
2193 IXGBE_TXDCTL_SWFLSH);
92915f71
GR
2194 }
2195
92915f71
GR
2196 if (!pci_channel_offline(adapter->pdev))
2197 ixgbevf_reset(adapter);
2198
2199 ixgbevf_clean_all_tx_rings(adapter);
2200 ixgbevf_clean_all_rx_rings(adapter);
2201}
2202
2203void ixgbevf_reinit_locked(struct ixgbevf_adapter *adapter)
2204{
2205 WARN_ON(in_interrupt());
c0456c23 2206
92915f71
GR
2207 while (test_and_set_bit(__IXGBEVF_RESETTING, &adapter->state))
2208 msleep(1);
2209
4b2cd27f
AD
2210 ixgbevf_down(adapter);
2211 ixgbevf_up(adapter);
92915f71
GR
2212
2213 clear_bit(__IXGBEVF_RESETTING, &adapter->state);
2214}
2215
2216void ixgbevf_reset(struct ixgbevf_adapter *adapter)
2217{
2218 struct ixgbe_hw *hw = &adapter->hw;
2219 struct net_device *netdev = adapter->netdev;
2220
798e381a 2221 if (hw->mac.ops.reset_hw(hw)) {
92915f71 2222 hw_dbg(hw, "PF still resetting\n");
798e381a 2223 } else {
92915f71 2224 hw->mac.ops.init_hw(hw);
798e381a
DS
2225 ixgbevf_negotiate_api(adapter);
2226 }
92915f71
GR
2227
2228 if (is_valid_ether_addr(adapter->hw.mac.addr)) {
2229 memcpy(netdev->dev_addr, adapter->hw.mac.addr,
2230 netdev->addr_len);
2231 memcpy(netdev->perm_addr, adapter->hw.mac.addr,
2232 netdev->addr_len);
2233 }
e66c92ad
ET
2234
2235 adapter->last_reset = jiffies;
92915f71
GR
2236}
2237
e45dd5fe
JK
2238static int ixgbevf_acquire_msix_vectors(struct ixgbevf_adapter *adapter,
2239 int vectors)
92915f71 2240{
a5f9337b 2241 int vector_threshold;
92915f71 2242
fa71ae27
AD
2243 /* We'll want at least 2 (vector_threshold):
2244 * 1) TxQ[0] + RxQ[0] handler
2245 * 2) Other (Link Status Change, etc.)
92915f71
GR
2246 */
2247 vector_threshold = MIN_MSIX_COUNT;
2248
2249 /* The more we get, the more we will assign to Tx/Rx Cleanup
2250 * for the separate queues...where Rx Cleanup >= Tx Cleanup.
2251 * Right now, we simply care about how many we'll get; we'll
2252 * set them up later while requesting irq's.
2253 */
5c1e3588
AG
2254 vectors = pci_enable_msix_range(adapter->pdev, adapter->msix_entries,
2255 vector_threshold, vectors);
92915f71 2256
5c1e3588 2257 if (vectors < 0) {
e45dd5fe
JK
2258 dev_err(&adapter->pdev->dev,
2259 "Unable to allocate MSI-X interrupts\n");
92915f71
GR
2260 kfree(adapter->msix_entries);
2261 adapter->msix_entries = NULL;
5c1e3588 2262 return vectors;
92915f71 2263 }
dee847f5 2264
5c1e3588
AG
2265 /* Adjust for only the vectors we'll use, which is minimum
2266 * of max_msix_q_vectors + NON_Q_VECTORS, or the number of
2267 * vectors we were allocated.
2268 */
2269 adapter->num_msix_vectors = vectors;
2270
2271 return 0;
92915f71
GR
2272}
2273
49ce9c2c
BH
2274/**
2275 * ixgbevf_set_num_queues - Allocate queues for device, feature dependent
92915f71
GR
2276 * @adapter: board private structure to initialize
2277 *
2278 * This is the top level queue allocation routine. The order here is very
2279 * important, starting with the "most" number of features turned on at once,
2280 * and ending with the smallest set of features. This way large combinations
2281 * can be allocated if they're turned on, and smaller combinations are the
2282 * fallthrough conditions.
2283 *
2284 **/
2285static void ixgbevf_set_num_queues(struct ixgbevf_adapter *adapter)
2286{
220fe050
DS
2287 struct ixgbe_hw *hw = &adapter->hw;
2288 unsigned int def_q = 0;
2289 unsigned int num_tcs = 0;
2290 int err;
2291
92915f71
GR
2292 /* Start with base case */
2293 adapter->num_rx_queues = 1;
2294 adapter->num_tx_queues = 1;
220fe050
DS
2295
2296 spin_lock_bh(&adapter->mbx_lock);
2297
2298 /* fetch queue configuration from the PF */
2299 err = ixgbevf_get_queues(hw, &num_tcs, &def_q);
2300
2301 spin_unlock_bh(&adapter->mbx_lock);
2302
2303 if (err)
2304 return;
2305
2306 /* we need as many queues as traffic classes */
2dc571aa 2307 if (num_tcs > 1) {
220fe050 2308 adapter->num_rx_queues = num_tcs;
2dc571aa
ET
2309 } else {
2310 u16 rss = min_t(u16, num_online_cpus(), IXGBEVF_MAX_RSS_QUEUES);
2311
2312 switch (hw->api_version) {
2313 case ixgbe_mbox_api_11:
2314 adapter->num_rx_queues = rss;
2315 adapter->num_tx_queues = rss;
2316 default:
2317 break;
2318 }
2319 }
92915f71
GR
2320}
2321
2322/**
2323 * ixgbevf_alloc_queues - Allocate memory for all rings
2324 * @adapter: board private structure to initialize
2325 *
2326 * We allocate one ring per queue at run-time since we don't know the
2327 * number of queues at compile-time. The polling_netdev array is
2328 * intended for Multiqueue, but should work fine with a single queue.
2329 **/
2330static int ixgbevf_alloc_queues(struct ixgbevf_adapter *adapter)
2331{
87e70ab9
DS
2332 struct ixgbevf_ring *ring;
2333 int rx = 0, tx = 0;
92915f71 2334
87e70ab9
DS
2335 for (; tx < adapter->num_tx_queues; tx++) {
2336 ring = kzalloc(sizeof(*ring), GFP_KERNEL);
2337 if (!ring)
2338 goto err_allocation;
92915f71 2339
87e70ab9
DS
2340 ring->dev = &adapter->pdev->dev;
2341 ring->netdev = adapter->netdev;
2342 ring->count = adapter->tx_ring_count;
2343 ring->queue_index = tx;
2344 ring->reg_idx = tx;
92915f71 2345
87e70ab9 2346 adapter->tx_ring[tx] = ring;
92915f71
GR
2347 }
2348
87e70ab9
DS
2349 for (; rx < adapter->num_rx_queues; rx++) {
2350 ring = kzalloc(sizeof(*ring), GFP_KERNEL);
2351 if (!ring)
2352 goto err_allocation;
2353
2354 ring->dev = &adapter->pdev->dev;
2355 ring->netdev = adapter->netdev;
2356
2357 ring->count = adapter->rx_ring_count;
2358 ring->queue_index = rx;
2359 ring->reg_idx = rx;
2360
2361 adapter->rx_ring[rx] = ring;
92915f71
GR
2362 }
2363
2364 return 0;
2365
87e70ab9
DS
2366err_allocation:
2367 while (tx) {
2368 kfree(adapter->tx_ring[--tx]);
2369 adapter->tx_ring[tx] = NULL;
2370 }
2371
2372 while (rx) {
2373 kfree(adapter->rx_ring[--rx]);
2374 adapter->rx_ring[rx] = NULL;
2375 }
92915f71
GR
2376 return -ENOMEM;
2377}
2378
2379/**
2380 * ixgbevf_set_interrupt_capability - set MSI-X or FAIL if not supported
2381 * @adapter: board private structure to initialize
2382 *
2383 * Attempt to configure the interrupts using the best available
2384 * capabilities of the hardware and the kernel.
2385 **/
2386static int ixgbevf_set_interrupt_capability(struct ixgbevf_adapter *adapter)
2387{
91e2b89b 2388 struct net_device *netdev = adapter->netdev;
92915f71
GR
2389 int err = 0;
2390 int vector, v_budget;
2391
2392 /*
2393 * It's easy to be greedy for MSI-X vectors, but it really
2394 * doesn't do us much good if we have a lot more vectors
2395 * than CPU's. So let's be conservative and only ask for
fa71ae27
AD
2396 * (roughly) the same number of vectors as there are CPU's.
2397 * The default is to use pairs of vectors.
92915f71 2398 */
fa71ae27
AD
2399 v_budget = max(adapter->num_rx_queues, adapter->num_tx_queues);
2400 v_budget = min_t(int, v_budget, num_online_cpus());
2401 v_budget += NON_Q_VECTORS;
92915f71
GR
2402
2403 /* A failure in MSI-X entry allocation isn't fatal, but it does
2404 * mean we disable MSI-X capabilities of the adapter. */
2405 adapter->msix_entries = kcalloc(v_budget,
2406 sizeof(struct msix_entry), GFP_KERNEL);
2407 if (!adapter->msix_entries) {
2408 err = -ENOMEM;
2409 goto out;
2410 }
2411
2412 for (vector = 0; vector < v_budget; vector++)
2413 adapter->msix_entries[vector].entry = vector;
2414
e45dd5fe
JK
2415 err = ixgbevf_acquire_msix_vectors(adapter, v_budget);
2416 if (err)
2417 goto out;
92915f71 2418
91e2b89b
GR
2419 err = netif_set_real_num_tx_queues(netdev, adapter->num_tx_queues);
2420 if (err)
2421 goto out;
2422
2423 err = netif_set_real_num_rx_queues(netdev, adapter->num_rx_queues);
2424
92915f71
GR
2425out:
2426 return err;
2427}
2428
2429/**
2430 * ixgbevf_alloc_q_vectors - Allocate memory for interrupt vectors
2431 * @adapter: board private structure to initialize
2432 *
2433 * We allocate one q_vector per queue interrupt. If allocation fails we
2434 * return -ENOMEM.
2435 **/
2436static int ixgbevf_alloc_q_vectors(struct ixgbevf_adapter *adapter)
2437{
2438 int q_idx, num_q_vectors;
2439 struct ixgbevf_q_vector *q_vector;
92915f71
GR
2440
2441 num_q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
92915f71
GR
2442
2443 for (q_idx = 0; q_idx < num_q_vectors; q_idx++) {
2444 q_vector = kzalloc(sizeof(struct ixgbevf_q_vector), GFP_KERNEL);
2445 if (!q_vector)
2446 goto err_out;
2447 q_vector->adapter = adapter;
2448 q_vector->v_idx = q_idx;
fa71ae27
AD
2449 netif_napi_add(adapter->netdev, &q_vector->napi,
2450 ixgbevf_poll, 64);
c777cdfa
JK
2451#ifdef CONFIG_NET_RX_BUSY_POLL
2452 napi_hash_add(&q_vector->napi);
2453#endif
92915f71
GR
2454 adapter->q_vector[q_idx] = q_vector;
2455 }
2456
2457 return 0;
2458
2459err_out:
2460 while (q_idx) {
2461 q_idx--;
2462 q_vector = adapter->q_vector[q_idx];
c777cdfa
JK
2463#ifdef CONFIG_NET_RX_BUSY_POLL
2464 napi_hash_del(&q_vector->napi);
2465#endif
92915f71
GR
2466 netif_napi_del(&q_vector->napi);
2467 kfree(q_vector);
2468 adapter->q_vector[q_idx] = NULL;
2469 }
2470 return -ENOMEM;
2471}
2472
2473/**
2474 * ixgbevf_free_q_vectors - Free memory allocated for interrupt vectors
2475 * @adapter: board private structure to initialize
2476 *
2477 * This function frees the memory allocated to the q_vectors. In addition if
2478 * NAPI is enabled it will delete any references to the NAPI struct prior
2479 * to freeing the q_vector.
2480 **/
2481static void ixgbevf_free_q_vectors(struct ixgbevf_adapter *adapter)
2482{
f4477702 2483 int q_idx, num_q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
92915f71
GR
2484
2485 for (q_idx = 0; q_idx < num_q_vectors; q_idx++) {
2486 struct ixgbevf_q_vector *q_vector = adapter->q_vector[q_idx];
2487
2488 adapter->q_vector[q_idx] = NULL;
c777cdfa
JK
2489#ifdef CONFIG_NET_RX_BUSY_POLL
2490 napi_hash_del(&q_vector->napi);
2491#endif
f4477702 2492 netif_napi_del(&q_vector->napi);
92915f71
GR
2493 kfree(q_vector);
2494 }
2495}
2496
2497/**
2498 * ixgbevf_reset_interrupt_capability - Reset MSIX setup
2499 * @adapter: board private structure
2500 *
2501 **/
2502static void ixgbevf_reset_interrupt_capability(struct ixgbevf_adapter *adapter)
2503{
2504 pci_disable_msix(adapter->pdev);
2505 kfree(adapter->msix_entries);
2506 adapter->msix_entries = NULL;
92915f71
GR
2507}
2508
2509/**
2510 * ixgbevf_init_interrupt_scheme - Determine if MSIX is supported and init
2511 * @adapter: board private structure to initialize
2512 *
2513 **/
2514static int ixgbevf_init_interrupt_scheme(struct ixgbevf_adapter *adapter)
2515{
2516 int err;
2517
2518 /* Number of supported queues */
2519 ixgbevf_set_num_queues(adapter);
2520
2521 err = ixgbevf_set_interrupt_capability(adapter);
2522 if (err) {
2523 hw_dbg(&adapter->hw,
2524 "Unable to setup interrupt capabilities\n");
2525 goto err_set_interrupt;
2526 }
2527
2528 err = ixgbevf_alloc_q_vectors(adapter);
2529 if (err) {
2530 hw_dbg(&adapter->hw, "Unable to allocate memory for queue "
2531 "vectors\n");
2532 goto err_alloc_q_vectors;
2533 }
2534
2535 err = ixgbevf_alloc_queues(adapter);
2536 if (err) {
dbd9636e 2537 pr_err("Unable to allocate memory for queues\n");
92915f71
GR
2538 goto err_alloc_queues;
2539 }
2540
2541 hw_dbg(&adapter->hw, "Multiqueue %s: Rx Queue count = %u, "
2542 "Tx Queue count = %u\n",
2543 (adapter->num_rx_queues > 1) ? "Enabled" :
2544 "Disabled", adapter->num_rx_queues, adapter->num_tx_queues);
2545
2546 set_bit(__IXGBEVF_DOWN, &adapter->state);
2547
2548 return 0;
2549err_alloc_queues:
2550 ixgbevf_free_q_vectors(adapter);
2551err_alloc_q_vectors:
2552 ixgbevf_reset_interrupt_capability(adapter);
2553err_set_interrupt:
2554 return err;
2555}
2556
0ac1e8ce
AD
2557/**
2558 * ixgbevf_clear_interrupt_scheme - Clear the current interrupt scheme settings
2559 * @adapter: board private structure to clear interrupt scheme on
2560 *
2561 * We go through and clear interrupt specific resources and reset the structure
2562 * to pre-load conditions
2563 **/
2564static void ixgbevf_clear_interrupt_scheme(struct ixgbevf_adapter *adapter)
2565{
87e70ab9
DS
2566 int i;
2567
2568 for (i = 0; i < adapter->num_tx_queues; i++) {
2569 kfree(adapter->tx_ring[i]);
2570 adapter->tx_ring[i] = NULL;
2571 }
2572 for (i = 0; i < adapter->num_rx_queues; i++) {
2573 kfree(adapter->rx_ring[i]);
2574 adapter->rx_ring[i] = NULL;
2575 }
2576
0ac1e8ce
AD
2577 adapter->num_tx_queues = 0;
2578 adapter->num_rx_queues = 0;
2579
2580 ixgbevf_free_q_vectors(adapter);
2581 ixgbevf_reset_interrupt_capability(adapter);
2582}
2583
92915f71
GR
2584/**
2585 * ixgbevf_sw_init - Initialize general software structures
2586 * (struct ixgbevf_adapter)
2587 * @adapter: board private structure to initialize
2588 *
2589 * ixgbevf_sw_init initializes the Adapter private data structure.
2590 * Fields are initialized based on PCI device information and
2591 * OS network device settings (MTU size).
2592 **/
9f9a12f8 2593static int ixgbevf_sw_init(struct ixgbevf_adapter *adapter)
92915f71
GR
2594{
2595 struct ixgbe_hw *hw = &adapter->hw;
2596 struct pci_dev *pdev = adapter->pdev;
e1941a74 2597 struct net_device *netdev = adapter->netdev;
92915f71
GR
2598 int err;
2599
2600 /* PCI config space info */
2601
2602 hw->vendor_id = pdev->vendor;
2603 hw->device_id = pdev->device;
ff938e43 2604 hw->revision_id = pdev->revision;
92915f71
GR
2605 hw->subsystem_vendor_id = pdev->subsystem_vendor;
2606 hw->subsystem_device_id = pdev->subsystem_device;
2607
2608 hw->mbx.ops.init_params(hw);
56e94095
AD
2609
2610 /* assume legacy case in which PF would only give VF 2 queues */
2611 hw->mac.max_tx_queues = 2;
2612 hw->mac.max_rx_queues = 2;
2613
798e381a
DS
2614 /* lock to protect mailbox accesses */
2615 spin_lock_init(&adapter->mbx_lock);
2616
92915f71
GR
2617 err = hw->mac.ops.reset_hw(hw);
2618 if (err) {
2619 dev_info(&pdev->dev,
e1941a74 2620 "PF still in reset state. Is the PF interface up?\n");
92915f71
GR
2621 } else {
2622 err = hw->mac.ops.init_hw(hw);
2623 if (err) {
dbd9636e 2624 pr_err("init_shared_code failed: %d\n", err);
92915f71
GR
2625 goto out;
2626 }
798e381a 2627 ixgbevf_negotiate_api(adapter);
e1941a74
GR
2628 err = hw->mac.ops.get_mac_addr(hw, hw->mac.addr);
2629 if (err)
2630 dev_info(&pdev->dev, "Error reading MAC address\n");
2631 else if (is_zero_ether_addr(adapter->hw.mac.addr))
2632 dev_info(&pdev->dev,
2633 "MAC address not assigned by administrator.\n");
2634 memcpy(netdev->dev_addr, hw->mac.addr, netdev->addr_len);
2635 }
2636
2637 if (!is_valid_ether_addr(netdev->dev_addr)) {
2638 dev_info(&pdev->dev, "Assigning random MAC address\n");
2639 eth_hw_addr_random(netdev);
2640 memcpy(hw->mac.addr, netdev->dev_addr, netdev->addr_len);
92915f71
GR
2641 }
2642
2643 /* Enable dynamic interrupt throttling rates */
5f3600eb
AD
2644 adapter->rx_itr_setting = 1;
2645 adapter->tx_itr_setting = 1;
92915f71 2646
92915f71
GR
2647 /* set default ring sizes */
2648 adapter->tx_ring_count = IXGBEVF_DEFAULT_TXD;
2649 adapter->rx_ring_count = IXGBEVF_DEFAULT_RXD;
2650
92915f71 2651 set_bit(__IXGBEVF_DOWN, &adapter->state);
1a0d6ae5 2652 return 0;
92915f71
GR
2653
2654out:
2655 return err;
2656}
2657
92915f71
GR
2658#define UPDATE_VF_COUNTER_32bit(reg, last_counter, counter) \
2659 { \
2660 u32 current_counter = IXGBE_READ_REG(hw, reg); \
2661 if (current_counter < last_counter) \
2662 counter += 0x100000000LL; \
2663 last_counter = current_counter; \
2664 counter &= 0xFFFFFFFF00000000LL; \
2665 counter |= current_counter; \
2666 }
2667
2668#define UPDATE_VF_COUNTER_36bit(reg_lsb, reg_msb, last_counter, counter) \
2669 { \
2670 u64 current_counter_lsb = IXGBE_READ_REG(hw, reg_lsb); \
2671 u64 current_counter_msb = IXGBE_READ_REG(hw, reg_msb); \
2672 u64 current_counter = (current_counter_msb << 32) | \
2673 current_counter_lsb; \
2674 if (current_counter < last_counter) \
2675 counter += 0x1000000000LL; \
2676 last_counter = current_counter; \
2677 counter &= 0xFFFFFFF000000000LL; \
2678 counter |= current_counter; \
2679 }
2680/**
2681 * ixgbevf_update_stats - Update the board statistics counters.
2682 * @adapter: board private structure
2683 **/
2684void ixgbevf_update_stats(struct ixgbevf_adapter *adapter)
2685{
2686 struct ixgbe_hw *hw = &adapter->hw;
55fb277c 2687 int i;
92915f71 2688
e66c92ad
ET
2689 if (test_bit(__IXGBEVF_DOWN, &adapter->state) ||
2690 test_bit(__IXGBEVF_RESETTING, &adapter->state))
088245a3
GR
2691 return;
2692
92915f71
GR
2693 UPDATE_VF_COUNTER_32bit(IXGBE_VFGPRC, adapter->stats.last_vfgprc,
2694 adapter->stats.vfgprc);
2695 UPDATE_VF_COUNTER_32bit(IXGBE_VFGPTC, adapter->stats.last_vfgptc,
2696 adapter->stats.vfgptc);
2697 UPDATE_VF_COUNTER_36bit(IXGBE_VFGORC_LSB, IXGBE_VFGORC_MSB,
2698 adapter->stats.last_vfgorc,
2699 adapter->stats.vfgorc);
2700 UPDATE_VF_COUNTER_36bit(IXGBE_VFGOTC_LSB, IXGBE_VFGOTC_MSB,
2701 adapter->stats.last_vfgotc,
2702 adapter->stats.vfgotc);
2703 UPDATE_VF_COUNTER_32bit(IXGBE_VFMPRC, adapter->stats.last_vfmprc,
2704 adapter->stats.vfmprc);
55fb277c
GR
2705
2706 for (i = 0; i < adapter->num_rx_queues; i++) {
2707 adapter->hw_csum_rx_error +=
87e70ab9 2708 adapter->rx_ring[i]->hw_csum_rx_error;
87e70ab9 2709 adapter->rx_ring[i]->hw_csum_rx_error = 0;
55fb277c 2710 }
92915f71
GR
2711}
2712
2713/**
2714 * ixgbevf_watchdog - Timer Call-back
2715 * @data: pointer to adapter cast into an unsigned long
2716 **/
2717static void ixgbevf_watchdog(unsigned long data)
2718{
2719 struct ixgbevf_adapter *adapter = (struct ixgbevf_adapter *)data;
e66c92ad
ET
2720
2721 /* Do the reset outside of interrupt context */
2722 schedule_work(&adapter->watchdog_task);
2723}
2724
2725static void ixgbevf_reset_task(struct work_struct *work)
2726{
2727 struct ixgbevf_adapter *adapter;
2728
2729 adapter = container_of(work, struct ixgbevf_adapter, reset_task);
2730
2731 /* If we're already down or resetting, just bail */
2732 if (test_bit(__IXGBEVF_DOWN, &adapter->state) ||
2733 test_bit(__IXGBEVF_RESETTING, &adapter->state))
2734 return;
2735
2736 adapter->tx_timeout_count++;
2737
2738 ixgbevf_reinit_locked(adapter);
2739}
2740
2741/* ixgbevf_check_hang_subtask - check for hung queues and dropped interrupts
2742 * @adapter - pointer to the device adapter structure
2743 *
2744 * This function serves two purposes. First it strobes the interrupt lines
2745 * in order to make certain interrupts are occurring. Secondly it sets the
2746 * bits needed to check for TX hangs. As a result we should immediately
2747 * determine if a hang has occurred.
2748 */
2749static void ixgbevf_check_hang_subtask(struct ixgbevf_adapter *adapter)
2750{
92915f71 2751 struct ixgbe_hw *hw = &adapter->hw;
5f3600eb 2752 u32 eics = 0;
92915f71
GR
2753 int i;
2754
e66c92ad
ET
2755 /* If we're down or resetting, just bail */
2756 if (test_bit(__IXGBEVF_DOWN, &adapter->state) ||
2757 test_bit(__IXGBEVF_RESETTING, &adapter->state))
2758 return;
92915f71 2759
e08400b7
ET
2760 /* Force detection of hung controller */
2761 if (netif_carrier_ok(adapter->netdev)) {
2762 for (i = 0; i < adapter->num_tx_queues; i++)
2763 set_check_for_tx_hang(adapter->tx_ring[i]);
2764 }
2765
92915f71
GR
2766 /* get one bit for every active tx/rx interrupt vector */
2767 for (i = 0; i < adapter->num_msix_vectors - NON_Q_VECTORS; i++) {
2768 struct ixgbevf_q_vector *qv = adapter->q_vector[i];
6b43c446 2769 if (qv->rx.ring || qv->tx.ring)
5f3600eb 2770 eics |= 1 << i;
92915f71
GR
2771 }
2772
e66c92ad 2773 /* Cause software interrupt to ensure rings are cleaned */
5f3600eb 2774 IXGBE_WRITE_REG(hw, IXGBE_VTEICS, eics);
e66c92ad 2775}
92915f71 2776
e66c92ad
ET
2777/**
2778 * ixgbevf_watchdog_update_link - update the link status
2779 * @adapter - pointer to the device adapter structure
2780 **/
2781static void ixgbevf_watchdog_update_link(struct ixgbevf_adapter *adapter)
2782{
2783 struct ixgbe_hw *hw = &adapter->hw;
2784 u32 link_speed = adapter->link_speed;
2785 bool link_up = adapter->link_up;
2786 s32 err;
2787
2788 spin_lock_bh(&adapter->mbx_lock);
2789
2790 err = hw->mac.ops.check_link(hw, &link_speed, &link_up, false);
2791
2792 spin_unlock_bh(&adapter->mbx_lock);
2793
2794 /* if check for link returns error we will need to reset */
2795 if (err && time_after(jiffies, adapter->last_reset + (10 * HZ))) {
2796 schedule_work(&adapter->reset_task);
2797 link_up = false;
2798 }
2799
2800 adapter->link_up = link_up;
2801 adapter->link_speed = link_speed;
92915f71
GR
2802}
2803
e66c92ad
ET
2804/**
2805 * ixgbevf_watchdog_link_is_up - update netif_carrier status and
2806 * print link up message
2807 * @adapter - pointer to the device adapter structure
2808 **/
2809static void ixgbevf_watchdog_link_is_up(struct ixgbevf_adapter *adapter)
92915f71 2810{
e66c92ad 2811 struct net_device *netdev = adapter->netdev;
92915f71 2812
e66c92ad
ET
2813 /* only continue if link was previously down */
2814 if (netif_carrier_ok(netdev))
92915f71
GR
2815 return;
2816
e66c92ad
ET
2817 dev_info(&adapter->pdev->dev, "NIC Link is Up %s\n",
2818 (adapter->link_speed == IXGBE_LINK_SPEED_10GB_FULL) ?
2819 "10 Gbps" :
2820 (adapter->link_speed == IXGBE_LINK_SPEED_1GB_FULL) ?
2821 "1 Gbps" :
2822 (adapter->link_speed == IXGBE_LINK_SPEED_100_FULL) ?
2823 "100 Mbps" :
2824 "unknown speed");
92915f71 2825
e66c92ad
ET
2826 netif_carrier_on(netdev);
2827}
2828
2829/**
2830 * ixgbevf_watchdog_link_is_down - update netif_carrier status and
2831 * print link down message
2832 * @adapter - pointer to the adapter structure
2833 **/
2834static void ixgbevf_watchdog_link_is_down(struct ixgbevf_adapter *adapter)
2835{
2836 struct net_device *netdev = adapter->netdev;
2837
2838 adapter->link_speed = 0;
2839
2840 /* only continue if link was up previously */
2841 if (!netif_carrier_ok(netdev))
2842 return;
2843
2844 dev_info(&adapter->pdev->dev, "NIC Link is Down\n");
2845
2846 netif_carrier_off(netdev);
92915f71
GR
2847}
2848
2849/**
2850 * ixgbevf_watchdog_task - worker thread to bring link up
2851 * @work: pointer to work_struct containing our data
2852 **/
2853static void ixgbevf_watchdog_task(struct work_struct *work)
2854{
2855 struct ixgbevf_adapter *adapter = container_of(work,
2856 struct ixgbevf_adapter,
2857 watchdog_task);
92915f71 2858 struct ixgbe_hw *hw = &adapter->hw;
92915f71 2859
26597802
MR
2860 if (IXGBE_REMOVED(hw->hw_addr)) {
2861 if (!test_bit(__IXGBEVF_DOWN, &adapter->state)) {
2862 rtnl_lock();
2863 ixgbevf_down(adapter);
2864 rtnl_unlock();
2865 }
2866 return;
2867 }
e66c92ad 2868
220fe050
DS
2869 ixgbevf_queue_reset_subtask(adapter);
2870
92915f71
GR
2871 adapter->flags |= IXGBE_FLAG_IN_WATCHDOG_TASK;
2872
e66c92ad 2873 ixgbevf_watchdog_update_link(adapter);
92915f71 2874
e66c92ad
ET
2875 if (adapter->link_up)
2876 ixgbevf_watchdog_link_is_up(adapter);
2877 else
2878 ixgbevf_watchdog_link_is_down(adapter);
92915f71 2879
92915f71
GR
2880 ixgbevf_update_stats(adapter);
2881
e66c92ad
ET
2882 ixgbevf_check_hang_subtask(adapter);
2883
92915f71 2884 /* Reset the timer */
2e7cfbdd
MR
2885 if (!test_bit(__IXGBEVF_DOWN, &adapter->state) &&
2886 !test_bit(__IXGBEVF_REMOVING, &adapter->state))
92915f71
GR
2887 mod_timer(&adapter->watchdog_timer,
2888 round_jiffies(jiffies + (2 * HZ)));
2889
2890 adapter->flags &= ~IXGBE_FLAG_IN_WATCHDOG_TASK;
2891}
2892
2893/**
2894 * ixgbevf_free_tx_resources - Free Tx Resources per Queue
92915f71
GR
2895 * @tx_ring: Tx descriptor ring for a specific queue
2896 *
2897 * Free all transmit software resources
2898 **/
05d063aa 2899void ixgbevf_free_tx_resources(struct ixgbevf_ring *tx_ring)
92915f71 2900{
05d063aa 2901 ixgbevf_clean_tx_ring(tx_ring);
92915f71
GR
2902
2903 vfree(tx_ring->tx_buffer_info);
2904 tx_ring->tx_buffer_info = NULL;
2905
de02decb
DS
2906 /* if not set, then don't free */
2907 if (!tx_ring->desc)
2908 return;
2909
05d063aa 2910 dma_free_coherent(tx_ring->dev, tx_ring->size, tx_ring->desc,
2a1f8794 2911 tx_ring->dma);
92915f71
GR
2912
2913 tx_ring->desc = NULL;
2914}
2915
2916/**
2917 * ixgbevf_free_all_tx_resources - Free Tx Resources for All Queues
2918 * @adapter: board private structure
2919 *
2920 * Free all transmit software resources
2921 **/
2922static void ixgbevf_free_all_tx_resources(struct ixgbevf_adapter *adapter)
2923{
2924 int i;
2925
2926 for (i = 0; i < adapter->num_tx_queues; i++)
87e70ab9 2927 if (adapter->tx_ring[i]->desc)
05d063aa 2928 ixgbevf_free_tx_resources(adapter->tx_ring[i]);
92915f71
GR
2929}
2930
2931/**
2932 * ixgbevf_setup_tx_resources - allocate Tx resources (Descriptors)
92915f71
GR
2933 * @tx_ring: tx descriptor ring (for a specific queue) to setup
2934 *
2935 * Return 0 on success, negative on failure
2936 **/
05d063aa 2937int ixgbevf_setup_tx_resources(struct ixgbevf_ring *tx_ring)
92915f71 2938{
92915f71
GR
2939 int size;
2940
2941 size = sizeof(struct ixgbevf_tx_buffer) * tx_ring->count;
89bf67f1 2942 tx_ring->tx_buffer_info = vzalloc(size);
92915f71
GR
2943 if (!tx_ring->tx_buffer_info)
2944 goto err;
92915f71
GR
2945
2946 /* round up to nearest 4K */
2947 tx_ring->size = tx_ring->count * sizeof(union ixgbe_adv_tx_desc);
2948 tx_ring->size = ALIGN(tx_ring->size, 4096);
2949
05d063aa 2950 tx_ring->desc = dma_alloc_coherent(tx_ring->dev, tx_ring->size,
2a1f8794 2951 &tx_ring->dma, GFP_KERNEL);
92915f71
GR
2952 if (!tx_ring->desc)
2953 goto err;
2954
92915f71
GR
2955 return 0;
2956
2957err:
2958 vfree(tx_ring->tx_buffer_info);
2959 tx_ring->tx_buffer_info = NULL;
2960 hw_dbg(&adapter->hw, "Unable to allocate memory for the transmit "
2961 "descriptor ring\n");
2962 return -ENOMEM;
2963}
2964
2965/**
2966 * ixgbevf_setup_all_tx_resources - allocate all queues Tx resources
2967 * @adapter: board private structure
2968 *
2969 * If this function returns with an error, then it's possible one or
2970 * more of the rings is populated (while the rest are not). It is the
2971 * callers duty to clean those orphaned rings.
2972 *
2973 * Return 0 on success, negative on failure
2974 **/
2975static int ixgbevf_setup_all_tx_resources(struct ixgbevf_adapter *adapter)
2976{
2977 int i, err = 0;
2978
2979 for (i = 0; i < adapter->num_tx_queues; i++) {
05d063aa 2980 err = ixgbevf_setup_tx_resources(adapter->tx_ring[i]);
92915f71
GR
2981 if (!err)
2982 continue;
2983 hw_dbg(&adapter->hw,
2984 "Allocation for Tx Queue %u failed\n", i);
2985 break;
2986 }
2987
2988 return err;
2989}
2990
2991/**
2992 * ixgbevf_setup_rx_resources - allocate Rx resources (Descriptors)
92915f71
GR
2993 * @rx_ring: rx descriptor ring (for a specific queue) to setup
2994 *
2995 * Returns 0 on success, negative on failure
2996 **/
05d063aa 2997int ixgbevf_setup_rx_resources(struct ixgbevf_ring *rx_ring)
92915f71 2998{
92915f71
GR
2999 int size;
3000
3001 size = sizeof(struct ixgbevf_rx_buffer) * rx_ring->count;
89bf67f1 3002 rx_ring->rx_buffer_info = vzalloc(size);
e404decb 3003 if (!rx_ring->rx_buffer_info)
05d063aa 3004 goto err;
92915f71
GR
3005
3006 /* Round up to nearest 4K */
3007 rx_ring->size = rx_ring->count * sizeof(union ixgbe_adv_rx_desc);
3008 rx_ring->size = ALIGN(rx_ring->size, 4096);
3009
05d063aa 3010 rx_ring->desc = dma_alloc_coherent(rx_ring->dev, rx_ring->size,
2a1f8794 3011 &rx_ring->dma, GFP_KERNEL);
92915f71 3012
05d063aa
ET
3013 if (!rx_ring->desc)
3014 goto err;
92915f71 3015
92915f71 3016 return 0;
05d063aa
ET
3017err:
3018 vfree(rx_ring->rx_buffer_info);
3019 rx_ring->rx_buffer_info = NULL;
3020 dev_err(rx_ring->dev, "Unable to allocate memory for the Rx descriptor ring\n");
92915f71
GR
3021 return -ENOMEM;
3022}
3023
3024/**
3025 * ixgbevf_setup_all_rx_resources - allocate all queues Rx resources
3026 * @adapter: board private structure
3027 *
3028 * If this function returns with an error, then it's possible one or
3029 * more of the rings is populated (while the rest are not). It is the
3030 * callers duty to clean those orphaned rings.
3031 *
3032 * Return 0 on success, negative on failure
3033 **/
3034static int ixgbevf_setup_all_rx_resources(struct ixgbevf_adapter *adapter)
3035{
3036 int i, err = 0;
3037
3038 for (i = 0; i < adapter->num_rx_queues; i++) {
05d063aa 3039 err = ixgbevf_setup_rx_resources(adapter->rx_ring[i]);
92915f71
GR
3040 if (!err)
3041 continue;
3042 hw_dbg(&adapter->hw,
3043 "Allocation for Rx Queue %u failed\n", i);
3044 break;
3045 }
3046 return err;
3047}
3048
3049/**
3050 * ixgbevf_free_rx_resources - Free Rx Resources
92915f71
GR
3051 * @rx_ring: ring to clean the resources from
3052 *
3053 * Free all receive software resources
3054 **/
05d063aa 3055void ixgbevf_free_rx_resources(struct ixgbevf_ring *rx_ring)
92915f71 3056{
05d063aa 3057 ixgbevf_clean_rx_ring(rx_ring);
92915f71
GR
3058
3059 vfree(rx_ring->rx_buffer_info);
3060 rx_ring->rx_buffer_info = NULL;
3061
05d063aa 3062 dma_free_coherent(rx_ring->dev, rx_ring->size, rx_ring->desc,
2a1f8794 3063 rx_ring->dma);
92915f71
GR
3064
3065 rx_ring->desc = NULL;
3066}
3067
3068/**
3069 * ixgbevf_free_all_rx_resources - Free Rx Resources for All Queues
3070 * @adapter: board private structure
3071 *
3072 * Free all receive software resources
3073 **/
3074static void ixgbevf_free_all_rx_resources(struct ixgbevf_adapter *adapter)
3075{
3076 int i;
3077
3078 for (i = 0; i < adapter->num_rx_queues; i++)
87e70ab9 3079 if (adapter->rx_ring[i]->desc)
05d063aa 3080 ixgbevf_free_rx_resources(adapter->rx_ring[i]);
92915f71
GR
3081}
3082
3083/**
3084 * ixgbevf_open - Called when a network interface is made active
3085 * @netdev: network interface device structure
3086 *
3087 * Returns 0 on success, negative value on failure
3088 *
3089 * The open entry point is called when a network interface is made
3090 * active by the system (IFF_UP). At this point all resources needed
3091 * for transmit and receive operations are allocated, the interrupt
3092 * handler is registered with the OS, the watchdog timer is started,
3093 * and the stack is notified that the interface is ready.
3094 **/
3095static int ixgbevf_open(struct net_device *netdev)
3096{
3097 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
3098 struct ixgbe_hw *hw = &adapter->hw;
3099 int err;
3100
a1f6c6b1 3101 /* A previous failure to open the device because of a lack of
3102 * available MSIX vector resources may have reset the number
3103 * of msix vectors variable to zero. The only way to recover
3104 * is to unload/reload the driver and hope that the system has
3105 * been able to recover some MSIX vector resources.
3106 */
3107 if (!adapter->num_msix_vectors)
3108 return -ENOMEM;
3109
92915f71
GR
3110 if (hw->adapter_stopped) {
3111 ixgbevf_reset(adapter);
3112 /* if adapter is still stopped then PF isn't up and
3113 * the vf can't start. */
3114 if (hw->adapter_stopped) {
3115 err = IXGBE_ERR_MBX;
dbd9636e
JK
3116 pr_err("Unable to start - perhaps the PF Driver isn't "
3117 "up yet\n");
92915f71
GR
3118 goto err_setup_reset;
3119 }
3120 }
3121
d9bdb57f
ET
3122 /* disallow open during test */
3123 if (test_bit(__IXGBEVF_TESTING, &adapter->state))
3124 return -EBUSY;
3125
3126 netif_carrier_off(netdev);
3127
92915f71
GR
3128 /* allocate transmit descriptors */
3129 err = ixgbevf_setup_all_tx_resources(adapter);
3130 if (err)
3131 goto err_setup_tx;
3132
3133 /* allocate receive descriptors */
3134 err = ixgbevf_setup_all_rx_resources(adapter);
3135 if (err)
3136 goto err_setup_rx;
3137
3138 ixgbevf_configure(adapter);
3139
3140 /*
3141 * Map the Tx/Rx rings to the vectors we were allotted.
3142 * if request_irq will be called in this function map_rings
3143 * must be called *before* up_complete
3144 */
3145 ixgbevf_map_rings_to_vectors(adapter);
3146
92915f71
GR
3147 err = ixgbevf_request_irq(adapter);
3148 if (err)
3149 goto err_req_irq;
3150
d9bdb57f 3151 ixgbevf_up_complete(adapter);
92915f71
GR
3152
3153 return 0;
3154
3155err_req_irq:
3156 ixgbevf_down(adapter);
92915f71
GR
3157err_setup_rx:
3158 ixgbevf_free_all_rx_resources(adapter);
3159err_setup_tx:
3160 ixgbevf_free_all_tx_resources(adapter);
3161 ixgbevf_reset(adapter);
3162
3163err_setup_reset:
3164
3165 return err;
3166}
3167
3168/**
3169 * ixgbevf_close - Disables a network interface
3170 * @netdev: network interface device structure
3171 *
3172 * Returns 0, this is not allowed to fail
3173 *
3174 * The close entry point is called when an interface is de-activated
3175 * by the OS. The hardware is still under the drivers control, but
3176 * needs to be disabled. A global MAC reset is issued to stop the
3177 * hardware, and all transmit and receive resources are freed.
3178 **/
3179static int ixgbevf_close(struct net_device *netdev)
3180{
3181 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
3182
3183 ixgbevf_down(adapter);
3184 ixgbevf_free_irq(adapter);
3185
3186 ixgbevf_free_all_tx_resources(adapter);
3187 ixgbevf_free_all_rx_resources(adapter);
3188
3189 return 0;
3190}
3191
220fe050
DS
3192static void ixgbevf_queue_reset_subtask(struct ixgbevf_adapter *adapter)
3193{
3194 struct net_device *dev = adapter->netdev;
3195
3196 if (!(adapter->flags & IXGBEVF_FLAG_QUEUE_RESET_REQUESTED))
3197 return;
3198
3199 adapter->flags &= ~IXGBEVF_FLAG_QUEUE_RESET_REQUESTED;
3200
3201 /* if interface is down do nothing */
3202 if (test_bit(__IXGBEVF_DOWN, &adapter->state) ||
3203 test_bit(__IXGBEVF_RESETTING, &adapter->state))
3204 return;
3205
3206 /* Hardware has to reinitialize queues and interrupts to
3207 * match packet buffer alignment. Unfortunately, the
3208 * hardware is not flexible enough to do this dynamically.
3209 */
3210 if (netif_running(dev))
3211 ixgbevf_close(dev);
3212
3213 ixgbevf_clear_interrupt_scheme(adapter);
3214 ixgbevf_init_interrupt_scheme(adapter);
3215
3216 if (netif_running(dev))
3217 ixgbevf_open(dev);
3218}
3219
70a10e25
AD
3220static void ixgbevf_tx_ctxtdesc(struct ixgbevf_ring *tx_ring,
3221 u32 vlan_macip_lens, u32 type_tucmd,
3222 u32 mss_l4len_idx)
92915f71
GR
3223{
3224 struct ixgbe_adv_tx_context_desc *context_desc;
70a10e25 3225 u16 i = tx_ring->next_to_use;
92915f71 3226
70a10e25 3227 context_desc = IXGBEVF_TX_CTXTDESC(tx_ring, i);
92915f71 3228
70a10e25
AD
3229 i++;
3230 tx_ring->next_to_use = (i < tx_ring->count) ? i : 0;
92915f71 3231
70a10e25
AD
3232 /* set bits to identify this as an advanced context descriptor */
3233 type_tucmd |= IXGBE_TXD_CMD_DEXT | IXGBE_ADVTXD_DTYP_CTXT;
92915f71 3234
70a10e25
AD
3235 context_desc->vlan_macip_lens = cpu_to_le32(vlan_macip_lens);
3236 context_desc->seqnum_seed = 0;
3237 context_desc->type_tucmd_mlhl = cpu_to_le32(type_tucmd);
3238 context_desc->mss_l4len_idx = cpu_to_le32(mss_l4len_idx);
3239}
3240
3241static int ixgbevf_tso(struct ixgbevf_ring *tx_ring,
7ad1a093
ET
3242 struct ixgbevf_tx_buffer *first,
3243 u8 *hdr_len)
70a10e25 3244{
7ad1a093 3245 struct sk_buff *skb = first->skb;
70a10e25
AD
3246 u32 vlan_macip_lens, type_tucmd;
3247 u32 mss_l4len_idx, l4len;
8f12c034 3248 int err;
70a10e25 3249
01a545cf
ET
3250 if (skb->ip_summed != CHECKSUM_PARTIAL)
3251 return 0;
3252
70a10e25
AD
3253 if (!skb_is_gso(skb))
3254 return 0;
92915f71 3255
8f12c034
FR
3256 err = skb_cow_head(skb, 0);
3257 if (err < 0)
3258 return err;
92915f71 3259
70a10e25
AD
3260 /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
3261 type_tucmd = IXGBE_ADVTXD_TUCMD_L4T_TCP;
3262
10e4fb33 3263 if (first->protocol == htons(ETH_P_IP)) {
70a10e25
AD
3264 struct iphdr *iph = ip_hdr(skb);
3265 iph->tot_len = 0;
3266 iph->check = 0;
3267 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
3268 iph->daddr, 0,
3269 IPPROTO_TCP,
3270 0);
3271 type_tucmd |= IXGBE_ADVTXD_TUCMD_IPV4;
7ad1a093
ET
3272 first->tx_flags |= IXGBE_TX_FLAGS_TSO |
3273 IXGBE_TX_FLAGS_CSUM |
3274 IXGBE_TX_FLAGS_IPV4;
70a10e25
AD
3275 } else if (skb_is_gso_v6(skb)) {
3276 ipv6_hdr(skb)->payload_len = 0;
3277 tcp_hdr(skb)->check =
3278 ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
3279 &ipv6_hdr(skb)->daddr,
3280 0, IPPROTO_TCP, 0);
7ad1a093
ET
3281 first->tx_flags |= IXGBE_TX_FLAGS_TSO |
3282 IXGBE_TX_FLAGS_CSUM;
70a10e25
AD
3283 }
3284
3285 /* compute header lengths */
3286 l4len = tcp_hdrlen(skb);
3287 *hdr_len += l4len;
3288 *hdr_len = skb_transport_offset(skb) + l4len;
3289
7ad1a093
ET
3290 /* update gso size and bytecount with header size */
3291 first->gso_segs = skb_shinfo(skb)->gso_segs;
3292 first->bytecount += (first->gso_segs - 1) * *hdr_len;
3293
70a10e25
AD
3294 /* mss_l4len_id: use 1 as index for TSO */
3295 mss_l4len_idx = l4len << IXGBE_ADVTXD_L4LEN_SHIFT;
3296 mss_l4len_idx |= skb_shinfo(skb)->gso_size << IXGBE_ADVTXD_MSS_SHIFT;
3297 mss_l4len_idx |= 1 << IXGBE_ADVTXD_IDX_SHIFT;
3298
3299 /* vlan_macip_lens: HEADLEN, MACLEN, VLAN tag */
3300 vlan_macip_lens = skb_network_header_len(skb);
3301 vlan_macip_lens |= skb_network_offset(skb) << IXGBE_ADVTXD_MACLEN_SHIFT;
7ad1a093 3302 vlan_macip_lens |= first->tx_flags & IXGBE_TX_FLAGS_VLAN_MASK;
70a10e25
AD
3303
3304 ixgbevf_tx_ctxtdesc(tx_ring, vlan_macip_lens,
3305 type_tucmd, mss_l4len_idx);
3306
3307 return 1;
92915f71
GR
3308}
3309
7ad1a093
ET
3310static void ixgbevf_tx_csum(struct ixgbevf_ring *tx_ring,
3311 struct ixgbevf_tx_buffer *first)
92915f71 3312{
7ad1a093 3313 struct sk_buff *skb = first->skb;
70a10e25
AD
3314 u32 vlan_macip_lens = 0;
3315 u32 mss_l4len_idx = 0;
3316 u32 type_tucmd = 0;
92915f71 3317
70a10e25
AD
3318 if (skb->ip_summed == CHECKSUM_PARTIAL) {
3319 u8 l4_hdr = 0;
10e4fb33 3320 switch (first->protocol) {
0933ce4a 3321 case htons(ETH_P_IP):
70a10e25
AD
3322 vlan_macip_lens |= skb_network_header_len(skb);
3323 type_tucmd |= IXGBE_ADVTXD_TUCMD_IPV4;
3324 l4_hdr = ip_hdr(skb)->protocol;
3325 break;
0933ce4a 3326 case htons(ETH_P_IPV6):
70a10e25
AD
3327 vlan_macip_lens |= skb_network_header_len(skb);
3328 l4_hdr = ipv6_hdr(skb)->nexthdr;
3329 break;
3330 default:
3331 if (unlikely(net_ratelimit())) {
3332 dev_warn(tx_ring->dev,
3333 "partial checksum but proto=%x!\n",
7ad1a093 3334 first->protocol);
70a10e25
AD
3335 }
3336 break;
3337 }
92915f71 3338
70a10e25
AD
3339 switch (l4_hdr) {
3340 case IPPROTO_TCP:
3341 type_tucmd |= IXGBE_ADVTXD_TUCMD_L4T_TCP;
3342 mss_l4len_idx = tcp_hdrlen(skb) <<
3343 IXGBE_ADVTXD_L4LEN_SHIFT;
3344 break;
3345 case IPPROTO_SCTP:
3346 type_tucmd |= IXGBE_ADVTXD_TUCMD_L4T_SCTP;
3347 mss_l4len_idx = sizeof(struct sctphdr) <<
3348 IXGBE_ADVTXD_L4LEN_SHIFT;
3349 break;
3350 case IPPROTO_UDP:
3351 mss_l4len_idx = sizeof(struct udphdr) <<
3352 IXGBE_ADVTXD_L4LEN_SHIFT;
3353 break;
3354 default:
3355 if (unlikely(net_ratelimit())) {
3356 dev_warn(tx_ring->dev,
3357 "partial checksum but l4 proto=%x!\n",
3358 l4_hdr);
3359 }
3360 break;
3361 }
7ad1a093
ET
3362
3363 /* update TX checksum flag */
3364 first->tx_flags |= IXGBE_TX_FLAGS_CSUM;
92915f71
GR
3365 }
3366
70a10e25
AD
3367 /* vlan_macip_lens: MACLEN, VLAN tag */
3368 vlan_macip_lens |= skb_network_offset(skb) << IXGBE_ADVTXD_MACLEN_SHIFT;
7ad1a093 3369 vlan_macip_lens |= first->tx_flags & IXGBE_TX_FLAGS_VLAN_MASK;
70a10e25
AD
3370
3371 ixgbevf_tx_ctxtdesc(tx_ring, vlan_macip_lens,
3372 type_tucmd, mss_l4len_idx);
92915f71
GR
3373}
3374
29d37fa1 3375static __le32 ixgbevf_tx_cmd_type(u32 tx_flags)
92915f71 3376{
29d37fa1
ET
3377 /* set type for advanced descriptor with frame checksum insertion */
3378 __le32 cmd_type = cpu_to_le32(IXGBE_ADVTXD_DTYP_DATA |
3379 IXGBE_ADVTXD_DCMD_IFCS |
3380 IXGBE_ADVTXD_DCMD_DEXT);
92915f71 3381
29d37fa1
ET
3382 /* set HW vlan bit if vlan is present */
3383 if (tx_flags & IXGBE_TX_FLAGS_VLAN)
3384 cmd_type |= cpu_to_le32(IXGBE_ADVTXD_DCMD_VLE);
92915f71 3385
29d37fa1
ET
3386 /* set segmentation enable bits for TSO/FSO */
3387 if (tx_flags & IXGBE_TX_FLAGS_TSO)
3388 cmd_type |= cpu_to_le32(IXGBE_ADVTXD_DCMD_TSE);
92915f71 3389
29d37fa1
ET
3390 return cmd_type;
3391}
92915f71 3392
29d37fa1
ET
3393static void ixgbevf_tx_olinfo_status(union ixgbe_adv_tx_desc *tx_desc,
3394 u32 tx_flags, unsigned int paylen)
3395{
3396 __le32 olinfo_status = cpu_to_le32(paylen << IXGBE_ADVTXD_PAYLEN_SHIFT);
9bdfefd2 3397
29d37fa1
ET
3398 /* enable L4 checksum for TSO and TX checksum offload */
3399 if (tx_flags & IXGBE_TX_FLAGS_CSUM)
3400 olinfo_status |= cpu_to_le32(IXGBE_ADVTXD_POPTS_TXSM);
92915f71 3401
29d37fa1
ET
3402 /* enble IPv4 checksum for TSO */
3403 if (tx_flags & IXGBE_TX_FLAGS_IPV4)
3404 olinfo_status |= cpu_to_le32(IXGBE_ADVTXD_POPTS_IXSM);
92915f71 3405
29d37fa1
ET
3406 /* use index 1 context for TSO/FSO/FCOE */
3407 if (tx_flags & IXGBE_TX_FLAGS_TSO)
3408 olinfo_status |= cpu_to_le32(1 << IXGBE_ADVTXD_IDX_SHIFT);
92915f71 3409
29d37fa1
ET
3410 /* Check Context must be set if Tx switch is enabled, which it
3411 * always is for case where virtual functions are running
3412 */
3413 olinfo_status |= cpu_to_le32(IXGBE_ADVTXD_CC);
92915f71 3414
29d37fa1
ET
3415 tx_desc->read.olinfo_status = olinfo_status;
3416}
92915f71 3417
29d37fa1
ET
3418static void ixgbevf_tx_map(struct ixgbevf_ring *tx_ring,
3419 struct ixgbevf_tx_buffer *first,
3420 const u8 hdr_len)
3421{
3422 dma_addr_t dma;
3423 struct sk_buff *skb = first->skb;
3424 struct ixgbevf_tx_buffer *tx_buffer;
3425 union ixgbe_adv_tx_desc *tx_desc;
3426 struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[0];
3427 unsigned int data_len = skb->data_len;
3428 unsigned int size = skb_headlen(skb);
3429 unsigned int paylen = skb->len - hdr_len;
3430 u32 tx_flags = first->tx_flags;
3431 __le32 cmd_type;
3432 u16 i = tx_ring->next_to_use;
9bdfefd2 3433
29d37fa1 3434 tx_desc = IXGBEVF_TX_DESC(tx_ring, i);
92915f71 3435
29d37fa1
ET
3436 ixgbevf_tx_olinfo_status(tx_desc, tx_flags, paylen);
3437 cmd_type = ixgbevf_tx_cmd_type(tx_flags);
7ad1a093 3438
29d37fa1
ET
3439 dma = dma_map_single(tx_ring->dev, skb->data, size, DMA_TO_DEVICE);
3440 if (dma_mapping_error(tx_ring->dev, dma))
3441 goto dma_error;
92915f71 3442
29d37fa1
ET
3443 /* record length, and DMA address */
3444 dma_unmap_len_set(first, len, size);
3445 dma_unmap_addr_set(first, dma, dma);
92915f71 3446
29d37fa1 3447 tx_desc->read.buffer_addr = cpu_to_le64(dma);
92915f71 3448
29d37fa1
ET
3449 for (;;) {
3450 while (unlikely(size > IXGBE_MAX_DATA_PER_TXD)) {
3451 tx_desc->read.cmd_type_len =
3452 cmd_type | cpu_to_le32(IXGBE_MAX_DATA_PER_TXD);
92915f71 3453
29d37fa1
ET
3454 i++;
3455 tx_desc++;
3456 if (i == tx_ring->count) {
3457 tx_desc = IXGBEVF_TX_DESC(tx_ring, 0);
3458 i = 0;
3459 }
92915f71 3460
29d37fa1
ET
3461 dma += IXGBE_MAX_DATA_PER_TXD;
3462 size -= IXGBE_MAX_DATA_PER_TXD;
92915f71 3463
29d37fa1
ET
3464 tx_desc->read.buffer_addr = cpu_to_le64(dma);
3465 tx_desc->read.olinfo_status = 0;
3466 }
92915f71 3467
29d37fa1
ET
3468 if (likely(!data_len))
3469 break;
92915f71 3470
29d37fa1 3471 tx_desc->read.cmd_type_len = cmd_type | cpu_to_le32(size);
92915f71 3472
29d37fa1
ET
3473 i++;
3474 tx_desc++;
3475 if (i == tx_ring->count) {
3476 tx_desc = IXGBEVF_TX_DESC(tx_ring, 0);
3477 i = 0;
3478 }
92915f71 3479
29d37fa1
ET
3480 size = skb_frag_size(frag);
3481 data_len -= size;
92915f71 3482
29d37fa1
ET
3483 dma = skb_frag_dma_map(tx_ring->dev, frag, 0, size,
3484 DMA_TO_DEVICE);
3485 if (dma_mapping_error(tx_ring->dev, dma))
3486 goto dma_error;
70a10e25 3487
29d37fa1
ET
3488 tx_buffer = &tx_ring->tx_buffer_info[i];
3489 dma_unmap_len_set(tx_buffer, len, size);
3490 dma_unmap_addr_set(tx_buffer, dma, dma);
92915f71 3491
29d37fa1
ET
3492 tx_desc->read.buffer_addr = cpu_to_le64(dma);
3493 tx_desc->read.olinfo_status = 0;
3494
3495 frag++;
70a10e25 3496 }
92915f71 3497
29d37fa1
ET
3498 /* write last descriptor with RS and EOP bits */
3499 cmd_type |= cpu_to_le32(size) | cpu_to_le32(IXGBE_TXD_CMD);
3500 tx_desc->read.cmd_type_len = cmd_type;
3501
3502 /* set the timestamp */
3503 first->time_stamp = jiffies;
3504
3505 /* Force memory writes to complete before letting h/w know there
3506 * are new descriptors to fetch. (Only applicable for weak-ordered
3507 * memory model archs, such as IA-64).
3508 *
3509 * We also need this memory barrier (wmb) to make certain all of the
3510 * status bits have been updated before next_to_watch is written.
70a10e25 3511 */
29d37fa1 3512 wmb();
92915f71 3513
29d37fa1
ET
3514 /* set next_to_watch value indicating a packet is present */
3515 first->next_to_watch = tx_desc;
92915f71 3516
29d37fa1
ET
3517 i++;
3518 if (i == tx_ring->count)
3519 i = 0;
9bdfefd2 3520
29d37fa1 3521 tx_ring->next_to_use = i;
92915f71 3522
29d37fa1 3523 /* notify HW of packet */
06380db6 3524 ixgbevf_write_tail(tx_ring, i);
29d37fa1
ET
3525
3526 return;
3527dma_error:
3528 dev_err(tx_ring->dev, "TX DMA map failed\n");
3529
3530 /* clear dma mappings for failed tx_buffer_info map */
3531 for (;;) {
3532 tx_buffer = &tx_ring->tx_buffer_info[i];
3533 ixgbevf_unmap_and_free_tx_resource(tx_ring, tx_buffer);
3534 if (tx_buffer == first)
3535 break;
3536 if (i == 0)
3537 i = tx_ring->count;
3538 i--;
3539 }
92915f71 3540
92915f71 3541 tx_ring->next_to_use = i;
92915f71
GR
3542}
3543
fb40195c 3544static int __ixgbevf_maybe_stop_tx(struct ixgbevf_ring *tx_ring, int size)
92915f71 3545{
fb40195c 3546 netif_stop_subqueue(tx_ring->netdev, tx_ring->queue_index);
92915f71
GR
3547 /* Herbert's original patch had:
3548 * smp_mb__after_netif_stop_queue();
3549 * but since that doesn't exist yet, just open code it. */
3550 smp_mb();
3551
3552 /* We need to check again in a case another CPU has just
3553 * made room available. */
f880d07b 3554 if (likely(ixgbevf_desc_unused(tx_ring) < size))
92915f71
GR
3555 return -EBUSY;
3556
3557 /* A reprieve! - use start_queue because it doesn't call schedule */
fb40195c 3558 netif_start_subqueue(tx_ring->netdev, tx_ring->queue_index);
095e2617
ET
3559 ++tx_ring->tx_stats.restart_queue;
3560
92915f71
GR
3561 return 0;
3562}
3563
fb40195c 3564static int ixgbevf_maybe_stop_tx(struct ixgbevf_ring *tx_ring, int size)
92915f71 3565{
f880d07b 3566 if (likely(ixgbevf_desc_unused(tx_ring) >= size))
92915f71 3567 return 0;
fb40195c 3568 return __ixgbevf_maybe_stop_tx(tx_ring, size);
92915f71
GR
3569}
3570
3571static int ixgbevf_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
3572{
3573 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
7ad1a093 3574 struct ixgbevf_tx_buffer *first;
92915f71 3575 struct ixgbevf_ring *tx_ring;
7ad1a093
ET
3576 int tso;
3577 u32 tx_flags = 0;
3595990a
AD
3578 u16 count = TXD_USE_COUNT(skb_headlen(skb));
3579#if PAGE_SIZE > IXGBE_MAX_DATA_PER_TXD
3580 unsigned short f;
3581#endif
7ad1a093 3582 u8 hdr_len = 0;
f9d08f16 3583 u8 *dst_mac = skb_header_pointer(skb, 0, 0, NULL);
7ad1a093 3584
46acc460 3585 if (!dst_mac || is_link_local_ether_addr(dst_mac)) {
f9d08f16
GR
3586 dev_kfree_skb(skb);
3587 return NETDEV_TX_OK;
3588 }
92915f71 3589
7ad1a093 3590 tx_ring = adapter->tx_ring[skb->queue_mapping];
92915f71 3591
3595990a
AD
3592 /*
3593 * need: 1 descriptor per page * PAGE_SIZE/IXGBE_MAX_DATA_PER_TXD,
3594 * + 1 desc for skb_headlen/IXGBE_MAX_DATA_PER_TXD,
3595 * + 2 desc gap to keep tail from touching head,
3596 * + 1 desc for context descriptor,
3597 * otherwise try next time
3598 */
3599#if PAGE_SIZE > IXGBE_MAX_DATA_PER_TXD
3600 for (f = 0; f < skb_shinfo(skb)->nr_frags; f++)
3601 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size);
3602#else
3603 count += skb_shinfo(skb)->nr_frags;
3604#endif
fb40195c 3605 if (ixgbevf_maybe_stop_tx(tx_ring, count + 3)) {
095e2617 3606 tx_ring->tx_stats.tx_busy++;
3595990a
AD
3607 return NETDEV_TX_BUSY;
3608 }
3609
7ad1a093
ET
3610 /* record the location of the first descriptor for this packet */
3611 first = &tx_ring->tx_buffer_info[tx_ring->next_to_use];
3612 first->skb = skb;
3613 first->bytecount = skb->len;
3614 first->gso_segs = 1;
3615
df8a39de
JP
3616 if (skb_vlan_tag_present(skb)) {
3617 tx_flags |= skb_vlan_tag_get(skb);
92915f71
GR
3618 tx_flags <<= IXGBE_TX_FLAGS_VLAN_SHIFT;
3619 tx_flags |= IXGBE_TX_FLAGS_VLAN;
3620 }
3621
7ad1a093
ET
3622 /* record initial flags and protocol */
3623 first->tx_flags = tx_flags;
3624 first->protocol = vlan_get_protocol(skb);
92915f71 3625
7ad1a093
ET
3626 tso = ixgbevf_tso(tx_ring, first, &hdr_len);
3627 if (tso < 0)
3628 goto out_drop;
b5d217f3 3629 else if (!tso)
7ad1a093 3630 ixgbevf_tx_csum(tx_ring, first);
92915f71 3631
29d37fa1 3632 ixgbevf_tx_map(tx_ring, first, hdr_len);
70a10e25 3633
fb40195c 3634 ixgbevf_maybe_stop_tx(tx_ring, DESC_NEEDED);
92915f71 3635
7ad1a093
ET
3636 return NETDEV_TX_OK;
3637
3638out_drop:
3639 dev_kfree_skb_any(first->skb);
3640 first->skb = NULL;
3641
92915f71
GR
3642 return NETDEV_TX_OK;
3643}
3644
92915f71
GR
3645/**
3646 * ixgbevf_set_mac - Change the Ethernet Address of the NIC
3647 * @netdev: network interface device structure
3648 * @p: pointer to an address structure
3649 *
3650 * Returns 0 on success, negative on failure
3651 **/
3652static int ixgbevf_set_mac(struct net_device *netdev, void *p)
3653{
3654 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
3655 struct ixgbe_hw *hw = &adapter->hw;
3656 struct sockaddr *addr = p;
3657
3658 if (!is_valid_ether_addr(addr->sa_data))
3659 return -EADDRNOTAVAIL;
3660
3661 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
3662 memcpy(hw->mac.addr, addr->sa_data, netdev->addr_len);
3663
55fdd45b 3664 spin_lock_bh(&adapter->mbx_lock);
1c55ed76 3665
92fe0bf7 3666 hw->mac.ops.set_rar(hw, 0, hw->mac.addr, 0);
92915f71 3667
55fdd45b 3668 spin_unlock_bh(&adapter->mbx_lock);
1c55ed76 3669
92915f71
GR
3670 return 0;
3671}
3672
3673/**
3674 * ixgbevf_change_mtu - Change the Maximum Transfer Unit
3675 * @netdev: network interface device structure
3676 * @new_mtu: new value for maximum frame size
3677 *
3678 * Returns 0 on success, negative on failure
3679 **/
3680static int ixgbevf_change_mtu(struct net_device *netdev, int new_mtu)
3681{
3682 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
bad17234 3683 struct ixgbe_hw *hw = &adapter->hw;
92915f71 3684 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN;
69bfbec4 3685 int max_possible_frame = MAXIMUM_ETHERNET_VLAN_SIZE;
69bfbec4 3686
56e94095
AD
3687 switch (adapter->hw.api_version) {
3688 case ixgbe_mbox_api_11:
69bfbec4 3689 max_possible_frame = IXGBE_MAX_JUMBO_FRAME_SIZE;
56e94095
AD
3690 break;
3691 default:
47068b0d 3692 if (adapter->hw.mac.type != ixgbe_mac_82599_vf)
56e94095
AD
3693 max_possible_frame = IXGBE_MAX_JUMBO_FRAME_SIZE;
3694 break;
3695 }
92915f71
GR
3696
3697 /* MTU < 68 is an error and causes problems on some kernels */
69bfbec4 3698 if ((new_mtu < 68) || (max_frame > max_possible_frame))
92915f71
GR
3699 return -EINVAL;
3700
bad17234 3701 hw_dbg(hw, "changing MTU from %d to %d\n",
92915f71
GR
3702 netdev->mtu, new_mtu);
3703 /* must set new MTU before calling down or up */
3704 netdev->mtu = new_mtu;
3705
bad17234
ET
3706 /* notify the PF of our intent to use this size of frame */
3707 ixgbevf_rlpml_set_vf(hw, max_frame);
92915f71
GR
3708
3709 return 0;
3710}
3711
688ff32d
ET
3712#ifdef CONFIG_NET_POLL_CONTROLLER
3713/* Polling 'interrupt' - used by things like netconsole to send skbs
3714 * without having to re-enable interrupts. It's not called while
3715 * the interrupt routine is executing.
3716 */
3717static void ixgbevf_netpoll(struct net_device *netdev)
3718{
3719 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
3720 int i;
3721
3722 /* if interface is down do nothing */
3723 if (test_bit(__IXGBEVF_DOWN, &adapter->state))
3724 return;
3725 for (i = 0; i < adapter->num_rx_queues; i++)
3726 ixgbevf_msix_clean_rings(0, adapter->q_vector[i]);
3727}
3728#endif /* CONFIG_NET_POLL_CONTROLLER */
3729
0ac1e8ce 3730static int ixgbevf_suspend(struct pci_dev *pdev, pm_message_t state)
92915f71
GR
3731{
3732 struct net_device *netdev = pci_get_drvdata(pdev);
3733 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
0ac1e8ce
AD
3734#ifdef CONFIG_PM
3735 int retval = 0;
3736#endif
92915f71
GR
3737
3738 netif_device_detach(netdev);
3739
3740 if (netif_running(netdev)) {
0ac1e8ce 3741 rtnl_lock();
92915f71
GR
3742 ixgbevf_down(adapter);
3743 ixgbevf_free_irq(adapter);
3744 ixgbevf_free_all_tx_resources(adapter);
3745 ixgbevf_free_all_rx_resources(adapter);
0ac1e8ce 3746 rtnl_unlock();
92915f71
GR
3747 }
3748
0ac1e8ce 3749 ixgbevf_clear_interrupt_scheme(adapter);
92915f71 3750
0ac1e8ce
AD
3751#ifdef CONFIG_PM
3752 retval = pci_save_state(pdev);
3753 if (retval)
3754 return retval;
92915f71 3755
0ac1e8ce 3756#endif
bc0c7151
MR
3757 if (!test_and_set_bit(__IXGBEVF_DISABLED, &adapter->state))
3758 pci_disable_device(pdev);
0ac1e8ce
AD
3759
3760 return 0;
3761}
3762
3763#ifdef CONFIG_PM
3764static int ixgbevf_resume(struct pci_dev *pdev)
3765{
27ae2967
WY
3766 struct net_device *netdev = pci_get_drvdata(pdev);
3767 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
0ac1e8ce
AD
3768 u32 err;
3769
0ac1e8ce
AD
3770 pci_restore_state(pdev);
3771 /*
3772 * pci_restore_state clears dev->state_saved so call
3773 * pci_save_state to restore it.
3774 */
3775 pci_save_state(pdev);
3776
3777 err = pci_enable_device_mem(pdev);
3778 if (err) {
3779 dev_err(&pdev->dev, "Cannot enable PCI device from suspend\n");
3780 return err;
3781 }
4e857c58 3782 smp_mb__before_atomic();
bc0c7151 3783 clear_bit(__IXGBEVF_DISABLED, &adapter->state);
0ac1e8ce
AD
3784 pci_set_master(pdev);
3785
798e381a
DS
3786 ixgbevf_reset(adapter);
3787
0ac1e8ce
AD
3788 rtnl_lock();
3789 err = ixgbevf_init_interrupt_scheme(adapter);
3790 rtnl_unlock();
3791 if (err) {
3792 dev_err(&pdev->dev, "Cannot initialize interrupts\n");
3793 return err;
3794 }
3795
0ac1e8ce
AD
3796 if (netif_running(netdev)) {
3797 err = ixgbevf_open(netdev);
3798 if (err)
3799 return err;
3800 }
3801
3802 netif_device_attach(netdev);
3803
3804 return err;
3805}
3806
3807#endif /* CONFIG_PM */
3808static void ixgbevf_shutdown(struct pci_dev *pdev)
3809{
3810 ixgbevf_suspend(pdev, PMSG_SUSPEND);
92915f71
GR
3811}
3812
4197aa7b
ED
3813static struct rtnl_link_stats64 *ixgbevf_get_stats(struct net_device *netdev,
3814 struct rtnl_link_stats64 *stats)
3815{
3816 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
3817 unsigned int start;
3818 u64 bytes, packets;
3819 const struct ixgbevf_ring *ring;
3820 int i;
3821
3822 ixgbevf_update_stats(adapter);
3823
3824 stats->multicast = adapter->stats.vfmprc - adapter->stats.base_vfmprc;
3825
3826 for (i = 0; i < adapter->num_rx_queues; i++) {
87e70ab9 3827 ring = adapter->rx_ring[i];
4197aa7b 3828 do {
57a7744e 3829 start = u64_stats_fetch_begin_irq(&ring->syncp);
095e2617
ET
3830 bytes = ring->stats.bytes;
3831 packets = ring->stats.packets;
57a7744e 3832 } while (u64_stats_fetch_retry_irq(&ring->syncp, start));
4197aa7b
ED
3833 stats->rx_bytes += bytes;
3834 stats->rx_packets += packets;
3835 }
3836
3837 for (i = 0; i < adapter->num_tx_queues; i++) {
87e70ab9 3838 ring = adapter->tx_ring[i];
4197aa7b 3839 do {
57a7744e 3840 start = u64_stats_fetch_begin_irq(&ring->syncp);
095e2617
ET
3841 bytes = ring->stats.bytes;
3842 packets = ring->stats.packets;
57a7744e 3843 } while (u64_stats_fetch_retry_irq(&ring->syncp, start));
4197aa7b
ED
3844 stats->tx_bytes += bytes;
3845 stats->tx_packets += packets;
3846 }
3847
3848 return stats;
3849}
3850
0ac1e8ce 3851static const struct net_device_ops ixgbevf_netdev_ops = {
c12db769
SH
3852 .ndo_open = ixgbevf_open,
3853 .ndo_stop = ixgbevf_close,
3854 .ndo_start_xmit = ixgbevf_xmit_frame,
3855 .ndo_set_rx_mode = ixgbevf_set_rx_mode,
4197aa7b 3856 .ndo_get_stats64 = ixgbevf_get_stats,
92915f71 3857 .ndo_validate_addr = eth_validate_addr,
c12db769
SH
3858 .ndo_set_mac_address = ixgbevf_set_mac,
3859 .ndo_change_mtu = ixgbevf_change_mtu,
3860 .ndo_tx_timeout = ixgbevf_tx_timeout,
c12db769
SH
3861 .ndo_vlan_rx_add_vid = ixgbevf_vlan_rx_add_vid,
3862 .ndo_vlan_rx_kill_vid = ixgbevf_vlan_rx_kill_vid,
c777cdfa
JK
3863#ifdef CONFIG_NET_RX_BUSY_POLL
3864 .ndo_busy_poll = ixgbevf_busy_poll_recv,
3865#endif
688ff32d
ET
3866#ifdef CONFIG_NET_POLL_CONTROLLER
3867 .ndo_poll_controller = ixgbevf_netpoll,
3868#endif
92915f71 3869};
92915f71
GR
3870
3871static void ixgbevf_assign_netdev_ops(struct net_device *dev)
3872{
0ac1e8ce 3873 dev->netdev_ops = &ixgbevf_netdev_ops;
92915f71
GR
3874 ixgbevf_set_ethtool_ops(dev);
3875 dev->watchdog_timeo = 5 * HZ;
3876}
3877
3878/**
3879 * ixgbevf_probe - Device Initialization Routine
3880 * @pdev: PCI device information struct
3881 * @ent: entry in ixgbevf_pci_tbl
3882 *
3883 * Returns 0 on success, negative on failure
3884 *
3885 * ixgbevf_probe initializes an adapter identified by a pci_dev structure.
3886 * The OS initialization, configuring of the adapter private structure,
3887 * and a hardware reset occur.
3888 **/
1dd06ae8 3889static int ixgbevf_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
92915f71
GR
3890{
3891 struct net_device *netdev;
3892 struct ixgbevf_adapter *adapter = NULL;
3893 struct ixgbe_hw *hw = NULL;
3894 const struct ixgbevf_info *ii = ixgbevf_info_tbl[ent->driver_data];
92915f71 3895 int err, pci_using_dac;
0333464f 3896 bool disable_dev = false;
92915f71
GR
3897
3898 err = pci_enable_device(pdev);
3899 if (err)
3900 return err;
3901
53567aa4 3902 if (!dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64))) {
92915f71
GR
3903 pci_using_dac = 1;
3904 } else {
53567aa4 3905 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
92915f71 3906 if (err) {
53567aa4
RK
3907 dev_err(&pdev->dev, "No usable DMA "
3908 "configuration, aborting\n");
3909 goto err_dma;
92915f71
GR
3910 }
3911 pci_using_dac = 0;
3912 }
3913
3914 err = pci_request_regions(pdev, ixgbevf_driver_name);
3915 if (err) {
3916 dev_err(&pdev->dev, "pci_request_regions failed 0x%x\n", err);
3917 goto err_pci_reg;
3918 }
3919
3920 pci_set_master(pdev);
3921
92915f71
GR
3922 netdev = alloc_etherdev_mq(sizeof(struct ixgbevf_adapter),
3923 MAX_TX_QUEUES);
92915f71
GR
3924 if (!netdev) {
3925 err = -ENOMEM;
3926 goto err_alloc_etherdev;
3927 }
3928
3929 SET_NETDEV_DEV(netdev, &pdev->dev);
3930
92915f71
GR
3931 adapter = netdev_priv(netdev);
3932
3933 adapter->netdev = netdev;
3934 adapter->pdev = pdev;
3935 hw = &adapter->hw;
3936 hw->back = adapter;
b3f4d599 3937 adapter->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE);
92915f71
GR
3938
3939 /*
3940 * call save state here in standalone driver because it relies on
3941 * adapter struct to exist, and needs to call netdev_priv
3942 */
3943 pci_save_state(pdev);
3944
3945 hw->hw_addr = ioremap(pci_resource_start(pdev, 0),
3946 pci_resource_len(pdev, 0));
dbf8b0d8 3947 adapter->io_addr = hw->hw_addr;
92915f71
GR
3948 if (!hw->hw_addr) {
3949 err = -EIO;
3950 goto err_ioremap;
3951 }
3952
3953 ixgbevf_assign_netdev_ops(netdev);
3954
92915f71
GR
3955 /* Setup hw api */
3956 memcpy(&hw->mac.ops, ii->mac_ops, sizeof(hw->mac.ops));
3957 hw->mac.type = ii->mac;
3958
3959 memcpy(&hw->mbx.ops, &ixgbevf_mbx_ops,
f416dfc0 3960 sizeof(struct ixgbe_mbx_operations));
92915f71 3961
92915f71
GR
3962 /* setup the private structure */
3963 err = ixgbevf_sw_init(adapter);
1a0d6ae5
DK
3964 if (err)
3965 goto err_sw_init;
3966
3967 /* The HW MAC address was set and/or determined in sw_init */
1a0d6ae5
DK
3968 if (!is_valid_ether_addr(netdev->dev_addr)) {
3969 pr_err("invalid MAC address\n");
3970 err = -EIO;
3971 goto err_sw_init;
3972 }
92915f71 3973
471a76de 3974 netdev->hw_features = NETIF_F_SG |
92915f71 3975 NETIF_F_IP_CSUM |
471a76de
MM
3976 NETIF_F_IPV6_CSUM |
3977 NETIF_F_TSO |
3978 NETIF_F_TSO6 |
3979 NETIF_F_RXCSUM;
3980
3981 netdev->features = netdev->hw_features |
f646968f
PM
3982 NETIF_F_HW_VLAN_CTAG_TX |
3983 NETIF_F_HW_VLAN_CTAG_RX |
3984 NETIF_F_HW_VLAN_CTAG_FILTER;
92915f71 3985
39f35a37
ET
3986 netdev->vlan_features |= NETIF_F_TSO |
3987 NETIF_F_TSO6 |
3988 NETIF_F_IP_CSUM |
3989 NETIF_F_IPV6_CSUM |
3990 NETIF_F_SG;
92915f71
GR
3991
3992 if (pci_using_dac)
3993 netdev->features |= NETIF_F_HIGHDMA;
3994
01789349
JP
3995 netdev->priv_flags |= IFF_UNICAST_FLT;
3996
92915f71 3997 init_timer(&adapter->watchdog_timer);
c061b18d 3998 adapter->watchdog_timer.function = ixgbevf_watchdog;
92915f71
GR
3999 adapter->watchdog_timer.data = (unsigned long)adapter;
4000
ea699569
MR
4001 if (IXGBE_REMOVED(hw->hw_addr)) {
4002 err = -EIO;
4003 goto err_sw_init;
4004 }
92915f71
GR
4005 INIT_WORK(&adapter->reset_task, ixgbevf_reset_task);
4006 INIT_WORK(&adapter->watchdog_task, ixgbevf_watchdog_task);
ea699569 4007 set_bit(__IXGBEVF_WORK_INIT, &adapter->state);
92915f71
GR
4008
4009 err = ixgbevf_init_interrupt_scheme(adapter);
4010 if (err)
4011 goto err_sw_init;
4012
92915f71
GR
4013 strcpy(netdev->name, "eth%d");
4014
4015 err = register_netdev(netdev);
4016 if (err)
4017 goto err_register;
4018
0333464f 4019 pci_set_drvdata(pdev, netdev);
5d426ad1
GR
4020 netif_carrier_off(netdev);
4021
33bd9f60
GR
4022 ixgbevf_init_last_counter_stats(adapter);
4023
47068b0d
ET
4024 /* print the VF info */
4025 dev_info(&pdev->dev, "%pM\n", netdev->dev_addr);
4026 dev_info(&pdev->dev, "MAC: %d\n", hw->mac.type);
92915f71 4027
47068b0d
ET
4028 switch (hw->mac.type) {
4029 case ixgbe_mac_X550_vf:
4030 dev_info(&pdev->dev, "Intel(R) X550 Virtual Function\n");
4031 break;
4032 case ixgbe_mac_X540_vf:
4033 dev_info(&pdev->dev, "Intel(R) X540 Virtual Function\n");
4034 break;
4035 case ixgbe_mac_82599_vf:
4036 default:
4037 dev_info(&pdev->dev, "Intel(R) 82599 Virtual Function\n");
4038 break;
4039 }
92915f71 4040
92915f71
GR
4041 return 0;
4042
4043err_register:
0ac1e8ce 4044 ixgbevf_clear_interrupt_scheme(adapter);
92915f71
GR
4045err_sw_init:
4046 ixgbevf_reset_interrupt_capability(adapter);
dbf8b0d8 4047 iounmap(adapter->io_addr);
92915f71 4048err_ioremap:
0333464f 4049 disable_dev = !test_and_set_bit(__IXGBEVF_DISABLED, &adapter->state);
92915f71
GR
4050 free_netdev(netdev);
4051err_alloc_etherdev:
4052 pci_release_regions(pdev);
4053err_pci_reg:
4054err_dma:
0333464f 4055 if (!adapter || disable_dev)
bc0c7151 4056 pci_disable_device(pdev);
92915f71
GR
4057 return err;
4058}
4059
4060/**
4061 * ixgbevf_remove - Device Removal Routine
4062 * @pdev: PCI device information struct
4063 *
4064 * ixgbevf_remove is called by the PCI subsystem to alert the driver
4065 * that it should release a PCI device. The could be caused by a
4066 * Hot-Plug event, or because the driver is going to be removed from
4067 * memory.
4068 **/
9f9a12f8 4069static void ixgbevf_remove(struct pci_dev *pdev)
92915f71
GR
4070{
4071 struct net_device *netdev = pci_get_drvdata(pdev);
0333464f
ET
4072 struct ixgbevf_adapter *adapter;
4073 bool disable_dev;
4074
4075 if (!netdev)
4076 return;
4077
4078 adapter = netdev_priv(netdev);
92915f71 4079
2e7cfbdd 4080 set_bit(__IXGBEVF_REMOVING, &adapter->state);
92915f71
GR
4081
4082 del_timer_sync(&adapter->watchdog_timer);
4083
23f333a2 4084 cancel_work_sync(&adapter->reset_task);
92915f71
GR
4085 cancel_work_sync(&adapter->watchdog_task);
4086
fd13a9ab 4087 if (netdev->reg_state == NETREG_REGISTERED)
92915f71 4088 unregister_netdev(netdev);
92915f71 4089
0ac1e8ce 4090 ixgbevf_clear_interrupt_scheme(adapter);
92915f71
GR
4091 ixgbevf_reset_interrupt_capability(adapter);
4092
dbf8b0d8 4093 iounmap(adapter->io_addr);
92915f71
GR
4094 pci_release_regions(pdev);
4095
4096 hw_dbg(&adapter->hw, "Remove complete\n");
4097
0333464f 4098 disable_dev = !test_and_set_bit(__IXGBEVF_DISABLED, &adapter->state);
92915f71
GR
4099 free_netdev(netdev);
4100
0333464f 4101 if (disable_dev)
bc0c7151 4102 pci_disable_device(pdev);
92915f71
GR
4103}
4104
9f19f31d
AD
4105/**
4106 * ixgbevf_io_error_detected - called when PCI error is detected
4107 * @pdev: Pointer to PCI device
4108 * @state: The current pci connection state
4109 *
4110 * This function is called after a PCI bus error affecting
4111 * this device has been detected.
4112 */
4113static pci_ers_result_t ixgbevf_io_error_detected(struct pci_dev *pdev,
4114 pci_channel_state_t state)
4115{
4116 struct net_device *netdev = pci_get_drvdata(pdev);
4117 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
4118
ea699569
MR
4119 if (!test_bit(__IXGBEVF_WORK_INIT, &adapter->state))
4120 return PCI_ERS_RESULT_DISCONNECT;
4121
bc0c7151 4122 rtnl_lock();
9f19f31d
AD
4123 netif_device_detach(netdev);
4124
bc0c7151
MR
4125 if (state == pci_channel_io_perm_failure) {
4126 rtnl_unlock();
9f19f31d 4127 return PCI_ERS_RESULT_DISCONNECT;
bc0c7151 4128 }
9f19f31d
AD
4129
4130 if (netif_running(netdev))
4131 ixgbevf_down(adapter);
4132
bc0c7151
MR
4133 if (!test_and_set_bit(__IXGBEVF_DISABLED, &adapter->state))
4134 pci_disable_device(pdev);
4135 rtnl_unlock();
9f19f31d
AD
4136
4137 /* Request a slot slot reset. */
4138 return PCI_ERS_RESULT_NEED_RESET;
4139}
4140
4141/**
4142 * ixgbevf_io_slot_reset - called after the pci bus has been reset.
4143 * @pdev: Pointer to PCI device
4144 *
4145 * Restart the card from scratch, as if from a cold-boot. Implementation
4146 * resembles the first-half of the ixgbevf_resume routine.
4147 */
4148static pci_ers_result_t ixgbevf_io_slot_reset(struct pci_dev *pdev)
4149{
4150 struct net_device *netdev = pci_get_drvdata(pdev);
4151 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
4152
4153 if (pci_enable_device_mem(pdev)) {
4154 dev_err(&pdev->dev,
4155 "Cannot re-enable PCI device after reset.\n");
4156 return PCI_ERS_RESULT_DISCONNECT;
4157 }
4158
4e857c58 4159 smp_mb__before_atomic();
bc0c7151 4160 clear_bit(__IXGBEVF_DISABLED, &adapter->state);
9f19f31d
AD
4161 pci_set_master(pdev);
4162
4163 ixgbevf_reset(adapter);
4164
4165 return PCI_ERS_RESULT_RECOVERED;
4166}
4167
4168/**
4169 * ixgbevf_io_resume - called when traffic can start flowing again.
4170 * @pdev: Pointer to PCI device
4171 *
4172 * This callback is called when the error recovery driver tells us that
4173 * its OK to resume normal operation. Implementation resembles the
4174 * second-half of the ixgbevf_resume routine.
4175 */
4176static void ixgbevf_io_resume(struct pci_dev *pdev)
4177{
4178 struct net_device *netdev = pci_get_drvdata(pdev);
4179 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
4180
4181 if (netif_running(netdev))
4182 ixgbevf_up(adapter);
4183
4184 netif_device_attach(netdev);
4185}
4186
4187/* PCI Error Recovery (ERS) */
3646f0e5 4188static const struct pci_error_handlers ixgbevf_err_handler = {
9f19f31d
AD
4189 .error_detected = ixgbevf_io_error_detected,
4190 .slot_reset = ixgbevf_io_slot_reset,
4191 .resume = ixgbevf_io_resume,
4192};
4193
92915f71
GR
4194static struct pci_driver ixgbevf_driver = {
4195 .name = ixgbevf_driver_name,
4196 .id_table = ixgbevf_pci_tbl,
4197 .probe = ixgbevf_probe,
9f9a12f8 4198 .remove = ixgbevf_remove,
0ac1e8ce
AD
4199#ifdef CONFIG_PM
4200 /* Power Management Hooks */
4201 .suspend = ixgbevf_suspend,
4202 .resume = ixgbevf_resume,
4203#endif
92915f71 4204 .shutdown = ixgbevf_shutdown,
9f19f31d 4205 .err_handler = &ixgbevf_err_handler
92915f71
GR
4206};
4207
4208/**
65d676c8 4209 * ixgbevf_init_module - Driver Registration Routine
92915f71 4210 *
65d676c8 4211 * ixgbevf_init_module is the first routine called when the driver is
92915f71
GR
4212 * loaded. All it does is register with the PCI subsystem.
4213 **/
4214static int __init ixgbevf_init_module(void)
4215{
4216 int ret;
dbd9636e
JK
4217 pr_info("%s - version %s\n", ixgbevf_driver_string,
4218 ixgbevf_driver_version);
92915f71 4219
dbd9636e 4220 pr_info("%s\n", ixgbevf_copyright);
92915f71
GR
4221
4222 ret = pci_register_driver(&ixgbevf_driver);
4223 return ret;
4224}
4225
4226module_init(ixgbevf_init_module);
4227
4228/**
65d676c8 4229 * ixgbevf_exit_module - Driver Exit Cleanup Routine
92915f71 4230 *
65d676c8 4231 * ixgbevf_exit_module is called just before the driver is removed
92915f71
GR
4232 * from memory.
4233 **/
4234static void __exit ixgbevf_exit_module(void)
4235{
4236 pci_unregister_driver(&ixgbevf_driver);
4237}
4238
4239#ifdef DEBUG
4240/**
65d676c8 4241 * ixgbevf_get_hw_dev_name - return device name string
92915f71
GR
4242 * used by hardware layer to print debugging information
4243 **/
4244char *ixgbevf_get_hw_dev_name(struct ixgbe_hw *hw)
4245{
4246 struct ixgbevf_adapter *adapter = hw->back;
4247 return adapter->netdev->name;
4248}
4249
4250#endif
4251module_exit(ixgbevf_exit_module);
4252
4253/* ixgbevf_main.c */