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c82e9aa0 EC |
1 | /* |
2 | * Copyright (c) 2004, 2005 Topspin Communications. All rights reserved. | |
3 | * Copyright (c) 2005, 2006, 2007, 2008 Mellanox Technologies. | |
4 | * All rights reserved. | |
5 | * Copyright (c) 2005, 2006, 2007 Cisco Systems, Inc. All rights reserved. | |
6 | * | |
7 | * This software is available to you under a choice of one of two | |
8 | * licenses. You may choose to be licensed under the terms of the GNU | |
9 | * General Public License (GPL) Version 2, available from the file | |
10 | * COPYING in the main directory of this source tree, or the | |
11 | * OpenIB.org BSD license below: | |
12 | * | |
13 | * Redistribution and use in source and binary forms, with or | |
14 | * without modification, are permitted provided that the following | |
15 | * conditions are met: | |
16 | * | |
17 | * - Redistributions of source code must retain the above | |
18 | * copyright notice, this list of conditions and the following | |
19 | * disclaimer. | |
20 | * | |
21 | * - Redistributions in binary form must reproduce the above | |
22 | * copyright notice, this list of conditions and the following | |
23 | * disclaimer in the documentation and/or other materials | |
24 | * provided with the distribution. | |
25 | * | |
26 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, | |
27 | * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF | |
28 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND | |
29 | * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS | |
30 | * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN | |
31 | * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN | |
32 | * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE | |
33 | * SOFTWARE. | |
34 | */ | |
35 | ||
36 | #include <linux/sched.h> | |
37 | #include <linux/pci.h> | |
38 | #include <linux/errno.h> | |
39 | #include <linux/kernel.h> | |
40 | #include <linux/io.h> | |
e143a1ad | 41 | #include <linux/slab.h> |
c82e9aa0 EC |
42 | #include <linux/mlx4/cmd.h> |
43 | #include <linux/mlx4/qp.h> | |
af22d9de | 44 | #include <linux/if_ether.h> |
7fb40f87 | 45 | #include <linux/etherdevice.h> |
c82e9aa0 EC |
46 | |
47 | #include "mlx4.h" | |
48 | #include "fw.h" | |
49 | ||
50 | #define MLX4_MAC_VALID (1ull << 63) | |
c82e9aa0 EC |
51 | |
52 | struct mac_res { | |
53 | struct list_head list; | |
54 | u64 mac; | |
55 | u8 port; | |
56 | }; | |
57 | ||
58 | struct res_common { | |
59 | struct list_head list; | |
4af1c048 | 60 | struct rb_node node; |
aa1ec3dd | 61 | u64 res_id; |
c82e9aa0 EC |
62 | int owner; |
63 | int state; | |
64 | int from_state; | |
65 | int to_state; | |
66 | int removing; | |
67 | }; | |
68 | ||
69 | enum { | |
70 | RES_ANY_BUSY = 1 | |
71 | }; | |
72 | ||
73 | struct res_gid { | |
74 | struct list_head list; | |
75 | u8 gid[16]; | |
76 | enum mlx4_protocol prot; | |
9f5b6c63 | 77 | enum mlx4_steer_type steer; |
c82e9aa0 EC |
78 | }; |
79 | ||
80 | enum res_qp_states { | |
81 | RES_QP_BUSY = RES_ANY_BUSY, | |
82 | ||
83 | /* QP number was allocated */ | |
84 | RES_QP_RESERVED, | |
85 | ||
86 | /* ICM memory for QP context was mapped */ | |
87 | RES_QP_MAPPED, | |
88 | ||
89 | /* QP is in hw ownership */ | |
90 | RES_QP_HW | |
91 | }; | |
92 | ||
c82e9aa0 EC |
93 | struct res_qp { |
94 | struct res_common com; | |
95 | struct res_mtt *mtt; | |
96 | struct res_cq *rcq; | |
97 | struct res_cq *scq; | |
98 | struct res_srq *srq; | |
99 | struct list_head mcg_list; | |
100 | spinlock_t mcg_spl; | |
101 | int local_qpn; | |
102 | }; | |
103 | ||
104 | enum res_mtt_states { | |
105 | RES_MTT_BUSY = RES_ANY_BUSY, | |
106 | RES_MTT_ALLOCATED, | |
107 | }; | |
108 | ||
109 | static inline const char *mtt_states_str(enum res_mtt_states state) | |
110 | { | |
111 | switch (state) { | |
112 | case RES_MTT_BUSY: return "RES_MTT_BUSY"; | |
113 | case RES_MTT_ALLOCATED: return "RES_MTT_ALLOCATED"; | |
114 | default: return "Unknown"; | |
115 | } | |
116 | } | |
117 | ||
118 | struct res_mtt { | |
119 | struct res_common com; | |
120 | int order; | |
121 | atomic_t ref_count; | |
122 | }; | |
123 | ||
124 | enum res_mpt_states { | |
125 | RES_MPT_BUSY = RES_ANY_BUSY, | |
126 | RES_MPT_RESERVED, | |
127 | RES_MPT_MAPPED, | |
128 | RES_MPT_HW, | |
129 | }; | |
130 | ||
131 | struct res_mpt { | |
132 | struct res_common com; | |
133 | struct res_mtt *mtt; | |
134 | int key; | |
135 | }; | |
136 | ||
137 | enum res_eq_states { | |
138 | RES_EQ_BUSY = RES_ANY_BUSY, | |
139 | RES_EQ_RESERVED, | |
140 | RES_EQ_HW, | |
141 | }; | |
142 | ||
143 | struct res_eq { | |
144 | struct res_common com; | |
145 | struct res_mtt *mtt; | |
146 | }; | |
147 | ||
148 | enum res_cq_states { | |
149 | RES_CQ_BUSY = RES_ANY_BUSY, | |
150 | RES_CQ_ALLOCATED, | |
151 | RES_CQ_HW, | |
152 | }; | |
153 | ||
154 | struct res_cq { | |
155 | struct res_common com; | |
156 | struct res_mtt *mtt; | |
157 | atomic_t ref_count; | |
158 | }; | |
159 | ||
160 | enum res_srq_states { | |
161 | RES_SRQ_BUSY = RES_ANY_BUSY, | |
162 | RES_SRQ_ALLOCATED, | |
163 | RES_SRQ_HW, | |
164 | }; | |
165 | ||
c82e9aa0 EC |
166 | struct res_srq { |
167 | struct res_common com; | |
168 | struct res_mtt *mtt; | |
169 | struct res_cq *cq; | |
170 | atomic_t ref_count; | |
171 | }; | |
172 | ||
173 | enum res_counter_states { | |
174 | RES_COUNTER_BUSY = RES_ANY_BUSY, | |
175 | RES_COUNTER_ALLOCATED, | |
176 | }; | |
177 | ||
c82e9aa0 EC |
178 | struct res_counter { |
179 | struct res_common com; | |
180 | int port; | |
181 | }; | |
182 | ||
ba062d52 JM |
183 | enum res_xrcdn_states { |
184 | RES_XRCD_BUSY = RES_ANY_BUSY, | |
185 | RES_XRCD_ALLOCATED, | |
186 | }; | |
187 | ||
188 | struct res_xrcdn { | |
189 | struct res_common com; | |
190 | int port; | |
191 | }; | |
192 | ||
1b9c6b06 HHZ |
193 | enum res_fs_rule_states { |
194 | RES_FS_RULE_BUSY = RES_ANY_BUSY, | |
195 | RES_FS_RULE_ALLOCATED, | |
196 | }; | |
197 | ||
198 | struct res_fs_rule { | |
199 | struct res_common com; | |
200 | }; | |
201 | ||
4af1c048 HHZ |
202 | static void *res_tracker_lookup(struct rb_root *root, u64 res_id) |
203 | { | |
204 | struct rb_node *node = root->rb_node; | |
205 | ||
206 | while (node) { | |
207 | struct res_common *res = container_of(node, struct res_common, | |
208 | node); | |
209 | ||
210 | if (res_id < res->res_id) | |
211 | node = node->rb_left; | |
212 | else if (res_id > res->res_id) | |
213 | node = node->rb_right; | |
214 | else | |
215 | return res; | |
216 | } | |
217 | return NULL; | |
218 | } | |
219 | ||
220 | static int res_tracker_insert(struct rb_root *root, struct res_common *res) | |
221 | { | |
222 | struct rb_node **new = &(root->rb_node), *parent = NULL; | |
223 | ||
224 | /* Figure out where to put new node */ | |
225 | while (*new) { | |
226 | struct res_common *this = container_of(*new, struct res_common, | |
227 | node); | |
228 | ||
229 | parent = *new; | |
230 | if (res->res_id < this->res_id) | |
231 | new = &((*new)->rb_left); | |
232 | else if (res->res_id > this->res_id) | |
233 | new = &((*new)->rb_right); | |
234 | else | |
235 | return -EEXIST; | |
236 | } | |
237 | ||
238 | /* Add new node and rebalance tree. */ | |
239 | rb_link_node(&res->node, parent, new); | |
240 | rb_insert_color(&res->node, root); | |
241 | ||
242 | return 0; | |
243 | } | |
244 | ||
54679e14 JM |
245 | enum qp_transition { |
246 | QP_TRANS_INIT2RTR, | |
247 | QP_TRANS_RTR2RTS, | |
248 | QP_TRANS_RTS2RTS, | |
249 | QP_TRANS_SQERR2RTS, | |
250 | QP_TRANS_SQD2SQD, | |
251 | QP_TRANS_SQD2RTS | |
252 | }; | |
253 | ||
c82e9aa0 EC |
254 | /* For Debug uses */ |
255 | static const char *ResourceType(enum mlx4_resource rt) | |
256 | { | |
257 | switch (rt) { | |
258 | case RES_QP: return "RES_QP"; | |
259 | case RES_CQ: return "RES_CQ"; | |
260 | case RES_SRQ: return "RES_SRQ"; | |
261 | case RES_MPT: return "RES_MPT"; | |
262 | case RES_MTT: return "RES_MTT"; | |
263 | case RES_MAC: return "RES_MAC"; | |
264 | case RES_EQ: return "RES_EQ"; | |
265 | case RES_COUNTER: return "RES_COUNTER"; | |
1b9c6b06 | 266 | case RES_FS_RULE: return "RES_FS_RULE"; |
ba062d52 | 267 | case RES_XRCD: return "RES_XRCD"; |
c82e9aa0 EC |
268 | default: return "Unknown resource type !!!"; |
269 | }; | |
270 | } | |
271 | ||
c82e9aa0 EC |
272 | int mlx4_init_resource_tracker(struct mlx4_dev *dev) |
273 | { | |
274 | struct mlx4_priv *priv = mlx4_priv(dev); | |
275 | int i; | |
276 | int t; | |
277 | ||
278 | priv->mfunc.master.res_tracker.slave_list = | |
279 | kzalloc(dev->num_slaves * sizeof(struct slave_list), | |
280 | GFP_KERNEL); | |
281 | if (!priv->mfunc.master.res_tracker.slave_list) | |
282 | return -ENOMEM; | |
283 | ||
284 | for (i = 0 ; i < dev->num_slaves; i++) { | |
285 | for (t = 0; t < MLX4_NUM_OF_RESOURCE_TYPE; ++t) | |
286 | INIT_LIST_HEAD(&priv->mfunc.master.res_tracker. | |
287 | slave_list[i].res_list[t]); | |
288 | mutex_init(&priv->mfunc.master.res_tracker.slave_list[i].mutex); | |
289 | } | |
290 | ||
291 | mlx4_dbg(dev, "Started init_resource_tracker: %ld slaves\n", | |
292 | dev->num_slaves); | |
293 | for (i = 0 ; i < MLX4_NUM_OF_RESOURCE_TYPE; i++) | |
4af1c048 | 294 | priv->mfunc.master.res_tracker.res_tree[i] = RB_ROOT; |
c82e9aa0 EC |
295 | |
296 | spin_lock_init(&priv->mfunc.master.res_tracker.lock); | |
297 | return 0 ; | |
298 | } | |
299 | ||
b8924951 JM |
300 | void mlx4_free_resource_tracker(struct mlx4_dev *dev, |
301 | enum mlx4_res_tracker_free_type type) | |
c82e9aa0 EC |
302 | { |
303 | struct mlx4_priv *priv = mlx4_priv(dev); | |
304 | int i; | |
305 | ||
306 | if (priv->mfunc.master.res_tracker.slave_list) { | |
b8924951 JM |
307 | if (type != RES_TR_FREE_STRUCTS_ONLY) |
308 | for (i = 0 ; i < dev->num_slaves; i++) | |
309 | if (type == RES_TR_FREE_ALL || | |
310 | dev->caps.function != i) | |
311 | mlx4_delete_all_resources_for_slave(dev, i); | |
312 | ||
313 | if (type != RES_TR_FREE_SLAVES_ONLY) { | |
314 | kfree(priv->mfunc.master.res_tracker.slave_list); | |
315 | priv->mfunc.master.res_tracker.slave_list = NULL; | |
316 | } | |
c82e9aa0 EC |
317 | } |
318 | } | |
319 | ||
54679e14 JM |
320 | static void update_pkey_index(struct mlx4_dev *dev, int slave, |
321 | struct mlx4_cmd_mailbox *inbox) | |
c82e9aa0 | 322 | { |
54679e14 JM |
323 | u8 sched = *(u8 *)(inbox->buf + 64); |
324 | u8 orig_index = *(u8 *)(inbox->buf + 35); | |
325 | u8 new_index; | |
326 | struct mlx4_priv *priv = mlx4_priv(dev); | |
327 | int port; | |
328 | ||
329 | port = (sched >> 6 & 1) + 1; | |
330 | ||
331 | new_index = priv->virt2phys_pkey[slave][port - 1][orig_index]; | |
332 | *(u8 *)(inbox->buf + 35) = new_index; | |
54679e14 JM |
333 | } |
334 | ||
335 | static void update_gid(struct mlx4_dev *dev, struct mlx4_cmd_mailbox *inbox, | |
336 | u8 slave) | |
337 | { | |
338 | struct mlx4_qp_context *qp_ctx = inbox->buf + 8; | |
339 | enum mlx4_qp_optpar optpar = be32_to_cpu(*(__be32 *) inbox->buf); | |
340 | u32 ts = (be32_to_cpu(qp_ctx->flags) >> 16) & 0xff; | |
c82e9aa0 EC |
341 | |
342 | if (MLX4_QP_ST_UD == ts) | |
343 | qp_ctx->pri_path.mgid_index = 0x80 | slave; | |
344 | ||
54679e14 JM |
345 | if (MLX4_QP_ST_RC == ts || MLX4_QP_ST_UC == ts) { |
346 | if (optpar & MLX4_QP_OPTPAR_PRIMARY_ADDR_PATH) | |
347 | qp_ctx->pri_path.mgid_index = slave & 0x7F; | |
348 | if (optpar & MLX4_QP_OPTPAR_ALT_ADDR_PATH) | |
349 | qp_ctx->alt_path.mgid_index = slave & 0x7F; | |
350 | } | |
c82e9aa0 EC |
351 | } |
352 | ||
353 | static int mpt_mask(struct mlx4_dev *dev) | |
354 | { | |
355 | return dev->caps.num_mpts - 1; | |
356 | } | |
357 | ||
358 | static void *find_res(struct mlx4_dev *dev, int res_id, | |
359 | enum mlx4_resource type) | |
360 | { | |
361 | struct mlx4_priv *priv = mlx4_priv(dev); | |
362 | ||
4af1c048 HHZ |
363 | return res_tracker_lookup(&priv->mfunc.master.res_tracker.res_tree[type], |
364 | res_id); | |
c82e9aa0 EC |
365 | } |
366 | ||
aa1ec3dd | 367 | static int get_res(struct mlx4_dev *dev, int slave, u64 res_id, |
c82e9aa0 EC |
368 | enum mlx4_resource type, |
369 | void *res) | |
370 | { | |
371 | struct res_common *r; | |
372 | int err = 0; | |
373 | ||
374 | spin_lock_irq(mlx4_tlock(dev)); | |
375 | r = find_res(dev, res_id, type); | |
376 | if (!r) { | |
377 | err = -ENONET; | |
378 | goto exit; | |
379 | } | |
380 | ||
381 | if (r->state == RES_ANY_BUSY) { | |
382 | err = -EBUSY; | |
383 | goto exit; | |
384 | } | |
385 | ||
386 | if (r->owner != slave) { | |
387 | err = -EPERM; | |
388 | goto exit; | |
389 | } | |
390 | ||
391 | r->from_state = r->state; | |
392 | r->state = RES_ANY_BUSY; | |
c82e9aa0 EC |
393 | |
394 | if (res) | |
395 | *((struct res_common **)res) = r; | |
396 | ||
397 | exit: | |
398 | spin_unlock_irq(mlx4_tlock(dev)); | |
399 | return err; | |
400 | } | |
401 | ||
402 | int mlx4_get_slave_from_resource_id(struct mlx4_dev *dev, | |
403 | enum mlx4_resource type, | |
aa1ec3dd | 404 | u64 res_id, int *slave) |
c82e9aa0 EC |
405 | { |
406 | ||
407 | struct res_common *r; | |
408 | int err = -ENOENT; | |
409 | int id = res_id; | |
410 | ||
411 | if (type == RES_QP) | |
412 | id &= 0x7fffff; | |
996b0541 | 413 | spin_lock(mlx4_tlock(dev)); |
c82e9aa0 EC |
414 | |
415 | r = find_res(dev, id, type); | |
416 | if (r) { | |
417 | *slave = r->owner; | |
418 | err = 0; | |
419 | } | |
996b0541 | 420 | spin_unlock(mlx4_tlock(dev)); |
c82e9aa0 EC |
421 | |
422 | return err; | |
423 | } | |
424 | ||
aa1ec3dd | 425 | static void put_res(struct mlx4_dev *dev, int slave, u64 res_id, |
c82e9aa0 EC |
426 | enum mlx4_resource type) |
427 | { | |
428 | struct res_common *r; | |
429 | ||
430 | spin_lock_irq(mlx4_tlock(dev)); | |
431 | r = find_res(dev, res_id, type); | |
432 | if (r) | |
433 | r->state = r->from_state; | |
434 | spin_unlock_irq(mlx4_tlock(dev)); | |
435 | } | |
436 | ||
437 | static struct res_common *alloc_qp_tr(int id) | |
438 | { | |
439 | struct res_qp *ret; | |
440 | ||
441 | ret = kzalloc(sizeof *ret, GFP_KERNEL); | |
442 | if (!ret) | |
443 | return NULL; | |
444 | ||
445 | ret->com.res_id = id; | |
446 | ret->com.state = RES_QP_RESERVED; | |
2531188b | 447 | ret->local_qpn = id; |
c82e9aa0 EC |
448 | INIT_LIST_HEAD(&ret->mcg_list); |
449 | spin_lock_init(&ret->mcg_spl); | |
450 | ||
451 | return &ret->com; | |
452 | } | |
453 | ||
454 | static struct res_common *alloc_mtt_tr(int id, int order) | |
455 | { | |
456 | struct res_mtt *ret; | |
457 | ||
458 | ret = kzalloc(sizeof *ret, GFP_KERNEL); | |
459 | if (!ret) | |
460 | return NULL; | |
461 | ||
462 | ret->com.res_id = id; | |
463 | ret->order = order; | |
464 | ret->com.state = RES_MTT_ALLOCATED; | |
465 | atomic_set(&ret->ref_count, 0); | |
466 | ||
467 | return &ret->com; | |
468 | } | |
469 | ||
470 | static struct res_common *alloc_mpt_tr(int id, int key) | |
471 | { | |
472 | struct res_mpt *ret; | |
473 | ||
474 | ret = kzalloc(sizeof *ret, GFP_KERNEL); | |
475 | if (!ret) | |
476 | return NULL; | |
477 | ||
478 | ret->com.res_id = id; | |
479 | ret->com.state = RES_MPT_RESERVED; | |
480 | ret->key = key; | |
481 | ||
482 | return &ret->com; | |
483 | } | |
484 | ||
485 | static struct res_common *alloc_eq_tr(int id) | |
486 | { | |
487 | struct res_eq *ret; | |
488 | ||
489 | ret = kzalloc(sizeof *ret, GFP_KERNEL); | |
490 | if (!ret) | |
491 | return NULL; | |
492 | ||
493 | ret->com.res_id = id; | |
494 | ret->com.state = RES_EQ_RESERVED; | |
495 | ||
496 | return &ret->com; | |
497 | } | |
498 | ||
499 | static struct res_common *alloc_cq_tr(int id) | |
500 | { | |
501 | struct res_cq *ret; | |
502 | ||
503 | ret = kzalloc(sizeof *ret, GFP_KERNEL); | |
504 | if (!ret) | |
505 | return NULL; | |
506 | ||
507 | ret->com.res_id = id; | |
508 | ret->com.state = RES_CQ_ALLOCATED; | |
509 | atomic_set(&ret->ref_count, 0); | |
510 | ||
511 | return &ret->com; | |
512 | } | |
513 | ||
514 | static struct res_common *alloc_srq_tr(int id) | |
515 | { | |
516 | struct res_srq *ret; | |
517 | ||
518 | ret = kzalloc(sizeof *ret, GFP_KERNEL); | |
519 | if (!ret) | |
520 | return NULL; | |
521 | ||
522 | ret->com.res_id = id; | |
523 | ret->com.state = RES_SRQ_ALLOCATED; | |
524 | atomic_set(&ret->ref_count, 0); | |
525 | ||
526 | return &ret->com; | |
527 | } | |
528 | ||
529 | static struct res_common *alloc_counter_tr(int id) | |
530 | { | |
531 | struct res_counter *ret; | |
532 | ||
533 | ret = kzalloc(sizeof *ret, GFP_KERNEL); | |
534 | if (!ret) | |
535 | return NULL; | |
536 | ||
537 | ret->com.res_id = id; | |
538 | ret->com.state = RES_COUNTER_ALLOCATED; | |
539 | ||
540 | return &ret->com; | |
541 | } | |
542 | ||
ba062d52 JM |
543 | static struct res_common *alloc_xrcdn_tr(int id) |
544 | { | |
545 | struct res_xrcdn *ret; | |
546 | ||
547 | ret = kzalloc(sizeof *ret, GFP_KERNEL); | |
548 | if (!ret) | |
549 | return NULL; | |
550 | ||
551 | ret->com.res_id = id; | |
552 | ret->com.state = RES_XRCD_ALLOCATED; | |
553 | ||
554 | return &ret->com; | |
555 | } | |
556 | ||
1b9c6b06 HHZ |
557 | static struct res_common *alloc_fs_rule_tr(u64 id) |
558 | { | |
559 | struct res_fs_rule *ret; | |
560 | ||
561 | ret = kzalloc(sizeof *ret, GFP_KERNEL); | |
562 | if (!ret) | |
563 | return NULL; | |
564 | ||
565 | ret->com.res_id = id; | |
566 | ret->com.state = RES_FS_RULE_ALLOCATED; | |
567 | ||
568 | return &ret->com; | |
569 | } | |
570 | ||
aa1ec3dd | 571 | static struct res_common *alloc_tr(u64 id, enum mlx4_resource type, int slave, |
c82e9aa0 EC |
572 | int extra) |
573 | { | |
574 | struct res_common *ret; | |
575 | ||
576 | switch (type) { | |
577 | case RES_QP: | |
578 | ret = alloc_qp_tr(id); | |
579 | break; | |
580 | case RES_MPT: | |
581 | ret = alloc_mpt_tr(id, extra); | |
582 | break; | |
583 | case RES_MTT: | |
584 | ret = alloc_mtt_tr(id, extra); | |
585 | break; | |
586 | case RES_EQ: | |
587 | ret = alloc_eq_tr(id); | |
588 | break; | |
589 | case RES_CQ: | |
590 | ret = alloc_cq_tr(id); | |
591 | break; | |
592 | case RES_SRQ: | |
593 | ret = alloc_srq_tr(id); | |
594 | break; | |
595 | case RES_MAC: | |
596 | printk(KERN_ERR "implementation missing\n"); | |
597 | return NULL; | |
598 | case RES_COUNTER: | |
599 | ret = alloc_counter_tr(id); | |
600 | break; | |
ba062d52 JM |
601 | case RES_XRCD: |
602 | ret = alloc_xrcdn_tr(id); | |
603 | break; | |
1b9c6b06 HHZ |
604 | case RES_FS_RULE: |
605 | ret = alloc_fs_rule_tr(id); | |
606 | break; | |
c82e9aa0 EC |
607 | default: |
608 | return NULL; | |
609 | } | |
610 | if (ret) | |
611 | ret->owner = slave; | |
612 | ||
613 | return ret; | |
614 | } | |
615 | ||
aa1ec3dd | 616 | static int add_res_range(struct mlx4_dev *dev, int slave, u64 base, int count, |
c82e9aa0 EC |
617 | enum mlx4_resource type, int extra) |
618 | { | |
619 | int i; | |
620 | int err; | |
621 | struct mlx4_priv *priv = mlx4_priv(dev); | |
622 | struct res_common **res_arr; | |
623 | struct mlx4_resource_tracker *tracker = &priv->mfunc.master.res_tracker; | |
4af1c048 | 624 | struct rb_root *root = &tracker->res_tree[type]; |
c82e9aa0 EC |
625 | |
626 | res_arr = kzalloc(count * sizeof *res_arr, GFP_KERNEL); | |
627 | if (!res_arr) | |
628 | return -ENOMEM; | |
629 | ||
630 | for (i = 0; i < count; ++i) { | |
631 | res_arr[i] = alloc_tr(base + i, type, slave, extra); | |
632 | if (!res_arr[i]) { | |
633 | for (--i; i >= 0; --i) | |
634 | kfree(res_arr[i]); | |
635 | ||
636 | kfree(res_arr); | |
637 | return -ENOMEM; | |
638 | } | |
639 | } | |
640 | ||
641 | spin_lock_irq(mlx4_tlock(dev)); | |
642 | for (i = 0; i < count; ++i) { | |
643 | if (find_res(dev, base + i, type)) { | |
644 | err = -EEXIST; | |
645 | goto undo; | |
646 | } | |
4af1c048 | 647 | err = res_tracker_insert(root, res_arr[i]); |
c82e9aa0 EC |
648 | if (err) |
649 | goto undo; | |
650 | list_add_tail(&res_arr[i]->list, | |
651 | &tracker->slave_list[slave].res_list[type]); | |
652 | } | |
653 | spin_unlock_irq(mlx4_tlock(dev)); | |
654 | kfree(res_arr); | |
655 | ||
656 | return 0; | |
657 | ||
658 | undo: | |
659 | for (--i; i >= base; --i) | |
4af1c048 | 660 | rb_erase(&res_arr[i]->node, root); |
c82e9aa0 EC |
661 | |
662 | spin_unlock_irq(mlx4_tlock(dev)); | |
663 | ||
664 | for (i = 0; i < count; ++i) | |
665 | kfree(res_arr[i]); | |
666 | ||
667 | kfree(res_arr); | |
668 | ||
669 | return err; | |
670 | } | |
671 | ||
672 | static int remove_qp_ok(struct res_qp *res) | |
673 | { | |
674 | if (res->com.state == RES_QP_BUSY) | |
675 | return -EBUSY; | |
676 | else if (res->com.state != RES_QP_RESERVED) | |
677 | return -EPERM; | |
678 | ||
679 | return 0; | |
680 | } | |
681 | ||
682 | static int remove_mtt_ok(struct res_mtt *res, int order) | |
683 | { | |
684 | if (res->com.state == RES_MTT_BUSY || | |
685 | atomic_read(&res->ref_count)) { | |
686 | printk(KERN_DEBUG "%s-%d: state %s, ref_count %d\n", | |
687 | __func__, __LINE__, | |
688 | mtt_states_str(res->com.state), | |
689 | atomic_read(&res->ref_count)); | |
690 | return -EBUSY; | |
691 | } else if (res->com.state != RES_MTT_ALLOCATED) | |
692 | return -EPERM; | |
693 | else if (res->order != order) | |
694 | return -EINVAL; | |
695 | ||
696 | return 0; | |
697 | } | |
698 | ||
699 | static int remove_mpt_ok(struct res_mpt *res) | |
700 | { | |
701 | if (res->com.state == RES_MPT_BUSY) | |
702 | return -EBUSY; | |
703 | else if (res->com.state != RES_MPT_RESERVED) | |
704 | return -EPERM; | |
705 | ||
706 | return 0; | |
707 | } | |
708 | ||
709 | static int remove_eq_ok(struct res_eq *res) | |
710 | { | |
711 | if (res->com.state == RES_MPT_BUSY) | |
712 | return -EBUSY; | |
713 | else if (res->com.state != RES_MPT_RESERVED) | |
714 | return -EPERM; | |
715 | ||
716 | return 0; | |
717 | } | |
718 | ||
719 | static int remove_counter_ok(struct res_counter *res) | |
720 | { | |
721 | if (res->com.state == RES_COUNTER_BUSY) | |
722 | return -EBUSY; | |
723 | else if (res->com.state != RES_COUNTER_ALLOCATED) | |
724 | return -EPERM; | |
725 | ||
726 | return 0; | |
727 | } | |
728 | ||
ba062d52 JM |
729 | static int remove_xrcdn_ok(struct res_xrcdn *res) |
730 | { | |
731 | if (res->com.state == RES_XRCD_BUSY) | |
732 | return -EBUSY; | |
733 | else if (res->com.state != RES_XRCD_ALLOCATED) | |
734 | return -EPERM; | |
735 | ||
736 | return 0; | |
737 | } | |
738 | ||
1b9c6b06 HHZ |
739 | static int remove_fs_rule_ok(struct res_fs_rule *res) |
740 | { | |
741 | if (res->com.state == RES_FS_RULE_BUSY) | |
742 | return -EBUSY; | |
743 | else if (res->com.state != RES_FS_RULE_ALLOCATED) | |
744 | return -EPERM; | |
745 | ||
746 | return 0; | |
747 | } | |
748 | ||
c82e9aa0 EC |
749 | static int remove_cq_ok(struct res_cq *res) |
750 | { | |
751 | if (res->com.state == RES_CQ_BUSY) | |
752 | return -EBUSY; | |
753 | else if (res->com.state != RES_CQ_ALLOCATED) | |
754 | return -EPERM; | |
755 | ||
756 | return 0; | |
757 | } | |
758 | ||
759 | static int remove_srq_ok(struct res_srq *res) | |
760 | { | |
761 | if (res->com.state == RES_SRQ_BUSY) | |
762 | return -EBUSY; | |
763 | else if (res->com.state != RES_SRQ_ALLOCATED) | |
764 | return -EPERM; | |
765 | ||
766 | return 0; | |
767 | } | |
768 | ||
769 | static int remove_ok(struct res_common *res, enum mlx4_resource type, int extra) | |
770 | { | |
771 | switch (type) { | |
772 | case RES_QP: | |
773 | return remove_qp_ok((struct res_qp *)res); | |
774 | case RES_CQ: | |
775 | return remove_cq_ok((struct res_cq *)res); | |
776 | case RES_SRQ: | |
777 | return remove_srq_ok((struct res_srq *)res); | |
778 | case RES_MPT: | |
779 | return remove_mpt_ok((struct res_mpt *)res); | |
780 | case RES_MTT: | |
781 | return remove_mtt_ok((struct res_mtt *)res, extra); | |
782 | case RES_MAC: | |
783 | return -ENOSYS; | |
784 | case RES_EQ: | |
785 | return remove_eq_ok((struct res_eq *)res); | |
786 | case RES_COUNTER: | |
787 | return remove_counter_ok((struct res_counter *)res); | |
ba062d52 JM |
788 | case RES_XRCD: |
789 | return remove_xrcdn_ok((struct res_xrcdn *)res); | |
1b9c6b06 HHZ |
790 | case RES_FS_RULE: |
791 | return remove_fs_rule_ok((struct res_fs_rule *)res); | |
c82e9aa0 EC |
792 | default: |
793 | return -EINVAL; | |
794 | } | |
795 | } | |
796 | ||
aa1ec3dd | 797 | static int rem_res_range(struct mlx4_dev *dev, int slave, u64 base, int count, |
c82e9aa0 EC |
798 | enum mlx4_resource type, int extra) |
799 | { | |
aa1ec3dd | 800 | u64 i; |
c82e9aa0 EC |
801 | int err; |
802 | struct mlx4_priv *priv = mlx4_priv(dev); | |
803 | struct mlx4_resource_tracker *tracker = &priv->mfunc.master.res_tracker; | |
804 | struct res_common *r; | |
805 | ||
806 | spin_lock_irq(mlx4_tlock(dev)); | |
807 | for (i = base; i < base + count; ++i) { | |
4af1c048 | 808 | r = res_tracker_lookup(&tracker->res_tree[type], i); |
c82e9aa0 EC |
809 | if (!r) { |
810 | err = -ENOENT; | |
811 | goto out; | |
812 | } | |
813 | if (r->owner != slave) { | |
814 | err = -EPERM; | |
815 | goto out; | |
816 | } | |
817 | err = remove_ok(r, type, extra); | |
818 | if (err) | |
819 | goto out; | |
820 | } | |
821 | ||
822 | for (i = base; i < base + count; ++i) { | |
4af1c048 HHZ |
823 | r = res_tracker_lookup(&tracker->res_tree[type], i); |
824 | rb_erase(&r->node, &tracker->res_tree[type]); | |
c82e9aa0 EC |
825 | list_del(&r->list); |
826 | kfree(r); | |
827 | } | |
828 | err = 0; | |
829 | ||
830 | out: | |
831 | spin_unlock_irq(mlx4_tlock(dev)); | |
832 | ||
833 | return err; | |
834 | } | |
835 | ||
836 | static int qp_res_start_move_to(struct mlx4_dev *dev, int slave, int qpn, | |
837 | enum res_qp_states state, struct res_qp **qp, | |
838 | int alloc) | |
839 | { | |
840 | struct mlx4_priv *priv = mlx4_priv(dev); | |
841 | struct mlx4_resource_tracker *tracker = &priv->mfunc.master.res_tracker; | |
842 | struct res_qp *r; | |
843 | int err = 0; | |
844 | ||
845 | spin_lock_irq(mlx4_tlock(dev)); | |
4af1c048 | 846 | r = res_tracker_lookup(&tracker->res_tree[RES_QP], qpn); |
c82e9aa0 EC |
847 | if (!r) |
848 | err = -ENOENT; | |
849 | else if (r->com.owner != slave) | |
850 | err = -EPERM; | |
851 | else { | |
852 | switch (state) { | |
853 | case RES_QP_BUSY: | |
aa1ec3dd | 854 | mlx4_dbg(dev, "%s: failed RES_QP, 0x%llx\n", |
c82e9aa0 EC |
855 | __func__, r->com.res_id); |
856 | err = -EBUSY; | |
857 | break; | |
858 | ||
859 | case RES_QP_RESERVED: | |
860 | if (r->com.state == RES_QP_MAPPED && !alloc) | |
861 | break; | |
862 | ||
aa1ec3dd | 863 | mlx4_dbg(dev, "failed RES_QP, 0x%llx\n", r->com.res_id); |
c82e9aa0 EC |
864 | err = -EINVAL; |
865 | break; | |
866 | ||
867 | case RES_QP_MAPPED: | |
868 | if ((r->com.state == RES_QP_RESERVED && alloc) || | |
869 | r->com.state == RES_QP_HW) | |
870 | break; | |
871 | else { | |
aa1ec3dd | 872 | mlx4_dbg(dev, "failed RES_QP, 0x%llx\n", |
c82e9aa0 EC |
873 | r->com.res_id); |
874 | err = -EINVAL; | |
875 | } | |
876 | ||
877 | break; | |
878 | ||
879 | case RES_QP_HW: | |
880 | if (r->com.state != RES_QP_MAPPED) | |
881 | err = -EINVAL; | |
882 | break; | |
883 | default: | |
884 | err = -EINVAL; | |
885 | } | |
886 | ||
887 | if (!err) { | |
888 | r->com.from_state = r->com.state; | |
889 | r->com.to_state = state; | |
890 | r->com.state = RES_QP_BUSY; | |
891 | if (qp) | |
64699336 | 892 | *qp = r; |
c82e9aa0 EC |
893 | } |
894 | } | |
895 | ||
896 | spin_unlock_irq(mlx4_tlock(dev)); | |
897 | ||
898 | return err; | |
899 | } | |
900 | ||
901 | static int mr_res_start_move_to(struct mlx4_dev *dev, int slave, int index, | |
902 | enum res_mpt_states state, struct res_mpt **mpt) | |
903 | { | |
904 | struct mlx4_priv *priv = mlx4_priv(dev); | |
905 | struct mlx4_resource_tracker *tracker = &priv->mfunc.master.res_tracker; | |
906 | struct res_mpt *r; | |
907 | int err = 0; | |
908 | ||
909 | spin_lock_irq(mlx4_tlock(dev)); | |
4af1c048 | 910 | r = res_tracker_lookup(&tracker->res_tree[RES_MPT], index); |
c82e9aa0 EC |
911 | if (!r) |
912 | err = -ENOENT; | |
913 | else if (r->com.owner != slave) | |
914 | err = -EPERM; | |
915 | else { | |
916 | switch (state) { | |
917 | case RES_MPT_BUSY: | |
918 | err = -EINVAL; | |
919 | break; | |
920 | ||
921 | case RES_MPT_RESERVED: | |
922 | if (r->com.state != RES_MPT_MAPPED) | |
923 | err = -EINVAL; | |
924 | break; | |
925 | ||
926 | case RES_MPT_MAPPED: | |
927 | if (r->com.state != RES_MPT_RESERVED && | |
928 | r->com.state != RES_MPT_HW) | |
929 | err = -EINVAL; | |
930 | break; | |
931 | ||
932 | case RES_MPT_HW: | |
933 | if (r->com.state != RES_MPT_MAPPED) | |
934 | err = -EINVAL; | |
935 | break; | |
936 | default: | |
937 | err = -EINVAL; | |
938 | } | |
939 | ||
940 | if (!err) { | |
941 | r->com.from_state = r->com.state; | |
942 | r->com.to_state = state; | |
943 | r->com.state = RES_MPT_BUSY; | |
944 | if (mpt) | |
64699336 | 945 | *mpt = r; |
c82e9aa0 EC |
946 | } |
947 | } | |
948 | ||
949 | spin_unlock_irq(mlx4_tlock(dev)); | |
950 | ||
951 | return err; | |
952 | } | |
953 | ||
954 | static int eq_res_start_move_to(struct mlx4_dev *dev, int slave, int index, | |
955 | enum res_eq_states state, struct res_eq **eq) | |
956 | { | |
957 | struct mlx4_priv *priv = mlx4_priv(dev); | |
958 | struct mlx4_resource_tracker *tracker = &priv->mfunc.master.res_tracker; | |
959 | struct res_eq *r; | |
960 | int err = 0; | |
961 | ||
962 | spin_lock_irq(mlx4_tlock(dev)); | |
4af1c048 | 963 | r = res_tracker_lookup(&tracker->res_tree[RES_EQ], index); |
c82e9aa0 EC |
964 | if (!r) |
965 | err = -ENOENT; | |
966 | else if (r->com.owner != slave) | |
967 | err = -EPERM; | |
968 | else { | |
969 | switch (state) { | |
970 | case RES_EQ_BUSY: | |
971 | err = -EINVAL; | |
972 | break; | |
973 | ||
974 | case RES_EQ_RESERVED: | |
975 | if (r->com.state != RES_EQ_HW) | |
976 | err = -EINVAL; | |
977 | break; | |
978 | ||
979 | case RES_EQ_HW: | |
980 | if (r->com.state != RES_EQ_RESERVED) | |
981 | err = -EINVAL; | |
982 | break; | |
983 | ||
984 | default: | |
985 | err = -EINVAL; | |
986 | } | |
987 | ||
988 | if (!err) { | |
989 | r->com.from_state = r->com.state; | |
990 | r->com.to_state = state; | |
991 | r->com.state = RES_EQ_BUSY; | |
992 | if (eq) | |
993 | *eq = r; | |
994 | } | |
995 | } | |
996 | ||
997 | spin_unlock_irq(mlx4_tlock(dev)); | |
998 | ||
999 | return err; | |
1000 | } | |
1001 | ||
1002 | static int cq_res_start_move_to(struct mlx4_dev *dev, int slave, int cqn, | |
1003 | enum res_cq_states state, struct res_cq **cq) | |
1004 | { | |
1005 | struct mlx4_priv *priv = mlx4_priv(dev); | |
1006 | struct mlx4_resource_tracker *tracker = &priv->mfunc.master.res_tracker; | |
1007 | struct res_cq *r; | |
1008 | int err; | |
1009 | ||
1010 | spin_lock_irq(mlx4_tlock(dev)); | |
4af1c048 | 1011 | r = res_tracker_lookup(&tracker->res_tree[RES_CQ], cqn); |
c82e9aa0 EC |
1012 | if (!r) |
1013 | err = -ENOENT; | |
1014 | else if (r->com.owner != slave) | |
1015 | err = -EPERM; | |
1016 | else { | |
1017 | switch (state) { | |
1018 | case RES_CQ_BUSY: | |
1019 | err = -EBUSY; | |
1020 | break; | |
1021 | ||
1022 | case RES_CQ_ALLOCATED: | |
1023 | if (r->com.state != RES_CQ_HW) | |
1024 | err = -EINVAL; | |
1025 | else if (atomic_read(&r->ref_count)) | |
1026 | err = -EBUSY; | |
1027 | else | |
1028 | err = 0; | |
1029 | break; | |
1030 | ||
1031 | case RES_CQ_HW: | |
1032 | if (r->com.state != RES_CQ_ALLOCATED) | |
1033 | err = -EINVAL; | |
1034 | else | |
1035 | err = 0; | |
1036 | break; | |
1037 | ||
1038 | default: | |
1039 | err = -EINVAL; | |
1040 | } | |
1041 | ||
1042 | if (!err) { | |
1043 | r->com.from_state = r->com.state; | |
1044 | r->com.to_state = state; | |
1045 | r->com.state = RES_CQ_BUSY; | |
1046 | if (cq) | |
1047 | *cq = r; | |
1048 | } | |
1049 | } | |
1050 | ||
1051 | spin_unlock_irq(mlx4_tlock(dev)); | |
1052 | ||
1053 | return err; | |
1054 | } | |
1055 | ||
1056 | static int srq_res_start_move_to(struct mlx4_dev *dev, int slave, int index, | |
1057 | enum res_cq_states state, struct res_srq **srq) | |
1058 | { | |
1059 | struct mlx4_priv *priv = mlx4_priv(dev); | |
1060 | struct mlx4_resource_tracker *tracker = &priv->mfunc.master.res_tracker; | |
1061 | struct res_srq *r; | |
1062 | int err = 0; | |
1063 | ||
1064 | spin_lock_irq(mlx4_tlock(dev)); | |
4af1c048 | 1065 | r = res_tracker_lookup(&tracker->res_tree[RES_SRQ], index); |
c82e9aa0 EC |
1066 | if (!r) |
1067 | err = -ENOENT; | |
1068 | else if (r->com.owner != slave) | |
1069 | err = -EPERM; | |
1070 | else { | |
1071 | switch (state) { | |
1072 | case RES_SRQ_BUSY: | |
1073 | err = -EINVAL; | |
1074 | break; | |
1075 | ||
1076 | case RES_SRQ_ALLOCATED: | |
1077 | if (r->com.state != RES_SRQ_HW) | |
1078 | err = -EINVAL; | |
1079 | else if (atomic_read(&r->ref_count)) | |
1080 | err = -EBUSY; | |
1081 | break; | |
1082 | ||
1083 | case RES_SRQ_HW: | |
1084 | if (r->com.state != RES_SRQ_ALLOCATED) | |
1085 | err = -EINVAL; | |
1086 | break; | |
1087 | ||
1088 | default: | |
1089 | err = -EINVAL; | |
1090 | } | |
1091 | ||
1092 | if (!err) { | |
1093 | r->com.from_state = r->com.state; | |
1094 | r->com.to_state = state; | |
1095 | r->com.state = RES_SRQ_BUSY; | |
1096 | if (srq) | |
1097 | *srq = r; | |
1098 | } | |
1099 | } | |
1100 | ||
1101 | spin_unlock_irq(mlx4_tlock(dev)); | |
1102 | ||
1103 | return err; | |
1104 | } | |
1105 | ||
1106 | static void res_abort_move(struct mlx4_dev *dev, int slave, | |
1107 | enum mlx4_resource type, int id) | |
1108 | { | |
1109 | struct mlx4_priv *priv = mlx4_priv(dev); | |
1110 | struct mlx4_resource_tracker *tracker = &priv->mfunc.master.res_tracker; | |
1111 | struct res_common *r; | |
1112 | ||
1113 | spin_lock_irq(mlx4_tlock(dev)); | |
4af1c048 | 1114 | r = res_tracker_lookup(&tracker->res_tree[type], id); |
c82e9aa0 EC |
1115 | if (r && (r->owner == slave)) |
1116 | r->state = r->from_state; | |
1117 | spin_unlock_irq(mlx4_tlock(dev)); | |
1118 | } | |
1119 | ||
1120 | static void res_end_move(struct mlx4_dev *dev, int slave, | |
1121 | enum mlx4_resource type, int id) | |
1122 | { | |
1123 | struct mlx4_priv *priv = mlx4_priv(dev); | |
1124 | struct mlx4_resource_tracker *tracker = &priv->mfunc.master.res_tracker; | |
1125 | struct res_common *r; | |
1126 | ||
1127 | spin_lock_irq(mlx4_tlock(dev)); | |
4af1c048 | 1128 | r = res_tracker_lookup(&tracker->res_tree[type], id); |
c82e9aa0 EC |
1129 | if (r && (r->owner == slave)) |
1130 | r->state = r->to_state; | |
1131 | spin_unlock_irq(mlx4_tlock(dev)); | |
1132 | } | |
1133 | ||
1134 | static int valid_reserved(struct mlx4_dev *dev, int slave, int qpn) | |
1135 | { | |
e2c76824 JM |
1136 | return mlx4_is_qp_reserved(dev, qpn) && |
1137 | (mlx4_is_master(dev) || mlx4_is_guest_proxy(dev, slave, qpn)); | |
c82e9aa0 EC |
1138 | } |
1139 | ||
54679e14 JM |
1140 | static int fw_reserved(struct mlx4_dev *dev, int qpn) |
1141 | { | |
1142 | return qpn < dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FW]; | |
c82e9aa0 EC |
1143 | } |
1144 | ||
1145 | static int qp_alloc_res(struct mlx4_dev *dev, int slave, int op, int cmd, | |
1146 | u64 in_param, u64 *out_param) | |
1147 | { | |
1148 | int err; | |
1149 | int count; | |
1150 | int align; | |
1151 | int base; | |
1152 | int qpn; | |
1153 | ||
1154 | switch (op) { | |
1155 | case RES_OP_RESERVE: | |
1156 | count = get_param_l(&in_param); | |
1157 | align = get_param_h(&in_param); | |
1158 | err = __mlx4_qp_reserve_range(dev, count, align, &base); | |
1159 | if (err) | |
1160 | return err; | |
1161 | ||
1162 | err = add_res_range(dev, slave, base, count, RES_QP, 0); | |
1163 | if (err) { | |
1164 | __mlx4_qp_release_range(dev, base, count); | |
1165 | return err; | |
1166 | } | |
1167 | set_param_l(out_param, base); | |
1168 | break; | |
1169 | case RES_OP_MAP_ICM: | |
1170 | qpn = get_param_l(&in_param) & 0x7fffff; | |
1171 | if (valid_reserved(dev, slave, qpn)) { | |
1172 | err = add_res_range(dev, slave, qpn, 1, RES_QP, 0); | |
1173 | if (err) | |
1174 | return err; | |
1175 | } | |
1176 | ||
1177 | err = qp_res_start_move_to(dev, slave, qpn, RES_QP_MAPPED, | |
1178 | NULL, 1); | |
1179 | if (err) | |
1180 | return err; | |
1181 | ||
54679e14 | 1182 | if (!fw_reserved(dev, qpn)) { |
c82e9aa0 EC |
1183 | err = __mlx4_qp_alloc_icm(dev, qpn); |
1184 | if (err) { | |
1185 | res_abort_move(dev, slave, RES_QP, qpn); | |
1186 | return err; | |
1187 | } | |
1188 | } | |
1189 | ||
1190 | res_end_move(dev, slave, RES_QP, qpn); | |
1191 | break; | |
1192 | ||
1193 | default: | |
1194 | err = -EINVAL; | |
1195 | break; | |
1196 | } | |
1197 | return err; | |
1198 | } | |
1199 | ||
1200 | static int mtt_alloc_res(struct mlx4_dev *dev, int slave, int op, int cmd, | |
1201 | u64 in_param, u64 *out_param) | |
1202 | { | |
1203 | int err = -EINVAL; | |
1204 | int base; | |
1205 | int order; | |
1206 | ||
1207 | if (op != RES_OP_RESERVE_AND_MAP) | |
1208 | return err; | |
1209 | ||
1210 | order = get_param_l(&in_param); | |
1211 | base = __mlx4_alloc_mtt_range(dev, order); | |
1212 | if (base == -1) | |
1213 | return -ENOMEM; | |
1214 | ||
1215 | err = add_res_range(dev, slave, base, 1, RES_MTT, order); | |
1216 | if (err) | |
1217 | __mlx4_free_mtt_range(dev, base, order); | |
1218 | else | |
1219 | set_param_l(out_param, base); | |
1220 | ||
1221 | return err; | |
1222 | } | |
1223 | ||
1224 | static int mpt_alloc_res(struct mlx4_dev *dev, int slave, int op, int cmd, | |
1225 | u64 in_param, u64 *out_param) | |
1226 | { | |
1227 | int err = -EINVAL; | |
1228 | int index; | |
1229 | int id; | |
1230 | struct res_mpt *mpt; | |
1231 | ||
1232 | switch (op) { | |
1233 | case RES_OP_RESERVE: | |
b20e519a | 1234 | index = __mlx4_mpt_reserve(dev); |
c82e9aa0 EC |
1235 | if (index == -1) |
1236 | break; | |
1237 | id = index & mpt_mask(dev); | |
1238 | ||
1239 | err = add_res_range(dev, slave, id, 1, RES_MPT, index); | |
1240 | if (err) { | |
b20e519a | 1241 | __mlx4_mpt_release(dev, index); |
c82e9aa0 EC |
1242 | break; |
1243 | } | |
1244 | set_param_l(out_param, index); | |
1245 | break; | |
1246 | case RES_OP_MAP_ICM: | |
1247 | index = get_param_l(&in_param); | |
1248 | id = index & mpt_mask(dev); | |
1249 | err = mr_res_start_move_to(dev, slave, id, | |
1250 | RES_MPT_MAPPED, &mpt); | |
1251 | if (err) | |
1252 | return err; | |
1253 | ||
b20e519a | 1254 | err = __mlx4_mpt_alloc_icm(dev, mpt->key); |
c82e9aa0 EC |
1255 | if (err) { |
1256 | res_abort_move(dev, slave, RES_MPT, id); | |
1257 | return err; | |
1258 | } | |
1259 | ||
1260 | res_end_move(dev, slave, RES_MPT, id); | |
1261 | break; | |
1262 | } | |
1263 | return err; | |
1264 | } | |
1265 | ||
1266 | static int cq_alloc_res(struct mlx4_dev *dev, int slave, int op, int cmd, | |
1267 | u64 in_param, u64 *out_param) | |
1268 | { | |
1269 | int cqn; | |
1270 | int err; | |
1271 | ||
1272 | switch (op) { | |
1273 | case RES_OP_RESERVE_AND_MAP: | |
1274 | err = __mlx4_cq_alloc_icm(dev, &cqn); | |
1275 | if (err) | |
1276 | break; | |
1277 | ||
1278 | err = add_res_range(dev, slave, cqn, 1, RES_CQ, 0); | |
1279 | if (err) { | |
1280 | __mlx4_cq_free_icm(dev, cqn); | |
1281 | break; | |
1282 | } | |
1283 | ||
1284 | set_param_l(out_param, cqn); | |
1285 | break; | |
1286 | ||
1287 | default: | |
1288 | err = -EINVAL; | |
1289 | } | |
1290 | ||
1291 | return err; | |
1292 | } | |
1293 | ||
1294 | static int srq_alloc_res(struct mlx4_dev *dev, int slave, int op, int cmd, | |
1295 | u64 in_param, u64 *out_param) | |
1296 | { | |
1297 | int srqn; | |
1298 | int err; | |
1299 | ||
1300 | switch (op) { | |
1301 | case RES_OP_RESERVE_AND_MAP: | |
1302 | err = __mlx4_srq_alloc_icm(dev, &srqn); | |
1303 | if (err) | |
1304 | break; | |
1305 | ||
1306 | err = add_res_range(dev, slave, srqn, 1, RES_SRQ, 0); | |
1307 | if (err) { | |
1308 | __mlx4_srq_free_icm(dev, srqn); | |
1309 | break; | |
1310 | } | |
1311 | ||
1312 | set_param_l(out_param, srqn); | |
1313 | break; | |
1314 | ||
1315 | default: | |
1316 | err = -EINVAL; | |
1317 | } | |
1318 | ||
1319 | return err; | |
1320 | } | |
1321 | ||
1322 | static int mac_add_to_slave(struct mlx4_dev *dev, int slave, u64 mac, int port) | |
1323 | { | |
1324 | struct mlx4_priv *priv = mlx4_priv(dev); | |
1325 | struct mlx4_resource_tracker *tracker = &priv->mfunc.master.res_tracker; | |
1326 | struct mac_res *res; | |
1327 | ||
1328 | res = kzalloc(sizeof *res, GFP_KERNEL); | |
1329 | if (!res) | |
1330 | return -ENOMEM; | |
1331 | res->mac = mac; | |
1332 | res->port = (u8) port; | |
1333 | list_add_tail(&res->list, | |
1334 | &tracker->slave_list[slave].res_list[RES_MAC]); | |
1335 | return 0; | |
1336 | } | |
1337 | ||
1338 | static void mac_del_from_slave(struct mlx4_dev *dev, int slave, u64 mac, | |
1339 | int port) | |
1340 | { | |
1341 | struct mlx4_priv *priv = mlx4_priv(dev); | |
1342 | struct mlx4_resource_tracker *tracker = &priv->mfunc.master.res_tracker; | |
1343 | struct list_head *mac_list = | |
1344 | &tracker->slave_list[slave].res_list[RES_MAC]; | |
1345 | struct mac_res *res, *tmp; | |
1346 | ||
1347 | list_for_each_entry_safe(res, tmp, mac_list, list) { | |
1348 | if (res->mac == mac && res->port == (u8) port) { | |
1349 | list_del(&res->list); | |
1350 | kfree(res); | |
1351 | break; | |
1352 | } | |
1353 | } | |
1354 | } | |
1355 | ||
1356 | static void rem_slave_macs(struct mlx4_dev *dev, int slave) | |
1357 | { | |
1358 | struct mlx4_priv *priv = mlx4_priv(dev); | |
1359 | struct mlx4_resource_tracker *tracker = &priv->mfunc.master.res_tracker; | |
1360 | struct list_head *mac_list = | |
1361 | &tracker->slave_list[slave].res_list[RES_MAC]; | |
1362 | struct mac_res *res, *tmp; | |
1363 | ||
1364 | list_for_each_entry_safe(res, tmp, mac_list, list) { | |
1365 | list_del(&res->list); | |
1366 | __mlx4_unregister_mac(dev, res->port, res->mac); | |
1367 | kfree(res); | |
1368 | } | |
1369 | } | |
1370 | ||
1371 | static int mac_alloc_res(struct mlx4_dev *dev, int slave, int op, int cmd, | |
1372 | u64 in_param, u64 *out_param) | |
1373 | { | |
1374 | int err = -EINVAL; | |
1375 | int port; | |
1376 | u64 mac; | |
1377 | ||
1378 | if (op != RES_OP_RESERVE_AND_MAP) | |
1379 | return err; | |
1380 | ||
1381 | port = get_param_l(out_param); | |
1382 | mac = in_param; | |
1383 | ||
1384 | err = __mlx4_register_mac(dev, port, mac); | |
1385 | if (err >= 0) { | |
1386 | set_param_l(out_param, err); | |
1387 | err = 0; | |
1388 | } | |
1389 | ||
1390 | if (!err) { | |
1391 | err = mac_add_to_slave(dev, slave, mac, port); | |
1392 | if (err) | |
1393 | __mlx4_unregister_mac(dev, port, mac); | |
1394 | } | |
1395 | return err; | |
1396 | } | |
1397 | ||
ffe455ad EE |
1398 | static int vlan_alloc_res(struct mlx4_dev *dev, int slave, int op, int cmd, |
1399 | u64 in_param, u64 *out_param) | |
1400 | { | |
1401 | return 0; | |
1402 | } | |
1403 | ||
ba062d52 JM |
1404 | static int counter_alloc_res(struct mlx4_dev *dev, int slave, int op, int cmd, |
1405 | u64 in_param, u64 *out_param) | |
1406 | { | |
1407 | u32 index; | |
1408 | int err; | |
1409 | ||
1410 | if (op != RES_OP_RESERVE) | |
1411 | return -EINVAL; | |
1412 | ||
1413 | err = __mlx4_counter_alloc(dev, &index); | |
1414 | if (err) | |
1415 | return err; | |
1416 | ||
1417 | err = add_res_range(dev, slave, index, 1, RES_COUNTER, 0); | |
1418 | if (err) | |
1419 | __mlx4_counter_free(dev, index); | |
1420 | else | |
1421 | set_param_l(out_param, index); | |
1422 | ||
1423 | return err; | |
1424 | } | |
1425 | ||
1426 | static int xrcdn_alloc_res(struct mlx4_dev *dev, int slave, int op, int cmd, | |
1427 | u64 in_param, u64 *out_param) | |
1428 | { | |
1429 | u32 xrcdn; | |
1430 | int err; | |
1431 | ||
1432 | if (op != RES_OP_RESERVE) | |
1433 | return -EINVAL; | |
1434 | ||
1435 | err = __mlx4_xrcd_alloc(dev, &xrcdn); | |
1436 | if (err) | |
1437 | return err; | |
1438 | ||
1439 | err = add_res_range(dev, slave, xrcdn, 1, RES_XRCD, 0); | |
1440 | if (err) | |
1441 | __mlx4_xrcd_free(dev, xrcdn); | |
1442 | else | |
1443 | set_param_l(out_param, xrcdn); | |
1444 | ||
1445 | return err; | |
1446 | } | |
1447 | ||
c82e9aa0 EC |
1448 | int mlx4_ALLOC_RES_wrapper(struct mlx4_dev *dev, int slave, |
1449 | struct mlx4_vhcr *vhcr, | |
1450 | struct mlx4_cmd_mailbox *inbox, | |
1451 | struct mlx4_cmd_mailbox *outbox, | |
1452 | struct mlx4_cmd_info *cmd) | |
1453 | { | |
1454 | int err; | |
1455 | int alop = vhcr->op_modifier; | |
1456 | ||
1457 | switch (vhcr->in_modifier) { | |
1458 | case RES_QP: | |
1459 | err = qp_alloc_res(dev, slave, vhcr->op_modifier, alop, | |
1460 | vhcr->in_param, &vhcr->out_param); | |
1461 | break; | |
1462 | ||
1463 | case RES_MTT: | |
1464 | err = mtt_alloc_res(dev, slave, vhcr->op_modifier, alop, | |
1465 | vhcr->in_param, &vhcr->out_param); | |
1466 | break; | |
1467 | ||
1468 | case RES_MPT: | |
1469 | err = mpt_alloc_res(dev, slave, vhcr->op_modifier, alop, | |
1470 | vhcr->in_param, &vhcr->out_param); | |
1471 | break; | |
1472 | ||
1473 | case RES_CQ: | |
1474 | err = cq_alloc_res(dev, slave, vhcr->op_modifier, alop, | |
1475 | vhcr->in_param, &vhcr->out_param); | |
1476 | break; | |
1477 | ||
1478 | case RES_SRQ: | |
1479 | err = srq_alloc_res(dev, slave, vhcr->op_modifier, alop, | |
1480 | vhcr->in_param, &vhcr->out_param); | |
1481 | break; | |
1482 | ||
1483 | case RES_MAC: | |
1484 | err = mac_alloc_res(dev, slave, vhcr->op_modifier, alop, | |
1485 | vhcr->in_param, &vhcr->out_param); | |
1486 | break; | |
1487 | ||
ffe455ad EE |
1488 | case RES_VLAN: |
1489 | err = vlan_alloc_res(dev, slave, vhcr->op_modifier, alop, | |
1490 | vhcr->in_param, &vhcr->out_param); | |
1491 | break; | |
1492 | ||
ba062d52 JM |
1493 | case RES_COUNTER: |
1494 | err = counter_alloc_res(dev, slave, vhcr->op_modifier, alop, | |
1495 | vhcr->in_param, &vhcr->out_param); | |
1496 | break; | |
1497 | ||
1498 | case RES_XRCD: | |
1499 | err = xrcdn_alloc_res(dev, slave, vhcr->op_modifier, alop, | |
1500 | vhcr->in_param, &vhcr->out_param); | |
1501 | break; | |
1502 | ||
c82e9aa0 EC |
1503 | default: |
1504 | err = -EINVAL; | |
1505 | break; | |
1506 | } | |
1507 | ||
1508 | return err; | |
1509 | } | |
1510 | ||
1511 | static int qp_free_res(struct mlx4_dev *dev, int slave, int op, int cmd, | |
1512 | u64 in_param) | |
1513 | { | |
1514 | int err; | |
1515 | int count; | |
1516 | int base; | |
1517 | int qpn; | |
1518 | ||
1519 | switch (op) { | |
1520 | case RES_OP_RESERVE: | |
1521 | base = get_param_l(&in_param) & 0x7fffff; | |
1522 | count = get_param_h(&in_param); | |
1523 | err = rem_res_range(dev, slave, base, count, RES_QP, 0); | |
1524 | if (err) | |
1525 | break; | |
1526 | __mlx4_qp_release_range(dev, base, count); | |
1527 | break; | |
1528 | case RES_OP_MAP_ICM: | |
1529 | qpn = get_param_l(&in_param) & 0x7fffff; | |
1530 | err = qp_res_start_move_to(dev, slave, qpn, RES_QP_RESERVED, | |
1531 | NULL, 0); | |
1532 | if (err) | |
1533 | return err; | |
1534 | ||
54679e14 | 1535 | if (!fw_reserved(dev, qpn)) |
c82e9aa0 EC |
1536 | __mlx4_qp_free_icm(dev, qpn); |
1537 | ||
1538 | res_end_move(dev, slave, RES_QP, qpn); | |
1539 | ||
1540 | if (valid_reserved(dev, slave, qpn)) | |
1541 | err = rem_res_range(dev, slave, qpn, 1, RES_QP, 0); | |
1542 | break; | |
1543 | default: | |
1544 | err = -EINVAL; | |
1545 | break; | |
1546 | } | |
1547 | return err; | |
1548 | } | |
1549 | ||
1550 | static int mtt_free_res(struct mlx4_dev *dev, int slave, int op, int cmd, | |
1551 | u64 in_param, u64 *out_param) | |
1552 | { | |
1553 | int err = -EINVAL; | |
1554 | int base; | |
1555 | int order; | |
1556 | ||
1557 | if (op != RES_OP_RESERVE_AND_MAP) | |
1558 | return err; | |
1559 | ||
1560 | base = get_param_l(&in_param); | |
1561 | order = get_param_h(&in_param); | |
1562 | err = rem_res_range(dev, slave, base, 1, RES_MTT, order); | |
1563 | if (!err) | |
1564 | __mlx4_free_mtt_range(dev, base, order); | |
1565 | return err; | |
1566 | } | |
1567 | ||
1568 | static int mpt_free_res(struct mlx4_dev *dev, int slave, int op, int cmd, | |
1569 | u64 in_param) | |
1570 | { | |
1571 | int err = -EINVAL; | |
1572 | int index; | |
1573 | int id; | |
1574 | struct res_mpt *mpt; | |
1575 | ||
1576 | switch (op) { | |
1577 | case RES_OP_RESERVE: | |
1578 | index = get_param_l(&in_param); | |
1579 | id = index & mpt_mask(dev); | |
1580 | err = get_res(dev, slave, id, RES_MPT, &mpt); | |
1581 | if (err) | |
1582 | break; | |
1583 | index = mpt->key; | |
1584 | put_res(dev, slave, id, RES_MPT); | |
1585 | ||
1586 | err = rem_res_range(dev, slave, id, 1, RES_MPT, 0); | |
1587 | if (err) | |
1588 | break; | |
b20e519a | 1589 | __mlx4_mpt_release(dev, index); |
c82e9aa0 EC |
1590 | break; |
1591 | case RES_OP_MAP_ICM: | |
1592 | index = get_param_l(&in_param); | |
1593 | id = index & mpt_mask(dev); | |
1594 | err = mr_res_start_move_to(dev, slave, id, | |
1595 | RES_MPT_RESERVED, &mpt); | |
1596 | if (err) | |
1597 | return err; | |
1598 | ||
b20e519a | 1599 | __mlx4_mpt_free_icm(dev, mpt->key); |
c82e9aa0 EC |
1600 | res_end_move(dev, slave, RES_MPT, id); |
1601 | return err; | |
1602 | break; | |
1603 | default: | |
1604 | err = -EINVAL; | |
1605 | break; | |
1606 | } | |
1607 | return err; | |
1608 | } | |
1609 | ||
1610 | static int cq_free_res(struct mlx4_dev *dev, int slave, int op, int cmd, | |
1611 | u64 in_param, u64 *out_param) | |
1612 | { | |
1613 | int cqn; | |
1614 | int err; | |
1615 | ||
1616 | switch (op) { | |
1617 | case RES_OP_RESERVE_AND_MAP: | |
1618 | cqn = get_param_l(&in_param); | |
1619 | err = rem_res_range(dev, slave, cqn, 1, RES_CQ, 0); | |
1620 | if (err) | |
1621 | break; | |
1622 | ||
1623 | __mlx4_cq_free_icm(dev, cqn); | |
1624 | break; | |
1625 | ||
1626 | default: | |
1627 | err = -EINVAL; | |
1628 | break; | |
1629 | } | |
1630 | ||
1631 | return err; | |
1632 | } | |
1633 | ||
1634 | static int srq_free_res(struct mlx4_dev *dev, int slave, int op, int cmd, | |
1635 | u64 in_param, u64 *out_param) | |
1636 | { | |
1637 | int srqn; | |
1638 | int err; | |
1639 | ||
1640 | switch (op) { | |
1641 | case RES_OP_RESERVE_AND_MAP: | |
1642 | srqn = get_param_l(&in_param); | |
1643 | err = rem_res_range(dev, slave, srqn, 1, RES_SRQ, 0); | |
1644 | if (err) | |
1645 | break; | |
1646 | ||
1647 | __mlx4_srq_free_icm(dev, srqn); | |
1648 | break; | |
1649 | ||
1650 | default: | |
1651 | err = -EINVAL; | |
1652 | break; | |
1653 | } | |
1654 | ||
1655 | return err; | |
1656 | } | |
1657 | ||
1658 | static int mac_free_res(struct mlx4_dev *dev, int slave, int op, int cmd, | |
1659 | u64 in_param, u64 *out_param) | |
1660 | { | |
1661 | int port; | |
1662 | int err = 0; | |
1663 | ||
1664 | switch (op) { | |
1665 | case RES_OP_RESERVE_AND_MAP: | |
1666 | port = get_param_l(out_param); | |
1667 | mac_del_from_slave(dev, slave, in_param, port); | |
1668 | __mlx4_unregister_mac(dev, port, in_param); | |
1669 | break; | |
1670 | default: | |
1671 | err = -EINVAL; | |
1672 | break; | |
1673 | } | |
1674 | ||
1675 | return err; | |
1676 | ||
1677 | } | |
1678 | ||
ffe455ad EE |
1679 | static int vlan_free_res(struct mlx4_dev *dev, int slave, int op, int cmd, |
1680 | u64 in_param, u64 *out_param) | |
1681 | { | |
1682 | return 0; | |
1683 | } | |
1684 | ||
ba062d52 JM |
1685 | static int counter_free_res(struct mlx4_dev *dev, int slave, int op, int cmd, |
1686 | u64 in_param, u64 *out_param) | |
1687 | { | |
1688 | int index; | |
1689 | int err; | |
1690 | ||
1691 | if (op != RES_OP_RESERVE) | |
1692 | return -EINVAL; | |
1693 | ||
1694 | index = get_param_l(&in_param); | |
1695 | err = rem_res_range(dev, slave, index, 1, RES_COUNTER, 0); | |
1696 | if (err) | |
1697 | return err; | |
1698 | ||
1699 | __mlx4_counter_free(dev, index); | |
1700 | ||
1701 | return err; | |
1702 | } | |
1703 | ||
1704 | static int xrcdn_free_res(struct mlx4_dev *dev, int slave, int op, int cmd, | |
1705 | u64 in_param, u64 *out_param) | |
1706 | { | |
1707 | int xrcdn; | |
1708 | int err; | |
1709 | ||
1710 | if (op != RES_OP_RESERVE) | |
1711 | return -EINVAL; | |
1712 | ||
1713 | xrcdn = get_param_l(&in_param); | |
1714 | err = rem_res_range(dev, slave, xrcdn, 1, RES_XRCD, 0); | |
1715 | if (err) | |
1716 | return err; | |
1717 | ||
1718 | __mlx4_xrcd_free(dev, xrcdn); | |
1719 | ||
1720 | return err; | |
1721 | } | |
1722 | ||
c82e9aa0 EC |
1723 | int mlx4_FREE_RES_wrapper(struct mlx4_dev *dev, int slave, |
1724 | struct mlx4_vhcr *vhcr, | |
1725 | struct mlx4_cmd_mailbox *inbox, | |
1726 | struct mlx4_cmd_mailbox *outbox, | |
1727 | struct mlx4_cmd_info *cmd) | |
1728 | { | |
1729 | int err = -EINVAL; | |
1730 | int alop = vhcr->op_modifier; | |
1731 | ||
1732 | switch (vhcr->in_modifier) { | |
1733 | case RES_QP: | |
1734 | err = qp_free_res(dev, slave, vhcr->op_modifier, alop, | |
1735 | vhcr->in_param); | |
1736 | break; | |
1737 | ||
1738 | case RES_MTT: | |
1739 | err = mtt_free_res(dev, slave, vhcr->op_modifier, alop, | |
1740 | vhcr->in_param, &vhcr->out_param); | |
1741 | break; | |
1742 | ||
1743 | case RES_MPT: | |
1744 | err = mpt_free_res(dev, slave, vhcr->op_modifier, alop, | |
1745 | vhcr->in_param); | |
1746 | break; | |
1747 | ||
1748 | case RES_CQ: | |
1749 | err = cq_free_res(dev, slave, vhcr->op_modifier, alop, | |
1750 | vhcr->in_param, &vhcr->out_param); | |
1751 | break; | |
1752 | ||
1753 | case RES_SRQ: | |
1754 | err = srq_free_res(dev, slave, vhcr->op_modifier, alop, | |
1755 | vhcr->in_param, &vhcr->out_param); | |
1756 | break; | |
1757 | ||
1758 | case RES_MAC: | |
1759 | err = mac_free_res(dev, slave, vhcr->op_modifier, alop, | |
1760 | vhcr->in_param, &vhcr->out_param); | |
1761 | break; | |
1762 | ||
ffe455ad EE |
1763 | case RES_VLAN: |
1764 | err = vlan_free_res(dev, slave, vhcr->op_modifier, alop, | |
1765 | vhcr->in_param, &vhcr->out_param); | |
1766 | break; | |
1767 | ||
ba062d52 JM |
1768 | case RES_COUNTER: |
1769 | err = counter_free_res(dev, slave, vhcr->op_modifier, alop, | |
1770 | vhcr->in_param, &vhcr->out_param); | |
1771 | break; | |
1772 | ||
1773 | case RES_XRCD: | |
1774 | err = xrcdn_free_res(dev, slave, vhcr->op_modifier, alop, | |
1775 | vhcr->in_param, &vhcr->out_param); | |
1776 | ||
c82e9aa0 EC |
1777 | default: |
1778 | break; | |
1779 | } | |
1780 | return err; | |
1781 | } | |
1782 | ||
1783 | /* ugly but other choices are uglier */ | |
1784 | static int mr_phys_mpt(struct mlx4_mpt_entry *mpt) | |
1785 | { | |
1786 | return (be32_to_cpu(mpt->flags) >> 9) & 1; | |
1787 | } | |
1788 | ||
2b8fb286 | 1789 | static int mr_get_mtt_addr(struct mlx4_mpt_entry *mpt) |
c82e9aa0 | 1790 | { |
2b8fb286 | 1791 | return (int)be64_to_cpu(mpt->mtt_addr) & 0xfffffff8; |
c82e9aa0 EC |
1792 | } |
1793 | ||
1794 | static int mr_get_mtt_size(struct mlx4_mpt_entry *mpt) | |
1795 | { | |
1796 | return be32_to_cpu(mpt->mtt_sz); | |
1797 | } | |
1798 | ||
cc1ade94 SM |
1799 | static u32 mr_get_pd(struct mlx4_mpt_entry *mpt) |
1800 | { | |
1801 | return be32_to_cpu(mpt->pd_flags) & 0x00ffffff; | |
1802 | } | |
1803 | ||
1804 | static int mr_is_fmr(struct mlx4_mpt_entry *mpt) | |
1805 | { | |
1806 | return be32_to_cpu(mpt->pd_flags) & MLX4_MPT_PD_FLAG_FAST_REG; | |
1807 | } | |
1808 | ||
1809 | static int mr_is_bind_enabled(struct mlx4_mpt_entry *mpt) | |
1810 | { | |
1811 | return be32_to_cpu(mpt->flags) & MLX4_MPT_FLAG_BIND_ENABLE; | |
1812 | } | |
1813 | ||
1814 | static int mr_is_region(struct mlx4_mpt_entry *mpt) | |
1815 | { | |
1816 | return be32_to_cpu(mpt->flags) & MLX4_MPT_FLAG_REGION; | |
1817 | } | |
1818 | ||
2b8fb286 | 1819 | static int qp_get_mtt_addr(struct mlx4_qp_context *qpc) |
c82e9aa0 EC |
1820 | { |
1821 | return be32_to_cpu(qpc->mtt_base_addr_l) & 0xfffffff8; | |
1822 | } | |
1823 | ||
2b8fb286 | 1824 | static int srq_get_mtt_addr(struct mlx4_srq_context *srqc) |
c82e9aa0 EC |
1825 | { |
1826 | return be32_to_cpu(srqc->mtt_base_addr_l) & 0xfffffff8; | |
1827 | } | |
1828 | ||
1829 | static int qp_get_mtt_size(struct mlx4_qp_context *qpc) | |
1830 | { | |
1831 | int page_shift = (qpc->log_page_size & 0x3f) + 12; | |
1832 | int log_sq_size = (qpc->sq_size_stride >> 3) & 0xf; | |
1833 | int log_sq_sride = qpc->sq_size_stride & 7; | |
1834 | int log_rq_size = (qpc->rq_size_stride >> 3) & 0xf; | |
1835 | int log_rq_stride = qpc->rq_size_stride & 7; | |
1836 | int srq = (be32_to_cpu(qpc->srqn) >> 24) & 1; | |
1837 | int rss = (be32_to_cpu(qpc->flags) >> 13) & 1; | |
1838 | int xrc = (be32_to_cpu(qpc->local_qpn) >> 23) & 1; | |
1839 | int sq_size; | |
1840 | int rq_size; | |
1841 | int total_pages; | |
1842 | int total_mem; | |
1843 | int page_offset = (be32_to_cpu(qpc->params2) >> 6) & 0x3f; | |
1844 | ||
1845 | sq_size = 1 << (log_sq_size + log_sq_sride + 4); | |
1846 | rq_size = (srq|rss|xrc) ? 0 : (1 << (log_rq_size + log_rq_stride + 4)); | |
1847 | total_mem = sq_size + rq_size; | |
1848 | total_pages = | |
1849 | roundup_pow_of_two((total_mem + (page_offset << 6)) >> | |
1850 | page_shift); | |
1851 | ||
1852 | return total_pages; | |
1853 | } | |
1854 | ||
c82e9aa0 EC |
1855 | static int check_mtt_range(struct mlx4_dev *dev, int slave, int start, |
1856 | int size, struct res_mtt *mtt) | |
1857 | { | |
2b8fb286 MA |
1858 | int res_start = mtt->com.res_id; |
1859 | int res_size = (1 << mtt->order); | |
c82e9aa0 EC |
1860 | |
1861 | if (start < res_start || start + size > res_start + res_size) | |
1862 | return -EPERM; | |
1863 | return 0; | |
1864 | } | |
1865 | ||
1866 | int mlx4_SW2HW_MPT_wrapper(struct mlx4_dev *dev, int slave, | |
1867 | struct mlx4_vhcr *vhcr, | |
1868 | struct mlx4_cmd_mailbox *inbox, | |
1869 | struct mlx4_cmd_mailbox *outbox, | |
1870 | struct mlx4_cmd_info *cmd) | |
1871 | { | |
1872 | int err; | |
1873 | int index = vhcr->in_modifier; | |
1874 | struct res_mtt *mtt; | |
1875 | struct res_mpt *mpt; | |
2b8fb286 | 1876 | int mtt_base = mr_get_mtt_addr(inbox->buf) / dev->caps.mtt_entry_sz; |
c82e9aa0 EC |
1877 | int phys; |
1878 | int id; | |
cc1ade94 SM |
1879 | u32 pd; |
1880 | int pd_slave; | |
c82e9aa0 EC |
1881 | |
1882 | id = index & mpt_mask(dev); | |
1883 | err = mr_res_start_move_to(dev, slave, id, RES_MPT_HW, &mpt); | |
1884 | if (err) | |
1885 | return err; | |
1886 | ||
cc1ade94 SM |
1887 | /* Disable memory windows for VFs. */ |
1888 | if (!mr_is_region(inbox->buf)) { | |
1889 | err = -EPERM; | |
1890 | goto ex_abort; | |
1891 | } | |
1892 | ||
1893 | /* Make sure that the PD bits related to the slave id are zeros. */ | |
1894 | pd = mr_get_pd(inbox->buf); | |
1895 | pd_slave = (pd >> 17) & 0x7f; | |
1896 | if (pd_slave != 0 && pd_slave != slave) { | |
1897 | err = -EPERM; | |
1898 | goto ex_abort; | |
1899 | } | |
1900 | ||
1901 | if (mr_is_fmr(inbox->buf)) { | |
1902 | /* FMR and Bind Enable are forbidden in slave devices. */ | |
1903 | if (mr_is_bind_enabled(inbox->buf)) { | |
1904 | err = -EPERM; | |
1905 | goto ex_abort; | |
1906 | } | |
1907 | /* FMR and Memory Windows are also forbidden. */ | |
1908 | if (!mr_is_region(inbox->buf)) { | |
1909 | err = -EPERM; | |
1910 | goto ex_abort; | |
1911 | } | |
1912 | } | |
1913 | ||
c82e9aa0 EC |
1914 | phys = mr_phys_mpt(inbox->buf); |
1915 | if (!phys) { | |
2b8fb286 | 1916 | err = get_res(dev, slave, mtt_base, RES_MTT, &mtt); |
c82e9aa0 EC |
1917 | if (err) |
1918 | goto ex_abort; | |
1919 | ||
1920 | err = check_mtt_range(dev, slave, mtt_base, | |
1921 | mr_get_mtt_size(inbox->buf), mtt); | |
1922 | if (err) | |
1923 | goto ex_put; | |
1924 | ||
1925 | mpt->mtt = mtt; | |
1926 | } | |
1927 | ||
c82e9aa0 EC |
1928 | err = mlx4_DMA_wrapper(dev, slave, vhcr, inbox, outbox, cmd); |
1929 | if (err) | |
1930 | goto ex_put; | |
1931 | ||
1932 | if (!phys) { | |
1933 | atomic_inc(&mtt->ref_count); | |
1934 | put_res(dev, slave, mtt->com.res_id, RES_MTT); | |
1935 | } | |
1936 | ||
1937 | res_end_move(dev, slave, RES_MPT, id); | |
1938 | return 0; | |
1939 | ||
1940 | ex_put: | |
1941 | if (!phys) | |
1942 | put_res(dev, slave, mtt->com.res_id, RES_MTT); | |
1943 | ex_abort: | |
1944 | res_abort_move(dev, slave, RES_MPT, id); | |
1945 | ||
1946 | return err; | |
1947 | } | |
1948 | ||
1949 | int mlx4_HW2SW_MPT_wrapper(struct mlx4_dev *dev, int slave, | |
1950 | struct mlx4_vhcr *vhcr, | |
1951 | struct mlx4_cmd_mailbox *inbox, | |
1952 | struct mlx4_cmd_mailbox *outbox, | |
1953 | struct mlx4_cmd_info *cmd) | |
1954 | { | |
1955 | int err; | |
1956 | int index = vhcr->in_modifier; | |
1957 | struct res_mpt *mpt; | |
1958 | int id; | |
1959 | ||
1960 | id = index & mpt_mask(dev); | |
1961 | err = mr_res_start_move_to(dev, slave, id, RES_MPT_MAPPED, &mpt); | |
1962 | if (err) | |
1963 | return err; | |
1964 | ||
1965 | err = mlx4_DMA_wrapper(dev, slave, vhcr, inbox, outbox, cmd); | |
1966 | if (err) | |
1967 | goto ex_abort; | |
1968 | ||
1969 | if (mpt->mtt) | |
1970 | atomic_dec(&mpt->mtt->ref_count); | |
1971 | ||
1972 | res_end_move(dev, slave, RES_MPT, id); | |
1973 | return 0; | |
1974 | ||
1975 | ex_abort: | |
1976 | res_abort_move(dev, slave, RES_MPT, id); | |
1977 | ||
1978 | return err; | |
1979 | } | |
1980 | ||
1981 | int mlx4_QUERY_MPT_wrapper(struct mlx4_dev *dev, int slave, | |
1982 | struct mlx4_vhcr *vhcr, | |
1983 | struct mlx4_cmd_mailbox *inbox, | |
1984 | struct mlx4_cmd_mailbox *outbox, | |
1985 | struct mlx4_cmd_info *cmd) | |
1986 | { | |
1987 | int err; | |
1988 | int index = vhcr->in_modifier; | |
1989 | struct res_mpt *mpt; | |
1990 | int id; | |
1991 | ||
1992 | id = index & mpt_mask(dev); | |
1993 | err = get_res(dev, slave, id, RES_MPT, &mpt); | |
1994 | if (err) | |
1995 | return err; | |
1996 | ||
1997 | if (mpt->com.from_state != RES_MPT_HW) { | |
1998 | err = -EBUSY; | |
1999 | goto out; | |
2000 | } | |
2001 | ||
2002 | err = mlx4_DMA_wrapper(dev, slave, vhcr, inbox, outbox, cmd); | |
2003 | ||
2004 | out: | |
2005 | put_res(dev, slave, id, RES_MPT); | |
2006 | return err; | |
2007 | } | |
2008 | ||
2009 | static int qp_get_rcqn(struct mlx4_qp_context *qpc) | |
2010 | { | |
2011 | return be32_to_cpu(qpc->cqn_recv) & 0xffffff; | |
2012 | } | |
2013 | ||
2014 | static int qp_get_scqn(struct mlx4_qp_context *qpc) | |
2015 | { | |
2016 | return be32_to_cpu(qpc->cqn_send) & 0xffffff; | |
2017 | } | |
2018 | ||
2019 | static u32 qp_get_srqn(struct mlx4_qp_context *qpc) | |
2020 | { | |
2021 | return be32_to_cpu(qpc->srqn) & 0x1ffffff; | |
2022 | } | |
2023 | ||
54679e14 JM |
2024 | static void adjust_proxy_tun_qkey(struct mlx4_dev *dev, struct mlx4_vhcr *vhcr, |
2025 | struct mlx4_qp_context *context) | |
2026 | { | |
2027 | u32 qpn = vhcr->in_modifier & 0xffffff; | |
2028 | u32 qkey = 0; | |
2029 | ||
2030 | if (mlx4_get_parav_qkey(dev, qpn, &qkey)) | |
2031 | return; | |
2032 | ||
2033 | /* adjust qkey in qp context */ | |
2034 | context->qkey = cpu_to_be32(qkey); | |
2035 | } | |
2036 | ||
c82e9aa0 EC |
2037 | int mlx4_RST2INIT_QP_wrapper(struct mlx4_dev *dev, int slave, |
2038 | struct mlx4_vhcr *vhcr, | |
2039 | struct mlx4_cmd_mailbox *inbox, | |
2040 | struct mlx4_cmd_mailbox *outbox, | |
2041 | struct mlx4_cmd_info *cmd) | |
2042 | { | |
2043 | int err; | |
2044 | int qpn = vhcr->in_modifier & 0x7fffff; | |
2045 | struct res_mtt *mtt; | |
2046 | struct res_qp *qp; | |
2047 | struct mlx4_qp_context *qpc = inbox->buf + 8; | |
2b8fb286 | 2048 | int mtt_base = qp_get_mtt_addr(qpc) / dev->caps.mtt_entry_sz; |
c82e9aa0 EC |
2049 | int mtt_size = qp_get_mtt_size(qpc); |
2050 | struct res_cq *rcq; | |
2051 | struct res_cq *scq; | |
2052 | int rcqn = qp_get_rcqn(qpc); | |
2053 | int scqn = qp_get_scqn(qpc); | |
2054 | u32 srqn = qp_get_srqn(qpc) & 0xffffff; | |
2055 | int use_srq = (qp_get_srqn(qpc) >> 24) & 1; | |
2056 | struct res_srq *srq; | |
2057 | int local_qpn = be32_to_cpu(qpc->local_qpn) & 0xffffff; | |
2058 | ||
2059 | err = qp_res_start_move_to(dev, slave, qpn, RES_QP_HW, &qp, 0); | |
2060 | if (err) | |
2061 | return err; | |
2062 | qp->local_qpn = local_qpn; | |
2063 | ||
2b8fb286 | 2064 | err = get_res(dev, slave, mtt_base, RES_MTT, &mtt); |
c82e9aa0 EC |
2065 | if (err) |
2066 | goto ex_abort; | |
2067 | ||
2068 | err = check_mtt_range(dev, slave, mtt_base, mtt_size, mtt); | |
2069 | if (err) | |
2070 | goto ex_put_mtt; | |
2071 | ||
c82e9aa0 EC |
2072 | err = get_res(dev, slave, rcqn, RES_CQ, &rcq); |
2073 | if (err) | |
2074 | goto ex_put_mtt; | |
2075 | ||
2076 | if (scqn != rcqn) { | |
2077 | err = get_res(dev, slave, scqn, RES_CQ, &scq); | |
2078 | if (err) | |
2079 | goto ex_put_rcq; | |
2080 | } else | |
2081 | scq = rcq; | |
2082 | ||
2083 | if (use_srq) { | |
2084 | err = get_res(dev, slave, srqn, RES_SRQ, &srq); | |
2085 | if (err) | |
2086 | goto ex_put_scq; | |
2087 | } | |
2088 | ||
54679e14 JM |
2089 | adjust_proxy_tun_qkey(dev, vhcr, qpc); |
2090 | update_pkey_index(dev, slave, inbox); | |
c82e9aa0 EC |
2091 | err = mlx4_DMA_wrapper(dev, slave, vhcr, inbox, outbox, cmd); |
2092 | if (err) | |
2093 | goto ex_put_srq; | |
2094 | atomic_inc(&mtt->ref_count); | |
2095 | qp->mtt = mtt; | |
2096 | atomic_inc(&rcq->ref_count); | |
2097 | qp->rcq = rcq; | |
2098 | atomic_inc(&scq->ref_count); | |
2099 | qp->scq = scq; | |
2100 | ||
2101 | if (scqn != rcqn) | |
2102 | put_res(dev, slave, scqn, RES_CQ); | |
2103 | ||
2104 | if (use_srq) { | |
2105 | atomic_inc(&srq->ref_count); | |
2106 | put_res(dev, slave, srqn, RES_SRQ); | |
2107 | qp->srq = srq; | |
2108 | } | |
2109 | put_res(dev, slave, rcqn, RES_CQ); | |
2b8fb286 | 2110 | put_res(dev, slave, mtt_base, RES_MTT); |
c82e9aa0 EC |
2111 | res_end_move(dev, slave, RES_QP, qpn); |
2112 | ||
2113 | return 0; | |
2114 | ||
2115 | ex_put_srq: | |
2116 | if (use_srq) | |
2117 | put_res(dev, slave, srqn, RES_SRQ); | |
2118 | ex_put_scq: | |
2119 | if (scqn != rcqn) | |
2120 | put_res(dev, slave, scqn, RES_CQ); | |
2121 | ex_put_rcq: | |
2122 | put_res(dev, slave, rcqn, RES_CQ); | |
2123 | ex_put_mtt: | |
2b8fb286 | 2124 | put_res(dev, slave, mtt_base, RES_MTT); |
c82e9aa0 EC |
2125 | ex_abort: |
2126 | res_abort_move(dev, slave, RES_QP, qpn); | |
2127 | ||
2128 | return err; | |
2129 | } | |
2130 | ||
2b8fb286 | 2131 | static int eq_get_mtt_addr(struct mlx4_eq_context *eqc) |
c82e9aa0 EC |
2132 | { |
2133 | return be32_to_cpu(eqc->mtt_base_addr_l) & 0xfffffff8; | |
2134 | } | |
2135 | ||
2136 | static int eq_get_mtt_size(struct mlx4_eq_context *eqc) | |
2137 | { | |
2138 | int log_eq_size = eqc->log_eq_size & 0x1f; | |
2139 | int page_shift = (eqc->log_page_size & 0x3f) + 12; | |
2140 | ||
2141 | if (log_eq_size + 5 < page_shift) | |
2142 | return 1; | |
2143 | ||
2144 | return 1 << (log_eq_size + 5 - page_shift); | |
2145 | } | |
2146 | ||
2b8fb286 | 2147 | static int cq_get_mtt_addr(struct mlx4_cq_context *cqc) |
c82e9aa0 EC |
2148 | { |
2149 | return be32_to_cpu(cqc->mtt_base_addr_l) & 0xfffffff8; | |
2150 | } | |
2151 | ||
2152 | static int cq_get_mtt_size(struct mlx4_cq_context *cqc) | |
2153 | { | |
2154 | int log_cq_size = (be32_to_cpu(cqc->logsize_usrpage) >> 24) & 0x1f; | |
2155 | int page_shift = (cqc->log_page_size & 0x3f) + 12; | |
2156 | ||
2157 | if (log_cq_size + 5 < page_shift) | |
2158 | return 1; | |
2159 | ||
2160 | return 1 << (log_cq_size + 5 - page_shift); | |
2161 | } | |
2162 | ||
2163 | int mlx4_SW2HW_EQ_wrapper(struct mlx4_dev *dev, int slave, | |
2164 | struct mlx4_vhcr *vhcr, | |
2165 | struct mlx4_cmd_mailbox *inbox, | |
2166 | struct mlx4_cmd_mailbox *outbox, | |
2167 | struct mlx4_cmd_info *cmd) | |
2168 | { | |
2169 | int err; | |
2170 | int eqn = vhcr->in_modifier; | |
2171 | int res_id = (slave << 8) | eqn; | |
2172 | struct mlx4_eq_context *eqc = inbox->buf; | |
2b8fb286 | 2173 | int mtt_base = eq_get_mtt_addr(eqc) / dev->caps.mtt_entry_sz; |
c82e9aa0 EC |
2174 | int mtt_size = eq_get_mtt_size(eqc); |
2175 | struct res_eq *eq; | |
2176 | struct res_mtt *mtt; | |
2177 | ||
2178 | err = add_res_range(dev, slave, res_id, 1, RES_EQ, 0); | |
2179 | if (err) | |
2180 | return err; | |
2181 | err = eq_res_start_move_to(dev, slave, res_id, RES_EQ_HW, &eq); | |
2182 | if (err) | |
2183 | goto out_add; | |
2184 | ||
2b8fb286 | 2185 | err = get_res(dev, slave, mtt_base, RES_MTT, &mtt); |
c82e9aa0 EC |
2186 | if (err) |
2187 | goto out_move; | |
2188 | ||
2189 | err = check_mtt_range(dev, slave, mtt_base, mtt_size, mtt); | |
2190 | if (err) | |
2191 | goto out_put; | |
2192 | ||
2193 | err = mlx4_DMA_wrapper(dev, slave, vhcr, inbox, outbox, cmd); | |
2194 | if (err) | |
2195 | goto out_put; | |
2196 | ||
2197 | atomic_inc(&mtt->ref_count); | |
2198 | eq->mtt = mtt; | |
2199 | put_res(dev, slave, mtt->com.res_id, RES_MTT); | |
2200 | res_end_move(dev, slave, RES_EQ, res_id); | |
2201 | return 0; | |
2202 | ||
2203 | out_put: | |
2204 | put_res(dev, slave, mtt->com.res_id, RES_MTT); | |
2205 | out_move: | |
2206 | res_abort_move(dev, slave, RES_EQ, res_id); | |
2207 | out_add: | |
2208 | rem_res_range(dev, slave, res_id, 1, RES_EQ, 0); | |
2209 | return err; | |
2210 | } | |
2211 | ||
2212 | static int get_containing_mtt(struct mlx4_dev *dev, int slave, int start, | |
2213 | int len, struct res_mtt **res) | |
2214 | { | |
2215 | struct mlx4_priv *priv = mlx4_priv(dev); | |
2216 | struct mlx4_resource_tracker *tracker = &priv->mfunc.master.res_tracker; | |
2217 | struct res_mtt *mtt; | |
2218 | int err = -EINVAL; | |
2219 | ||
2220 | spin_lock_irq(mlx4_tlock(dev)); | |
2221 | list_for_each_entry(mtt, &tracker->slave_list[slave].res_list[RES_MTT], | |
2222 | com.list) { | |
2223 | if (!check_mtt_range(dev, slave, start, len, mtt)) { | |
2224 | *res = mtt; | |
2225 | mtt->com.from_state = mtt->com.state; | |
2226 | mtt->com.state = RES_MTT_BUSY; | |
2227 | err = 0; | |
2228 | break; | |
2229 | } | |
2230 | } | |
2231 | spin_unlock_irq(mlx4_tlock(dev)); | |
2232 | ||
2233 | return err; | |
2234 | } | |
2235 | ||
54679e14 JM |
2236 | static int verify_qp_parameters(struct mlx4_dev *dev, |
2237 | struct mlx4_cmd_mailbox *inbox, | |
2238 | enum qp_transition transition, u8 slave) | |
2239 | { | |
2240 | u32 qp_type; | |
2241 | struct mlx4_qp_context *qp_ctx; | |
2242 | enum mlx4_qp_optpar optpar; | |
2243 | ||
2244 | qp_ctx = inbox->buf + 8; | |
2245 | qp_type = (be32_to_cpu(qp_ctx->flags) >> 16) & 0xff; | |
2246 | optpar = be32_to_cpu(*(__be32 *) inbox->buf); | |
2247 | ||
2248 | switch (qp_type) { | |
2249 | case MLX4_QP_ST_RC: | |
2250 | case MLX4_QP_ST_UC: | |
2251 | switch (transition) { | |
2252 | case QP_TRANS_INIT2RTR: | |
2253 | case QP_TRANS_RTR2RTS: | |
2254 | case QP_TRANS_RTS2RTS: | |
2255 | case QP_TRANS_SQD2SQD: | |
2256 | case QP_TRANS_SQD2RTS: | |
2257 | if (slave != mlx4_master_func_num(dev)) | |
2258 | /* slaves have only gid index 0 */ | |
2259 | if (optpar & MLX4_QP_OPTPAR_PRIMARY_ADDR_PATH) | |
2260 | if (qp_ctx->pri_path.mgid_index) | |
2261 | return -EINVAL; | |
2262 | if (optpar & MLX4_QP_OPTPAR_ALT_ADDR_PATH) | |
2263 | if (qp_ctx->alt_path.mgid_index) | |
2264 | return -EINVAL; | |
2265 | break; | |
2266 | default: | |
2267 | break; | |
2268 | } | |
2269 | ||
2270 | break; | |
2271 | default: | |
2272 | break; | |
2273 | } | |
2274 | ||
2275 | return 0; | |
2276 | } | |
2277 | ||
c82e9aa0 EC |
2278 | int mlx4_WRITE_MTT_wrapper(struct mlx4_dev *dev, int slave, |
2279 | struct mlx4_vhcr *vhcr, | |
2280 | struct mlx4_cmd_mailbox *inbox, | |
2281 | struct mlx4_cmd_mailbox *outbox, | |
2282 | struct mlx4_cmd_info *cmd) | |
2283 | { | |
2284 | struct mlx4_mtt mtt; | |
2285 | __be64 *page_list = inbox->buf; | |
2286 | u64 *pg_list = (u64 *)page_list; | |
2287 | int i; | |
2288 | struct res_mtt *rmtt = NULL; | |
2289 | int start = be64_to_cpu(page_list[0]); | |
2290 | int npages = vhcr->in_modifier; | |
2291 | int err; | |
2292 | ||
2293 | err = get_containing_mtt(dev, slave, start, npages, &rmtt); | |
2294 | if (err) | |
2295 | return err; | |
2296 | ||
2297 | /* Call the SW implementation of write_mtt: | |
2298 | * - Prepare a dummy mtt struct | |
2299 | * - Translate inbox contents to simple addresses in host endianess */ | |
2b8fb286 MA |
2300 | mtt.offset = 0; /* TBD this is broken but I don't handle it since |
2301 | we don't really use it */ | |
c82e9aa0 EC |
2302 | mtt.order = 0; |
2303 | mtt.page_shift = 0; | |
2304 | for (i = 0; i < npages; ++i) | |
2305 | pg_list[i + 2] = (be64_to_cpu(page_list[i + 2]) & ~1ULL); | |
2306 | ||
2307 | err = __mlx4_write_mtt(dev, &mtt, be64_to_cpu(page_list[0]), npages, | |
2308 | ((u64 *)page_list + 2)); | |
2309 | ||
2310 | if (rmtt) | |
2311 | put_res(dev, slave, rmtt->com.res_id, RES_MTT); | |
2312 | ||
2313 | return err; | |
2314 | } | |
2315 | ||
2316 | int mlx4_HW2SW_EQ_wrapper(struct mlx4_dev *dev, int slave, | |
2317 | struct mlx4_vhcr *vhcr, | |
2318 | struct mlx4_cmd_mailbox *inbox, | |
2319 | struct mlx4_cmd_mailbox *outbox, | |
2320 | struct mlx4_cmd_info *cmd) | |
2321 | { | |
2322 | int eqn = vhcr->in_modifier; | |
2323 | int res_id = eqn | (slave << 8); | |
2324 | struct res_eq *eq; | |
2325 | int err; | |
2326 | ||
2327 | err = eq_res_start_move_to(dev, slave, res_id, RES_EQ_RESERVED, &eq); | |
2328 | if (err) | |
2329 | return err; | |
2330 | ||
2331 | err = get_res(dev, slave, eq->mtt->com.res_id, RES_MTT, NULL); | |
2332 | if (err) | |
2333 | goto ex_abort; | |
2334 | ||
2335 | err = mlx4_DMA_wrapper(dev, slave, vhcr, inbox, outbox, cmd); | |
2336 | if (err) | |
2337 | goto ex_put; | |
2338 | ||
2339 | atomic_dec(&eq->mtt->ref_count); | |
2340 | put_res(dev, slave, eq->mtt->com.res_id, RES_MTT); | |
2341 | res_end_move(dev, slave, RES_EQ, res_id); | |
2342 | rem_res_range(dev, slave, res_id, 1, RES_EQ, 0); | |
2343 | ||
2344 | return 0; | |
2345 | ||
2346 | ex_put: | |
2347 | put_res(dev, slave, eq->mtt->com.res_id, RES_MTT); | |
2348 | ex_abort: | |
2349 | res_abort_move(dev, slave, RES_EQ, res_id); | |
2350 | ||
2351 | return err; | |
2352 | } | |
2353 | ||
2354 | int mlx4_GEN_EQE(struct mlx4_dev *dev, int slave, struct mlx4_eqe *eqe) | |
2355 | { | |
2356 | struct mlx4_priv *priv = mlx4_priv(dev); | |
2357 | struct mlx4_slave_event_eq_info *event_eq; | |
2358 | struct mlx4_cmd_mailbox *mailbox; | |
2359 | u32 in_modifier = 0; | |
2360 | int err; | |
2361 | int res_id; | |
2362 | struct res_eq *req; | |
2363 | ||
2364 | if (!priv->mfunc.master.slave_state) | |
2365 | return -EINVAL; | |
2366 | ||
803143fb | 2367 | event_eq = &priv->mfunc.master.slave_state[slave].event_eq[eqe->type]; |
c82e9aa0 EC |
2368 | |
2369 | /* Create the event only if the slave is registered */ | |
803143fb | 2370 | if (event_eq->eqn < 0) |
c82e9aa0 EC |
2371 | return 0; |
2372 | ||
2373 | mutex_lock(&priv->mfunc.master.gen_eqe_mutex[slave]); | |
2374 | res_id = (slave << 8) | event_eq->eqn; | |
2375 | err = get_res(dev, slave, res_id, RES_EQ, &req); | |
2376 | if (err) | |
2377 | goto unlock; | |
2378 | ||
2379 | if (req->com.from_state != RES_EQ_HW) { | |
2380 | err = -EINVAL; | |
2381 | goto put; | |
2382 | } | |
2383 | ||
2384 | mailbox = mlx4_alloc_cmd_mailbox(dev); | |
2385 | if (IS_ERR(mailbox)) { | |
2386 | err = PTR_ERR(mailbox); | |
2387 | goto put; | |
2388 | } | |
2389 | ||
2390 | if (eqe->type == MLX4_EVENT_TYPE_CMD) { | |
2391 | ++event_eq->token; | |
2392 | eqe->event.cmd.token = cpu_to_be16(event_eq->token); | |
2393 | } | |
2394 | ||
2395 | memcpy(mailbox->buf, (u8 *) eqe, 28); | |
2396 | ||
2397 | in_modifier = (slave & 0xff) | ((event_eq->eqn & 0xff) << 16); | |
2398 | ||
2399 | err = mlx4_cmd(dev, mailbox->dma, in_modifier, 0, | |
2400 | MLX4_CMD_GEN_EQE, MLX4_CMD_TIME_CLASS_B, | |
2401 | MLX4_CMD_NATIVE); | |
2402 | ||
2403 | put_res(dev, slave, res_id, RES_EQ); | |
2404 | mutex_unlock(&priv->mfunc.master.gen_eqe_mutex[slave]); | |
2405 | mlx4_free_cmd_mailbox(dev, mailbox); | |
2406 | return err; | |
2407 | ||
2408 | put: | |
2409 | put_res(dev, slave, res_id, RES_EQ); | |
2410 | ||
2411 | unlock: | |
2412 | mutex_unlock(&priv->mfunc.master.gen_eqe_mutex[slave]); | |
2413 | return err; | |
2414 | } | |
2415 | ||
2416 | int mlx4_QUERY_EQ_wrapper(struct mlx4_dev *dev, int slave, | |
2417 | struct mlx4_vhcr *vhcr, | |
2418 | struct mlx4_cmd_mailbox *inbox, | |
2419 | struct mlx4_cmd_mailbox *outbox, | |
2420 | struct mlx4_cmd_info *cmd) | |
2421 | { | |
2422 | int eqn = vhcr->in_modifier; | |
2423 | int res_id = eqn | (slave << 8); | |
2424 | struct res_eq *eq; | |
2425 | int err; | |
2426 | ||
2427 | err = get_res(dev, slave, res_id, RES_EQ, &eq); | |
2428 | if (err) | |
2429 | return err; | |
2430 | ||
2431 | if (eq->com.from_state != RES_EQ_HW) { | |
2432 | err = -EINVAL; | |
2433 | goto ex_put; | |
2434 | } | |
2435 | ||
2436 | err = mlx4_DMA_wrapper(dev, slave, vhcr, inbox, outbox, cmd); | |
2437 | ||
2438 | ex_put: | |
2439 | put_res(dev, slave, res_id, RES_EQ); | |
2440 | return err; | |
2441 | } | |
2442 | ||
2443 | int mlx4_SW2HW_CQ_wrapper(struct mlx4_dev *dev, int slave, | |
2444 | struct mlx4_vhcr *vhcr, | |
2445 | struct mlx4_cmd_mailbox *inbox, | |
2446 | struct mlx4_cmd_mailbox *outbox, | |
2447 | struct mlx4_cmd_info *cmd) | |
2448 | { | |
2449 | int err; | |
2450 | int cqn = vhcr->in_modifier; | |
2451 | struct mlx4_cq_context *cqc = inbox->buf; | |
2b8fb286 | 2452 | int mtt_base = cq_get_mtt_addr(cqc) / dev->caps.mtt_entry_sz; |
c82e9aa0 EC |
2453 | struct res_cq *cq; |
2454 | struct res_mtt *mtt; | |
2455 | ||
2456 | err = cq_res_start_move_to(dev, slave, cqn, RES_CQ_HW, &cq); | |
2457 | if (err) | |
2458 | return err; | |
2b8fb286 | 2459 | err = get_res(dev, slave, mtt_base, RES_MTT, &mtt); |
c82e9aa0 EC |
2460 | if (err) |
2461 | goto out_move; | |
2462 | err = check_mtt_range(dev, slave, mtt_base, cq_get_mtt_size(cqc), mtt); | |
2463 | if (err) | |
2464 | goto out_put; | |
2465 | err = mlx4_DMA_wrapper(dev, slave, vhcr, inbox, outbox, cmd); | |
2466 | if (err) | |
2467 | goto out_put; | |
2468 | atomic_inc(&mtt->ref_count); | |
2469 | cq->mtt = mtt; | |
2470 | put_res(dev, slave, mtt->com.res_id, RES_MTT); | |
2471 | res_end_move(dev, slave, RES_CQ, cqn); | |
2472 | return 0; | |
2473 | ||
2474 | out_put: | |
2475 | put_res(dev, slave, mtt->com.res_id, RES_MTT); | |
2476 | out_move: | |
2477 | res_abort_move(dev, slave, RES_CQ, cqn); | |
2478 | return err; | |
2479 | } | |
2480 | ||
2481 | int mlx4_HW2SW_CQ_wrapper(struct mlx4_dev *dev, int slave, | |
2482 | struct mlx4_vhcr *vhcr, | |
2483 | struct mlx4_cmd_mailbox *inbox, | |
2484 | struct mlx4_cmd_mailbox *outbox, | |
2485 | struct mlx4_cmd_info *cmd) | |
2486 | { | |
2487 | int err; | |
2488 | int cqn = vhcr->in_modifier; | |
2489 | struct res_cq *cq; | |
2490 | ||
2491 | err = cq_res_start_move_to(dev, slave, cqn, RES_CQ_ALLOCATED, &cq); | |
2492 | if (err) | |
2493 | return err; | |
2494 | err = mlx4_DMA_wrapper(dev, slave, vhcr, inbox, outbox, cmd); | |
2495 | if (err) | |
2496 | goto out_move; | |
2497 | atomic_dec(&cq->mtt->ref_count); | |
2498 | res_end_move(dev, slave, RES_CQ, cqn); | |
2499 | return 0; | |
2500 | ||
2501 | out_move: | |
2502 | res_abort_move(dev, slave, RES_CQ, cqn); | |
2503 | return err; | |
2504 | } | |
2505 | ||
2506 | int mlx4_QUERY_CQ_wrapper(struct mlx4_dev *dev, int slave, | |
2507 | struct mlx4_vhcr *vhcr, | |
2508 | struct mlx4_cmd_mailbox *inbox, | |
2509 | struct mlx4_cmd_mailbox *outbox, | |
2510 | struct mlx4_cmd_info *cmd) | |
2511 | { | |
2512 | int cqn = vhcr->in_modifier; | |
2513 | struct res_cq *cq; | |
2514 | int err; | |
2515 | ||
2516 | err = get_res(dev, slave, cqn, RES_CQ, &cq); | |
2517 | if (err) | |
2518 | return err; | |
2519 | ||
2520 | if (cq->com.from_state != RES_CQ_HW) | |
2521 | goto ex_put; | |
2522 | ||
2523 | err = mlx4_DMA_wrapper(dev, slave, vhcr, inbox, outbox, cmd); | |
2524 | ex_put: | |
2525 | put_res(dev, slave, cqn, RES_CQ); | |
2526 | ||
2527 | return err; | |
2528 | } | |
2529 | ||
2530 | static int handle_resize(struct mlx4_dev *dev, int slave, | |
2531 | struct mlx4_vhcr *vhcr, | |
2532 | struct mlx4_cmd_mailbox *inbox, | |
2533 | struct mlx4_cmd_mailbox *outbox, | |
2534 | struct mlx4_cmd_info *cmd, | |
2535 | struct res_cq *cq) | |
2536 | { | |
2537 | int err; | |
2538 | struct res_mtt *orig_mtt; | |
2539 | struct res_mtt *mtt; | |
2540 | struct mlx4_cq_context *cqc = inbox->buf; | |
2b8fb286 | 2541 | int mtt_base = cq_get_mtt_addr(cqc) / dev->caps.mtt_entry_sz; |
c82e9aa0 EC |
2542 | |
2543 | err = get_res(dev, slave, cq->mtt->com.res_id, RES_MTT, &orig_mtt); | |
2544 | if (err) | |
2545 | return err; | |
2546 | ||
2547 | if (orig_mtt != cq->mtt) { | |
2548 | err = -EINVAL; | |
2549 | goto ex_put; | |
2550 | } | |
2551 | ||
2b8fb286 | 2552 | err = get_res(dev, slave, mtt_base, RES_MTT, &mtt); |
c82e9aa0 EC |
2553 | if (err) |
2554 | goto ex_put; | |
2555 | ||
2556 | err = check_mtt_range(dev, slave, mtt_base, cq_get_mtt_size(cqc), mtt); | |
2557 | if (err) | |
2558 | goto ex_put1; | |
2559 | err = mlx4_DMA_wrapper(dev, slave, vhcr, inbox, outbox, cmd); | |
2560 | if (err) | |
2561 | goto ex_put1; | |
2562 | atomic_dec(&orig_mtt->ref_count); | |
2563 | put_res(dev, slave, orig_mtt->com.res_id, RES_MTT); | |
2564 | atomic_inc(&mtt->ref_count); | |
2565 | cq->mtt = mtt; | |
2566 | put_res(dev, slave, mtt->com.res_id, RES_MTT); | |
2567 | return 0; | |
2568 | ||
2569 | ex_put1: | |
2570 | put_res(dev, slave, mtt->com.res_id, RES_MTT); | |
2571 | ex_put: | |
2572 | put_res(dev, slave, orig_mtt->com.res_id, RES_MTT); | |
2573 | ||
2574 | return err; | |
2575 | ||
2576 | } | |
2577 | ||
2578 | int mlx4_MODIFY_CQ_wrapper(struct mlx4_dev *dev, int slave, | |
2579 | struct mlx4_vhcr *vhcr, | |
2580 | struct mlx4_cmd_mailbox *inbox, | |
2581 | struct mlx4_cmd_mailbox *outbox, | |
2582 | struct mlx4_cmd_info *cmd) | |
2583 | { | |
2584 | int cqn = vhcr->in_modifier; | |
2585 | struct res_cq *cq; | |
2586 | int err; | |
2587 | ||
2588 | err = get_res(dev, slave, cqn, RES_CQ, &cq); | |
2589 | if (err) | |
2590 | return err; | |
2591 | ||
2592 | if (cq->com.from_state != RES_CQ_HW) | |
2593 | goto ex_put; | |
2594 | ||
2595 | if (vhcr->op_modifier == 0) { | |
2596 | err = handle_resize(dev, slave, vhcr, inbox, outbox, cmd, cq); | |
dcf353b1 | 2597 | goto ex_put; |
c82e9aa0 EC |
2598 | } |
2599 | ||
2600 | err = mlx4_DMA_wrapper(dev, slave, vhcr, inbox, outbox, cmd); | |
2601 | ex_put: | |
2602 | put_res(dev, slave, cqn, RES_CQ); | |
2603 | ||
2604 | return err; | |
2605 | } | |
2606 | ||
c82e9aa0 EC |
2607 | static int srq_get_mtt_size(struct mlx4_srq_context *srqc) |
2608 | { | |
2609 | int log_srq_size = (be32_to_cpu(srqc->state_logsize_srqn) >> 24) & 0xf; | |
2610 | int log_rq_stride = srqc->logstride & 7; | |
2611 | int page_shift = (srqc->log_page_size & 0x3f) + 12; | |
2612 | ||
2613 | if (log_srq_size + log_rq_stride + 4 < page_shift) | |
2614 | return 1; | |
2615 | ||
2616 | return 1 << (log_srq_size + log_rq_stride + 4 - page_shift); | |
2617 | } | |
2618 | ||
2619 | int mlx4_SW2HW_SRQ_wrapper(struct mlx4_dev *dev, int slave, | |
2620 | struct mlx4_vhcr *vhcr, | |
2621 | struct mlx4_cmd_mailbox *inbox, | |
2622 | struct mlx4_cmd_mailbox *outbox, | |
2623 | struct mlx4_cmd_info *cmd) | |
2624 | { | |
2625 | int err; | |
2626 | int srqn = vhcr->in_modifier; | |
2627 | struct res_mtt *mtt; | |
2628 | struct res_srq *srq; | |
2629 | struct mlx4_srq_context *srqc = inbox->buf; | |
2b8fb286 | 2630 | int mtt_base = srq_get_mtt_addr(srqc) / dev->caps.mtt_entry_sz; |
c82e9aa0 EC |
2631 | |
2632 | if (srqn != (be32_to_cpu(srqc->state_logsize_srqn) & 0xffffff)) | |
2633 | return -EINVAL; | |
2634 | ||
2635 | err = srq_res_start_move_to(dev, slave, srqn, RES_SRQ_HW, &srq); | |
2636 | if (err) | |
2637 | return err; | |
2b8fb286 | 2638 | err = get_res(dev, slave, mtt_base, RES_MTT, &mtt); |
c82e9aa0 EC |
2639 | if (err) |
2640 | goto ex_abort; | |
2641 | err = check_mtt_range(dev, slave, mtt_base, srq_get_mtt_size(srqc), | |
2642 | mtt); | |
2643 | if (err) | |
2644 | goto ex_put_mtt; | |
2645 | ||
c82e9aa0 EC |
2646 | err = mlx4_DMA_wrapper(dev, slave, vhcr, inbox, outbox, cmd); |
2647 | if (err) | |
2648 | goto ex_put_mtt; | |
2649 | ||
2650 | atomic_inc(&mtt->ref_count); | |
2651 | srq->mtt = mtt; | |
2652 | put_res(dev, slave, mtt->com.res_id, RES_MTT); | |
2653 | res_end_move(dev, slave, RES_SRQ, srqn); | |
2654 | return 0; | |
2655 | ||
2656 | ex_put_mtt: | |
2657 | put_res(dev, slave, mtt->com.res_id, RES_MTT); | |
2658 | ex_abort: | |
2659 | res_abort_move(dev, slave, RES_SRQ, srqn); | |
2660 | ||
2661 | return err; | |
2662 | } | |
2663 | ||
2664 | int mlx4_HW2SW_SRQ_wrapper(struct mlx4_dev *dev, int slave, | |
2665 | struct mlx4_vhcr *vhcr, | |
2666 | struct mlx4_cmd_mailbox *inbox, | |
2667 | struct mlx4_cmd_mailbox *outbox, | |
2668 | struct mlx4_cmd_info *cmd) | |
2669 | { | |
2670 | int err; | |
2671 | int srqn = vhcr->in_modifier; | |
2672 | struct res_srq *srq; | |
2673 | ||
2674 | err = srq_res_start_move_to(dev, slave, srqn, RES_SRQ_ALLOCATED, &srq); | |
2675 | if (err) | |
2676 | return err; | |
2677 | err = mlx4_DMA_wrapper(dev, slave, vhcr, inbox, outbox, cmd); | |
2678 | if (err) | |
2679 | goto ex_abort; | |
2680 | atomic_dec(&srq->mtt->ref_count); | |
2681 | if (srq->cq) | |
2682 | atomic_dec(&srq->cq->ref_count); | |
2683 | res_end_move(dev, slave, RES_SRQ, srqn); | |
2684 | ||
2685 | return 0; | |
2686 | ||
2687 | ex_abort: | |
2688 | res_abort_move(dev, slave, RES_SRQ, srqn); | |
2689 | ||
2690 | return err; | |
2691 | } | |
2692 | ||
2693 | int mlx4_QUERY_SRQ_wrapper(struct mlx4_dev *dev, int slave, | |
2694 | struct mlx4_vhcr *vhcr, | |
2695 | struct mlx4_cmd_mailbox *inbox, | |
2696 | struct mlx4_cmd_mailbox *outbox, | |
2697 | struct mlx4_cmd_info *cmd) | |
2698 | { | |
2699 | int err; | |
2700 | int srqn = vhcr->in_modifier; | |
2701 | struct res_srq *srq; | |
2702 | ||
2703 | err = get_res(dev, slave, srqn, RES_SRQ, &srq); | |
2704 | if (err) | |
2705 | return err; | |
2706 | if (srq->com.from_state != RES_SRQ_HW) { | |
2707 | err = -EBUSY; | |
2708 | goto out; | |
2709 | } | |
2710 | err = mlx4_DMA_wrapper(dev, slave, vhcr, inbox, outbox, cmd); | |
2711 | out: | |
2712 | put_res(dev, slave, srqn, RES_SRQ); | |
2713 | return err; | |
2714 | } | |
2715 | ||
2716 | int mlx4_ARM_SRQ_wrapper(struct mlx4_dev *dev, int slave, | |
2717 | struct mlx4_vhcr *vhcr, | |
2718 | struct mlx4_cmd_mailbox *inbox, | |
2719 | struct mlx4_cmd_mailbox *outbox, | |
2720 | struct mlx4_cmd_info *cmd) | |
2721 | { | |
2722 | int err; | |
2723 | int srqn = vhcr->in_modifier; | |
2724 | struct res_srq *srq; | |
2725 | ||
2726 | err = get_res(dev, slave, srqn, RES_SRQ, &srq); | |
2727 | if (err) | |
2728 | return err; | |
2729 | ||
2730 | if (srq->com.from_state != RES_SRQ_HW) { | |
2731 | err = -EBUSY; | |
2732 | goto out; | |
2733 | } | |
2734 | ||
2735 | err = mlx4_DMA_wrapper(dev, slave, vhcr, inbox, outbox, cmd); | |
2736 | out: | |
2737 | put_res(dev, slave, srqn, RES_SRQ); | |
2738 | return err; | |
2739 | } | |
2740 | ||
2741 | int mlx4_GEN_QP_wrapper(struct mlx4_dev *dev, int slave, | |
2742 | struct mlx4_vhcr *vhcr, | |
2743 | struct mlx4_cmd_mailbox *inbox, | |
2744 | struct mlx4_cmd_mailbox *outbox, | |
2745 | struct mlx4_cmd_info *cmd) | |
2746 | { | |
2747 | int err; | |
2748 | int qpn = vhcr->in_modifier & 0x7fffff; | |
2749 | struct res_qp *qp; | |
2750 | ||
2751 | err = get_res(dev, slave, qpn, RES_QP, &qp); | |
2752 | if (err) | |
2753 | return err; | |
2754 | if (qp->com.from_state != RES_QP_HW) { | |
2755 | err = -EBUSY; | |
2756 | goto out; | |
2757 | } | |
2758 | ||
2759 | err = mlx4_DMA_wrapper(dev, slave, vhcr, inbox, outbox, cmd); | |
2760 | out: | |
2761 | put_res(dev, slave, qpn, RES_QP); | |
2762 | return err; | |
2763 | } | |
2764 | ||
54679e14 JM |
2765 | int mlx4_INIT2INIT_QP_wrapper(struct mlx4_dev *dev, int slave, |
2766 | struct mlx4_vhcr *vhcr, | |
2767 | struct mlx4_cmd_mailbox *inbox, | |
2768 | struct mlx4_cmd_mailbox *outbox, | |
2769 | struct mlx4_cmd_info *cmd) | |
2770 | { | |
2771 | struct mlx4_qp_context *context = inbox->buf + 8; | |
2772 | adjust_proxy_tun_qkey(dev, vhcr, context); | |
2773 | update_pkey_index(dev, slave, inbox); | |
2774 | return mlx4_GEN_QP_wrapper(dev, slave, vhcr, inbox, outbox, cmd); | |
2775 | } | |
2776 | ||
c82e9aa0 EC |
2777 | int mlx4_INIT2RTR_QP_wrapper(struct mlx4_dev *dev, int slave, |
2778 | struct mlx4_vhcr *vhcr, | |
2779 | struct mlx4_cmd_mailbox *inbox, | |
2780 | struct mlx4_cmd_mailbox *outbox, | |
2781 | struct mlx4_cmd_info *cmd) | |
2782 | { | |
54679e14 | 2783 | int err; |
c82e9aa0 EC |
2784 | struct mlx4_qp_context *qpc = inbox->buf + 8; |
2785 | ||
54679e14 JM |
2786 | err = verify_qp_parameters(dev, inbox, QP_TRANS_INIT2RTR, slave); |
2787 | if (err) | |
2788 | return err; | |
2789 | ||
2790 | update_pkey_index(dev, slave, inbox); | |
2791 | update_gid(dev, inbox, (u8)slave); | |
2792 | adjust_proxy_tun_qkey(dev, vhcr, qpc); | |
2793 | ||
2794 | return mlx4_GEN_QP_wrapper(dev, slave, vhcr, inbox, outbox, cmd); | |
2795 | } | |
2796 | ||
2797 | int mlx4_RTR2RTS_QP_wrapper(struct mlx4_dev *dev, int slave, | |
2798 | struct mlx4_vhcr *vhcr, | |
2799 | struct mlx4_cmd_mailbox *inbox, | |
2800 | struct mlx4_cmd_mailbox *outbox, | |
2801 | struct mlx4_cmd_info *cmd) | |
2802 | { | |
2803 | int err; | |
2804 | struct mlx4_qp_context *context = inbox->buf + 8; | |
2805 | ||
2806 | err = verify_qp_parameters(dev, inbox, QP_TRANS_RTR2RTS, slave); | |
2807 | if (err) | |
2808 | return err; | |
2809 | ||
2810 | update_pkey_index(dev, slave, inbox); | |
2811 | update_gid(dev, inbox, (u8)slave); | |
2812 | adjust_proxy_tun_qkey(dev, vhcr, context); | |
2813 | return mlx4_GEN_QP_wrapper(dev, slave, vhcr, inbox, outbox, cmd); | |
2814 | } | |
2815 | ||
2816 | int mlx4_RTS2RTS_QP_wrapper(struct mlx4_dev *dev, int slave, | |
2817 | struct mlx4_vhcr *vhcr, | |
2818 | struct mlx4_cmd_mailbox *inbox, | |
2819 | struct mlx4_cmd_mailbox *outbox, | |
2820 | struct mlx4_cmd_info *cmd) | |
2821 | { | |
2822 | int err; | |
2823 | struct mlx4_qp_context *context = inbox->buf + 8; | |
2824 | ||
2825 | err = verify_qp_parameters(dev, inbox, QP_TRANS_RTS2RTS, slave); | |
2826 | if (err) | |
2827 | return err; | |
2828 | ||
2829 | update_pkey_index(dev, slave, inbox); | |
2830 | update_gid(dev, inbox, (u8)slave); | |
2831 | adjust_proxy_tun_qkey(dev, vhcr, context); | |
2832 | return mlx4_GEN_QP_wrapper(dev, slave, vhcr, inbox, outbox, cmd); | |
2833 | } | |
2834 | ||
2835 | ||
2836 | int mlx4_SQERR2RTS_QP_wrapper(struct mlx4_dev *dev, int slave, | |
2837 | struct mlx4_vhcr *vhcr, | |
2838 | struct mlx4_cmd_mailbox *inbox, | |
2839 | struct mlx4_cmd_mailbox *outbox, | |
2840 | struct mlx4_cmd_info *cmd) | |
2841 | { | |
2842 | struct mlx4_qp_context *context = inbox->buf + 8; | |
2843 | adjust_proxy_tun_qkey(dev, vhcr, context); | |
2844 | return mlx4_GEN_QP_wrapper(dev, slave, vhcr, inbox, outbox, cmd); | |
2845 | } | |
2846 | ||
2847 | int mlx4_SQD2SQD_QP_wrapper(struct mlx4_dev *dev, int slave, | |
2848 | struct mlx4_vhcr *vhcr, | |
2849 | struct mlx4_cmd_mailbox *inbox, | |
2850 | struct mlx4_cmd_mailbox *outbox, | |
2851 | struct mlx4_cmd_info *cmd) | |
2852 | { | |
2853 | int err; | |
2854 | struct mlx4_qp_context *context = inbox->buf + 8; | |
2855 | ||
2856 | err = verify_qp_parameters(dev, inbox, QP_TRANS_SQD2SQD, slave); | |
2857 | if (err) | |
2858 | return err; | |
2859 | ||
2860 | adjust_proxy_tun_qkey(dev, vhcr, context); | |
2861 | update_gid(dev, inbox, (u8)slave); | |
2862 | update_pkey_index(dev, slave, inbox); | |
2863 | return mlx4_GEN_QP_wrapper(dev, slave, vhcr, inbox, outbox, cmd); | |
2864 | } | |
2865 | ||
2866 | int mlx4_SQD2RTS_QP_wrapper(struct mlx4_dev *dev, int slave, | |
2867 | struct mlx4_vhcr *vhcr, | |
2868 | struct mlx4_cmd_mailbox *inbox, | |
2869 | struct mlx4_cmd_mailbox *outbox, | |
2870 | struct mlx4_cmd_info *cmd) | |
2871 | { | |
2872 | int err; | |
2873 | struct mlx4_qp_context *context = inbox->buf + 8; | |
2874 | ||
2875 | err = verify_qp_parameters(dev, inbox, QP_TRANS_SQD2RTS, slave); | |
2876 | if (err) | |
2877 | return err; | |
c82e9aa0 | 2878 | |
54679e14 JM |
2879 | adjust_proxy_tun_qkey(dev, vhcr, context); |
2880 | update_gid(dev, inbox, (u8)slave); | |
2881 | update_pkey_index(dev, slave, inbox); | |
c82e9aa0 EC |
2882 | return mlx4_GEN_QP_wrapper(dev, slave, vhcr, inbox, outbox, cmd); |
2883 | } | |
2884 | ||
2885 | int mlx4_2RST_QP_wrapper(struct mlx4_dev *dev, int slave, | |
2886 | struct mlx4_vhcr *vhcr, | |
2887 | struct mlx4_cmd_mailbox *inbox, | |
2888 | struct mlx4_cmd_mailbox *outbox, | |
2889 | struct mlx4_cmd_info *cmd) | |
2890 | { | |
2891 | int err; | |
2892 | int qpn = vhcr->in_modifier & 0x7fffff; | |
2893 | struct res_qp *qp; | |
2894 | ||
2895 | err = qp_res_start_move_to(dev, slave, qpn, RES_QP_MAPPED, &qp, 0); | |
2896 | if (err) | |
2897 | return err; | |
2898 | err = mlx4_DMA_wrapper(dev, slave, vhcr, inbox, outbox, cmd); | |
2899 | if (err) | |
2900 | goto ex_abort; | |
2901 | ||
2902 | atomic_dec(&qp->mtt->ref_count); | |
2903 | atomic_dec(&qp->rcq->ref_count); | |
2904 | atomic_dec(&qp->scq->ref_count); | |
2905 | if (qp->srq) | |
2906 | atomic_dec(&qp->srq->ref_count); | |
2907 | res_end_move(dev, slave, RES_QP, qpn); | |
2908 | return 0; | |
2909 | ||
2910 | ex_abort: | |
2911 | res_abort_move(dev, slave, RES_QP, qpn); | |
2912 | ||
2913 | return err; | |
2914 | } | |
2915 | ||
2916 | static struct res_gid *find_gid(struct mlx4_dev *dev, int slave, | |
2917 | struct res_qp *rqp, u8 *gid) | |
2918 | { | |
2919 | struct res_gid *res; | |
2920 | ||
2921 | list_for_each_entry(res, &rqp->mcg_list, list) { | |
2922 | if (!memcmp(res->gid, gid, 16)) | |
2923 | return res; | |
2924 | } | |
2925 | return NULL; | |
2926 | } | |
2927 | ||
2928 | static int add_mcg_res(struct mlx4_dev *dev, int slave, struct res_qp *rqp, | |
9f5b6c63 EE |
2929 | u8 *gid, enum mlx4_protocol prot, |
2930 | enum mlx4_steer_type steer) | |
c82e9aa0 EC |
2931 | { |
2932 | struct res_gid *res; | |
2933 | int err; | |
2934 | ||
2935 | res = kzalloc(sizeof *res, GFP_KERNEL); | |
2936 | if (!res) | |
2937 | return -ENOMEM; | |
2938 | ||
2939 | spin_lock_irq(&rqp->mcg_spl); | |
2940 | if (find_gid(dev, slave, rqp, gid)) { | |
2941 | kfree(res); | |
2942 | err = -EEXIST; | |
2943 | } else { | |
2944 | memcpy(res->gid, gid, 16); | |
2945 | res->prot = prot; | |
9f5b6c63 | 2946 | res->steer = steer; |
c82e9aa0 EC |
2947 | list_add_tail(&res->list, &rqp->mcg_list); |
2948 | err = 0; | |
2949 | } | |
2950 | spin_unlock_irq(&rqp->mcg_spl); | |
2951 | ||
2952 | return err; | |
2953 | } | |
2954 | ||
2955 | static int rem_mcg_res(struct mlx4_dev *dev, int slave, struct res_qp *rqp, | |
9f5b6c63 EE |
2956 | u8 *gid, enum mlx4_protocol prot, |
2957 | enum mlx4_steer_type steer) | |
c82e9aa0 EC |
2958 | { |
2959 | struct res_gid *res; | |
2960 | int err; | |
2961 | ||
2962 | spin_lock_irq(&rqp->mcg_spl); | |
2963 | res = find_gid(dev, slave, rqp, gid); | |
9f5b6c63 | 2964 | if (!res || res->prot != prot || res->steer != steer) |
c82e9aa0 EC |
2965 | err = -EINVAL; |
2966 | else { | |
2967 | list_del(&res->list); | |
2968 | kfree(res); | |
2969 | err = 0; | |
2970 | } | |
2971 | spin_unlock_irq(&rqp->mcg_spl); | |
2972 | ||
2973 | return err; | |
2974 | } | |
2975 | ||
2976 | int mlx4_QP_ATTACH_wrapper(struct mlx4_dev *dev, int slave, | |
2977 | struct mlx4_vhcr *vhcr, | |
2978 | struct mlx4_cmd_mailbox *inbox, | |
2979 | struct mlx4_cmd_mailbox *outbox, | |
2980 | struct mlx4_cmd_info *cmd) | |
2981 | { | |
2982 | struct mlx4_qp qp; /* dummy for calling attach/detach */ | |
2983 | u8 *gid = inbox->buf; | |
2984 | enum mlx4_protocol prot = (vhcr->in_modifier >> 28) & 0x7; | |
162344ed | 2985 | int err; |
c82e9aa0 EC |
2986 | int qpn; |
2987 | struct res_qp *rqp; | |
2988 | int attach = vhcr->op_modifier; | |
2989 | int block_loopback = vhcr->in_modifier >> 31; | |
2990 | u8 steer_type_mask = 2; | |
75c6062c | 2991 | enum mlx4_steer_type type = (gid[7] & steer_type_mask) >> 1; |
c82e9aa0 | 2992 | |
3fb817f1 JM |
2993 | if (dev->caps.steering_mode != MLX4_STEERING_MODE_B0) |
2994 | return -EINVAL; | |
2995 | ||
c82e9aa0 EC |
2996 | qpn = vhcr->in_modifier & 0xffffff; |
2997 | err = get_res(dev, slave, qpn, RES_QP, &rqp); | |
2998 | if (err) | |
2999 | return err; | |
3000 | ||
3001 | qp.qpn = qpn; | |
3002 | if (attach) { | |
9f5b6c63 | 3003 | err = add_mcg_res(dev, slave, rqp, gid, prot, type); |
c82e9aa0 EC |
3004 | if (err) |
3005 | goto ex_put; | |
3006 | ||
3007 | err = mlx4_qp_attach_common(dev, &qp, gid, | |
3008 | block_loopback, prot, type); | |
3009 | if (err) | |
3010 | goto ex_rem; | |
3011 | } else { | |
9f5b6c63 | 3012 | err = rem_mcg_res(dev, slave, rqp, gid, prot, type); |
c82e9aa0 EC |
3013 | if (err) |
3014 | goto ex_put; | |
3015 | err = mlx4_qp_detach_common(dev, &qp, gid, prot, type); | |
3016 | } | |
3017 | ||
3018 | put_res(dev, slave, qpn, RES_QP); | |
3019 | return 0; | |
3020 | ||
3021 | ex_rem: | |
3022 | /* ignore error return below, already in error */ | |
162344ed | 3023 | (void) rem_mcg_res(dev, slave, rqp, gid, prot, type); |
c82e9aa0 EC |
3024 | ex_put: |
3025 | put_res(dev, slave, qpn, RES_QP); | |
3026 | ||
3027 | return err; | |
3028 | } | |
3029 | ||
7fb40f87 HHZ |
3030 | /* |
3031 | * MAC validation for Flow Steering rules. | |
3032 | * VF can attach rules only with a mac address which is assigned to it. | |
3033 | */ | |
3034 | static int validate_eth_header_mac(int slave, struct _rule_hw *eth_header, | |
3035 | struct list_head *rlist) | |
3036 | { | |
3037 | struct mac_res *res, *tmp; | |
3038 | __be64 be_mac; | |
3039 | ||
3040 | /* make sure it isn't multicast or broadcast mac*/ | |
3041 | if (!is_multicast_ether_addr(eth_header->eth.dst_mac) && | |
3042 | !is_broadcast_ether_addr(eth_header->eth.dst_mac)) { | |
3043 | list_for_each_entry_safe(res, tmp, rlist, list) { | |
3044 | be_mac = cpu_to_be64(res->mac << 16); | |
3045 | if (!memcmp(&be_mac, eth_header->eth.dst_mac, ETH_ALEN)) | |
3046 | return 0; | |
3047 | } | |
3048 | pr_err("MAC %pM doesn't belong to VF %d, Steering rule rejected\n", | |
3049 | eth_header->eth.dst_mac, slave); | |
3050 | return -EINVAL; | |
3051 | } | |
3052 | return 0; | |
3053 | } | |
3054 | ||
3055 | /* | |
3056 | * In case of missing eth header, append eth header with a MAC address | |
3057 | * assigned to the VF. | |
3058 | */ | |
3059 | static int add_eth_header(struct mlx4_dev *dev, int slave, | |
3060 | struct mlx4_cmd_mailbox *inbox, | |
3061 | struct list_head *rlist, int header_id) | |
3062 | { | |
3063 | struct mac_res *res, *tmp; | |
3064 | u8 port; | |
3065 | struct mlx4_net_trans_rule_hw_ctrl *ctrl; | |
3066 | struct mlx4_net_trans_rule_hw_eth *eth_header; | |
3067 | struct mlx4_net_trans_rule_hw_ipv4 *ip_header; | |
3068 | struct mlx4_net_trans_rule_hw_tcp_udp *l4_header; | |
3069 | __be64 be_mac = 0; | |
3070 | __be64 mac_msk = cpu_to_be64(MLX4_MAC_MASK << 16); | |
3071 | ||
3072 | ctrl = (struct mlx4_net_trans_rule_hw_ctrl *)inbox->buf; | |
015465f8 | 3073 | port = ctrl->port; |
7fb40f87 HHZ |
3074 | eth_header = (struct mlx4_net_trans_rule_hw_eth *)(ctrl + 1); |
3075 | ||
3076 | /* Clear a space in the inbox for eth header */ | |
3077 | switch (header_id) { | |
3078 | case MLX4_NET_TRANS_RULE_ID_IPV4: | |
3079 | ip_header = | |
3080 | (struct mlx4_net_trans_rule_hw_ipv4 *)(eth_header + 1); | |
3081 | memmove(ip_header, eth_header, | |
3082 | sizeof(*ip_header) + sizeof(*l4_header)); | |
3083 | break; | |
3084 | case MLX4_NET_TRANS_RULE_ID_TCP: | |
3085 | case MLX4_NET_TRANS_RULE_ID_UDP: | |
3086 | l4_header = (struct mlx4_net_trans_rule_hw_tcp_udp *) | |
3087 | (eth_header + 1); | |
3088 | memmove(l4_header, eth_header, sizeof(*l4_header)); | |
3089 | break; | |
3090 | default: | |
3091 | return -EINVAL; | |
3092 | } | |
3093 | list_for_each_entry_safe(res, tmp, rlist, list) { | |
3094 | if (port == res->port) { | |
3095 | be_mac = cpu_to_be64(res->mac << 16); | |
3096 | break; | |
3097 | } | |
3098 | } | |
3099 | if (!be_mac) { | |
3100 | pr_err("Failed adding eth header to FS rule, Can't find matching MAC for port %d .\n", | |
3101 | port); | |
3102 | return -EINVAL; | |
3103 | } | |
3104 | ||
3105 | memset(eth_header, 0, sizeof(*eth_header)); | |
3106 | eth_header->size = sizeof(*eth_header) >> 2; | |
3107 | eth_header->id = cpu_to_be16(__sw_id_hw[MLX4_NET_TRANS_RULE_ID_ETH]); | |
3108 | memcpy(eth_header->dst_mac, &be_mac, ETH_ALEN); | |
3109 | memcpy(eth_header->dst_mac_msk, &mac_msk, ETH_ALEN); | |
3110 | ||
3111 | return 0; | |
3112 | ||
3113 | } | |
3114 | ||
8fcfb4db HHZ |
3115 | int mlx4_QP_FLOW_STEERING_ATTACH_wrapper(struct mlx4_dev *dev, int slave, |
3116 | struct mlx4_vhcr *vhcr, | |
3117 | struct mlx4_cmd_mailbox *inbox, | |
3118 | struct mlx4_cmd_mailbox *outbox, | |
3119 | struct mlx4_cmd_info *cmd) | |
3120 | { | |
7fb40f87 HHZ |
3121 | |
3122 | struct mlx4_priv *priv = mlx4_priv(dev); | |
3123 | struct mlx4_resource_tracker *tracker = &priv->mfunc.master.res_tracker; | |
3124 | struct list_head *rlist = &tracker->slave_list[slave].res_list[RES_MAC]; | |
1b9c6b06 | 3125 | int err; |
a9c01e7a | 3126 | int qpn; |
7fb40f87 HHZ |
3127 | struct mlx4_net_trans_rule_hw_ctrl *ctrl; |
3128 | struct _rule_hw *rule_header; | |
3129 | int header_id; | |
1b9c6b06 | 3130 | |
0ff1fb65 HHZ |
3131 | if (dev->caps.steering_mode != |
3132 | MLX4_STEERING_MODE_DEVICE_MANAGED) | |
3133 | return -EOPNOTSUPP; | |
1b9c6b06 | 3134 | |
7fb40f87 | 3135 | ctrl = (struct mlx4_net_trans_rule_hw_ctrl *)inbox->buf; |
a9c01e7a HHZ |
3136 | qpn = be32_to_cpu(ctrl->qpn) & 0xffffff; |
3137 | err = get_res(dev, slave, qpn, RES_QP, NULL); | |
3138 | if (err) { | |
3139 | pr_err("Steering rule with qpn 0x%x rejected.\n", qpn); | |
3140 | return err; | |
3141 | } | |
7fb40f87 HHZ |
3142 | rule_header = (struct _rule_hw *)(ctrl + 1); |
3143 | header_id = map_hw_to_sw_id(be16_to_cpu(rule_header->id)); | |
3144 | ||
3145 | switch (header_id) { | |
3146 | case MLX4_NET_TRANS_RULE_ID_ETH: | |
a9c01e7a HHZ |
3147 | if (validate_eth_header_mac(slave, rule_header, rlist)) { |
3148 | err = -EINVAL; | |
3149 | goto err_put; | |
3150 | } | |
7fb40f87 | 3151 | break; |
60396683 JM |
3152 | case MLX4_NET_TRANS_RULE_ID_IB: |
3153 | break; | |
7fb40f87 HHZ |
3154 | case MLX4_NET_TRANS_RULE_ID_IPV4: |
3155 | case MLX4_NET_TRANS_RULE_ID_TCP: | |
3156 | case MLX4_NET_TRANS_RULE_ID_UDP: | |
3157 | pr_warn("Can't attach FS rule without L2 headers, adding L2 header.\n"); | |
a9c01e7a HHZ |
3158 | if (add_eth_header(dev, slave, inbox, rlist, header_id)) { |
3159 | err = -EINVAL; | |
3160 | goto err_put; | |
3161 | } | |
7fb40f87 HHZ |
3162 | vhcr->in_modifier += |
3163 | sizeof(struct mlx4_net_trans_rule_hw_eth) >> 2; | |
3164 | break; | |
3165 | default: | |
3166 | pr_err("Corrupted mailbox.\n"); | |
a9c01e7a HHZ |
3167 | err = -EINVAL; |
3168 | goto err_put; | |
7fb40f87 HHZ |
3169 | } |
3170 | ||
1b9c6b06 HHZ |
3171 | err = mlx4_cmd_imm(dev, inbox->dma, &vhcr->out_param, |
3172 | vhcr->in_modifier, 0, | |
3173 | MLX4_QP_FLOW_STEERING_ATTACH, MLX4_CMD_TIME_CLASS_A, | |
3174 | MLX4_CMD_NATIVE); | |
3175 | if (err) | |
a9c01e7a | 3176 | goto err_put; |
1b9c6b06 HHZ |
3177 | |
3178 | err = add_res_range(dev, slave, vhcr->out_param, 1, RES_FS_RULE, 0); | |
3179 | if (err) { | |
3180 | mlx4_err(dev, "Fail to add flow steering resources.\n "); | |
3181 | /* detach rule*/ | |
3182 | mlx4_cmd(dev, vhcr->out_param, 0, 0, | |
2065b38b | 3183 | MLX4_QP_FLOW_STEERING_DETACH, MLX4_CMD_TIME_CLASS_A, |
1b9c6b06 HHZ |
3184 | MLX4_CMD_NATIVE); |
3185 | } | |
a9c01e7a HHZ |
3186 | err_put: |
3187 | put_res(dev, slave, qpn, RES_QP); | |
1b9c6b06 | 3188 | return err; |
8fcfb4db HHZ |
3189 | } |
3190 | ||
3191 | int mlx4_QP_FLOW_STEERING_DETACH_wrapper(struct mlx4_dev *dev, int slave, | |
3192 | struct mlx4_vhcr *vhcr, | |
3193 | struct mlx4_cmd_mailbox *inbox, | |
3194 | struct mlx4_cmd_mailbox *outbox, | |
3195 | struct mlx4_cmd_info *cmd) | |
3196 | { | |
1b9c6b06 HHZ |
3197 | int err; |
3198 | ||
0ff1fb65 HHZ |
3199 | if (dev->caps.steering_mode != |
3200 | MLX4_STEERING_MODE_DEVICE_MANAGED) | |
3201 | return -EOPNOTSUPP; | |
1b9c6b06 HHZ |
3202 | |
3203 | err = rem_res_range(dev, slave, vhcr->in_param, 1, RES_FS_RULE, 0); | |
3204 | if (err) { | |
3205 | mlx4_err(dev, "Fail to remove flow steering resources.\n "); | |
3206 | return err; | |
3207 | } | |
3208 | ||
3209 | err = mlx4_cmd(dev, vhcr->in_param, 0, 0, | |
3210 | MLX4_QP_FLOW_STEERING_DETACH, MLX4_CMD_TIME_CLASS_A, | |
3211 | MLX4_CMD_NATIVE); | |
3212 | return err; | |
8fcfb4db HHZ |
3213 | } |
3214 | ||
c82e9aa0 EC |
3215 | enum { |
3216 | BUSY_MAX_RETRIES = 10 | |
3217 | }; | |
3218 | ||
3219 | int mlx4_QUERY_IF_STAT_wrapper(struct mlx4_dev *dev, int slave, | |
3220 | struct mlx4_vhcr *vhcr, | |
3221 | struct mlx4_cmd_mailbox *inbox, | |
3222 | struct mlx4_cmd_mailbox *outbox, | |
3223 | struct mlx4_cmd_info *cmd) | |
3224 | { | |
3225 | int err; | |
3226 | int index = vhcr->in_modifier & 0xffff; | |
3227 | ||
3228 | err = get_res(dev, slave, index, RES_COUNTER, NULL); | |
3229 | if (err) | |
3230 | return err; | |
3231 | ||
3232 | err = mlx4_DMA_wrapper(dev, slave, vhcr, inbox, outbox, cmd); | |
3233 | put_res(dev, slave, index, RES_COUNTER); | |
3234 | return err; | |
3235 | } | |
3236 | ||
3237 | static void detach_qp(struct mlx4_dev *dev, int slave, struct res_qp *rqp) | |
3238 | { | |
3239 | struct res_gid *rgid; | |
3240 | struct res_gid *tmp; | |
c82e9aa0 EC |
3241 | struct mlx4_qp qp; /* dummy for calling attach/detach */ |
3242 | ||
3243 | list_for_each_entry_safe(rgid, tmp, &rqp->mcg_list, list) { | |
3244 | qp.qpn = rqp->local_qpn; | |
162344ed OG |
3245 | (void) mlx4_qp_detach_common(dev, &qp, rgid->gid, rgid->prot, |
3246 | rgid->steer); | |
c82e9aa0 EC |
3247 | list_del(&rgid->list); |
3248 | kfree(rgid); | |
3249 | } | |
3250 | } | |
3251 | ||
3252 | static int _move_all_busy(struct mlx4_dev *dev, int slave, | |
3253 | enum mlx4_resource type, int print) | |
3254 | { | |
3255 | struct mlx4_priv *priv = mlx4_priv(dev); | |
3256 | struct mlx4_resource_tracker *tracker = | |
3257 | &priv->mfunc.master.res_tracker; | |
3258 | struct list_head *rlist = &tracker->slave_list[slave].res_list[type]; | |
3259 | struct res_common *r; | |
3260 | struct res_common *tmp; | |
3261 | int busy; | |
3262 | ||
3263 | busy = 0; | |
3264 | spin_lock_irq(mlx4_tlock(dev)); | |
3265 | list_for_each_entry_safe(r, tmp, rlist, list) { | |
3266 | if (r->owner == slave) { | |
3267 | if (!r->removing) { | |
3268 | if (r->state == RES_ANY_BUSY) { | |
3269 | if (print) | |
3270 | mlx4_dbg(dev, | |
aa1ec3dd | 3271 | "%s id 0x%llx is busy\n", |
c82e9aa0 EC |
3272 | ResourceType(type), |
3273 | r->res_id); | |
3274 | ++busy; | |
3275 | } else { | |
3276 | r->from_state = r->state; | |
3277 | r->state = RES_ANY_BUSY; | |
3278 | r->removing = 1; | |
3279 | } | |
3280 | } | |
3281 | } | |
3282 | } | |
3283 | spin_unlock_irq(mlx4_tlock(dev)); | |
3284 | ||
3285 | return busy; | |
3286 | } | |
3287 | ||
3288 | static int move_all_busy(struct mlx4_dev *dev, int slave, | |
3289 | enum mlx4_resource type) | |
3290 | { | |
3291 | unsigned long begin; | |
3292 | int busy; | |
3293 | ||
3294 | begin = jiffies; | |
3295 | do { | |
3296 | busy = _move_all_busy(dev, slave, type, 0); | |
3297 | if (time_after(jiffies, begin + 5 * HZ)) | |
3298 | break; | |
3299 | if (busy) | |
3300 | cond_resched(); | |
3301 | } while (busy); | |
3302 | ||
3303 | if (busy) | |
3304 | busy = _move_all_busy(dev, slave, type, 1); | |
3305 | ||
3306 | return busy; | |
3307 | } | |
3308 | static void rem_slave_qps(struct mlx4_dev *dev, int slave) | |
3309 | { | |
3310 | struct mlx4_priv *priv = mlx4_priv(dev); | |
3311 | struct mlx4_resource_tracker *tracker = &priv->mfunc.master.res_tracker; | |
3312 | struct list_head *qp_list = | |
3313 | &tracker->slave_list[slave].res_list[RES_QP]; | |
3314 | struct res_qp *qp; | |
3315 | struct res_qp *tmp; | |
3316 | int state; | |
3317 | u64 in_param; | |
3318 | int qpn; | |
3319 | int err; | |
3320 | ||
3321 | err = move_all_busy(dev, slave, RES_QP); | |
3322 | if (err) | |
3323 | mlx4_warn(dev, "rem_slave_qps: Could not move all qps to busy" | |
3324 | "for slave %d\n", slave); | |
3325 | ||
3326 | spin_lock_irq(mlx4_tlock(dev)); | |
3327 | list_for_each_entry_safe(qp, tmp, qp_list, com.list) { | |
3328 | spin_unlock_irq(mlx4_tlock(dev)); | |
3329 | if (qp->com.owner == slave) { | |
3330 | qpn = qp->com.res_id; | |
3331 | detach_qp(dev, slave, qp); | |
3332 | state = qp->com.from_state; | |
3333 | while (state != 0) { | |
3334 | switch (state) { | |
3335 | case RES_QP_RESERVED: | |
3336 | spin_lock_irq(mlx4_tlock(dev)); | |
4af1c048 HHZ |
3337 | rb_erase(&qp->com.node, |
3338 | &tracker->res_tree[RES_QP]); | |
c82e9aa0 EC |
3339 | list_del(&qp->com.list); |
3340 | spin_unlock_irq(mlx4_tlock(dev)); | |
3341 | kfree(qp); | |
3342 | state = 0; | |
3343 | break; | |
3344 | case RES_QP_MAPPED: | |
3345 | if (!valid_reserved(dev, slave, qpn)) | |
3346 | __mlx4_qp_free_icm(dev, qpn); | |
3347 | state = RES_QP_RESERVED; | |
3348 | break; | |
3349 | case RES_QP_HW: | |
3350 | in_param = slave; | |
3351 | err = mlx4_cmd(dev, in_param, | |
3352 | qp->local_qpn, 2, | |
3353 | MLX4_CMD_2RST_QP, | |
3354 | MLX4_CMD_TIME_CLASS_A, | |
3355 | MLX4_CMD_NATIVE); | |
3356 | if (err) | |
3357 | mlx4_dbg(dev, "rem_slave_qps: failed" | |
3358 | " to move slave %d qpn %d to" | |
3359 | " reset\n", slave, | |
3360 | qp->local_qpn); | |
3361 | atomic_dec(&qp->rcq->ref_count); | |
3362 | atomic_dec(&qp->scq->ref_count); | |
3363 | atomic_dec(&qp->mtt->ref_count); | |
3364 | if (qp->srq) | |
3365 | atomic_dec(&qp->srq->ref_count); | |
3366 | state = RES_QP_MAPPED; | |
3367 | break; | |
3368 | default: | |
3369 | state = 0; | |
3370 | } | |
3371 | } | |
3372 | } | |
3373 | spin_lock_irq(mlx4_tlock(dev)); | |
3374 | } | |
3375 | spin_unlock_irq(mlx4_tlock(dev)); | |
3376 | } | |
3377 | ||
3378 | static void rem_slave_srqs(struct mlx4_dev *dev, int slave) | |
3379 | { | |
3380 | struct mlx4_priv *priv = mlx4_priv(dev); | |
3381 | struct mlx4_resource_tracker *tracker = &priv->mfunc.master.res_tracker; | |
3382 | struct list_head *srq_list = | |
3383 | &tracker->slave_list[slave].res_list[RES_SRQ]; | |
3384 | struct res_srq *srq; | |
3385 | struct res_srq *tmp; | |
3386 | int state; | |
3387 | u64 in_param; | |
3388 | LIST_HEAD(tlist); | |
3389 | int srqn; | |
3390 | int err; | |
3391 | ||
3392 | err = move_all_busy(dev, slave, RES_SRQ); | |
3393 | if (err) | |
3394 | mlx4_warn(dev, "rem_slave_srqs: Could not move all srqs to " | |
3395 | "busy for slave %d\n", slave); | |
3396 | ||
3397 | spin_lock_irq(mlx4_tlock(dev)); | |
3398 | list_for_each_entry_safe(srq, tmp, srq_list, com.list) { | |
3399 | spin_unlock_irq(mlx4_tlock(dev)); | |
3400 | if (srq->com.owner == slave) { | |
3401 | srqn = srq->com.res_id; | |
3402 | state = srq->com.from_state; | |
3403 | while (state != 0) { | |
3404 | switch (state) { | |
3405 | case RES_SRQ_ALLOCATED: | |
3406 | __mlx4_srq_free_icm(dev, srqn); | |
3407 | spin_lock_irq(mlx4_tlock(dev)); | |
4af1c048 HHZ |
3408 | rb_erase(&srq->com.node, |
3409 | &tracker->res_tree[RES_SRQ]); | |
c82e9aa0 EC |
3410 | list_del(&srq->com.list); |
3411 | spin_unlock_irq(mlx4_tlock(dev)); | |
3412 | kfree(srq); | |
3413 | state = 0; | |
3414 | break; | |
3415 | ||
3416 | case RES_SRQ_HW: | |
3417 | in_param = slave; | |
3418 | err = mlx4_cmd(dev, in_param, srqn, 1, | |
3419 | MLX4_CMD_HW2SW_SRQ, | |
3420 | MLX4_CMD_TIME_CLASS_A, | |
3421 | MLX4_CMD_NATIVE); | |
3422 | if (err) | |
3423 | mlx4_dbg(dev, "rem_slave_srqs: failed" | |
3424 | " to move slave %d srq %d to" | |
3425 | " SW ownership\n", | |
3426 | slave, srqn); | |
3427 | ||
3428 | atomic_dec(&srq->mtt->ref_count); | |
3429 | if (srq->cq) | |
3430 | atomic_dec(&srq->cq->ref_count); | |
3431 | state = RES_SRQ_ALLOCATED; | |
3432 | break; | |
3433 | ||
3434 | default: | |
3435 | state = 0; | |
3436 | } | |
3437 | } | |
3438 | } | |
3439 | spin_lock_irq(mlx4_tlock(dev)); | |
3440 | } | |
3441 | spin_unlock_irq(mlx4_tlock(dev)); | |
3442 | } | |
3443 | ||
3444 | static void rem_slave_cqs(struct mlx4_dev *dev, int slave) | |
3445 | { | |
3446 | struct mlx4_priv *priv = mlx4_priv(dev); | |
3447 | struct mlx4_resource_tracker *tracker = &priv->mfunc.master.res_tracker; | |
3448 | struct list_head *cq_list = | |
3449 | &tracker->slave_list[slave].res_list[RES_CQ]; | |
3450 | struct res_cq *cq; | |
3451 | struct res_cq *tmp; | |
3452 | int state; | |
3453 | u64 in_param; | |
3454 | LIST_HEAD(tlist); | |
3455 | int cqn; | |
3456 | int err; | |
3457 | ||
3458 | err = move_all_busy(dev, slave, RES_CQ); | |
3459 | if (err) | |
3460 | mlx4_warn(dev, "rem_slave_cqs: Could not move all cqs to " | |
3461 | "busy for slave %d\n", slave); | |
3462 | ||
3463 | spin_lock_irq(mlx4_tlock(dev)); | |
3464 | list_for_each_entry_safe(cq, tmp, cq_list, com.list) { | |
3465 | spin_unlock_irq(mlx4_tlock(dev)); | |
3466 | if (cq->com.owner == slave && !atomic_read(&cq->ref_count)) { | |
3467 | cqn = cq->com.res_id; | |
3468 | state = cq->com.from_state; | |
3469 | while (state != 0) { | |
3470 | switch (state) { | |
3471 | case RES_CQ_ALLOCATED: | |
3472 | __mlx4_cq_free_icm(dev, cqn); | |
3473 | spin_lock_irq(mlx4_tlock(dev)); | |
4af1c048 HHZ |
3474 | rb_erase(&cq->com.node, |
3475 | &tracker->res_tree[RES_CQ]); | |
c82e9aa0 EC |
3476 | list_del(&cq->com.list); |
3477 | spin_unlock_irq(mlx4_tlock(dev)); | |
3478 | kfree(cq); | |
3479 | state = 0; | |
3480 | break; | |
3481 | ||
3482 | case RES_CQ_HW: | |
3483 | in_param = slave; | |
3484 | err = mlx4_cmd(dev, in_param, cqn, 1, | |
3485 | MLX4_CMD_HW2SW_CQ, | |
3486 | MLX4_CMD_TIME_CLASS_A, | |
3487 | MLX4_CMD_NATIVE); | |
3488 | if (err) | |
3489 | mlx4_dbg(dev, "rem_slave_cqs: failed" | |
3490 | " to move slave %d cq %d to" | |
3491 | " SW ownership\n", | |
3492 | slave, cqn); | |
3493 | atomic_dec(&cq->mtt->ref_count); | |
3494 | state = RES_CQ_ALLOCATED; | |
3495 | break; | |
3496 | ||
3497 | default: | |
3498 | state = 0; | |
3499 | } | |
3500 | } | |
3501 | } | |
3502 | spin_lock_irq(mlx4_tlock(dev)); | |
3503 | } | |
3504 | spin_unlock_irq(mlx4_tlock(dev)); | |
3505 | } | |
3506 | ||
3507 | static void rem_slave_mrs(struct mlx4_dev *dev, int slave) | |
3508 | { | |
3509 | struct mlx4_priv *priv = mlx4_priv(dev); | |
3510 | struct mlx4_resource_tracker *tracker = &priv->mfunc.master.res_tracker; | |
3511 | struct list_head *mpt_list = | |
3512 | &tracker->slave_list[slave].res_list[RES_MPT]; | |
3513 | struct res_mpt *mpt; | |
3514 | struct res_mpt *tmp; | |
3515 | int state; | |
3516 | u64 in_param; | |
3517 | LIST_HEAD(tlist); | |
3518 | int mptn; | |
3519 | int err; | |
3520 | ||
3521 | err = move_all_busy(dev, slave, RES_MPT); | |
3522 | if (err) | |
3523 | mlx4_warn(dev, "rem_slave_mrs: Could not move all mpts to " | |
3524 | "busy for slave %d\n", slave); | |
3525 | ||
3526 | spin_lock_irq(mlx4_tlock(dev)); | |
3527 | list_for_each_entry_safe(mpt, tmp, mpt_list, com.list) { | |
3528 | spin_unlock_irq(mlx4_tlock(dev)); | |
3529 | if (mpt->com.owner == slave) { | |
3530 | mptn = mpt->com.res_id; | |
3531 | state = mpt->com.from_state; | |
3532 | while (state != 0) { | |
3533 | switch (state) { | |
3534 | case RES_MPT_RESERVED: | |
b20e519a | 3535 | __mlx4_mpt_release(dev, mpt->key); |
c82e9aa0 | 3536 | spin_lock_irq(mlx4_tlock(dev)); |
4af1c048 HHZ |
3537 | rb_erase(&mpt->com.node, |
3538 | &tracker->res_tree[RES_MPT]); | |
c82e9aa0 EC |
3539 | list_del(&mpt->com.list); |
3540 | spin_unlock_irq(mlx4_tlock(dev)); | |
3541 | kfree(mpt); | |
3542 | state = 0; | |
3543 | break; | |
3544 | ||
3545 | case RES_MPT_MAPPED: | |
b20e519a | 3546 | __mlx4_mpt_free_icm(dev, mpt->key); |
c82e9aa0 EC |
3547 | state = RES_MPT_RESERVED; |
3548 | break; | |
3549 | ||
3550 | case RES_MPT_HW: | |
3551 | in_param = slave; | |
3552 | err = mlx4_cmd(dev, in_param, mptn, 0, | |
3553 | MLX4_CMD_HW2SW_MPT, | |
3554 | MLX4_CMD_TIME_CLASS_A, | |
3555 | MLX4_CMD_NATIVE); | |
3556 | if (err) | |
3557 | mlx4_dbg(dev, "rem_slave_mrs: failed" | |
3558 | " to move slave %d mpt %d to" | |
3559 | " SW ownership\n", | |
3560 | slave, mptn); | |
3561 | if (mpt->mtt) | |
3562 | atomic_dec(&mpt->mtt->ref_count); | |
3563 | state = RES_MPT_MAPPED; | |
3564 | break; | |
3565 | default: | |
3566 | state = 0; | |
3567 | } | |
3568 | } | |
3569 | } | |
3570 | spin_lock_irq(mlx4_tlock(dev)); | |
3571 | } | |
3572 | spin_unlock_irq(mlx4_tlock(dev)); | |
3573 | } | |
3574 | ||
3575 | static void rem_slave_mtts(struct mlx4_dev *dev, int slave) | |
3576 | { | |
3577 | struct mlx4_priv *priv = mlx4_priv(dev); | |
3578 | struct mlx4_resource_tracker *tracker = | |
3579 | &priv->mfunc.master.res_tracker; | |
3580 | struct list_head *mtt_list = | |
3581 | &tracker->slave_list[slave].res_list[RES_MTT]; | |
3582 | struct res_mtt *mtt; | |
3583 | struct res_mtt *tmp; | |
3584 | int state; | |
3585 | LIST_HEAD(tlist); | |
3586 | int base; | |
3587 | int err; | |
3588 | ||
3589 | err = move_all_busy(dev, slave, RES_MTT); | |
3590 | if (err) | |
3591 | mlx4_warn(dev, "rem_slave_mtts: Could not move all mtts to " | |
3592 | "busy for slave %d\n", slave); | |
3593 | ||
3594 | spin_lock_irq(mlx4_tlock(dev)); | |
3595 | list_for_each_entry_safe(mtt, tmp, mtt_list, com.list) { | |
3596 | spin_unlock_irq(mlx4_tlock(dev)); | |
3597 | if (mtt->com.owner == slave) { | |
3598 | base = mtt->com.res_id; | |
3599 | state = mtt->com.from_state; | |
3600 | while (state != 0) { | |
3601 | switch (state) { | |
3602 | case RES_MTT_ALLOCATED: | |
3603 | __mlx4_free_mtt_range(dev, base, | |
3604 | mtt->order); | |
3605 | spin_lock_irq(mlx4_tlock(dev)); | |
4af1c048 HHZ |
3606 | rb_erase(&mtt->com.node, |
3607 | &tracker->res_tree[RES_MTT]); | |
c82e9aa0 EC |
3608 | list_del(&mtt->com.list); |
3609 | spin_unlock_irq(mlx4_tlock(dev)); | |
3610 | kfree(mtt); | |
3611 | state = 0; | |
3612 | break; | |
3613 | ||
3614 | default: | |
3615 | state = 0; | |
3616 | } | |
3617 | } | |
3618 | } | |
3619 | spin_lock_irq(mlx4_tlock(dev)); | |
3620 | } | |
3621 | spin_unlock_irq(mlx4_tlock(dev)); | |
3622 | } | |
3623 | ||
1b9c6b06 HHZ |
3624 | static void rem_slave_fs_rule(struct mlx4_dev *dev, int slave) |
3625 | { | |
3626 | struct mlx4_priv *priv = mlx4_priv(dev); | |
3627 | struct mlx4_resource_tracker *tracker = | |
3628 | &priv->mfunc.master.res_tracker; | |
3629 | struct list_head *fs_rule_list = | |
3630 | &tracker->slave_list[slave].res_list[RES_FS_RULE]; | |
3631 | struct res_fs_rule *fs_rule; | |
3632 | struct res_fs_rule *tmp; | |
3633 | int state; | |
3634 | u64 base; | |
3635 | int err; | |
3636 | ||
3637 | err = move_all_busy(dev, slave, RES_FS_RULE); | |
3638 | if (err) | |
3639 | mlx4_warn(dev, "rem_slave_fs_rule: Could not move all mtts to busy for slave %d\n", | |
3640 | slave); | |
3641 | ||
3642 | spin_lock_irq(mlx4_tlock(dev)); | |
3643 | list_for_each_entry_safe(fs_rule, tmp, fs_rule_list, com.list) { | |
3644 | spin_unlock_irq(mlx4_tlock(dev)); | |
3645 | if (fs_rule->com.owner == slave) { | |
3646 | base = fs_rule->com.res_id; | |
3647 | state = fs_rule->com.from_state; | |
3648 | while (state != 0) { | |
3649 | switch (state) { | |
3650 | case RES_FS_RULE_ALLOCATED: | |
3651 | /* detach rule */ | |
3652 | err = mlx4_cmd(dev, base, 0, 0, | |
3653 | MLX4_QP_FLOW_STEERING_DETACH, | |
3654 | MLX4_CMD_TIME_CLASS_A, | |
3655 | MLX4_CMD_NATIVE); | |
3656 | ||
3657 | spin_lock_irq(mlx4_tlock(dev)); | |
3658 | rb_erase(&fs_rule->com.node, | |
3659 | &tracker->res_tree[RES_FS_RULE]); | |
3660 | list_del(&fs_rule->com.list); | |
3661 | spin_unlock_irq(mlx4_tlock(dev)); | |
3662 | kfree(fs_rule); | |
3663 | state = 0; | |
3664 | break; | |
3665 | ||
3666 | default: | |
3667 | state = 0; | |
3668 | } | |
3669 | } | |
3670 | } | |
3671 | spin_lock_irq(mlx4_tlock(dev)); | |
3672 | } | |
3673 | spin_unlock_irq(mlx4_tlock(dev)); | |
3674 | } | |
3675 | ||
c82e9aa0 EC |
3676 | static void rem_slave_eqs(struct mlx4_dev *dev, int slave) |
3677 | { | |
3678 | struct mlx4_priv *priv = mlx4_priv(dev); | |
3679 | struct mlx4_resource_tracker *tracker = &priv->mfunc.master.res_tracker; | |
3680 | struct list_head *eq_list = | |
3681 | &tracker->slave_list[slave].res_list[RES_EQ]; | |
3682 | struct res_eq *eq; | |
3683 | struct res_eq *tmp; | |
3684 | int err; | |
3685 | int state; | |
3686 | LIST_HEAD(tlist); | |
3687 | int eqn; | |
3688 | struct mlx4_cmd_mailbox *mailbox; | |
3689 | ||
3690 | err = move_all_busy(dev, slave, RES_EQ); | |
3691 | if (err) | |
3692 | mlx4_warn(dev, "rem_slave_eqs: Could not move all eqs to " | |
3693 | "busy for slave %d\n", slave); | |
3694 | ||
3695 | spin_lock_irq(mlx4_tlock(dev)); | |
3696 | list_for_each_entry_safe(eq, tmp, eq_list, com.list) { | |
3697 | spin_unlock_irq(mlx4_tlock(dev)); | |
3698 | if (eq->com.owner == slave) { | |
3699 | eqn = eq->com.res_id; | |
3700 | state = eq->com.from_state; | |
3701 | while (state != 0) { | |
3702 | switch (state) { | |
3703 | case RES_EQ_RESERVED: | |
3704 | spin_lock_irq(mlx4_tlock(dev)); | |
4af1c048 HHZ |
3705 | rb_erase(&eq->com.node, |
3706 | &tracker->res_tree[RES_EQ]); | |
c82e9aa0 EC |
3707 | list_del(&eq->com.list); |
3708 | spin_unlock_irq(mlx4_tlock(dev)); | |
3709 | kfree(eq); | |
3710 | state = 0; | |
3711 | break; | |
3712 | ||
3713 | case RES_EQ_HW: | |
3714 | mailbox = mlx4_alloc_cmd_mailbox(dev); | |
3715 | if (IS_ERR(mailbox)) { | |
3716 | cond_resched(); | |
3717 | continue; | |
3718 | } | |
3719 | err = mlx4_cmd_box(dev, slave, 0, | |
3720 | eqn & 0xff, 0, | |
3721 | MLX4_CMD_HW2SW_EQ, | |
3722 | MLX4_CMD_TIME_CLASS_A, | |
3723 | MLX4_CMD_NATIVE); | |
eb71d0d6 JM |
3724 | if (err) |
3725 | mlx4_dbg(dev, "rem_slave_eqs: failed" | |
3726 | " to move slave %d eqs %d to" | |
3727 | " SW ownership\n", slave, eqn); | |
c82e9aa0 | 3728 | mlx4_free_cmd_mailbox(dev, mailbox); |
eb71d0d6 JM |
3729 | atomic_dec(&eq->mtt->ref_count); |
3730 | state = RES_EQ_RESERVED; | |
c82e9aa0 EC |
3731 | break; |
3732 | ||
3733 | default: | |
3734 | state = 0; | |
3735 | } | |
3736 | } | |
3737 | } | |
3738 | spin_lock_irq(mlx4_tlock(dev)); | |
3739 | } | |
3740 | spin_unlock_irq(mlx4_tlock(dev)); | |
3741 | } | |
3742 | ||
ba062d52 JM |
3743 | static void rem_slave_counters(struct mlx4_dev *dev, int slave) |
3744 | { | |
3745 | struct mlx4_priv *priv = mlx4_priv(dev); | |
3746 | struct mlx4_resource_tracker *tracker = &priv->mfunc.master.res_tracker; | |
3747 | struct list_head *counter_list = | |
3748 | &tracker->slave_list[slave].res_list[RES_COUNTER]; | |
3749 | struct res_counter *counter; | |
3750 | struct res_counter *tmp; | |
3751 | int err; | |
3752 | int index; | |
3753 | ||
3754 | err = move_all_busy(dev, slave, RES_COUNTER); | |
3755 | if (err) | |
3756 | mlx4_warn(dev, "rem_slave_counters: Could not move all counters to " | |
3757 | "busy for slave %d\n", slave); | |
3758 | ||
3759 | spin_lock_irq(mlx4_tlock(dev)); | |
3760 | list_for_each_entry_safe(counter, tmp, counter_list, com.list) { | |
3761 | if (counter->com.owner == slave) { | |
3762 | index = counter->com.res_id; | |
4af1c048 HHZ |
3763 | rb_erase(&counter->com.node, |
3764 | &tracker->res_tree[RES_COUNTER]); | |
ba062d52 JM |
3765 | list_del(&counter->com.list); |
3766 | kfree(counter); | |
3767 | __mlx4_counter_free(dev, index); | |
3768 | } | |
3769 | } | |
3770 | spin_unlock_irq(mlx4_tlock(dev)); | |
3771 | } | |
3772 | ||
3773 | static void rem_slave_xrcdns(struct mlx4_dev *dev, int slave) | |
3774 | { | |
3775 | struct mlx4_priv *priv = mlx4_priv(dev); | |
3776 | struct mlx4_resource_tracker *tracker = &priv->mfunc.master.res_tracker; | |
3777 | struct list_head *xrcdn_list = | |
3778 | &tracker->slave_list[slave].res_list[RES_XRCD]; | |
3779 | struct res_xrcdn *xrcd; | |
3780 | struct res_xrcdn *tmp; | |
3781 | int err; | |
3782 | int xrcdn; | |
3783 | ||
3784 | err = move_all_busy(dev, slave, RES_XRCD); | |
3785 | if (err) | |
3786 | mlx4_warn(dev, "rem_slave_xrcdns: Could not move all xrcdns to " | |
3787 | "busy for slave %d\n", slave); | |
3788 | ||
3789 | spin_lock_irq(mlx4_tlock(dev)); | |
3790 | list_for_each_entry_safe(xrcd, tmp, xrcdn_list, com.list) { | |
3791 | if (xrcd->com.owner == slave) { | |
3792 | xrcdn = xrcd->com.res_id; | |
4af1c048 | 3793 | rb_erase(&xrcd->com.node, &tracker->res_tree[RES_XRCD]); |
ba062d52 JM |
3794 | list_del(&xrcd->com.list); |
3795 | kfree(xrcd); | |
3796 | __mlx4_xrcd_free(dev, xrcdn); | |
3797 | } | |
3798 | } | |
3799 | spin_unlock_irq(mlx4_tlock(dev)); | |
3800 | } | |
3801 | ||
c82e9aa0 EC |
3802 | void mlx4_delete_all_resources_for_slave(struct mlx4_dev *dev, int slave) |
3803 | { | |
3804 | struct mlx4_priv *priv = mlx4_priv(dev); | |
3805 | ||
3806 | mutex_lock(&priv->mfunc.master.res_tracker.slave_list[slave].mutex); | |
3807 | /*VLAN*/ | |
3808 | rem_slave_macs(dev, slave); | |
80cb0021 | 3809 | rem_slave_fs_rule(dev, slave); |
c82e9aa0 EC |
3810 | rem_slave_qps(dev, slave); |
3811 | rem_slave_srqs(dev, slave); | |
3812 | rem_slave_cqs(dev, slave); | |
3813 | rem_slave_mrs(dev, slave); | |
3814 | rem_slave_eqs(dev, slave); | |
3815 | rem_slave_mtts(dev, slave); | |
ba062d52 JM |
3816 | rem_slave_counters(dev, slave); |
3817 | rem_slave_xrcdns(dev, slave); | |
c82e9aa0 EC |
3818 | mutex_unlock(&priv->mfunc.master.res_tracker.slave_list[slave].mutex); |
3819 | } |