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e8f887ac AV |
1 | /* |
2 | * Copyright (c) 2016, Mellanox Technologies. All rights reserved. | |
3 | * | |
4 | * This software is available to you under a choice of one of two | |
5 | * licenses. You may choose to be licensed under the terms of the GNU | |
6 | * General Public License (GPL) Version 2, available from the file | |
7 | * COPYING in the main directory of this source tree, or the | |
8 | * OpenIB.org BSD license below: | |
9 | * | |
10 | * Redistribution and use in source and binary forms, with or | |
11 | * without modification, are permitted provided that the following | |
12 | * conditions are met: | |
13 | * | |
14 | * - Redistributions of source code must retain the above | |
15 | * copyright notice, this list of conditions and the following | |
16 | * disclaimer. | |
17 | * | |
18 | * - Redistributions in binary form must reproduce the above | |
19 | * copyright notice, this list of conditions and the following | |
20 | * disclaimer in the documentation and/or other materials | |
21 | * provided with the distribution. | |
22 | * | |
23 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, | |
24 | * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF | |
25 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND | |
26 | * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS | |
27 | * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN | |
28 | * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN | |
29 | * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE | |
30 | * SOFTWARE. | |
31 | */ | |
32 | ||
e3a2b7ed | 33 | #include <net/flow_dissector.h> |
3f7d0eb4 | 34 | #include <net/sch_generic.h> |
e3a2b7ed AV |
35 | #include <net/pkt_cls.h> |
36 | #include <net/tc_act/tc_gact.h> | |
12185a9f | 37 | #include <net/tc_act/tc_skbedit.h> |
e8f887ac AV |
38 | #include <linux/mlx5/fs.h> |
39 | #include <linux/mlx5/device.h> | |
40 | #include <linux/rhashtable.h> | |
03a9d11e OG |
41 | #include <net/switchdev.h> |
42 | #include <net/tc_act/tc_mirred.h> | |
776b12b6 | 43 | #include <net/tc_act/tc_vlan.h> |
bbd00f7e | 44 | #include <net/tc_act/tc_tunnel_key.h> |
d79b6df6 | 45 | #include <net/tc_act/tc_pedit.h> |
26c02749 | 46 | #include <net/tc_act/tc_csum.h> |
a54e20b4 | 47 | #include <net/vxlan.h> |
f6dfb4c3 | 48 | #include <net/arp.h> |
e8f887ac | 49 | #include "en.h" |
1d447a39 | 50 | #include "en_rep.h" |
232c0013 | 51 | #include "en_tc.h" |
03a9d11e | 52 | #include "eswitch.h" |
bbd00f7e | 53 | #include "vxlan.h" |
3f6d08d1 | 54 | #include "fs_core.h" |
e8f887ac | 55 | |
3bc4b7bf OG |
56 | struct mlx5_nic_flow_attr { |
57 | u32 action; | |
58 | u32 flow_tag; | |
2f4fe4ca | 59 | u32 mod_hdr_id; |
5c65c564 | 60 | u32 hairpin_tirn; |
3f6d08d1 | 61 | struct mlx5_flow_table *hairpin_ft; |
3bc4b7bf OG |
62 | }; |
63 | ||
65ba8fb7 OG |
64 | enum { |
65 | MLX5E_TC_FLOW_ESWITCH = BIT(0), | |
3bc4b7bf | 66 | MLX5E_TC_FLOW_NIC = BIT(1), |
0b67a38f | 67 | MLX5E_TC_FLOW_OFFLOADED = BIT(2), |
5c65c564 | 68 | MLX5E_TC_FLOW_HAIRPIN = BIT(3), |
3f6d08d1 | 69 | MLX5E_TC_FLOW_HAIRPIN_RSS = BIT(4), |
65ba8fb7 OG |
70 | }; |
71 | ||
e8f887ac AV |
72 | struct mlx5e_tc_flow { |
73 | struct rhash_head node; | |
74 | u64 cookie; | |
65ba8fb7 | 75 | u8 flags; |
74491de9 | 76 | struct mlx5_flow_handle *rule; |
11c9c548 OG |
77 | struct list_head encap; /* flows sharing the same encap ID */ |
78 | struct list_head mod_hdr; /* flows sharing the same mod hdr ID */ | |
5c65c564 | 79 | struct list_head hairpin; /* flows sharing the same hairpin */ |
3bc4b7bf OG |
80 | union { |
81 | struct mlx5_esw_flow_attr esw_attr[0]; | |
82 | struct mlx5_nic_flow_attr nic_attr[0]; | |
83 | }; | |
e8f887ac AV |
84 | }; |
85 | ||
17091853 | 86 | struct mlx5e_tc_flow_parse_attr { |
3c37745e | 87 | struct ip_tunnel_info tun_info; |
17091853 | 88 | struct mlx5_flow_spec spec; |
d79b6df6 OG |
89 | int num_mod_hdr_actions; |
90 | void *mod_hdr_actions; | |
3c37745e | 91 | int mirred_ifindex; |
17091853 OG |
92 | }; |
93 | ||
a54e20b4 HHZ |
94 | enum { |
95 | MLX5_HEADER_TYPE_VXLAN = 0x0, | |
96 | MLX5_HEADER_TYPE_NVGRE = 0x1, | |
97 | }; | |
98 | ||
acff797c | 99 | #define MLX5E_TC_TABLE_NUM_GROUPS 4 |
21b9c144 | 100 | #define MLX5E_TC_TABLE_MAX_GROUP_SIZE (1 << 16) |
e8f887ac | 101 | |
77ab67b7 OG |
102 | struct mlx5e_hairpin { |
103 | struct mlx5_hairpin *pair; | |
104 | ||
105 | struct mlx5_core_dev *func_mdev; | |
3f6d08d1 | 106 | struct mlx5e_priv *func_priv; |
77ab67b7 OG |
107 | u32 tdn; |
108 | u32 tirn; | |
3f6d08d1 OG |
109 | |
110 | int num_channels; | |
111 | struct mlx5e_rqt indir_rqt; | |
112 | u32 indir_tirn[MLX5E_NUM_INDIR_TIRS]; | |
113 | struct mlx5e_ttc_table ttc; | |
77ab67b7 OG |
114 | }; |
115 | ||
5c65c564 OG |
116 | struct mlx5e_hairpin_entry { |
117 | /* a node of a hash table which keeps all the hairpin entries */ | |
118 | struct hlist_node hairpin_hlist; | |
119 | ||
120 | /* flows sharing the same hairpin */ | |
121 | struct list_head flows; | |
122 | ||
d8822868 | 123 | u16 peer_vhca_id; |
106be53b | 124 | u8 prio; |
5c65c564 OG |
125 | struct mlx5e_hairpin *hp; |
126 | }; | |
127 | ||
11c9c548 OG |
128 | struct mod_hdr_key { |
129 | int num_actions; | |
130 | void *actions; | |
131 | }; | |
132 | ||
133 | struct mlx5e_mod_hdr_entry { | |
134 | /* a node of a hash table which keeps all the mod_hdr entries */ | |
135 | struct hlist_node mod_hdr_hlist; | |
136 | ||
137 | /* flows sharing the same mod_hdr entry */ | |
138 | struct list_head flows; | |
139 | ||
140 | struct mod_hdr_key key; | |
141 | ||
142 | u32 mod_hdr_id; | |
143 | }; | |
144 | ||
145 | #define MLX5_MH_ACT_SZ MLX5_UN_SZ_BYTES(set_action_in_add_action_in_auto) | |
146 | ||
147 | static inline u32 hash_mod_hdr_info(struct mod_hdr_key *key) | |
148 | { | |
149 | return jhash(key->actions, | |
150 | key->num_actions * MLX5_MH_ACT_SZ, 0); | |
151 | } | |
152 | ||
153 | static inline int cmp_mod_hdr_info(struct mod_hdr_key *a, | |
154 | struct mod_hdr_key *b) | |
155 | { | |
156 | if (a->num_actions != b->num_actions) | |
157 | return 1; | |
158 | ||
159 | return memcmp(a->actions, b->actions, a->num_actions * MLX5_MH_ACT_SZ); | |
160 | } | |
161 | ||
162 | static int mlx5e_attach_mod_hdr(struct mlx5e_priv *priv, | |
163 | struct mlx5e_tc_flow *flow, | |
164 | struct mlx5e_tc_flow_parse_attr *parse_attr) | |
165 | { | |
166 | struct mlx5_eswitch *esw = priv->mdev->priv.eswitch; | |
167 | int num_actions, actions_size, namespace, err; | |
168 | struct mlx5e_mod_hdr_entry *mh; | |
169 | struct mod_hdr_key key; | |
170 | bool found = false; | |
171 | u32 hash_key; | |
172 | ||
173 | num_actions = parse_attr->num_mod_hdr_actions; | |
174 | actions_size = MLX5_MH_ACT_SZ * num_actions; | |
175 | ||
176 | key.actions = parse_attr->mod_hdr_actions; | |
177 | key.num_actions = num_actions; | |
178 | ||
179 | hash_key = hash_mod_hdr_info(&key); | |
180 | ||
181 | if (flow->flags & MLX5E_TC_FLOW_ESWITCH) { | |
182 | namespace = MLX5_FLOW_NAMESPACE_FDB; | |
183 | hash_for_each_possible(esw->offloads.mod_hdr_tbl, mh, | |
184 | mod_hdr_hlist, hash_key) { | |
185 | if (!cmp_mod_hdr_info(&mh->key, &key)) { | |
186 | found = true; | |
187 | break; | |
188 | } | |
189 | } | |
190 | } else { | |
191 | namespace = MLX5_FLOW_NAMESPACE_KERNEL; | |
192 | hash_for_each_possible(priv->fs.tc.mod_hdr_tbl, mh, | |
193 | mod_hdr_hlist, hash_key) { | |
194 | if (!cmp_mod_hdr_info(&mh->key, &key)) { | |
195 | found = true; | |
196 | break; | |
197 | } | |
198 | } | |
199 | } | |
200 | ||
201 | if (found) | |
202 | goto attach_flow; | |
203 | ||
204 | mh = kzalloc(sizeof(*mh) + actions_size, GFP_KERNEL); | |
205 | if (!mh) | |
206 | return -ENOMEM; | |
207 | ||
208 | mh->key.actions = (void *)mh + sizeof(*mh); | |
209 | memcpy(mh->key.actions, key.actions, actions_size); | |
210 | mh->key.num_actions = num_actions; | |
211 | INIT_LIST_HEAD(&mh->flows); | |
212 | ||
213 | err = mlx5_modify_header_alloc(priv->mdev, namespace, | |
214 | mh->key.num_actions, | |
215 | mh->key.actions, | |
216 | &mh->mod_hdr_id); | |
217 | if (err) | |
218 | goto out_err; | |
219 | ||
220 | if (flow->flags & MLX5E_TC_FLOW_ESWITCH) | |
221 | hash_add(esw->offloads.mod_hdr_tbl, &mh->mod_hdr_hlist, hash_key); | |
222 | else | |
223 | hash_add(priv->fs.tc.mod_hdr_tbl, &mh->mod_hdr_hlist, hash_key); | |
224 | ||
225 | attach_flow: | |
226 | list_add(&flow->mod_hdr, &mh->flows); | |
227 | if (flow->flags & MLX5E_TC_FLOW_ESWITCH) | |
228 | flow->esw_attr->mod_hdr_id = mh->mod_hdr_id; | |
229 | else | |
230 | flow->nic_attr->mod_hdr_id = mh->mod_hdr_id; | |
231 | ||
232 | return 0; | |
233 | ||
234 | out_err: | |
235 | kfree(mh); | |
236 | return err; | |
237 | } | |
238 | ||
239 | static void mlx5e_detach_mod_hdr(struct mlx5e_priv *priv, | |
240 | struct mlx5e_tc_flow *flow) | |
241 | { | |
242 | struct list_head *next = flow->mod_hdr.next; | |
243 | ||
244 | list_del(&flow->mod_hdr); | |
245 | ||
246 | if (list_empty(next)) { | |
247 | struct mlx5e_mod_hdr_entry *mh; | |
248 | ||
249 | mh = list_entry(next, struct mlx5e_mod_hdr_entry, flows); | |
250 | ||
251 | mlx5_modify_header_dealloc(priv->mdev, mh->mod_hdr_id); | |
252 | hash_del(&mh->mod_hdr_hlist); | |
253 | kfree(mh); | |
254 | } | |
255 | } | |
256 | ||
77ab67b7 OG |
257 | static |
258 | struct mlx5_core_dev *mlx5e_hairpin_get_mdev(struct net *net, int ifindex) | |
259 | { | |
260 | struct net_device *netdev; | |
261 | struct mlx5e_priv *priv; | |
262 | ||
263 | netdev = __dev_get_by_index(net, ifindex); | |
264 | priv = netdev_priv(netdev); | |
265 | return priv->mdev; | |
266 | } | |
267 | ||
268 | static int mlx5e_hairpin_create_transport(struct mlx5e_hairpin *hp) | |
269 | { | |
270 | u32 in[MLX5_ST_SZ_DW(create_tir_in)] = {0}; | |
271 | void *tirc; | |
272 | int err; | |
273 | ||
274 | err = mlx5_core_alloc_transport_domain(hp->func_mdev, &hp->tdn); | |
275 | if (err) | |
276 | goto alloc_tdn_err; | |
277 | ||
278 | tirc = MLX5_ADDR_OF(create_tir_in, in, ctx); | |
279 | ||
280 | MLX5_SET(tirc, tirc, disp_type, MLX5_TIRC_DISP_TYPE_DIRECT); | |
ddae74ac | 281 | MLX5_SET(tirc, tirc, inline_rqn, hp->pair->rqn[0]); |
77ab67b7 OG |
282 | MLX5_SET(tirc, tirc, transport_domain, hp->tdn); |
283 | ||
284 | err = mlx5_core_create_tir(hp->func_mdev, in, MLX5_ST_SZ_BYTES(create_tir_in), &hp->tirn); | |
285 | if (err) | |
286 | goto create_tir_err; | |
287 | ||
288 | return 0; | |
289 | ||
290 | create_tir_err: | |
291 | mlx5_core_dealloc_transport_domain(hp->func_mdev, hp->tdn); | |
292 | alloc_tdn_err: | |
293 | return err; | |
294 | } | |
295 | ||
296 | static void mlx5e_hairpin_destroy_transport(struct mlx5e_hairpin *hp) | |
297 | { | |
298 | mlx5_core_destroy_tir(hp->func_mdev, hp->tirn); | |
299 | mlx5_core_dealloc_transport_domain(hp->func_mdev, hp->tdn); | |
300 | } | |
301 | ||
3f6d08d1 OG |
302 | static void mlx5e_hairpin_fill_rqt_rqns(struct mlx5e_hairpin *hp, void *rqtc) |
303 | { | |
304 | u32 indirection_rqt[MLX5E_INDIR_RQT_SIZE], rqn; | |
305 | struct mlx5e_priv *priv = hp->func_priv; | |
306 | int i, ix, sz = MLX5E_INDIR_RQT_SIZE; | |
307 | ||
308 | mlx5e_build_default_indir_rqt(indirection_rqt, sz, | |
309 | hp->num_channels); | |
310 | ||
311 | for (i = 0; i < sz; i++) { | |
312 | ix = i; | |
313 | if (priv->channels.params.rss_hfunc == ETH_RSS_HASH_XOR) | |
314 | ix = mlx5e_bits_invert(i, ilog2(sz)); | |
315 | ix = indirection_rqt[ix]; | |
316 | rqn = hp->pair->rqn[ix]; | |
317 | MLX5_SET(rqtc, rqtc, rq_num[i], rqn); | |
318 | } | |
319 | } | |
320 | ||
321 | static int mlx5e_hairpin_create_indirect_rqt(struct mlx5e_hairpin *hp) | |
322 | { | |
323 | int inlen, err, sz = MLX5E_INDIR_RQT_SIZE; | |
324 | struct mlx5e_priv *priv = hp->func_priv; | |
325 | struct mlx5_core_dev *mdev = priv->mdev; | |
326 | void *rqtc; | |
327 | u32 *in; | |
328 | ||
329 | inlen = MLX5_ST_SZ_BYTES(create_rqt_in) + sizeof(u32) * sz; | |
330 | in = kvzalloc(inlen, GFP_KERNEL); | |
331 | if (!in) | |
332 | return -ENOMEM; | |
333 | ||
334 | rqtc = MLX5_ADDR_OF(create_rqt_in, in, rqt_context); | |
335 | ||
336 | MLX5_SET(rqtc, rqtc, rqt_actual_size, sz); | |
337 | MLX5_SET(rqtc, rqtc, rqt_max_size, sz); | |
338 | ||
339 | mlx5e_hairpin_fill_rqt_rqns(hp, rqtc); | |
340 | ||
341 | err = mlx5_core_create_rqt(mdev, in, inlen, &hp->indir_rqt.rqtn); | |
342 | if (!err) | |
343 | hp->indir_rqt.enabled = true; | |
344 | ||
345 | kvfree(in); | |
346 | return err; | |
347 | } | |
348 | ||
349 | static int mlx5e_hairpin_create_indirect_tirs(struct mlx5e_hairpin *hp) | |
350 | { | |
351 | struct mlx5e_priv *priv = hp->func_priv; | |
352 | u32 in[MLX5_ST_SZ_DW(create_tir_in)]; | |
353 | int tt, i, err; | |
354 | void *tirc; | |
355 | ||
356 | for (tt = 0; tt < MLX5E_NUM_INDIR_TIRS; tt++) { | |
357 | memset(in, 0, MLX5_ST_SZ_BYTES(create_tir_in)); | |
358 | tirc = MLX5_ADDR_OF(create_tir_in, in, ctx); | |
359 | ||
360 | MLX5_SET(tirc, tirc, transport_domain, hp->tdn); | |
361 | MLX5_SET(tirc, tirc, disp_type, MLX5_TIRC_DISP_TYPE_INDIRECT); | |
362 | MLX5_SET(tirc, tirc, indirect_table, hp->indir_rqt.rqtn); | |
363 | mlx5e_build_indir_tir_ctx_hash(&priv->channels.params, tt, tirc, false); | |
364 | ||
365 | err = mlx5_core_create_tir(hp->func_mdev, in, | |
366 | MLX5_ST_SZ_BYTES(create_tir_in), &hp->indir_tirn[tt]); | |
367 | if (err) { | |
368 | mlx5_core_warn(hp->func_mdev, "create indirect tirs failed, %d\n", err); | |
369 | goto err_destroy_tirs; | |
370 | } | |
371 | } | |
372 | return 0; | |
373 | ||
374 | err_destroy_tirs: | |
375 | for (i = 0; i < tt; i++) | |
376 | mlx5_core_destroy_tir(hp->func_mdev, hp->indir_tirn[i]); | |
377 | return err; | |
378 | } | |
379 | ||
380 | static void mlx5e_hairpin_destroy_indirect_tirs(struct mlx5e_hairpin *hp) | |
381 | { | |
382 | int tt; | |
383 | ||
384 | for (tt = 0; tt < MLX5E_NUM_INDIR_TIRS; tt++) | |
385 | mlx5_core_destroy_tir(hp->func_mdev, hp->indir_tirn[tt]); | |
386 | } | |
387 | ||
388 | static void mlx5e_hairpin_set_ttc_params(struct mlx5e_hairpin *hp, | |
389 | struct ttc_params *ttc_params) | |
390 | { | |
391 | struct mlx5_flow_table_attr *ft_attr = &ttc_params->ft_attr; | |
392 | int tt; | |
393 | ||
394 | memset(ttc_params, 0, sizeof(*ttc_params)); | |
395 | ||
396 | ttc_params->any_tt_tirn = hp->tirn; | |
397 | ||
398 | for (tt = 0; tt < MLX5E_NUM_INDIR_TIRS; tt++) | |
399 | ttc_params->indir_tirn[tt] = hp->indir_tirn[tt]; | |
400 | ||
401 | ft_attr->max_fte = MLX5E_NUM_TT; | |
402 | ft_attr->level = MLX5E_TC_TTC_FT_LEVEL; | |
403 | ft_attr->prio = MLX5E_TC_PRIO; | |
404 | } | |
405 | ||
406 | static int mlx5e_hairpin_rss_init(struct mlx5e_hairpin *hp) | |
407 | { | |
408 | struct mlx5e_priv *priv = hp->func_priv; | |
409 | struct ttc_params ttc_params; | |
410 | int err; | |
411 | ||
412 | err = mlx5e_hairpin_create_indirect_rqt(hp); | |
413 | if (err) | |
414 | return err; | |
415 | ||
416 | err = mlx5e_hairpin_create_indirect_tirs(hp); | |
417 | if (err) | |
418 | goto err_create_indirect_tirs; | |
419 | ||
420 | mlx5e_hairpin_set_ttc_params(hp, &ttc_params); | |
421 | err = mlx5e_create_ttc_table(priv, &ttc_params, &hp->ttc); | |
422 | if (err) | |
423 | goto err_create_ttc_table; | |
424 | ||
425 | netdev_dbg(priv->netdev, "add hairpin: using %d channels rss ttc table id %x\n", | |
426 | hp->num_channels, hp->ttc.ft.t->id); | |
427 | ||
428 | return 0; | |
429 | ||
430 | err_create_ttc_table: | |
431 | mlx5e_hairpin_destroy_indirect_tirs(hp); | |
432 | err_create_indirect_tirs: | |
433 | mlx5e_destroy_rqt(priv, &hp->indir_rqt); | |
434 | ||
435 | return err; | |
436 | } | |
437 | ||
438 | static void mlx5e_hairpin_rss_cleanup(struct mlx5e_hairpin *hp) | |
439 | { | |
440 | struct mlx5e_priv *priv = hp->func_priv; | |
441 | ||
442 | mlx5e_destroy_ttc_table(priv, &hp->ttc); | |
443 | mlx5e_hairpin_destroy_indirect_tirs(hp); | |
444 | mlx5e_destroy_rqt(priv, &hp->indir_rqt); | |
445 | } | |
446 | ||
77ab67b7 OG |
447 | static struct mlx5e_hairpin * |
448 | mlx5e_hairpin_create(struct mlx5e_priv *priv, struct mlx5_hairpin_params *params, | |
449 | int peer_ifindex) | |
450 | { | |
451 | struct mlx5_core_dev *func_mdev, *peer_mdev; | |
452 | struct mlx5e_hairpin *hp; | |
453 | struct mlx5_hairpin *pair; | |
454 | int err; | |
455 | ||
456 | hp = kzalloc(sizeof(*hp), GFP_KERNEL); | |
457 | if (!hp) | |
458 | return ERR_PTR(-ENOMEM); | |
459 | ||
460 | func_mdev = priv->mdev; | |
461 | peer_mdev = mlx5e_hairpin_get_mdev(dev_net(priv->netdev), peer_ifindex); | |
462 | ||
463 | pair = mlx5_core_hairpin_create(func_mdev, peer_mdev, params); | |
464 | if (IS_ERR(pair)) { | |
465 | err = PTR_ERR(pair); | |
466 | goto create_pair_err; | |
467 | } | |
468 | hp->pair = pair; | |
469 | hp->func_mdev = func_mdev; | |
3f6d08d1 OG |
470 | hp->func_priv = priv; |
471 | hp->num_channels = params->num_channels; | |
77ab67b7 OG |
472 | |
473 | err = mlx5e_hairpin_create_transport(hp); | |
474 | if (err) | |
475 | goto create_transport_err; | |
476 | ||
3f6d08d1 OG |
477 | if (hp->num_channels > 1) { |
478 | err = mlx5e_hairpin_rss_init(hp); | |
479 | if (err) | |
480 | goto rss_init_err; | |
481 | } | |
482 | ||
77ab67b7 OG |
483 | return hp; |
484 | ||
3f6d08d1 OG |
485 | rss_init_err: |
486 | mlx5e_hairpin_destroy_transport(hp); | |
77ab67b7 OG |
487 | create_transport_err: |
488 | mlx5_core_hairpin_destroy(hp->pair); | |
489 | create_pair_err: | |
490 | kfree(hp); | |
491 | return ERR_PTR(err); | |
492 | } | |
493 | ||
494 | static void mlx5e_hairpin_destroy(struct mlx5e_hairpin *hp) | |
495 | { | |
3f6d08d1 OG |
496 | if (hp->num_channels > 1) |
497 | mlx5e_hairpin_rss_cleanup(hp); | |
77ab67b7 OG |
498 | mlx5e_hairpin_destroy_transport(hp); |
499 | mlx5_core_hairpin_destroy(hp->pair); | |
500 | kvfree(hp); | |
501 | } | |
502 | ||
106be53b OG |
503 | static inline u32 hash_hairpin_info(u16 peer_vhca_id, u8 prio) |
504 | { | |
505 | return (peer_vhca_id << 16 | prio); | |
506 | } | |
507 | ||
5c65c564 | 508 | static struct mlx5e_hairpin_entry *mlx5e_hairpin_get(struct mlx5e_priv *priv, |
106be53b | 509 | u16 peer_vhca_id, u8 prio) |
5c65c564 OG |
510 | { |
511 | struct mlx5e_hairpin_entry *hpe; | |
106be53b | 512 | u32 hash_key = hash_hairpin_info(peer_vhca_id, prio); |
5c65c564 OG |
513 | |
514 | hash_for_each_possible(priv->fs.tc.hairpin_tbl, hpe, | |
106be53b OG |
515 | hairpin_hlist, hash_key) { |
516 | if (hpe->peer_vhca_id == peer_vhca_id && hpe->prio == prio) | |
5c65c564 OG |
517 | return hpe; |
518 | } | |
519 | ||
520 | return NULL; | |
521 | } | |
522 | ||
106be53b OG |
523 | #define UNKNOWN_MATCH_PRIO 8 |
524 | ||
525 | static int mlx5e_hairpin_get_prio(struct mlx5e_priv *priv, | |
526 | struct mlx5_flow_spec *spec, u8 *match_prio) | |
527 | { | |
528 | void *headers_c, *headers_v; | |
529 | u8 prio_val, prio_mask = 0; | |
530 | bool vlan_present; | |
531 | ||
532 | #ifdef CONFIG_MLX5_CORE_EN_DCB | |
533 | if (priv->dcbx_dp.trust_state != MLX5_QPTS_TRUST_PCP) { | |
534 | netdev_warn(priv->netdev, | |
535 | "only PCP trust state supported for hairpin\n"); | |
536 | return -EOPNOTSUPP; | |
537 | } | |
538 | #endif | |
539 | headers_c = MLX5_ADDR_OF(fte_match_param, spec->match_criteria, outer_headers); | |
540 | headers_v = MLX5_ADDR_OF(fte_match_param, spec->match_value, outer_headers); | |
541 | ||
542 | vlan_present = MLX5_GET(fte_match_set_lyr_2_4, headers_v, cvlan_tag); | |
543 | if (vlan_present) { | |
544 | prio_mask = MLX5_GET(fte_match_set_lyr_2_4, headers_c, first_prio); | |
545 | prio_val = MLX5_GET(fte_match_set_lyr_2_4, headers_v, first_prio); | |
546 | } | |
547 | ||
548 | if (!vlan_present || !prio_mask) { | |
549 | prio_val = UNKNOWN_MATCH_PRIO; | |
550 | } else if (prio_mask != 0x7) { | |
551 | netdev_warn(priv->netdev, | |
552 | "masked priority match not supported for hairpin\n"); | |
553 | return -EOPNOTSUPP; | |
554 | } | |
555 | ||
556 | *match_prio = prio_val; | |
557 | return 0; | |
558 | } | |
559 | ||
5c65c564 OG |
560 | static int mlx5e_hairpin_flow_add(struct mlx5e_priv *priv, |
561 | struct mlx5e_tc_flow *flow, | |
562 | struct mlx5e_tc_flow_parse_attr *parse_attr) | |
563 | { | |
564 | int peer_ifindex = parse_attr->mirred_ifindex; | |
565 | struct mlx5_hairpin_params params; | |
d8822868 | 566 | struct mlx5_core_dev *peer_mdev; |
5c65c564 OG |
567 | struct mlx5e_hairpin_entry *hpe; |
568 | struct mlx5e_hairpin *hp; | |
3f6d08d1 OG |
569 | u64 link_speed64; |
570 | u32 link_speed; | |
106be53b | 571 | u8 match_prio; |
d8822868 | 572 | u16 peer_id; |
5c65c564 OG |
573 | int err; |
574 | ||
d8822868 OG |
575 | peer_mdev = mlx5e_hairpin_get_mdev(dev_net(priv->netdev), peer_ifindex); |
576 | if (!MLX5_CAP_GEN(priv->mdev, hairpin) || !MLX5_CAP_GEN(peer_mdev, hairpin)) { | |
5c65c564 OG |
577 | netdev_warn(priv->netdev, "hairpin is not supported\n"); |
578 | return -EOPNOTSUPP; | |
579 | } | |
580 | ||
d8822868 | 581 | peer_id = MLX5_CAP_GEN(peer_mdev, vhca_id); |
106be53b OG |
582 | err = mlx5e_hairpin_get_prio(priv, &parse_attr->spec, &match_prio); |
583 | if (err) | |
584 | return err; | |
585 | hpe = mlx5e_hairpin_get(priv, peer_id, match_prio); | |
5c65c564 OG |
586 | if (hpe) |
587 | goto attach_flow; | |
588 | ||
589 | hpe = kzalloc(sizeof(*hpe), GFP_KERNEL); | |
590 | if (!hpe) | |
591 | return -ENOMEM; | |
592 | ||
593 | INIT_LIST_HEAD(&hpe->flows); | |
d8822868 | 594 | hpe->peer_vhca_id = peer_id; |
106be53b | 595 | hpe->prio = match_prio; |
5c65c564 OG |
596 | |
597 | params.log_data_size = 15; | |
598 | params.log_data_size = min_t(u8, params.log_data_size, | |
599 | MLX5_CAP_GEN(priv->mdev, log_max_hairpin_wq_data_sz)); | |
600 | params.log_data_size = max_t(u8, params.log_data_size, | |
601 | MLX5_CAP_GEN(priv->mdev, log_min_hairpin_wq_data_sz)); | |
5c65c564 | 602 | |
eb9180f7 OG |
603 | params.log_num_packets = params.log_data_size - |
604 | MLX5_MPWRQ_MIN_LOG_STRIDE_SZ(priv->mdev); | |
605 | params.log_num_packets = min_t(u8, params.log_num_packets, | |
606 | MLX5_CAP_GEN(priv->mdev, log_max_hairpin_num_packets)); | |
607 | ||
608 | params.q_counter = priv->q_counter; | |
3f6d08d1 OG |
609 | /* set hairpin pair per each 50Gbs share of the link */ |
610 | mlx5e_get_max_linkspeed(priv->mdev, &link_speed); | |
611 | link_speed = max_t(u32, link_speed, 50000); | |
612 | link_speed64 = link_speed; | |
613 | do_div(link_speed64, 50000); | |
614 | params.num_channels = link_speed64; | |
615 | ||
5c65c564 OG |
616 | hp = mlx5e_hairpin_create(priv, ¶ms, peer_ifindex); |
617 | if (IS_ERR(hp)) { | |
618 | err = PTR_ERR(hp); | |
619 | goto create_hairpin_err; | |
620 | } | |
621 | ||
eb9180f7 | 622 | netdev_dbg(priv->netdev, "add hairpin: tirn %x rqn %x peer %s sqn %x prio %d (log) data %d packets %d\n", |
ddae74ac | 623 | hp->tirn, hp->pair->rqn[0], hp->pair->peer_mdev->priv.name, |
eb9180f7 | 624 | hp->pair->sqn[0], match_prio, params.log_data_size, params.log_num_packets); |
5c65c564 OG |
625 | |
626 | hpe->hp = hp; | |
106be53b OG |
627 | hash_add(priv->fs.tc.hairpin_tbl, &hpe->hairpin_hlist, |
628 | hash_hairpin_info(peer_id, match_prio)); | |
5c65c564 OG |
629 | |
630 | attach_flow: | |
3f6d08d1 OG |
631 | if (hpe->hp->num_channels > 1) { |
632 | flow->flags |= MLX5E_TC_FLOW_HAIRPIN_RSS; | |
633 | flow->nic_attr->hairpin_ft = hpe->hp->ttc.ft.t; | |
634 | } else { | |
635 | flow->nic_attr->hairpin_tirn = hpe->hp->tirn; | |
636 | } | |
5c65c564 | 637 | list_add(&flow->hairpin, &hpe->flows); |
3f6d08d1 | 638 | |
5c65c564 OG |
639 | return 0; |
640 | ||
641 | create_hairpin_err: | |
642 | kfree(hpe); | |
643 | return err; | |
644 | } | |
645 | ||
646 | static void mlx5e_hairpin_flow_del(struct mlx5e_priv *priv, | |
647 | struct mlx5e_tc_flow *flow) | |
648 | { | |
649 | struct list_head *next = flow->hairpin.next; | |
650 | ||
651 | list_del(&flow->hairpin); | |
652 | ||
653 | /* no more hairpin flows for us, release the hairpin pair */ | |
654 | if (list_empty(next)) { | |
655 | struct mlx5e_hairpin_entry *hpe; | |
656 | ||
657 | hpe = list_entry(next, struct mlx5e_hairpin_entry, flows); | |
658 | ||
659 | netdev_dbg(priv->netdev, "del hairpin: peer %s\n", | |
660 | hpe->hp->pair->peer_mdev->priv.name); | |
661 | ||
662 | mlx5e_hairpin_destroy(hpe->hp); | |
663 | hash_del(&hpe->hairpin_hlist); | |
664 | kfree(hpe); | |
665 | } | |
666 | } | |
667 | ||
74491de9 MB |
668 | static struct mlx5_flow_handle * |
669 | mlx5e_tc_add_nic_flow(struct mlx5e_priv *priv, | |
17091853 | 670 | struct mlx5e_tc_flow_parse_attr *parse_attr, |
aa0cbbae | 671 | struct mlx5e_tc_flow *flow) |
e8f887ac | 672 | { |
aa0cbbae | 673 | struct mlx5_nic_flow_attr *attr = flow->nic_attr; |
aad7e08d | 674 | struct mlx5_core_dev *dev = priv->mdev; |
5c65c564 | 675 | struct mlx5_flow_destination dest[2] = {}; |
66958ed9 | 676 | struct mlx5_flow_act flow_act = { |
3bc4b7bf | 677 | .action = attr->action, |
a9db0ecf | 678 | .has_flow_tag = true, |
3bc4b7bf | 679 | .flow_tag = attr->flow_tag, |
66958ed9 HHZ |
680 | .encap_id = 0, |
681 | }; | |
aad7e08d | 682 | struct mlx5_fc *counter = NULL; |
74491de9 | 683 | struct mlx5_flow_handle *rule; |
e8f887ac | 684 | bool table_created = false; |
5c65c564 | 685 | int err, dest_ix = 0; |
e8f887ac | 686 | |
3f6d08d1 OG |
687 | if (flow->flags & MLX5E_TC_FLOW_HAIRPIN) { |
688 | err = mlx5e_hairpin_flow_add(priv, flow, parse_attr); | |
689 | if (err) { | |
690 | rule = ERR_PTR(err); | |
691 | goto err_add_hairpin_flow; | |
692 | } | |
693 | if (flow->flags & MLX5E_TC_FLOW_HAIRPIN_RSS) { | |
694 | dest[dest_ix].type = MLX5_FLOW_DESTINATION_TYPE_FLOW_TABLE; | |
695 | dest[dest_ix].ft = attr->hairpin_ft; | |
696 | } else { | |
5c65c564 OG |
697 | dest[dest_ix].type = MLX5_FLOW_DESTINATION_TYPE_TIR; |
698 | dest[dest_ix].tir_num = attr->hairpin_tirn; | |
5c65c564 OG |
699 | } |
700 | dest_ix++; | |
3f6d08d1 OG |
701 | } else if (attr->action & MLX5_FLOW_CONTEXT_ACTION_FWD_DEST) { |
702 | dest[dest_ix].type = MLX5_FLOW_DESTINATION_TYPE_FLOW_TABLE; | |
703 | dest[dest_ix].ft = priv->fs.vlan.ft.t; | |
704 | dest_ix++; | |
5c65c564 | 705 | } |
aad7e08d | 706 | |
5c65c564 OG |
707 | if (attr->action & MLX5_FLOW_CONTEXT_ACTION_COUNT) { |
708 | counter = mlx5_fc_create(dev, true); | |
709 | if (IS_ERR(counter)) { | |
710 | rule = ERR_CAST(counter); | |
711 | goto err_fc_create; | |
712 | } | |
713 | dest[dest_ix].type = MLX5_FLOW_DESTINATION_TYPE_COUNTER; | |
714 | dest[dest_ix].counter = counter; | |
715 | dest_ix++; | |
aad7e08d AV |
716 | } |
717 | ||
2f4fe4ca | 718 | if (attr->action & MLX5_FLOW_CONTEXT_ACTION_MOD_HDR) { |
3099eb5a | 719 | err = mlx5e_attach_mod_hdr(priv, flow, parse_attr); |
d7e75a32 | 720 | flow_act.modify_id = attr->mod_hdr_id; |
2f4fe4ca OG |
721 | kfree(parse_attr->mod_hdr_actions); |
722 | if (err) { | |
723 | rule = ERR_PTR(err); | |
724 | goto err_create_mod_hdr_id; | |
725 | } | |
726 | } | |
727 | ||
acff797c | 728 | if (IS_ERR_OR_NULL(priv->fs.tc.t)) { |
21b9c144 OG |
729 | int tc_grp_size, tc_tbl_size; |
730 | u32 max_flow_counter; | |
731 | ||
732 | max_flow_counter = (MLX5_CAP_GEN(dev, max_flow_counter_31_16) << 16) | | |
733 | MLX5_CAP_GEN(dev, max_flow_counter_15_0); | |
734 | ||
735 | tc_grp_size = min_t(int, max_flow_counter, MLX5E_TC_TABLE_MAX_GROUP_SIZE); | |
736 | ||
737 | tc_tbl_size = min_t(int, tc_grp_size * MLX5E_TC_TABLE_NUM_GROUPS, | |
738 | BIT(MLX5_CAP_FLOWTABLE_NIC_RX(dev, log_max_ft_size))); | |
739 | ||
acff797c MG |
740 | priv->fs.tc.t = |
741 | mlx5_create_auto_grouped_flow_table(priv->fs.ns, | |
742 | MLX5E_TC_PRIO, | |
21b9c144 | 743 | tc_tbl_size, |
acff797c | 744 | MLX5E_TC_TABLE_NUM_GROUPS, |
3f6d08d1 | 745 | MLX5E_TC_FT_LEVEL, 0); |
acff797c | 746 | if (IS_ERR(priv->fs.tc.t)) { |
e8f887ac AV |
747 | netdev_err(priv->netdev, |
748 | "Failed to create tc offload table\n"); | |
aad7e08d AV |
749 | rule = ERR_CAST(priv->fs.tc.t); |
750 | goto err_create_ft; | |
e8f887ac AV |
751 | } |
752 | ||
753 | table_created = true; | |
754 | } | |
755 | ||
17091853 OG |
756 | parse_attr->spec.match_criteria_enable = MLX5_MATCH_OUTER_HEADERS; |
757 | rule = mlx5_add_flow_rules(priv->fs.tc.t, &parse_attr->spec, | |
5c65c564 | 758 | &flow_act, dest, dest_ix); |
aad7e08d AV |
759 | |
760 | if (IS_ERR(rule)) | |
761 | goto err_add_rule; | |
762 | ||
763 | return rule; | |
e8f887ac | 764 | |
aad7e08d AV |
765 | err_add_rule: |
766 | if (table_created) { | |
acff797c MG |
767 | mlx5_destroy_flow_table(priv->fs.tc.t); |
768 | priv->fs.tc.t = NULL; | |
e8f887ac | 769 | } |
aad7e08d | 770 | err_create_ft: |
2f4fe4ca | 771 | if (attr->action & MLX5_FLOW_CONTEXT_ACTION_MOD_HDR) |
3099eb5a | 772 | mlx5e_detach_mod_hdr(priv, flow); |
2f4fe4ca | 773 | err_create_mod_hdr_id: |
aad7e08d | 774 | mlx5_fc_destroy(dev, counter); |
5c65c564 OG |
775 | err_fc_create: |
776 | if (flow->flags & MLX5E_TC_FLOW_HAIRPIN) | |
777 | mlx5e_hairpin_flow_del(priv, flow); | |
778 | err_add_hairpin_flow: | |
e8f887ac AV |
779 | return rule; |
780 | } | |
781 | ||
d85cdccb OG |
782 | static void mlx5e_tc_del_nic_flow(struct mlx5e_priv *priv, |
783 | struct mlx5e_tc_flow *flow) | |
784 | { | |
513f8f7f | 785 | struct mlx5_nic_flow_attr *attr = flow->nic_attr; |
d85cdccb OG |
786 | struct mlx5_fc *counter = NULL; |
787 | ||
aa0cbbae OG |
788 | counter = mlx5_flow_rule_counter(flow->rule); |
789 | mlx5_del_flow_rules(flow->rule); | |
790 | mlx5_fc_destroy(priv->mdev, counter); | |
d85cdccb OG |
791 | |
792 | if (!mlx5e_tc_num_filters(priv) && (priv->fs.tc.t)) { | |
793 | mlx5_destroy_flow_table(priv->fs.tc.t); | |
794 | priv->fs.tc.t = NULL; | |
795 | } | |
2f4fe4ca | 796 | |
513f8f7f | 797 | if (attr->action & MLX5_FLOW_CONTEXT_ACTION_MOD_HDR) |
3099eb5a | 798 | mlx5e_detach_mod_hdr(priv, flow); |
5c65c564 OG |
799 | |
800 | if (flow->flags & MLX5E_TC_FLOW_HAIRPIN) | |
801 | mlx5e_hairpin_flow_del(priv, flow); | |
d85cdccb OG |
802 | } |
803 | ||
aa0cbbae OG |
804 | static void mlx5e_detach_encap(struct mlx5e_priv *priv, |
805 | struct mlx5e_tc_flow *flow); | |
806 | ||
3c37745e OG |
807 | static int mlx5e_attach_encap(struct mlx5e_priv *priv, |
808 | struct ip_tunnel_info *tun_info, | |
809 | struct net_device *mirred_dev, | |
810 | struct net_device **encap_dev, | |
811 | struct mlx5e_tc_flow *flow); | |
812 | ||
74491de9 MB |
813 | static struct mlx5_flow_handle * |
814 | mlx5e_tc_add_fdb_flow(struct mlx5e_priv *priv, | |
17091853 | 815 | struct mlx5e_tc_flow_parse_attr *parse_attr, |
aa0cbbae | 816 | struct mlx5e_tc_flow *flow) |
adb4c123 OG |
817 | { |
818 | struct mlx5_eswitch *esw = priv->mdev->priv.eswitch; | |
aa0cbbae | 819 | struct mlx5_esw_flow_attr *attr = flow->esw_attr; |
3c37745e OG |
820 | struct net_device *out_dev, *encap_dev = NULL; |
821 | struct mlx5_flow_handle *rule = NULL; | |
822 | struct mlx5e_rep_priv *rpriv; | |
823 | struct mlx5e_priv *out_priv; | |
8b32580d OG |
824 | int err; |
825 | ||
3c37745e OG |
826 | if (attr->action & MLX5_FLOW_CONTEXT_ACTION_ENCAP) { |
827 | out_dev = __dev_get_by_index(dev_net(priv->netdev), | |
828 | attr->parse_attr->mirred_ifindex); | |
829 | err = mlx5e_attach_encap(priv, &parse_attr->tun_info, | |
830 | out_dev, &encap_dev, flow); | |
831 | if (err) { | |
832 | rule = ERR_PTR(err); | |
833 | if (err != -EAGAIN) | |
834 | goto err_attach_encap; | |
835 | } | |
836 | out_priv = netdev_priv(encap_dev); | |
837 | rpriv = out_priv->ppriv; | |
838 | attr->out_rep = rpriv->rep; | |
839 | } | |
840 | ||
8b32580d | 841 | err = mlx5_eswitch_add_vlan_action(esw, attr); |
aa0cbbae OG |
842 | if (err) { |
843 | rule = ERR_PTR(err); | |
844 | goto err_add_vlan; | |
845 | } | |
adb4c123 | 846 | |
d7e75a32 | 847 | if (attr->action & MLX5_FLOW_CONTEXT_ACTION_MOD_HDR) { |
1a9527bb | 848 | err = mlx5e_attach_mod_hdr(priv, flow, parse_attr); |
d7e75a32 OG |
849 | kfree(parse_attr->mod_hdr_actions); |
850 | if (err) { | |
851 | rule = ERR_PTR(err); | |
852 | goto err_mod_hdr; | |
853 | } | |
854 | } | |
855 | ||
3c37745e OG |
856 | /* we get here if (1) there's no error (rule being null) or when |
857 | * (2) there's an encap action and we're on -EAGAIN (no valid neigh) | |
858 | */ | |
859 | if (rule != ERR_PTR(-EAGAIN)) { | |
860 | rule = mlx5_eswitch_add_offloaded_rule(esw, &parse_attr->spec, attr); | |
861 | if (IS_ERR(rule)) | |
862 | goto err_add_rule; | |
863 | } | |
aa0cbbae OG |
864 | return rule; |
865 | ||
866 | err_add_rule: | |
513f8f7f | 867 | if (attr->action & MLX5_FLOW_CONTEXT_ACTION_MOD_HDR) |
1a9527bb | 868 | mlx5e_detach_mod_hdr(priv, flow); |
d7e75a32 | 869 | err_mod_hdr: |
aa0cbbae OG |
870 | mlx5_eswitch_del_vlan_action(esw, attr); |
871 | err_add_vlan: | |
872 | if (attr->action & MLX5_FLOW_CONTEXT_ACTION_ENCAP) | |
873 | mlx5e_detach_encap(priv, flow); | |
3c37745e | 874 | err_attach_encap: |
aa0cbbae OG |
875 | return rule; |
876 | } | |
d85cdccb OG |
877 | |
878 | static void mlx5e_tc_del_fdb_flow(struct mlx5e_priv *priv, | |
879 | struct mlx5e_tc_flow *flow) | |
880 | { | |
881 | struct mlx5_eswitch *esw = priv->mdev->priv.eswitch; | |
d7e75a32 | 882 | struct mlx5_esw_flow_attr *attr = flow->esw_attr; |
d85cdccb | 883 | |
232c0013 HHZ |
884 | if (flow->flags & MLX5E_TC_FLOW_OFFLOADED) { |
885 | flow->flags &= ~MLX5E_TC_FLOW_OFFLOADED; | |
513f8f7f | 886 | mlx5_eswitch_del_offloaded_rule(esw, flow->rule, attr); |
232c0013 | 887 | } |
d85cdccb | 888 | |
513f8f7f | 889 | mlx5_eswitch_del_vlan_action(esw, attr); |
d85cdccb | 890 | |
513f8f7f | 891 | if (attr->action & MLX5_FLOW_CONTEXT_ACTION_ENCAP) { |
d85cdccb | 892 | mlx5e_detach_encap(priv, flow); |
513f8f7f | 893 | kvfree(attr->parse_attr); |
232c0013 | 894 | } |
d7e75a32 | 895 | |
513f8f7f | 896 | if (attr->action & MLX5_FLOW_CONTEXT_ACTION_MOD_HDR) |
1a9527bb | 897 | mlx5e_detach_mod_hdr(priv, flow); |
d85cdccb OG |
898 | } |
899 | ||
232c0013 HHZ |
900 | void mlx5e_tc_encap_flows_add(struct mlx5e_priv *priv, |
901 | struct mlx5e_encap_entry *e) | |
902 | { | |
3c37745e OG |
903 | struct mlx5_eswitch *esw = priv->mdev->priv.eswitch; |
904 | struct mlx5_esw_flow_attr *esw_attr; | |
232c0013 HHZ |
905 | struct mlx5e_tc_flow *flow; |
906 | int err; | |
907 | ||
908 | err = mlx5_encap_alloc(priv->mdev, e->tunnel_type, | |
909 | e->encap_size, e->encap_header, | |
910 | &e->encap_id); | |
911 | if (err) { | |
912 | mlx5_core_warn(priv->mdev, "Failed to offload cached encapsulation header, %d\n", | |
913 | err); | |
914 | return; | |
915 | } | |
916 | e->flags |= MLX5_ENCAP_ENTRY_VALID; | |
f6dfb4c3 | 917 | mlx5e_rep_queue_neigh_stats_work(priv); |
232c0013 HHZ |
918 | |
919 | list_for_each_entry(flow, &e->flows, encap) { | |
3c37745e OG |
920 | esw_attr = flow->esw_attr; |
921 | esw_attr->encap_id = e->encap_id; | |
922 | flow->rule = mlx5_eswitch_add_offloaded_rule(esw, &esw_attr->parse_attr->spec, esw_attr); | |
232c0013 HHZ |
923 | if (IS_ERR(flow->rule)) { |
924 | err = PTR_ERR(flow->rule); | |
925 | mlx5_core_warn(priv->mdev, "Failed to update cached encapsulation flow, %d\n", | |
926 | err); | |
927 | continue; | |
928 | } | |
929 | flow->flags |= MLX5E_TC_FLOW_OFFLOADED; | |
930 | } | |
931 | } | |
932 | ||
933 | void mlx5e_tc_encap_flows_del(struct mlx5e_priv *priv, | |
934 | struct mlx5e_encap_entry *e) | |
935 | { | |
3c37745e | 936 | struct mlx5_eswitch *esw = priv->mdev->priv.eswitch; |
232c0013 | 937 | struct mlx5e_tc_flow *flow; |
232c0013 HHZ |
938 | |
939 | list_for_each_entry(flow, &e->flows, encap) { | |
940 | if (flow->flags & MLX5E_TC_FLOW_OFFLOADED) { | |
941 | flow->flags &= ~MLX5E_TC_FLOW_OFFLOADED; | |
3c37745e | 942 | mlx5_eswitch_del_offloaded_rule(esw, flow->rule, flow->esw_attr); |
232c0013 HHZ |
943 | } |
944 | } | |
945 | ||
946 | if (e->flags & MLX5_ENCAP_ENTRY_VALID) { | |
947 | e->flags &= ~MLX5_ENCAP_ENTRY_VALID; | |
948 | mlx5_encap_dealloc(priv->mdev, e->encap_id); | |
949 | } | |
950 | } | |
951 | ||
f6dfb4c3 HHZ |
952 | void mlx5e_tc_update_neigh_used_value(struct mlx5e_neigh_hash_entry *nhe) |
953 | { | |
954 | struct mlx5e_neigh *m_neigh = &nhe->m_neigh; | |
955 | u64 bytes, packets, lastuse = 0; | |
956 | struct mlx5e_tc_flow *flow; | |
957 | struct mlx5e_encap_entry *e; | |
958 | struct mlx5_fc *counter; | |
959 | struct neigh_table *tbl; | |
960 | bool neigh_used = false; | |
961 | struct neighbour *n; | |
962 | ||
963 | if (m_neigh->family == AF_INET) | |
964 | tbl = &arp_tbl; | |
965 | #if IS_ENABLED(CONFIG_IPV6) | |
966 | else if (m_neigh->family == AF_INET6) | |
423c9db2 | 967 | tbl = &nd_tbl; |
f6dfb4c3 HHZ |
968 | #endif |
969 | else | |
970 | return; | |
971 | ||
972 | list_for_each_entry(e, &nhe->encap_list, encap_list) { | |
973 | if (!(e->flags & MLX5_ENCAP_ENTRY_VALID)) | |
974 | continue; | |
975 | list_for_each_entry(flow, &e->flows, encap) { | |
976 | if (flow->flags & MLX5E_TC_FLOW_OFFLOADED) { | |
977 | counter = mlx5_flow_rule_counter(flow->rule); | |
978 | mlx5_fc_query_cached(counter, &bytes, &packets, &lastuse); | |
979 | if (time_after((unsigned long)lastuse, nhe->reported_lastuse)) { | |
980 | neigh_used = true; | |
981 | break; | |
982 | } | |
983 | } | |
984 | } | |
985 | } | |
986 | ||
987 | if (neigh_used) { | |
988 | nhe->reported_lastuse = jiffies; | |
989 | ||
990 | /* find the relevant neigh according to the cached device and | |
991 | * dst ip pair | |
992 | */ | |
993 | n = neigh_lookup(tbl, &m_neigh->dst_ip, m_neigh->dev); | |
994 | if (!n) { | |
995 | WARN(1, "The neighbour already freed\n"); | |
996 | return; | |
997 | } | |
998 | ||
999 | neigh_event_send(n, NULL); | |
1000 | neigh_release(n); | |
1001 | } | |
1002 | } | |
1003 | ||
d85cdccb OG |
1004 | static void mlx5e_detach_encap(struct mlx5e_priv *priv, |
1005 | struct mlx5e_tc_flow *flow) | |
1006 | { | |
5067b602 RD |
1007 | struct list_head *next = flow->encap.next; |
1008 | ||
1009 | list_del(&flow->encap); | |
1010 | if (list_empty(next)) { | |
c1ae1152 | 1011 | struct mlx5e_encap_entry *e; |
5067b602 | 1012 | |
c1ae1152 | 1013 | e = list_entry(next, struct mlx5e_encap_entry, flows); |
232c0013 HHZ |
1014 | mlx5e_rep_encap_entry_detach(netdev_priv(e->out_dev), e); |
1015 | ||
1016 | if (e->flags & MLX5_ENCAP_ENTRY_VALID) | |
5067b602 | 1017 | mlx5_encap_dealloc(priv->mdev, e->encap_id); |
232c0013 | 1018 | |
cdc5a7f3 | 1019 | hash_del_rcu(&e->encap_hlist); |
232c0013 | 1020 | kfree(e->encap_header); |
5067b602 RD |
1021 | kfree(e); |
1022 | } | |
1023 | } | |
1024 | ||
e8f887ac | 1025 | static void mlx5e_tc_del_flow(struct mlx5e_priv *priv, |
961e8979 | 1026 | struct mlx5e_tc_flow *flow) |
e8f887ac | 1027 | { |
d85cdccb OG |
1028 | if (flow->flags & MLX5E_TC_FLOW_ESWITCH) |
1029 | mlx5e_tc_del_fdb_flow(priv, flow); | |
1030 | else | |
1031 | mlx5e_tc_del_nic_flow(priv, flow); | |
e8f887ac AV |
1032 | } |
1033 | ||
bbd00f7e HHZ |
1034 | static void parse_vxlan_attr(struct mlx5_flow_spec *spec, |
1035 | struct tc_cls_flower_offload *f) | |
1036 | { | |
1037 | void *headers_c = MLX5_ADDR_OF(fte_match_param, spec->match_criteria, | |
1038 | outer_headers); | |
1039 | void *headers_v = MLX5_ADDR_OF(fte_match_param, spec->match_value, | |
1040 | outer_headers); | |
1041 | void *misc_c = MLX5_ADDR_OF(fte_match_param, spec->match_criteria, | |
1042 | misc_parameters); | |
1043 | void *misc_v = MLX5_ADDR_OF(fte_match_param, spec->match_value, | |
1044 | misc_parameters); | |
1045 | ||
1046 | MLX5_SET_TO_ONES(fte_match_set_lyr_2_4, headers_c, ip_protocol); | |
1047 | MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_UDP); | |
1048 | ||
1049 | if (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_ENC_KEYID)) { | |
1050 | struct flow_dissector_key_keyid *key = | |
1051 | skb_flow_dissector_target(f->dissector, | |
1052 | FLOW_DISSECTOR_KEY_ENC_KEYID, | |
1053 | f->key); | |
1054 | struct flow_dissector_key_keyid *mask = | |
1055 | skb_flow_dissector_target(f->dissector, | |
1056 | FLOW_DISSECTOR_KEY_ENC_KEYID, | |
1057 | f->mask); | |
1058 | MLX5_SET(fte_match_set_misc, misc_c, vxlan_vni, | |
1059 | be32_to_cpu(mask->keyid)); | |
1060 | MLX5_SET(fte_match_set_misc, misc_v, vxlan_vni, | |
1061 | be32_to_cpu(key->keyid)); | |
1062 | } | |
1063 | } | |
1064 | ||
1065 | static int parse_tunnel_attr(struct mlx5e_priv *priv, | |
1066 | struct mlx5_flow_spec *spec, | |
1067 | struct tc_cls_flower_offload *f) | |
1068 | { | |
1069 | void *headers_c = MLX5_ADDR_OF(fte_match_param, spec->match_criteria, | |
1070 | outer_headers); | |
1071 | void *headers_v = MLX5_ADDR_OF(fte_match_param, spec->match_value, | |
1072 | outer_headers); | |
1073 | ||
2e72eb43 OG |
1074 | struct flow_dissector_key_control *enc_control = |
1075 | skb_flow_dissector_target(f->dissector, | |
1076 | FLOW_DISSECTOR_KEY_ENC_CONTROL, | |
1077 | f->key); | |
1078 | ||
bbd00f7e HHZ |
1079 | if (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_ENC_PORTS)) { |
1080 | struct flow_dissector_key_ports *key = | |
1081 | skb_flow_dissector_target(f->dissector, | |
1082 | FLOW_DISSECTOR_KEY_ENC_PORTS, | |
1083 | f->key); | |
1084 | struct flow_dissector_key_ports *mask = | |
1085 | skb_flow_dissector_target(f->dissector, | |
1086 | FLOW_DISSECTOR_KEY_ENC_PORTS, | |
1087 | f->mask); | |
1ad9a00a | 1088 | struct mlx5_eswitch *esw = priv->mdev->priv.eswitch; |
a4b97ab4 | 1089 | struct mlx5e_rep_priv *uplink_rpriv = mlx5_eswitch_get_uplink_priv(esw, REP_ETH); |
5ed99fb4 | 1090 | struct net_device *up_dev = uplink_rpriv->netdev; |
1ad9a00a | 1091 | struct mlx5e_priv *up_priv = netdev_priv(up_dev); |
bbd00f7e HHZ |
1092 | |
1093 | /* Full udp dst port must be given */ | |
1094 | if (memchr_inv(&mask->dst, 0xff, sizeof(mask->dst))) | |
2fcd82e9 | 1095 | goto vxlan_match_offload_err; |
bbd00f7e | 1096 | |
1ad9a00a | 1097 | if (mlx5e_vxlan_lookup_port(up_priv, be16_to_cpu(key->dst)) && |
bbd00f7e HHZ |
1098 | MLX5_CAP_ESW(priv->mdev, vxlan_encap_decap)) |
1099 | parse_vxlan_attr(spec, f); | |
2fcd82e9 OG |
1100 | else { |
1101 | netdev_warn(priv->netdev, | |
1102 | "%d isn't an offloaded vxlan udp dport\n", be16_to_cpu(key->dst)); | |
bbd00f7e | 1103 | return -EOPNOTSUPP; |
2fcd82e9 | 1104 | } |
bbd00f7e HHZ |
1105 | |
1106 | MLX5_SET(fte_match_set_lyr_2_4, headers_c, | |
1107 | udp_dport, ntohs(mask->dst)); | |
1108 | MLX5_SET(fte_match_set_lyr_2_4, headers_v, | |
1109 | udp_dport, ntohs(key->dst)); | |
1110 | ||
cd377663 OG |
1111 | MLX5_SET(fte_match_set_lyr_2_4, headers_c, |
1112 | udp_sport, ntohs(mask->src)); | |
1113 | MLX5_SET(fte_match_set_lyr_2_4, headers_v, | |
1114 | udp_sport, ntohs(key->src)); | |
bbd00f7e | 1115 | } else { /* udp dst port must be given */ |
2fcd82e9 OG |
1116 | vxlan_match_offload_err: |
1117 | netdev_warn(priv->netdev, | |
1118 | "IP tunnel decap offload supported only for vxlan, must set UDP dport\n"); | |
1119 | return -EOPNOTSUPP; | |
bbd00f7e HHZ |
1120 | } |
1121 | ||
2e72eb43 | 1122 | if (enc_control->addr_type == FLOW_DISSECTOR_KEY_IPV4_ADDRS) { |
bbd00f7e HHZ |
1123 | struct flow_dissector_key_ipv4_addrs *key = |
1124 | skb_flow_dissector_target(f->dissector, | |
1125 | FLOW_DISSECTOR_KEY_ENC_IPV4_ADDRS, | |
1126 | f->key); | |
1127 | struct flow_dissector_key_ipv4_addrs *mask = | |
1128 | skb_flow_dissector_target(f->dissector, | |
1129 | FLOW_DISSECTOR_KEY_ENC_IPV4_ADDRS, | |
1130 | f->mask); | |
1131 | MLX5_SET(fte_match_set_lyr_2_4, headers_c, | |
1132 | src_ipv4_src_ipv6.ipv4_layout.ipv4, | |
1133 | ntohl(mask->src)); | |
1134 | MLX5_SET(fte_match_set_lyr_2_4, headers_v, | |
1135 | src_ipv4_src_ipv6.ipv4_layout.ipv4, | |
1136 | ntohl(key->src)); | |
1137 | ||
1138 | MLX5_SET(fte_match_set_lyr_2_4, headers_c, | |
1139 | dst_ipv4_dst_ipv6.ipv4_layout.ipv4, | |
1140 | ntohl(mask->dst)); | |
1141 | MLX5_SET(fte_match_set_lyr_2_4, headers_v, | |
1142 | dst_ipv4_dst_ipv6.ipv4_layout.ipv4, | |
1143 | ntohl(key->dst)); | |
bbd00f7e | 1144 | |
2e72eb43 OG |
1145 | MLX5_SET_TO_ONES(fte_match_set_lyr_2_4, headers_c, ethertype); |
1146 | MLX5_SET(fte_match_set_lyr_2_4, headers_v, ethertype, ETH_P_IP); | |
19f44401 OG |
1147 | } else if (enc_control->addr_type == FLOW_DISSECTOR_KEY_IPV6_ADDRS) { |
1148 | struct flow_dissector_key_ipv6_addrs *key = | |
1149 | skb_flow_dissector_target(f->dissector, | |
1150 | FLOW_DISSECTOR_KEY_ENC_IPV6_ADDRS, | |
1151 | f->key); | |
1152 | struct flow_dissector_key_ipv6_addrs *mask = | |
1153 | skb_flow_dissector_target(f->dissector, | |
1154 | FLOW_DISSECTOR_KEY_ENC_IPV6_ADDRS, | |
1155 | f->mask); | |
1156 | ||
1157 | memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_c, | |
1158 | src_ipv4_src_ipv6.ipv6_layout.ipv6), | |
1159 | &mask->src, MLX5_FLD_SZ_BYTES(ipv6_layout, ipv6)); | |
1160 | memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v, | |
1161 | src_ipv4_src_ipv6.ipv6_layout.ipv6), | |
1162 | &key->src, MLX5_FLD_SZ_BYTES(ipv6_layout, ipv6)); | |
1163 | ||
1164 | memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_c, | |
1165 | dst_ipv4_dst_ipv6.ipv6_layout.ipv6), | |
1166 | &mask->dst, MLX5_FLD_SZ_BYTES(ipv6_layout, ipv6)); | |
1167 | memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v, | |
1168 | dst_ipv4_dst_ipv6.ipv6_layout.ipv6), | |
1169 | &key->dst, MLX5_FLD_SZ_BYTES(ipv6_layout, ipv6)); | |
1170 | ||
1171 | MLX5_SET_TO_ONES(fte_match_set_lyr_2_4, headers_c, ethertype); | |
1172 | MLX5_SET(fte_match_set_lyr_2_4, headers_v, ethertype, ETH_P_IPV6); | |
2e72eb43 | 1173 | } |
bbd00f7e HHZ |
1174 | |
1175 | /* Enforce DMAC when offloading incoming tunneled flows. | |
1176 | * Flow counters require a match on the DMAC. | |
1177 | */ | |
1178 | MLX5_SET_TO_ONES(fte_match_set_lyr_2_4, headers_c, dmac_47_16); | |
1179 | MLX5_SET_TO_ONES(fte_match_set_lyr_2_4, headers_c, dmac_15_0); | |
1180 | ether_addr_copy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v, | |
1181 | dmac_47_16), priv->netdev->dev_addr); | |
1182 | ||
1183 | /* let software handle IP fragments */ | |
1184 | MLX5_SET(fte_match_set_lyr_2_4, headers_c, frag, 1); | |
1185 | MLX5_SET(fte_match_set_lyr_2_4, headers_v, frag, 0); | |
1186 | ||
1187 | return 0; | |
1188 | } | |
1189 | ||
de0af0bf RD |
1190 | static int __parse_cls_flower(struct mlx5e_priv *priv, |
1191 | struct mlx5_flow_spec *spec, | |
1192 | struct tc_cls_flower_offload *f, | |
1193 | u8 *min_inline) | |
e3a2b7ed | 1194 | { |
c5bb1730 MG |
1195 | void *headers_c = MLX5_ADDR_OF(fte_match_param, spec->match_criteria, |
1196 | outer_headers); | |
1197 | void *headers_v = MLX5_ADDR_OF(fte_match_param, spec->match_value, | |
1198 | outer_headers); | |
e3a2b7ed AV |
1199 | u16 addr_type = 0; |
1200 | u8 ip_proto = 0; | |
1201 | ||
de0af0bf RD |
1202 | *min_inline = MLX5_INLINE_MODE_L2; |
1203 | ||
e3a2b7ed AV |
1204 | if (f->dissector->used_keys & |
1205 | ~(BIT(FLOW_DISSECTOR_KEY_CONTROL) | | |
1206 | BIT(FLOW_DISSECTOR_KEY_BASIC) | | |
1207 | BIT(FLOW_DISSECTOR_KEY_ETH_ADDRS) | | |
095b6cfd | 1208 | BIT(FLOW_DISSECTOR_KEY_VLAN) | |
e3a2b7ed AV |
1209 | BIT(FLOW_DISSECTOR_KEY_IPV4_ADDRS) | |
1210 | BIT(FLOW_DISSECTOR_KEY_IPV6_ADDRS) | | |
bbd00f7e HHZ |
1211 | BIT(FLOW_DISSECTOR_KEY_PORTS) | |
1212 | BIT(FLOW_DISSECTOR_KEY_ENC_KEYID) | | |
1213 | BIT(FLOW_DISSECTOR_KEY_ENC_IPV4_ADDRS) | | |
1214 | BIT(FLOW_DISSECTOR_KEY_ENC_IPV6_ADDRS) | | |
1215 | BIT(FLOW_DISSECTOR_KEY_ENC_PORTS) | | |
e77834ec | 1216 | BIT(FLOW_DISSECTOR_KEY_ENC_CONTROL) | |
fd7da28b OG |
1217 | BIT(FLOW_DISSECTOR_KEY_TCP) | |
1218 | BIT(FLOW_DISSECTOR_KEY_IP))) { | |
e3a2b7ed AV |
1219 | netdev_warn(priv->netdev, "Unsupported key used: 0x%x\n", |
1220 | f->dissector->used_keys); | |
1221 | return -EOPNOTSUPP; | |
1222 | } | |
1223 | ||
bbd00f7e HHZ |
1224 | if ((dissector_uses_key(f->dissector, |
1225 | FLOW_DISSECTOR_KEY_ENC_IPV4_ADDRS) || | |
1226 | dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_ENC_KEYID) || | |
1227 | dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_ENC_PORTS)) && | |
1228 | dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_ENC_CONTROL)) { | |
1229 | struct flow_dissector_key_control *key = | |
1230 | skb_flow_dissector_target(f->dissector, | |
1231 | FLOW_DISSECTOR_KEY_ENC_CONTROL, | |
1232 | f->key); | |
1233 | switch (key->addr_type) { | |
1234 | case FLOW_DISSECTOR_KEY_IPV4_ADDRS: | |
19f44401 | 1235 | case FLOW_DISSECTOR_KEY_IPV6_ADDRS: |
bbd00f7e HHZ |
1236 | if (parse_tunnel_attr(priv, spec, f)) |
1237 | return -EOPNOTSUPP; | |
1238 | break; | |
1239 | default: | |
1240 | return -EOPNOTSUPP; | |
1241 | } | |
1242 | ||
1243 | /* In decap flow, header pointers should point to the inner | |
1244 | * headers, outer header were already set by parse_tunnel_attr | |
1245 | */ | |
1246 | headers_c = MLX5_ADDR_OF(fte_match_param, spec->match_criteria, | |
1247 | inner_headers); | |
1248 | headers_v = MLX5_ADDR_OF(fte_match_param, spec->match_value, | |
1249 | inner_headers); | |
1250 | } | |
1251 | ||
e3a2b7ed AV |
1252 | if (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_CONTROL)) { |
1253 | struct flow_dissector_key_control *key = | |
1254 | skb_flow_dissector_target(f->dissector, | |
1dbd0d37 | 1255 | FLOW_DISSECTOR_KEY_CONTROL, |
e3a2b7ed | 1256 | f->key); |
3f7d0eb4 OG |
1257 | |
1258 | struct flow_dissector_key_control *mask = | |
1259 | skb_flow_dissector_target(f->dissector, | |
1260 | FLOW_DISSECTOR_KEY_CONTROL, | |
1261 | f->mask); | |
e3a2b7ed | 1262 | addr_type = key->addr_type; |
3f7d0eb4 OG |
1263 | |
1264 | if (mask->flags & FLOW_DIS_IS_FRAGMENT) { | |
1265 | MLX5_SET(fte_match_set_lyr_2_4, headers_c, frag, 1); | |
1266 | MLX5_SET(fte_match_set_lyr_2_4, headers_v, frag, | |
1267 | key->flags & FLOW_DIS_IS_FRAGMENT); | |
0827444d OG |
1268 | |
1269 | /* the HW doesn't need L3 inline to match on frag=no */ | |
1270 | if (key->flags & FLOW_DIS_IS_FRAGMENT) | |
1271 | *min_inline = MLX5_INLINE_MODE_IP; | |
3f7d0eb4 | 1272 | } |
e3a2b7ed AV |
1273 | } |
1274 | ||
1275 | if (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_BASIC)) { | |
1276 | struct flow_dissector_key_basic *key = | |
1277 | skb_flow_dissector_target(f->dissector, | |
1278 | FLOW_DISSECTOR_KEY_BASIC, | |
1279 | f->key); | |
1280 | struct flow_dissector_key_basic *mask = | |
1281 | skb_flow_dissector_target(f->dissector, | |
1282 | FLOW_DISSECTOR_KEY_BASIC, | |
1283 | f->mask); | |
1284 | ip_proto = key->ip_proto; | |
1285 | ||
1286 | MLX5_SET(fte_match_set_lyr_2_4, headers_c, ethertype, | |
1287 | ntohs(mask->n_proto)); | |
1288 | MLX5_SET(fte_match_set_lyr_2_4, headers_v, ethertype, | |
1289 | ntohs(key->n_proto)); | |
1290 | ||
1291 | MLX5_SET(fte_match_set_lyr_2_4, headers_c, ip_protocol, | |
1292 | mask->ip_proto); | |
1293 | MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, | |
1294 | key->ip_proto); | |
de0af0bf RD |
1295 | |
1296 | if (mask->ip_proto) | |
1297 | *min_inline = MLX5_INLINE_MODE_IP; | |
e3a2b7ed AV |
1298 | } |
1299 | ||
1300 | if (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_ETH_ADDRS)) { | |
1301 | struct flow_dissector_key_eth_addrs *key = | |
1302 | skb_flow_dissector_target(f->dissector, | |
1303 | FLOW_DISSECTOR_KEY_ETH_ADDRS, | |
1304 | f->key); | |
1305 | struct flow_dissector_key_eth_addrs *mask = | |
1306 | skb_flow_dissector_target(f->dissector, | |
1307 | FLOW_DISSECTOR_KEY_ETH_ADDRS, | |
1308 | f->mask); | |
1309 | ||
1310 | ether_addr_copy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_c, | |
1311 | dmac_47_16), | |
1312 | mask->dst); | |
1313 | ether_addr_copy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v, | |
1314 | dmac_47_16), | |
1315 | key->dst); | |
1316 | ||
1317 | ether_addr_copy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_c, | |
1318 | smac_47_16), | |
1319 | mask->src); | |
1320 | ether_addr_copy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v, | |
1321 | smac_47_16), | |
1322 | key->src); | |
1323 | } | |
1324 | ||
095b6cfd OG |
1325 | if (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_VLAN)) { |
1326 | struct flow_dissector_key_vlan *key = | |
1327 | skb_flow_dissector_target(f->dissector, | |
1328 | FLOW_DISSECTOR_KEY_VLAN, | |
1329 | f->key); | |
1330 | struct flow_dissector_key_vlan *mask = | |
1331 | skb_flow_dissector_target(f->dissector, | |
1332 | FLOW_DISSECTOR_KEY_VLAN, | |
1333 | f->mask); | |
358d79a4 | 1334 | if (mask->vlan_id || mask->vlan_priority) { |
10543365 MHY |
1335 | MLX5_SET(fte_match_set_lyr_2_4, headers_c, cvlan_tag, 1); |
1336 | MLX5_SET(fte_match_set_lyr_2_4, headers_v, cvlan_tag, 1); | |
095b6cfd OG |
1337 | |
1338 | MLX5_SET(fte_match_set_lyr_2_4, headers_c, first_vid, mask->vlan_id); | |
1339 | MLX5_SET(fte_match_set_lyr_2_4, headers_v, first_vid, key->vlan_id); | |
358d79a4 OG |
1340 | |
1341 | MLX5_SET(fte_match_set_lyr_2_4, headers_c, first_prio, mask->vlan_priority); | |
1342 | MLX5_SET(fte_match_set_lyr_2_4, headers_v, first_prio, key->vlan_priority); | |
095b6cfd OG |
1343 | } |
1344 | } | |
1345 | ||
e3a2b7ed AV |
1346 | if (addr_type == FLOW_DISSECTOR_KEY_IPV4_ADDRS) { |
1347 | struct flow_dissector_key_ipv4_addrs *key = | |
1348 | skb_flow_dissector_target(f->dissector, | |
1349 | FLOW_DISSECTOR_KEY_IPV4_ADDRS, | |
1350 | f->key); | |
1351 | struct flow_dissector_key_ipv4_addrs *mask = | |
1352 | skb_flow_dissector_target(f->dissector, | |
1353 | FLOW_DISSECTOR_KEY_IPV4_ADDRS, | |
1354 | f->mask); | |
1355 | ||
1356 | memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_c, | |
1357 | src_ipv4_src_ipv6.ipv4_layout.ipv4), | |
1358 | &mask->src, sizeof(mask->src)); | |
1359 | memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v, | |
1360 | src_ipv4_src_ipv6.ipv4_layout.ipv4), | |
1361 | &key->src, sizeof(key->src)); | |
1362 | memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_c, | |
1363 | dst_ipv4_dst_ipv6.ipv4_layout.ipv4), | |
1364 | &mask->dst, sizeof(mask->dst)); | |
1365 | memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v, | |
1366 | dst_ipv4_dst_ipv6.ipv4_layout.ipv4), | |
1367 | &key->dst, sizeof(key->dst)); | |
de0af0bf RD |
1368 | |
1369 | if (mask->src || mask->dst) | |
1370 | *min_inline = MLX5_INLINE_MODE_IP; | |
e3a2b7ed AV |
1371 | } |
1372 | ||
1373 | if (addr_type == FLOW_DISSECTOR_KEY_IPV6_ADDRS) { | |
1374 | struct flow_dissector_key_ipv6_addrs *key = | |
1375 | skb_flow_dissector_target(f->dissector, | |
1376 | FLOW_DISSECTOR_KEY_IPV6_ADDRS, | |
1377 | f->key); | |
1378 | struct flow_dissector_key_ipv6_addrs *mask = | |
1379 | skb_flow_dissector_target(f->dissector, | |
1380 | FLOW_DISSECTOR_KEY_IPV6_ADDRS, | |
1381 | f->mask); | |
1382 | ||
1383 | memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_c, | |
1384 | src_ipv4_src_ipv6.ipv6_layout.ipv6), | |
1385 | &mask->src, sizeof(mask->src)); | |
1386 | memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v, | |
1387 | src_ipv4_src_ipv6.ipv6_layout.ipv6), | |
1388 | &key->src, sizeof(key->src)); | |
1389 | ||
1390 | memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_c, | |
1391 | dst_ipv4_dst_ipv6.ipv6_layout.ipv6), | |
1392 | &mask->dst, sizeof(mask->dst)); | |
1393 | memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v, | |
1394 | dst_ipv4_dst_ipv6.ipv6_layout.ipv6), | |
1395 | &key->dst, sizeof(key->dst)); | |
de0af0bf RD |
1396 | |
1397 | if (ipv6_addr_type(&mask->src) != IPV6_ADDR_ANY || | |
1398 | ipv6_addr_type(&mask->dst) != IPV6_ADDR_ANY) | |
1399 | *min_inline = MLX5_INLINE_MODE_IP; | |
e3a2b7ed AV |
1400 | } |
1401 | ||
1f97a526 OG |
1402 | if (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_IP)) { |
1403 | struct flow_dissector_key_ip *key = | |
1404 | skb_flow_dissector_target(f->dissector, | |
1405 | FLOW_DISSECTOR_KEY_IP, | |
1406 | f->key); | |
1407 | struct flow_dissector_key_ip *mask = | |
1408 | skb_flow_dissector_target(f->dissector, | |
1409 | FLOW_DISSECTOR_KEY_IP, | |
1410 | f->mask); | |
1411 | ||
1412 | MLX5_SET(fte_match_set_lyr_2_4, headers_c, ip_ecn, mask->tos & 0x3); | |
1413 | MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ecn, key->tos & 0x3); | |
1414 | ||
1415 | MLX5_SET(fte_match_set_lyr_2_4, headers_c, ip_dscp, mask->tos >> 2); | |
1416 | MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_dscp, key->tos >> 2); | |
1417 | ||
a8ade55f OG |
1418 | MLX5_SET(fte_match_set_lyr_2_4, headers_c, ttl_hoplimit, mask->ttl); |
1419 | MLX5_SET(fte_match_set_lyr_2_4, headers_v, ttl_hoplimit, key->ttl); | |
1f97a526 | 1420 | |
a8ade55f OG |
1421 | if (mask->ttl && |
1422 | !MLX5_CAP_ESW_FLOWTABLE_FDB(priv->mdev, | |
1423 | ft_field_support.outer_ipv4_ttl)) | |
1f97a526 | 1424 | return -EOPNOTSUPP; |
a8ade55f OG |
1425 | |
1426 | if (mask->tos || mask->ttl) | |
1427 | *min_inline = MLX5_INLINE_MODE_IP; | |
1f97a526 OG |
1428 | } |
1429 | ||
e3a2b7ed AV |
1430 | if (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_PORTS)) { |
1431 | struct flow_dissector_key_ports *key = | |
1432 | skb_flow_dissector_target(f->dissector, | |
1433 | FLOW_DISSECTOR_KEY_PORTS, | |
1434 | f->key); | |
1435 | struct flow_dissector_key_ports *mask = | |
1436 | skb_flow_dissector_target(f->dissector, | |
1437 | FLOW_DISSECTOR_KEY_PORTS, | |
1438 | f->mask); | |
1439 | switch (ip_proto) { | |
1440 | case IPPROTO_TCP: | |
1441 | MLX5_SET(fte_match_set_lyr_2_4, headers_c, | |
1442 | tcp_sport, ntohs(mask->src)); | |
1443 | MLX5_SET(fte_match_set_lyr_2_4, headers_v, | |
1444 | tcp_sport, ntohs(key->src)); | |
1445 | ||
1446 | MLX5_SET(fte_match_set_lyr_2_4, headers_c, | |
1447 | tcp_dport, ntohs(mask->dst)); | |
1448 | MLX5_SET(fte_match_set_lyr_2_4, headers_v, | |
1449 | tcp_dport, ntohs(key->dst)); | |
1450 | break; | |
1451 | ||
1452 | case IPPROTO_UDP: | |
1453 | MLX5_SET(fte_match_set_lyr_2_4, headers_c, | |
1454 | udp_sport, ntohs(mask->src)); | |
1455 | MLX5_SET(fte_match_set_lyr_2_4, headers_v, | |
1456 | udp_sport, ntohs(key->src)); | |
1457 | ||
1458 | MLX5_SET(fte_match_set_lyr_2_4, headers_c, | |
1459 | udp_dport, ntohs(mask->dst)); | |
1460 | MLX5_SET(fte_match_set_lyr_2_4, headers_v, | |
1461 | udp_dport, ntohs(key->dst)); | |
1462 | break; | |
1463 | default: | |
1464 | netdev_err(priv->netdev, | |
1465 | "Only UDP and TCP transport are supported\n"); | |
1466 | return -EINVAL; | |
1467 | } | |
de0af0bf RD |
1468 | |
1469 | if (mask->src || mask->dst) | |
1470 | *min_inline = MLX5_INLINE_MODE_TCP_UDP; | |
e3a2b7ed AV |
1471 | } |
1472 | ||
e77834ec OG |
1473 | if (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_TCP)) { |
1474 | struct flow_dissector_key_tcp *key = | |
1475 | skb_flow_dissector_target(f->dissector, | |
1476 | FLOW_DISSECTOR_KEY_TCP, | |
1477 | f->key); | |
1478 | struct flow_dissector_key_tcp *mask = | |
1479 | skb_flow_dissector_target(f->dissector, | |
1480 | FLOW_DISSECTOR_KEY_TCP, | |
1481 | f->mask); | |
1482 | ||
1483 | MLX5_SET(fte_match_set_lyr_2_4, headers_c, tcp_flags, | |
1484 | ntohs(mask->flags)); | |
1485 | MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_flags, | |
1486 | ntohs(key->flags)); | |
1487 | ||
1488 | if (mask->flags) | |
1489 | *min_inline = MLX5_INLINE_MODE_TCP_UDP; | |
1490 | } | |
1491 | ||
e3a2b7ed AV |
1492 | return 0; |
1493 | } | |
1494 | ||
de0af0bf | 1495 | static int parse_cls_flower(struct mlx5e_priv *priv, |
65ba8fb7 | 1496 | struct mlx5e_tc_flow *flow, |
de0af0bf RD |
1497 | struct mlx5_flow_spec *spec, |
1498 | struct tc_cls_flower_offload *f) | |
1499 | { | |
1500 | struct mlx5_core_dev *dev = priv->mdev; | |
1501 | struct mlx5_eswitch *esw = dev->priv.eswitch; | |
1d447a39 SM |
1502 | struct mlx5e_rep_priv *rpriv = priv->ppriv; |
1503 | struct mlx5_eswitch_rep *rep; | |
de0af0bf RD |
1504 | u8 min_inline; |
1505 | int err; | |
1506 | ||
1507 | err = __parse_cls_flower(priv, spec, f, &min_inline); | |
1508 | ||
1d447a39 SM |
1509 | if (!err && (flow->flags & MLX5E_TC_FLOW_ESWITCH)) { |
1510 | rep = rpriv->rep; | |
1511 | if (rep->vport != FDB_UPLINK_VPORT && | |
1512 | (esw->offloads.inline_mode != MLX5_INLINE_MODE_NONE && | |
1513 | esw->offloads.inline_mode < min_inline)) { | |
de0af0bf RD |
1514 | netdev_warn(priv->netdev, |
1515 | "Flow is not offloaded due to min inline setting, required %d actual %d\n", | |
1516 | min_inline, esw->offloads.inline_mode); | |
1517 | return -EOPNOTSUPP; | |
1518 | } | |
1519 | } | |
1520 | ||
1521 | return err; | |
1522 | } | |
1523 | ||
d79b6df6 OG |
1524 | struct pedit_headers { |
1525 | struct ethhdr eth; | |
1526 | struct iphdr ip4; | |
1527 | struct ipv6hdr ip6; | |
1528 | struct tcphdr tcp; | |
1529 | struct udphdr udp; | |
1530 | }; | |
1531 | ||
1532 | static int pedit_header_offsets[] = { | |
1533 | [TCA_PEDIT_KEY_EX_HDR_TYPE_ETH] = offsetof(struct pedit_headers, eth), | |
1534 | [TCA_PEDIT_KEY_EX_HDR_TYPE_IP4] = offsetof(struct pedit_headers, ip4), | |
1535 | [TCA_PEDIT_KEY_EX_HDR_TYPE_IP6] = offsetof(struct pedit_headers, ip6), | |
1536 | [TCA_PEDIT_KEY_EX_HDR_TYPE_TCP] = offsetof(struct pedit_headers, tcp), | |
1537 | [TCA_PEDIT_KEY_EX_HDR_TYPE_UDP] = offsetof(struct pedit_headers, udp), | |
1538 | }; | |
1539 | ||
1540 | #define pedit_header(_ph, _htype) ((void *)(_ph) + pedit_header_offsets[_htype]) | |
1541 | ||
1542 | static int set_pedit_val(u8 hdr_type, u32 mask, u32 val, u32 offset, | |
1543 | struct pedit_headers *masks, | |
1544 | struct pedit_headers *vals) | |
1545 | { | |
1546 | u32 *curr_pmask, *curr_pval; | |
1547 | ||
1548 | if (hdr_type >= __PEDIT_HDR_TYPE_MAX) | |
1549 | goto out_err; | |
1550 | ||
1551 | curr_pmask = (u32 *)(pedit_header(masks, hdr_type) + offset); | |
1552 | curr_pval = (u32 *)(pedit_header(vals, hdr_type) + offset); | |
1553 | ||
1554 | if (*curr_pmask & mask) /* disallow acting twice on the same location */ | |
1555 | goto out_err; | |
1556 | ||
1557 | *curr_pmask |= mask; | |
1558 | *curr_pval |= (val & mask); | |
1559 | ||
1560 | return 0; | |
1561 | ||
1562 | out_err: | |
1563 | return -EOPNOTSUPP; | |
1564 | } | |
1565 | ||
1566 | struct mlx5_fields { | |
1567 | u8 field; | |
1568 | u8 size; | |
1569 | u32 offset; | |
1570 | }; | |
1571 | ||
a8e4f0c4 OG |
1572 | #define OFFLOAD(fw_field, size, field, off) \ |
1573 | {MLX5_ACTION_IN_FIELD_OUT_ ## fw_field, size, offsetof(struct pedit_headers, field) + (off)} | |
1574 | ||
d79b6df6 | 1575 | static struct mlx5_fields fields[] = { |
a8e4f0c4 OG |
1576 | OFFLOAD(DMAC_47_16, 4, eth.h_dest[0], 0), |
1577 | OFFLOAD(DMAC_47_16, 4, eth.h_dest[0], 0), | |
1578 | OFFLOAD(DMAC_15_0, 2, eth.h_dest[4], 0), | |
1579 | OFFLOAD(SMAC_47_16, 4, eth.h_source[0], 0), | |
1580 | OFFLOAD(SMAC_15_0, 2, eth.h_source[4], 0), | |
1581 | OFFLOAD(ETHERTYPE, 2, eth.h_proto, 0), | |
1582 | ||
1583 | OFFLOAD(IP_TTL, 1, ip4.ttl, 0), | |
1584 | OFFLOAD(SIPV4, 4, ip4.saddr, 0), | |
1585 | OFFLOAD(DIPV4, 4, ip4.daddr, 0), | |
1586 | ||
1587 | OFFLOAD(SIPV6_127_96, 4, ip6.saddr.s6_addr32[0], 0), | |
1588 | OFFLOAD(SIPV6_95_64, 4, ip6.saddr.s6_addr32[1], 0), | |
1589 | OFFLOAD(SIPV6_63_32, 4, ip6.saddr.s6_addr32[2], 0), | |
1590 | OFFLOAD(SIPV6_31_0, 4, ip6.saddr.s6_addr32[3], 0), | |
1591 | OFFLOAD(DIPV6_127_96, 4, ip6.daddr.s6_addr32[0], 0), | |
1592 | OFFLOAD(DIPV6_95_64, 4, ip6.daddr.s6_addr32[1], 0), | |
1593 | OFFLOAD(DIPV6_63_32, 4, ip6.daddr.s6_addr32[2], 0), | |
1594 | OFFLOAD(DIPV6_31_0, 4, ip6.daddr.s6_addr32[3], 0), | |
0c0316f5 | 1595 | OFFLOAD(IPV6_HOPLIMIT, 1, ip6.hop_limit, 0), |
a8e4f0c4 OG |
1596 | |
1597 | OFFLOAD(TCP_SPORT, 2, tcp.source, 0), | |
1598 | OFFLOAD(TCP_DPORT, 2, tcp.dest, 0), | |
1599 | OFFLOAD(TCP_FLAGS, 1, tcp.ack_seq, 5), | |
1600 | ||
1601 | OFFLOAD(UDP_SPORT, 2, udp.source, 0), | |
1602 | OFFLOAD(UDP_DPORT, 2, udp.dest, 0), | |
d79b6df6 OG |
1603 | }; |
1604 | ||
1605 | /* On input attr->num_mod_hdr_actions tells how many HW actions can be parsed at | |
1606 | * max from the SW pedit action. On success, it says how many HW actions were | |
1607 | * actually parsed. | |
1608 | */ | |
1609 | static int offload_pedit_fields(struct pedit_headers *masks, | |
1610 | struct pedit_headers *vals, | |
1611 | struct mlx5e_tc_flow_parse_attr *parse_attr) | |
1612 | { | |
1613 | struct pedit_headers *set_masks, *add_masks, *set_vals, *add_vals; | |
2b64beba | 1614 | int i, action_size, nactions, max_actions, first, last, next_z; |
d79b6df6 | 1615 | void *s_masks_p, *a_masks_p, *vals_p; |
d79b6df6 OG |
1616 | struct mlx5_fields *f; |
1617 | u8 cmd, field_bsize; | |
e3ca4e05 | 1618 | u32 s_mask, a_mask; |
d79b6df6 | 1619 | unsigned long mask; |
2b64beba OG |
1620 | __be32 mask_be32; |
1621 | __be16 mask_be16; | |
d79b6df6 OG |
1622 | void *action; |
1623 | ||
1624 | set_masks = &masks[TCA_PEDIT_KEY_EX_CMD_SET]; | |
1625 | add_masks = &masks[TCA_PEDIT_KEY_EX_CMD_ADD]; | |
1626 | set_vals = &vals[TCA_PEDIT_KEY_EX_CMD_SET]; | |
1627 | add_vals = &vals[TCA_PEDIT_KEY_EX_CMD_ADD]; | |
1628 | ||
1629 | action_size = MLX5_UN_SZ_BYTES(set_action_in_add_action_in_auto); | |
1630 | action = parse_attr->mod_hdr_actions; | |
1631 | max_actions = parse_attr->num_mod_hdr_actions; | |
1632 | nactions = 0; | |
1633 | ||
1634 | for (i = 0; i < ARRAY_SIZE(fields); i++) { | |
1635 | f = &fields[i]; | |
1636 | /* avoid seeing bits set from previous iterations */ | |
e3ca4e05 OG |
1637 | s_mask = 0; |
1638 | a_mask = 0; | |
d79b6df6 OG |
1639 | |
1640 | s_masks_p = (void *)set_masks + f->offset; | |
1641 | a_masks_p = (void *)add_masks + f->offset; | |
1642 | ||
1643 | memcpy(&s_mask, s_masks_p, f->size); | |
1644 | memcpy(&a_mask, a_masks_p, f->size); | |
1645 | ||
1646 | if (!s_mask && !a_mask) /* nothing to offload here */ | |
1647 | continue; | |
1648 | ||
1649 | if (s_mask && a_mask) { | |
1650 | printk(KERN_WARNING "mlx5: can't set and add to the same HW field (%x)\n", f->field); | |
1651 | return -EOPNOTSUPP; | |
1652 | } | |
1653 | ||
1654 | if (nactions == max_actions) { | |
1655 | printk(KERN_WARNING "mlx5: parsed %d pedit actions, can't do more\n", nactions); | |
1656 | return -EOPNOTSUPP; | |
1657 | } | |
1658 | ||
1659 | if (s_mask) { | |
1660 | cmd = MLX5_ACTION_TYPE_SET; | |
1661 | mask = s_mask; | |
1662 | vals_p = (void *)set_vals + f->offset; | |
1663 | /* clear to denote we consumed this field */ | |
1664 | memset(s_masks_p, 0, f->size); | |
1665 | } else { | |
1666 | cmd = MLX5_ACTION_TYPE_ADD; | |
1667 | mask = a_mask; | |
1668 | vals_p = (void *)add_vals + f->offset; | |
1669 | /* clear to denote we consumed this field */ | |
1670 | memset(a_masks_p, 0, f->size); | |
1671 | } | |
1672 | ||
d79b6df6 | 1673 | field_bsize = f->size * BITS_PER_BYTE; |
e3ca4e05 | 1674 | |
2b64beba OG |
1675 | if (field_bsize == 32) { |
1676 | mask_be32 = *(__be32 *)&mask; | |
1677 | mask = (__force unsigned long)cpu_to_le32(be32_to_cpu(mask_be32)); | |
1678 | } else if (field_bsize == 16) { | |
1679 | mask_be16 = *(__be16 *)&mask; | |
1680 | mask = (__force unsigned long)cpu_to_le16(be16_to_cpu(mask_be16)); | |
1681 | } | |
1682 | ||
d79b6df6 | 1683 | first = find_first_bit(&mask, field_bsize); |
2b64beba | 1684 | next_z = find_next_zero_bit(&mask, field_bsize, first); |
d79b6df6 | 1685 | last = find_last_bit(&mask, field_bsize); |
2b64beba OG |
1686 | if (first < next_z && next_z < last) { |
1687 | printk(KERN_WARNING "mlx5: rewrite of few sub-fields (mask %lx) isn't offloaded\n", | |
d79b6df6 OG |
1688 | mask); |
1689 | return -EOPNOTSUPP; | |
1690 | } | |
1691 | ||
1692 | MLX5_SET(set_action_in, action, action_type, cmd); | |
1693 | MLX5_SET(set_action_in, action, field, f->field); | |
1694 | ||
1695 | if (cmd == MLX5_ACTION_TYPE_SET) { | |
2b64beba | 1696 | MLX5_SET(set_action_in, action, offset, first); |
d79b6df6 | 1697 | /* length is num of bits to be written, zero means length of 32 */ |
2b64beba | 1698 | MLX5_SET(set_action_in, action, length, (last - first + 1)); |
d79b6df6 OG |
1699 | } |
1700 | ||
1701 | if (field_bsize == 32) | |
2b64beba | 1702 | MLX5_SET(set_action_in, action, data, ntohl(*(__be32 *)vals_p) >> first); |
d79b6df6 | 1703 | else if (field_bsize == 16) |
2b64beba | 1704 | MLX5_SET(set_action_in, action, data, ntohs(*(__be16 *)vals_p) >> first); |
d79b6df6 | 1705 | else if (field_bsize == 8) |
2b64beba | 1706 | MLX5_SET(set_action_in, action, data, *(u8 *)vals_p >> first); |
d79b6df6 OG |
1707 | |
1708 | action += action_size; | |
1709 | nactions++; | |
1710 | } | |
1711 | ||
1712 | parse_attr->num_mod_hdr_actions = nactions; | |
1713 | return 0; | |
1714 | } | |
1715 | ||
1716 | static int alloc_mod_hdr_actions(struct mlx5e_priv *priv, | |
1717 | const struct tc_action *a, int namespace, | |
1718 | struct mlx5e_tc_flow_parse_attr *parse_attr) | |
1719 | { | |
1720 | int nkeys, action_size, max_actions; | |
1721 | ||
1722 | nkeys = tcf_pedit_nkeys(a); | |
1723 | action_size = MLX5_UN_SZ_BYTES(set_action_in_add_action_in_auto); | |
1724 | ||
1725 | if (namespace == MLX5_FLOW_NAMESPACE_FDB) /* FDB offloading */ | |
1726 | max_actions = MLX5_CAP_ESW_FLOWTABLE_FDB(priv->mdev, max_modify_header_actions); | |
1727 | else /* namespace is MLX5_FLOW_NAMESPACE_KERNEL - NIC offloading */ | |
1728 | max_actions = MLX5_CAP_FLOWTABLE_NIC_RX(priv->mdev, max_modify_header_actions); | |
1729 | ||
1730 | /* can get up to crazingly 16 HW actions in 32 bits pedit SW key */ | |
1731 | max_actions = min(max_actions, nkeys * 16); | |
1732 | ||
1733 | parse_attr->mod_hdr_actions = kcalloc(max_actions, action_size, GFP_KERNEL); | |
1734 | if (!parse_attr->mod_hdr_actions) | |
1735 | return -ENOMEM; | |
1736 | ||
1737 | parse_attr->num_mod_hdr_actions = max_actions; | |
1738 | return 0; | |
1739 | } | |
1740 | ||
1741 | static const struct pedit_headers zero_masks = {}; | |
1742 | ||
1743 | static int parse_tc_pedit_action(struct mlx5e_priv *priv, | |
1744 | const struct tc_action *a, int namespace, | |
1745 | struct mlx5e_tc_flow_parse_attr *parse_attr) | |
1746 | { | |
1747 | struct pedit_headers masks[__PEDIT_CMD_MAX], vals[__PEDIT_CMD_MAX], *cmd_masks; | |
1748 | int nkeys, i, err = -EOPNOTSUPP; | |
1749 | u32 mask, val, offset; | |
1750 | u8 cmd, htype; | |
1751 | ||
1752 | nkeys = tcf_pedit_nkeys(a); | |
1753 | ||
1754 | memset(masks, 0, sizeof(struct pedit_headers) * __PEDIT_CMD_MAX); | |
1755 | memset(vals, 0, sizeof(struct pedit_headers) * __PEDIT_CMD_MAX); | |
1756 | ||
1757 | for (i = 0; i < nkeys; i++) { | |
1758 | htype = tcf_pedit_htype(a, i); | |
1759 | cmd = tcf_pedit_cmd(a, i); | |
1760 | err = -EOPNOTSUPP; /* can't be all optimistic */ | |
1761 | ||
1762 | if (htype == TCA_PEDIT_KEY_EX_HDR_TYPE_NETWORK) { | |
1763 | printk(KERN_WARNING "mlx5: legacy pedit isn't offloaded\n"); | |
1764 | goto out_err; | |
1765 | } | |
1766 | ||
1767 | if (cmd != TCA_PEDIT_KEY_EX_CMD_SET && cmd != TCA_PEDIT_KEY_EX_CMD_ADD) { | |
1768 | printk(KERN_WARNING "mlx5: pedit cmd %d isn't offloaded\n", cmd); | |
1769 | goto out_err; | |
1770 | } | |
1771 | ||
1772 | mask = tcf_pedit_mask(a, i); | |
1773 | val = tcf_pedit_val(a, i); | |
1774 | offset = tcf_pedit_offset(a, i); | |
1775 | ||
1776 | err = set_pedit_val(htype, ~mask, val, offset, &masks[cmd], &vals[cmd]); | |
1777 | if (err) | |
1778 | goto out_err; | |
1779 | } | |
1780 | ||
1781 | err = alloc_mod_hdr_actions(priv, a, namespace, parse_attr); | |
1782 | if (err) | |
1783 | goto out_err; | |
1784 | ||
1785 | err = offload_pedit_fields(masks, vals, parse_attr); | |
1786 | if (err < 0) | |
1787 | goto out_dealloc_parsed_actions; | |
1788 | ||
1789 | for (cmd = 0; cmd < __PEDIT_CMD_MAX; cmd++) { | |
1790 | cmd_masks = &masks[cmd]; | |
1791 | if (memcmp(cmd_masks, &zero_masks, sizeof(zero_masks))) { | |
1792 | printk(KERN_WARNING "mlx5: attempt to offload an unsupported field (cmd %d)\n", | |
1793 | cmd); | |
1794 | print_hex_dump(KERN_WARNING, "mask: ", DUMP_PREFIX_ADDRESS, | |
1795 | 16, 1, cmd_masks, sizeof(zero_masks), true); | |
1796 | err = -EOPNOTSUPP; | |
1797 | goto out_dealloc_parsed_actions; | |
1798 | } | |
1799 | } | |
1800 | ||
1801 | return 0; | |
1802 | ||
1803 | out_dealloc_parsed_actions: | |
1804 | kfree(parse_attr->mod_hdr_actions); | |
1805 | out_err: | |
1806 | return err; | |
1807 | } | |
1808 | ||
26c02749 OG |
1809 | static bool csum_offload_supported(struct mlx5e_priv *priv, u32 action, u32 update_flags) |
1810 | { | |
1811 | u32 prot_flags = TCA_CSUM_UPDATE_FLAG_IPV4HDR | TCA_CSUM_UPDATE_FLAG_TCP | | |
1812 | TCA_CSUM_UPDATE_FLAG_UDP; | |
1813 | ||
1814 | /* The HW recalcs checksums only if re-writing headers */ | |
1815 | if (!(action & MLX5_FLOW_CONTEXT_ACTION_MOD_HDR)) { | |
1816 | netdev_warn(priv->netdev, | |
1817 | "TC csum action is only offloaded with pedit\n"); | |
1818 | return false; | |
1819 | } | |
1820 | ||
1821 | if (update_flags & ~prot_flags) { | |
1822 | netdev_warn(priv->netdev, | |
1823 | "can't offload TC csum action for some header/s - flags %#x\n", | |
1824 | update_flags); | |
1825 | return false; | |
1826 | } | |
1827 | ||
1828 | return true; | |
1829 | } | |
1830 | ||
bdd66ac0 OG |
1831 | static bool modify_header_match_supported(struct mlx5_flow_spec *spec, |
1832 | struct tcf_exts *exts) | |
1833 | { | |
1834 | const struct tc_action *a; | |
1835 | bool modify_ip_header; | |
1836 | LIST_HEAD(actions); | |
1837 | u8 htype, ip_proto; | |
1838 | void *headers_v; | |
1839 | u16 ethertype; | |
1840 | int nkeys, i; | |
1841 | ||
1842 | headers_v = MLX5_ADDR_OF(fte_match_param, spec->match_value, outer_headers); | |
1843 | ethertype = MLX5_GET(fte_match_set_lyr_2_4, headers_v, ethertype); | |
1844 | ||
1845 | /* for non-IP we only re-write MACs, so we're okay */ | |
1846 | if (ethertype != ETH_P_IP && ethertype != ETH_P_IPV6) | |
1847 | goto out_ok; | |
1848 | ||
1849 | modify_ip_header = false; | |
1850 | tcf_exts_to_list(exts, &actions); | |
1851 | list_for_each_entry(a, &actions, list) { | |
1852 | if (!is_tcf_pedit(a)) | |
1853 | continue; | |
1854 | ||
1855 | nkeys = tcf_pedit_nkeys(a); | |
1856 | for (i = 0; i < nkeys; i++) { | |
1857 | htype = tcf_pedit_htype(a, i); | |
1858 | if (htype == TCA_PEDIT_KEY_EX_HDR_TYPE_IP4 || | |
1859 | htype == TCA_PEDIT_KEY_EX_HDR_TYPE_IP6) { | |
1860 | modify_ip_header = true; | |
1861 | break; | |
1862 | } | |
1863 | } | |
1864 | } | |
1865 | ||
1866 | ip_proto = MLX5_GET(fte_match_set_lyr_2_4, headers_v, ip_protocol); | |
1867 | if (modify_ip_header && ip_proto != IPPROTO_TCP && ip_proto != IPPROTO_UDP) { | |
1868 | pr_info("can't offload re-write of ip proto %d\n", ip_proto); | |
1869 | return false; | |
1870 | } | |
1871 | ||
1872 | out_ok: | |
1873 | return true; | |
1874 | } | |
1875 | ||
1876 | static bool actions_match_supported(struct mlx5e_priv *priv, | |
1877 | struct tcf_exts *exts, | |
1878 | struct mlx5e_tc_flow_parse_attr *parse_attr, | |
1879 | struct mlx5e_tc_flow *flow) | |
1880 | { | |
1881 | u32 actions; | |
1882 | ||
1883 | if (flow->flags & MLX5E_TC_FLOW_ESWITCH) | |
1884 | actions = flow->esw_attr->action; | |
1885 | else | |
1886 | actions = flow->nic_attr->action; | |
1887 | ||
1888 | if (actions & MLX5_FLOW_CONTEXT_ACTION_MOD_HDR) | |
1889 | return modify_header_match_supported(&parse_attr->spec, exts); | |
1890 | ||
1891 | return true; | |
1892 | } | |
1893 | ||
5c65c564 OG |
1894 | static bool same_hw_devs(struct mlx5e_priv *priv, struct mlx5e_priv *peer_priv) |
1895 | { | |
1896 | struct mlx5_core_dev *fmdev, *pmdev; | |
1897 | u16 func_id, peer_id; | |
1898 | ||
1899 | fmdev = priv->mdev; | |
1900 | pmdev = peer_priv->mdev; | |
1901 | ||
1902 | func_id = (u16)((fmdev->pdev->bus->number << 8) | PCI_SLOT(fmdev->pdev->devfn)); | |
1903 | peer_id = (u16)((pmdev->pdev->bus->number << 8) | PCI_SLOT(pmdev->pdev->devfn)); | |
1904 | ||
1905 | return (func_id == peer_id); | |
1906 | } | |
1907 | ||
5c40348c | 1908 | static int parse_tc_nic_actions(struct mlx5e_priv *priv, struct tcf_exts *exts, |
aa0cbbae OG |
1909 | struct mlx5e_tc_flow_parse_attr *parse_attr, |
1910 | struct mlx5e_tc_flow *flow) | |
e3a2b7ed | 1911 | { |
aa0cbbae | 1912 | struct mlx5_nic_flow_attr *attr = flow->nic_attr; |
e3a2b7ed | 1913 | const struct tc_action *a; |
22dc13c8 | 1914 | LIST_HEAD(actions); |
2f4fe4ca | 1915 | int err; |
e3a2b7ed | 1916 | |
3bcc0cec | 1917 | if (!tcf_exts_has_actions(exts)) |
e3a2b7ed AV |
1918 | return -EINVAL; |
1919 | ||
3bc4b7bf OG |
1920 | attr->flow_tag = MLX5_FS_DEFAULT_FLOW_TAG; |
1921 | attr->action = 0; | |
e3a2b7ed | 1922 | |
22dc13c8 WC |
1923 | tcf_exts_to_list(exts, &actions); |
1924 | list_for_each_entry(a, &actions, list) { | |
e3a2b7ed | 1925 | if (is_tcf_gact_shot(a)) { |
3bc4b7bf | 1926 | attr->action |= MLX5_FLOW_CONTEXT_ACTION_DROP; |
aad7e08d AV |
1927 | if (MLX5_CAP_FLOWTABLE(priv->mdev, |
1928 | flow_table_properties_nic_receive.flow_counter)) | |
3bc4b7bf | 1929 | attr->action |= MLX5_FLOW_CONTEXT_ACTION_COUNT; |
e3a2b7ed AV |
1930 | continue; |
1931 | } | |
1932 | ||
2f4fe4ca OG |
1933 | if (is_tcf_pedit(a)) { |
1934 | err = parse_tc_pedit_action(priv, a, MLX5_FLOW_NAMESPACE_KERNEL, | |
1935 | parse_attr); | |
1936 | if (err) | |
1937 | return err; | |
1938 | ||
1939 | attr->action |= MLX5_FLOW_CONTEXT_ACTION_MOD_HDR | | |
1940 | MLX5_FLOW_CONTEXT_ACTION_FWD_DEST; | |
1941 | continue; | |
1942 | } | |
1943 | ||
26c02749 OG |
1944 | if (is_tcf_csum(a)) { |
1945 | if (csum_offload_supported(priv, attr->action, | |
1946 | tcf_csum_update_flags(a))) | |
1947 | continue; | |
1948 | ||
1949 | return -EOPNOTSUPP; | |
1950 | } | |
1951 | ||
5c65c564 OG |
1952 | if (is_tcf_mirred_egress_redirect(a)) { |
1953 | struct net_device *peer_dev = tcf_mirred_dev(a); | |
1954 | ||
1955 | if (priv->netdev->netdev_ops == peer_dev->netdev_ops && | |
1956 | same_hw_devs(priv, netdev_priv(peer_dev))) { | |
1957 | parse_attr->mirred_ifindex = peer_dev->ifindex; | |
1958 | flow->flags |= MLX5E_TC_FLOW_HAIRPIN; | |
1959 | attr->action |= MLX5_FLOW_CONTEXT_ACTION_FWD_DEST | | |
1960 | MLX5_FLOW_CONTEXT_ACTION_COUNT; | |
1961 | } else { | |
1962 | netdev_warn(priv->netdev, "device %s not on same HW, can't offload\n", | |
1963 | peer_dev->name); | |
1964 | return -EINVAL; | |
1965 | } | |
1966 | continue; | |
1967 | } | |
1968 | ||
e3a2b7ed AV |
1969 | if (is_tcf_skbedit_mark(a)) { |
1970 | u32 mark = tcf_skbedit_mark(a); | |
1971 | ||
1972 | if (mark & ~MLX5E_TC_FLOW_ID_MASK) { | |
1973 | netdev_warn(priv->netdev, "Bad flow mark - only 16 bit is supported: 0x%x\n", | |
1974 | mark); | |
1975 | return -EINVAL; | |
1976 | } | |
1977 | ||
3bc4b7bf OG |
1978 | attr->flow_tag = mark; |
1979 | attr->action |= MLX5_FLOW_CONTEXT_ACTION_FWD_DEST; | |
e3a2b7ed AV |
1980 | continue; |
1981 | } | |
1982 | ||
1983 | return -EINVAL; | |
1984 | } | |
1985 | ||
bdd66ac0 OG |
1986 | if (!actions_match_supported(priv, exts, parse_attr, flow)) |
1987 | return -EOPNOTSUPP; | |
1988 | ||
e3a2b7ed AV |
1989 | return 0; |
1990 | } | |
1991 | ||
76f7444d OG |
1992 | static inline int cmp_encap_info(struct ip_tunnel_key *a, |
1993 | struct ip_tunnel_key *b) | |
a54e20b4 HHZ |
1994 | { |
1995 | return memcmp(a, b, sizeof(*a)); | |
1996 | } | |
1997 | ||
76f7444d | 1998 | static inline int hash_encap_info(struct ip_tunnel_key *key) |
a54e20b4 | 1999 | { |
76f7444d | 2000 | return jhash(key, sizeof(*key), 0); |
a54e20b4 HHZ |
2001 | } |
2002 | ||
2003 | static int mlx5e_route_lookup_ipv4(struct mlx5e_priv *priv, | |
2004 | struct net_device *mirred_dev, | |
2005 | struct net_device **out_dev, | |
2006 | struct flowi4 *fl4, | |
2007 | struct neighbour **out_n, | |
a54e20b4 HHZ |
2008 | int *out_ttl) |
2009 | { | |
3e621b19 | 2010 | struct mlx5_eswitch *esw = priv->mdev->priv.eswitch; |
5ed99fb4 | 2011 | struct mlx5e_rep_priv *uplink_rpriv; |
a54e20b4 HHZ |
2012 | struct rtable *rt; |
2013 | struct neighbour *n = NULL; | |
a54e20b4 HHZ |
2014 | |
2015 | #if IS_ENABLED(CONFIG_INET) | |
abeffce9 AB |
2016 | int ret; |
2017 | ||
a54e20b4 | 2018 | rt = ip_route_output_key(dev_net(mirred_dev), fl4); |
abeffce9 AB |
2019 | ret = PTR_ERR_OR_ZERO(rt); |
2020 | if (ret) | |
2021 | return ret; | |
a54e20b4 HHZ |
2022 | #else |
2023 | return -EOPNOTSUPP; | |
2024 | #endif | |
a4b97ab4 | 2025 | uplink_rpriv = mlx5_eswitch_get_uplink_priv(esw, REP_ETH); |
3e621b19 HHZ |
2026 | /* if the egress device isn't on the same HW e-switch, we use the uplink */ |
2027 | if (!switchdev_port_same_parent_id(priv->netdev, rt->dst.dev)) | |
5ed99fb4 | 2028 | *out_dev = uplink_rpriv->netdev; |
3e621b19 HHZ |
2029 | else |
2030 | *out_dev = rt->dst.dev; | |
a54e20b4 | 2031 | |
75c33da8 | 2032 | *out_ttl = ip4_dst_hoplimit(&rt->dst); |
a54e20b4 HHZ |
2033 | n = dst_neigh_lookup(&rt->dst, &fl4->daddr); |
2034 | ip_rt_put(rt); | |
2035 | if (!n) | |
2036 | return -ENOMEM; | |
2037 | ||
2038 | *out_n = n; | |
a54e20b4 HHZ |
2039 | return 0; |
2040 | } | |
2041 | ||
ce99f6b9 OG |
2042 | static int mlx5e_route_lookup_ipv6(struct mlx5e_priv *priv, |
2043 | struct net_device *mirred_dev, | |
2044 | struct net_device **out_dev, | |
2045 | struct flowi6 *fl6, | |
2046 | struct neighbour **out_n, | |
2047 | int *out_ttl) | |
2048 | { | |
2049 | struct neighbour *n = NULL; | |
2050 | struct dst_entry *dst; | |
2051 | ||
2052 | #if IS_ENABLED(CONFIG_INET) && IS_ENABLED(CONFIG_IPV6) | |
74bd5d56 | 2053 | struct mlx5e_rep_priv *uplink_rpriv; |
ce99f6b9 OG |
2054 | struct mlx5_eswitch *esw = priv->mdev->priv.eswitch; |
2055 | int ret; | |
2056 | ||
08820528 PB |
2057 | ret = ipv6_stub->ipv6_dst_lookup(dev_net(mirred_dev), NULL, &dst, |
2058 | fl6); | |
2059 | if (ret < 0) | |
ce99f6b9 | 2060 | return ret; |
ce99f6b9 OG |
2061 | |
2062 | *out_ttl = ip6_dst_hoplimit(dst); | |
2063 | ||
a4b97ab4 | 2064 | uplink_rpriv = mlx5_eswitch_get_uplink_priv(esw, REP_ETH); |
ce99f6b9 OG |
2065 | /* if the egress device isn't on the same HW e-switch, we use the uplink */ |
2066 | if (!switchdev_port_same_parent_id(priv->netdev, dst->dev)) | |
5ed99fb4 | 2067 | *out_dev = uplink_rpriv->netdev; |
ce99f6b9 OG |
2068 | else |
2069 | *out_dev = dst->dev; | |
2070 | #else | |
2071 | return -EOPNOTSUPP; | |
2072 | #endif | |
2073 | ||
2074 | n = dst_neigh_lookup(dst, &fl6->daddr); | |
2075 | dst_release(dst); | |
2076 | if (!n) | |
2077 | return -ENOMEM; | |
2078 | ||
2079 | *out_n = n; | |
2080 | return 0; | |
2081 | } | |
2082 | ||
32f3671f OG |
2083 | static void gen_vxlan_header_ipv4(struct net_device *out_dev, |
2084 | char buf[], int encap_size, | |
2085 | unsigned char h_dest[ETH_ALEN], | |
2086 | int ttl, | |
2087 | __be32 daddr, | |
2088 | __be32 saddr, | |
2089 | __be16 udp_dst_port, | |
2090 | __be32 vx_vni) | |
a54e20b4 | 2091 | { |
a54e20b4 HHZ |
2092 | struct ethhdr *eth = (struct ethhdr *)buf; |
2093 | struct iphdr *ip = (struct iphdr *)((char *)eth + sizeof(struct ethhdr)); | |
2094 | struct udphdr *udp = (struct udphdr *)((char *)ip + sizeof(struct iphdr)); | |
2095 | struct vxlanhdr *vxh = (struct vxlanhdr *)((char *)udp + sizeof(struct udphdr)); | |
2096 | ||
2097 | memset(buf, 0, encap_size); | |
2098 | ||
2099 | ether_addr_copy(eth->h_dest, h_dest); | |
2100 | ether_addr_copy(eth->h_source, out_dev->dev_addr); | |
2101 | eth->h_proto = htons(ETH_P_IP); | |
2102 | ||
2103 | ip->daddr = daddr; | |
2104 | ip->saddr = saddr; | |
2105 | ||
2106 | ip->ttl = ttl; | |
2107 | ip->protocol = IPPROTO_UDP; | |
2108 | ip->version = 0x4; | |
2109 | ip->ihl = 0x5; | |
2110 | ||
2111 | udp->dest = udp_dst_port; | |
2112 | vxh->vx_flags = VXLAN_HF_VNI; | |
2113 | vxh->vx_vni = vxlan_vni_field(vx_vni); | |
a54e20b4 HHZ |
2114 | } |
2115 | ||
225aabaf OG |
2116 | static void gen_vxlan_header_ipv6(struct net_device *out_dev, |
2117 | char buf[], int encap_size, | |
2118 | unsigned char h_dest[ETH_ALEN], | |
2119 | int ttl, | |
2120 | struct in6_addr *daddr, | |
2121 | struct in6_addr *saddr, | |
2122 | __be16 udp_dst_port, | |
2123 | __be32 vx_vni) | |
ce99f6b9 | 2124 | { |
ce99f6b9 OG |
2125 | struct ethhdr *eth = (struct ethhdr *)buf; |
2126 | struct ipv6hdr *ip6h = (struct ipv6hdr *)((char *)eth + sizeof(struct ethhdr)); | |
2127 | struct udphdr *udp = (struct udphdr *)((char *)ip6h + sizeof(struct ipv6hdr)); | |
2128 | struct vxlanhdr *vxh = (struct vxlanhdr *)((char *)udp + sizeof(struct udphdr)); | |
2129 | ||
2130 | memset(buf, 0, encap_size); | |
2131 | ||
2132 | ether_addr_copy(eth->h_dest, h_dest); | |
2133 | ether_addr_copy(eth->h_source, out_dev->dev_addr); | |
2134 | eth->h_proto = htons(ETH_P_IPV6); | |
2135 | ||
2136 | ip6_flow_hdr(ip6h, 0, 0); | |
2137 | /* the HW fills up ipv6 payload len */ | |
2138 | ip6h->nexthdr = IPPROTO_UDP; | |
2139 | ip6h->hop_limit = ttl; | |
2140 | ip6h->daddr = *daddr; | |
2141 | ip6h->saddr = *saddr; | |
2142 | ||
2143 | udp->dest = udp_dst_port; | |
2144 | vxh->vx_flags = VXLAN_HF_VNI; | |
2145 | vxh->vx_vni = vxlan_vni_field(vx_vni); | |
ce99f6b9 OG |
2146 | } |
2147 | ||
a54e20b4 HHZ |
2148 | static int mlx5e_create_encap_header_ipv4(struct mlx5e_priv *priv, |
2149 | struct net_device *mirred_dev, | |
1a8552bd | 2150 | struct mlx5e_encap_entry *e) |
a54e20b4 HHZ |
2151 | { |
2152 | int max_encap_size = MLX5_CAP_ESW(priv->mdev, max_encap_header_size); | |
32f3671f | 2153 | int ipv4_encap_size = ETH_HLEN + sizeof(struct iphdr) + VXLAN_HLEN; |
76f7444d | 2154 | struct ip_tunnel_key *tun_key = &e->tun_info.key; |
1a8552bd | 2155 | struct net_device *out_dev; |
a42485eb | 2156 | struct neighbour *n = NULL; |
a54e20b4 | 2157 | struct flowi4 fl4 = {}; |
a54e20b4 | 2158 | char *encap_header; |
32f3671f | 2159 | int ttl, err; |
033354d5 | 2160 | u8 nud_state; |
32f3671f OG |
2161 | |
2162 | if (max_encap_size < ipv4_encap_size) { | |
2163 | mlx5_core_warn(priv->mdev, "encap size %d too big, max supported is %d\n", | |
2164 | ipv4_encap_size, max_encap_size); | |
2165 | return -EOPNOTSUPP; | |
2166 | } | |
a54e20b4 | 2167 | |
32f3671f | 2168 | encap_header = kzalloc(ipv4_encap_size, GFP_KERNEL); |
a54e20b4 HHZ |
2169 | if (!encap_header) |
2170 | return -ENOMEM; | |
2171 | ||
2172 | switch (e->tunnel_type) { | |
2173 | case MLX5_HEADER_TYPE_VXLAN: | |
2174 | fl4.flowi4_proto = IPPROTO_UDP; | |
76f7444d | 2175 | fl4.fl4_dport = tun_key->tp_dst; |
a54e20b4 HHZ |
2176 | break; |
2177 | default: | |
2178 | err = -EOPNOTSUPP; | |
ace74321 | 2179 | goto free_encap; |
a54e20b4 | 2180 | } |
9a941117 | 2181 | fl4.flowi4_tos = tun_key->tos; |
76f7444d | 2182 | fl4.daddr = tun_key->u.ipv4.dst; |
9a941117 | 2183 | fl4.saddr = tun_key->u.ipv4.src; |
a54e20b4 | 2184 | |
1a8552bd | 2185 | err = mlx5e_route_lookup_ipv4(priv, mirred_dev, &out_dev, |
9a941117 | 2186 | &fl4, &n, &ttl); |
a54e20b4 | 2187 | if (err) |
ace74321 | 2188 | goto free_encap; |
a54e20b4 | 2189 | |
232c0013 HHZ |
2190 | /* used by mlx5e_detach_encap to lookup a neigh hash table |
2191 | * entry in the neigh hash table when a user deletes a rule | |
2192 | */ | |
2193 | e->m_neigh.dev = n->dev; | |
f6dfb4c3 | 2194 | e->m_neigh.family = n->ops->family; |
232c0013 HHZ |
2195 | memcpy(&e->m_neigh.dst_ip, n->primary_key, n->tbl->key_len); |
2196 | e->out_dev = out_dev; | |
2197 | ||
2198 | /* It's importent to add the neigh to the hash table before checking | |
2199 | * the neigh validity state. So if we'll get a notification, in case the | |
2200 | * neigh changes it's validity state, we would find the relevant neigh | |
2201 | * in the hash. | |
2202 | */ | |
2203 | err = mlx5e_rep_encap_entry_attach(netdev_priv(out_dev), e); | |
2204 | if (err) | |
ace74321 | 2205 | goto free_encap; |
232c0013 | 2206 | |
033354d5 HHZ |
2207 | read_lock_bh(&n->lock); |
2208 | nud_state = n->nud_state; | |
2209 | ether_addr_copy(e->h_dest, n->ha); | |
2210 | read_unlock_bh(&n->lock); | |
2211 | ||
a54e20b4 HHZ |
2212 | switch (e->tunnel_type) { |
2213 | case MLX5_HEADER_TYPE_VXLAN: | |
1a8552bd | 2214 | gen_vxlan_header_ipv4(out_dev, encap_header, |
32f3671f OG |
2215 | ipv4_encap_size, e->h_dest, ttl, |
2216 | fl4.daddr, | |
2217 | fl4.saddr, tun_key->tp_dst, | |
2218 | tunnel_id_to_key32(tun_key->tun_id)); | |
a54e20b4 HHZ |
2219 | break; |
2220 | default: | |
2221 | err = -EOPNOTSUPP; | |
232c0013 HHZ |
2222 | goto destroy_neigh_entry; |
2223 | } | |
2224 | e->encap_size = ipv4_encap_size; | |
2225 | e->encap_header = encap_header; | |
2226 | ||
2227 | if (!(nud_state & NUD_VALID)) { | |
2228 | neigh_event_send(n, NULL); | |
27902f08 WY |
2229 | err = -EAGAIN; |
2230 | goto out; | |
a54e20b4 HHZ |
2231 | } |
2232 | ||
2233 | err = mlx5_encap_alloc(priv->mdev, e->tunnel_type, | |
32f3671f | 2234 | ipv4_encap_size, encap_header, &e->encap_id); |
232c0013 HHZ |
2235 | if (err) |
2236 | goto destroy_neigh_entry; | |
2237 | ||
2238 | e->flags |= MLX5_ENCAP_ENTRY_VALID; | |
f6dfb4c3 | 2239 | mlx5e_rep_queue_neigh_stats_work(netdev_priv(out_dev)); |
232c0013 HHZ |
2240 | neigh_release(n); |
2241 | return err; | |
2242 | ||
2243 | destroy_neigh_entry: | |
2244 | mlx5e_rep_encap_entry_detach(netdev_priv(e->out_dev), e); | |
ace74321 | 2245 | free_encap: |
a54e20b4 | 2246 | kfree(encap_header); |
ace74321 | 2247 | out: |
232c0013 HHZ |
2248 | if (n) |
2249 | neigh_release(n); | |
a54e20b4 HHZ |
2250 | return err; |
2251 | } | |
2252 | ||
ce99f6b9 OG |
2253 | static int mlx5e_create_encap_header_ipv6(struct mlx5e_priv *priv, |
2254 | struct net_device *mirred_dev, | |
1a8552bd | 2255 | struct mlx5e_encap_entry *e) |
ce99f6b9 OG |
2256 | { |
2257 | int max_encap_size = MLX5_CAP_ESW(priv->mdev, max_encap_header_size); | |
225aabaf | 2258 | int ipv6_encap_size = ETH_HLEN + sizeof(struct ipv6hdr) + VXLAN_HLEN; |
ce99f6b9 | 2259 | struct ip_tunnel_key *tun_key = &e->tun_info.key; |
1a8552bd | 2260 | struct net_device *out_dev; |
ce99f6b9 OG |
2261 | struct neighbour *n = NULL; |
2262 | struct flowi6 fl6 = {}; | |
2263 | char *encap_header; | |
225aabaf | 2264 | int err, ttl = 0; |
033354d5 | 2265 | u8 nud_state; |
ce99f6b9 | 2266 | |
225aabaf OG |
2267 | if (max_encap_size < ipv6_encap_size) { |
2268 | mlx5_core_warn(priv->mdev, "encap size %d too big, max supported is %d\n", | |
2269 | ipv6_encap_size, max_encap_size); | |
2270 | return -EOPNOTSUPP; | |
2271 | } | |
ce99f6b9 | 2272 | |
225aabaf | 2273 | encap_header = kzalloc(ipv6_encap_size, GFP_KERNEL); |
ce99f6b9 OG |
2274 | if (!encap_header) |
2275 | return -ENOMEM; | |
2276 | ||
2277 | switch (e->tunnel_type) { | |
2278 | case MLX5_HEADER_TYPE_VXLAN: | |
2279 | fl6.flowi6_proto = IPPROTO_UDP; | |
2280 | fl6.fl6_dport = tun_key->tp_dst; | |
2281 | break; | |
2282 | default: | |
2283 | err = -EOPNOTSUPP; | |
ace74321 | 2284 | goto free_encap; |
ce99f6b9 OG |
2285 | } |
2286 | ||
2287 | fl6.flowlabel = ip6_make_flowinfo(RT_TOS(tun_key->tos), tun_key->label); | |
2288 | fl6.daddr = tun_key->u.ipv6.dst; | |
2289 | fl6.saddr = tun_key->u.ipv6.src; | |
2290 | ||
1a8552bd | 2291 | err = mlx5e_route_lookup_ipv6(priv, mirred_dev, &out_dev, |
ce99f6b9 OG |
2292 | &fl6, &n, &ttl); |
2293 | if (err) | |
ace74321 | 2294 | goto free_encap; |
ce99f6b9 | 2295 | |
232c0013 HHZ |
2296 | /* used by mlx5e_detach_encap to lookup a neigh hash table |
2297 | * entry in the neigh hash table when a user deletes a rule | |
2298 | */ | |
2299 | e->m_neigh.dev = n->dev; | |
f6dfb4c3 | 2300 | e->m_neigh.family = n->ops->family; |
232c0013 HHZ |
2301 | memcpy(&e->m_neigh.dst_ip, n->primary_key, n->tbl->key_len); |
2302 | e->out_dev = out_dev; | |
2303 | ||
2304 | /* It's importent to add the neigh to the hash table before checking | |
2305 | * the neigh validity state. So if we'll get a notification, in case the | |
2306 | * neigh changes it's validity state, we would find the relevant neigh | |
2307 | * in the hash. | |
2308 | */ | |
2309 | err = mlx5e_rep_encap_entry_attach(netdev_priv(out_dev), e); | |
2310 | if (err) | |
ace74321 | 2311 | goto free_encap; |
232c0013 | 2312 | |
033354d5 HHZ |
2313 | read_lock_bh(&n->lock); |
2314 | nud_state = n->nud_state; | |
2315 | ether_addr_copy(e->h_dest, n->ha); | |
2316 | read_unlock_bh(&n->lock); | |
2317 | ||
ce99f6b9 OG |
2318 | switch (e->tunnel_type) { |
2319 | case MLX5_HEADER_TYPE_VXLAN: | |
1a8552bd | 2320 | gen_vxlan_header_ipv6(out_dev, encap_header, |
225aabaf OG |
2321 | ipv6_encap_size, e->h_dest, ttl, |
2322 | &fl6.daddr, | |
2323 | &fl6.saddr, tun_key->tp_dst, | |
2324 | tunnel_id_to_key32(tun_key->tun_id)); | |
ce99f6b9 OG |
2325 | break; |
2326 | default: | |
2327 | err = -EOPNOTSUPP; | |
232c0013 HHZ |
2328 | goto destroy_neigh_entry; |
2329 | } | |
2330 | ||
2331 | e->encap_size = ipv6_encap_size; | |
2332 | e->encap_header = encap_header; | |
2333 | ||
2334 | if (!(nud_state & NUD_VALID)) { | |
2335 | neigh_event_send(n, NULL); | |
27902f08 WY |
2336 | err = -EAGAIN; |
2337 | goto out; | |
ce99f6b9 OG |
2338 | } |
2339 | ||
2340 | err = mlx5_encap_alloc(priv->mdev, e->tunnel_type, | |
225aabaf | 2341 | ipv6_encap_size, encap_header, &e->encap_id); |
232c0013 HHZ |
2342 | if (err) |
2343 | goto destroy_neigh_entry; | |
2344 | ||
2345 | e->flags |= MLX5_ENCAP_ENTRY_VALID; | |
f6dfb4c3 | 2346 | mlx5e_rep_queue_neigh_stats_work(netdev_priv(out_dev)); |
232c0013 HHZ |
2347 | neigh_release(n); |
2348 | return err; | |
2349 | ||
2350 | destroy_neigh_entry: | |
2351 | mlx5e_rep_encap_entry_detach(netdev_priv(e->out_dev), e); | |
ace74321 | 2352 | free_encap: |
ce99f6b9 | 2353 | kfree(encap_header); |
ace74321 | 2354 | out: |
232c0013 HHZ |
2355 | if (n) |
2356 | neigh_release(n); | |
ce99f6b9 OG |
2357 | return err; |
2358 | } | |
2359 | ||
a54e20b4 HHZ |
2360 | static int mlx5e_attach_encap(struct mlx5e_priv *priv, |
2361 | struct ip_tunnel_info *tun_info, | |
2362 | struct net_device *mirred_dev, | |
45247bf2 OG |
2363 | struct net_device **encap_dev, |
2364 | struct mlx5e_tc_flow *flow) | |
a54e20b4 HHZ |
2365 | { |
2366 | struct mlx5_eswitch *esw = priv->mdev->priv.eswitch; | |
a4b97ab4 MB |
2367 | struct mlx5e_rep_priv *uplink_rpriv = mlx5_eswitch_get_uplink_priv(esw, |
2368 | REP_ETH); | |
5ed99fb4 | 2369 | struct net_device *up_dev = uplink_rpriv->netdev; |
a54e20b4 | 2370 | unsigned short family = ip_tunnel_info_af(tun_info); |
45247bf2 OG |
2371 | struct mlx5e_priv *up_priv = netdev_priv(up_dev); |
2372 | struct mlx5_esw_flow_attr *attr = flow->esw_attr; | |
a54e20b4 | 2373 | struct ip_tunnel_key *key = &tun_info->key; |
c1ae1152 | 2374 | struct mlx5e_encap_entry *e; |
45247bf2 | 2375 | int tunnel_type, err = 0; |
a54e20b4 HHZ |
2376 | uintptr_t hash_key; |
2377 | bool found = false; | |
a54e20b4 | 2378 | |
2fcd82e9 | 2379 | /* udp dst port must be set */ |
a54e20b4 | 2380 | if (!memchr_inv(&key->tp_dst, 0, sizeof(key->tp_dst))) |
2fcd82e9 | 2381 | goto vxlan_encap_offload_err; |
a54e20b4 | 2382 | |
cd377663 | 2383 | /* setting udp src port isn't supported */ |
2fcd82e9 OG |
2384 | if (memchr_inv(&key->tp_src, 0, sizeof(key->tp_src))) { |
2385 | vxlan_encap_offload_err: | |
2386 | netdev_warn(priv->netdev, | |
2387 | "must set udp dst port and not set udp src port\n"); | |
cd377663 | 2388 | return -EOPNOTSUPP; |
2fcd82e9 | 2389 | } |
cd377663 | 2390 | |
1ad9a00a | 2391 | if (mlx5e_vxlan_lookup_port(up_priv, be16_to_cpu(key->tp_dst)) && |
a54e20b4 | 2392 | MLX5_CAP_ESW(priv->mdev, vxlan_encap_decap)) { |
a54e20b4 HHZ |
2393 | tunnel_type = MLX5_HEADER_TYPE_VXLAN; |
2394 | } else { | |
2fcd82e9 OG |
2395 | netdev_warn(priv->netdev, |
2396 | "%d isn't an offloaded vxlan udp dport\n", be16_to_cpu(key->tp_dst)); | |
a54e20b4 HHZ |
2397 | return -EOPNOTSUPP; |
2398 | } | |
2399 | ||
76f7444d | 2400 | hash_key = hash_encap_info(key); |
a54e20b4 HHZ |
2401 | |
2402 | hash_for_each_possible_rcu(esw->offloads.encap_tbl, e, | |
2403 | encap_hlist, hash_key) { | |
76f7444d | 2404 | if (!cmp_encap_info(&e->tun_info.key, key)) { |
a54e20b4 HHZ |
2405 | found = true; |
2406 | break; | |
2407 | } | |
2408 | } | |
2409 | ||
b2812089 | 2410 | /* must verify if encap is valid or not */ |
45247bf2 OG |
2411 | if (found) |
2412 | goto attach_flow; | |
a54e20b4 HHZ |
2413 | |
2414 | e = kzalloc(sizeof(*e), GFP_KERNEL); | |
2415 | if (!e) | |
2416 | return -ENOMEM; | |
2417 | ||
76f7444d | 2418 | e->tun_info = *tun_info; |
a54e20b4 HHZ |
2419 | e->tunnel_type = tunnel_type; |
2420 | INIT_LIST_HEAD(&e->flows); | |
2421 | ||
ce99f6b9 | 2422 | if (family == AF_INET) |
1a8552bd | 2423 | err = mlx5e_create_encap_header_ipv4(priv, mirred_dev, e); |
ce99f6b9 | 2424 | else if (family == AF_INET6) |
1a8552bd | 2425 | err = mlx5e_create_encap_header_ipv6(priv, mirred_dev, e); |
ce99f6b9 | 2426 | |
232c0013 | 2427 | if (err && err != -EAGAIN) |
a54e20b4 HHZ |
2428 | goto out_err; |
2429 | ||
a54e20b4 HHZ |
2430 | hash_add_rcu(esw->offloads.encap_tbl, &e->encap_hlist, hash_key); |
2431 | ||
45247bf2 OG |
2432 | attach_flow: |
2433 | list_add(&flow->encap, &e->flows); | |
2434 | *encap_dev = e->out_dev; | |
232c0013 HHZ |
2435 | if (e->flags & MLX5_ENCAP_ENTRY_VALID) |
2436 | attr->encap_id = e->encap_id; | |
b2812089 VB |
2437 | else |
2438 | err = -EAGAIN; | |
45247bf2 | 2439 | |
232c0013 | 2440 | return err; |
a54e20b4 HHZ |
2441 | |
2442 | out_err: | |
2443 | kfree(e); | |
2444 | return err; | |
2445 | } | |
2446 | ||
03a9d11e | 2447 | static int parse_tc_fdb_actions(struct mlx5e_priv *priv, struct tcf_exts *exts, |
d7e75a32 | 2448 | struct mlx5e_tc_flow_parse_attr *parse_attr, |
a54e20b4 | 2449 | struct mlx5e_tc_flow *flow) |
03a9d11e | 2450 | { |
ecf5bb79 | 2451 | struct mlx5_esw_flow_attr *attr = flow->esw_attr; |
1d447a39 | 2452 | struct mlx5e_rep_priv *rpriv = priv->ppriv; |
a54e20b4 | 2453 | struct ip_tunnel_info *info = NULL; |
03a9d11e | 2454 | const struct tc_action *a; |
22dc13c8 | 2455 | LIST_HEAD(actions); |
a54e20b4 | 2456 | bool encap = false; |
232c0013 | 2457 | int err = 0; |
03a9d11e | 2458 | |
3bcc0cec | 2459 | if (!tcf_exts_has_actions(exts)) |
03a9d11e OG |
2460 | return -EINVAL; |
2461 | ||
776b12b6 | 2462 | memset(attr, 0, sizeof(*attr)); |
1d447a39 | 2463 | attr->in_rep = rpriv->rep; |
03a9d11e | 2464 | |
22dc13c8 WC |
2465 | tcf_exts_to_list(exts, &actions); |
2466 | list_for_each_entry(a, &actions, list) { | |
03a9d11e | 2467 | if (is_tcf_gact_shot(a)) { |
8b32580d OG |
2468 | attr->action |= MLX5_FLOW_CONTEXT_ACTION_DROP | |
2469 | MLX5_FLOW_CONTEXT_ACTION_COUNT; | |
03a9d11e OG |
2470 | continue; |
2471 | } | |
2472 | ||
d7e75a32 OG |
2473 | if (is_tcf_pedit(a)) { |
2474 | err = parse_tc_pedit_action(priv, a, MLX5_FLOW_NAMESPACE_FDB, | |
2475 | parse_attr); | |
2476 | if (err) | |
2477 | return err; | |
2478 | ||
2479 | attr->action |= MLX5_FLOW_CONTEXT_ACTION_MOD_HDR; | |
2480 | continue; | |
2481 | } | |
2482 | ||
26c02749 OG |
2483 | if (is_tcf_csum(a)) { |
2484 | if (csum_offload_supported(priv, attr->action, | |
2485 | tcf_csum_update_flags(a))) | |
2486 | continue; | |
2487 | ||
2488 | return -EOPNOTSUPP; | |
2489 | } | |
2490 | ||
5724b8b5 | 2491 | if (is_tcf_mirred_egress_redirect(a)) { |
3c37745e | 2492 | struct net_device *out_dev; |
03a9d11e | 2493 | struct mlx5e_priv *out_priv; |
03a9d11e | 2494 | |
9f8a739e | 2495 | out_dev = tcf_mirred_dev(a); |
03a9d11e | 2496 | |
a54e20b4 HHZ |
2497 | if (switchdev_port_same_parent_id(priv->netdev, |
2498 | out_dev)) { | |
2499 | attr->action |= MLX5_FLOW_CONTEXT_ACTION_FWD_DEST | | |
2500 | MLX5_FLOW_CONTEXT_ACTION_COUNT; | |
2501 | out_priv = netdev_priv(out_dev); | |
1d447a39 SM |
2502 | rpriv = out_priv->ppriv; |
2503 | attr->out_rep = rpriv->rep; | |
a54e20b4 | 2504 | } else if (encap) { |
9f8a739e | 2505 | parse_attr->mirred_ifindex = out_dev->ifindex; |
3c37745e OG |
2506 | parse_attr->tun_info = *info; |
2507 | attr->parse_attr = parse_attr; | |
a54e20b4 HHZ |
2508 | attr->action |= MLX5_FLOW_CONTEXT_ACTION_ENCAP | |
2509 | MLX5_FLOW_CONTEXT_ACTION_FWD_DEST | | |
2510 | MLX5_FLOW_CONTEXT_ACTION_COUNT; | |
3c37745e | 2511 | /* attr->out_rep is resolved when we handle encap */ |
a54e20b4 | 2512 | } else { |
03a9d11e OG |
2513 | pr_err("devices %s %s not on same switch HW, can't offload forwarding\n", |
2514 | priv->netdev->name, out_dev->name); | |
2515 | return -EINVAL; | |
2516 | } | |
a54e20b4 HHZ |
2517 | continue; |
2518 | } | |
03a9d11e | 2519 | |
a54e20b4 HHZ |
2520 | if (is_tcf_tunnel_set(a)) { |
2521 | info = tcf_tunnel_info(a); | |
2522 | if (info) | |
2523 | encap = true; | |
2524 | else | |
2525 | return -EOPNOTSUPP; | |
03a9d11e OG |
2526 | continue; |
2527 | } | |
2528 | ||
8b32580d | 2529 | if (is_tcf_vlan(a)) { |
09c91ddf | 2530 | if (tcf_vlan_action(a) == TCA_VLAN_ACT_POP) { |
8b32580d | 2531 | attr->action |= MLX5_FLOW_CONTEXT_ACTION_VLAN_POP; |
09c91ddf | 2532 | } else if (tcf_vlan_action(a) == TCA_VLAN_ACT_PUSH) { |
8b32580d | 2533 | attr->action |= MLX5_FLOW_CONTEXT_ACTION_VLAN_PUSH; |
6acfbf38 OG |
2534 | attr->vlan_vid = tcf_vlan_push_vid(a); |
2535 | if (mlx5_eswitch_vlan_actions_supported(priv->mdev)) { | |
2536 | attr->vlan_prio = tcf_vlan_push_prio(a); | |
2537 | attr->vlan_proto = tcf_vlan_push_proto(a); | |
2538 | if (!attr->vlan_proto) | |
2539 | attr->vlan_proto = htons(ETH_P_8021Q); | |
2540 | } else if (tcf_vlan_push_proto(a) != htons(ETH_P_8021Q) || | |
2541 | tcf_vlan_push_prio(a)) { | |
2542 | return -EOPNOTSUPP; | |
2543 | } | |
09c91ddf OG |
2544 | } else { /* action is TCA_VLAN_ACT_MODIFY */ |
2545 | return -EOPNOTSUPP; | |
8b32580d OG |
2546 | } |
2547 | continue; | |
2548 | } | |
2549 | ||
bbd00f7e HHZ |
2550 | if (is_tcf_tunnel_release(a)) { |
2551 | attr->action |= MLX5_FLOW_CONTEXT_ACTION_DECAP; | |
2552 | continue; | |
2553 | } | |
2554 | ||
03a9d11e OG |
2555 | return -EINVAL; |
2556 | } | |
bdd66ac0 OG |
2557 | |
2558 | if (!actions_match_supported(priv, exts, parse_attr, flow)) | |
2559 | return -EOPNOTSUPP; | |
2560 | ||
232c0013 | 2561 | return err; |
03a9d11e OG |
2562 | } |
2563 | ||
5fd9fc4e | 2564 | int mlx5e_configure_flower(struct mlx5e_priv *priv, |
e3a2b7ed AV |
2565 | struct tc_cls_flower_offload *f) |
2566 | { | |
3bc4b7bf | 2567 | struct mlx5_eswitch *esw = priv->mdev->priv.eswitch; |
17091853 | 2568 | struct mlx5e_tc_flow_parse_attr *parse_attr; |
acff797c | 2569 | struct mlx5e_tc_table *tc = &priv->fs.tc; |
3bc4b7bf OG |
2570 | struct mlx5e_tc_flow *flow; |
2571 | int attr_size, err = 0; | |
65ba8fb7 | 2572 | u8 flow_flags = 0; |
e3a2b7ed | 2573 | |
65ba8fb7 OG |
2574 | if (esw && esw->mode == SRIOV_OFFLOADS) { |
2575 | flow_flags = MLX5E_TC_FLOW_ESWITCH; | |
2576 | attr_size = sizeof(struct mlx5_esw_flow_attr); | |
3bc4b7bf OG |
2577 | } else { |
2578 | flow_flags = MLX5E_TC_FLOW_NIC; | |
2579 | attr_size = sizeof(struct mlx5_nic_flow_attr); | |
65ba8fb7 | 2580 | } |
e3a2b7ed | 2581 | |
65ba8fb7 | 2582 | flow = kzalloc(sizeof(*flow) + attr_size, GFP_KERNEL); |
1b9a07ee | 2583 | parse_attr = kvzalloc(sizeof(*parse_attr), GFP_KERNEL); |
17091853 | 2584 | if (!parse_attr || !flow) { |
e3a2b7ed AV |
2585 | err = -ENOMEM; |
2586 | goto err_free; | |
2587 | } | |
2588 | ||
2589 | flow->cookie = f->cookie; | |
65ba8fb7 | 2590 | flow->flags = flow_flags; |
e3a2b7ed | 2591 | |
17091853 | 2592 | err = parse_cls_flower(priv, flow, &parse_attr->spec, f); |
e3a2b7ed AV |
2593 | if (err < 0) |
2594 | goto err_free; | |
2595 | ||
65ba8fb7 | 2596 | if (flow->flags & MLX5E_TC_FLOW_ESWITCH) { |
d7e75a32 | 2597 | err = parse_tc_fdb_actions(priv, f->exts, parse_attr, flow); |
adb4c123 | 2598 | if (err < 0) |
3c37745e | 2599 | goto err_free; |
aa0cbbae | 2600 | flow->rule = mlx5e_tc_add_fdb_flow(priv, parse_attr, flow); |
adb4c123 | 2601 | } else { |
aa0cbbae | 2602 | err = parse_tc_nic_actions(priv, f->exts, parse_attr, flow); |
adb4c123 OG |
2603 | if (err < 0) |
2604 | goto err_free; | |
aa0cbbae | 2605 | flow->rule = mlx5e_tc_add_nic_flow(priv, parse_attr, flow); |
adb4c123 | 2606 | } |
e3a2b7ed | 2607 | |
e3a2b7ed AV |
2608 | if (IS_ERR(flow->rule)) { |
2609 | err = PTR_ERR(flow->rule); | |
3c37745e OG |
2610 | if (err != -EAGAIN) |
2611 | goto err_free; | |
e3a2b7ed AV |
2612 | } |
2613 | ||
3c37745e OG |
2614 | if (err != -EAGAIN) |
2615 | flow->flags |= MLX5E_TC_FLOW_OFFLOADED; | |
2616 | ||
af1607c3 JL |
2617 | if (!(flow->flags & MLX5E_TC_FLOW_ESWITCH) || |
2618 | !(flow->esw_attr->action & MLX5_FLOW_CONTEXT_ACTION_ENCAP)) | |
2619 | kvfree(parse_attr); | |
2620 | ||
5c40348c OG |
2621 | err = rhashtable_insert_fast(&tc->ht, &flow->node, |
2622 | tc->ht_params); | |
af1607c3 JL |
2623 | if (err) { |
2624 | mlx5e_tc_del_flow(priv, flow); | |
2625 | kfree(flow); | |
2626 | } | |
5c40348c | 2627 | |
232c0013 | 2628 | return err; |
e3a2b7ed | 2629 | |
e3a2b7ed | 2630 | err_free: |
17091853 | 2631 | kvfree(parse_attr); |
232c0013 | 2632 | kfree(flow); |
e3a2b7ed AV |
2633 | return err; |
2634 | } | |
2635 | ||
2636 | int mlx5e_delete_flower(struct mlx5e_priv *priv, | |
2637 | struct tc_cls_flower_offload *f) | |
2638 | { | |
2639 | struct mlx5e_tc_flow *flow; | |
acff797c | 2640 | struct mlx5e_tc_table *tc = &priv->fs.tc; |
e3a2b7ed AV |
2641 | |
2642 | flow = rhashtable_lookup_fast(&tc->ht, &f->cookie, | |
2643 | tc->ht_params); | |
2644 | if (!flow) | |
2645 | return -EINVAL; | |
2646 | ||
2647 | rhashtable_remove_fast(&tc->ht, &flow->node, tc->ht_params); | |
2648 | ||
961e8979 | 2649 | mlx5e_tc_del_flow(priv, flow); |
e3a2b7ed AV |
2650 | |
2651 | kfree(flow); | |
2652 | ||
2653 | return 0; | |
2654 | } | |
2655 | ||
aad7e08d AV |
2656 | int mlx5e_stats_flower(struct mlx5e_priv *priv, |
2657 | struct tc_cls_flower_offload *f) | |
2658 | { | |
2659 | struct mlx5e_tc_table *tc = &priv->fs.tc; | |
2660 | struct mlx5e_tc_flow *flow; | |
aad7e08d AV |
2661 | struct mlx5_fc *counter; |
2662 | u64 bytes; | |
2663 | u64 packets; | |
2664 | u64 lastuse; | |
2665 | ||
2666 | flow = rhashtable_lookup_fast(&tc->ht, &f->cookie, | |
2667 | tc->ht_params); | |
2668 | if (!flow) | |
2669 | return -EINVAL; | |
2670 | ||
0b67a38f HHZ |
2671 | if (!(flow->flags & MLX5E_TC_FLOW_OFFLOADED)) |
2672 | return 0; | |
2673 | ||
aad7e08d AV |
2674 | counter = mlx5_flow_rule_counter(flow->rule); |
2675 | if (!counter) | |
2676 | return 0; | |
2677 | ||
2678 | mlx5_fc_query_cached(counter, &bytes, &packets, &lastuse); | |
2679 | ||
d897a638 | 2680 | tcf_exts_stats_update(f->exts, bytes, packets, lastuse); |
fed06ee8 | 2681 | |
aad7e08d AV |
2682 | return 0; |
2683 | } | |
2684 | ||
e8f887ac AV |
2685 | static const struct rhashtable_params mlx5e_tc_flow_ht_params = { |
2686 | .head_offset = offsetof(struct mlx5e_tc_flow, node), | |
2687 | .key_offset = offsetof(struct mlx5e_tc_flow, cookie), | |
2688 | .key_len = sizeof(((struct mlx5e_tc_flow *)0)->cookie), | |
2689 | .automatic_shrinking = true, | |
2690 | }; | |
2691 | ||
2692 | int mlx5e_tc_init(struct mlx5e_priv *priv) | |
2693 | { | |
acff797c | 2694 | struct mlx5e_tc_table *tc = &priv->fs.tc; |
e8f887ac | 2695 | |
11c9c548 | 2696 | hash_init(tc->mod_hdr_tbl); |
5c65c564 | 2697 | hash_init(tc->hairpin_tbl); |
11c9c548 | 2698 | |
e8f887ac AV |
2699 | tc->ht_params = mlx5e_tc_flow_ht_params; |
2700 | return rhashtable_init(&tc->ht, &tc->ht_params); | |
2701 | } | |
2702 | ||
2703 | static void _mlx5e_tc_del_flow(void *ptr, void *arg) | |
2704 | { | |
2705 | struct mlx5e_tc_flow *flow = ptr; | |
2706 | struct mlx5e_priv *priv = arg; | |
2707 | ||
961e8979 | 2708 | mlx5e_tc_del_flow(priv, flow); |
e8f887ac AV |
2709 | kfree(flow); |
2710 | } | |
2711 | ||
2712 | void mlx5e_tc_cleanup(struct mlx5e_priv *priv) | |
2713 | { | |
acff797c | 2714 | struct mlx5e_tc_table *tc = &priv->fs.tc; |
e8f887ac AV |
2715 | |
2716 | rhashtable_free_and_destroy(&tc->ht, _mlx5e_tc_del_flow, priv); | |
2717 | ||
acff797c MG |
2718 | if (!IS_ERR_OR_NULL(tc->t)) { |
2719 | mlx5_destroy_flow_table(tc->t); | |
2720 | tc->t = NULL; | |
e8f887ac AV |
2721 | } |
2722 | } |