[mirror_ubuntu-jammy-kernel.git] / drivers / net / ethernet / mellanox / mlx5 / core / eswitch.h

/*
 * Copyright (c) 2015, Mellanox Technologies, Ltd.  All rights reserved.
 *
 * This software is available to you under a choice of one of two
 * licenses.  You may choose to be licensed under the terms of the GNU
 * General Public License (GPL) Version 2, available from the file
 * COPYING in the main directory of this source tree, or the
 * OpenIB.org BSD license below:
 *
 *     Redistribution and use in source and binary forms, with or
 *     without modification, are permitted provided that the following
 *     conditions are met:
 *
 *      - Redistributions of source code must retain the above
 *        copyright notice, this list of conditions and the following
 *        disclaimer.
 *
 *      - Redistributions in binary form must reproduce the above
 *        copyright notice, this list of conditions and the following
 *        disclaimer in the documentation and/or other materials
 *        provided with the distribution.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
 * SOFTWARE.
 */

#ifndef __MLX5_ESWITCH_H__
#define __MLX5_ESWITCH_H__

#include <linux/if_ether.h>
#include <linux/if_link.h>
#include <net/devlink.h>
#include <net/ip_tunnels.h>
#include <linux/mlx5/device.h>

#define MLX5_MAX_UC_PER_VPORT(dev) \
	(1 << MLX5_CAP_GEN(dev, log_max_current_uc_list))

#define MLX5_MAX_MC_PER_VPORT(dev) \
	(1 << MLX5_CAP_GEN(dev, log_max_current_mc_list))

#define MLX5_L2_ADDR_HASH_SIZE (BIT(BITS_PER_BYTE))
#define MLX5_L2_ADDR_HASH(addr) (addr[5])

#define FDB_UPLINK_VPORT 0xffff

#define MLX5_MIN_BW_SHARE 1

#define MLX5_RATE_TO_BW_SHARE(rate, divider, limit) \
	min_t(u32, max_t(u32, (rate) / (divider), MLX5_MIN_BW_SHARE), limit)

/* L2 -mac address based- hash helpers */
struct l2addr_node {
	struct hlist_node hlist;
	u8                addr[ETH_ALEN];
};

#define for_each_l2hash_node(hn, tmp, hash, i) \
	for (i = 0; i < MLX5_L2_ADDR_HASH_SIZE; i++) \
		hlist_for_each_entry_safe(hn, tmp, &hash[i], hlist)

#define l2addr_hash_find(hash, mac, type) ({                \
	int ix = MLX5_L2_ADDR_HASH(mac);                    \
	bool found = false;                                 \
	type *ptr = NULL;                                   \
							    \
	hlist_for_each_entry(ptr, &hash[ix], node.hlist)    \
		if (ether_addr_equal(ptr->node.addr, mac)) {\
			found = true;                       \
			break;                              \
		}                                           \
	if (!found)                                         \
		ptr = NULL;                                 \
	ptr;                                                \
})

#define l2addr_hash_add(hash, mac, type, gfp) ({            \
	int ix = MLX5_L2_ADDR_HASH(mac);                    \
	type *ptr = NULL;                                   \
							    \
	ptr = kzalloc(sizeof(type), gfp);                   \
	if (ptr) {                                          \
		ether_addr_copy(ptr->node.addr, mac);       \
		hlist_add_head(&ptr->node.hlist, &hash[ix]);\
	}                                                   \
	ptr;                                                \
})

#define l2addr_hash_del(ptr) ({                             \
	hlist_del(&ptr->node.hlist);                        \
	kfree(ptr);                                         \
})

struct vport_ingress {
	struct mlx5_flow_table *acl;
	struct mlx5_flow_group *allow_untagged_spoofchk_grp;
	struct mlx5_flow_group *allow_spoofchk_only_grp;
	struct mlx5_flow_group *allow_untagged_only_grp;
	struct mlx5_flow_group *drop_grp;
	struct mlx5_flow_handle  *allow_rule;
	struct mlx5_flow_handle  *drop_rule;
};

struct vport_egress {
	struct mlx5_flow_table *acl;
	struct mlx5_flow_group *allowed_vlans_grp;
	struct mlx5_flow_group *drop_grp;
	struct mlx5_flow_handle  *allowed_vlan;
	struct mlx5_flow_handle  *drop_rule;
};

struct mlx5_vport_info {
	u8                      mac[ETH_ALEN];
	u16                     vlan;
	u8                      qos;
	u64                     node_guid;
	int                     link_state;
	u32                     min_rate;
	u32                     max_rate;
	bool                    spoofchk;
	bool                    trusted;
};

struct mlx5_vport {
	struct mlx5_core_dev    *dev;
	int                     vport;
	struct hlist_head       uc_list[MLX5_L2_ADDR_HASH_SIZE];
	struct hlist_head       mc_list[MLX5_L2_ADDR_HASH_SIZE];
	struct mlx5_flow_handle *promisc_rule;
	struct mlx5_flow_handle *allmulti_rule;
	struct work_struct      vport_change_handler;

	struct vport_ingress    ingress;
	struct vport_egress     egress;

	struct mlx5_vport_info  info;

	struct {
		bool            enabled;
		u32             esw_tsar_ix;
		u32             bw_share;
	} qos;

	bool                    enabled;
	u16                     enabled_events;
};

struct mlx5_l2_table {
	struct hlist_head l2_hash[MLX5_L2_ADDR_HASH_SIZE];
	u32                  size;
	unsigned long        *bitmap;
};

struct mlx5_eswitch_fdb {
	void *fdb;
	union {
		struct legacy_fdb {
			struct mlx5_flow_group *addr_grp;
			struct mlx5_flow_group *allmulti_grp;
			struct mlx5_flow_group *promisc_grp;
		} legacy;

		struct offloads_fdb {
			struct mlx5_flow_table *fdb;
			struct mlx5_flow_group *send_to_vport_grp;
			struct mlx5_flow_group *miss_grp;
			struct mlx5_flow_handle *miss_rule;
			int vlan_push_pop_refcount;
		} offloads;
	};
};

enum {
	SRIOV_NONE,
	SRIOV_LEGACY,
	SRIOV_OFFLOADS
};

struct mlx5_esw_sq {
	struct mlx5_flow_handle	*send_to_vport_rule;
	struct list_head	 list;
};

struct mlx5_eswitch_rep {
	int		       (*load)(struct mlx5_eswitch *esw,
				       struct mlx5_eswitch_rep *rep);
	void		       (*unload)(struct mlx5_eswitch *esw,
					 struct mlx5_eswitch_rep *rep);
	u16		       vport;
	u8		       hw_id[ETH_ALEN];
	struct net_device      *netdev;

	struct mlx5_flow_handle *vport_rx_rule;
	struct list_head       vport_sqs_list;
	u16		       vlan;
	u32		       vlan_refcount;
	bool		       valid;
};

struct mlx5_esw_offload {
	struct mlx5_flow_table *ft_offloads;
	struct mlx5_flow_group *vport_rx_group;
	struct mlx5_eswitch_rep *vport_reps;
	DECLARE_HASHTABLE(encap_tbl, 8);
	u8 inline_mode;
	u64 num_flows;
};

struct mlx5_eswitch {
	struct mlx5_core_dev    *dev;
	struct mlx5_l2_table    l2_table;
	struct mlx5_eswitch_fdb fdb_table;
	struct hlist_head       mc_table[MLX5_L2_ADDR_HASH_SIZE];
	struct workqueue_struct *work_queue;
	struct mlx5_vport       *vports;
	int                     total_vports;
	int                     enabled_vports;
	/* Synchronize between vport change events
	 * and async SRIOV admin state changes
	 */
	struct mutex            state_lock;
	struct esw_mc_addr      *mc_promisc;

	struct {
		bool            enabled;
		u32             root_tsar_id;
	} qos;

	struct mlx5_esw_offload offloads;
	int                     mode;
};

void esw_offloads_cleanup(struct mlx5_eswitch *esw, int nvports);
int esw_offloads_init(struct mlx5_eswitch *esw, int nvports);

/* E-Switch API */
int mlx5_eswitch_init(struct mlx5_core_dev *dev);
void mlx5_eswitch_cleanup(struct mlx5_eswitch *esw);
void mlx5_eswitch_attach(struct mlx5_eswitch *esw);
void mlx5_eswitch_detach(struct mlx5_eswitch *esw);
void mlx5_eswitch_vport_event(struct mlx5_eswitch *esw, struct mlx5_eqe *eqe);
int mlx5_eswitch_enable_sriov(struct mlx5_eswitch *esw, int nvfs, int mode);
void mlx5_eswitch_disable_sriov(struct mlx5_eswitch *esw);
int mlx5_eswitch_set_vport_mac(struct mlx5_eswitch *esw,
			       int vport, u8 mac[ETH_ALEN]);
int mlx5_eswitch_set_vport_state(struct mlx5_eswitch *esw,
				 int vport, int link_state);
int mlx5_eswitch_set_vport_vlan(struct mlx5_eswitch *esw,
				int vport, u16 vlan, u8 qos);
int mlx5_eswitch_set_vport_spoofchk(struct mlx5_eswitch *esw,
				    int vport, bool spoofchk);
int mlx5_eswitch_set_vport_trust(struct mlx5_eswitch *esw,
				 int vport_num, bool setting);
int mlx5_eswitch_set_vport_rate(struct mlx5_eswitch *esw, int vport,
				u32 max_rate, u32 min_rate);
int mlx5_eswitch_get_vport_config(struct mlx5_eswitch *esw,
				  int vport, struct ifla_vf_info *ivi);
int mlx5_eswitch_get_vport_stats(struct mlx5_eswitch *esw,
				 int vport,
				 struct ifla_vf_stats *vf_stats);

struct mlx5_flow_spec;
struct mlx5_esw_flow_attr;

struct mlx5_flow_handle *
mlx5_eswitch_add_offloaded_rule(struct mlx5_eswitch *esw,
				struct mlx5_flow_spec *spec,
				struct mlx5_esw_flow_attr *attr);
void
mlx5_eswitch_del_offloaded_rule(struct mlx5_eswitch *esw,
				struct mlx5_flow_handle *rule,
				struct mlx5_esw_flow_attr *attr);

struct mlx5_flow_handle *
mlx5_eswitch_create_vport_rx_rule(struct mlx5_eswitch *esw, int vport, u32 tirn);

enum {
	SET_VLAN_STRIP	= BIT(0),
	SET_VLAN_INSERT	= BIT(1)
};

#define MLX5_FLOW_CONTEXT_ACTION_VLAN_POP  0x4000
#define MLX5_FLOW_CONTEXT_ACTION_VLAN_PUSH 0x8000

struct mlx5_encap_entry {
	struct hlist_node encap_hlist;
	struct list_head flows;
	u32 encap_id;
	struct neighbour *n;
	struct ip_tunnel_info tun_info;
	unsigned char h_dest[ETH_ALEN];	/* destination eth addr	*/

	struct net_device *out_dev;
	int tunnel_type;
};

struct mlx5_esw_flow_attr {
	struct mlx5_eswitch_rep *in_rep;
	struct mlx5_eswitch_rep *out_rep;

	int	action;
	u16	vlan;
	bool	vlan_handled;
	struct mlx5_encap_entry *encap;
};

int mlx5_eswitch_sqs2vport_start(struct mlx5_eswitch *esw,
				 struct mlx5_eswitch_rep *rep,
				 u16 *sqns_array, int sqns_num);
void mlx5_eswitch_sqs2vport_stop(struct mlx5_eswitch *esw,
				 struct mlx5_eswitch_rep *rep);

int mlx5_devlink_eswitch_mode_set(struct devlink *devlink, u16 mode);
int mlx5_devlink_eswitch_mode_get(struct devlink *devlink, u16 *mode);
int mlx5_devlink_eswitch_inline_mode_set(struct devlink *devlink, u8 mode);
int mlx5_devlink_eswitch_inline_mode_get(struct devlink *devlink, u8 *mode);
int mlx5_eswitch_inline_mode_get(struct mlx5_eswitch *esw, int nvfs, u8 *mode);
void mlx5_eswitch_register_vport_rep(struct mlx5_eswitch *esw,
				     int vport_index,
				     struct mlx5_eswitch_rep *rep);
void mlx5_eswitch_unregister_vport_rep(struct mlx5_eswitch *esw,
				       int vport_index);
struct net_device *mlx5_eswitch_get_uplink_netdev(struct mlx5_eswitch *esw);

int mlx5_eswitch_add_vlan_action(struct mlx5_eswitch *esw,
				 struct mlx5_esw_flow_attr *attr);
int mlx5_eswitch_del_vlan_action(struct mlx5_eswitch *esw,
				 struct mlx5_esw_flow_attr *attr);
int __mlx5_eswitch_set_vport_vlan(struct mlx5_eswitch *esw,
				  int vport, u16 vlan, u8 qos, u8 set_flags);

#define MLX5_DEBUG_ESWITCH_MASK BIT(3)

#define esw_info(dev, format, ...)				\
	pr_info("(%s): E-Switch: " format, (dev)->priv.name, ##__VA_ARGS__)

#define esw_warn(dev, format, ...)				\
	pr_warn("(%s): E-Switch: " format, (dev)->priv.name, ##__VA_ARGS__)

#define esw_debug(dev, format, ...)				\
	mlx5_core_dbg_mask(dev, MLX5_DEBUG_ESWITCH_MASK, format, ##__VA_ARGS__)
#endif /* __MLX5_ESWITCH_H__ */
Commit	Line	Data
073bb189 SM	1	/*
	2	* Copyright (c) 2015, Mellanox Technologies, Ltd. All rights reserved.
	3	*
	4	* This software is available to you under a choice of one of two
	5	* licenses. You may choose to be licensed under the terms of the GNU
	6	* General Public License (GPL) Version 2, available from the file
	7	* COPYING in the main directory of this source tree, or the
	8	* OpenIB.org BSD license below:
	9	*
	10	* Redistribution and use in source and binary forms, with or
	11	* without modification, are permitted provided that the following
	12	* conditions are met:
	13	*
	14	* - Redistributions of source code must retain the above
	15	* copyright notice, this list of conditions and the following
	16	* disclaimer.
	17	*
	18	* - Redistributions in binary form must reproduce the above
	19	* copyright notice, this list of conditions and the following
	20	* disclaimer in the documentation and/or other materials
	21	* provided with the distribution.
	22	*
	23	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
	24	* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
	25	* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
	26	* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
	27	* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
	28	* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
	29	* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
	30	* SOFTWARE.
	31	*/
	32
	33	#ifndef __MLX5_ESWITCH_H__
	34	#define __MLX5_ESWITCH_H__
	35
77256579 SM	36	#include <linux/if_ether.h>
77256579 SM	37	#include <linux/if_link.h>
feae9087	38	#include <net/devlink.h>
76f7444d	39	#include <net/ip_tunnels.h>
073bb189 SM	40	#include <linux/mlx5/device.h>
	41
	42	#define MLX5_MAX_UC_PER_VPORT(dev) \
	43	(1 << MLX5_CAP_GEN(dev, log_max_current_uc_list))
	44
	45	#define MLX5_MAX_MC_PER_VPORT(dev) \
	46	(1 << MLX5_CAP_GEN(dev, log_max_current_mc_list))
	47
	48	#define MLX5_L2_ADDR_HASH_SIZE (BIT(BITS_PER_BYTE))
	49	#define MLX5_L2_ADDR_HASH(addr) (addr[5])
	50
cb67b832 HHZ	51	#define FDB_UPLINK_VPORT 0xffff
cb67b832 HHZ	52
c9497c98 MHY	53	#define MLX5_MIN_BW_SHARE 1
	54
	55	#define MLX5_RATE_TO_BW_SHARE(rate, divider, limit) \
	56	min_t(u32, max_t(u32, (rate) / (divider), MLX5_MIN_BW_SHARE), limit)
	57
073bb189 SM	58	/* L2 -mac address based- hash helpers */
	59	struct l2addr_node {
	60	struct hlist_node hlist;
	61	u8 addr[ETH_ALEN];
	62	};
	63
	64	#define for_each_l2hash_node(hn, tmp, hash, i) \
	65	for (i = 0; i < MLX5_L2_ADDR_HASH_SIZE; i++) \
	66	hlist_for_each_entry_safe(hn, tmp, &hash[i], hlist)
	67
	68	#define l2addr_hash_find(hash, mac, type) ({ \
	69	int ix = MLX5_L2_ADDR_HASH(mac); \
	70	bool found = false; \
	71	type *ptr = NULL; \
	72	\
	73	hlist_for_each_entry(ptr, &hash[ix], node.hlist) \
	74	if (ether_addr_equal(ptr->node.addr, mac)) {\
	75	found = true; \
	76	break; \
	77	} \
	78	if (!found) \
	79	ptr = NULL; \
	80	ptr; \
	81	})
	82
	83	#define l2addr_hash_add(hash, mac, type, gfp) ({ \
	84	int ix = MLX5_L2_ADDR_HASH(mac); \
	85	type *ptr = NULL; \
	86	\
	87	ptr = kzalloc(sizeof(type), gfp); \
	88	if (ptr) { \
	89	ether_addr_copy(ptr->node.addr, mac); \
	90	hlist_add_head(&ptr->node.hlist, &hash[ix]);\
	91	} \
	92	ptr; \
	93	})
	94
	95	#define l2addr_hash_del(ptr) ({ \
	96	hlist_del(&ptr->node.hlist); \
	97	kfree(ptr); \
	98	})
	99
5742df0f MHY	100	struct vport_ingress {
	101	struct mlx5_flow_table *acl;
	102	struct mlx5_flow_group *allow_untagged_spoofchk_grp;
	103	struct mlx5_flow_group *allow_spoofchk_only_grp;
	104	struct mlx5_flow_group *allow_untagged_only_grp;
	105	struct mlx5_flow_group *drop_grp;
74491de9 MB	106	struct mlx5_flow_handle *allow_rule;
74491de9 MB	107	struct mlx5_flow_handle *drop_rule;
5742df0f MHY	108	};
	109
	110	struct vport_egress {
	111	struct mlx5_flow_table *acl;
	112	struct mlx5_flow_group *allowed_vlans_grp;
	113	struct mlx5_flow_group *drop_grp;
74491de9 MB	114	struct mlx5_flow_handle *allowed_vlan;
74491de9 MB	115	struct mlx5_flow_handle *drop_rule;
5742df0f MHY	116	};
5742df0f MHY	117
1ab2068a MHY	118	struct mlx5_vport_info {
	119	u8 mac[ETH_ALEN];
	120	u16 vlan;
	121	u8 qos;
	122	u64 node_guid;
	123	int link_state;
c9497c98	124	u32 min_rate;
1bd27b11	125	u32 max_rate;
1ab2068a MHY	126	bool spoofchk;
	127	bool trusted;
	128	};
	129
073bb189 SM	130	struct mlx5_vport {
	131	struct mlx5_core_dev *dev;
	132	int vport;
	133	struct hlist_head uc_list[MLX5_L2_ADDR_HASH_SIZE];
81848731	134	struct hlist_head mc_list[MLX5_L2_ADDR_HASH_SIZE];
74491de9 MB	135	struct mlx5_flow_handle *promisc_rule;
74491de9 MB	136	struct mlx5_flow_handle *allmulti_rule;
073bb189 SM	137	struct work_struct vport_change_handler;
073bb189 SM	138
5742df0f MHY	139	struct vport_ingress ingress;
	140	struct vport_egress egress;
	141
1ab2068a MHY	142	struct mlx5_vport_info info;
1ab2068a MHY	143
1bd27b11 MHY	144	struct {
	145	bool enabled;
	146	u32 esw_tsar_ix;
c9497c98	147	u32 bw_share;
1bd27b11 MHY	148	} qos;
1bd27b11 MHY	149
073bb189	150	bool enabled;
81848731	151	u16 enabled_events;
073bb189 SM	152	};
	153
	154	struct mlx5_l2_table {
	155	struct hlist_head l2_hash[MLX5_L2_ADDR_HASH_SIZE];
	156	u32 size;
	157	unsigned long *bitmap;
	158	};
	159
81848731 SM	160	struct mlx5_eswitch_fdb {
81848731 SM	161	void *fdb;
6ab36e35 OG	162	union {
	163	struct legacy_fdb {
	164	struct mlx5_flow_group *addr_grp;
	165	struct mlx5_flow_group *allmulti_grp;
	166	struct mlx5_flow_group *promisc_grp;
	167	} legacy;
69697b6e OG	168
69697b6e OG	169	struct offloads_fdb {
1033665e	170	struct mlx5_flow_table *fdb;
69697b6e OG	171	struct mlx5_flow_group *send_to_vport_grp;
69697b6e OG	172	struct mlx5_flow_group *miss_grp;
74491de9	173	struct mlx5_flow_handle *miss_rule;
f5f82476	174	int vlan_push_pop_refcount;
69697b6e	175	} offloads;
6ab36e35 OG	176	};
	177	};
	178
	179	enum {
	180	SRIOV_NONE,
	181	SRIOV_LEGACY,
	182	SRIOV_OFFLOADS
81848731 SM	183	};
81848731 SM	184
cb67b832	185	struct mlx5_esw_sq {
74491de9	186	struct mlx5_flow_handle *send_to_vport_rule;
cb67b832 HHZ	187	struct list_head list;
cb67b832 HHZ	188	};
127ea380 HHZ	189
127ea380 HHZ	190	struct mlx5_eswitch_rep {
cb67b832 HHZ	191	int (load)(struct mlx5_eswitch esw,
	192	struct mlx5_eswitch_rep *rep);
	193	void (unload)(struct mlx5_eswitch esw,
	194	struct mlx5_eswitch_rep *rep);
127ea380	195	u16 vport;
bac9b6aa	196	u8 hw_id[ETH_ALEN];
726293f1	197	struct net_device *netdev;
bac9b6aa	198
74491de9	199	struct mlx5_flow_handle *vport_rx_rule;
cb67b832	200	struct list_head vport_sqs_list;
f5f82476 OG	201	u16 vlan;
f5f82476 OG	202	u32 vlan_refcount;
127ea380 HHZ	203	bool valid;
	204	};
	205
c116c6ee OG	206	struct mlx5_esw_offload {
c116c6ee OG	207	struct mlx5_flow_table *ft_offloads;
fed9ce22	208	struct mlx5_flow_group *vport_rx_group;
127ea380	209	struct mlx5_eswitch_rep *vport_reps;
a54e20b4	210	DECLARE_HASHTABLE(encap_tbl, 8);
bffaa916	211	u8 inline_mode;
375f51e2	212	u64 num_flows;
c116c6ee OG	213	};
c116c6ee OG	214
073bb189 SM	215	struct mlx5_eswitch {
	216	struct mlx5_core_dev *dev;
	217	struct mlx5_l2_table l2_table;
81848731 SM	218	struct mlx5_eswitch_fdb fdb_table;
81848731 SM	219	struct hlist_head mc_table[MLX5_L2_ADDR_HASH_SIZE];
073bb189 SM	220	struct workqueue_struct *work_queue;
	221	struct mlx5_vport *vports;
	222	int total_vports;
81848731	223	int enabled_vports;
dfcb1ed3 MHY	224	/* Synchronize between vport change events
	225	* and async SRIOV admin state changes
	226	*/
	227	struct mutex state_lock;
a35f71f2	228	struct esw_mc_addr *mc_promisc;
1bd27b11 MHY	229
	230	struct {
	231	bool enabled;
	232	u32 root_tsar_id;
	233	} qos;
	234
c116c6ee	235	struct mlx5_esw_offload offloads;
6ab36e35	236	int mode;
073bb189 SM	237	};
073bb189 SM	238
766a0e97 BX	239	void esw_offloads_cleanup(struct mlx5_eswitch *esw, int nvports);
	240	int esw_offloads_init(struct mlx5_eswitch *esw, int nvports);
	241
073bb189 SM	242	/* E-Switch API */
	243	int mlx5_eswitch_init(struct mlx5_core_dev *dev);
	244	void mlx5_eswitch_cleanup(struct mlx5_eswitch *esw);
62a9b90a MHY	245	void mlx5_eswitch_attach(struct mlx5_eswitch *esw);
62a9b90a MHY	246	void mlx5_eswitch_detach(struct mlx5_eswitch *esw);
073bb189	247	void mlx5_eswitch_vport_event(struct mlx5_eswitch esw, struct mlx5_eqe eqe);
6ab36e35	248	int mlx5_eswitch_enable_sriov(struct mlx5_eswitch *esw, int nvfs, int mode);
81848731	249	void mlx5_eswitch_disable_sriov(struct mlx5_eswitch *esw);
77256579 SM	250	int mlx5_eswitch_set_vport_mac(struct mlx5_eswitch *esw,
	251	int vport, u8 mac[ETH_ALEN]);
	252	int mlx5_eswitch_set_vport_state(struct mlx5_eswitch *esw,
	253	int vport, int link_state);
9e7ea352 SM	254	int mlx5_eswitch_set_vport_vlan(struct mlx5_eswitch *esw,
9e7ea352 SM	255	int vport, u16 vlan, u8 qos);
f942380c MHY	256	int mlx5_eswitch_set_vport_spoofchk(struct mlx5_eswitch *esw,
f942380c MHY	257	int vport, bool spoofchk);
1edc57e2 MHY	258	int mlx5_eswitch_set_vport_trust(struct mlx5_eswitch *esw,
1edc57e2 MHY	259	int vport_num, bool setting);
c9497c98 MHY	260	int mlx5_eswitch_set_vport_rate(struct mlx5_eswitch *esw, int vport,
c9497c98 MHY	261	u32 max_rate, u32 min_rate);
77256579 SM	262	int mlx5_eswitch_get_vport_config(struct mlx5_eswitch *esw,
77256579 SM	263	int vport, struct ifla_vf_info *ivi);
3b751a2a SM	264	int mlx5_eswitch_get_vport_stats(struct mlx5_eswitch *esw,
	265	int vport,
	266	struct ifla_vf_stats *vf_stats);
073bb189	267
3d80d1a2	268	struct mlx5_flow_spec;
776b12b6	269	struct mlx5_esw_flow_attr;
3d80d1a2	270
74491de9	271	struct mlx5_flow_handle *
3d80d1a2 OG	272	mlx5_eswitch_add_offloaded_rule(struct mlx5_eswitch *esw,
3d80d1a2 OG	273	struct mlx5_flow_spec *spec,
776b12b6	274	struct mlx5_esw_flow_attr *attr);
d85cdccb OG	275	void
	276	mlx5_eswitch_del_offloaded_rule(struct mlx5_eswitch *esw,
	277	struct mlx5_flow_handle *rule,
	278	struct mlx5_esw_flow_attr *attr);
	279
74491de9	280	struct mlx5_flow_handle *
fed9ce22 OG	281	mlx5_eswitch_create_vport_rx_rule(struct mlx5_eswitch *esw, int vport, u32 tirn);
fed9ce22 OG	282
e33dfe31 OG	283	enum {
	284	SET_VLAN_STRIP = BIT(0),
	285	SET_VLAN_INSERT = BIT(1)
	286	};
	287
2a69cb9f OG	288	#define MLX5_FLOW_CONTEXT_ACTION_VLAN_POP 0x4000
2a69cb9f OG	289	#define MLX5_FLOW_CONTEXT_ACTION_VLAN_PUSH 0x8000
f5f82476	290
a54e20b4 HHZ	291	struct mlx5_encap_entry {
	292	struct hlist_node encap_hlist;
	293	struct list_head flows;
	294	u32 encap_id;
	295	struct neighbour *n;
76f7444d	296	struct ip_tunnel_info tun_info;
a54e20b4 HHZ	297	unsigned char h_dest[ETH_ALEN]; /* destination eth addr */
	298
	299	struct net_device *out_dev;
	300	int tunnel_type;
	301	};
	302
776b12b6 OG	303	struct mlx5_esw_flow_attr {
	304	struct mlx5_eswitch_rep *in_rep;
	305	struct mlx5_eswitch_rep *out_rep;
	306
	307	int action;
f5f82476 OG	308	u16 vlan;
f5f82476 OG	309	bool vlan_handled;
a54e20b4	310	struct mlx5_encap_entry *encap;
776b12b6 OG	311	};
776b12b6 OG	312
cb67b832 HHZ	313	int mlx5_eswitch_sqs2vport_start(struct mlx5_eswitch *esw,
	314	struct mlx5_eswitch_rep *rep,
	315	u16 *sqns_array, int sqns_num);
	316	void mlx5_eswitch_sqs2vport_stop(struct mlx5_eswitch *esw,
	317	struct mlx5_eswitch_rep *rep);
	318
feae9087 OG	319	int mlx5_devlink_eswitch_mode_set(struct devlink *devlink, u16 mode);
feae9087 OG	320	int mlx5_devlink_eswitch_mode_get(struct devlink devlink, u16 mode);
bffaa916 RD	321	int mlx5_devlink_eswitch_inline_mode_set(struct devlink *devlink, u8 mode);
	322	int mlx5_devlink_eswitch_inline_mode_get(struct devlink devlink, u8 mode);
	323	int mlx5_eswitch_inline_mode_get(struct mlx5_eswitch esw, int nvfs, u8 mode);
127ea380	324	void mlx5_eswitch_register_vport_rep(struct mlx5_eswitch *esw,
9deb2241	325	int vport_index,
127ea380 HHZ	326	struct mlx5_eswitch_rep *rep);
127ea380 HHZ	327	void mlx5_eswitch_unregister_vport_rep(struct mlx5_eswitch *esw,
9deb2241	328	int vport_index);
726293f1	329	struct net_device mlx5_eswitch_get_uplink_netdev(struct mlx5_eswitch esw);
feae9087	330
f5f82476 OG	331	int mlx5_eswitch_add_vlan_action(struct mlx5_eswitch *esw,
	332	struct mlx5_esw_flow_attr *attr);
	333	int mlx5_eswitch_del_vlan_action(struct mlx5_eswitch *esw,
	334	struct mlx5_esw_flow_attr *attr);
	335	int __mlx5_eswitch_set_vport_vlan(struct mlx5_eswitch *esw,
	336	int vport, u16 vlan, u8 qos, u8 set_flags);
	337
69697b6e OG	338	#define MLX5_DEBUG_ESWITCH_MASK BIT(3)
	339
	340	#define esw_info(dev, format, ...) \
	341	pr_info("(%s): E-Switch: " format, (dev)->priv.name, ##__VA_ARGS__)
	342
	343	#define esw_warn(dev, format, ...) \
	344	pr_warn("(%s): E-Switch: " format, (dev)->priv.name, ##__VA_ARGS__)
	345
	346	#define esw_debug(dev, format, ...) \
	347	mlx5_core_dbg_mask(dev, MLX5_DEBUG_ESWITCH_MASK, format, ##__VA_ARGS__)
073bb189	348	#endif /* __MLX5_ESWITCH_H__ */