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[mirror_ubuntu-bionic-kernel.git] / drivers / net / ethernet / micrel / ks8851.c
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3396c782 1/* drivers/net/ethernet/micrel/ks8851.c
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2 *
3 * Copyright 2009 Simtec Electronics
4 * http://www.simtec.co.uk/
5 * Ben Dooks <ben@simtec.co.uk>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11
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12#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
13
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14#define DEBUG
15
a6b7a407 16#include <linux/interrupt.h>
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17#include <linux/module.h>
18#include <linux/kernel.h>
19#include <linux/netdevice.h>
20#include <linux/etherdevice.h>
21#include <linux/ethtool.h>
22#include <linux/cache.h>
23#include <linux/crc32.h>
24#include <linux/mii.h>
51b7b1c3 25#include <linux/eeprom_93cx6.h>
ebf4ad95 26#include <linux/regulator/consumer.h>
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27
28#include <linux/spi/spi.h>
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SB
29#include <linux/gpio.h>
30#include <linux/of_gpio.h>
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31
32#include "ks8851.h"
33
34/**
35 * struct ks8851_rxctrl - KS8851 driver rx control
36 * @mchash: Multicast hash-table data.
37 * @rxcr1: KS_RXCR1 register setting
38 * @rxcr2: KS_RXCR2 register setting
39 *
40 * Representation of the settings needs to control the receive filtering
41 * such as the multicast hash-filter and the receive register settings. This
42 * is used to make the job of working out if the receive settings change and
43 * then issuing the new settings to the worker that will send the necessary
44 * commands.
45 */
46struct ks8851_rxctrl {
47 u16 mchash[4];
48 u16 rxcr1;
49 u16 rxcr2;
50};
51
52/**
53 * union ks8851_tx_hdr - tx header data
54 * @txb: The header as bytes
55 * @txw: The header as 16bit, little-endian words
56 *
57 * A dual representation of the tx header data to allow
58 * access to individual bytes, and to allow 16bit accesses
59 * with 16bit alignment.
60 */
61union ks8851_tx_hdr {
62 u8 txb[6];
63 __le16 txw[3];
64};
65
66/**
67 * struct ks8851_net - KS8851 driver private data
68 * @netdev: The network device we're bound to
69 * @spidev: The spi device we're bound to.
70 * @lock: Lock to ensure that the device is not accessed when busy.
71 * @statelock: Lock on this structure for tx list.
72 * @mii: The MII state information for the mii calls.
73 * @rxctrl: RX settings for @rxctrl_work.
74 * @tx_work: Work queue for tx packets
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75 * @rxctrl_work: Work queue for updating RX mode and multicast lists
76 * @txq: Queue of packets for transmission.
77 * @spi_msg1: pre-setup SPI transfer with one message, @spi_xfer1.
78 * @spi_msg2: pre-setup SPI transfer with two messages, @spi_xfer2.
79 * @txh: Space for generating packet TX header in DMA-able data
80 * @rxd: Space for receiving SPI data, in DMA-able space.
81 * @txd: Space for transmitting SPI data, in DMA-able space.
82 * @msg_enable: The message flags controlling driver output (see ethtool).
83 * @fid: Incrementing frame id tag.
84 * @rc_ier: Cached copy of KS_IER.
7d997466 85 * @rc_ccr: Cached copy of KS_CCR.
3ba81f3e 86 * @rc_rxqcr: Cached copy of KS_RXQCR.
51b7b1c3 87 * @eeprom: 93CX6 EEPROM state for accessing on-board EEPROM.
ebf4ad95 88 * @vdd_reg: Optional regulator supplying the chip
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89 * @vdd_io: Optional digital power supply for IO
90 * @gpio: Optional reset_n gpio
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91 *
92 * The @lock ensures that the chip is protected when certain operations are
93 * in progress. When the read or write packet transfer is in progress, most
94 * of the chip registers are not ccessible until the transfer is finished and
95 * the DMA has been de-asserted.
96 *
97 * The @statelock is used to protect information in the structure which may
98 * need to be accessed via several sources, such as the network driver layer
99 * or one of the work queues.
100 *
101 * We align the buffers we may use for rx/tx to ensure that if the SPI driver
102 * wants to DMA map them, it will not have any problems with data the driver
103 * modifies.
104 */
105struct ks8851_net {
106 struct net_device *netdev;
107 struct spi_device *spidev;
108 struct mutex lock;
109 spinlock_t statelock;
110
111 union ks8851_tx_hdr txh ____cacheline_aligned;
112 u8 rxd[8];
113 u8 txd[8];
114
115 u32 msg_enable ____cacheline_aligned;
116 u16 tx_space;
117 u8 fid;
118
119 u16 rc_ier;
120 u16 rc_rxqcr;
7d997466 121 u16 rc_ccr;
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122
123 struct mii_if_info mii;
124 struct ks8851_rxctrl rxctrl;
125
126 struct work_struct tx_work;
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127 struct work_struct rxctrl_work;
128
129 struct sk_buff_head txq;
130
131 struct spi_message spi_msg1;
132 struct spi_message spi_msg2;
133 struct spi_transfer spi_xfer1;
134 struct spi_transfer spi_xfer2[2];
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135
136 struct eeprom_93cx6 eeprom;
ebf4ad95 137 struct regulator *vdd_reg;
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138 struct regulator *vdd_io;
139 int gpio;
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140};
141
142static int msg_enable;
143
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144/* shift for byte-enable data */
145#define BYTE_EN(_x) ((_x) << 2)
146
147/* turn register number and byte-enable mask into data for start of packet */
148#define MK_OP(_byteen, _reg) (BYTE_EN(_byteen) | (_reg) << (8+2) | (_reg) >> 6)
149
150/* SPI register read/write calls.
151 *
152 * All these calls issue SPI transactions to access the chip's registers. They
153 * all require that the necessary lock is held to prevent accesses when the
25985edc 154 * chip is busy transferring packet data (RX/TX FIFO accesses).
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155 */
156
157/**
158 * ks8851_wrreg16 - write 16bit register value to chip
159 * @ks: The chip state
160 * @reg: The register address
161 * @val: The value to write
162 *
163 * Issue a write to put the value @val into the register specified in @reg.
164 */
165static void ks8851_wrreg16(struct ks8851_net *ks, unsigned reg, unsigned val)
166{
167 struct spi_transfer *xfer = &ks->spi_xfer1;
168 struct spi_message *msg = &ks->spi_msg1;
169 __le16 txb[2];
170 int ret;
171
172 txb[0] = cpu_to_le16(MK_OP(reg & 2 ? 0xC : 0x03, reg) | KS_SPIOP_WR);
173 txb[1] = cpu_to_le16(val);
174
175 xfer->tx_buf = txb;
176 xfer->rx_buf = NULL;
177 xfer->len = 4;
178
179 ret = spi_sync(ks->spidev, msg);
180 if (ret < 0)
0dc7d2b3 181 netdev_err(ks->netdev, "spi_sync() failed\n");
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182}
183
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184/**
185 * ks8851_wrreg8 - write 8bit register value to chip
186 * @ks: The chip state
187 * @reg: The register address
188 * @val: The value to write
189 *
190 * Issue a write to put the value @val into the register specified in @reg.
191 */
192static void ks8851_wrreg8(struct ks8851_net *ks, unsigned reg, unsigned val)
193{
194 struct spi_transfer *xfer = &ks->spi_xfer1;
195 struct spi_message *msg = &ks->spi_msg1;
196 __le16 txb[2];
197 int ret;
198 int bit;
199
200 bit = 1 << (reg & 3);
201
202 txb[0] = cpu_to_le16(MK_OP(bit, reg) | KS_SPIOP_WR);
203 txb[1] = val;
204
205 xfer->tx_buf = txb;
206 xfer->rx_buf = NULL;
207 xfer->len = 3;
208
209 ret = spi_sync(ks->spidev, msg);
210 if (ret < 0)
0dc7d2b3 211 netdev_err(ks->netdev, "spi_sync() failed\n");
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212}
213
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214/**
215 * ks8851_rdreg - issue read register command and return the data
216 * @ks: The device state
217 * @op: The register address and byte enables in message format.
218 * @rxb: The RX buffer to return the result into
219 * @rxl: The length of data expected.
220 *
221 * This is the low level read call that issues the necessary spi message(s)
222 * to read data from the register specified in @op.
223 */
224static void ks8851_rdreg(struct ks8851_net *ks, unsigned op,
225 u8 *rxb, unsigned rxl)
226{
227 struct spi_transfer *xfer;
228 struct spi_message *msg;
229 __le16 *txb = (__le16 *)ks->txd;
230 u8 *trx = ks->rxd;
231 int ret;
232
233 txb[0] = cpu_to_le16(op | KS_SPIOP_RD);
234
9efd3831 235 if (ks->spidev->master->flags & SPI_MASTER_HALF_DUPLEX) {
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236 msg = &ks->spi_msg2;
237 xfer = ks->spi_xfer2;
238
239 xfer->tx_buf = txb;
240 xfer->rx_buf = NULL;
241 xfer->len = 2;
242
243 xfer++;
244 xfer->tx_buf = NULL;
245 xfer->rx_buf = trx;
246 xfer->len = rxl;
9efd3831
SS
247 } else {
248 msg = &ks->spi_msg1;
249 xfer = &ks->spi_xfer1;
250
251 xfer->tx_buf = txb;
252 xfer->rx_buf = trx;
253 xfer->len = rxl + 2;
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254 }
255
256 ret = spi_sync(ks->spidev, msg);
257 if (ret < 0)
0dc7d2b3 258 netdev_err(ks->netdev, "read: spi_sync() failed\n");
9efd3831 259 else if (ks->spidev->master->flags & SPI_MASTER_HALF_DUPLEX)
3ba81f3e 260 memcpy(rxb, trx, rxl);
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SS
261 else
262 memcpy(rxb, trx + 2, rxl);
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263}
264
265/**
266 * ks8851_rdreg8 - read 8 bit register from device
267 * @ks: The chip information
268 * @reg: The register address
269 *
270 * Read a 8bit register from the chip, returning the result
271*/
272static unsigned ks8851_rdreg8(struct ks8851_net *ks, unsigned reg)
273{
274 u8 rxb[1];
275
276 ks8851_rdreg(ks, MK_OP(1 << (reg & 3), reg), rxb, 1);
277 return rxb[0];
278}
279
280/**
281 * ks8851_rdreg16 - read 16 bit register from device
282 * @ks: The chip information
283 * @reg: The register address
284 *
285 * Read a 16bit register from the chip, returning the result
286*/
287static unsigned ks8851_rdreg16(struct ks8851_net *ks, unsigned reg)
288{
289 __le16 rx = 0;
290
291 ks8851_rdreg(ks, MK_OP(reg & 2 ? 0xC : 0x3, reg), (u8 *)&rx, 2);
292 return le16_to_cpu(rx);
293}
294
295/**
296 * ks8851_rdreg32 - read 32 bit register from device
297 * @ks: The chip information
298 * @reg: The register address
299 *
300 * Read a 32bit register from the chip.
301 *
302 * Note, this read requires the address be aligned to 4 bytes.
303*/
304static unsigned ks8851_rdreg32(struct ks8851_net *ks, unsigned reg)
305{
306 __le32 rx = 0;
307
308 WARN_ON(reg & 3);
309
310 ks8851_rdreg(ks, MK_OP(0xf, reg), (u8 *)&rx, 4);
311 return le32_to_cpu(rx);
312}
313
314/**
315 * ks8851_soft_reset - issue one of the soft reset to the device
316 * @ks: The device state.
317 * @op: The bit(s) to set in the GRR
318 *
319 * Issue the relevant soft-reset command to the device's GRR register
320 * specified by @op.
321 *
322 * Note, the delays are in there as a caution to ensure that the reset
323 * has time to take effect and then complete. Since the datasheet does
324 * not currently specify the exact sequence, we have chosen something
325 * that seems to work with our device.
326 */
327static void ks8851_soft_reset(struct ks8851_net *ks, unsigned op)
328{
329 ks8851_wrreg16(ks, KS_GRR, op);
330 mdelay(1); /* wait a short time to effect reset */
331 ks8851_wrreg16(ks, KS_GRR, 0);
332 mdelay(1); /* wait for condition to clear */
333}
334
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TH
335/**
336 * ks8851_set_powermode - set power mode of the device
337 * @ks: The device state
338 * @pwrmode: The power mode value to write to KS_PMECR.
339 *
340 * Change the power mode of the chip.
341 */
342static void ks8851_set_powermode(struct ks8851_net *ks, unsigned pwrmode)
343{
344 unsigned pmecr;
345
346 netif_dbg(ks, hw, ks->netdev, "setting power mode %d\n", pwrmode);
347
348 pmecr = ks8851_rdreg16(ks, KS_PMECR);
349 pmecr &= ~PMECR_PM_MASK;
350 pmecr |= pwrmode;
351
352 ks8851_wrreg16(ks, KS_PMECR, pmecr);
353}
354
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355/**
356 * ks8851_write_mac_addr - write mac address to device registers
357 * @dev: The network device
358 *
359 * Update the KS8851 MAC address registers from the address in @dev.
360 *
361 * This call assumes that the chip is not running, so there is no need to
362 * shutdown the RXQ process whilst setting this.
363*/
364static int ks8851_write_mac_addr(struct net_device *dev)
365{
366 struct ks8851_net *ks = netdev_priv(dev);
160d0fad 367 int i;
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BD
368
369 mutex_lock(&ks->lock);
370
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TH
371 /*
372 * Wake up chip in case it was powered off when stopped; otherwise,
373 * the first write to the MAC address does not take effect.
374 */
375 ks8851_set_powermode(ks, PMECR_PM_NORMAL);
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BD
376 for (i = 0; i < ETH_ALEN; i++)
377 ks8851_wrreg8(ks, KS_MAR(i), dev->dev_addr[i]);
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TH
378 if (!netif_running(dev))
379 ks8851_set_powermode(ks, PMECR_PM_SOFTDOWN);
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380
381 mutex_unlock(&ks->lock);
382
383 return 0;
384}
385
a9a8de21
BD
386/**
387 * ks8851_read_mac_addr - read mac address from device registers
388 * @dev: The network device
389 *
390 * Update our copy of the KS8851 MAC address from the registers of @dev.
391*/
392static void ks8851_read_mac_addr(struct net_device *dev)
393{
394 struct ks8851_net *ks = netdev_priv(dev);
395 int i;
396
397 mutex_lock(&ks->lock);
398
399 for (i = 0; i < ETH_ALEN; i++)
400 dev->dev_addr[i] = ks8851_rdreg8(ks, KS_MAR(i));
401
402 mutex_unlock(&ks->lock);
403}
404
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BD
405/**
406 * ks8851_init_mac - initialise the mac address
407 * @ks: The device structure
408 *
409 * Get or create the initial mac address for the device and then set that
a9a8de21 410 * into the station address register. If there is an EEPROM present, then
7efd26d0 411 * we try that. If no valid mac address is found we use eth_random_addr()
3ba81f3e 412 * to create a new one.
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BD
413 */
414static void ks8851_init_mac(struct ks8851_net *ks)
415{
416 struct net_device *dev = ks->netdev;
417
a9a8de21
BD
418 /* first, try reading what we've got already */
419 if (ks->rc_ccr & CCR_EEPROM) {
420 ks8851_read_mac_addr(dev);
421 if (is_valid_ether_addr(dev->dev_addr))
422 return;
423
424 netdev_err(ks->netdev, "invalid mac address read %pM\n",
425 dev->dev_addr);
426 }
427
7ce5d222 428 eth_hw_addr_random(dev);
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429 ks8851_write_mac_addr(dev);
430}
431
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BD
432/**
433 * ks8851_rdfifo - read data from the receive fifo
434 * @ks: The device state.
435 * @buff: The buffer address
436 * @len: The length of the data to read
437 *
9ddc5b6f 438 * Issue an RXQ FIFO read command and read the @len amount of data from
3ba81f3e
BD
439 * the FIFO into the buffer specified by @buff.
440 */
441static void ks8851_rdfifo(struct ks8851_net *ks, u8 *buff, unsigned len)
442{
443 struct spi_transfer *xfer = ks->spi_xfer2;
444 struct spi_message *msg = &ks->spi_msg2;
445 u8 txb[1];
446 int ret;
447
0dc7d2b3
JP
448 netif_dbg(ks, rx_status, ks->netdev,
449 "%s: %d@%p\n", __func__, len, buff);
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BD
450
451 /* set the operation we're issuing */
452 txb[0] = KS_SPIOP_RXFIFO;
453
454 xfer->tx_buf = txb;
455 xfer->rx_buf = NULL;
456 xfer->len = 1;
457
458 xfer++;
459 xfer->rx_buf = buff;
460 xfer->tx_buf = NULL;
461 xfer->len = len;
462
463 ret = spi_sync(ks->spidev, msg);
464 if (ret < 0)
0dc7d2b3 465 netdev_err(ks->netdev, "%s: spi_sync() failed\n", __func__);
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BD
466}
467
468/**
469 * ks8851_dbg_dumpkkt - dump initial packet contents to debug
470 * @ks: The device state
471 * @rxpkt: The data for the received packet
472 *
473 * Dump the initial data from the packet to dev_dbg().
474*/
475static void ks8851_dbg_dumpkkt(struct ks8851_net *ks, u8 *rxpkt)
476{
0dc7d2b3
JP
477 netdev_dbg(ks->netdev,
478 "pkt %02x%02x%02x%02x %02x%02x%02x%02x %02x%02x%02x%02x\n",
479 rxpkt[4], rxpkt[5], rxpkt[6], rxpkt[7],
480 rxpkt[8], rxpkt[9], rxpkt[10], rxpkt[11],
481 rxpkt[12], rxpkt[13], rxpkt[14], rxpkt[15]);
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BD
482}
483
484/**
485 * ks8851_rx_pkts - receive packets from the host
486 * @ks: The device information.
487 *
488 * This is called from the IRQ work queue when the system detects that there
489 * are packets in the receive queue. Find out how many packets there are and
490 * read them from the FIFO.
491 */
492static void ks8851_rx_pkts(struct ks8851_net *ks)
493{
494 struct sk_buff *skb;
495 unsigned rxfc;
496 unsigned rxlen;
497 unsigned rxstat;
498 u32 rxh;
499 u8 *rxpkt;
500
501 rxfc = ks8851_rdreg8(ks, KS_RXFC);
502
0dc7d2b3
JP
503 netif_dbg(ks, rx_status, ks->netdev,
504 "%s: %d packets\n", __func__, rxfc);
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BD
505
506 /* Currently we're issuing a read per packet, but we could possibly
507 * improve the code by issuing a single read, getting the receive
508 * header, allocating the packet and then reading the packet data
509 * out in one go.
510 *
511 * This form of operation would require us to hold the SPI bus'
512 * chipselect low during the entie transaction to avoid any
25985edc 513 * reset to the data stream coming from the chip.
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BD
514 */
515
516 for (; rxfc != 0; rxfc--) {
517 rxh = ks8851_rdreg32(ks, KS_RXFHSR);
518 rxstat = rxh & 0xffff;
14bc435e 519 rxlen = (rxh >> 16) & 0xfff;
3ba81f3e 520
0dc7d2b3
JP
521 netif_dbg(ks, rx_status, ks->netdev,
522 "rx: stat 0x%04x, len 0x%04x\n", rxstat, rxlen);
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BD
523
524 /* the length of the packet includes the 32bit CRC */
525
526 /* set dma read address */
527 ks8851_wrreg16(ks, KS_RXFDPR, RXFDPR_RXFPAI | 0x00);
528
529 /* start the packet dma process, and set auto-dequeue rx */
530 ks8851_wrreg16(ks, KS_RXQCR,
531 ks->rc_rxqcr | RXQCR_SDA | RXQCR_ADRFE);
532
972c40b5
ED
533 if (rxlen > 4) {
534 unsigned int rxalign;
535
536 rxlen -= 4;
537 rxalign = ALIGN(rxlen, 4);
538 skb = netdev_alloc_skb_ip_align(ks->netdev, rxalign);
539 if (skb) {
3ba81f3e 540
972c40b5
ED
541 /* 4 bytes of status header + 4 bytes of
542 * garbage: we put them before ethernet
543 * header, so that they are copied,
544 * but ignored.
545 */
3ba81f3e 546
972c40b5 547 rxpkt = skb_put(skb, rxlen) - 8;
3ba81f3e 548
972c40b5 549 ks8851_rdfifo(ks, rxpkt, rxalign + 8);
3ba81f3e 550
972c40b5
ED
551 if (netif_msg_pktdata(ks))
552 ks8851_dbg_dumpkkt(ks, rxpkt);
3ba81f3e 553
972c40b5 554 skb->protocol = eth_type_trans(skb, ks->netdev);
fbcf88b8 555 netif_rx_ni(skb);
3ba81f3e 556
972c40b5
ED
557 ks->netdev->stats.rx_packets++;
558 ks->netdev->stats.rx_bytes += rxlen;
559 }
3ba81f3e
BD
560 }
561
562 ks8851_wrreg16(ks, KS_RXQCR, ks->rc_rxqcr);
563 }
564}
565
566/**
656a05c8
FB
567 * ks8851_irq - IRQ handler for dealing with interrupt requests
568 * @irq: IRQ number
569 * @_ks: cookie
3ba81f3e 570 *
656a05c8
FB
571 * This handler is invoked when the IRQ line asserts to find out what happened.
572 * As we cannot allow ourselves to sleep in HARDIRQ context, this handler runs
573 * in thread context.
3ba81f3e
BD
574 *
575 * Read the interrupt status, work out what needs to be done and then clear
576 * any of the interrupts that are not needed.
577 */
656a05c8 578static irqreturn_t ks8851_irq(int irq, void *_ks)
3ba81f3e 579{
656a05c8 580 struct ks8851_net *ks = _ks;
3ba81f3e
BD
581 unsigned status;
582 unsigned handled = 0;
583
584 mutex_lock(&ks->lock);
585
586 status = ks8851_rdreg16(ks, KS_ISR);
587
0dc7d2b3
JP
588 netif_dbg(ks, intr, ks->netdev,
589 "%s: status 0x%04x\n", __func__, status);
3ba81f3e 590
062e55e3 591 if (status & IRQ_LCI)
3ba81f3e 592 handled |= IRQ_LCI;
3ba81f3e
BD
593
594 if (status & IRQ_LDI) {
595 u16 pmecr = ks8851_rdreg16(ks, KS_PMECR);
596 pmecr &= ~PMECR_WKEVT_MASK;
597 ks8851_wrreg16(ks, KS_PMECR, pmecr | PMECR_WKEVT_LINK);
598
599 handled |= IRQ_LDI;
600 }
601
602 if (status & IRQ_RXPSI)
603 handled |= IRQ_RXPSI;
604
605 if (status & IRQ_TXI) {
606 handled |= IRQ_TXI;
607
608 /* no lock here, tx queue should have been stopped */
609
610 /* update our idea of how much tx space is available to the
611 * system */
612 ks->tx_space = ks8851_rdreg16(ks, KS_TXMIR);
613
0dc7d2b3
JP
614 netif_dbg(ks, intr, ks->netdev,
615 "%s: txspace %d\n", __func__, ks->tx_space);
3ba81f3e
BD
616 }
617
618 if (status & IRQ_RXI)
619 handled |= IRQ_RXI;
620
621 if (status & IRQ_SPIBEI) {
622 dev_err(&ks->spidev->dev, "%s: spi bus error\n", __func__);
623 handled |= IRQ_SPIBEI;
624 }
625
626 ks8851_wrreg16(ks, KS_ISR, handled);
627
628 if (status & IRQ_RXI) {
629 /* the datasheet says to disable the rx interrupt during
630 * packet read-out, however we're masking the interrupt
631 * from the device so do not bother masking just the RX
632 * from the device. */
633
634 ks8851_rx_pkts(ks);
635 }
636
637 /* if something stopped the rx process, probably due to wanting
638 * to change the rx settings, then do something about restarting
639 * it. */
640 if (status & IRQ_RXPSI) {
641 struct ks8851_rxctrl *rxc = &ks->rxctrl;
642
643 /* update the multicast hash table */
644 ks8851_wrreg16(ks, KS_MAHTR0, rxc->mchash[0]);
645 ks8851_wrreg16(ks, KS_MAHTR1, rxc->mchash[1]);
646 ks8851_wrreg16(ks, KS_MAHTR2, rxc->mchash[2]);
647 ks8851_wrreg16(ks, KS_MAHTR3, rxc->mchash[3]);
648
649 ks8851_wrreg16(ks, KS_RXCR2, rxc->rxcr2);
650 ks8851_wrreg16(ks, KS_RXCR1, rxc->rxcr1);
651 }
652
653 mutex_unlock(&ks->lock);
654
062e55e3
SB
655 if (status & IRQ_LCI)
656 mii_check_link(&ks->mii);
657
3ba81f3e
BD
658 if (status & IRQ_TXI)
659 netif_wake_queue(ks->netdev);
660
656a05c8 661 return IRQ_HANDLED;
3ba81f3e
BD
662}
663
664/**
665 * calc_txlen - calculate size of message to send packet
25985edc 666 * @len: Length of data
3ba81f3e
BD
667 *
668 * Returns the size of the TXFIFO message needed to send
669 * this packet.
670 */
671static inline unsigned calc_txlen(unsigned len)
672{
673 return ALIGN(len + 4, 4);
674}
675
676/**
677 * ks8851_wrpkt - write packet to TX FIFO
678 * @ks: The device state.
679 * @txp: The sk_buff to transmit.
680 * @irq: IRQ on completion of the packet.
681 *
682 * Send the @txp to the chip. This means creating the relevant packet header
683 * specifying the length of the packet and the other information the chip
684 * needs, such as IRQ on completion. Send the header and the packet data to
685 * the device.
686 */
687static void ks8851_wrpkt(struct ks8851_net *ks, struct sk_buff *txp, bool irq)
688{
689 struct spi_transfer *xfer = ks->spi_xfer2;
690 struct spi_message *msg = &ks->spi_msg2;
691 unsigned fid = 0;
692 int ret;
693
0dc7d2b3
JP
694 netif_dbg(ks, tx_queued, ks->netdev, "%s: skb %p, %d@%p, irq %d\n",
695 __func__, txp, txp->len, txp->data, irq);
3ba81f3e
BD
696
697 fid = ks->fid++;
698 fid &= TXFR_TXFID_MASK;
699
700 if (irq)
701 fid |= TXFR_TXIC; /* irq on completion */
702
703 /* start header at txb[1] to align txw entries */
704 ks->txh.txb[1] = KS_SPIOP_TXFIFO;
705 ks->txh.txw[1] = cpu_to_le16(fid);
706 ks->txh.txw[2] = cpu_to_le16(txp->len);
707
708 xfer->tx_buf = &ks->txh.txb[1];
709 xfer->rx_buf = NULL;
710 xfer->len = 5;
711
712 xfer++;
713 xfer->tx_buf = txp->data;
714 xfer->rx_buf = NULL;
715 xfer->len = ALIGN(txp->len, 4);
716
717 ret = spi_sync(ks->spidev, msg);
718 if (ret < 0)
0dc7d2b3 719 netdev_err(ks->netdev, "%s: spi_sync() failed\n", __func__);
3ba81f3e
BD
720}
721
722/**
723 * ks8851_done_tx - update and then free skbuff after transmitting
724 * @ks: The device state
725 * @txb: The buffer transmitted
726 */
727static void ks8851_done_tx(struct ks8851_net *ks, struct sk_buff *txb)
728{
729 struct net_device *dev = ks->netdev;
730
731 dev->stats.tx_bytes += txb->len;
732 dev->stats.tx_packets++;
733
734 dev_kfree_skb(txb);
735}
736
737/**
738 * ks8851_tx_work - process tx packet(s)
739 * @work: The work strucutre what was scheduled.
740 *
741 * This is called when a number of packets have been scheduled for
742 * transmission and need to be sent to the device.
743 */
744static void ks8851_tx_work(struct work_struct *work)
745{
746 struct ks8851_net *ks = container_of(work, struct ks8851_net, tx_work);
747 struct sk_buff *txb;
3320eae5 748 bool last = skb_queue_empty(&ks->txq);
3ba81f3e
BD
749
750 mutex_lock(&ks->lock);
751
752 while (!last) {
753 txb = skb_dequeue(&ks->txq);
754 last = skb_queue_empty(&ks->txq);
755
761172fb
AA
756 if (txb != NULL) {
757 ks8851_wrreg16(ks, KS_RXQCR, ks->rc_rxqcr | RXQCR_SDA);
758 ks8851_wrpkt(ks, txb, last);
759 ks8851_wrreg16(ks, KS_RXQCR, ks->rc_rxqcr);
760 ks8851_wrreg16(ks, KS_TXQCR, TXQCR_METFE);
3ba81f3e 761
761172fb
AA
762 ks8851_done_tx(ks, txb);
763 }
3ba81f3e
BD
764 }
765
766 mutex_unlock(&ks->lock);
3ba81f3e
BD
767}
768
769/**
770 * ks8851_net_open - open network device
771 * @dev: The network device being opened.
772 *
773 * Called when the network device is marked active, such as a user executing
774 * 'ifconfig up' on the device.
775 */
776static int ks8851_net_open(struct net_device *dev)
777{
778 struct ks8851_net *ks = netdev_priv(dev);
779
780 /* lock the card, even if we may not actually be doing anything
781 * else at the moment */
782 mutex_lock(&ks->lock);
783
0dc7d2b3 784 netif_dbg(ks, ifup, ks->netdev, "opening\n");
3ba81f3e
BD
785
786 /* bring chip out of any power saving mode it was in */
787 ks8851_set_powermode(ks, PMECR_PM_NORMAL);
788
789 /* issue a soft reset to the RX/TX QMU to put it into a known
790 * state. */
791 ks8851_soft_reset(ks, GRR_QMU);
792
793 /* setup transmission parameters */
794
795 ks8851_wrreg16(ks, KS_TXCR, (TXCR_TXE | /* enable transmit process */
796 TXCR_TXPE | /* pad to min length */
797 TXCR_TXCRC | /* add CRC */
798 TXCR_TXFCE)); /* enable flow control */
799
800 /* auto-increment tx data, reset tx pointer */
801 ks8851_wrreg16(ks, KS_TXFDPR, TXFDPR_TXFPAI);
802
803 /* setup receiver control */
804
805 ks8851_wrreg16(ks, KS_RXCR1, (RXCR1_RXPAFMA | /* from mac filter */
806 RXCR1_RXFCE | /* enable flow control */
807 RXCR1_RXBE | /* broadcast enable */
808 RXCR1_RXUE | /* unicast enable */
809 RXCR1_RXE)); /* enable rx block */
810
811 /* transfer entire frames out in one go */
812 ks8851_wrreg16(ks, KS_RXCR2, RXCR2_SRDBL_FRAME);
813
814 /* set receive counter timeouts */
815 ks8851_wrreg16(ks, KS_RXDTTR, 1000); /* 1ms after first frame to IRQ */
816 ks8851_wrreg16(ks, KS_RXDBCTR, 4096); /* >4Kbytes in buffer to IRQ */
817 ks8851_wrreg16(ks, KS_RXFCTR, 10); /* 10 frames to IRQ */
818
819 ks->rc_rxqcr = (RXQCR_RXFCTE | /* IRQ on frame count exceeded */
820 RXQCR_RXDBCTE | /* IRQ on byte count exceeded */
821 RXQCR_RXDTTE); /* IRQ on time exceeded */
822
823 ks8851_wrreg16(ks, KS_RXQCR, ks->rc_rxqcr);
824
825 /* clear then enable interrupts */
826
827#define STD_IRQ (IRQ_LCI | /* Link Change */ \
828 IRQ_TXI | /* TX done */ \
829 IRQ_RXI | /* RX done */ \
830 IRQ_SPIBEI | /* SPI bus error */ \
831 IRQ_TXPSI | /* TX process stop */ \
832 IRQ_RXPSI) /* RX process stop */
833
834 ks->rc_ier = STD_IRQ;
835 ks8851_wrreg16(ks, KS_ISR, STD_IRQ);
836 ks8851_wrreg16(ks, KS_IER, STD_IRQ);
837
838 netif_start_queue(ks->netdev);
839
0dc7d2b3 840 netif_dbg(ks, ifup, ks->netdev, "network device up\n");
3ba81f3e
BD
841
842 mutex_unlock(&ks->lock);
843 return 0;
844}
845
846/**
847 * ks8851_net_stop - close network device
848 * @dev: The device being closed.
849 *
850 * Called to close down a network device which has been active. Cancell any
851 * work, shutdown the RX and TX process and then place the chip into a low
852 * power state whilst it is not being used.
853 */
854static int ks8851_net_stop(struct net_device *dev)
855{
856 struct ks8851_net *ks = netdev_priv(dev);
857
0dc7d2b3 858 netif_info(ks, ifdown, dev, "shutting down\n");
3ba81f3e
BD
859
860 netif_stop_queue(dev);
861
862 mutex_lock(&ks->lock);
c5a99937
SB
863 /* turn off the IRQs and ack any outstanding */
864 ks8851_wrreg16(ks, KS_IER, 0x0000);
865 ks8851_wrreg16(ks, KS_ISR, 0xffff);
866 mutex_unlock(&ks->lock);
3ba81f3e
BD
867
868 /* stop any outstanding work */
3ba81f3e
BD
869 flush_work(&ks->tx_work);
870 flush_work(&ks->rxctrl_work);
871
c5a99937 872 mutex_lock(&ks->lock);
3ba81f3e
BD
873 /* shutdown RX process */
874 ks8851_wrreg16(ks, KS_RXCR1, 0x0000);
875
876 /* shutdown TX process */
877 ks8851_wrreg16(ks, KS_TXCR, 0x0000);
878
879 /* set powermode to soft power down to save power */
880 ks8851_set_powermode(ks, PMECR_PM_SOFTDOWN);
c5a99937 881 mutex_unlock(&ks->lock);
3ba81f3e
BD
882
883 /* ensure any queued tx buffers are dumped */
884 while (!skb_queue_empty(&ks->txq)) {
885 struct sk_buff *txb = skb_dequeue(&ks->txq);
886
0dc7d2b3
JP
887 netif_dbg(ks, ifdown, ks->netdev,
888 "%s: freeing txb %p\n", __func__, txb);
3ba81f3e
BD
889
890 dev_kfree_skb(txb);
891 }
892
3ba81f3e
BD
893 return 0;
894}
895
896/**
897 * ks8851_start_xmit - transmit packet
898 * @skb: The buffer to transmit
899 * @dev: The device used to transmit the packet.
900 *
901 * Called by the network layer to transmit the @skb. Queue the packet for
902 * the device and schedule the necessary work to transmit the packet when
903 * it is free.
904 *
905 * We do this to firstly avoid sleeping with the network device locked,
906 * and secondly so we can round up more than one packet to transmit which
907 * means we can try and avoid generating too many transmit done interrupts.
908 */
61357325
SH
909static netdev_tx_t ks8851_start_xmit(struct sk_buff *skb,
910 struct net_device *dev)
3ba81f3e
BD
911{
912 struct ks8851_net *ks = netdev_priv(dev);
913 unsigned needed = calc_txlen(skb->len);
61357325 914 netdev_tx_t ret = NETDEV_TX_OK;
3ba81f3e 915
0dc7d2b3
JP
916 netif_dbg(ks, tx_queued, ks->netdev,
917 "%s: skb %p, %d@%p\n", __func__, skb, skb->len, skb->data);
3ba81f3e
BD
918
919 spin_lock(&ks->statelock);
920
921 if (needed > ks->tx_space) {
922 netif_stop_queue(dev);
923 ret = NETDEV_TX_BUSY;
924 } else {
925 ks->tx_space -= needed;
926 skb_queue_tail(&ks->txq, skb);
927 }
928
929 spin_unlock(&ks->statelock);
930 schedule_work(&ks->tx_work);
931
932 return ret;
933}
934
935/**
936 * ks8851_rxctrl_work - work handler to change rx mode
937 * @work: The work structure this belongs to.
938 *
939 * Lock the device and issue the necessary changes to the receive mode from
940 * the network device layer. This is done so that we can do this without
941 * having to sleep whilst holding the network device lock.
942 *
943 * Since the recommendation from Micrel is that the RXQ is shutdown whilst the
944 * receive parameters are programmed, we issue a write to disable the RXQ and
945 * then wait for the interrupt handler to be triggered once the RXQ shutdown is
946 * complete. The interrupt handler then writes the new values into the chip.
947 */
948static void ks8851_rxctrl_work(struct work_struct *work)
949{
950 struct ks8851_net *ks = container_of(work, struct ks8851_net, rxctrl_work);
951
952 mutex_lock(&ks->lock);
953
954 /* need to shutdown RXQ before modifying filter parameters */
955 ks8851_wrreg16(ks, KS_RXCR1, 0x00);
956
957 mutex_unlock(&ks->lock);
958}
959
960static void ks8851_set_rx_mode(struct net_device *dev)
961{
962 struct ks8851_net *ks = netdev_priv(dev);
963 struct ks8851_rxctrl rxctrl;
964
965 memset(&rxctrl, 0, sizeof(rxctrl));
966
967 if (dev->flags & IFF_PROMISC) {
968 /* interface to receive everything */
969
970 rxctrl.rxcr1 = RXCR1_RXAE | RXCR1_RXINVF;
971 } else if (dev->flags & IFF_ALLMULTI) {
972 /* accept all multicast packets */
973
974 rxctrl.rxcr1 = (RXCR1_RXME | RXCR1_RXAE |
975 RXCR1_RXPAFMA | RXCR1_RXMAFMA);
4cd24eaf 976 } else if (dev->flags & IFF_MULTICAST && !netdev_mc_empty(dev)) {
22bedad3 977 struct netdev_hw_addr *ha;
3ba81f3e 978 u32 crc;
3ba81f3e
BD
979
980 /* accept some multicast */
981
22bedad3
JP
982 netdev_for_each_mc_addr(ha, dev) {
983 crc = ether_crc(ETH_ALEN, ha->addr);
3ba81f3e
BD
984 crc >>= (32 - 6); /* get top six bits */
985
986 rxctrl.mchash[crc >> 4] |= (1 << (crc & 0xf));
3ba81f3e
BD
987 }
988
b6a71bfa 989 rxctrl.rxcr1 = RXCR1_RXME | RXCR1_RXPAFMA;
3ba81f3e
BD
990 } else {
991 /* just accept broadcast / unicast */
992 rxctrl.rxcr1 = RXCR1_RXPAFMA;
993 }
994
995 rxctrl.rxcr1 |= (RXCR1_RXUE | /* unicast enable */
996 RXCR1_RXBE | /* broadcast enable */
997 RXCR1_RXE | /* RX process enable */
998 RXCR1_RXFCE); /* enable flow control */
999
1000 rxctrl.rxcr2 |= RXCR2_SRDBL_FRAME;
1001
1002 /* schedule work to do the actual set of the data if needed */
1003
1004 spin_lock(&ks->statelock);
1005
1006 if (memcmp(&rxctrl, &ks->rxctrl, sizeof(rxctrl)) != 0) {
1007 memcpy(&ks->rxctrl, &rxctrl, sizeof(ks->rxctrl));
1008 schedule_work(&ks->rxctrl_work);
1009 }
1010
1011 spin_unlock(&ks->statelock);
1012}
1013
1014static int ks8851_set_mac_address(struct net_device *dev, void *addr)
1015{
1016 struct sockaddr *sa = addr;
1017
1018 if (netif_running(dev))
1019 return -EBUSY;
1020
1021 if (!is_valid_ether_addr(sa->sa_data))
1022 return -EADDRNOTAVAIL;
1023
1024 memcpy(dev->dev_addr, sa->sa_data, ETH_ALEN);
1025 return ks8851_write_mac_addr(dev);
1026}
1027
1028static int ks8851_net_ioctl(struct net_device *dev, struct ifreq *req, int cmd)
1029{
1030 struct ks8851_net *ks = netdev_priv(dev);
1031
1032 if (!netif_running(dev))
1033 return -EINVAL;
1034
1035 return generic_mii_ioctl(&ks->mii, if_mii(req), cmd, NULL);
1036}
1037
1038static const struct net_device_ops ks8851_netdev_ops = {
1039 .ndo_open = ks8851_net_open,
1040 .ndo_stop = ks8851_net_stop,
1041 .ndo_do_ioctl = ks8851_net_ioctl,
1042 .ndo_start_xmit = ks8851_start_xmit,
1043 .ndo_set_mac_address = ks8851_set_mac_address,
1044 .ndo_set_rx_mode = ks8851_set_rx_mode,
3ba81f3e
BD
1045 .ndo_validate_addr = eth_validate_addr,
1046};
1047
1048/* ethtool support */
1049
1050static void ks8851_get_drvinfo(struct net_device *dev,
1051 struct ethtool_drvinfo *di)
1052{
1053 strlcpy(di->driver, "KS8851", sizeof(di->driver));
1054 strlcpy(di->version, "1.00", sizeof(di->version));
1055 strlcpy(di->bus_info, dev_name(dev->dev.parent), sizeof(di->bus_info));
1056}
1057
1058static u32 ks8851_get_msglevel(struct net_device *dev)
1059{
1060 struct ks8851_net *ks = netdev_priv(dev);
1061 return ks->msg_enable;
1062}
1063
1064static void ks8851_set_msglevel(struct net_device *dev, u32 to)
1065{
1066 struct ks8851_net *ks = netdev_priv(dev);
1067 ks->msg_enable = to;
1068}
1069
98f2b092
PR
1070static int ks8851_get_link_ksettings(struct net_device *dev,
1071 struct ethtool_link_ksettings *cmd)
3ba81f3e
BD
1072{
1073 struct ks8851_net *ks = netdev_priv(dev);
82c01a84 1074
1075 mii_ethtool_get_link_ksettings(&ks->mii, cmd);
1076
1077 return 0;
3ba81f3e
BD
1078}
1079
98f2b092
PR
1080static int ks8851_set_link_ksettings(struct net_device *dev,
1081 const struct ethtool_link_ksettings *cmd)
3ba81f3e
BD
1082{
1083 struct ks8851_net *ks = netdev_priv(dev);
98f2b092 1084 return mii_ethtool_set_link_ksettings(&ks->mii, cmd);
3ba81f3e
BD
1085}
1086
1087static u32 ks8851_get_link(struct net_device *dev)
1088{
1089 struct ks8851_net *ks = netdev_priv(dev);
1090 return mii_link_ok(&ks->mii);
1091}
1092
1093static int ks8851_nway_reset(struct net_device *dev)
1094{
1095 struct ks8851_net *ks = netdev_priv(dev);
1096 return mii_nway_restart(&ks->mii);
1097}
1098
51b7b1c3 1099/* EEPROM support */
a84afa40 1100
51b7b1c3 1101static void ks8851_eeprom_regread(struct eeprom_93cx6 *ee)
a84afa40 1102{
51b7b1c3
BD
1103 struct ks8851_net *ks = ee->data;
1104 unsigned val;
a84afa40 1105
51b7b1c3 1106 val = ks8851_rdreg16(ks, KS_EEPCR);
a84afa40 1107
51b7b1c3
BD
1108 ee->reg_data_out = (val & EEPCR_EESB) ? 1 : 0;
1109 ee->reg_data_clock = (val & EEPCR_EESCK) ? 1 : 0;
1110 ee->reg_chip_select = (val & EEPCR_EECS) ? 1 : 0;
1111}
a84afa40 1112
51b7b1c3
BD
1113static void ks8851_eeprom_regwrite(struct eeprom_93cx6 *ee)
1114{
1115 struct ks8851_net *ks = ee->data;
1116 unsigned val = EEPCR_EESA; /* default - eeprom access on */
1117
1118 if (ee->drive_data)
1119 val |= EEPCR_EESRWA;
1120 if (ee->reg_data_in)
1121 val |= EEPCR_EEDO;
1122 if (ee->reg_data_clock)
1123 val |= EEPCR_EESCK;
1124 if (ee->reg_chip_select)
1125 val |= EEPCR_EECS;
1126
1127 ks8851_wrreg16(ks, KS_EEPCR, val);
1128}
a84afa40 1129
51b7b1c3
BD
1130/**
1131 * ks8851_eeprom_claim - claim device EEPROM and activate the interface
1132 * @ks: The network device state.
1133 *
1134 * Check for the presence of an EEPROM, and then activate software access
1135 * to the device.
1136 */
1137static int ks8851_eeprom_claim(struct ks8851_net *ks)
1138{
1139 if (!(ks->rc_ccr & CCR_EEPROM))
1140 return -ENOENT;
a84afa40 1141
51b7b1c3 1142 mutex_lock(&ks->lock);
a84afa40 1143
51b7b1c3
BD
1144 /* start with clock low, cs high */
1145 ks8851_wrreg16(ks, KS_EEPCR, EEPCR_EESA | EEPCR_EECS);
1146 return 0;
1147}
a84afa40 1148
51b7b1c3
BD
1149/**
1150 * ks8851_eeprom_release - release the EEPROM interface
1151 * @ks: The device state
1152 *
1153 * Release the software access to the device EEPROM
1154 */
1155static void ks8851_eeprom_release(struct ks8851_net *ks)
1156{
1157 unsigned val = ks8851_rdreg16(ks, KS_EEPCR);
a84afa40 1158
51b7b1c3
BD
1159 ks8851_wrreg16(ks, KS_EEPCR, val & ~EEPCR_EESA);
1160 mutex_unlock(&ks->lock);
a84afa40
SJ
1161}
1162
51b7b1c3
BD
1163#define KS_EEPROM_MAGIC (0x00008851)
1164
a84afa40 1165static int ks8851_set_eeprom(struct net_device *dev,
51b7b1c3 1166 struct ethtool_eeprom *ee, u8 *data)
a84afa40
SJ
1167{
1168 struct ks8851_net *ks = netdev_priv(dev);
51b7b1c3
BD
1169 int offset = ee->offset;
1170 int len = ee->len;
1171 u16 tmp;
1172
1173 /* currently only support byte writing */
1174 if (len != 1)
a84afa40
SJ
1175 return -EINVAL;
1176
51b7b1c3
BD
1177 if (ee->magic != KS_EEPROM_MAGIC)
1178 return -EINVAL;
a84afa40 1179
51b7b1c3
BD
1180 if (ks8851_eeprom_claim(ks))
1181 return -ENOENT;
1182
1183 eeprom_93cx6_wren(&ks->eeprom, true);
1184
1185 /* ethtool currently only supports writing bytes, which means
1186 * we have to read/modify/write our 16bit EEPROMs */
a84afa40 1187
51b7b1c3 1188 eeprom_93cx6_read(&ks->eeprom, offset/2, &tmp);
a84afa40 1189
51b7b1c3
BD
1190 if (offset & 1) {
1191 tmp &= 0xff;
1192 tmp |= *data << 8;
1193 } else {
1194 tmp &= 0xff00;
1195 tmp |= *data;
a84afa40 1196 }
a84afa40 1197
51b7b1c3
BD
1198 eeprom_93cx6_write(&ks->eeprom, offset/2, tmp);
1199 eeprom_93cx6_wren(&ks->eeprom, false);
1200
1201 ks8851_eeprom_release(ks);
1202
1203 return 0;
1204}
a84afa40 1205
51b7b1c3
BD
1206static int ks8851_get_eeprom(struct net_device *dev,
1207 struct ethtool_eeprom *ee, u8 *data)
1208{
1209 struct ks8851_net *ks = netdev_priv(dev);
1210 int offset = ee->offset;
1211 int len = ee->len;
a84afa40 1212
51b7b1c3
BD
1213 /* must be 2 byte aligned */
1214 if (len & 1 || offset & 1)
1215 return -EINVAL;
a84afa40 1216
51b7b1c3
BD
1217 if (ks8851_eeprom_claim(ks))
1218 return -ENOENT;
a84afa40 1219
51b7b1c3 1220 ee->magic = KS_EEPROM_MAGIC;
a84afa40 1221
51b7b1c3
BD
1222 eeprom_93cx6_multiread(&ks->eeprom, offset/2, (__le16 *)data, len/2);
1223 ks8851_eeprom_release(ks);
a84afa40 1224
51b7b1c3
BD
1225 return 0;
1226}
a84afa40 1227
51b7b1c3
BD
1228static int ks8851_get_eeprom_len(struct net_device *dev)
1229{
1230 struct ks8851_net *ks = netdev_priv(dev);
1231
1232 /* currently, we assume it is an 93C46 attached, so return 128 */
1233 return ks->rc_ccr & CCR_EEPROM ? 128 : 0;
a84afa40
SJ
1234}
1235
3ba81f3e
BD
1236static const struct ethtool_ops ks8851_ethtool_ops = {
1237 .get_drvinfo = ks8851_get_drvinfo,
1238 .get_msglevel = ks8851_get_msglevel,
1239 .set_msglevel = ks8851_set_msglevel,
3ba81f3e
BD
1240 .get_link = ks8851_get_link,
1241 .nway_reset = ks8851_nway_reset,
a84afa40
SJ
1242 .get_eeprom_len = ks8851_get_eeprom_len,
1243 .get_eeprom = ks8851_get_eeprom,
1244 .set_eeprom = ks8851_set_eeprom,
98f2b092
PR
1245 .get_link_ksettings = ks8851_get_link_ksettings,
1246 .set_link_ksettings = ks8851_set_link_ksettings,
3ba81f3e
BD
1247};
1248
1249/* MII interface controls */
1250
1251/**
1252 * ks8851_phy_reg - convert MII register into a KS8851 register
1253 * @reg: MII register number.
1254 *
1255 * Return the KS8851 register number for the corresponding MII PHY register
1256 * if possible. Return zero if the MII register has no direct mapping to the
1257 * KS8851 register set.
1258 */
1259static int ks8851_phy_reg(int reg)
1260{
1261 switch (reg) {
1262 case MII_BMCR:
1263 return KS_P1MBCR;
1264 case MII_BMSR:
1265 return KS_P1MBSR;
1266 case MII_PHYSID1:
1267 return KS_PHY1ILR;
1268 case MII_PHYSID2:
1269 return KS_PHY1IHR;
1270 case MII_ADVERTISE:
1271 return KS_P1ANAR;
1272 case MII_LPA:
1273 return KS_P1ANLPR;
1274 }
1275
1276 return 0x0;
1277}
1278
1279/**
1280 * ks8851_phy_read - MII interface PHY register read.
1281 * @dev: The network device the PHY is on.
1282 * @phy_addr: Address of PHY (ignored as we only have one)
1283 * @reg: The register to read.
1284 *
1285 * This call reads data from the PHY register specified in @reg. Since the
25985edc 1286 * device does not support all the MII registers, the non-existent values
3ba81f3e
BD
1287 * are always returned as zero.
1288 *
1289 * We return zero for unsupported registers as the MII code does not check
1290 * the value returned for any error status, and simply returns it to the
1291 * caller. The mii-tool that the driver was tested with takes any -ve error
1292 * as real PHY capabilities, thus displaying incorrect data to the user.
1293 */
1294static int ks8851_phy_read(struct net_device *dev, int phy_addr, int reg)
1295{
1296 struct ks8851_net *ks = netdev_priv(dev);
1297 int ksreg;
1298 int result;
1299
1300 ksreg = ks8851_phy_reg(reg);
1301 if (!ksreg)
1302 return 0x0; /* no error return allowed, so use zero */
1303
1304 mutex_lock(&ks->lock);
1305 result = ks8851_rdreg16(ks, ksreg);
1306 mutex_unlock(&ks->lock);
1307
1308 return result;
1309}
1310
1311static void ks8851_phy_write(struct net_device *dev,
1312 int phy, int reg, int value)
1313{
1314 struct ks8851_net *ks = netdev_priv(dev);
1315 int ksreg;
1316
1317 ksreg = ks8851_phy_reg(reg);
1318 if (ksreg) {
1319 mutex_lock(&ks->lock);
1320 ks8851_wrreg16(ks, ksreg, value);
1321 mutex_unlock(&ks->lock);
1322 }
1323}
1324
1325/**
1326 * ks8851_read_selftest - read the selftest memory info.
1327 * @ks: The device state
1328 *
1329 * Read and check the TX/RX memory selftest information.
1330 */
1331static int ks8851_read_selftest(struct ks8851_net *ks)
1332{
1333 unsigned both_done = MBIR_TXMBF | MBIR_RXMBF;
1334 int ret = 0;
1335 unsigned rd;
1336
1337 rd = ks8851_rdreg16(ks, KS_MBIR);
1338
1339 if ((rd & both_done) != both_done) {
0dc7d2b3 1340 netdev_warn(ks->netdev, "Memory selftest not finished\n");
3ba81f3e
BD
1341 return 0;
1342 }
1343
1344 if (rd & MBIR_TXMBFA) {
0dc7d2b3 1345 netdev_err(ks->netdev, "TX memory selftest fail\n");
3ba81f3e
BD
1346 ret |= 1;
1347 }
1348
1349 if (rd & MBIR_RXMBFA) {
0dc7d2b3 1350 netdev_err(ks->netdev, "RX memory selftest fail\n");
3ba81f3e
BD
1351 ret |= 2;
1352 }
1353
1354 return 0;
1355}
1356
1357/* driver bus management functions */
1358
d5b40921
LPC
1359#ifdef CONFIG_PM_SLEEP
1360
1361static int ks8851_suspend(struct device *dev)
1d5439b9 1362{
d5b40921
LPC
1363 struct ks8851_net *ks = dev_get_drvdata(dev);
1364 struct net_device *netdev = ks->netdev;
1d5439b9 1365
d5b40921
LPC
1366 if (netif_running(netdev)) {
1367 netif_device_detach(netdev);
1368 ks8851_net_stop(netdev);
1d5439b9
AA
1369 }
1370
1371 return 0;
1372}
1373
d5b40921 1374static int ks8851_resume(struct device *dev)
1d5439b9 1375{
d5b40921
LPC
1376 struct ks8851_net *ks = dev_get_drvdata(dev);
1377 struct net_device *netdev = ks->netdev;
1d5439b9 1378
d5b40921
LPC
1379 if (netif_running(netdev)) {
1380 ks8851_net_open(netdev);
1381 netif_device_attach(netdev);
1d5439b9
AA
1382 }
1383
1384 return 0;
1385}
8ac2b3c0 1386#endif
d5b40921
LPC
1387
1388static SIMPLE_DEV_PM_OPS(ks8851_pm_ops, ks8851_suspend, ks8851_resume);
1d5439b9 1389
654b8c5c 1390static int ks8851_probe(struct spi_device *spi)
3ba81f3e
BD
1391{
1392 struct net_device *ndev;
1393 struct ks8851_net *ks;
1394 int ret;
51c61a28 1395 unsigned cider;
73fdeb82 1396 int gpio;
3ba81f3e
BD
1397
1398 ndev = alloc_etherdev(sizeof(struct ks8851_net));
41de8d4c 1399 if (!ndev)
3ba81f3e 1400 return -ENOMEM;
3ba81f3e
BD
1401
1402 spi->bits_per_word = 8;
1403
1404 ks = netdev_priv(ndev);
1405
1406 ks->netdev = ndev;
1407 ks->spidev = spi;
1408 ks->tx_space = 6144;
1409
73fdeb82
SB
1410 gpio = of_get_named_gpio_flags(spi->dev.of_node, "reset-gpios",
1411 0, NULL);
1412 if (gpio == -EPROBE_DEFER) {
1413 ret = gpio;
1414 goto err_gpio;
1415 }
1416
1417 ks->gpio = gpio;
1418 if (gpio_is_valid(gpio)) {
1419 ret = devm_gpio_request_one(&spi->dev, gpio,
1420 GPIOF_OUT_INIT_LOW, "ks8851_rst_n");
1421 if (ret) {
1422 dev_err(&spi->dev, "reset gpio request failed\n");
1423 goto err_gpio;
1424 }
1425 }
1426
d64eed1d 1427 ks->vdd_io = devm_regulator_get(&spi->dev, "vdd-io");
73fdeb82
SB
1428 if (IS_ERR(ks->vdd_io)) {
1429 ret = PTR_ERR(ks->vdd_io);
d64eed1d
SB
1430 goto err_reg_io;
1431 }
1432
1433 ret = regulator_enable(ks->vdd_io);
1434 if (ret) {
1435 dev_err(&spi->dev, "regulator vdd_io enable fail: %d\n",
1436 ret);
1437 goto err_reg_io;
73fdeb82
SB
1438 }
1439
d64eed1d 1440 ks->vdd_reg = devm_regulator_get(&spi->dev, "vdd");
ebf4ad95
NM
1441 if (IS_ERR(ks->vdd_reg)) {
1442 ret = PTR_ERR(ks->vdd_reg);
d64eed1d
SB
1443 goto err_reg;
1444 }
1445
1446 ret = regulator_enable(ks->vdd_reg);
1447 if (ret) {
1448 dev_err(&spi->dev, "regulator vdd enable fail: %d\n",
1449 ret);
1450 goto err_reg;
ebf4ad95
NM
1451 }
1452
73fdeb82
SB
1453 if (gpio_is_valid(gpio)) {
1454 usleep_range(10000, 11000);
1455 gpio_set_value(gpio, 1);
1456 }
ebf4ad95 1457
3ba81f3e
BD
1458 mutex_init(&ks->lock);
1459 spin_lock_init(&ks->statelock);
1460
1461 INIT_WORK(&ks->tx_work, ks8851_tx_work);
3ba81f3e
BD
1462 INIT_WORK(&ks->rxctrl_work, ks8851_rxctrl_work);
1463
1464 /* initialise pre-made spi transfer messages */
1465
1466 spi_message_init(&ks->spi_msg1);
1467 spi_message_add_tail(&ks->spi_xfer1, &ks->spi_msg1);
1468
1469 spi_message_init(&ks->spi_msg2);
1470 spi_message_add_tail(&ks->spi_xfer2[0], &ks->spi_msg2);
1471 spi_message_add_tail(&ks->spi_xfer2[1], &ks->spi_msg2);
1472
51b7b1c3
BD
1473 /* setup EEPROM state */
1474
1475 ks->eeprom.data = ks;
1476 ks->eeprom.width = PCI_EEPROM_WIDTH_93C46;
1477 ks->eeprom.register_read = ks8851_eeprom_regread;
1478 ks->eeprom.register_write = ks8851_eeprom_regwrite;
1479
3ba81f3e
BD
1480 /* setup mii state */
1481 ks->mii.dev = ndev;
1482 ks->mii.phy_id = 1,
1483 ks->mii.phy_id_mask = 1;
1484 ks->mii.reg_num_mask = 0xf;
1485 ks->mii.mdio_read = ks8851_phy_read;
1486 ks->mii.mdio_write = ks8851_phy_write;
1487
1488 dev_info(&spi->dev, "message enable is %d\n", msg_enable);
1489
1490 /* set the default message enable */
1491 ks->msg_enable = netif_msg_init(msg_enable, (NETIF_MSG_DRV |
1492 NETIF_MSG_PROBE |
1493 NETIF_MSG_LINK));
1494
1495 skb_queue_head_init(&ks->txq);
1496
7ad24ea4 1497 ndev->ethtool_ops = &ks8851_ethtool_ops;
3ba81f3e
BD
1498 SET_NETDEV_DEV(ndev, &spi->dev);
1499
8f996607 1500 spi_set_drvdata(spi, ks);
3ba81f3e
BD
1501
1502 ndev->if_port = IF_PORT_100BASET;
1503 ndev->netdev_ops = &ks8851_netdev_ops;
1504 ndev->irq = spi->irq;
1505
57dada68
BD
1506 /* issue a global soft reset to reset the device. */
1507 ks8851_soft_reset(ks, GRR_GSR);
1508
3ba81f3e 1509 /* simple check for a valid chip being connected to the bus */
51c61a28
MR
1510 cider = ks8851_rdreg16(ks, KS_CIDER);
1511 if ((cider & ~CIDER_REV_MASK) != CIDER_ID) {
3ba81f3e
BD
1512 dev_err(&spi->dev, "failed to read device ID\n");
1513 ret = -ENODEV;
1514 goto err_id;
1515 }
1516
7d997466
SJ
1517 /* cache the contents of the CCR register for EEPROM, etc. */
1518 ks->rc_ccr = ks8851_rdreg16(ks, KS_CCR);
1519
3ba81f3e
BD
1520 ks8851_read_selftest(ks);
1521 ks8851_init_mac(ks);
1522
656a05c8
FB
1523 ret = request_threaded_irq(spi->irq, NULL, ks8851_irq,
1524 IRQF_TRIGGER_LOW | IRQF_ONESHOT,
1525 ndev->name, ks);
3ba81f3e
BD
1526 if (ret < 0) {
1527 dev_err(&spi->dev, "failed to get irq\n");
1528 goto err_irq;
1529 }
1530
1531 ret = register_netdev(ndev);
1532 if (ret) {
1533 dev_err(&spi->dev, "failed to register network device\n");
1534 goto err_netdev;
1535 }
1536
a9a8de21 1537 netdev_info(ndev, "revision %d, MAC %pM, IRQ %d, %s EEPROM\n",
51c61a28 1538 CIDER_REV_GET(cider), ndev->dev_addr, ndev->irq,
a9a8de21 1539 ks->rc_ccr & CCR_EEPROM ? "has" : "no");
3ba81f3e
BD
1540
1541 return 0;
1542
1543
1544err_netdev:
e8195b24 1545 free_irq(ndev->irq, ks);
3ba81f3e 1546
3ba81f3e 1547err_irq:
73fdeb82
SB
1548 if (gpio_is_valid(gpio))
1549 gpio_set_value(gpio, 0);
ebf4ad95 1550err_id:
d64eed1d 1551 regulator_disable(ks->vdd_reg);
ebf4ad95 1552err_reg:
d64eed1d 1553 regulator_disable(ks->vdd_io);
73fdeb82
SB
1554err_reg_io:
1555err_gpio:
3ba81f3e
BD
1556 free_netdev(ndev);
1557 return ret;
1558}
1559
654b8c5c 1560static int ks8851_remove(struct spi_device *spi)
3ba81f3e 1561{
8f996607 1562 struct ks8851_net *priv = spi_get_drvdata(spi);
3ba81f3e
BD
1563
1564 if (netif_msg_drv(priv))
0dc7d2b3 1565 dev_info(&spi->dev, "remove\n");
3ba81f3e
BD
1566
1567 unregister_netdev(priv->netdev);
1568 free_irq(spi->irq, priv);
73fdeb82
SB
1569 if (gpio_is_valid(priv->gpio))
1570 gpio_set_value(priv->gpio, 0);
d64eed1d
SB
1571 regulator_disable(priv->vdd_reg);
1572 regulator_disable(priv->vdd_io);
3ba81f3e
BD
1573 free_netdev(priv->netdev);
1574
1575 return 0;
1576}
1577
f4c6e06d
SB
1578static const struct of_device_id ks8851_match_table[] = {
1579 { .compatible = "micrel,ks8851" },
1580 { }
1581};
88c79664 1582MODULE_DEVICE_TABLE(of, ks8851_match_table);
f4c6e06d 1583
3ba81f3e
BD
1584static struct spi_driver ks8851_driver = {
1585 .driver = {
1586 .name = "ks8851",
f4c6e06d 1587 .of_match_table = ks8851_match_table,
8ac2b3c0 1588 .pm = &ks8851_pm_ops,
3ba81f3e
BD
1589 },
1590 .probe = ks8851_probe,
654b8c5c 1591 .remove = ks8851_remove,
3ba81f3e 1592};
0582ce92 1593module_spi_driver(ks8851_driver);
3ba81f3e
BD
1594
1595MODULE_DESCRIPTION("KS8851 Network driver");
1596MODULE_AUTHOR("Ben Dooks <ben@simtec.co.uk>");
1597MODULE_LICENSE("GPL");
1598
1599module_param_named(message, msg_enable, int, 0);
1600MODULE_PARM_DESC(message, "Message verbosity level (0=none, 31=all)");
e0626e38 1601MODULE_ALIAS("spi:ks8851");