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CommitLineData
2e55cc72
DB
1/*
2 * ASIX AX8817X based USB 2.0 Ethernet Devices
933a27d3 3 * Copyright (C) 2003-2006 David Hollis <dhollis@davehollis.com>
2e55cc72 4 * Copyright (C) 2005 Phil Chang <pchang23@sbcglobal.net>
933a27d3 5 * Copyright (C) 2006 James Painter <jamie.painter@iname.com>
2e55cc72
DB
6 * Copyright (c) 2002-2003 TiVo Inc.
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21 */
22
23// #define DEBUG // error path messages, extra info
24// #define VERBOSE // more; success messages
25
2e55cc72
DB
26#include <linux/module.h>
27#include <linux/kmod.h>
2e55cc72
DB
28#include <linux/init.h>
29#include <linux/netdevice.h>
30#include <linux/etherdevice.h>
31#include <linux/ethtool.h>
32#include <linux/workqueue.h>
33#include <linux/mii.h>
34#include <linux/usb.h>
35#include <linux/crc32.h>
3692e94f 36#include <linux/usb/usbnet.h>
5a0e3ad6 37#include <linux/slab.h>
2e55cc72 38
933a27d3
DH
39#define DRIVER_VERSION "14-Jun-2006"
40static const char driver_name [] = "asix";
41
2e55cc72
DB
42/* ASIX AX8817X based USB 2.0 Ethernet Devices */
43
44#define AX_CMD_SET_SW_MII 0x06
45#define AX_CMD_READ_MII_REG 0x07
46#define AX_CMD_WRITE_MII_REG 0x08
47#define AX_CMD_SET_HW_MII 0x0a
48#define AX_CMD_READ_EEPROM 0x0b
49#define AX_CMD_WRITE_EEPROM 0x0c
50#define AX_CMD_WRITE_ENABLE 0x0d
51#define AX_CMD_WRITE_DISABLE 0x0e
933a27d3 52#define AX_CMD_READ_RX_CTL 0x0f
2e55cc72
DB
53#define AX_CMD_WRITE_RX_CTL 0x10
54#define AX_CMD_READ_IPG012 0x11
55#define AX_CMD_WRITE_IPG0 0x12
56#define AX_CMD_WRITE_IPG1 0x13
933a27d3 57#define AX_CMD_READ_NODE_ID 0x13
7f29a3ba 58#define AX_CMD_WRITE_NODE_ID 0x14
2e55cc72
DB
59#define AX_CMD_WRITE_IPG2 0x14
60#define AX_CMD_WRITE_MULTI_FILTER 0x16
933a27d3 61#define AX88172_CMD_READ_NODE_ID 0x17
2e55cc72
DB
62#define AX_CMD_READ_PHY_ID 0x19
63#define AX_CMD_READ_MEDIUM_STATUS 0x1a
64#define AX_CMD_WRITE_MEDIUM_MODE 0x1b
65#define AX_CMD_READ_MONITOR_MODE 0x1c
66#define AX_CMD_WRITE_MONITOR_MODE 0x1d
933a27d3 67#define AX_CMD_READ_GPIOS 0x1e
2e55cc72
DB
68#define AX_CMD_WRITE_GPIOS 0x1f
69#define AX_CMD_SW_RESET 0x20
70#define AX_CMD_SW_PHY_STATUS 0x21
71#define AX_CMD_SW_PHY_SELECT 0x22
2e55cc72
DB
72
73#define AX_MONITOR_MODE 0x01
74#define AX_MONITOR_LINK 0x02
75#define AX_MONITOR_MAGIC 0x04
76#define AX_MONITOR_HSFS 0x10
77
78/* AX88172 Medium Status Register values */
933a27d3
DH
79#define AX88172_MEDIUM_FD 0x02
80#define AX88172_MEDIUM_TX 0x04
81#define AX88172_MEDIUM_FC 0x10
82#define AX88172_MEDIUM_DEFAULT \
83 ( AX88172_MEDIUM_FD | AX88172_MEDIUM_TX | AX88172_MEDIUM_FC )
2e55cc72
DB
84
85#define AX_MCAST_FILTER_SIZE 8
86#define AX_MAX_MCAST 64
87
2e55cc72
DB
88#define AX_SWRESET_CLEAR 0x00
89#define AX_SWRESET_RR 0x01
90#define AX_SWRESET_RT 0x02
91#define AX_SWRESET_PRTE 0x04
92#define AX_SWRESET_PRL 0x08
93#define AX_SWRESET_BZ 0x10
94#define AX_SWRESET_IPRL 0x20
95#define AX_SWRESET_IPPD 0x40
96
97#define AX88772_IPG0_DEFAULT 0x15
98#define AX88772_IPG1_DEFAULT 0x0c
99#define AX88772_IPG2_DEFAULT 0x12
100
933a27d3
DH
101/* AX88772 & AX88178 Medium Mode Register */
102#define AX_MEDIUM_PF 0x0080
103#define AX_MEDIUM_JFE 0x0040
104#define AX_MEDIUM_TFC 0x0020
105#define AX_MEDIUM_RFC 0x0010
106#define AX_MEDIUM_ENCK 0x0008
107#define AX_MEDIUM_AC 0x0004
108#define AX_MEDIUM_FD 0x0002
109#define AX_MEDIUM_GM 0x0001
110#define AX_MEDIUM_SM 0x1000
111#define AX_MEDIUM_SBP 0x0800
112#define AX_MEDIUM_PS 0x0200
113#define AX_MEDIUM_RE 0x0100
114
115#define AX88178_MEDIUM_DEFAULT \
116 (AX_MEDIUM_PS | AX_MEDIUM_FD | AX_MEDIUM_AC | \
117 AX_MEDIUM_RFC | AX_MEDIUM_TFC | AX_MEDIUM_JFE | \
118 AX_MEDIUM_RE )
2e55cc72 119
933a27d3
DH
120#define AX88772_MEDIUM_DEFAULT \
121 (AX_MEDIUM_FD | AX_MEDIUM_RFC | \
122 AX_MEDIUM_TFC | AX_MEDIUM_PS | \
123 AX_MEDIUM_AC | AX_MEDIUM_RE )
124
125/* AX88772 & AX88178 RX_CTL values */
126#define AX_RX_CTL_SO 0x0080
127#define AX_RX_CTL_AP 0x0020
128#define AX_RX_CTL_AM 0x0010
129#define AX_RX_CTL_AB 0x0008
130#define AX_RX_CTL_SEP 0x0004
131#define AX_RX_CTL_AMALL 0x0002
132#define AX_RX_CTL_PRO 0x0001
133#define AX_RX_CTL_MFB_2048 0x0000
134#define AX_RX_CTL_MFB_4096 0x0100
135#define AX_RX_CTL_MFB_8192 0x0200
136#define AX_RX_CTL_MFB_16384 0x0300
137
138#define AX_DEFAULT_RX_CTL \
139 (AX_RX_CTL_SO | AX_RX_CTL_AB )
140
141/* GPIO 0 .. 2 toggles */
142#define AX_GPIO_GPO0EN 0x01 /* GPIO0 Output enable */
143#define AX_GPIO_GPO_0 0x02 /* GPIO0 Output value */
144#define AX_GPIO_GPO1EN 0x04 /* GPIO1 Output enable */
145#define AX_GPIO_GPO_1 0x08 /* GPIO1 Output value */
146#define AX_GPIO_GPO2EN 0x10 /* GPIO2 Output enable */
147#define AX_GPIO_GPO_2 0x20 /* GPIO2 Output value */
148#define AX_GPIO_RESERVED 0x40 /* Reserved */
149#define AX_GPIO_RSE 0x80 /* Reload serial EEPROM */
150
151#define AX_EEPROM_MAGIC 0xdeadbeef
152#define AX88172_EEPROM_LEN 0x40
153#define AX88772_EEPROM_LEN 0xff
154
155#define PHY_MODE_MARVELL 0x0000
156#define MII_MARVELL_LED_CTRL 0x0018
157#define MII_MARVELL_STATUS 0x001b
158#define MII_MARVELL_CTRL 0x0014
159
160#define MARVELL_LED_MANUAL 0x0019
161
162#define MARVELL_STATUS_HWCFG 0x0004
163
164#define MARVELL_CTRL_TXDELAY 0x0002
165#define MARVELL_CTRL_RXDELAY 0x0080
2e55cc72
DB
166
167/* This structure cannot exceed sizeof(unsigned long [5]) AKA 20 bytes */
48b1be6a 168struct asix_data {
2e55cc72 169 u8 multi_filter[AX_MCAST_FILTER_SIZE];
7f29a3ba 170 u8 mac_addr[ETH_ALEN];
933a27d3
DH
171 u8 phymode;
172 u8 ledmode;
173 u8 eeprom_len;
2e55cc72
DB
174};
175
176struct ax88172_int_data {
51bf2976 177 __le16 res1;
2e55cc72 178 u8 link;
51bf2976 179 __le16 res2;
2e55cc72 180 u8 status;
51bf2976 181 __le16 res3;
2e55cc72
DB
182} __attribute__ ((packed));
183
48b1be6a 184static int asix_read_cmd(struct usbnet *dev, u8 cmd, u16 value, u16 index,
2e55cc72
DB
185 u16 size, void *data)
186{
51bf2976
AV
187 void *buf;
188 int err = -ENOMEM;
189
60b86755
JP
190 netdev_dbg(dev->net, "asix_read_cmd() cmd=0x%02x value=0x%04x index=0x%04x size=%d\n",
191 cmd, value, index, size);
51bf2976
AV
192
193 buf = kmalloc(size, GFP_KERNEL);
194 if (!buf)
195 goto out;
196
197 err = usb_control_msg(
2e55cc72
DB
198 dev->udev,
199 usb_rcvctrlpipe(dev->udev, 0),
200 cmd,
201 USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
202 value,
203 index,
51bf2976 204 buf,
2e55cc72
DB
205 size,
206 USB_CTRL_GET_TIMEOUT);
94d43363 207 if (err == size)
51bf2976 208 memcpy(data, buf, size);
94d43363
RD
209 else if (err >= 0)
210 err = -EINVAL;
51bf2976
AV
211 kfree(buf);
212
213out:
214 return err;
2e55cc72
DB
215}
216
48b1be6a 217static int asix_write_cmd(struct usbnet *dev, u8 cmd, u16 value, u16 index,
2e55cc72
DB
218 u16 size, void *data)
219{
51bf2976
AV
220 void *buf = NULL;
221 int err = -ENOMEM;
222
60b86755
JP
223 netdev_dbg(dev->net, "asix_write_cmd() cmd=0x%02x value=0x%04x index=0x%04x size=%d\n",
224 cmd, value, index, size);
51bf2976
AV
225
226 if (data) {
227 buf = kmalloc(size, GFP_KERNEL);
228 if (!buf)
229 goto out;
230 memcpy(buf, data, size);
231 }
232
233 err = usb_control_msg(
2e55cc72
DB
234 dev->udev,
235 usb_sndctrlpipe(dev->udev, 0),
236 cmd,
237 USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
238 value,
239 index,
51bf2976 240 buf,
2e55cc72
DB
241 size,
242 USB_CTRL_SET_TIMEOUT);
51bf2976
AV
243 kfree(buf);
244
245out:
246 return err;
2e55cc72
DB
247}
248
7d12e780 249static void asix_async_cmd_callback(struct urb *urb)
2e55cc72
DB
250{
251 struct usb_ctrlrequest *req = (struct usb_ctrlrequest *)urb->context;
c94cb314 252 int status = urb->status;
2e55cc72 253
c94cb314 254 if (status < 0)
48b1be6a 255 printk(KERN_DEBUG "asix_async_cmd_callback() failed with %d",
c94cb314 256 status);
2e55cc72
DB
257
258 kfree(req);
259 usb_free_urb(urb);
260}
261
933a27d3
DH
262static void
263asix_write_cmd_async(struct usbnet *dev, u8 cmd, u16 value, u16 index,
264 u16 size, void *data)
265{
266 struct usb_ctrlrequest *req;
267 int status;
268 struct urb *urb;
269
60b86755
JP
270 netdev_dbg(dev->net, "asix_write_cmd_async() cmd=0x%02x value=0x%04x index=0x%04x size=%d\n",
271 cmd, value, index, size);
933a27d3 272 if ((urb = usb_alloc_urb(0, GFP_ATOMIC)) == NULL) {
60b86755 273 netdev_err(dev->net, "Error allocating URB in write_cmd_async!\n");
933a27d3
DH
274 return;
275 }
276
277 if ((req = kmalloc(sizeof(struct usb_ctrlrequest), GFP_ATOMIC)) == NULL) {
60b86755 278 netdev_err(dev->net, "Failed to allocate memory for control request\n");
933a27d3
DH
279 usb_free_urb(urb);
280 return;
281 }
282
283 req->bRequestType = USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE;
284 req->bRequest = cmd;
9aa742ef
ON
285 req->wValue = cpu_to_le16(value);
286 req->wIndex = cpu_to_le16(index);
287 req->wLength = cpu_to_le16(size);
933a27d3
DH
288
289 usb_fill_control_urb(urb, dev->udev,
290 usb_sndctrlpipe(dev->udev, 0),
291 (void *)req, data, size,
292 asix_async_cmd_callback, req);
293
294 if((status = usb_submit_urb(urb, GFP_ATOMIC)) < 0) {
60b86755
JP
295 netdev_err(dev->net, "Error submitting the control message: status=%d\n",
296 status);
933a27d3
DH
297 kfree(req);
298 usb_free_urb(urb);
299 }
300}
301
302static int asix_rx_fixup(struct usbnet *dev, struct sk_buff *skb)
303{
304 u8 *head;
305 u32 header;
306 char *packet;
307 struct sk_buff *ax_skb;
308 u16 size;
309
310 head = (u8 *) skb->data;
311 memcpy(&header, head, sizeof(header));
312 le32_to_cpus(&header);
313 packet = head + sizeof(header);
314
315 skb_pull(skb, 4);
316
317 while (skb->len > 0) {
318 if ((short)(header & 0x0000ffff) !=
319 ~((short)((header & 0xffff0000) >> 16))) {
60b86755 320 netdev_err(dev->net, "asix_rx_fixup() Bad Header Length\n");
933a27d3
DH
321 }
322 /* get the packet length */
323 size = (u16) (header & 0x0000ffff);
324
325 if ((skb->len) - ((size + 1) & 0xfffe) == 0)
326 return 2;
327 if (size > ETH_FRAME_LEN) {
60b86755
JP
328 netdev_err(dev->net, "asix_rx_fixup() Bad RX Length %d\n",
329 size);
933a27d3
DH
330 return 0;
331 }
332 ax_skb = skb_clone(skb, GFP_ATOMIC);
333 if (ax_skb) {
334 ax_skb->len = size;
335 ax_skb->data = packet;
27a884dc 336 skb_set_tail_pointer(ax_skb, size);
933a27d3
DH
337 usbnet_skb_return(dev, ax_skb);
338 } else {
339 return 0;
340 }
341
342 skb_pull(skb, (size + 1) & 0xfffe);
343
344 if (skb->len == 0)
345 break;
346
347 head = (u8 *) skb->data;
348 memcpy(&header, head, sizeof(header));
349 le32_to_cpus(&header);
350 packet = head + sizeof(header);
351 skb_pull(skb, 4);
352 }
353
354 if (skb->len < 0) {
60b86755
JP
355 netdev_err(dev->net, "asix_rx_fixup() Bad SKB Length %d\n",
356 skb->len);
933a27d3
DH
357 return 0;
358 }
359 return 1;
360}
361
362static struct sk_buff *asix_tx_fixup(struct usbnet *dev, struct sk_buff *skb,
363 gfp_t flags)
364{
365 int padlen;
366 int headroom = skb_headroom(skb);
367 int tailroom = skb_tailroom(skb);
368 u32 packet_len;
369 u32 padbytes = 0xffff0000;
370
371 padlen = ((skb->len + 4) % 512) ? 0 : 4;
372
8e95a202
JP
373 if ((!skb_cloned(skb)) &&
374 ((headroom + tailroom) >= (4 + padlen))) {
933a27d3
DH
375 if ((headroom < 4) || (tailroom < padlen)) {
376 skb->data = memmove(skb->head + 4, skb->data, skb->len);
27a884dc 377 skb_set_tail_pointer(skb, skb->len);
933a27d3
DH
378 }
379 } else {
380 struct sk_buff *skb2;
381 skb2 = skb_copy_expand(skb, 4, padlen, flags);
382 dev_kfree_skb_any(skb);
383 skb = skb2;
384 if (!skb)
385 return NULL;
386 }
387
388 skb_push(skb, 4);
389 packet_len = (((skb->len - 4) ^ 0x0000ffff) << 16) + (skb->len - 4);
57e4f041 390 cpu_to_le32s(&packet_len);
27d7ff46 391 skb_copy_to_linear_data(skb, &packet_len, sizeof(packet_len));
933a27d3
DH
392
393 if ((skb->len % 512) == 0) {
57e4f041 394 cpu_to_le32s(&padbytes);
27a884dc 395 memcpy(skb_tail_pointer(skb), &padbytes, sizeof(padbytes));
933a27d3
DH
396 skb_put(skb, sizeof(padbytes));
397 }
398 return skb;
399}
400
401static void asix_status(struct usbnet *dev, struct urb *urb)
402{
403 struct ax88172_int_data *event;
404 int link;
405
406 if (urb->actual_length < 8)
407 return;
408
409 event = urb->transfer_buffer;
410 link = event->link & 0x01;
411 if (netif_carrier_ok(dev->net) != link) {
412 if (link) {
413 netif_carrier_on(dev->net);
414 usbnet_defer_kevent (dev, EVENT_LINK_RESET );
415 } else
416 netif_carrier_off(dev->net);
60b86755 417 netdev_dbg(dev->net, "Link Status is: %d\n", link);
933a27d3
DH
418 }
419}
420
48b1be6a
DH
421static inline int asix_set_sw_mii(struct usbnet *dev)
422{
423 int ret;
424 ret = asix_write_cmd(dev, AX_CMD_SET_SW_MII, 0x0000, 0, 0, NULL);
425 if (ret < 0)
60b86755 426 netdev_err(dev->net, "Failed to enable software MII access\n");
48b1be6a
DH
427 return ret;
428}
429
430static inline int asix_set_hw_mii(struct usbnet *dev)
431{
432 int ret;
433 ret = asix_write_cmd(dev, AX_CMD_SET_HW_MII, 0x0000, 0, 0, NULL);
434 if (ret < 0)
60b86755 435 netdev_err(dev->net, "Failed to enable hardware MII access\n");
48b1be6a
DH
436 return ret;
437}
438
933a27d3 439static inline int asix_get_phy_addr(struct usbnet *dev)
48b1be6a 440{
51bf2976
AV
441 u8 buf[2];
442 int ret = asix_read_cmd(dev, AX_CMD_READ_PHY_ID, 0, 0, 2, buf);
48b1be6a 443
60b86755 444 netdev_dbg(dev->net, "asix_get_phy_addr()\n");
933a27d3 445
51bf2976 446 if (ret < 0) {
60b86755 447 netdev_err(dev->net, "Error reading PHYID register: %02x\n", ret);
51bf2976 448 goto out;
48b1be6a 449 }
60b86755
JP
450 netdev_dbg(dev->net, "asix_get_phy_addr() returning 0x%04x\n",
451 *((__le16 *)buf));
51bf2976
AV
452 ret = buf[1];
453
454out:
48b1be6a
DH
455 return ret;
456}
457
458static int asix_sw_reset(struct usbnet *dev, u8 flags)
459{
460 int ret;
461
462 ret = asix_write_cmd(dev, AX_CMD_SW_RESET, flags, 0, 0, NULL);
463 if (ret < 0)
60b86755 464 netdev_err(dev->net, "Failed to send software reset: %02x\n", ret);
933a27d3
DH
465
466 return ret;
467}
48b1be6a 468
933a27d3
DH
469static u16 asix_read_rx_ctl(struct usbnet *dev)
470{
51bf2976
AV
471 __le16 v;
472 int ret = asix_read_cmd(dev, AX_CMD_READ_RX_CTL, 0, 0, 2, &v);
933a27d3 473
51bf2976 474 if (ret < 0) {
60b86755 475 netdev_err(dev->net, "Error reading RX_CTL register: %02x\n", ret);
51bf2976 476 goto out;
933a27d3 477 }
51bf2976
AV
478 ret = le16_to_cpu(v);
479out:
48b1be6a
DH
480 return ret;
481}
482
483static int asix_write_rx_ctl(struct usbnet *dev, u16 mode)
484{
485 int ret;
486
60b86755 487 netdev_dbg(dev->net, "asix_write_rx_ctl() - mode = 0x%04x\n", mode);
48b1be6a
DH
488 ret = asix_write_cmd(dev, AX_CMD_WRITE_RX_CTL, mode, 0, 0, NULL);
489 if (ret < 0)
60b86755
JP
490 netdev_err(dev->net, "Failed to write RX_CTL mode to 0x%04x: %02x\n",
491 mode, ret);
48b1be6a
DH
492
493 return ret;
494}
495
933a27d3 496static u16 asix_read_medium_status(struct usbnet *dev)
2e55cc72 497{
51bf2976
AV
498 __le16 v;
499 int ret = asix_read_cmd(dev, AX_CMD_READ_MEDIUM_STATUS, 0, 0, 2, &v);
2e55cc72 500
51bf2976 501 if (ret < 0) {
60b86755
JP
502 netdev_err(dev->net, "Error reading Medium Status register: %02x\n",
503 ret);
51bf2976 504 goto out;
2e55cc72 505 }
51bf2976
AV
506 ret = le16_to_cpu(v);
507out:
933a27d3 508 return ret;
2e55cc72
DB
509}
510
933a27d3 511static int asix_write_medium_mode(struct usbnet *dev, u16 mode)
2e55cc72 512{
933a27d3 513 int ret;
2e55cc72 514
60b86755 515 netdev_dbg(dev->net, "asix_write_medium_mode() - mode = 0x%04x\n", mode);
933a27d3
DH
516 ret = asix_write_cmd(dev, AX_CMD_WRITE_MEDIUM_MODE, mode, 0, 0, NULL);
517 if (ret < 0)
60b86755
JP
518 netdev_err(dev->net, "Failed to write Medium Mode mode to 0x%04x: %02x\n",
519 mode, ret);
2e55cc72 520
933a27d3
DH
521 return ret;
522}
2e55cc72 523
933a27d3
DH
524static int asix_write_gpio(struct usbnet *dev, u16 value, int sleep)
525{
526 int ret;
2e55cc72 527
60b86755 528 netdev_dbg(dev->net, "asix_write_gpio() - value = 0x%04x\n", value);
933a27d3
DH
529 ret = asix_write_cmd(dev, AX_CMD_WRITE_GPIOS, value, 0, 0, NULL);
530 if (ret < 0)
60b86755
JP
531 netdev_err(dev->net, "Failed to write GPIO value 0x%04x: %02x\n",
532 value, ret);
2e55cc72 533
933a27d3
DH
534 if (sleep)
535 msleep(sleep);
536
537 return ret;
2e55cc72
DB
538}
539
933a27d3
DH
540/*
541 * AX88772 & AX88178 have a 16-bit RX_CTL value
542 */
48b1be6a 543static void asix_set_multicast(struct net_device *net)
2e55cc72
DB
544{
545 struct usbnet *dev = netdev_priv(net);
48b1be6a 546 struct asix_data *data = (struct asix_data *)&dev->data;
933a27d3 547 u16 rx_ctl = AX_DEFAULT_RX_CTL;
2e55cc72
DB
548
549 if (net->flags & IFF_PROMISC) {
933a27d3 550 rx_ctl |= AX_RX_CTL_PRO;
8e95a202 551 } else if (net->flags & IFF_ALLMULTI ||
4cd24eaf 552 netdev_mc_count(net) > AX_MAX_MCAST) {
933a27d3 553 rx_ctl |= AX_RX_CTL_AMALL;
4cd24eaf 554 } else if (netdev_mc_empty(net)) {
2e55cc72
DB
555 /* just broadcast and directed */
556 } else {
557 /* We use the 20 byte dev->data
558 * for our 8 byte filter buffer
559 * to avoid allocating memory that
560 * is tricky to free later */
a92635dc 561 struct dev_mc_list *mc_list;
2e55cc72 562 u32 crc_bits;
2e55cc72
DB
563
564 memset(data->multi_filter, 0, AX_MCAST_FILTER_SIZE);
565
566 /* Build the multicast hash filter. */
a92635dc 567 netdev_for_each_mc_addr(mc_list, net) {
2e55cc72
DB
568 crc_bits =
569 ether_crc(ETH_ALEN,
570 mc_list->dmi_addr) >> 26;
571 data->multi_filter[crc_bits >> 3] |=
572 1 << (crc_bits & 7);
2e55cc72
DB
573 }
574
48b1be6a 575 asix_write_cmd_async(dev, AX_CMD_WRITE_MULTI_FILTER, 0, 0,
2e55cc72
DB
576 AX_MCAST_FILTER_SIZE, data->multi_filter);
577
933a27d3 578 rx_ctl |= AX_RX_CTL_AM;
2e55cc72
DB
579 }
580
48b1be6a 581 asix_write_cmd_async(dev, AX_CMD_WRITE_RX_CTL, rx_ctl, 0, 0, NULL);
2e55cc72
DB
582}
583
48b1be6a 584static int asix_mdio_read(struct net_device *netdev, int phy_id, int loc)
2e55cc72
DB
585{
586 struct usbnet *dev = netdev_priv(netdev);
51bf2976 587 __le16 res;
2e55cc72 588
a9fc6338 589 mutex_lock(&dev->phy_mutex);
48b1be6a
DH
590 asix_set_sw_mii(dev);
591 asix_read_cmd(dev, AX_CMD_READ_MII_REG, phy_id,
51bf2976 592 (__u16)loc, 2, &res);
48b1be6a 593 asix_set_hw_mii(dev);
a9fc6338 594 mutex_unlock(&dev->phy_mutex);
2e55cc72 595
60b86755
JP
596 netdev_dbg(dev->net, "asix_mdio_read() phy_id=0x%02x, loc=0x%02x, returns=0x%04x\n",
597 phy_id, loc, le16_to_cpu(res));
2e55cc72 598
51bf2976 599 return le16_to_cpu(res);
2e55cc72
DB
600}
601
602static void
48b1be6a 603asix_mdio_write(struct net_device *netdev, int phy_id, int loc, int val)
2e55cc72
DB
604{
605 struct usbnet *dev = netdev_priv(netdev);
51bf2976 606 __le16 res = cpu_to_le16(val);
2e55cc72 607
60b86755
JP
608 netdev_dbg(dev->net, "asix_mdio_write() phy_id=0x%02x, loc=0x%02x, val=0x%04x\n",
609 phy_id, loc, val);
a9fc6338 610 mutex_lock(&dev->phy_mutex);
48b1be6a 611 asix_set_sw_mii(dev);
51bf2976 612 asix_write_cmd(dev, AX_CMD_WRITE_MII_REG, phy_id, (__u16)loc, 2, &res);
48b1be6a 613 asix_set_hw_mii(dev);
a9fc6338 614 mutex_unlock(&dev->phy_mutex);
2e55cc72
DB
615}
616
933a27d3
DH
617/* Get the PHY Identifier from the PHYSID1 & PHYSID2 MII registers */
618static u32 asix_get_phyid(struct usbnet *dev)
2e55cc72 619{
933a27d3
DH
620 int phy_reg;
621 u32 phy_id;
2e55cc72 622
933a27d3
DH
623 phy_reg = asix_mdio_read(dev->net, dev->mii.phy_id, MII_PHYSID1);
624 if (phy_reg < 0)
625 return 0;
2e55cc72 626
933a27d3 627 phy_id = (phy_reg & 0xffff) << 16;
2e55cc72 628
933a27d3
DH
629 phy_reg = asix_mdio_read(dev->net, dev->mii.phy_id, MII_PHYSID2);
630 if (phy_reg < 0)
631 return 0;
632
633 phy_id |= (phy_reg & 0xffff);
634
635 return phy_id;
2e55cc72
DB
636}
637
638static void
48b1be6a 639asix_get_wol(struct net_device *net, struct ethtool_wolinfo *wolinfo)
2e55cc72
DB
640{
641 struct usbnet *dev = netdev_priv(net);
642 u8 opt;
643
48b1be6a 644 if (asix_read_cmd(dev, AX_CMD_READ_MONITOR_MODE, 0, 0, 1, &opt) < 0) {
2e55cc72
DB
645 wolinfo->supported = 0;
646 wolinfo->wolopts = 0;
647 return;
648 }
649 wolinfo->supported = WAKE_PHY | WAKE_MAGIC;
650 wolinfo->wolopts = 0;
651 if (opt & AX_MONITOR_MODE) {
652 if (opt & AX_MONITOR_LINK)
653 wolinfo->wolopts |= WAKE_PHY;
654 if (opt & AX_MONITOR_MAGIC)
655 wolinfo->wolopts |= WAKE_MAGIC;
656 }
657}
658
659static int
48b1be6a 660asix_set_wol(struct net_device *net, struct ethtool_wolinfo *wolinfo)
2e55cc72
DB
661{
662 struct usbnet *dev = netdev_priv(net);
663 u8 opt = 0;
2e55cc72
DB
664
665 if (wolinfo->wolopts & WAKE_PHY)
666 opt |= AX_MONITOR_LINK;
667 if (wolinfo->wolopts & WAKE_MAGIC)
668 opt |= AX_MONITOR_MAGIC;
669 if (opt != 0)
670 opt |= AX_MONITOR_MODE;
671
48b1be6a 672 if (asix_write_cmd(dev, AX_CMD_WRITE_MONITOR_MODE,
51bf2976 673 opt, 0, 0, NULL) < 0)
2e55cc72
DB
674 return -EINVAL;
675
676 return 0;
677}
678
48b1be6a 679static int asix_get_eeprom_len(struct net_device *net)
2e55cc72 680{
933a27d3
DH
681 struct usbnet *dev = netdev_priv(net);
682 struct asix_data *data = (struct asix_data *)&dev->data;
683
684 return data->eeprom_len;
2e55cc72
DB
685}
686
48b1be6a 687static int asix_get_eeprom(struct net_device *net,
2e55cc72
DB
688 struct ethtool_eeprom *eeprom, u8 *data)
689{
690 struct usbnet *dev = netdev_priv(net);
51bf2976 691 __le16 *ebuf = (__le16 *)data;
2e55cc72
DB
692 int i;
693
694 /* Crude hack to ensure that we don't overwrite memory
695 * if an odd length is supplied
696 */
697 if (eeprom->len % 2)
698 return -EINVAL;
699
700 eeprom->magic = AX_EEPROM_MAGIC;
701
702 /* ax8817x returns 2 bytes from eeprom on read */
703 for (i=0; i < eeprom->len / 2; i++) {
48b1be6a 704 if (asix_read_cmd(dev, AX_CMD_READ_EEPROM,
2e55cc72
DB
705 eeprom->offset + i, 0, 2, &ebuf[i]) < 0)
706 return -EINVAL;
707 }
708 return 0;
709}
710
48b1be6a 711static void asix_get_drvinfo (struct net_device *net,
2e55cc72
DB
712 struct ethtool_drvinfo *info)
713{
933a27d3
DH
714 struct usbnet *dev = netdev_priv(net);
715 struct asix_data *data = (struct asix_data *)&dev->data;
716
2e55cc72
DB
717 /* Inherit standard device info */
718 usbnet_get_drvinfo(net, info);
933a27d3
DH
719 strncpy (info->driver, driver_name, sizeof info->driver);
720 strncpy (info->version, DRIVER_VERSION, sizeof info->version);
721 info->eedump_len = data->eeprom_len;
2e55cc72
DB
722}
723
933a27d3
DH
724static u32 asix_get_link(struct net_device *net)
725{
726 struct usbnet *dev = netdev_priv(net);
727
728 return mii_link_ok(&dev->mii);
729}
730
731static int asix_ioctl (struct net_device *net, struct ifreq *rq, int cmd)
732{
733 struct usbnet *dev = netdev_priv(net);
734
735 return generic_mii_ioctl(&dev->mii, if_mii(rq), cmd, NULL);
736}
737
7f29a3ba
JK
738static int asix_set_mac_address(struct net_device *net, void *p)
739{
740 struct usbnet *dev = netdev_priv(net);
741 struct asix_data *data = (struct asix_data *)&dev->data;
742 struct sockaddr *addr = p;
743
744 if (netif_running(net))
745 return -EBUSY;
746 if (!is_valid_ether_addr(addr->sa_data))
747 return -EADDRNOTAVAIL;
748
749 memcpy(net->dev_addr, addr->sa_data, ETH_ALEN);
750
751 /* We use the 20 byte dev->data
752 * for our 6 byte mac buffer
753 * to avoid allocating memory that
754 * is tricky to free later */
755 memcpy(data->mac_addr, addr->sa_data, ETH_ALEN);
756 asix_write_cmd_async(dev, AX_CMD_WRITE_NODE_ID, 0, 0, ETH_ALEN,
757 data->mac_addr);
758
759 return 0;
760}
761
933a27d3
DH
762/* We need to override some ethtool_ops so we require our
763 own structure so we don't interfere with other usbnet
764 devices that may be connected at the same time. */
0fc0b732 765static const struct ethtool_ops ax88172_ethtool_ops = {
933a27d3
DH
766 .get_drvinfo = asix_get_drvinfo,
767 .get_link = asix_get_link,
933a27d3 768 .get_msglevel = usbnet_get_msglevel,
2e55cc72 769 .set_msglevel = usbnet_set_msglevel,
48b1be6a
DH
770 .get_wol = asix_get_wol,
771 .set_wol = asix_set_wol,
772 .get_eeprom_len = asix_get_eeprom_len,
773 .get_eeprom = asix_get_eeprom,
c41286fd
AB
774 .get_settings = usbnet_get_settings,
775 .set_settings = usbnet_set_settings,
776 .nway_reset = usbnet_nway_reset,
2e55cc72
DB
777};
778
933a27d3 779static void ax88172_set_multicast(struct net_device *net)
2e55cc72
DB
780{
781 struct usbnet *dev = netdev_priv(net);
933a27d3
DH
782 struct asix_data *data = (struct asix_data *)&dev->data;
783 u8 rx_ctl = 0x8c;
2e55cc72 784
933a27d3
DH
785 if (net->flags & IFF_PROMISC) {
786 rx_ctl |= 0x01;
8e95a202 787 } else if (net->flags & IFF_ALLMULTI ||
4cd24eaf 788 netdev_mc_count(net) > AX_MAX_MCAST) {
933a27d3 789 rx_ctl |= 0x02;
4cd24eaf 790 } else if (netdev_mc_empty(net)) {
933a27d3
DH
791 /* just broadcast and directed */
792 } else {
793 /* We use the 20 byte dev->data
794 * for our 8 byte filter buffer
795 * to avoid allocating memory that
796 * is tricky to free later */
a92635dc 797 struct dev_mc_list *mc_list;
933a27d3 798 u32 crc_bits;
933a27d3
DH
799
800 memset(data->multi_filter, 0, AX_MCAST_FILTER_SIZE);
801
802 /* Build the multicast hash filter. */
a92635dc 803 netdev_for_each_mc_addr(mc_list, net) {
933a27d3
DH
804 crc_bits =
805 ether_crc(ETH_ALEN,
806 mc_list->dmi_addr) >> 26;
807 data->multi_filter[crc_bits >> 3] |=
808 1 << (crc_bits & 7);
933a27d3
DH
809 }
810
811 asix_write_cmd_async(dev, AX_CMD_WRITE_MULTI_FILTER, 0, 0,
812 AX_MCAST_FILTER_SIZE, data->multi_filter);
813
814 rx_ctl |= 0x10;
815 }
816
817 asix_write_cmd_async(dev, AX_CMD_WRITE_RX_CTL, rx_ctl, 0, 0, NULL);
818}
819
820static int ax88172_link_reset(struct usbnet *dev)
821{
822 u8 mode;
823 struct ethtool_cmd ecmd;
824
825 mii_check_media(&dev->mii, 1, 1);
826 mii_ethtool_gset(&dev->mii, &ecmd);
827 mode = AX88172_MEDIUM_DEFAULT;
828
829 if (ecmd.duplex != DUPLEX_FULL)
830 mode |= ~AX88172_MEDIUM_FD;
831
60b86755
JP
832 netdev_dbg(dev->net, "ax88172_link_reset() speed: %d duplex: %d setting mode to 0x%04x\n",
833 ecmd.speed, ecmd.duplex, mode);
933a27d3
DH
834
835 asix_write_medium_mode(dev, mode);
836
837 return 0;
2e55cc72
DB
838}
839
1703338c
SH
840static const struct net_device_ops ax88172_netdev_ops = {
841 .ndo_open = usbnet_open,
842 .ndo_stop = usbnet_stop,
843 .ndo_start_xmit = usbnet_start_xmit,
844 .ndo_tx_timeout = usbnet_tx_timeout,
845 .ndo_change_mtu = usbnet_change_mtu,
846 .ndo_set_mac_address = eth_mac_addr,
847 .ndo_validate_addr = eth_validate_addr,
848 .ndo_do_ioctl = asix_ioctl,
849 .ndo_set_multicast_list = ax88172_set_multicast,
850};
851
48b1be6a 852static int ax88172_bind(struct usbnet *dev, struct usb_interface *intf)
2e55cc72
DB
853{
854 int ret = 0;
51bf2976 855 u8 buf[ETH_ALEN];
2e55cc72
DB
856 int i;
857 unsigned long gpio_bits = dev->driver_info->data;
933a27d3
DH
858 struct asix_data *data = (struct asix_data *)&dev->data;
859
860 data->eeprom_len = AX88172_EEPROM_LEN;
2e55cc72
DB
861
862 usbnet_get_endpoints(dev,intf);
863
2e55cc72
DB
864 /* Toggle the GPIOs in a manufacturer/model specific way */
865 for (i = 2; i >= 0; i--) {
48b1be6a 866 if ((ret = asix_write_cmd(dev, AX_CMD_WRITE_GPIOS,
2e55cc72 867 (gpio_bits >> (i * 8)) & 0xff, 0, 0,
51bf2976
AV
868 NULL)) < 0)
869 goto out;
2e55cc72
DB
870 msleep(5);
871 }
872
933a27d3 873 if ((ret = asix_write_rx_ctl(dev, 0x80)) < 0)
51bf2976 874 goto out;
2e55cc72
DB
875
876 /* Get the MAC address */
933a27d3 877 if ((ret = asix_read_cmd(dev, AX88172_CMD_READ_NODE_ID,
51bf2976 878 0, 0, ETH_ALEN, buf)) < 0) {
2e55cc72 879 dbg("read AX_CMD_READ_NODE_ID failed: %d", ret);
51bf2976 880 goto out;
2e55cc72
DB
881 }
882 memcpy(dev->net->dev_addr, buf, ETH_ALEN);
883
2e55cc72
DB
884 /* Initialize MII structure */
885 dev->mii.dev = dev->net;
48b1be6a
DH
886 dev->mii.mdio_read = asix_mdio_read;
887 dev->mii.mdio_write = asix_mdio_write;
2e55cc72
DB
888 dev->mii.phy_id_mask = 0x3f;
889 dev->mii.reg_num_mask = 0x1f;
933a27d3 890 dev->mii.phy_id = asix_get_phy_addr(dev);
2e55cc72 891
1703338c 892 dev->net->netdev_ops = &ax88172_netdev_ops;
48b1be6a 893 dev->net->ethtool_ops = &ax88172_ethtool_ops;
2e55cc72 894
933a27d3
DH
895 asix_mdio_write(dev->net, dev->mii.phy_id, MII_BMCR, BMCR_RESET);
896 asix_mdio_write(dev->net, dev->mii.phy_id, MII_ADVERTISE,
2e55cc72
DB
897 ADVERTISE_ALL | ADVERTISE_CSMA | ADVERTISE_PAUSE_CAP);
898 mii_nway_restart(&dev->mii);
899
900 return 0;
51bf2976
AV
901
902out:
2e55cc72
DB
903 return ret;
904}
905
0fc0b732 906static const struct ethtool_ops ax88772_ethtool_ops = {
48b1be6a 907 .get_drvinfo = asix_get_drvinfo,
933a27d3 908 .get_link = asix_get_link,
2e55cc72
DB
909 .get_msglevel = usbnet_get_msglevel,
910 .set_msglevel = usbnet_set_msglevel,
48b1be6a
DH
911 .get_wol = asix_get_wol,
912 .set_wol = asix_set_wol,
913 .get_eeprom_len = asix_get_eeprom_len,
914 .get_eeprom = asix_get_eeprom,
c41286fd
AB
915 .get_settings = usbnet_get_settings,
916 .set_settings = usbnet_set_settings,
917 .nway_reset = usbnet_nway_reset,
2e55cc72
DB
918};
919
933a27d3
DH
920static int ax88772_link_reset(struct usbnet *dev)
921{
922 u16 mode;
923 struct ethtool_cmd ecmd;
924
925 mii_check_media(&dev->mii, 1, 1);
926 mii_ethtool_gset(&dev->mii, &ecmd);
927 mode = AX88772_MEDIUM_DEFAULT;
928
929 if (ecmd.speed != SPEED_100)
930 mode &= ~AX_MEDIUM_PS;
931
932 if (ecmd.duplex != DUPLEX_FULL)
933 mode &= ~AX_MEDIUM_FD;
934
60b86755
JP
935 netdev_dbg(dev->net, "ax88772_link_reset() speed: %d duplex: %d setting mode to 0x%04x\n",
936 ecmd.speed, ecmd.duplex, mode);
933a27d3
DH
937
938 asix_write_medium_mode(dev, mode);
939
940 return 0;
941}
942
1703338c
SH
943static const struct net_device_ops ax88772_netdev_ops = {
944 .ndo_open = usbnet_open,
945 .ndo_stop = usbnet_stop,
946 .ndo_start_xmit = usbnet_start_xmit,
947 .ndo_tx_timeout = usbnet_tx_timeout,
948 .ndo_change_mtu = usbnet_change_mtu,
7f29a3ba 949 .ndo_set_mac_address = asix_set_mac_address,
1703338c
SH
950 .ndo_validate_addr = eth_validate_addr,
951 .ndo_do_ioctl = asix_ioctl,
952 .ndo_set_multicast_list = asix_set_multicast,
953};
954
2e55cc72
DB
955static int ax88772_bind(struct usbnet *dev, struct usb_interface *intf)
956{
d0ffff8f 957 int ret, embd_phy;
933a27d3
DH
958 u16 rx_ctl;
959 struct asix_data *data = (struct asix_data *)&dev->data;
51bf2976 960 u8 buf[ETH_ALEN];
933a27d3
DH
961 u32 phyid;
962
963 data->eeprom_len = AX88772_EEPROM_LEN;
2e55cc72
DB
964
965 usbnet_get_endpoints(dev,intf);
966
933a27d3
DH
967 if ((ret = asix_write_gpio(dev,
968 AX_GPIO_RSE | AX_GPIO_GPO_2 | AX_GPIO_GPO2EN, 5)) < 0)
51bf2976 969 goto out;
2e55cc72 970
d0ffff8f
AS
971 /* 0x10 is the phy id of the embedded 10/100 ethernet phy */
972 embd_phy = ((asix_get_phy_addr(dev) & 0x1f) == 0x10 ? 1 : 0);
48b1be6a 973 if ((ret = asix_write_cmd(dev, AX_CMD_SW_PHY_SELECT,
51bf2976 974 embd_phy, 0, 0, NULL)) < 0) {
2e55cc72 975 dbg("Select PHY #1 failed: %d", ret);
51bf2976 976 goto out;
2e55cc72
DB
977 }
978
d0ffff8f 979 if ((ret = asix_sw_reset(dev, AX_SWRESET_IPPD | AX_SWRESET_PRL)) < 0)
51bf2976 980 goto out;
2e55cc72
DB
981
982 msleep(150);
48b1be6a 983 if ((ret = asix_sw_reset(dev, AX_SWRESET_CLEAR)) < 0)
51bf2976 984 goto out;
2e55cc72
DB
985
986 msleep(150);
d0ffff8f
AS
987 if (embd_phy) {
988 if ((ret = asix_sw_reset(dev, AX_SWRESET_IPRL)) < 0)
51bf2976 989 goto out;
d0ffff8f
AS
990 }
991 else {
992 if ((ret = asix_sw_reset(dev, AX_SWRESET_PRTE)) < 0)
51bf2976 993 goto out;
d0ffff8f 994 }
2e55cc72
DB
995
996 msleep(150);
933a27d3
DH
997 rx_ctl = asix_read_rx_ctl(dev);
998 dbg("RX_CTL is 0x%04x after software reset", rx_ctl);
999 if ((ret = asix_write_rx_ctl(dev, 0x0000)) < 0)
51bf2976 1000 goto out;
2e55cc72 1001
933a27d3
DH
1002 rx_ctl = asix_read_rx_ctl(dev);
1003 dbg("RX_CTL is 0x%04x setting to 0x0000", rx_ctl);
1004
2e55cc72 1005 /* Get the MAC address */
933a27d3 1006 if ((ret = asix_read_cmd(dev, AX_CMD_READ_NODE_ID,
2e55cc72
DB
1007 0, 0, ETH_ALEN, buf)) < 0) {
1008 dbg("Failed to read MAC address: %d", ret);
51bf2976 1009 goto out;
2e55cc72
DB
1010 }
1011 memcpy(dev->net->dev_addr, buf, ETH_ALEN);
1012
2e55cc72
DB
1013 /* Initialize MII structure */
1014 dev->mii.dev = dev->net;
48b1be6a
DH
1015 dev->mii.mdio_read = asix_mdio_read;
1016 dev->mii.mdio_write = asix_mdio_write;
933a27d3
DH
1017 dev->mii.phy_id_mask = 0x1f;
1018 dev->mii.reg_num_mask = 0x1f;
933a27d3
DH
1019 dev->mii.phy_id = asix_get_phy_addr(dev);
1020
1021 phyid = asix_get_phyid(dev);
1022 dbg("PHYID=0x%08x", phyid);
2e55cc72 1023
48b1be6a 1024 if ((ret = asix_sw_reset(dev, AX_SWRESET_PRL)) < 0)
51bf2976 1025 goto out;
2e55cc72 1026
2e55cc72 1027 msleep(150);
48b1be6a
DH
1028
1029 if ((ret = asix_sw_reset(dev, AX_SWRESET_IPRL | AX_SWRESET_PRL)) < 0)
51bf2976 1030 goto out;
2e55cc72 1031
48b1be6a 1032 msleep(150);
2e55cc72 1033
1703338c 1034 dev->net->netdev_ops = &ax88772_netdev_ops;
2e55cc72
DB
1035 dev->net->ethtool_ops = &ax88772_ethtool_ops;
1036
933a27d3
DH
1037 asix_mdio_write(dev->net, dev->mii.phy_id, MII_BMCR, BMCR_RESET);
1038 asix_mdio_write(dev->net, dev->mii.phy_id, MII_ADVERTISE,
2e55cc72
DB
1039 ADVERTISE_ALL | ADVERTISE_CSMA);
1040 mii_nway_restart(&dev->mii);
1041
933a27d3 1042 if ((ret = asix_write_medium_mode(dev, AX88772_MEDIUM_DEFAULT)) < 0)
51bf2976 1043 goto out;
2e55cc72 1044
48b1be6a 1045 if ((ret = asix_write_cmd(dev, AX_CMD_WRITE_IPG0,
2e55cc72 1046 AX88772_IPG0_DEFAULT | AX88772_IPG1_DEFAULT,
51bf2976 1047 AX88772_IPG2_DEFAULT, 0, NULL)) < 0) {
2e55cc72 1048 dbg("Write IPG,IPG1,IPG2 failed: %d", ret);
51bf2976 1049 goto out;
2e55cc72 1050 }
2e55cc72
DB
1051
1052 /* Set RX_CTL to default values with 2k buffer, and enable cactus */
933a27d3 1053 if ((ret = asix_write_rx_ctl(dev, AX_DEFAULT_RX_CTL)) < 0)
51bf2976 1054 goto out;
2e55cc72 1055
933a27d3
DH
1056 rx_ctl = asix_read_rx_ctl(dev);
1057 dbg("RX_CTL is 0x%04x after all initializations", rx_ctl);
1058
1059 rx_ctl = asix_read_medium_status(dev);
1060 dbg("Medium Status is 0x%04x after all initializations", rx_ctl);
1061
2e55cc72
DB
1062 /* Asix framing packs multiple eth frames into a 2K usb bulk transfer */
1063 if (dev->driver_info->flags & FLAG_FRAMING_AX) {
1064 /* hard_mtu is still the default - the device does not support
1065 jumbo eth frames */
1066 dev->rx_urb_size = 2048;
1067 }
2e55cc72
DB
1068 return 0;
1069
51bf2976 1070out:
2e55cc72
DB
1071 return ret;
1072}
1073
933a27d3
DH
1074static struct ethtool_ops ax88178_ethtool_ops = {
1075 .get_drvinfo = asix_get_drvinfo,
1076 .get_link = asix_get_link,
933a27d3
DH
1077 .get_msglevel = usbnet_get_msglevel,
1078 .set_msglevel = usbnet_set_msglevel,
1079 .get_wol = asix_get_wol,
1080 .set_wol = asix_set_wol,
1081 .get_eeprom_len = asix_get_eeprom_len,
1082 .get_eeprom = asix_get_eeprom,
c41286fd
AB
1083 .get_settings = usbnet_get_settings,
1084 .set_settings = usbnet_set_settings,
1085 .nway_reset = usbnet_nway_reset,
933a27d3
DH
1086};
1087
1088static int marvell_phy_init(struct usbnet *dev)
2e55cc72 1089{
933a27d3
DH
1090 struct asix_data *data = (struct asix_data *)&dev->data;
1091 u16 reg;
2e55cc72 1092
60b86755 1093 netdev_dbg(dev->net, "marvell_phy_init()\n");
2e55cc72 1094
933a27d3 1095 reg = asix_mdio_read(dev->net, dev->mii.phy_id, MII_MARVELL_STATUS);
60b86755 1096 netdev_dbg(dev->net, "MII_MARVELL_STATUS = 0x%04x\n", reg);
2e55cc72 1097
933a27d3
DH
1098 asix_mdio_write(dev->net, dev->mii.phy_id, MII_MARVELL_CTRL,
1099 MARVELL_CTRL_RXDELAY | MARVELL_CTRL_TXDELAY);
2e55cc72 1100
933a27d3
DH
1101 if (data->ledmode) {
1102 reg = asix_mdio_read(dev->net, dev->mii.phy_id,
1103 MII_MARVELL_LED_CTRL);
60b86755 1104 netdev_dbg(dev->net, "MII_MARVELL_LED_CTRL (1) = 0x%04x\n", reg);
2e55cc72 1105
933a27d3
DH
1106 reg &= 0xf8ff;
1107 reg |= (1 + 0x0100);
1108 asix_mdio_write(dev->net, dev->mii.phy_id,
1109 MII_MARVELL_LED_CTRL, reg);
2e55cc72 1110
933a27d3
DH
1111 reg = asix_mdio_read(dev->net, dev->mii.phy_id,
1112 MII_MARVELL_LED_CTRL);
60b86755 1113 netdev_dbg(dev->net, "MII_MARVELL_LED_CTRL (2) = 0x%04x\n", reg);
933a27d3
DH
1114 reg &= 0xfc0f;
1115 }
2e55cc72 1116
933a27d3
DH
1117 return 0;
1118}
1119
1120static int marvell_led_status(struct usbnet *dev, u16 speed)
1121{
1122 u16 reg = asix_mdio_read(dev->net, dev->mii.phy_id, MARVELL_LED_MANUAL);
1123
60b86755 1124 netdev_dbg(dev->net, "marvell_led_status() read 0x%04x\n", reg);
933a27d3
DH
1125
1126 /* Clear out the center LED bits - 0x03F0 */
1127 reg &= 0xfc0f;
1128
1129 switch (speed) {
1130 case SPEED_1000:
1131 reg |= 0x03e0;
1132 break;
1133 case SPEED_100:
1134 reg |= 0x03b0;
1135 break;
1136 default:
1137 reg |= 0x02f0;
2e55cc72
DB
1138 }
1139
60b86755 1140 netdev_dbg(dev->net, "marvell_led_status() writing 0x%04x\n", reg);
933a27d3
DH
1141 asix_mdio_write(dev->net, dev->mii.phy_id, MARVELL_LED_MANUAL, reg);
1142
1143 return 0;
1144}
1145
1146static int ax88178_link_reset(struct usbnet *dev)
1147{
1148 u16 mode;
1149 struct ethtool_cmd ecmd;
1150 struct asix_data *data = (struct asix_data *)&dev->data;
1151
60b86755 1152 netdev_dbg(dev->net, "ax88178_link_reset()\n");
933a27d3
DH
1153
1154 mii_check_media(&dev->mii, 1, 1);
1155 mii_ethtool_gset(&dev->mii, &ecmd);
1156 mode = AX88178_MEDIUM_DEFAULT;
1157
1158 if (ecmd.speed == SPEED_1000)
a7f75c0c 1159 mode |= AX_MEDIUM_GM;
933a27d3
DH
1160 else if (ecmd.speed == SPEED_100)
1161 mode |= AX_MEDIUM_PS;
1162 else
1163 mode &= ~(AX_MEDIUM_PS | AX_MEDIUM_GM);
1164
a7f75c0c
PK
1165 mode |= AX_MEDIUM_ENCK;
1166
933a27d3
DH
1167 if (ecmd.duplex == DUPLEX_FULL)
1168 mode |= AX_MEDIUM_FD;
1169 else
1170 mode &= ~AX_MEDIUM_FD;
1171
60b86755
JP
1172 netdev_dbg(dev->net, "ax88178_link_reset() speed: %d duplex: %d setting mode to 0x%04x\n",
1173 ecmd.speed, ecmd.duplex, mode);
933a27d3
DH
1174
1175 asix_write_medium_mode(dev, mode);
1176
1177 if (data->phymode == PHY_MODE_MARVELL && data->ledmode)
1178 marvell_led_status(dev, ecmd.speed);
1179
1180 return 0;
1181}
1182
1183static void ax88178_set_mfb(struct usbnet *dev)
1184{
1185 u16 mfb = AX_RX_CTL_MFB_16384;
1186 u16 rxctl;
1187 u16 medium;
1188 int old_rx_urb_size = dev->rx_urb_size;
1189
1190 if (dev->hard_mtu < 2048) {
1191 dev->rx_urb_size = 2048;
1192 mfb = AX_RX_CTL_MFB_2048;
1193 } else if (dev->hard_mtu < 4096) {
1194 dev->rx_urb_size = 4096;
1195 mfb = AX_RX_CTL_MFB_4096;
1196 } else if (dev->hard_mtu < 8192) {
1197 dev->rx_urb_size = 8192;
1198 mfb = AX_RX_CTL_MFB_8192;
1199 } else if (dev->hard_mtu < 16384) {
1200 dev->rx_urb_size = 16384;
1201 mfb = AX_RX_CTL_MFB_16384;
2e55cc72 1202 }
933a27d3
DH
1203
1204 rxctl = asix_read_rx_ctl(dev);
1205 asix_write_rx_ctl(dev, (rxctl & ~AX_RX_CTL_MFB_16384) | mfb);
1206
1207 medium = asix_read_medium_status(dev);
1208 if (dev->net->mtu > 1500)
1209 medium |= AX_MEDIUM_JFE;
1210 else
1211 medium &= ~AX_MEDIUM_JFE;
1212 asix_write_medium_mode(dev, medium);
1213
1214 if (dev->rx_urb_size > old_rx_urb_size)
1215 usbnet_unlink_rx_urbs(dev);
2e55cc72
DB
1216}
1217
933a27d3 1218static int ax88178_change_mtu(struct net_device *net, int new_mtu)
2e55cc72 1219{
933a27d3
DH
1220 struct usbnet *dev = netdev_priv(net);
1221 int ll_mtu = new_mtu + net->hard_header_len + 4;
2e55cc72 1222
60b86755 1223 netdev_dbg(dev->net, "ax88178_change_mtu() new_mtu=%d\n", new_mtu);
2e55cc72 1224
933a27d3
DH
1225 if (new_mtu <= 0 || ll_mtu > 16384)
1226 return -EINVAL;
1227
1228 if ((ll_mtu % dev->maxpacket) == 0)
1229 return -EDOM;
1230
1231 net->mtu = new_mtu;
1232 dev->hard_mtu = net->mtu + net->hard_header_len;
1233 ax88178_set_mfb(dev);
1234
1235 return 0;
1236}
1237
1703338c
SH
1238static const struct net_device_ops ax88178_netdev_ops = {
1239 .ndo_open = usbnet_open,
1240 .ndo_stop = usbnet_stop,
1241 .ndo_start_xmit = usbnet_start_xmit,
1242 .ndo_tx_timeout = usbnet_tx_timeout,
7f29a3ba 1243 .ndo_set_mac_address = asix_set_mac_address,
1703338c
SH
1244 .ndo_validate_addr = eth_validate_addr,
1245 .ndo_set_multicast_list = asix_set_multicast,
1246 .ndo_do_ioctl = asix_ioctl,
1247 .ndo_change_mtu = ax88178_change_mtu,
1248};
1249
933a27d3
DH
1250static int ax88178_bind(struct usbnet *dev, struct usb_interface *intf)
1251{
1252 struct asix_data *data = (struct asix_data *)&dev->data;
1253 int ret;
51bf2976
AV
1254 u8 buf[ETH_ALEN];
1255 __le16 eeprom;
1256 u8 status;
933a27d3
DH
1257 int gpio0 = 0;
1258 u32 phyid;
1259
1260 usbnet_get_endpoints(dev,intf);
1261
51bf2976
AV
1262 asix_read_cmd(dev, AX_CMD_READ_GPIOS, 0, 0, 1, &status);
1263 dbg("GPIO Status: 0x%04x", status);
933a27d3
DH
1264
1265 asix_write_cmd(dev, AX_CMD_WRITE_ENABLE, 0, 0, 0, NULL);
1266 asix_read_cmd(dev, AX_CMD_READ_EEPROM, 0x0017, 0, 2, &eeprom);
1267 asix_write_cmd(dev, AX_CMD_WRITE_DISABLE, 0, 0, 0, NULL);
1268
1269 dbg("EEPROM index 0x17 is 0x%04x", eeprom);
1270
51bf2976 1271 if (eeprom == cpu_to_le16(0xffff)) {
933a27d3
DH
1272 data->phymode = PHY_MODE_MARVELL;
1273 data->ledmode = 0;
1274 gpio0 = 1;
2e55cc72 1275 } else {
51bf2976
AV
1276 data->phymode = le16_to_cpu(eeprom) & 7;
1277 data->ledmode = le16_to_cpu(eeprom) >> 8;
1278 gpio0 = (le16_to_cpu(eeprom) & 0x80) ? 0 : 1;
2e55cc72 1279 }
933a27d3 1280 dbg("GPIO0: %d, PhyMode: %d", gpio0, data->phymode);
2e55cc72 1281
933a27d3 1282 asix_write_gpio(dev, AX_GPIO_RSE | AX_GPIO_GPO_1 | AX_GPIO_GPO1EN, 40);
51bf2976 1283 if ((le16_to_cpu(eeprom) >> 8) != 1) {
933a27d3
DH
1284 asix_write_gpio(dev, 0x003c, 30);
1285 asix_write_gpio(dev, 0x001c, 300);
1286 asix_write_gpio(dev, 0x003c, 30);
1287 } else {
1288 dbg("gpio phymode == 1 path");
1289 asix_write_gpio(dev, AX_GPIO_GPO1EN, 30);
1290 asix_write_gpio(dev, AX_GPIO_GPO1EN | AX_GPIO_GPO_1, 30);
1291 }
2e55cc72 1292
933a27d3
DH
1293 asix_sw_reset(dev, 0);
1294 msleep(150);
1295
1296 asix_sw_reset(dev, AX_SWRESET_PRL | AX_SWRESET_IPPD);
1297 msleep(150);
1298
1299 asix_write_rx_ctl(dev, 0);
1300
1301 /* Get the MAC address */
933a27d3
DH
1302 if ((ret = asix_read_cmd(dev, AX_CMD_READ_NODE_ID,
1303 0, 0, ETH_ALEN, buf)) < 0) {
1304 dbg("Failed to read MAC address: %d", ret);
51bf2976 1305 goto out;
2e55cc72 1306 }
933a27d3 1307 memcpy(dev->net->dev_addr, buf, ETH_ALEN);
2e55cc72 1308
933a27d3
DH
1309 /* Initialize MII structure */
1310 dev->mii.dev = dev->net;
1311 dev->mii.mdio_read = asix_mdio_read;
1312 dev->mii.mdio_write = asix_mdio_write;
1313 dev->mii.phy_id_mask = 0x1f;
1314 dev->mii.reg_num_mask = 0xff;
1315 dev->mii.supports_gmii = 1;
933a27d3 1316 dev->mii.phy_id = asix_get_phy_addr(dev);
1703338c
SH
1317
1318 dev->net->netdev_ops = &ax88178_netdev_ops;
933a27d3 1319 dev->net->ethtool_ops = &ax88178_ethtool_ops;
2e55cc72 1320
933a27d3
DH
1321 phyid = asix_get_phyid(dev);
1322 dbg("PHYID=0x%08x", phyid);
2e55cc72 1323
933a27d3
DH
1324 if (data->phymode == PHY_MODE_MARVELL) {
1325 marvell_phy_init(dev);
1326 msleep(60);
1327 }
1328
1329 asix_mdio_write(dev->net, dev->mii.phy_id, MII_BMCR,
1330 BMCR_RESET | BMCR_ANENABLE);
1331 asix_mdio_write(dev->net, dev->mii.phy_id, MII_ADVERTISE,
1332 ADVERTISE_ALL | ADVERTISE_CSMA | ADVERTISE_PAUSE_CAP);
1333 asix_mdio_write(dev->net, dev->mii.phy_id, MII_CTRL1000,
1334 ADVERTISE_1000FULL);
1335
1336 mii_nway_restart(&dev->mii);
1337
1338 if ((ret = asix_write_medium_mode(dev, AX88178_MEDIUM_DEFAULT)) < 0)
51bf2976 1339 goto out;
933a27d3
DH
1340
1341 if ((ret = asix_write_rx_ctl(dev, AX_DEFAULT_RX_CTL)) < 0)
51bf2976 1342 goto out;
933a27d3
DH
1343
1344 /* Asix framing packs multiple eth frames into a 2K usb bulk transfer */
1345 if (dev->driver_info->flags & FLAG_FRAMING_AX) {
1346 /* hard_mtu is still the default - the device does not support
1347 jumbo eth frames */
1348 dev->rx_urb_size = 2048;
1349 }
2e55cc72 1350 return 0;
933a27d3 1351
51bf2976 1352out:
933a27d3 1353 return ret;
2e55cc72
DB
1354}
1355
1356static const struct driver_info ax8817x_info = {
1357 .description = "ASIX AX8817x USB 2.0 Ethernet",
48b1be6a
DH
1358 .bind = ax88172_bind,
1359 .status = asix_status,
2e55cc72
DB
1360 .link_reset = ax88172_link_reset,
1361 .reset = ax88172_link_reset,
37e8273c 1362 .flags = FLAG_ETHER | FLAG_LINK_INTR,
2e55cc72
DB
1363 .data = 0x00130103,
1364};
1365
1366static const struct driver_info dlink_dub_e100_info = {
1367 .description = "DLink DUB-E100 USB Ethernet",
48b1be6a
DH
1368 .bind = ax88172_bind,
1369 .status = asix_status,
2e55cc72
DB
1370 .link_reset = ax88172_link_reset,
1371 .reset = ax88172_link_reset,
37e8273c 1372 .flags = FLAG_ETHER | FLAG_LINK_INTR,
2e55cc72
DB
1373 .data = 0x009f9d9f,
1374};
1375
1376static const struct driver_info netgear_fa120_info = {
1377 .description = "Netgear FA-120 USB Ethernet",
48b1be6a
DH
1378 .bind = ax88172_bind,
1379 .status = asix_status,
2e55cc72
DB
1380 .link_reset = ax88172_link_reset,
1381 .reset = ax88172_link_reset,
37e8273c 1382 .flags = FLAG_ETHER | FLAG_LINK_INTR,
2e55cc72
DB
1383 .data = 0x00130103,
1384};
1385
1386static const struct driver_info hawking_uf200_info = {
1387 .description = "Hawking UF200 USB Ethernet",
48b1be6a
DH
1388 .bind = ax88172_bind,
1389 .status = asix_status,
2e55cc72
DB
1390 .link_reset = ax88172_link_reset,
1391 .reset = ax88172_link_reset,
37e8273c 1392 .flags = FLAG_ETHER | FLAG_LINK_INTR,
2e55cc72
DB
1393 .data = 0x001f1d1f,
1394};
1395
1396static const struct driver_info ax88772_info = {
1397 .description = "ASIX AX88772 USB 2.0 Ethernet",
1398 .bind = ax88772_bind,
48b1be6a 1399 .status = asix_status,
2e55cc72
DB
1400 .link_reset = ax88772_link_reset,
1401 .reset = ax88772_link_reset,
37e8273c 1402 .flags = FLAG_ETHER | FLAG_FRAMING_AX | FLAG_LINK_INTR,
933a27d3
DH
1403 .rx_fixup = asix_rx_fixup,
1404 .tx_fixup = asix_tx_fixup,
1405};
1406
1407static const struct driver_info ax88178_info = {
1408 .description = "ASIX AX88178 USB 2.0 Ethernet",
1409 .bind = ax88178_bind,
1410 .status = asix_status,
1411 .link_reset = ax88178_link_reset,
1412 .reset = ax88178_link_reset,
37e8273c 1413 .flags = FLAG_ETHER | FLAG_FRAMING_AX | FLAG_LINK_INTR,
933a27d3
DH
1414 .rx_fixup = asix_rx_fixup,
1415 .tx_fixup = asix_tx_fixup,
2e55cc72
DB
1416};
1417
1418static const struct usb_device_id products [] = {
1419{
1420 // Linksys USB200M
1421 USB_DEVICE (0x077b, 0x2226),
1422 .driver_info = (unsigned long) &ax8817x_info,
1423}, {
1424 // Netgear FA120
1425 USB_DEVICE (0x0846, 0x1040),
1426 .driver_info = (unsigned long) &netgear_fa120_info,
1427}, {
1428 // DLink DUB-E100
1429 USB_DEVICE (0x2001, 0x1a00),
1430 .driver_info = (unsigned long) &dlink_dub_e100_info,
1431}, {
1432 // Intellinet, ST Lab USB Ethernet
1433 USB_DEVICE (0x0b95, 0x1720),
1434 .driver_info = (unsigned long) &ax8817x_info,
1435}, {
1436 // Hawking UF200, TrendNet TU2-ET100
1437 USB_DEVICE (0x07b8, 0x420a),
1438 .driver_info = (unsigned long) &hawking_uf200_info,
1439}, {
39c4b38c
DH
1440 // Billionton Systems, USB2AR
1441 USB_DEVICE (0x08dd, 0x90ff),
1442 .driver_info = (unsigned long) &ax8817x_info,
2e55cc72
DB
1443}, {
1444 // ATEN UC210T
1445 USB_DEVICE (0x0557, 0x2009),
1446 .driver_info = (unsigned long) &ax8817x_info,
1447}, {
1448 // Buffalo LUA-U2-KTX
1449 USB_DEVICE (0x0411, 0x003d),
1450 .driver_info = (unsigned long) &ax8817x_info,
ac7b77f1
MD
1451}, {
1452 // Buffalo LUA-U2-GT 10/100/1000
1453 USB_DEVICE (0x0411, 0x006e),
1454 .driver_info = (unsigned long) &ax88178_info,
2e55cc72
DB
1455}, {
1456 // Sitecom LN-029 "USB 2.0 10/100 Ethernet adapter"
1457 USB_DEVICE (0x6189, 0x182d),
1458 .driver_info = (unsigned long) &ax8817x_info,
1459}, {
1460 // corega FEther USB2-TX
1461 USB_DEVICE (0x07aa, 0x0017),
1462 .driver_info = (unsigned long) &ax8817x_info,
1463}, {
1464 // Surecom EP-1427X-2
1465 USB_DEVICE (0x1189, 0x0893),
1466 .driver_info = (unsigned long) &ax8817x_info,
1467}, {
1468 // goodway corp usb gwusb2e
1469 USB_DEVICE (0x1631, 0x6200),
1470 .driver_info = (unsigned long) &ax8817x_info,
39c4b38c
DH
1471}, {
1472 // JVC MP-PRX1 Port Replicator
1473 USB_DEVICE (0x04f1, 0x3008),
1474 .driver_info = (unsigned long) &ax8817x_info,
2e55cc72
DB
1475}, {
1476 // ASIX AX88772 10/100
39c4b38c
DH
1477 USB_DEVICE (0x0b95, 0x7720),
1478 .driver_info = (unsigned long) &ax88772_info,
7327413c
EW
1479}, {
1480 // ASIX AX88178 10/100/1000
1481 USB_DEVICE (0x0b95, 0x1780),
933a27d3 1482 .driver_info = (unsigned long) &ax88178_info,
5e0f76c6
DH
1483}, {
1484 // Linksys USB200M Rev 2
1485 USB_DEVICE (0x13b1, 0x0018),
1486 .driver_info = (unsigned long) &ax88772_info,
5732ce84
DH
1487}, {
1488 // 0Q0 cable ethernet
1489 USB_DEVICE (0x1557, 0x7720),
1490 .driver_info = (unsigned long) &ax88772_info,
933a27d3
DH
1491}, {
1492 // DLink DUB-E100 H/W Ver B1
1493 USB_DEVICE (0x07d1, 0x3c05),
1494 .driver_info = (unsigned long) &ax88772_info,
b923e7fc
DH
1495}, {
1496 // DLink DUB-E100 H/W Ver B1 Alternate
1497 USB_DEVICE (0x2001, 0x3c05),
1498 .driver_info = (unsigned long) &ax88772_info,
933a27d3
DH
1499}, {
1500 // Linksys USB1000
1501 USB_DEVICE (0x1737, 0x0039),
1502 .driver_info = (unsigned long) &ax88178_info,
b29cf31d
YH
1503}, {
1504 // IO-DATA ETG-US2
1505 USB_DEVICE (0x04bb, 0x0930),
1506 .driver_info = (unsigned long) &ax88178_info,
2ed22bc2
DH
1507}, {
1508 // Belkin F5D5055
1509 USB_DEVICE(0x050d, 0x5055),
1510 .driver_info = (unsigned long) &ax88178_info,
3d60efb5
AN
1511}, {
1512 // Apple USB Ethernet Adapter
1513 USB_DEVICE(0x05ac, 0x1402),
1514 .driver_info = (unsigned long) &ax88772_info,
ccf95402
JC
1515}, {
1516 // Cables-to-Go USB Ethernet Adapter
1517 USB_DEVICE(0x0b95, 0x772a),
1518 .driver_info = (unsigned long) &ax88772_info,
fef7cc08
GKH
1519}, {
1520 // ABOCOM for pci
1521 USB_DEVICE(0x14ea, 0xab11),
1522 .driver_info = (unsigned long) &ax88178_info,
1523}, {
1524 // ASIX 88772a
1525 USB_DEVICE(0x0db0, 0xa877),
1526 .driver_info = (unsigned long) &ax88772_info,
2e55cc72
DB
1527},
1528 { }, // END
1529};
1530MODULE_DEVICE_TABLE(usb, products);
1531
1532static struct usb_driver asix_driver = {
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1533 .name = "asix",
1534 .id_table = products,
1535 .probe = usbnet_probe,
1536 .suspend = usbnet_suspend,
1537 .resume = usbnet_resume,
1538 .disconnect = usbnet_disconnect,
a11a6544 1539 .supports_autosuspend = 1,
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1540};
1541
1542static int __init asix_init(void)
1543{
1544 return usb_register(&asix_driver);
1545}
1546module_init(asix_init);
1547
1548static void __exit asix_exit(void)
1549{
1550 usb_deregister(&asix_driver);
1551}
1552module_exit(asix_exit);
1553
1554MODULE_AUTHOR("David Hollis");
1555MODULE_DESCRIPTION("ASIX AX8817X based USB 2.0 Ethernet Devices");
1556MODULE_LICENSE("GPL");
1557