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bdcd8170 KV |
1 | /* |
2 | * Copyright (c) 2010-2011 Atheros Communications Inc. | |
1b2df407 | 3 | * Copyright (c) 2011-2012 Qualcomm Atheros, Inc. |
bdcd8170 KV |
4 | * |
5 | * Permission to use, copy, modify, and/or distribute this software for any | |
6 | * purpose with or without fee is hereby granted, provided that the above | |
7 | * copyright notice and this permission notice appear in all copies. | |
8 | * | |
9 | * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES | |
10 | * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF | |
11 | * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR | |
12 | * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES | |
13 | * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN | |
14 | * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF | |
15 | * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. | |
16 | */ | |
17 | ||
18 | #ifndef CORE_H | |
19 | #define CORE_H | |
20 | ||
21 | #include <linux/etherdevice.h> | |
22 | #include <linux/rtnetlink.h> | |
23 | #include <linux/firmware.h> | |
24 | #include <linux/sched.h> | |
bdf5396b | 25 | #include <linux/circ_buf.h> |
bdcd8170 KV |
26 | #include <net/cfg80211.h> |
27 | #include "htc.h" | |
28 | #include "wmi.h" | |
29 | #include "bmi.h" | |
bc07ddb2 | 30 | #include "target.h" |
bdcd8170 KV |
31 | |
32 | #define MAX_ATH6KL 1 | |
33 | #define ATH6KL_MAX_RX_BUFFERS 16 | |
34 | #define ATH6KL_BUFFER_SIZE 1664 | |
35 | #define ATH6KL_MAX_AMSDU_RX_BUFFERS 4 | |
36 | #define ATH6KL_AMSDU_REFILL_THRESHOLD 3 | |
37 | #define ATH6KL_AMSDU_BUFFER_SIZE (WMI_MAX_AMSDU_RX_DATA_FRAME_LENGTH + 128) | |
38 | #define MAX_MSDU_SUBFRAME_PAYLOAD_LEN 1508 | |
39 | #define MIN_MSDU_SUBFRAME_PAYLOAD_LEN 46 | |
40 | ||
41 | #define USER_SAVEDKEYS_STAT_INIT 0 | |
42 | #define USER_SAVEDKEYS_STAT_RUN 1 | |
43 | ||
44 | #define ATH6KL_TX_TIMEOUT 10 | |
45 | #define ATH6KL_MAX_ENDPOINTS 4 | |
46 | #define MAX_NODE_NUM 15 | |
47 | ||
c1762a3f TP |
48 | #define ATH6KL_APSD_ALL_FRAME 0xFFFF |
49 | #define ATH6KL_APSD_NUM_OF_AC 0x4 | |
50 | #define ATH6KL_APSD_FRAME_MASK 0xF | |
51 | ||
1df94a85 VT |
52 | /* Extra bytes for htc header alignment */ |
53 | #define ATH6KL_HTC_ALIGN_BYTES 3 | |
54 | ||
bdcd8170 KV |
55 | /* MAX_HI_COOKIE_NUM are reserved for high priority traffic */ |
56 | #define MAX_DEF_COOKIE_NUM 180 | |
57 | #define MAX_HI_COOKIE_NUM 18 /* 10% of MAX_COOKIE_NUM */ | |
58 | #define MAX_COOKIE_NUM (MAX_DEF_COOKIE_NUM + MAX_HI_COOKIE_NUM) | |
59 | ||
60 | #define MAX_DEFAULT_SEND_QUEUE_DEPTH (MAX_DEF_COOKIE_NUM / WMM_NUM_AC) | |
61 | ||
62 | #define DISCON_TIMER_INTVAL 10000 /* in msec */ | |
bdcd8170 | 63 | |
13423c31 VT |
64 | /* Channel dwell time in fg scan */ |
65 | #define ATH6KL_FG_SCAN_INTERVAL 50 /* in ms */ | |
66 | ||
50d41234 KV |
67 | /* includes also the null byte */ |
68 | #define ATH6KL_FIRMWARE_MAGIC "QCA-ATH6KL" | |
69 | ||
70 | enum ath6kl_fw_ie_type { | |
71 | ATH6KL_FW_IE_FW_VERSION = 0, | |
72 | ATH6KL_FW_IE_TIMESTAMP = 1, | |
73 | ATH6KL_FW_IE_OTP_IMAGE = 2, | |
74 | ATH6KL_FW_IE_FW_IMAGE = 3, | |
75 | ATH6KL_FW_IE_PATCH_IMAGE = 4, | |
8a137480 | 76 | ATH6KL_FW_IE_RESERVED_RAM_SIZE = 5, |
97e0496d | 77 | ATH6KL_FW_IE_CAPABILITIES = 6, |
1b4304da | 78 | ATH6KL_FW_IE_PATCH_ADDR = 7, |
03ef0250 | 79 | ATH6KL_FW_IE_BOARD_ADDR = 8, |
368b1b0f | 80 | ATH6KL_FW_IE_VIF_MAX = 9, |
50d41234 KV |
81 | }; |
82 | ||
97e0496d KV |
83 | enum ath6kl_fw_capability { |
84 | ATH6KL_FW_CAPABILITY_HOST_P2P = 0, | |
10509f90 | 85 | ATH6KL_FW_CAPABILITY_SCHED_SCAN = 1, |
97e0496d | 86 | |
3ca9d1fc AT |
87 | /* |
88 | * Firmware is capable of supporting P2P mgmt operations on a | |
89 | * station interface. After group formation, the station | |
90 | * interface will become a P2P client/GO interface as the case may be | |
91 | */ | |
92 | ATH6KL_FW_CAPABILITY_STA_P2PDEV_DUPLEX, | |
93 | ||
03bdeb0d VT |
94 | /* |
95 | * Firmware has support to cleanup inactive stations | |
96 | * in AP mode. | |
97 | */ | |
98 | ATH6KL_FW_CAPABILITY_INACTIVITY_TIMEOUT, | |
99 | ||
d97c121b VT |
100 | /* Firmware has support to override rsn cap of rsn ie */ |
101 | ATH6KL_FW_CAPABILITY_RSN_CAP_OVERRIDE, | |
102 | ||
6821d4f0 NG |
103 | /* |
104 | * Multicast support in WOW and host awake mode. | |
105 | * Allow all multicast in host awake mode. | |
106 | * Apply multicast filter in WOW mode. | |
107 | */ | |
108 | ATH6KL_FW_CAPABILITY_WOW_MULTICAST_FILTER, | |
109 | ||
c422d52d TP |
110 | /* Firmware supports enhanced bmiss detection */ |
111 | ATH6KL_FW_CAPABILITY_BMISS_ENHANCE, | |
112 | ||
dd45b759 NS |
113 | /* |
114 | * FW supports matching of ssid in schedule scan | |
115 | */ | |
116 | ATH6KL_FW_CAPABILITY_SCHED_SCAN_MATCH_LIST, | |
117 | ||
85b20fc2 TP |
118 | /* Firmware supports filtering BSS results by RSSI */ |
119 | ATH6KL_FW_CAPABILITY_RSSI_SCAN_THOLD, | |
120 | ||
c95dcb59 AT |
121 | /* FW sets mac_addr[4] ^= 0x80 for newly created interfaces */ |
122 | ATH6KL_FW_CAPABILITY_CUSTOM_MAC_ADDR, | |
123 | ||
279b2862 TP |
124 | /* Firmware supports TX error rate notification */ |
125 | ATH6KL_FW_CAPABILITY_TX_ERR_NOTIFY, | |
126 | ||
84841ba2 KV |
127 | /* supports WMI_SET_REGDOMAIN_CMDID command */ |
128 | ATH6KL_FW_CAPABILITY_REGDOMAIN, | |
129 | ||
b1f47e3a TP |
130 | /* Firmware supports sched scan decoupled from host sleep */ |
131 | ATH6KL_FW_CAPABILITY_SCHED_SCAN_V2, | |
132 | ||
92332993 VT |
133 | /* |
134 | * Firmware capability for hang detection through heart beat | |
135 | * challenge messages. | |
136 | */ | |
137 | ATH6KL_FW_CAPABILITY_HEART_BEAT_POLL, | |
138 | ||
eba95bce KV |
139 | /* WMI_SET_TX_SELECT_RATES_CMDID uses 64 bit size rate table */ |
140 | ATH6KL_FW_CAPABILITY_64BIT_RATES, | |
141 | ||
142 | /* WMI_AP_CONN_INACT_CMDID uses minutes as units */ | |
143 | ATH6KL_FW_CAPABILITY_AP_INACTIVITY_MINS, | |
144 | ||
145 | /* use low priority endpoint for all data */ | |
146 | ATH6KL_FW_CAPABILITY_MAP_LP_ENDPOINT, | |
147 | ||
c1d32d30 JW |
148 | /* ratetable is the 2 stream version (max MCS15) */ |
149 | ATH6KL_FW_CAPABILITY_RATETABLE_MCS15, | |
150 | ||
8a9a3efa | 151 | /* firmware doesn't support IP checksumming */ |
78803770 JW |
152 | ATH6KL_FW_CAPABILITY_NO_IP_CHECKSUM, |
153 | ||
97e0496d KV |
154 | /* this needs to be last */ |
155 | ATH6KL_FW_CAPABILITY_MAX, | |
156 | }; | |
157 | ||
158 | #define ATH6KL_CAPABILITY_LEN (ALIGN(ATH6KL_FW_CAPABILITY_MAX, 32) / 32) | |
159 | ||
50d41234 KV |
160 | struct ath6kl_fw_ie { |
161 | __le32 id; | |
162 | __le32 len; | |
163 | u8 data[0]; | |
164 | }; | |
165 | ||
06e360ac | 166 | enum ath6kl_hw_flags { |
a2e1be33 | 167 | ATH6KL_HW_SDIO_CRC_ERROR_WAR = BIT(3), |
06e360ac BS |
168 | }; |
169 | ||
c0038972 | 170 | #define ATH6KL_FW_API2_FILE "fw-2.bin" |
65a8b4cc | 171 | #define ATH6KL_FW_API3_FILE "fw-3.bin" |
b1f47e3a | 172 | #define ATH6KL_FW_API4_FILE "fw-4.bin" |
78803770 | 173 | #define ATH6KL_FW_API5_FILE "fw-5.bin" |
c0038972 | 174 | |
bdcd8170 | 175 | /* AR6003 1.0 definitions */ |
0d0192ba | 176 | #define AR6003_HW_1_0_VERSION 0x300002ba |
bdcd8170 KV |
177 | |
178 | /* AR6003 2.0 definitions */ | |
0d0192ba KV |
179 | #define AR6003_HW_2_0_VERSION 0x30000384 |
180 | #define AR6003_HW_2_0_PATCH_DOWNLOAD_ADDRESS 0x57e910 | |
c0038972 KV |
181 | #define AR6003_HW_2_0_FW_DIR "ath6k/AR6003/hw2.0" |
182 | #define AR6003_HW_2_0_OTP_FILE "otp.bin.z77" | |
183 | #define AR6003_HW_2_0_FIRMWARE_FILE "athwlan.bin.z77" | |
184 | #define AR6003_HW_2_0_TCMD_FIRMWARE_FILE "athtcmd_ram.bin" | |
185 | #define AR6003_HW_2_0_PATCH_FILE "data.patch.bin" | |
2023dbb8 | 186 | #define AR6003_HW_2_0_BOARD_DATA_FILE AR6003_HW_2_0_FW_DIR "/bdata.bin" |
0d0192ba | 187 | #define AR6003_HW_2_0_DEFAULT_BOARD_DATA_FILE \ |
2023dbb8 | 188 | AR6003_HW_2_0_FW_DIR "/bdata.SD31.bin" |
bdcd8170 KV |
189 | |
190 | /* AR6003 3.0 definitions */ | |
0d0192ba | 191 | #define AR6003_HW_2_1_1_VERSION 0x30000582 |
c0038972 KV |
192 | #define AR6003_HW_2_1_1_FW_DIR "ath6k/AR6003/hw2.1.1" |
193 | #define AR6003_HW_2_1_1_OTP_FILE "otp.bin" | |
194 | #define AR6003_HW_2_1_1_FIRMWARE_FILE "athwlan.bin" | |
195 | #define AR6003_HW_2_1_1_TCMD_FIRMWARE_FILE "athtcmd_ram.bin" | |
cd23c1c9 AY |
196 | #define AR6003_HW_2_1_1_UTF_FIRMWARE_FILE "utf.bin" |
197 | #define AR6003_HW_2_1_1_TESTSCRIPT_FILE "nullTestFlow.bin" | |
c0038972 | 198 | #define AR6003_HW_2_1_1_PATCH_FILE "data.patch.bin" |
2023dbb8 | 199 | #define AR6003_HW_2_1_1_BOARD_DATA_FILE AR6003_HW_2_1_1_FW_DIR "/bdata.bin" |
0d0192ba | 200 | #define AR6003_HW_2_1_1_DEFAULT_BOARD_DATA_FILE \ |
2023dbb8 | 201 | AR6003_HW_2_1_1_FW_DIR "/bdata.SD31.bin" |
bdcd8170 | 202 | |
31024d99 | 203 | /* AR6004 1.0 definitions */ |
0d0192ba | 204 | #define AR6004_HW_1_0_VERSION 0x30000623 |
c0038972 KV |
205 | #define AR6004_HW_1_0_FW_DIR "ath6k/AR6004/hw1.0" |
206 | #define AR6004_HW_1_0_FIRMWARE_FILE "fw.ram.bin" | |
2023dbb8 | 207 | #define AR6004_HW_1_0_BOARD_DATA_FILE AR6004_HW_1_0_FW_DIR "/bdata.bin" |
0d0192ba | 208 | #define AR6004_HW_1_0_DEFAULT_BOARD_DATA_FILE \ |
2023dbb8 | 209 | AR6004_HW_1_0_FW_DIR "/bdata.DB132.bin" |
d5720e59 KV |
210 | |
211 | /* AR6004 1.1 definitions */ | |
0d0192ba | 212 | #define AR6004_HW_1_1_VERSION 0x30000001 |
c0038972 KV |
213 | #define AR6004_HW_1_1_FW_DIR "ath6k/AR6004/hw1.1" |
214 | #define AR6004_HW_1_1_FIRMWARE_FILE "fw.ram.bin" | |
2023dbb8 | 215 | #define AR6004_HW_1_1_BOARD_DATA_FILE AR6004_HW_1_1_FW_DIR "/bdata.bin" |
0d0192ba | 216 | #define AR6004_HW_1_1_DEFAULT_BOARD_DATA_FILE \ |
2023dbb8 | 217 | AR6004_HW_1_1_FW_DIR "/bdata.DB132.bin" |
31024d99 | 218 | |
6146ca69 RC |
219 | /* AR6004 1.2 definitions */ |
220 | #define AR6004_HW_1_2_VERSION 0x300007e8 | |
221 | #define AR6004_HW_1_2_FW_DIR "ath6k/AR6004/hw1.2" | |
222 | #define AR6004_HW_1_2_FIRMWARE_FILE "fw.ram.bin" | |
2023dbb8 | 223 | #define AR6004_HW_1_2_BOARD_DATA_FILE AR6004_HW_1_2_FW_DIR "/bdata.bin" |
6146ca69 | 224 | #define AR6004_HW_1_2_DEFAULT_BOARD_DATA_FILE \ |
2023dbb8 | 225 | AR6004_HW_1_2_FW_DIR "/bdata.bin" |
bf744f11 BS |
226 | |
227 | /* AR6004 1.3 definitions */ | |
228 | #define AR6004_HW_1_3_VERSION 0x31c8088a | |
229 | #define AR6004_HW_1_3_FW_DIR "ath6k/AR6004/hw1.3" | |
230 | #define AR6004_HW_1_3_FIRMWARE_FILE "fw.ram.bin" | |
78803770 JW |
231 | #define AR6004_HW_1_3_TCMD_FIRMWARE_FILE "utf.bin" |
232 | #define AR6004_HW_1_3_UTF_FIRMWARE_FILE "utf.bin" | |
233 | #define AR6004_HW_1_3_TESTSCRIPT_FILE "nullTestFlow.bin" | |
234 | #define AR6004_HW_1_3_BOARD_DATA_FILE AR6004_HW_1_3_FW_DIR "/bdata.bin" | |
235 | #define AR6004_HW_1_3_DEFAULT_BOARD_DATA_FILE AR6004_HW_1_3_FW_DIR "/bdata.bin" | |
236 | ||
237 | /* AR6004 3.0 definitions */ | |
238 | #define AR6004_HW_3_0_VERSION 0x31C809F8 | |
239 | #define AR6004_HW_3_0_FW_DIR "ath6k/AR6004/hw3.0" | |
240 | #define AR6004_HW_3_0_FIRMWARE_FILE "fw.ram.bin" | |
241 | #define AR6004_HW_3_0_TCMD_FIRMWARE_FILE "utf.bin" | |
242 | #define AR6004_HW_3_0_UTF_FIRMWARE_FILE "utf.bin" | |
243 | #define AR6004_HW_3_0_TESTSCRIPT_FILE "nullTestFlow.bin" | |
244 | #define AR6004_HW_3_0_BOARD_DATA_FILE AR6004_HW_3_0_FW_DIR "/bdata.bin" | |
245 | #define AR6004_HW_3_0_DEFAULT_BOARD_DATA_FILE AR6004_HW_3_0_FW_DIR "/bdata.bin" | |
6146ca69 | 246 | |
bdcd8170 KV |
247 | /* Per STA data, used in AP mode */ |
248 | #define STA_PS_AWAKE BIT(0) | |
249 | #define STA_PS_SLEEP BIT(1) | |
250 | #define STA_PS_POLLED BIT(2) | |
c1762a3f TP |
251 | #define STA_PS_APSD_TRIGGER BIT(3) |
252 | #define STA_PS_APSD_EOSP BIT(4) | |
bdcd8170 KV |
253 | |
254 | /* HTC TX packet tagging definitions */ | |
255 | #define ATH6KL_CONTROL_PKT_TAG HTC_TX_PACKET_TAG_USER_DEFINED | |
256 | #define ATH6KL_DATA_PKT_TAG (ATH6KL_CONTROL_PKT_TAG + 1) | |
257 | ||
258 | #define AR6003_CUST_DATA_SIZE 16 | |
259 | ||
260 | #define AGGR_WIN_IDX(x, y) ((x) % (y)) | |
261 | #define AGGR_INCR_IDX(x, y) AGGR_WIN_IDX(((x) + 1), (y)) | |
262 | #define AGGR_DCRM_IDX(x, y) AGGR_WIN_IDX(((x) - 1), (y)) | |
263 | #define ATH6KL_MAX_SEQ_NO 0xFFF | |
264 | #define ATH6KL_NEXT_SEQ_NO(x) (((x) + 1) & ATH6KL_MAX_SEQ_NO) | |
265 | ||
266 | #define NUM_OF_TIDS 8 | |
267 | #define AGGR_SZ_DEFAULT 8 | |
268 | ||
269 | #define AGGR_WIN_SZ_MIN 2 | |
270 | #define AGGR_WIN_SZ_MAX 8 | |
271 | ||
272 | #define TID_WINDOW_SZ(_x) ((_x) << 1) | |
273 | ||
274 | #define AGGR_NUM_OF_FREE_NETBUFS 16 | |
275 | ||
7940bad5 | 276 | #define AGGR_RX_TIMEOUT 100 /* in ms */ |
bdcd8170 KV |
277 | |
278 | #define WMI_TIMEOUT (2 * HZ) | |
279 | ||
280 | #define MBOX_YIELD_LIMIT 99 | |
281 | ||
8f46fccd | 282 | #define ATH6KL_DEFAULT_LISTEN_INTVAL 100 /* in TUs */ |
ce0dc0cf RM |
283 | #define ATH6KL_DEFAULT_BMISS_TIME 1500 |
284 | #define ATH6KL_MAX_WOW_LISTEN_INTL 300 /* in TUs */ | |
285 | #define ATH6KL_MAX_BMISS_TIME 5000 | |
8f46fccd | 286 | |
bdcd8170 KV |
287 | /* configuration lags */ |
288 | /* | |
289 | * ATH6KL_CONF_IGNORE_ERP_BARKER: Ignore the barker premable in | |
290 | * ERP IE of beacon to determine the short premable support when | |
291 | * sending (Re)Assoc req. | |
292 | * ATH6KL_CONF_IGNORE_PS_FAIL_EVT_IN_SCAN: Don't send the power | |
293 | * module state transition failure events which happen during | |
294 | * scan, to the host. | |
295 | */ | |
296 | #define ATH6KL_CONF_IGNORE_ERP_BARKER BIT(0) | |
297 | #define ATH6KL_CONF_IGNORE_PS_FAIL_EVT_IN_SCAN BIT(1) | |
298 | #define ATH6KL_CONF_ENABLE_11N BIT(2) | |
299 | #define ATH6KL_CONF_ENABLE_TX_BURST BIT(3) | |
e390af77 | 300 | #define ATH6KL_CONF_UART_DEBUG BIT(4) |
bdcd8170 | 301 | |
c86e4f44 AT |
302 | #define P2P_WILDCARD_SSID_LEN 7 /* DIRECT- */ |
303 | ||
bdcd8170 KV |
304 | enum wlan_low_pwr_state { |
305 | WLAN_POWER_STATE_ON, | |
306 | WLAN_POWER_STATE_CUT_PWR, | |
307 | WLAN_POWER_STATE_DEEP_SLEEP, | |
308 | WLAN_POWER_STATE_WOW | |
309 | }; | |
310 | ||
311 | enum sme_state { | |
312 | SME_DISCONNECTED, | |
313 | SME_CONNECTING, | |
314 | SME_CONNECTED | |
315 | }; | |
316 | ||
bdcd8170 KV |
317 | struct skb_hold_q { |
318 | struct sk_buff *skb; | |
319 | bool is_amsdu; | |
320 | u16 seq_no; | |
321 | }; | |
322 | ||
323 | struct rxtid { | |
324 | bool aggr; | |
bdcd8170 KV |
325 | bool timer_mon; |
326 | u16 win_sz; | |
327 | u16 seq_next; | |
328 | u32 hold_q_sz; | |
329 | struct skb_hold_q *hold_q; | |
330 | struct sk_buff_head q; | |
12eb9444 KV |
331 | |
332 | /* | |
0faf7458 VT |
333 | * lock mainly protects seq_next and hold_q. Movement of seq_next |
334 | * needs to be protected between aggr_timeout() and | |
335 | * aggr_process_recv_frm(). hold_q will be holding the pending | |
336 | * reorder frames and it's access should also be protected. | |
337 | * Some of the other fields like hold_q_sz, win_sz and aggr are | |
338 | * initialized/reset when receiving addba/delba req, also while | |
339 | * deleting aggr state all the pending buffers are flushed before | |
340 | * resetting these fields, so there should not be any race in accessing | |
341 | * these fields. | |
12eb9444 | 342 | */ |
bdcd8170 KV |
343 | spinlock_t lock; |
344 | }; | |
345 | ||
346 | struct rxtid_stats { | |
347 | u32 num_into_aggr; | |
348 | u32 num_dups; | |
349 | u32 num_oow; | |
350 | u32 num_mpdu; | |
351 | u32 num_amsdu; | |
352 | u32 num_delivered; | |
353 | u32 num_timeouts; | |
354 | u32 num_hole; | |
355 | u32 num_bar; | |
356 | }; | |
357 | ||
7baef812 | 358 | struct aggr_info_conn { |
bdcd8170 KV |
359 | u8 aggr_sz; |
360 | u8 timer_scheduled; | |
361 | struct timer_list timer; | |
362 | struct net_device *dev; | |
363 | struct rxtid rx_tid[NUM_OF_TIDS]; | |
bdcd8170 | 364 | struct rxtid_stats stat[NUM_OF_TIDS]; |
7baef812 VT |
365 | struct aggr_info *aggr_info; |
366 | }; | |
367 | ||
368 | struct aggr_info { | |
369 | struct aggr_info_conn *aggr_conn; | |
370 | struct sk_buff_head rx_amsdu_freeq; | |
bdcd8170 KV |
371 | }; |
372 | ||
373 | struct ath6kl_wep_key { | |
374 | u8 key_index; | |
375 | u8 key_len; | |
376 | u8 key[64]; | |
377 | }; | |
378 | ||
379 | #define ATH6KL_KEY_SEQ_LEN 8 | |
380 | ||
381 | struct ath6kl_key { | |
382 | u8 key[WLAN_MAX_KEY_LEN]; | |
383 | u8 key_len; | |
384 | u8 seq[ATH6KL_KEY_SEQ_LEN]; | |
385 | u8 seq_len; | |
386 | u32 cipher; | |
387 | }; | |
388 | ||
389 | struct ath6kl_node_mapping { | |
390 | u8 mac_addr[ETH_ALEN]; | |
391 | u8 ep_id; | |
392 | u8 tx_pend; | |
393 | }; | |
394 | ||
395 | struct ath6kl_cookie { | |
396 | struct sk_buff *skb; | |
397 | u32 map_no; | |
398 | struct htc_packet htc_pkt; | |
399 | struct ath6kl_cookie *arc_list_next; | |
400 | }; | |
401 | ||
d0ff7383 NG |
402 | struct ath6kl_mgmt_buff { |
403 | struct list_head list; | |
404 | u32 freq; | |
405 | u32 wait; | |
406 | u32 id; | |
407 | bool no_cck; | |
408 | size_t len; | |
409 | u8 buf[0]; | |
410 | }; | |
411 | ||
bdcd8170 KV |
412 | struct ath6kl_sta { |
413 | u16 sta_flags; | |
414 | u8 mac[ETH_ALEN]; | |
415 | u8 aid; | |
416 | u8 keymgmt; | |
417 | u8 ucipher; | |
418 | u8 auth; | |
419 | u8 wpa_ie[ATH6KL_MAX_IE]; | |
420 | struct sk_buff_head psq; | |
12eb9444 KV |
421 | |
422 | /* protects psq, mgmt_psq, apsdq, and mgmt_psq_len fields */ | |
bdcd8170 | 423 | spinlock_t psq_lock; |
12eb9444 | 424 | |
d0ff7383 NG |
425 | struct list_head mgmt_psq; |
426 | size_t mgmt_psq_len; | |
c1762a3f TP |
427 | u8 apsd_info; |
428 | struct sk_buff_head apsdq; | |
1d2a4456 | 429 | struct aggr_info_conn *aggr_conn; |
bdcd8170 KV |
430 | }; |
431 | ||
432 | struct ath6kl_version { | |
433 | u32 target_ver; | |
434 | u32 wlan_ver; | |
435 | u32 abi_ver; | |
436 | }; | |
437 | ||
438 | struct ath6kl_bmi { | |
439 | u32 cmd_credits; | |
440 | bool done_sent; | |
441 | u8 *cmd_buf; | |
1f4c894d KV |
442 | u32 max_data_size; |
443 | u32 max_cmd_size; | |
bdcd8170 KV |
444 | }; |
445 | ||
446 | struct target_stats { | |
447 | u64 tx_pkt; | |
448 | u64 tx_byte; | |
449 | u64 tx_ucast_pkt; | |
450 | u64 tx_ucast_byte; | |
451 | u64 tx_mcast_pkt; | |
452 | u64 tx_mcast_byte; | |
453 | u64 tx_bcast_pkt; | |
454 | u64 tx_bcast_byte; | |
455 | u64 tx_rts_success_cnt; | |
456 | u64 tx_pkt_per_ac[4]; | |
457 | ||
458 | u64 tx_err; | |
459 | u64 tx_fail_cnt; | |
460 | u64 tx_retry_cnt; | |
461 | u64 tx_mult_retry_cnt; | |
462 | u64 tx_rts_fail_cnt; | |
463 | ||
464 | u64 rx_pkt; | |
465 | u64 rx_byte; | |
466 | u64 rx_ucast_pkt; | |
467 | u64 rx_ucast_byte; | |
468 | u64 rx_mcast_pkt; | |
469 | u64 rx_mcast_byte; | |
470 | u64 rx_bcast_pkt; | |
471 | u64 rx_bcast_byte; | |
472 | u64 rx_frgment_pkt; | |
473 | ||
474 | u64 rx_err; | |
475 | u64 rx_crc_err; | |
476 | u64 rx_key_cache_miss; | |
477 | u64 rx_decrypt_err; | |
478 | u64 rx_dupl_frame; | |
479 | ||
480 | u64 tkip_local_mic_fail; | |
481 | u64 tkip_cnter_measures_invoked; | |
482 | u64 tkip_replays; | |
483 | u64 tkip_fmt_err; | |
484 | u64 ccmp_fmt_err; | |
485 | u64 ccmp_replays; | |
486 | ||
487 | u64 pwr_save_fail_cnt; | |
488 | ||
489 | u64 cs_bmiss_cnt; | |
490 | u64 cs_low_rssi_cnt; | |
491 | u64 cs_connect_cnt; | |
492 | u64 cs_discon_cnt; | |
493 | ||
494 | s32 tx_ucast_rate; | |
495 | s32 rx_ucast_rate; | |
496 | ||
497 | u32 lq_val; | |
498 | ||
499 | u32 wow_pkt_dropped; | |
500 | u16 wow_evt_discarded; | |
501 | ||
502 | s16 noise_floor_calib; | |
503 | s16 cs_rssi; | |
504 | s16 cs_ave_beacon_rssi; | |
505 | u8 cs_ave_beacon_snr; | |
506 | u8 cs_last_roam_msec; | |
507 | u8 cs_snr; | |
508 | ||
509 | u8 wow_host_pkt_wakeups; | |
510 | u8 wow_host_evt_wakeups; | |
511 | ||
512 | u32 arp_received; | |
513 | u32 arp_matched; | |
514 | u32 arp_replied; | |
515 | }; | |
516 | ||
517 | struct ath6kl_mbox_info { | |
518 | u32 htc_addr; | |
519 | u32 htc_ext_addr; | |
520 | u32 htc_ext_sz; | |
521 | ||
522 | u32 block_size; | |
523 | ||
524 | u32 gmbox_addr; | |
525 | ||
526 | u32 gmbox_sz; | |
527 | }; | |
528 | ||
529 | /* | |
530 | * 802.11i defines an extended IV for use with non-WEP ciphers. | |
531 | * When the EXTIV bit is set in the key id byte an additional | |
532 | * 4 bytes immediately follow the IV for TKIP. For CCMP the | |
533 | * EXTIV bit is likewise set but the 8 bytes represent the | |
534 | * CCMP header rather than IV+extended-IV. | |
535 | */ | |
536 | ||
537 | #define ATH6KL_KEYBUF_SIZE 16 | |
538 | #define ATH6KL_MICBUF_SIZE (8+8) /* space for both tx and rx */ | |
539 | ||
540 | #define ATH6KL_KEY_XMIT 0x01 | |
541 | #define ATH6KL_KEY_RECV 0x02 | |
542 | #define ATH6KL_KEY_DEFAULT 0x80 /* default xmit key */ | |
543 | ||
9a5b1318 | 544 | /* Initial group key for AP mode */ |
bdcd8170 | 545 | struct ath6kl_req_key { |
9a5b1318 JM |
546 | bool valid; |
547 | u8 key_index; | |
548 | int key_type; | |
549 | u8 key[WLAN_MAX_KEY_LEN]; | |
550 | u8 key_len; | |
bdcd8170 KV |
551 | }; |
552 | ||
77eab1e9 KV |
553 | enum ath6kl_hif_type { |
554 | ATH6KL_HIF_TYPE_SDIO, | |
555 | ATH6KL_HIF_TYPE_USB, | |
556 | }; | |
557 | ||
e76ac2bf KV |
558 | enum ath6kl_htc_type { |
559 | ATH6KL_HTC_TYPE_MBOX, | |
636f8288 | 560 | ATH6KL_HTC_TYPE_PIPE, |
e76ac2bf KV |
561 | }; |
562 | ||
80abaf9b VT |
563 | /* Max number of filters that hw supports */ |
564 | #define ATH6K_MAX_MC_FILTERS_PER_LIST 7 | |
565 | struct ath6kl_mc_filter { | |
566 | struct list_head list; | |
567 | char hw_addr[ATH6KL_MCAST_FILTER_MAC_ADDR_SIZE]; | |
568 | }; | |
569 | ||
df90b369 VT |
570 | struct ath6kl_htcap { |
571 | bool ht_enable; | |
572 | u8 ampdu_factor; | |
573 | unsigned short cap_info; | |
574 | }; | |
575 | ||
71f96ee6 KV |
576 | /* |
577 | * Driver's maximum limit, note that some firmwares support only one vif | |
578 | * and the runtime (current) limit must be checked from ar->vif_max. | |
579 | */ | |
b64de356 | 580 | #define ATH6KL_VIF_MAX 3 |
334234b5 | 581 | |
59c98449 VT |
582 | /* vif flags info */ |
583 | enum ath6kl_vif_state { | |
584 | CONNECTED, | |
585 | CONNECT_PEND, | |
586 | WMM_ENABLED, | |
587 | NETQ_STOPPED, | |
588 | DTIM_EXPIRED, | |
59c98449 VT |
589 | CLEAR_BSSFILTER_ON_BEACON, |
590 | DTIM_PERIOD_AVAIL, | |
591 | WLAN_ENABLED, | |
b95907a7 | 592 | STATS_UPDATE_PEND, |
081c7a84 | 593 | HOST_SLEEP_MODE_CMD_PROCESSED, |
6251d801 NG |
594 | NETDEV_MCAST_ALL_ON, |
595 | NETDEV_MCAST_ALL_OFF, | |
b1f47e3a | 596 | SCHED_SCANNING, |
59c98449 VT |
597 | }; |
598 | ||
108438bc | 599 | struct ath6kl_vif { |
990bd915 | 600 | struct list_head list; |
108438bc VT |
601 | struct wireless_dev wdev; |
602 | struct net_device *ndev; | |
603 | struct ath6kl *ar; | |
478ac027 VT |
604 | /* Lock to protect vif specific net_stats and flags */ |
605 | spinlock_t if_lock; | |
334234b5 | 606 | u8 fw_vif_idx; |
59c98449 | 607 | unsigned long flags; |
3450334f VT |
608 | int ssid_len; |
609 | u8 ssid[IEEE80211_MAX_SSID_LEN]; | |
610 | u8 dot11_auth_mode; | |
611 | u8 auth_mode; | |
612 | u8 prwise_crypto; | |
613 | u8 prwise_crypto_len; | |
614 | u8 grp_crypto; | |
615 | u8 grp_crypto_len; | |
616 | u8 def_txkey_index; | |
f5938f24 VT |
617 | u8 next_mode; |
618 | u8 nw_type; | |
8c8b65e3 VT |
619 | u8 bssid[ETH_ALEN]; |
620 | u8 req_bssid[ETH_ALEN]; | |
f74bac54 VT |
621 | u16 ch_hint; |
622 | u16 bss_ch; | |
6f2a73f9 VT |
623 | struct ath6kl_wep_key wep_key_list[WMI_MAX_KEY_INDEX + 1]; |
624 | struct ath6kl_key keys[WMI_MAX_KEY_INDEX + 1]; | |
2132c69c | 625 | struct aggr_info *aggr_cntxt; |
57fbcce3 | 626 | struct ath6kl_htcap htcap[NUM_NL80211_BANDS]; |
10509f90 | 627 | |
de3ad713 | 628 | struct timer_list disconnect_timer; |
10509f90 KV |
629 | struct timer_list sched_scan_timer; |
630 | ||
14ee6f6b VT |
631 | struct cfg80211_scan_request *scan_req; |
632 | enum sme_state sme_state; | |
cf5333d7 | 633 | int reconnect_flag; |
1052261e JM |
634 | u32 last_roc_id; |
635 | u32 last_cancel_roc_id; | |
cf5333d7 VT |
636 | u32 send_action_id; |
637 | bool probe_req_report; | |
cf5333d7 | 638 | u16 assoc_bss_beacon_int; |
8f46fccd | 639 | u16 listen_intvl_t; |
ce0dc0cf | 640 | u16 bmiss_time_t; |
279b2862 | 641 | u32 txe_intvl; |
eb38987e | 642 | u16 bg_scan_period; |
cf5333d7 | 643 | u8 assoc_bss_dtim_period; |
b95907a7 VT |
644 | struct net_device_stats net_stats; |
645 | struct target_stats target_stats; | |
c4f7863e | 646 | struct wmi_connect_cmd profile; |
f21243a8 | 647 | u16 rsn_capab; |
80abaf9b VT |
648 | |
649 | struct list_head mc_filter; | |
108438bc VT |
650 | }; |
651 | ||
71bbc994 JB |
652 | static inline struct ath6kl_vif *ath6kl_vif_from_wdev(struct wireless_dev *wdev) |
653 | { | |
654 | return container_of(wdev, struct ath6kl_vif, wdev); | |
655 | } | |
656 | ||
6cb3c714 RM |
657 | #define WOW_LIST_ID 0 |
658 | #define WOW_HOST_REQ_DELAY 500 /* ms */ | |
659 | ||
10509f90 KV |
660 | #define ATH6KL_SCHED_SCAN_RESULT_DELAY 5000 /* ms */ |
661 | ||
bdcd8170 | 662 | /* Flag info */ |
59c98449 VT |
663 | enum ath6kl_dev_state { |
664 | WMI_ENABLED, | |
665 | WMI_READY, | |
666 | WMI_CTRL_EP_FULL, | |
667 | TESTMODE, | |
668 | DESTROY_IN_PROGRESS, | |
669 | SKIP_SCAN, | |
59c98449 | 670 | ROAM_TBL_PEND, |
5fe4dffb | 671 | FIRST_BOOT, |
a3561706 | 672 | RECOVERY_CLEANUP, |
59c98449 | 673 | }; |
bdcd8170 | 674 | |
76a9fbe2 KV |
675 | enum ath6kl_state { |
676 | ATH6KL_STATE_OFF, | |
677 | ATH6KL_STATE_ON, | |
390a8c8f RM |
678 | ATH6KL_STATE_SUSPENDING, |
679 | ATH6KL_STATE_RESUMING, | |
76a9fbe2 | 680 | ATH6KL_STATE_DEEPSLEEP, |
b4b2a0b1 | 681 | ATH6KL_STATE_CUTPOWER, |
dd6c0c63 | 682 | ATH6KL_STATE_WOW, |
84caf800 VT |
683 | ATH6KL_STATE_RECOVERY, |
684 | }; | |
685 | ||
686 | /* Fw error recovery */ | |
92332993 VT |
687 | #define ATH6KL_HB_RESP_MISS_THRES 5 |
688 | ||
84caf800 VT |
689 | enum ath6kl_fw_err { |
690 | ATH6KL_FW_ASSERT, | |
92332993 | 691 | ATH6KL_FW_HB_RESP_FAILURE, |
77565794 | 692 | ATH6KL_FW_EP_FULL, |
76a9fbe2 KV |
693 | }; |
694 | ||
bdcd8170 KV |
695 | struct ath6kl { |
696 | struct device *dev; | |
be98e3a4 | 697 | struct wiphy *wiphy; |
76a9fbe2 KV |
698 | |
699 | enum ath6kl_state state; | |
5f1127ff | 700 | unsigned int testmode; |
76a9fbe2 | 701 | |
bdcd8170 KV |
702 | struct ath6kl_bmi bmi; |
703 | const struct ath6kl_hif_ops *hif_ops; | |
e76ac2bf | 704 | const struct ath6kl_htc_ops *htc_ops; |
bdcd8170 KV |
705 | struct wmi *wmi; |
706 | int tx_pending[ENDPOINT_MAX]; | |
707 | int total_tx_data_pend; | |
708 | struct htc_target *htc_target; | |
77eab1e9 | 709 | enum ath6kl_hif_type hif_type; |
bdcd8170 | 710 | void *hif_priv; |
990bd915 VT |
711 | struct list_head vif_list; |
712 | /* Lock to avoid race in vif_list entries among add/del/traverse */ | |
713 | spinlock_t list_lock; | |
55055976 | 714 | u8 num_vif; |
368b1b0f | 715 | unsigned int vif_max; |
3226f68a | 716 | u8 max_norm_iface; |
55055976 | 717 | u8 avail_idx_map; |
12eb9444 KV |
718 | |
719 | /* | |
720 | * Protects at least amsdu_rx_buffer_queue, ath6kl_alloc_cookie() | |
721 | * calls, tx_pending and total_tx_data_pend. | |
722 | */ | |
bdcd8170 | 723 | spinlock_t lock; |
12eb9444 | 724 | |
bdcd8170 | 725 | struct semaphore sem; |
e5090444 | 726 | u8 lrssi_roam_threshold; |
bdcd8170 KV |
727 | struct ath6kl_version version; |
728 | u32 target_type; | |
729 | u8 tx_pwr; | |
bdcd8170 KV |
730 | struct ath6kl_node_mapping node_map[MAX_NODE_NUM]; |
731 | u8 ibss_ps_enable; | |
55055976 | 732 | bool ibss_if_active; |
bdcd8170 KV |
733 | u8 node_num; |
734 | u8 next_ep_id; | |
735 | struct ath6kl_cookie *cookie_list; | |
736 | u32 cookie_count; | |
737 | enum htc_endpoint_id ac2ep_map[WMM_NUM_AC]; | |
738 | bool ac_stream_active[WMM_NUM_AC]; | |
739 | u8 ac_stream_pri_map[WMM_NUM_AC]; | |
740 | u8 hiac_stream_active_pri; | |
741 | u8 ep2ac_map[ENDPOINT_MAX]; | |
742 | enum htc_endpoint_id ctrl_ep; | |
3c370398 | 743 | struct ath6kl_htc_credit_info credit_state_info; |
bdcd8170 KV |
744 | u32 connect_ctrl_flags; |
745 | u32 user_key_ctrl; | |
746 | u8 usr_bss_filter; | |
747 | struct ath6kl_sta sta_list[AP_MAX_NUM_STA]; | |
748 | u8 sta_list_index; | |
749 | struct ath6kl_req_key ap_mode_bkey; | |
750 | struct sk_buff_head mcastpsq; | |
c4f7863e | 751 | u32 want_ch_switch; |
b5495e66 | 752 | u16 last_ch; |
12eb9444 KV |
753 | |
754 | /* | |
755 | * FIXME: protects access to mcastpsq but is actually useless as | |
756 | * all skbe_queue_*() functions provide serialisation themselves | |
757 | */ | |
bdcd8170 | 758 | spinlock_t mcastpsq_lock; |
12eb9444 | 759 | |
bdcd8170 | 760 | u8 intra_bss; |
bdcd8170 KV |
761 | struct wmi_ap_mode_stat ap_stats; |
762 | u8 ap_country_code[3]; | |
763 | struct list_head amsdu_rx_buffer_queue; | |
bdcd8170 | 764 | u8 rx_meta_ver; |
bdcd8170 | 765 | enum wlan_low_pwr_state wlan_pwr_state; |
d66ea4f9 | 766 | u8 mac_addr[ETH_ALEN]; |
bdcd8170 | 767 | #define AR_MCAST_FILTER_MAC_ADDR_SIZE 4 |
003353b0 KV |
768 | struct { |
769 | void *rx_report; | |
770 | size_t rx_report_len; | |
771 | } tm; | |
772 | ||
856f4b31 KV |
773 | struct ath6kl_hw { |
774 | u32 id; | |
293badf4 | 775 | const char *name; |
a01ac414 KV |
776 | u32 dataset_patch_addr; |
777 | u32 app_load_addr; | |
778 | u32 app_start_override_addr; | |
991b27ea KV |
779 | u32 board_ext_data_addr; |
780 | u32 reserved_ram_size; | |
0d4d72bf | 781 | u32 board_addr; |
39586bf2 RH |
782 | u32 refclk_hz; |
783 | u32 uarttx_pin; | |
f8a68c96 | 784 | u32 uarttx_rate; |
cd23c1c9 | 785 | u32 testscript_addr; |
9c2e90ff BG |
786 | u8 tx_ant; |
787 | u8 rx_ant; | |
d92917e4 | 788 | enum wmi_phy_cap cap; |
d1a9421d | 789 | |
06e360ac BS |
790 | u32 flags; |
791 | ||
c0038972 KV |
792 | struct ath6kl_hw_fw { |
793 | const char *dir; | |
794 | const char *otp; | |
795 | const char *fw; | |
796 | const char *tcmd; | |
797 | const char *patch; | |
cd23c1c9 AY |
798 | const char *utf; |
799 | const char *testscript; | |
c0038972 KV |
800 | } fw; |
801 | ||
d1a9421d KV |
802 | const char *fw_board; |
803 | const char *fw_default_board; | |
a01ac414 KV |
804 | } hw; |
805 | ||
bdcd8170 | 806 | u16 conf_flags; |
e390af77 | 807 | u16 suspend_mode; |
1e9a905d | 808 | u16 wow_suspend_mode; |
bdcd8170 KV |
809 | wait_queue_head_t event_wq; |
810 | struct ath6kl_mbox_info mbox_info; | |
811 | ||
812 | struct ath6kl_cookie cookie_mem[MAX_COOKIE_NUM]; | |
bdcd8170 KV |
813 | unsigned long flag; |
814 | ||
815 | u8 *fw_board; | |
816 | size_t fw_board_len; | |
817 | ||
818 | u8 *fw_otp; | |
819 | size_t fw_otp_len; | |
820 | ||
821 | u8 *fw; | |
822 | size_t fw_len; | |
823 | ||
824 | u8 *fw_patch; | |
825 | size_t fw_patch_len; | |
826 | ||
cd23c1c9 AY |
827 | u8 *fw_testscript; |
828 | size_t fw_testscript_len; | |
829 | ||
65a8b4cc | 830 | unsigned int fw_api; |
97e0496d KV |
831 | unsigned long fw_capabilities[ATH6KL_CAPABILITY_LEN]; |
832 | ||
bdcd8170 | 833 | struct workqueue_struct *ath6kl_wq; |
7c3075e9 | 834 | |
d999ba3e | 835 | struct dentry *debugfs_phy; |
6a7c9bad | 836 | |
6bbc7c35 JM |
837 | bool p2p; |
838 | ||
e5348a1e VT |
839 | bool wiphy_registered; |
840 | ||
84caf800 | 841 | struct ath6kl_fw_recovery { |
84caf800 VT |
842 | struct work_struct recovery_work; |
843 | unsigned long err_reason; | |
92332993 VT |
844 | unsigned long hb_poll; |
845 | struct timer_list hb_timer; | |
846 | u32 seq_num; | |
847 | bool hb_pending; | |
848 | u8 hb_misscnt; | |
66ddcc39 | 849 | bool enable; |
84caf800 VT |
850 | } fw_recovery; |
851 | ||
bdf5396b KV |
852 | #ifdef CONFIG_ATH6KL_DEBUG |
853 | struct { | |
9b9a4f2a | 854 | struct sk_buff_head fwlog_queue; |
c807b30d KV |
855 | struct completion fwlog_completion; |
856 | bool fwlog_open; | |
857 | ||
939f1cce | 858 | u32 fwlog_mask; |
9b9a4f2a | 859 | |
91d57de5 | 860 | unsigned int dbgfs_diag_reg; |
252c068b VT |
861 | u32 diag_reg_addr_wr; |
862 | u32 diag_reg_val_wr; | |
9a730834 KV |
863 | |
864 | struct { | |
865 | unsigned int invalid_rate; | |
866 | } war_stats; | |
4b28a80d JM |
867 | |
868 | u8 *roam_tbl; | |
869 | unsigned int roam_tbl_len; | |
ff0b0075 JM |
870 | |
871 | u8 keepalive; | |
872 | u8 disc_timeout; | |
bdf5396b KV |
873 | } debug; |
874 | #endif /* CONFIG_ATH6KL_DEBUG */ | |
bdcd8170 KV |
875 | }; |
876 | ||
d6d5c06c | 877 | static inline struct ath6kl *ath6kl_priv(struct net_device *dev) |
bdcd8170 | 878 | { |
108438bc | 879 | return ((struct ath6kl_vif *) netdev_priv(dev))->ar; |
bdcd8170 KV |
880 | } |
881 | ||
bc07ddb2 KV |
882 | static inline u32 ath6kl_get_hi_item_addr(struct ath6kl *ar, |
883 | u32 item_offset) | |
884 | { | |
885 | u32 addr = 0; | |
886 | ||
887 | if (ar->target_type == TARGET_TYPE_AR6003) | |
888 | addr = ATH6KL_AR6003_HI_START_ADDR + item_offset; | |
889 | else if (ar->target_type == TARGET_TYPE_AR6004) | |
890 | addr = ATH6KL_AR6004_HI_START_ADDR + item_offset; | |
891 | ||
892 | return addr; | |
893 | } | |
894 | ||
bdcd8170 KV |
895 | int ath6kl_configure_target(struct ath6kl *ar); |
896 | void ath6kl_detect_error(unsigned long ptr); | |
897 | void disconnect_timer_handler(unsigned long ptr); | |
898 | void init_netdev(struct net_device *dev); | |
899 | void ath6kl_cookie_init(struct ath6kl *ar); | |
900 | void ath6kl_cookie_cleanup(struct ath6kl *ar); | |
901 | void ath6kl_rx(struct htc_target *target, struct htc_packet *packet); | |
63de1112 KV |
902 | void ath6kl_tx_complete(struct htc_target *context, |
903 | struct list_head *packet_queue); | |
bdcd8170 KV |
904 | enum htc_send_full_action ath6kl_tx_queue_full(struct htc_target *target, |
905 | struct htc_packet *packet); | |
906 | void ath6kl_stop_txrx(struct ath6kl *ar); | |
907 | void ath6kl_cleanup_amsdu_rxbufs(struct ath6kl *ar); | |
f9ea0753 | 908 | int ath6kl_diag_write32(struct ath6kl *ar, u32 address, __le32 value); |
addb44be KV |
909 | int ath6kl_diag_write(struct ath6kl *ar, u32 address, void *data, u32 length); |
910 | int ath6kl_diag_read32(struct ath6kl *ar, u32 address, u32 *value); | |
911 | int ath6kl_diag_read(struct ath6kl *ar, u32 address, void *data, u32 length); | |
bc07ddb2 | 912 | int ath6kl_read_fwlogs(struct ath6kl *ar); |
e29f25f5 | 913 | void ath6kl_init_profile_info(struct ath6kl_vif *vif); |
bdcd8170 | 914 | void ath6kl_tx_data_cleanup(struct ath6kl *ar); |
bdcd8170 KV |
915 | |
916 | struct ath6kl_cookie *ath6kl_alloc_cookie(struct ath6kl *ar); | |
917 | void ath6kl_free_cookie(struct ath6kl *ar, struct ath6kl_cookie *cookie); | |
918 | int ath6kl_data_tx(struct sk_buff *skb, struct net_device *dev); | |
919 | ||
7baef812 | 920 | struct aggr_info *aggr_init(struct ath6kl_vif *vif); |
c8651541 VT |
921 | void aggr_conn_init(struct ath6kl_vif *vif, struct aggr_info *aggr_info, |
922 | struct aggr_info_conn *aggr_conn); | |
bdcd8170 KV |
923 | void ath6kl_rx_refill(struct htc_target *target, |
924 | enum htc_endpoint_id endpoint); | |
925 | void ath6kl_refill_amsdu_rxbufs(struct ath6kl *ar, int count); | |
926 | struct htc_packet *ath6kl_alloc_amsdu_rxbuf(struct htc_target *target, | |
927 | enum htc_endpoint_id endpoint, | |
928 | int len); | |
929 | void aggr_module_destroy(struct aggr_info *aggr_info); | |
1d2a4456 | 930 | void aggr_reset_state(struct aggr_info_conn *aggr_conn); |
bdcd8170 | 931 | |
51b56e26 | 932 | struct ath6kl_sta *ath6kl_find_sta(struct ath6kl_vif *vif, u8 *node_addr); |
bdcd8170 KV |
933 | struct ath6kl_sta *ath6kl_find_sta_by_aid(struct ath6kl *ar, u8 aid); |
934 | ||
d92917e4 TP |
935 | void ath6kl_ready_event(void *devt, u8 *datap, u32 sw_ver, u32 abi_ver, |
936 | enum wmi_phy_cap cap); | |
bdcd8170 KV |
937 | int ath6kl_control_tx(void *devt, struct sk_buff *skb, |
938 | enum htc_endpoint_id eid); | |
240d2799 | 939 | void ath6kl_connect_event(struct ath6kl_vif *vif, u16 channel, |
bdcd8170 KV |
940 | u8 *bssid, u16 listen_int, |
941 | u16 beacon_int, enum network_type net_type, | |
942 | u8 beacon_ie_len, u8 assoc_req_len, | |
943 | u8 assoc_resp_len, u8 *assoc_info); | |
240d2799 VT |
944 | void ath6kl_connect_ap_mode_bss(struct ath6kl_vif *vif, u16 channel); |
945 | void ath6kl_connect_ap_mode_sta(struct ath6kl_vif *vif, u16 aid, u8 *mac_addr, | |
572e27c0 | 946 | u8 keymgmt, u8 ucipher, u8 auth, |
c1762a3f | 947 | u8 assoc_req_len, u8 *assoc_info, u8 apsd_info); |
240d2799 | 948 | void ath6kl_disconnect_event(struct ath6kl_vif *vif, u8 reason, |
bdcd8170 KV |
949 | u8 *bssid, u8 assoc_resp_len, |
950 | u8 *assoc_info, u16 prot_reason_status); | |
240d2799 | 951 | void ath6kl_tkip_micerr_event(struct ath6kl_vif *vif, u8 keyid, bool ismcast); |
bdcd8170 | 952 | void ath6kl_txpwr_rx_evt(void *devt, u8 tx_pwr); |
240d2799 VT |
953 | void ath6kl_scan_complete_evt(struct ath6kl_vif *vif, int status); |
954 | void ath6kl_tgt_stats_event(struct ath6kl_vif *vif, u8 *ptr, u32 len); | |
bdcd8170 KV |
955 | void ath6kl_indicate_tx_activity(void *devt, u8 traffic_class, bool active); |
956 | enum htc_endpoint_id ath6kl_ac2_endpoint_id(void *devt, u8 ac); | |
957 | ||
240d2799 | 958 | void ath6kl_pspoll_event(struct ath6kl_vif *vif, u8 aid); |
bdcd8170 | 959 | |
240d2799 VT |
960 | void ath6kl_dtimexpiry_event(struct ath6kl_vif *vif); |
961 | void ath6kl_disconnect(struct ath6kl_vif *vif); | |
240d2799 VT |
962 | void aggr_recv_delba_req_evt(struct ath6kl_vif *vif, u8 tid); |
963 | void aggr_recv_addba_req_evt(struct ath6kl_vif *vif, u8 tid, u16 seq_no, | |
bdcd8170 KV |
964 | u8 win_sz); |
965 | void ath6kl_wakeup_event(void *dev); | |
bdcd8170 | 966 | |
e29f25f5 | 967 | void ath6kl_init_control_info(struct ath6kl_vif *vif); |
990bd915 | 968 | struct ath6kl_vif *ath6kl_vif_first(struct ath6kl *ar); |
355b3a98 | 969 | void ath6kl_cfg80211_vif_stop(struct ath6kl_vif *vif, bool wmi_ready); |
5fe4dffb KV |
970 | int ath6kl_init_hw_start(struct ath6kl *ar); |
971 | int ath6kl_init_hw_stop(struct ath6kl *ar); | |
45eaa78f KV |
972 | int ath6kl_init_fetch_firmwares(struct ath6kl *ar); |
973 | int ath6kl_init_hw_params(struct ath6kl *ar); | |
974 | ||
a918fb3c | 975 | void ath6kl_check_wow_status(struct ath6kl *ar); |
5fe4dffb | 976 | |
636f8288 KV |
977 | void ath6kl_core_tx_complete(struct ath6kl *ar, struct sk_buff *skb); |
978 | void ath6kl_core_rx_complete(struct ath6kl *ar, struct sk_buff *skb, u8 pipe); | |
979 | ||
45eaa78f | 980 | struct ath6kl *ath6kl_core_create(struct device *dev); |
e76ac2bf | 981 | int ath6kl_core_init(struct ath6kl *ar, enum ath6kl_htc_type htc_type); |
45eaa78f KV |
982 | void ath6kl_core_cleanup(struct ath6kl *ar); |
983 | void ath6kl_core_destroy(struct ath6kl *ar); | |
984 | ||
84caf800 VT |
985 | /* Fw error recovery */ |
986 | void ath6kl_init_hw_restart(struct ath6kl *ar); | |
987 | void ath6kl_recovery_err_notify(struct ath6kl *ar, enum ath6kl_fw_err reason); | |
92332993 | 988 | void ath6kl_recovery_hb_event(struct ath6kl *ar, u32 cookie); |
84caf800 VT |
989 | void ath6kl_recovery_init(struct ath6kl *ar); |
990 | void ath6kl_recovery_cleanup(struct ath6kl *ar); | |
991 | void ath6kl_recovery_suspend(struct ath6kl *ar); | |
92332993 | 992 | void ath6kl_recovery_resume(struct ath6kl *ar); |
bdcd8170 | 993 | #endif /* CORE_H */ |