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75388acd LF |
1 | /* |
2 | ||
3 | Broadcom B43legacy wireless driver | |
4 | ||
5 | Copyright (c) 2005 Martin Langer <martin-langer@gmx.de>, | |
1f21ad2a | 6 | Stefano Brivio <stefano.brivio@polimi.it> |
75388acd LF |
7 | Michael Buesch <mbuesch@freenet.de> |
8 | Danny van Dyk <kugelfang@gentoo.org> | |
9 | Andreas Jaggi <andreas.jaggi@waterwave.ch> | |
10 | Copyright (c) 2007 Larry Finger <Larry.Finger@lwfinger.net> | |
11 | ||
12 | Some parts of the code in this file are derived from the ipw2200 | |
13 | driver Copyright(c) 2003 - 2004 Intel Corporation. | |
14 | ||
15 | This program is free software; you can redistribute it and/or modify | |
16 | it under the terms of the GNU General Public License as published by | |
17 | the Free Software Foundation; either version 2 of the License, or | |
18 | (at your option) any later version. | |
19 | ||
20 | This program is distributed in the hope that it will be useful, | |
21 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
22 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
23 | GNU General Public License for more details. | |
24 | ||
25 | You should have received a copy of the GNU General Public License | |
26 | along with this program; see the file COPYING. If not, write to | |
27 | the Free Software Foundation, Inc., 51 Franklin Steet, Fifth Floor, | |
28 | Boston, MA 02110-1301, USA. | |
29 | ||
30 | */ | |
31 | ||
32 | #include <linux/delay.h> | |
33 | #include <linux/pci.h> | |
34 | #include <linux/types.h> | |
35 | ||
36 | #include "b43legacy.h" | |
37 | #include "phy.h" | |
38 | #include "main.h" | |
39 | #include "radio.h" | |
40 | #include "ilt.h" | |
41 | ||
42 | ||
43 | static const s8 b43legacy_tssi2dbm_b_table[] = { | |
44 | 0x4D, 0x4C, 0x4B, 0x4A, | |
45 | 0x4A, 0x49, 0x48, 0x47, | |
46 | 0x47, 0x46, 0x45, 0x45, | |
47 | 0x44, 0x43, 0x42, 0x42, | |
48 | 0x41, 0x40, 0x3F, 0x3E, | |
49 | 0x3D, 0x3C, 0x3B, 0x3A, | |
50 | 0x39, 0x38, 0x37, 0x36, | |
51 | 0x35, 0x34, 0x32, 0x31, | |
52 | 0x30, 0x2F, 0x2D, 0x2C, | |
53 | 0x2B, 0x29, 0x28, 0x26, | |
54 | 0x25, 0x23, 0x21, 0x1F, | |
55 | 0x1D, 0x1A, 0x17, 0x14, | |
56 | 0x10, 0x0C, 0x06, 0x00, | |
57 | -7, -7, -7, -7, | |
58 | -7, -7, -7, -7, | |
59 | -7, -7, -7, -7, | |
60 | }; | |
61 | ||
62 | static const s8 b43legacy_tssi2dbm_g_table[] = { | |
63 | 77, 77, 77, 76, | |
64 | 76, 76, 75, 75, | |
65 | 74, 74, 73, 73, | |
66 | 73, 72, 72, 71, | |
67 | 71, 70, 70, 69, | |
68 | 68, 68, 67, 67, | |
69 | 66, 65, 65, 64, | |
70 | 63, 63, 62, 61, | |
71 | 60, 59, 58, 57, | |
72 | 56, 55, 54, 53, | |
73 | 52, 50, 49, 47, | |
74 | 45, 43, 40, 37, | |
75 | 33, 28, 22, 14, | |
76 | 5, -7, -20, -20, | |
77 | -20, -20, -20, -20, | |
78 | -20, -20, -20, -20, | |
79 | }; | |
80 | ||
81 | static void b43legacy_phy_initg(struct b43legacy_wldev *dev); | |
82 | ||
83 | ||
84 | static inline | |
85 | void b43legacy_voluntary_preempt(void) | |
86 | { | |
87 | B43legacy_BUG_ON(!(!in_atomic() && !in_irq() && | |
88 | !in_interrupt() && !irqs_disabled())); | |
89 | #ifndef CONFIG_PREEMPT | |
90 | cond_resched(); | |
91 | #endif /* CONFIG_PREEMPT */ | |
92 | } | |
93 | ||
94 | void b43legacy_raw_phy_lock(struct b43legacy_wldev *dev) | |
95 | { | |
96 | struct b43legacy_phy *phy = &dev->phy; | |
97 | ||
98 | B43legacy_WARN_ON(!irqs_disabled()); | |
99 | if (b43legacy_read32(dev, B43legacy_MMIO_STATUS_BITFIELD) == 0) { | |
100 | phy->locked = 0; | |
101 | return; | |
102 | } | |
103 | if (dev->dev->id.revision < 3) { | |
104 | b43legacy_mac_suspend(dev); | |
105 | spin_lock(&phy->lock); | |
106 | } else { | |
107 | if (!b43legacy_is_mode(dev->wl, IEEE80211_IF_TYPE_AP)) | |
108 | b43legacy_power_saving_ctl_bits(dev, -1, 1); | |
109 | } | |
110 | phy->locked = 1; | |
111 | } | |
112 | ||
113 | void b43legacy_raw_phy_unlock(struct b43legacy_wldev *dev) | |
114 | { | |
115 | struct b43legacy_phy *phy = &dev->phy; | |
116 | ||
117 | B43legacy_WARN_ON(!irqs_disabled()); | |
118 | if (dev->dev->id.revision < 3) { | |
119 | if (phy->locked) { | |
120 | spin_unlock(&phy->lock); | |
121 | b43legacy_mac_enable(dev); | |
122 | } | |
123 | } else { | |
124 | if (!b43legacy_is_mode(dev->wl, IEEE80211_IF_TYPE_AP)) | |
125 | b43legacy_power_saving_ctl_bits(dev, -1, -1); | |
126 | } | |
127 | phy->locked = 0; | |
128 | } | |
129 | ||
130 | u16 b43legacy_phy_read(struct b43legacy_wldev *dev, u16 offset) | |
131 | { | |
132 | b43legacy_write16(dev, B43legacy_MMIO_PHY_CONTROL, offset); | |
133 | return b43legacy_read16(dev, B43legacy_MMIO_PHY_DATA); | |
134 | } | |
135 | ||
136 | void b43legacy_phy_write(struct b43legacy_wldev *dev, u16 offset, u16 val) | |
137 | { | |
138 | b43legacy_write16(dev, B43legacy_MMIO_PHY_CONTROL, offset); | |
139 | mmiowb(); | |
140 | b43legacy_write16(dev, B43legacy_MMIO_PHY_DATA, val); | |
141 | } | |
142 | ||
143 | void b43legacy_phy_calibrate(struct b43legacy_wldev *dev) | |
144 | { | |
145 | struct b43legacy_phy *phy = &dev->phy; | |
146 | ||
147 | b43legacy_read32(dev, B43legacy_MMIO_STATUS_BITFIELD); /* Dummy read. */ | |
148 | if (phy->calibrated) | |
149 | return; | |
150 | if (phy->type == B43legacy_PHYTYPE_G && phy->rev == 1) { | |
151 | b43legacy_wireless_core_reset(dev, 0); | |
152 | b43legacy_phy_initg(dev); | |
153 | b43legacy_wireless_core_reset(dev, B43legacy_TMSLOW_GMODE); | |
154 | } | |
155 | phy->calibrated = 1; | |
156 | } | |
157 | ||
158 | /* intialize B PHY power control | |
159 | * as described in http://bcm-specs.sipsolutions.net/InitPowerControl | |
160 | */ | |
161 | static void b43legacy_phy_init_pctl(struct b43legacy_wldev *dev) | |
162 | { | |
163 | struct b43legacy_phy *phy = &dev->phy; | |
164 | u16 saved_batt = 0; | |
165 | u16 saved_ratt = 0; | |
166 | u16 saved_txctl1 = 0; | |
167 | int must_reset_txpower = 0; | |
168 | ||
169 | B43legacy_BUG_ON(!(phy->type == B43legacy_PHYTYPE_B || | |
170 | phy->type == B43legacy_PHYTYPE_G)); | |
171 | if (is_bcm_board_vendor(dev) && | |
172 | (dev->dev->bus->boardinfo.type == 0x0416)) | |
173 | return; | |
174 | ||
175 | b43legacy_phy_write(dev, 0x0028, 0x8018); | |
176 | b43legacy_write16(dev, 0x03E6, b43legacy_read16(dev, 0x03E6) & 0xFFDF); | |
177 | ||
178 | if (phy->type == B43legacy_PHYTYPE_G) { | |
179 | if (!phy->gmode) | |
180 | return; | |
181 | b43legacy_phy_write(dev, 0x047A, 0xC111); | |
182 | } | |
183 | if (phy->savedpctlreg != 0xFFFF) | |
184 | return; | |
185 | #ifdef CONFIG_B43LEGACY_DEBUG | |
186 | if (phy->manual_txpower_control) | |
187 | return; | |
188 | #endif | |
189 | ||
190 | if (phy->type == B43legacy_PHYTYPE_B && | |
191 | phy->rev >= 2 && | |
192 | phy->radio_ver == 0x2050) | |
193 | b43legacy_radio_write16(dev, 0x0076, | |
194 | b43legacy_radio_read16(dev, 0x0076) | |
195 | | 0x0084); | |
196 | else { | |
197 | saved_batt = phy->bbatt; | |
198 | saved_ratt = phy->rfatt; | |
199 | saved_txctl1 = phy->txctl1; | |
200 | if ((phy->radio_rev >= 6) && (phy->radio_rev <= 8) | |
201 | && /*FIXME: incomplete specs for 5 < revision < 9 */ 0) | |
202 | b43legacy_radio_set_txpower_bg(dev, 0xB, 0x1F, 0); | |
203 | else | |
204 | b43legacy_radio_set_txpower_bg(dev, 0xB, 9, 0); | |
205 | must_reset_txpower = 1; | |
206 | } | |
207 | b43legacy_dummy_transmission(dev); | |
208 | ||
209 | phy->savedpctlreg = b43legacy_phy_read(dev, B43legacy_PHY_G_PCTL); | |
210 | ||
211 | if (must_reset_txpower) | |
212 | b43legacy_radio_set_txpower_bg(dev, saved_batt, saved_ratt, | |
213 | saved_txctl1); | |
214 | else | |
215 | b43legacy_radio_write16(dev, 0x0076, b43legacy_radio_read16(dev, | |
216 | 0x0076) & 0xFF7B); | |
217 | b43legacy_radio_clear_tssi(dev); | |
218 | } | |
219 | ||
220 | static void b43legacy_phy_agcsetup(struct b43legacy_wldev *dev) | |
221 | { | |
222 | struct b43legacy_phy *phy = &dev->phy; | |
223 | u16 offset = 0x0000; | |
224 | ||
225 | if (phy->rev == 1) | |
226 | offset = 0x4C00; | |
227 | ||
228 | b43legacy_ilt_write(dev, offset, 0x00FE); | |
229 | b43legacy_ilt_write(dev, offset + 1, 0x000D); | |
230 | b43legacy_ilt_write(dev, offset + 2, 0x0013); | |
231 | b43legacy_ilt_write(dev, offset + 3, 0x0019); | |
232 | ||
233 | if (phy->rev == 1) { | |
234 | b43legacy_ilt_write(dev, 0x1800, 0x2710); | |
235 | b43legacy_ilt_write(dev, 0x1801, 0x9B83); | |
236 | b43legacy_ilt_write(dev, 0x1802, 0x9B83); | |
237 | b43legacy_ilt_write(dev, 0x1803, 0x0F8D); | |
238 | b43legacy_phy_write(dev, 0x0455, 0x0004); | |
239 | } | |
240 | ||
241 | b43legacy_phy_write(dev, 0x04A5, (b43legacy_phy_read(dev, 0x04A5) | |
242 | & 0x00FF) | 0x5700); | |
243 | b43legacy_phy_write(dev, 0x041A, (b43legacy_phy_read(dev, 0x041A) | |
244 | & 0xFF80) | 0x000F); | |
245 | b43legacy_phy_write(dev, 0x041A, (b43legacy_phy_read(dev, 0x041A) | |
246 | & 0xC07F) | 0x2B80); | |
247 | b43legacy_phy_write(dev, 0x048C, (b43legacy_phy_read(dev, 0x048C) | |
248 | & 0xF0FF) | 0x0300); | |
249 | ||
250 | b43legacy_radio_write16(dev, 0x007A, | |
251 | b43legacy_radio_read16(dev, 0x007A) | |
252 | | 0x0008); | |
253 | ||
254 | b43legacy_phy_write(dev, 0x04A0, (b43legacy_phy_read(dev, 0x04A0) | |
255 | & 0xFFF0) | 0x0008); | |
256 | b43legacy_phy_write(dev, 0x04A1, (b43legacy_phy_read(dev, 0x04A1) | |
257 | & 0xF0FF) | 0x0600); | |
258 | b43legacy_phy_write(dev, 0x04A2, (b43legacy_phy_read(dev, 0x04A2) | |
259 | & 0xF0FF) | 0x0700); | |
260 | b43legacy_phy_write(dev, 0x04A0, (b43legacy_phy_read(dev, 0x04A0) | |
261 | & 0xF0FF) | 0x0100); | |
262 | ||
263 | if (phy->rev == 1) | |
264 | b43legacy_phy_write(dev, 0x04A2, | |
265 | (b43legacy_phy_read(dev, 0x04A2) | |
266 | & 0xFFF0) | 0x0007); | |
267 | ||
268 | b43legacy_phy_write(dev, 0x0488, (b43legacy_phy_read(dev, 0x0488) | |
269 | & 0xFF00) | 0x001C); | |
270 | b43legacy_phy_write(dev, 0x0488, (b43legacy_phy_read(dev, 0x0488) | |
271 | & 0xC0FF) | 0x0200); | |
272 | b43legacy_phy_write(dev, 0x0496, (b43legacy_phy_read(dev, 0x0496) | |
273 | & 0xFF00) | 0x001C); | |
274 | b43legacy_phy_write(dev, 0x0489, (b43legacy_phy_read(dev, 0x0489) | |
275 | & 0xFF00) | 0x0020); | |
276 | b43legacy_phy_write(dev, 0x0489, (b43legacy_phy_read(dev, 0x0489) | |
277 | & 0xC0FF) | 0x0200); | |
278 | b43legacy_phy_write(dev, 0x0482, (b43legacy_phy_read(dev, 0x0482) | |
279 | & 0xFF00) | 0x002E); | |
280 | b43legacy_phy_write(dev, 0x0496, (b43legacy_phy_read(dev, 0x0496) | |
281 | & 0x00FF) | 0x1A00); | |
282 | b43legacy_phy_write(dev, 0x0481, (b43legacy_phy_read(dev, 0x0481) | |
283 | & 0xFF00) | 0x0028); | |
284 | b43legacy_phy_write(dev, 0x0481, (b43legacy_phy_read(dev, 0x0481) | |
285 | & 0x00FF) | 0x2C00); | |
286 | ||
287 | if (phy->rev == 1) { | |
288 | b43legacy_phy_write(dev, 0x0430, 0x092B); | |
289 | b43legacy_phy_write(dev, 0x041B, | |
290 | (b43legacy_phy_read(dev, 0x041B) | |
291 | & 0xFFE1) | 0x0002); | |
292 | } else { | |
293 | b43legacy_phy_write(dev, 0x041B, | |
294 | b43legacy_phy_read(dev, 0x041B) & 0xFFE1); | |
295 | b43legacy_phy_write(dev, 0x041F, 0x287A); | |
296 | b43legacy_phy_write(dev, 0x0420, | |
297 | (b43legacy_phy_read(dev, 0x0420) | |
298 | & 0xFFF0) | 0x0004); | |
299 | } | |
300 | ||
301 | if (phy->rev > 2) { | |
302 | b43legacy_phy_write(dev, 0x0422, 0x287A); | |
303 | b43legacy_phy_write(dev, 0x0420, | |
304 | (b43legacy_phy_read(dev, 0x0420) | |
305 | & 0x0FFF) | 0x3000); | |
306 | } | |
307 | ||
308 | b43legacy_phy_write(dev, 0x04A8, (b43legacy_phy_read(dev, 0x04A8) | |
309 | & 0x8080) | 0x7874); | |
310 | b43legacy_phy_write(dev, 0x048E, 0x1C00); | |
311 | ||
312 | if (phy->rev == 1) { | |
313 | b43legacy_phy_write(dev, 0x04AB, | |
314 | (b43legacy_phy_read(dev, 0x04AB) | |
315 | & 0xF0FF) | 0x0600); | |
316 | b43legacy_phy_write(dev, 0x048B, 0x005E); | |
317 | b43legacy_phy_write(dev, 0x048C, | |
318 | (b43legacy_phy_read(dev, 0x048C) & 0xFF00) | |
319 | | 0x001E); | |
320 | b43legacy_phy_write(dev, 0x048D, 0x0002); | |
321 | } | |
322 | ||
323 | b43legacy_ilt_write(dev, offset + 0x0800, 0); | |
324 | b43legacy_ilt_write(dev, offset + 0x0801, 7); | |
325 | b43legacy_ilt_write(dev, offset + 0x0802, 16); | |
326 | b43legacy_ilt_write(dev, offset + 0x0803, 28); | |
327 | ||
328 | if (phy->rev >= 6) { | |
329 | b43legacy_phy_write(dev, 0x0426, | |
330 | (b43legacy_phy_read(dev, 0x0426) & 0xFFFC)); | |
331 | b43legacy_phy_write(dev, 0x0426, | |
332 | (b43legacy_phy_read(dev, 0x0426) & 0xEFFF)); | |
333 | } | |
334 | } | |
335 | ||
336 | static void b43legacy_phy_setupg(struct b43legacy_wldev *dev) | |
337 | { | |
338 | struct b43legacy_phy *phy = &dev->phy; | |
339 | u16 i; | |
340 | ||
341 | B43legacy_BUG_ON(phy->type != B43legacy_PHYTYPE_G); | |
342 | if (phy->rev == 1) { | |
343 | b43legacy_phy_write(dev, 0x0406, 0x4F19); | |
344 | b43legacy_phy_write(dev, B43legacy_PHY_G_CRS, | |
345 | (b43legacy_phy_read(dev, | |
346 | B43legacy_PHY_G_CRS) & 0xFC3F) | 0x0340); | |
347 | b43legacy_phy_write(dev, 0x042C, 0x005A); | |
348 | b43legacy_phy_write(dev, 0x0427, 0x001A); | |
349 | ||
350 | for (i = 0; i < B43legacy_ILT_FINEFREQG_SIZE; i++) | |
351 | b43legacy_ilt_write(dev, 0x5800 + i, | |
352 | b43legacy_ilt_finefreqg[i]); | |
353 | for (i = 0; i < B43legacy_ILT_NOISEG1_SIZE; i++) | |
354 | b43legacy_ilt_write(dev, 0x1800 + i, | |
355 | b43legacy_ilt_noiseg1[i]); | |
356 | for (i = 0; i < B43legacy_ILT_ROTOR_SIZE; i++) | |
357 | b43legacy_ilt_write32(dev, 0x2000 + i, | |
358 | b43legacy_ilt_rotor[i]); | |
359 | } else { | |
360 | /* nrssi values are signed 6-bit values. Why 0x7654 here? */ | |
361 | b43legacy_nrssi_hw_write(dev, 0xBA98, (s16)0x7654); | |
362 | ||
363 | if (phy->rev == 2) { | |
364 | b43legacy_phy_write(dev, 0x04C0, 0x1861); | |
365 | b43legacy_phy_write(dev, 0x04C1, 0x0271); | |
366 | } else if (phy->rev > 2) { | |
367 | b43legacy_phy_write(dev, 0x04C0, 0x0098); | |
368 | b43legacy_phy_write(dev, 0x04C1, 0x0070); | |
369 | b43legacy_phy_write(dev, 0x04C9, 0x0080); | |
370 | } | |
371 | b43legacy_phy_write(dev, 0x042B, b43legacy_phy_read(dev, | |
372 | 0x042B) | 0x800); | |
373 | ||
374 | for (i = 0; i < 64; i++) | |
375 | b43legacy_ilt_write(dev, 0x4000 + i, i); | |
376 | for (i = 0; i < B43legacy_ILT_NOISEG2_SIZE; i++) | |
377 | b43legacy_ilt_write(dev, 0x1800 + i, | |
378 | b43legacy_ilt_noiseg2[i]); | |
379 | } | |
380 | ||
381 | if (phy->rev <= 2) | |
382 | for (i = 0; i < B43legacy_ILT_NOISESCALEG_SIZE; i++) | |
383 | b43legacy_ilt_write(dev, 0x1400 + i, | |
384 | b43legacy_ilt_noisescaleg1[i]); | |
385 | else if ((phy->rev >= 7) && (b43legacy_phy_read(dev, 0x0449) & 0x0200)) | |
386 | for (i = 0; i < B43legacy_ILT_NOISESCALEG_SIZE; i++) | |
387 | b43legacy_ilt_write(dev, 0x1400 + i, | |
388 | b43legacy_ilt_noisescaleg3[i]); | |
389 | else | |
390 | for (i = 0; i < B43legacy_ILT_NOISESCALEG_SIZE; i++) | |
391 | b43legacy_ilt_write(dev, 0x1400 + i, | |
392 | b43legacy_ilt_noisescaleg2[i]); | |
393 | ||
394 | if (phy->rev == 2) | |
395 | for (i = 0; i < B43legacy_ILT_SIGMASQR_SIZE; i++) | |
396 | b43legacy_ilt_write(dev, 0x5000 + i, | |
397 | b43legacy_ilt_sigmasqr1[i]); | |
398 | else if ((phy->rev > 2) && (phy->rev <= 8)) | |
399 | for (i = 0; i < B43legacy_ILT_SIGMASQR_SIZE; i++) | |
400 | b43legacy_ilt_write(dev, 0x5000 + i, | |
401 | b43legacy_ilt_sigmasqr2[i]); | |
402 | ||
403 | if (phy->rev == 1) { | |
404 | for (i = 0; i < B43legacy_ILT_RETARD_SIZE; i++) | |
405 | b43legacy_ilt_write32(dev, 0x2400 + i, | |
406 | b43legacy_ilt_retard[i]); | |
407 | for (i = 4; i < 20; i++) | |
408 | b43legacy_ilt_write(dev, 0x5400 + i, 0x0020); | |
409 | b43legacy_phy_agcsetup(dev); | |
410 | ||
411 | if (is_bcm_board_vendor(dev) && | |
412 | (dev->dev->bus->boardinfo.type == 0x0416) && | |
413 | (dev->dev->bus->boardinfo.rev == 0x0017)) | |
414 | return; | |
415 | ||
416 | b43legacy_ilt_write(dev, 0x5001, 0x0002); | |
417 | b43legacy_ilt_write(dev, 0x5002, 0x0001); | |
418 | } else { | |
419 | for (i = 0; i <= 0x20; i++) | |
420 | b43legacy_ilt_write(dev, 0x1000 + i, 0x0820); | |
421 | b43legacy_phy_agcsetup(dev); | |
422 | b43legacy_phy_read(dev, 0x0400); /* dummy read */ | |
423 | b43legacy_phy_write(dev, 0x0403, 0x1000); | |
424 | b43legacy_ilt_write(dev, 0x3C02, 0x000F); | |
425 | b43legacy_ilt_write(dev, 0x3C03, 0x0014); | |
426 | ||
427 | if (is_bcm_board_vendor(dev) && | |
428 | (dev->dev->bus->boardinfo.type == 0x0416) && | |
429 | (dev->dev->bus->boardinfo.rev == 0x0017)) | |
430 | return; | |
431 | ||
432 | b43legacy_ilt_write(dev, 0x0401, 0x0002); | |
433 | b43legacy_ilt_write(dev, 0x0402, 0x0001); | |
434 | } | |
435 | } | |
436 | ||
437 | /* Initialize the APHY portion of a GPHY. */ | |
438 | static void b43legacy_phy_inita(struct b43legacy_wldev *dev) | |
439 | { | |
440 | ||
441 | might_sleep(); | |
442 | ||
443 | b43legacy_phy_setupg(dev); | |
444 | if (dev->dev->bus->sprom.r1.boardflags_lo & B43legacy_BFL_PACTRL) | |
445 | b43legacy_phy_write(dev, 0x046E, 0x03CF); | |
446 | } | |
447 | ||
448 | static void b43legacy_phy_initb2(struct b43legacy_wldev *dev) | |
449 | { | |
450 | struct b43legacy_phy *phy = &dev->phy; | |
451 | u16 offset; | |
452 | int val; | |
453 | ||
454 | b43legacy_write16(dev, 0x03EC, 0x3F22); | |
455 | b43legacy_phy_write(dev, 0x0020, 0x301C); | |
456 | b43legacy_phy_write(dev, 0x0026, 0x0000); | |
457 | b43legacy_phy_write(dev, 0x0030, 0x00C6); | |
458 | b43legacy_phy_write(dev, 0x0088, 0x3E00); | |
459 | val = 0x3C3D; | |
460 | for (offset = 0x0089; offset < 0x00A7; offset++) { | |
461 | b43legacy_phy_write(dev, offset, val); | |
462 | val -= 0x0202; | |
463 | } | |
464 | b43legacy_phy_write(dev, 0x03E4, 0x3000); | |
42a9174f | 465 | b43legacy_radio_selectchannel(dev, phy->channel, 0); |
75388acd LF |
466 | if (phy->radio_ver != 0x2050) { |
467 | b43legacy_radio_write16(dev, 0x0075, 0x0080); | |
468 | b43legacy_radio_write16(dev, 0x0079, 0x0081); | |
469 | } | |
470 | b43legacy_radio_write16(dev, 0x0050, 0x0020); | |
471 | b43legacy_radio_write16(dev, 0x0050, 0x0023); | |
472 | if (phy->radio_ver == 0x2050) { | |
473 | b43legacy_radio_write16(dev, 0x0050, 0x0020); | |
474 | b43legacy_radio_write16(dev, 0x005A, 0x0070); | |
475 | b43legacy_radio_write16(dev, 0x005B, 0x007B); | |
476 | b43legacy_radio_write16(dev, 0x005C, 0x00B0); | |
477 | b43legacy_radio_write16(dev, 0x007A, 0x000F); | |
478 | b43legacy_phy_write(dev, 0x0038, 0x0677); | |
479 | b43legacy_radio_init2050(dev); | |
480 | } | |
481 | b43legacy_phy_write(dev, 0x0014, 0x0080); | |
482 | b43legacy_phy_write(dev, 0x0032, 0x00CA); | |
483 | b43legacy_phy_write(dev, 0x0032, 0x00CC); | |
484 | b43legacy_phy_write(dev, 0x0035, 0x07C2); | |
485 | b43legacy_phy_lo_b_measure(dev); | |
486 | b43legacy_phy_write(dev, 0x0026, 0xCC00); | |
487 | if (phy->radio_ver != 0x2050) | |
488 | b43legacy_phy_write(dev, 0x0026, 0xCE00); | |
489 | b43legacy_write16(dev, B43legacy_MMIO_CHANNEL_EXT, 0x1000); | |
490 | b43legacy_phy_write(dev, 0x002A, 0x88A3); | |
491 | if (phy->radio_ver != 0x2050) | |
492 | b43legacy_phy_write(dev, 0x002A, 0x88C2); | |
493 | b43legacy_radio_set_txpower_bg(dev, 0xFFFF, 0xFFFF, 0xFFFF); | |
494 | b43legacy_phy_init_pctl(dev); | |
495 | } | |
496 | ||
497 | static void b43legacy_phy_initb4(struct b43legacy_wldev *dev) | |
498 | { | |
499 | struct b43legacy_phy *phy = &dev->phy; | |
500 | u16 offset; | |
501 | u16 val; | |
502 | ||
503 | b43legacy_write16(dev, 0x03EC, 0x3F22); | |
504 | b43legacy_phy_write(dev, 0x0020, 0x301C); | |
505 | b43legacy_phy_write(dev, 0x0026, 0x0000); | |
506 | b43legacy_phy_write(dev, 0x0030, 0x00C6); | |
507 | b43legacy_phy_write(dev, 0x0088, 0x3E00); | |
508 | val = 0x3C3D; | |
509 | for (offset = 0x0089; offset < 0x00A7; offset++) { | |
510 | b43legacy_phy_write(dev, offset, val); | |
511 | val -= 0x0202; | |
512 | } | |
513 | b43legacy_phy_write(dev, 0x03E4, 0x3000); | |
42a9174f | 514 | b43legacy_radio_selectchannel(dev, phy->channel, 0); |
75388acd LF |
515 | if (phy->radio_ver != 0x2050) { |
516 | b43legacy_radio_write16(dev, 0x0075, 0x0080); | |
517 | b43legacy_radio_write16(dev, 0x0079, 0x0081); | |
518 | } | |
519 | b43legacy_radio_write16(dev, 0x0050, 0x0020); | |
520 | b43legacy_radio_write16(dev, 0x0050, 0x0023); | |
521 | if (phy->radio_ver == 0x2050) { | |
522 | b43legacy_radio_write16(dev, 0x0050, 0x0020); | |
523 | b43legacy_radio_write16(dev, 0x005A, 0x0070); | |
524 | b43legacy_radio_write16(dev, 0x005B, 0x007B); | |
525 | b43legacy_radio_write16(dev, 0x005C, 0x00B0); | |
526 | b43legacy_radio_write16(dev, 0x007A, 0x000F); | |
527 | b43legacy_phy_write(dev, 0x0038, 0x0677); | |
528 | b43legacy_radio_init2050(dev); | |
529 | } | |
530 | b43legacy_phy_write(dev, 0x0014, 0x0080); | |
531 | b43legacy_phy_write(dev, 0x0032, 0x00CA); | |
532 | if (phy->radio_ver == 0x2050) | |
533 | b43legacy_phy_write(dev, 0x0032, 0x00E0); | |
534 | b43legacy_phy_write(dev, 0x0035, 0x07C2); | |
535 | ||
536 | b43legacy_phy_lo_b_measure(dev); | |
537 | ||
538 | b43legacy_phy_write(dev, 0x0026, 0xCC00); | |
539 | if (phy->radio_ver == 0x2050) | |
540 | b43legacy_phy_write(dev, 0x0026, 0xCE00); | |
541 | b43legacy_write16(dev, B43legacy_MMIO_CHANNEL_EXT, 0x1100); | |
542 | b43legacy_phy_write(dev, 0x002A, 0x88A3); | |
543 | if (phy->radio_ver == 0x2050) | |
544 | b43legacy_phy_write(dev, 0x002A, 0x88C2); | |
545 | b43legacy_radio_set_txpower_bg(dev, 0xFFFF, 0xFFFF, 0xFFFF); | |
546 | if (dev->dev->bus->sprom.r1.boardflags_lo & B43legacy_BFL_RSSI) { | |
547 | b43legacy_calc_nrssi_slope(dev); | |
548 | b43legacy_calc_nrssi_threshold(dev); | |
549 | } | |
550 | b43legacy_phy_init_pctl(dev); | |
551 | } | |
552 | ||
553 | static void b43legacy_phy_initb5(struct b43legacy_wldev *dev) | |
554 | { | |
555 | struct b43legacy_phy *phy = &dev->phy; | |
556 | u16 offset; | |
557 | u16 value; | |
558 | u8 old_channel; | |
559 | ||
560 | if (phy->analog == 1) | |
561 | b43legacy_radio_write16(dev, 0x007A, | |
562 | b43legacy_radio_read16(dev, 0x007A) | |
563 | | 0x0050); | |
564 | if (!is_bcm_board_vendor(dev) && | |
565 | (dev->dev->bus->boardinfo.type != 0x0416)) { | |
566 | value = 0x2120; | |
567 | for (offset = 0x00A8 ; offset < 0x00C7; offset++) { | |
568 | b43legacy_phy_write(dev, offset, value); | |
569 | value += 0x0202; | |
570 | } | |
571 | } | |
572 | b43legacy_phy_write(dev, 0x0035, | |
573 | (b43legacy_phy_read(dev, 0x0035) & 0xF0FF) | |
574 | | 0x0700); | |
575 | if (phy->radio_ver == 0x2050) | |
576 | b43legacy_phy_write(dev, 0x0038, 0x0667); | |
577 | ||
578 | if (phy->gmode) { | |
579 | if (phy->radio_ver == 0x2050) { | |
580 | b43legacy_radio_write16(dev, 0x007A, | |
581 | b43legacy_radio_read16(dev, 0x007A) | |
582 | | 0x0020); | |
583 | b43legacy_radio_write16(dev, 0x0051, | |
584 | b43legacy_radio_read16(dev, 0x0051) | |
585 | | 0x0004); | |
586 | } | |
587 | b43legacy_write16(dev, B43legacy_MMIO_PHY_RADIO, 0x0000); | |
588 | ||
589 | b43legacy_phy_write(dev, 0x0802, b43legacy_phy_read(dev, 0x0802) | |
590 | | 0x0100); | |
591 | b43legacy_phy_write(dev, 0x042B, b43legacy_phy_read(dev, 0x042B) | |
592 | | 0x2000); | |
593 | ||
594 | b43legacy_phy_write(dev, 0x001C, 0x186A); | |
595 | ||
596 | b43legacy_phy_write(dev, 0x0013, (b43legacy_phy_read(dev, | |
597 | 0x0013) & 0x00FF) | 0x1900); | |
598 | b43legacy_phy_write(dev, 0x0035, (b43legacy_phy_read(dev, | |
599 | 0x0035) & 0xFFC0) | 0x0064); | |
600 | b43legacy_phy_write(dev, 0x005D, (b43legacy_phy_read(dev, | |
601 | 0x005D) & 0xFF80) | 0x000A); | |
602 | } | |
603 | ||
604 | if (dev->bad_frames_preempt) | |
605 | b43legacy_phy_write(dev, B43legacy_PHY_RADIO_BITFIELD, | |
606 | b43legacy_phy_read(dev, | |
607 | B43legacy_PHY_RADIO_BITFIELD) | (1 << 11)); | |
608 | ||
609 | if (phy->analog == 1) { | |
610 | b43legacy_phy_write(dev, 0x0026, 0xCE00); | |
611 | b43legacy_phy_write(dev, 0x0021, 0x3763); | |
612 | b43legacy_phy_write(dev, 0x0022, 0x1BC3); | |
613 | b43legacy_phy_write(dev, 0x0023, 0x06F9); | |
614 | b43legacy_phy_write(dev, 0x0024, 0x037E); | |
615 | } else | |
616 | b43legacy_phy_write(dev, 0x0026, 0xCC00); | |
617 | b43legacy_phy_write(dev, 0x0030, 0x00C6); | |
618 | b43legacy_write16(dev, 0x03EC, 0x3F22); | |
619 | ||
620 | if (phy->analog == 1) | |
621 | b43legacy_phy_write(dev, 0x0020, 0x3E1C); | |
622 | else | |
623 | b43legacy_phy_write(dev, 0x0020, 0x301C); | |
624 | ||
625 | if (phy->analog == 0) | |
626 | b43legacy_write16(dev, 0x03E4, 0x3000); | |
627 | ||
628 | old_channel = (phy->channel == 0xFF) ? 1 : phy->channel; | |
629 | /* Force to channel 7, even if not supported. */ | |
630 | b43legacy_radio_selectchannel(dev, 7, 0); | |
631 | ||
632 | if (phy->radio_ver != 0x2050) { | |
633 | b43legacy_radio_write16(dev, 0x0075, 0x0080); | |
634 | b43legacy_radio_write16(dev, 0x0079, 0x0081); | |
635 | } | |
636 | ||
637 | b43legacy_radio_write16(dev, 0x0050, 0x0020); | |
638 | b43legacy_radio_write16(dev, 0x0050, 0x0023); | |
639 | ||
640 | if (phy->radio_ver == 0x2050) { | |
641 | b43legacy_radio_write16(dev, 0x0050, 0x0020); | |
642 | b43legacy_radio_write16(dev, 0x005A, 0x0070); | |
643 | } | |
644 | ||
645 | b43legacy_radio_write16(dev, 0x005B, 0x007B); | |
646 | b43legacy_radio_write16(dev, 0x005C, 0x00B0); | |
647 | ||
648 | b43legacy_radio_write16(dev, 0x007A, b43legacy_radio_read16(dev, | |
649 | 0x007A) | 0x0007); | |
650 | ||
651 | b43legacy_radio_selectchannel(dev, old_channel, 0); | |
652 | ||
653 | b43legacy_phy_write(dev, 0x0014, 0x0080); | |
654 | b43legacy_phy_write(dev, 0x0032, 0x00CA); | |
655 | b43legacy_phy_write(dev, 0x002A, 0x88A3); | |
656 | ||
657 | b43legacy_radio_set_txpower_bg(dev, 0xFFFF, 0xFFFF, 0xFFFF); | |
658 | ||
659 | if (phy->radio_ver == 0x2050) | |
660 | b43legacy_radio_write16(dev, 0x005D, 0x000D); | |
661 | ||
662 | b43legacy_write16(dev, 0x03E4, (b43legacy_read16(dev, 0x03E4) & | |
663 | 0xFFC0) | 0x0004); | |
664 | } | |
665 | ||
666 | static void b43legacy_phy_initb6(struct b43legacy_wldev *dev) | |
667 | { | |
668 | struct b43legacy_phy *phy = &dev->phy; | |
669 | u16 offset; | |
670 | u16 val; | |
671 | u8 old_channel; | |
672 | ||
673 | b43legacy_phy_write(dev, 0x003E, 0x817A); | |
674 | b43legacy_radio_write16(dev, 0x007A, | |
675 | (b43legacy_radio_read16(dev, 0x007A) | 0x0058)); | |
676 | if (phy->radio_rev == 4 || | |
677 | phy->radio_rev == 5) { | |
678 | b43legacy_radio_write16(dev, 0x0051, 0x0037); | |
679 | b43legacy_radio_write16(dev, 0x0052, 0x0070); | |
680 | b43legacy_radio_write16(dev, 0x0053, 0x00B3); | |
681 | b43legacy_radio_write16(dev, 0x0054, 0x009B); | |
682 | b43legacy_radio_write16(dev, 0x005A, 0x0088); | |
683 | b43legacy_radio_write16(dev, 0x005B, 0x0088); | |
684 | b43legacy_radio_write16(dev, 0x005D, 0x0088); | |
685 | b43legacy_radio_write16(dev, 0x005E, 0x0088); | |
686 | b43legacy_radio_write16(dev, 0x007D, 0x0088); | |
687 | b43legacy_shm_write32(dev, B43legacy_SHM_SHARED, | |
688 | B43legacy_UCODEFLAGS_OFFSET, | |
689 | (b43legacy_shm_read32(dev, | |
690 | B43legacy_SHM_SHARED, | |
691 | B43legacy_UCODEFLAGS_OFFSET) | |
692 | | 0x00000200)); | |
693 | } | |
694 | if (phy->radio_rev == 8) { | |
695 | b43legacy_radio_write16(dev, 0x0051, 0x0000); | |
696 | b43legacy_radio_write16(dev, 0x0052, 0x0040); | |
697 | b43legacy_radio_write16(dev, 0x0053, 0x00B7); | |
698 | b43legacy_radio_write16(dev, 0x0054, 0x0098); | |
699 | b43legacy_radio_write16(dev, 0x005A, 0x0088); | |
700 | b43legacy_radio_write16(dev, 0x005B, 0x006B); | |
701 | b43legacy_radio_write16(dev, 0x005C, 0x000F); | |
702 | if (dev->dev->bus->sprom.r1.boardflags_lo & 0x8000) { | |
703 | b43legacy_radio_write16(dev, 0x005D, 0x00FA); | |
704 | b43legacy_radio_write16(dev, 0x005E, 0x00D8); | |
705 | } else { | |
706 | b43legacy_radio_write16(dev, 0x005D, 0x00F5); | |
707 | b43legacy_radio_write16(dev, 0x005E, 0x00B8); | |
708 | } | |
709 | b43legacy_radio_write16(dev, 0x0073, 0x0003); | |
710 | b43legacy_radio_write16(dev, 0x007D, 0x00A8); | |
711 | b43legacy_radio_write16(dev, 0x007C, 0x0001); | |
712 | b43legacy_radio_write16(dev, 0x007E, 0x0008); | |
713 | } | |
714 | val = 0x1E1F; | |
715 | for (offset = 0x0088; offset < 0x0098; offset++) { | |
716 | b43legacy_phy_write(dev, offset, val); | |
717 | val -= 0x0202; | |
718 | } | |
719 | val = 0x3E3F; | |
720 | for (offset = 0x0098; offset < 0x00A8; offset++) { | |
721 | b43legacy_phy_write(dev, offset, val); | |
722 | val -= 0x0202; | |
723 | } | |
724 | val = 0x2120; | |
725 | for (offset = 0x00A8; offset < 0x00C8; offset++) { | |
726 | b43legacy_phy_write(dev, offset, (val & 0x3F3F)); | |
727 | val += 0x0202; | |
728 | } | |
729 | if (phy->type == B43legacy_PHYTYPE_G) { | |
730 | b43legacy_radio_write16(dev, 0x007A, | |
731 | b43legacy_radio_read16(dev, 0x007A) | | |
732 | 0x0020); | |
733 | b43legacy_radio_write16(dev, 0x0051, | |
734 | b43legacy_radio_read16(dev, 0x0051) | | |
735 | 0x0004); | |
736 | b43legacy_phy_write(dev, 0x0802, | |
737 | b43legacy_phy_read(dev, 0x0802) | 0x0100); | |
738 | b43legacy_phy_write(dev, 0x042B, | |
739 | b43legacy_phy_read(dev, 0x042B) | 0x2000); | |
740 | b43legacy_phy_write(dev, 0x5B, 0x0000); | |
741 | b43legacy_phy_write(dev, 0x5C, 0x0000); | |
742 | } | |
743 | ||
744 | old_channel = phy->channel; | |
745 | if (old_channel >= 8) | |
746 | b43legacy_radio_selectchannel(dev, 1, 0); | |
747 | else | |
748 | b43legacy_radio_selectchannel(dev, 13, 0); | |
749 | ||
750 | b43legacy_radio_write16(dev, 0x0050, 0x0020); | |
751 | b43legacy_radio_write16(dev, 0x0050, 0x0023); | |
752 | udelay(40); | |
753 | if (phy->radio_rev < 6 || phy->radio_rev == 8) { | |
754 | b43legacy_radio_write16(dev, 0x007C, | |
755 | (b43legacy_radio_read16(dev, 0x007C) | |
756 | | 0x0002)); | |
757 | b43legacy_radio_write16(dev, 0x0050, 0x0020); | |
758 | } | |
759 | if (phy->radio_rev <= 2) { | |
760 | b43legacy_radio_write16(dev, 0x007C, 0x0020); | |
761 | b43legacy_radio_write16(dev, 0x005A, 0x0070); | |
762 | b43legacy_radio_write16(dev, 0x005B, 0x007B); | |
763 | b43legacy_radio_write16(dev, 0x005C, 0x00B0); | |
764 | } | |
765 | b43legacy_radio_write16(dev, 0x007A, | |
766 | (b43legacy_radio_read16(dev, | |
767 | 0x007A) & 0x00F8) | 0x0007); | |
768 | ||
769 | b43legacy_radio_selectchannel(dev, old_channel, 0); | |
770 | ||
771 | b43legacy_phy_write(dev, 0x0014, 0x0200); | |
772 | if (phy->radio_rev >= 6) | |
773 | b43legacy_phy_write(dev, 0x002A, 0x88C2); | |
774 | else | |
775 | b43legacy_phy_write(dev, 0x002A, 0x8AC0); | |
776 | b43legacy_phy_write(dev, 0x0038, 0x0668); | |
777 | b43legacy_radio_set_txpower_bg(dev, 0xFFFF, 0xFFFF, 0xFFFF); | |
778 | if (phy->radio_rev <= 5) | |
779 | b43legacy_phy_write(dev, 0x005D, (b43legacy_phy_read(dev, | |
780 | 0x005D) & 0xFF80) | 0x0003); | |
781 | if (phy->radio_rev <= 2) | |
782 | b43legacy_radio_write16(dev, 0x005D, 0x000D); | |
783 | ||
784 | if (phy->analog == 4) { | |
785 | b43legacy_write16(dev, 0x03E4, 0x0009); | |
786 | b43legacy_phy_write(dev, 0x61, b43legacy_phy_read(dev, 0x61) | |
787 | & 0xFFF); | |
788 | } else | |
789 | b43legacy_phy_write(dev, 0x0002, (b43legacy_phy_read(dev, | |
790 | 0x0002) & 0xFFC0) | 0x0004); | |
791 | if (phy->type == B43legacy_PHYTYPE_G) | |
792 | b43legacy_write16(dev, 0x03E6, 0x0); | |
793 | if (phy->type == B43legacy_PHYTYPE_B) { | |
794 | b43legacy_write16(dev, 0x03E6, 0x8140); | |
795 | b43legacy_phy_write(dev, 0x0016, 0x0410); | |
796 | b43legacy_phy_write(dev, 0x0017, 0x0820); | |
797 | b43legacy_phy_write(dev, 0x0062, 0x0007); | |
798 | b43legacy_radio_init2050(dev); | |
799 | b43legacy_phy_lo_g_measure(dev); | |
800 | if (dev->dev->bus->sprom.r1.boardflags_lo & | |
801 | B43legacy_BFL_RSSI) { | |
802 | b43legacy_calc_nrssi_slope(dev); | |
803 | b43legacy_calc_nrssi_threshold(dev); | |
804 | } | |
805 | b43legacy_phy_init_pctl(dev); | |
806 | } | |
807 | } | |
808 | ||
809 | static void b43legacy_calc_loopback_gain(struct b43legacy_wldev *dev) | |
810 | { | |
811 | struct b43legacy_phy *phy = &dev->phy; | |
812 | u16 backup_phy[15] = {0}; | |
813 | u16 backup_radio[3]; | |
814 | u16 backup_bband; | |
815 | u16 i; | |
816 | u16 loop1_cnt; | |
817 | u16 loop1_done; | |
818 | u16 loop1_omitted; | |
819 | u16 loop2_done; | |
820 | ||
821 | backup_phy[0] = b43legacy_phy_read(dev, 0x0429); | |
822 | backup_phy[1] = b43legacy_phy_read(dev, 0x0001); | |
823 | backup_phy[2] = b43legacy_phy_read(dev, 0x0811); | |
824 | backup_phy[3] = b43legacy_phy_read(dev, 0x0812); | |
825 | if (phy->rev != 1) { | |
826 | backup_phy[4] = b43legacy_phy_read(dev, 0x0814); | |
827 | backup_phy[5] = b43legacy_phy_read(dev, 0x0815); | |
828 | } | |
829 | backup_phy[6] = b43legacy_phy_read(dev, 0x005A); | |
830 | backup_phy[7] = b43legacy_phy_read(dev, 0x0059); | |
831 | backup_phy[8] = b43legacy_phy_read(dev, 0x0058); | |
832 | backup_phy[9] = b43legacy_phy_read(dev, 0x000A); | |
833 | backup_phy[10] = b43legacy_phy_read(dev, 0x0003); | |
834 | backup_phy[11] = b43legacy_phy_read(dev, 0x080F); | |
835 | backup_phy[12] = b43legacy_phy_read(dev, 0x0810); | |
836 | backup_phy[13] = b43legacy_phy_read(dev, 0x002B); | |
837 | backup_phy[14] = b43legacy_phy_read(dev, 0x0015); | |
838 | b43legacy_phy_read(dev, 0x002D); /* dummy read */ | |
839 | backup_bband = phy->bbatt; | |
840 | backup_radio[0] = b43legacy_radio_read16(dev, 0x0052); | |
841 | backup_radio[1] = b43legacy_radio_read16(dev, 0x0043); | |
842 | backup_radio[2] = b43legacy_radio_read16(dev, 0x007A); | |
843 | ||
844 | b43legacy_phy_write(dev, 0x0429, | |
845 | b43legacy_phy_read(dev, 0x0429) & 0x3FFF); | |
846 | b43legacy_phy_write(dev, 0x0001, | |
847 | b43legacy_phy_read(dev, 0x0001) & 0x8000); | |
848 | b43legacy_phy_write(dev, 0x0811, | |
849 | b43legacy_phy_read(dev, 0x0811) | 0x0002); | |
850 | b43legacy_phy_write(dev, 0x0812, | |
851 | b43legacy_phy_read(dev, 0x0812) & 0xFFFD); | |
852 | b43legacy_phy_write(dev, 0x0811, | |
853 | b43legacy_phy_read(dev, 0x0811) | 0x0001); | |
854 | b43legacy_phy_write(dev, 0x0812, | |
855 | b43legacy_phy_read(dev, 0x0812) & 0xFFFE); | |
856 | if (phy->rev != 1) { | |
857 | b43legacy_phy_write(dev, 0x0814, | |
858 | b43legacy_phy_read(dev, 0x0814) | 0x0001); | |
859 | b43legacy_phy_write(dev, 0x0815, | |
860 | b43legacy_phy_read(dev, 0x0815) & 0xFFFE); | |
861 | b43legacy_phy_write(dev, 0x0814, | |
862 | b43legacy_phy_read(dev, 0x0814) | 0x0002); | |
863 | b43legacy_phy_write(dev, 0x0815, | |
864 | b43legacy_phy_read(dev, 0x0815) & 0xFFFD); | |
865 | } | |
866 | b43legacy_phy_write(dev, 0x0811, b43legacy_phy_read(dev, 0x0811) | | |
867 | 0x000C); | |
868 | b43legacy_phy_write(dev, 0x0812, b43legacy_phy_read(dev, 0x0812) | | |
869 | 0x000C); | |
870 | ||
871 | b43legacy_phy_write(dev, 0x0811, (b43legacy_phy_read(dev, 0x0811) | |
872 | & 0xFFCF) | 0x0030); | |
873 | b43legacy_phy_write(dev, 0x0812, (b43legacy_phy_read(dev, 0x0812) | |
874 | & 0xFFCF) | 0x0010); | |
875 | ||
876 | b43legacy_phy_write(dev, 0x005A, 0x0780); | |
877 | b43legacy_phy_write(dev, 0x0059, 0xC810); | |
878 | b43legacy_phy_write(dev, 0x0058, 0x000D); | |
879 | if (phy->analog == 0) | |
880 | b43legacy_phy_write(dev, 0x0003, 0x0122); | |
881 | else | |
882 | b43legacy_phy_write(dev, 0x000A, | |
883 | b43legacy_phy_read(dev, 0x000A) | |
884 | | 0x2000); | |
885 | if (phy->rev != 1) { | |
886 | b43legacy_phy_write(dev, 0x0814, | |
887 | b43legacy_phy_read(dev, 0x0814) | 0x0004); | |
888 | b43legacy_phy_write(dev, 0x0815, | |
889 | b43legacy_phy_read(dev, 0x0815) & 0xFFFB); | |
890 | } | |
891 | b43legacy_phy_write(dev, 0x0003, | |
892 | (b43legacy_phy_read(dev, 0x0003) | |
893 | & 0xFF9F) | 0x0040); | |
894 | if (phy->radio_ver == 0x2050 && phy->radio_rev == 2) { | |
895 | b43legacy_radio_write16(dev, 0x0052, 0x0000); | |
896 | b43legacy_radio_write16(dev, 0x0043, | |
897 | (b43legacy_radio_read16(dev, 0x0043) | |
898 | & 0xFFF0) | 0x0009); | |
899 | loop1_cnt = 9; | |
900 | } else if (phy->radio_rev == 8) { | |
901 | b43legacy_radio_write16(dev, 0x0043, 0x000F); | |
902 | loop1_cnt = 15; | |
903 | } else | |
904 | loop1_cnt = 0; | |
905 | ||
906 | b43legacy_phy_set_baseband_attenuation(dev, 11); | |
907 | ||
908 | if (phy->rev >= 3) | |
909 | b43legacy_phy_write(dev, 0x080F, 0xC020); | |
910 | else | |
911 | b43legacy_phy_write(dev, 0x080F, 0x8020); | |
912 | b43legacy_phy_write(dev, 0x0810, 0x0000); | |
913 | ||
914 | b43legacy_phy_write(dev, 0x002B, | |
915 | (b43legacy_phy_read(dev, 0x002B) | |
916 | & 0xFFC0) | 0x0001); | |
917 | b43legacy_phy_write(dev, 0x002B, | |
918 | (b43legacy_phy_read(dev, 0x002B) | |
919 | & 0xC0FF) | 0x0800); | |
920 | b43legacy_phy_write(dev, 0x0811, | |
921 | b43legacy_phy_read(dev, 0x0811) | 0x0100); | |
922 | b43legacy_phy_write(dev, 0x0812, | |
923 | b43legacy_phy_read(dev, 0x0812) & 0xCFFF); | |
924 | if (dev->dev->bus->sprom.r1.boardflags_lo & B43legacy_BFL_EXTLNA) { | |
925 | if (phy->rev >= 7) { | |
926 | b43legacy_phy_write(dev, 0x0811, | |
927 | b43legacy_phy_read(dev, 0x0811) | |
928 | | 0x0800); | |
929 | b43legacy_phy_write(dev, 0x0812, | |
930 | b43legacy_phy_read(dev, 0x0812) | |
931 | | 0x8000); | |
932 | } | |
933 | } | |
934 | b43legacy_radio_write16(dev, 0x007A, | |
935 | b43legacy_radio_read16(dev, 0x007A) | |
936 | & 0x00F7); | |
937 | ||
938 | for (i = 0; i < loop1_cnt; i++) { | |
939 | b43legacy_radio_write16(dev, 0x0043, loop1_cnt); | |
940 | b43legacy_phy_write(dev, 0x0812, | |
941 | (b43legacy_phy_read(dev, 0x0812) | |
942 | & 0xF0FF) | (i << 8)); | |
943 | b43legacy_phy_write(dev, 0x0015, | |
944 | (b43legacy_phy_read(dev, 0x0015) | |
945 | & 0x0FFF) | 0xA000); | |
946 | b43legacy_phy_write(dev, 0x0015, | |
947 | (b43legacy_phy_read(dev, 0x0015) | |
948 | & 0x0FFF) | 0xF000); | |
949 | udelay(20); | |
950 | if (b43legacy_phy_read(dev, 0x002D) >= 0x0DFC) | |
951 | break; | |
952 | } | |
953 | loop1_done = i; | |
954 | loop1_omitted = loop1_cnt - loop1_done; | |
955 | ||
956 | loop2_done = 0; | |
957 | if (loop1_done >= 8) { | |
958 | b43legacy_phy_write(dev, 0x0812, | |
959 | b43legacy_phy_read(dev, 0x0812) | |
960 | | 0x0030); | |
961 | for (i = loop1_done - 8; i < 16; i++) { | |
962 | b43legacy_phy_write(dev, 0x0812, | |
963 | (b43legacy_phy_read(dev, 0x0812) | |
964 | & 0xF0FF) | (i << 8)); | |
965 | b43legacy_phy_write(dev, 0x0015, | |
966 | (b43legacy_phy_read(dev, 0x0015) | |
967 | & 0x0FFF) | 0xA000); | |
968 | b43legacy_phy_write(dev, 0x0015, | |
969 | (b43legacy_phy_read(dev, 0x0015) | |
970 | & 0x0FFF) | 0xF000); | |
971 | udelay(20); | |
972 | if (b43legacy_phy_read(dev, 0x002D) >= 0x0DFC) | |
973 | break; | |
974 | } | |
975 | } | |
976 | ||
977 | if (phy->rev != 1) { | |
978 | b43legacy_phy_write(dev, 0x0814, backup_phy[4]); | |
979 | b43legacy_phy_write(dev, 0x0815, backup_phy[5]); | |
980 | } | |
981 | b43legacy_phy_write(dev, 0x005A, backup_phy[6]); | |
982 | b43legacy_phy_write(dev, 0x0059, backup_phy[7]); | |
983 | b43legacy_phy_write(dev, 0x0058, backup_phy[8]); | |
984 | b43legacy_phy_write(dev, 0x000A, backup_phy[9]); | |
985 | b43legacy_phy_write(dev, 0x0003, backup_phy[10]); | |
986 | b43legacy_phy_write(dev, 0x080F, backup_phy[11]); | |
987 | b43legacy_phy_write(dev, 0x0810, backup_phy[12]); | |
988 | b43legacy_phy_write(dev, 0x002B, backup_phy[13]); | |
989 | b43legacy_phy_write(dev, 0x0015, backup_phy[14]); | |
990 | ||
991 | b43legacy_phy_set_baseband_attenuation(dev, backup_bband); | |
992 | ||
993 | b43legacy_radio_write16(dev, 0x0052, backup_radio[0]); | |
994 | b43legacy_radio_write16(dev, 0x0043, backup_radio[1]); | |
995 | b43legacy_radio_write16(dev, 0x007A, backup_radio[2]); | |
996 | ||
997 | b43legacy_phy_write(dev, 0x0811, backup_phy[2] | 0x0003); | |
998 | udelay(10); | |
999 | b43legacy_phy_write(dev, 0x0811, backup_phy[2]); | |
1000 | b43legacy_phy_write(dev, 0x0812, backup_phy[3]); | |
1001 | b43legacy_phy_write(dev, 0x0429, backup_phy[0]); | |
1002 | b43legacy_phy_write(dev, 0x0001, backup_phy[1]); | |
1003 | ||
1004 | phy->loopback_gain[0] = ((loop1_done * 6) - (loop1_omitted * 4)) - 11; | |
1005 | phy->loopback_gain[1] = (24 - (3 * loop2_done)) * 2; | |
1006 | } | |
1007 | ||
1008 | static void b43legacy_phy_initg(struct b43legacy_wldev *dev) | |
1009 | { | |
1010 | struct b43legacy_phy *phy = &dev->phy; | |
1011 | u16 tmp; | |
1012 | ||
1013 | if (phy->rev == 1) | |
1014 | b43legacy_phy_initb5(dev); | |
1015 | else | |
1016 | b43legacy_phy_initb6(dev); | |
1017 | if (phy->rev >= 2 || phy->gmode) | |
1018 | b43legacy_phy_inita(dev); | |
1019 | ||
1020 | if (phy->rev >= 2) { | |
1021 | b43legacy_phy_write(dev, 0x0814, 0x0000); | |
1022 | b43legacy_phy_write(dev, 0x0815, 0x0000); | |
1023 | } | |
1024 | if (phy->rev == 2) { | |
1025 | b43legacy_phy_write(dev, 0x0811, 0x0000); | |
1026 | b43legacy_phy_write(dev, 0x0015, 0x00C0); | |
1027 | } | |
1028 | if (phy->rev > 5) { | |
1029 | b43legacy_phy_write(dev, 0x0811, 0x0400); | |
1030 | b43legacy_phy_write(dev, 0x0015, 0x00C0); | |
1031 | } | |
1032 | if (phy->rev >= 2 || phy->gmode) { | |
1033 | tmp = b43legacy_phy_read(dev, 0x0400) & 0xFF; | |
1034 | if (tmp == 3 || tmp == 5) { | |
1035 | b43legacy_phy_write(dev, 0x04C2, 0x1816); | |
1036 | b43legacy_phy_write(dev, 0x04C3, 0x8006); | |
1037 | if (tmp == 5) | |
1038 | b43legacy_phy_write(dev, 0x04CC, | |
1039 | (b43legacy_phy_read(dev, | |
1040 | 0x04CC) & 0x00FF) | | |
1041 | 0x1F00); | |
1042 | } | |
1043 | b43legacy_phy_write(dev, 0x047E, 0x0078); | |
1044 | } | |
1045 | if (phy->radio_rev == 8) { | |
1046 | b43legacy_phy_write(dev, 0x0801, b43legacy_phy_read(dev, 0x0801) | |
1047 | | 0x0080); | |
1048 | b43legacy_phy_write(dev, 0x043E, b43legacy_phy_read(dev, 0x043E) | |
1049 | | 0x0004); | |
1050 | } | |
1051 | if (phy->rev >= 2 && phy->gmode) | |
1052 | b43legacy_calc_loopback_gain(dev); | |
1053 | if (phy->radio_rev != 8) { | |
1054 | if (phy->initval == 0xFFFF) | |
1055 | phy->initval = b43legacy_radio_init2050(dev); | |
1056 | else | |
1057 | b43legacy_radio_write16(dev, 0x0078, phy->initval); | |
1058 | } | |
1059 | if (phy->txctl2 == 0xFFFF) | |
1060 | b43legacy_phy_lo_g_measure(dev); | |
1061 | else { | |
1062 | if (phy->radio_ver == 0x2050 && phy->radio_rev == 8) | |
1063 | b43legacy_radio_write16(dev, 0x0052, | |
1064 | (phy->txctl1 << 4) | | |
1065 | phy->txctl2); | |
1066 | else | |
1067 | b43legacy_radio_write16(dev, 0x0052, | |
1068 | (b43legacy_radio_read16(dev, | |
1069 | 0x0052) & 0xFFF0) | | |
1070 | phy->txctl1); | |
1071 | if (phy->rev >= 6) | |
1072 | b43legacy_phy_write(dev, 0x0036, | |
1073 | (b43legacy_phy_read(dev, 0x0036) | |
1074 | & 0x0FFF) | (phy->txctl2 << 12)); | |
1075 | if (dev->dev->bus->sprom.r1.boardflags_lo & | |
1076 | B43legacy_BFL_PACTRL) | |
1077 | b43legacy_phy_write(dev, 0x002E, 0x8075); | |
1078 | else | |
1079 | b43legacy_phy_write(dev, 0x002E, 0x807F); | |
1080 | if (phy->rev < 2) | |
1081 | b43legacy_phy_write(dev, 0x002F, 0x0101); | |
1082 | else | |
1083 | b43legacy_phy_write(dev, 0x002F, 0x0202); | |
1084 | } | |
1085 | if (phy->gmode || phy->rev >= 2) { | |
1086 | b43legacy_phy_lo_adjust(dev, 0); | |
1087 | b43legacy_phy_write(dev, 0x080F, 0x8078); | |
1088 | } | |
1089 | ||
1090 | if (!(dev->dev->bus->sprom.r1.boardflags_lo & B43legacy_BFL_RSSI)) { | |
1091 | /* The specs state to update the NRSSI LT with | |
1092 | * the value 0x7FFFFFFF here. I think that is some weird | |
1093 | * compiler optimization in the original driver. | |
1094 | * Essentially, what we do here is resetting all NRSSI LT | |
1095 | * entries to -32 (see the limit_value() in nrssi_hw_update()) | |
1096 | */ | |
1097 | b43legacy_nrssi_hw_update(dev, 0xFFFF); | |
1098 | b43legacy_calc_nrssi_threshold(dev); | |
1099 | } else if (phy->gmode || phy->rev >= 2) { | |
1100 | if (phy->nrssi[0] == -1000) { | |
1101 | B43legacy_WARN_ON(phy->nrssi[1] != -1000); | |
1102 | b43legacy_calc_nrssi_slope(dev); | |
1103 | } else { | |
1104 | B43legacy_WARN_ON(phy->nrssi[1] == -1000); | |
1105 | b43legacy_calc_nrssi_threshold(dev); | |
1106 | } | |
1107 | } | |
1108 | if (phy->radio_rev == 8) | |
1109 | b43legacy_phy_write(dev, 0x0805, 0x3230); | |
1110 | b43legacy_phy_init_pctl(dev); | |
1111 | if (dev->dev->bus->chip_id == 0x4306 | |
1112 | && dev->dev->bus->chip_package == 2) { | |
1113 | b43legacy_phy_write(dev, 0x0429, | |
1114 | b43legacy_phy_read(dev, 0x0429) & 0xBFFF); | |
1115 | b43legacy_phy_write(dev, 0x04C3, | |
1116 | b43legacy_phy_read(dev, 0x04C3) & 0x7FFF); | |
1117 | } | |
1118 | } | |
1119 | ||
1120 | static u16 b43legacy_phy_lo_b_r15_loop(struct b43legacy_wldev *dev) | |
1121 | { | |
1122 | int i; | |
1123 | u16 ret = 0; | |
1124 | unsigned long flags; | |
1125 | ||
1126 | local_irq_save(flags); | |
1127 | for (i = 0; i < 10; i++) { | |
1128 | b43legacy_phy_write(dev, 0x0015, 0xAFA0); | |
1129 | udelay(1); | |
1130 | b43legacy_phy_write(dev, 0x0015, 0xEFA0); | |
1131 | udelay(10); | |
1132 | b43legacy_phy_write(dev, 0x0015, 0xFFA0); | |
1133 | udelay(40); | |
1134 | ret += b43legacy_phy_read(dev, 0x002C); | |
1135 | } | |
1136 | local_irq_restore(flags); | |
1137 | b43legacy_voluntary_preempt(); | |
1138 | ||
1139 | return ret; | |
1140 | } | |
1141 | ||
1142 | void b43legacy_phy_lo_b_measure(struct b43legacy_wldev *dev) | |
1143 | { | |
1144 | struct b43legacy_phy *phy = &dev->phy; | |
1145 | u16 regstack[12] = { 0 }; | |
1146 | u16 mls; | |
1147 | u16 fval; | |
1148 | int i; | |
1149 | int j; | |
1150 | ||
1151 | regstack[0] = b43legacy_phy_read(dev, 0x0015); | |
1152 | regstack[1] = b43legacy_radio_read16(dev, 0x0052) & 0xFFF0; | |
1153 | ||
1154 | if (phy->radio_ver == 0x2053) { | |
1155 | regstack[2] = b43legacy_phy_read(dev, 0x000A); | |
1156 | regstack[3] = b43legacy_phy_read(dev, 0x002A); | |
1157 | regstack[4] = b43legacy_phy_read(dev, 0x0035); | |
1158 | regstack[5] = b43legacy_phy_read(dev, 0x0003); | |
1159 | regstack[6] = b43legacy_phy_read(dev, 0x0001); | |
1160 | regstack[7] = b43legacy_phy_read(dev, 0x0030); | |
1161 | ||
1162 | regstack[8] = b43legacy_radio_read16(dev, 0x0043); | |
1163 | regstack[9] = b43legacy_radio_read16(dev, 0x007A); | |
1164 | regstack[10] = b43legacy_read16(dev, 0x03EC); | |
1165 | regstack[11] = b43legacy_radio_read16(dev, 0x0052) & 0x00F0; | |
1166 | ||
1167 | b43legacy_phy_write(dev, 0x0030, 0x00FF); | |
1168 | b43legacy_write16(dev, 0x03EC, 0x3F3F); | |
1169 | b43legacy_phy_write(dev, 0x0035, regstack[4] & 0xFF7F); | |
1170 | b43legacy_radio_write16(dev, 0x007A, regstack[9] & 0xFFF0); | |
1171 | } | |
1172 | b43legacy_phy_write(dev, 0x0015, 0xB000); | |
1173 | b43legacy_phy_write(dev, 0x002B, 0x0004); | |
1174 | ||
1175 | if (phy->radio_ver == 0x2053) { | |
1176 | b43legacy_phy_write(dev, 0x002B, 0x0203); | |
1177 | b43legacy_phy_write(dev, 0x002A, 0x08A3); | |
1178 | } | |
1179 | ||
1180 | phy->minlowsig[0] = 0xFFFF; | |
1181 | ||
1182 | for (i = 0; i < 4; i++) { | |
1183 | b43legacy_radio_write16(dev, 0x0052, regstack[1] | i); | |
1184 | b43legacy_phy_lo_b_r15_loop(dev); | |
1185 | } | |
1186 | for (i = 0; i < 10; i++) { | |
1187 | b43legacy_radio_write16(dev, 0x0052, regstack[1] | i); | |
1188 | mls = b43legacy_phy_lo_b_r15_loop(dev) / 10; | |
1189 | if (mls < phy->minlowsig[0]) { | |
1190 | phy->minlowsig[0] = mls; | |
1191 | phy->minlowsigpos[0] = i; | |
1192 | } | |
1193 | } | |
1194 | b43legacy_radio_write16(dev, 0x0052, regstack[1] | |
1195 | | phy->minlowsigpos[0]); | |
1196 | ||
1197 | phy->minlowsig[1] = 0xFFFF; | |
1198 | ||
1199 | for (i = -4; i < 5; i += 2) { | |
1200 | for (j = -4; j < 5; j += 2) { | |
1201 | if (j < 0) | |
1202 | fval = (0x0100 * i) + j + 0x0100; | |
1203 | else | |
1204 | fval = (0x0100 * i) + j; | |
1205 | b43legacy_phy_write(dev, 0x002F, fval); | |
1206 | mls = b43legacy_phy_lo_b_r15_loop(dev) / 10; | |
1207 | if (mls < phy->minlowsig[1]) { | |
1208 | phy->minlowsig[1] = mls; | |
1209 | phy->minlowsigpos[1] = fval; | |
1210 | } | |
1211 | } | |
1212 | } | |
1213 | phy->minlowsigpos[1] += 0x0101; | |
1214 | ||
1215 | b43legacy_phy_write(dev, 0x002F, phy->minlowsigpos[1]); | |
1216 | if (phy->radio_ver == 0x2053) { | |
1217 | b43legacy_phy_write(dev, 0x000A, regstack[2]); | |
1218 | b43legacy_phy_write(dev, 0x002A, regstack[3]); | |
1219 | b43legacy_phy_write(dev, 0x0035, regstack[4]); | |
1220 | b43legacy_phy_write(dev, 0x0003, regstack[5]); | |
1221 | b43legacy_phy_write(dev, 0x0001, regstack[6]); | |
1222 | b43legacy_phy_write(dev, 0x0030, regstack[7]); | |
1223 | ||
1224 | b43legacy_radio_write16(dev, 0x0043, regstack[8]); | |
1225 | b43legacy_radio_write16(dev, 0x007A, regstack[9]); | |
1226 | ||
1227 | b43legacy_radio_write16(dev, 0x0052, | |
1228 | (b43legacy_radio_read16(dev, 0x0052) | |
1229 | & 0x000F) | regstack[11]); | |
1230 | ||
1231 | b43legacy_write16(dev, 0x03EC, regstack[10]); | |
1232 | } | |
1233 | b43legacy_phy_write(dev, 0x0015, regstack[0]); | |
1234 | } | |
1235 | ||
1236 | static inline | |
1237 | u16 b43legacy_phy_lo_g_deviation_subval(struct b43legacy_wldev *dev, | |
1238 | u16 control) | |
1239 | { | |
1240 | struct b43legacy_phy *phy = &dev->phy; | |
1241 | u16 ret; | |
1242 | unsigned long flags; | |
1243 | ||
1244 | local_irq_save(flags); | |
1245 | if (phy->gmode) { | |
1246 | b43legacy_phy_write(dev, 0x15, 0xE300); | |
1247 | control <<= 8; | |
1248 | b43legacy_phy_write(dev, 0x0812, control | 0x00B0); | |
1249 | udelay(5); | |
1250 | b43legacy_phy_write(dev, 0x0812, control | 0x00B2); | |
1251 | udelay(2); | |
1252 | b43legacy_phy_write(dev, 0x0812, control | 0x00B3); | |
1253 | udelay(4); | |
1254 | b43legacy_phy_write(dev, 0x0015, 0xF300); | |
1255 | udelay(8); | |
1256 | } else { | |
1257 | b43legacy_phy_write(dev, 0x0015, control | 0xEFA0); | |
1258 | udelay(2); | |
1259 | b43legacy_phy_write(dev, 0x0015, control | 0xEFE0); | |
1260 | udelay(4); | |
1261 | b43legacy_phy_write(dev, 0x0015, control | 0xFFE0); | |
1262 | udelay(8); | |
1263 | } | |
1264 | ret = b43legacy_phy_read(dev, 0x002D); | |
1265 | local_irq_restore(flags); | |
1266 | b43legacy_voluntary_preempt(); | |
1267 | ||
1268 | return ret; | |
1269 | } | |
1270 | ||
1271 | static u32 b43legacy_phy_lo_g_singledeviation(struct b43legacy_wldev *dev, | |
1272 | u16 control) | |
1273 | { | |
1274 | int i; | |
1275 | u32 ret = 0; | |
1276 | ||
1277 | for (i = 0; i < 8; i++) | |
1278 | ret += b43legacy_phy_lo_g_deviation_subval(dev, control); | |
1279 | ||
1280 | return ret; | |
1281 | } | |
1282 | ||
1283 | /* Write the LocalOscillator CONTROL */ | |
1284 | static inline | |
1285 | void b43legacy_lo_write(struct b43legacy_wldev *dev, | |
1286 | struct b43legacy_lopair *pair) | |
1287 | { | |
1288 | u16 value; | |
1289 | ||
1290 | value = (u8)(pair->low); | |
1291 | value |= ((u8)(pair->high)) << 8; | |
1292 | ||
1293 | #ifdef CONFIG_B43LEGACY_DEBUG | |
1294 | /* Sanity check. */ | |
1295 | if (pair->low < -8 || pair->low > 8 || | |
1296 | pair->high < -8 || pair->high > 8) { | |
1297 | struct b43legacy_phy *phy = &dev->phy; | |
1298 | b43legacydbg(dev->wl, | |
1299 | "WARNING: Writing invalid LOpair " | |
1300 | "(low: %d, high: %d, index: %lu)\n", | |
1301 | pair->low, pair->high, | |
1302 | (unsigned long)(pair - phy->_lo_pairs)); | |
1303 | dump_stack(); | |
1304 | } | |
1305 | #endif | |
1306 | ||
1307 | b43legacy_phy_write(dev, B43legacy_PHY_G_LO_CONTROL, value); | |
1308 | } | |
1309 | ||
1310 | static inline | |
1311 | struct b43legacy_lopair *b43legacy_find_lopair(struct b43legacy_wldev *dev, | |
1312 | u16 bbatt, | |
1313 | u16 rfatt, | |
1314 | u16 tx) | |
1315 | { | |
1316 | static const u8 dict[10] = { 11, 10, 11, 12, 13, 12, 13, 12, 13, 12 }; | |
1317 | struct b43legacy_phy *phy = &dev->phy; | |
1318 | ||
1319 | if (bbatt > 6) | |
1320 | bbatt = 6; | |
1321 | B43legacy_WARN_ON(rfatt >= 10); | |
1322 | ||
1323 | if (tx == 3) | |
1324 | return b43legacy_get_lopair(phy, rfatt, bbatt); | |
1325 | return b43legacy_get_lopair(phy, dict[rfatt], bbatt); | |
1326 | } | |
1327 | ||
1328 | static inline | |
1329 | struct b43legacy_lopair *b43legacy_current_lopair(struct b43legacy_wldev *dev) | |
1330 | { | |
1331 | struct b43legacy_phy *phy = &dev->phy; | |
1332 | ||
1333 | return b43legacy_find_lopair(dev, phy->bbatt, | |
1334 | phy->rfatt, phy->txctl1); | |
1335 | } | |
1336 | ||
1337 | /* Adjust B/G LO */ | |
1338 | void b43legacy_phy_lo_adjust(struct b43legacy_wldev *dev, int fixed) | |
1339 | { | |
1340 | struct b43legacy_lopair *pair; | |
1341 | ||
1342 | if (fixed) { | |
1343 | /* Use fixed values. Only for initialization. */ | |
1344 | pair = b43legacy_find_lopair(dev, 2, 3, 0); | |
1345 | } else | |
1346 | pair = b43legacy_current_lopair(dev); | |
1347 | b43legacy_lo_write(dev, pair); | |
1348 | } | |
1349 | ||
1350 | static void b43legacy_phy_lo_g_measure_txctl2(struct b43legacy_wldev *dev) | |
1351 | { | |
1352 | struct b43legacy_phy *phy = &dev->phy; | |
1353 | u16 txctl2 = 0; | |
1354 | u16 i; | |
1355 | u32 smallest; | |
1356 | u32 tmp; | |
1357 | ||
1358 | b43legacy_radio_write16(dev, 0x0052, 0x0000); | |
1359 | udelay(10); | |
1360 | smallest = b43legacy_phy_lo_g_singledeviation(dev, 0); | |
1361 | for (i = 0; i < 16; i++) { | |
1362 | b43legacy_radio_write16(dev, 0x0052, i); | |
1363 | udelay(10); | |
1364 | tmp = b43legacy_phy_lo_g_singledeviation(dev, 0); | |
1365 | if (tmp < smallest) { | |
1366 | smallest = tmp; | |
1367 | txctl2 = i; | |
1368 | } | |
1369 | } | |
1370 | phy->txctl2 = txctl2; | |
1371 | } | |
1372 | ||
1373 | static | |
1374 | void b43legacy_phy_lo_g_state(struct b43legacy_wldev *dev, | |
1375 | const struct b43legacy_lopair *in_pair, | |
1376 | struct b43legacy_lopair *out_pair, | |
1377 | u16 r27) | |
1378 | { | |
1379 | static const struct b43legacy_lopair transitions[8] = { | |
1380 | { .high = 1, .low = 1, }, | |
1381 | { .high = 1, .low = 0, }, | |
1382 | { .high = 1, .low = -1, }, | |
1383 | { .high = 0, .low = -1, }, | |
1384 | { .high = -1, .low = -1, }, | |
1385 | { .high = -1, .low = 0, }, | |
1386 | { .high = -1, .low = 1, }, | |
1387 | { .high = 0, .low = 1, }, | |
1388 | }; | |
1389 | struct b43legacy_lopair lowest_transition = { | |
1390 | .high = in_pair->high, | |
1391 | .low = in_pair->low, | |
1392 | }; | |
1393 | struct b43legacy_lopair tmp_pair; | |
1394 | struct b43legacy_lopair transition; | |
1395 | int i = 12; | |
1396 | int state = 0; | |
1397 | int found_lower; | |
1398 | int j; | |
1399 | int begin; | |
1400 | int end; | |
1401 | u32 lowest_deviation; | |
1402 | u32 tmp; | |
1403 | ||
1404 | /* Note that in_pair and out_pair can point to the same pair. | |
1405 | * Be careful. */ | |
1406 | ||
1407 | b43legacy_lo_write(dev, &lowest_transition); | |
1408 | lowest_deviation = b43legacy_phy_lo_g_singledeviation(dev, r27); | |
1409 | do { | |
1410 | found_lower = 0; | |
1411 | B43legacy_WARN_ON(!(state >= 0 && state <= 8)); | |
1412 | if (state == 0) { | |
1413 | begin = 1; | |
1414 | end = 8; | |
1415 | } else if (state % 2 == 0) { | |
1416 | begin = state - 1; | |
1417 | end = state + 1; | |
1418 | } else { | |
1419 | begin = state - 2; | |
1420 | end = state + 2; | |
1421 | } | |
1422 | if (begin < 1) | |
1423 | begin += 8; | |
1424 | if (end > 8) | |
1425 | end -= 8; | |
1426 | ||
1427 | j = begin; | |
1428 | tmp_pair.high = lowest_transition.high; | |
1429 | tmp_pair.low = lowest_transition.low; | |
1430 | while (1) { | |
1431 | B43legacy_WARN_ON(!(j >= 1 && j <= 8)); | |
1432 | transition.high = tmp_pair.high + | |
1433 | transitions[j - 1].high; | |
1434 | transition.low = tmp_pair.low + transitions[j - 1].low; | |
1435 | if ((abs(transition.low) < 9) | |
1436 | && (abs(transition.high) < 9)) { | |
1437 | b43legacy_lo_write(dev, &transition); | |
1438 | tmp = b43legacy_phy_lo_g_singledeviation(dev, | |
1439 | r27); | |
1440 | if (tmp < lowest_deviation) { | |
1441 | lowest_deviation = tmp; | |
1442 | state = j; | |
1443 | found_lower = 1; | |
1444 | ||
1445 | lowest_transition.high = | |
1446 | transition.high; | |
1447 | lowest_transition.low = transition.low; | |
1448 | } | |
1449 | } | |
1450 | if (j == end) | |
1451 | break; | |
1452 | if (j == 8) | |
1453 | j = 1; | |
1454 | else | |
1455 | j++; | |
1456 | } | |
1457 | } while (i-- && found_lower); | |
1458 | ||
1459 | out_pair->high = lowest_transition.high; | |
1460 | out_pair->low = lowest_transition.low; | |
1461 | } | |
1462 | ||
1463 | /* Set the baseband attenuation value on chip. */ | |
1464 | void b43legacy_phy_set_baseband_attenuation(struct b43legacy_wldev *dev, | |
1465 | u16 bbatt) | |
1466 | { | |
1467 | struct b43legacy_phy *phy = &dev->phy; | |
1468 | u16 value; | |
1469 | ||
1470 | if (phy->analog == 0) { | |
1471 | value = (b43legacy_read16(dev, 0x03E6) & 0xFFF0); | |
1472 | value |= (bbatt & 0x000F); | |
1473 | b43legacy_write16(dev, 0x03E6, value); | |
1474 | return; | |
1475 | } | |
1476 | ||
1477 | if (phy->analog > 1) { | |
1478 | value = b43legacy_phy_read(dev, 0x0060) & 0xFFC3; | |
1479 | value |= (bbatt << 2) & 0x003C; | |
1480 | } else { | |
1481 | value = b43legacy_phy_read(dev, 0x0060) & 0xFF87; | |
1482 | value |= (bbatt << 3) & 0x0078; | |
1483 | } | |
1484 | b43legacy_phy_write(dev, 0x0060, value); | |
1485 | } | |
1486 | ||
1487 | /* http://bcm-specs.sipsolutions.net/LocalOscillator/Measure */ | |
1488 | void b43legacy_phy_lo_g_measure(struct b43legacy_wldev *dev) | |
1489 | { | |
1490 | static const u8 pairorder[10] = { 3, 1, 5, 7, 9, 2, 0, 4, 6, 8 }; | |
1491 | const int is_initializing = (b43legacy_status(dev) | |
1492 | < B43legacy_STAT_STARTED); | |
1493 | struct b43legacy_phy *phy = &dev->phy; | |
1494 | u16 h; | |
1495 | u16 i; | |
1496 | u16 oldi = 0; | |
1497 | u16 j; | |
1498 | struct b43legacy_lopair control; | |
1499 | struct b43legacy_lopair *tmp_control; | |
1500 | u16 tmp; | |
1501 | u16 regstack[16] = { 0 }; | |
1502 | u8 oldchannel; | |
1503 | ||
1504 | /* XXX: What are these? */ | |
1505 | u8 r27 = 0; | |
1506 | u16 r31; | |
1507 | ||
1508 | oldchannel = phy->channel; | |
1509 | /* Setup */ | |
1510 | if (phy->gmode) { | |
1511 | regstack[0] = b43legacy_phy_read(dev, B43legacy_PHY_G_CRS); | |
1512 | regstack[1] = b43legacy_phy_read(dev, 0x0802); | |
1513 | b43legacy_phy_write(dev, B43legacy_PHY_G_CRS, regstack[0] | |
1514 | & 0x7FFF); | |
1515 | b43legacy_phy_write(dev, 0x0802, regstack[1] & 0xFFFC); | |
1516 | } | |
1517 | regstack[3] = b43legacy_read16(dev, 0x03E2); | |
1518 | b43legacy_write16(dev, 0x03E2, regstack[3] | 0x8000); | |
1519 | regstack[4] = b43legacy_read16(dev, B43legacy_MMIO_CHANNEL_EXT); | |
1520 | regstack[5] = b43legacy_phy_read(dev, 0x15); | |
1521 | regstack[6] = b43legacy_phy_read(dev, 0x2A); | |
1522 | regstack[7] = b43legacy_phy_read(dev, 0x35); | |
1523 | regstack[8] = b43legacy_phy_read(dev, 0x60); | |
1524 | regstack[9] = b43legacy_radio_read16(dev, 0x43); | |
1525 | regstack[10] = b43legacy_radio_read16(dev, 0x7A); | |
1526 | regstack[11] = b43legacy_radio_read16(dev, 0x52); | |
1527 | if (phy->gmode) { | |
1528 | regstack[12] = b43legacy_phy_read(dev, 0x0811); | |
1529 | regstack[13] = b43legacy_phy_read(dev, 0x0812); | |
1530 | regstack[14] = b43legacy_phy_read(dev, 0x0814); | |
1531 | regstack[15] = b43legacy_phy_read(dev, 0x0815); | |
1532 | } | |
1533 | b43legacy_radio_selectchannel(dev, 6, 0); | |
1534 | if (phy->gmode) { | |
1535 | b43legacy_phy_write(dev, B43legacy_PHY_G_CRS, regstack[0] | |
1536 | & 0x7FFF); | |
1537 | b43legacy_phy_write(dev, 0x0802, regstack[1] & 0xFFFC); | |
1538 | b43legacy_dummy_transmission(dev); | |
1539 | } | |
1540 | b43legacy_radio_write16(dev, 0x0043, 0x0006); | |
1541 | ||
1542 | b43legacy_phy_set_baseband_attenuation(dev, 2); | |
1543 | ||
1544 | b43legacy_write16(dev, B43legacy_MMIO_CHANNEL_EXT, 0x0000); | |
1545 | b43legacy_phy_write(dev, 0x002E, 0x007F); | |
1546 | b43legacy_phy_write(dev, 0x080F, 0x0078); | |
1547 | b43legacy_phy_write(dev, 0x0035, regstack[7] & ~(1 << 7)); | |
1548 | b43legacy_radio_write16(dev, 0x007A, regstack[10] & 0xFFF0); | |
1549 | b43legacy_phy_write(dev, 0x002B, 0x0203); | |
1550 | b43legacy_phy_write(dev, 0x002A, 0x08A3); | |
1551 | if (phy->gmode) { | |
1552 | b43legacy_phy_write(dev, 0x0814, regstack[14] | 0x0003); | |
1553 | b43legacy_phy_write(dev, 0x0815, regstack[15] & 0xFFFC); | |
1554 | b43legacy_phy_write(dev, 0x0811, 0x01B3); | |
1555 | b43legacy_phy_write(dev, 0x0812, 0x00B2); | |
1556 | } | |
1557 | if (is_initializing) | |
1558 | b43legacy_phy_lo_g_measure_txctl2(dev); | |
1559 | b43legacy_phy_write(dev, 0x080F, 0x8078); | |
1560 | ||
1561 | /* Measure */ | |
1562 | control.low = 0; | |
1563 | control.high = 0; | |
1564 | for (h = 0; h < 10; h++) { | |
1565 | /* Loop over each possible RadioAttenuation (0-9) */ | |
1566 | i = pairorder[h]; | |
1567 | if (is_initializing) { | |
1568 | if (i == 3) { | |
1569 | control.low = 0; | |
1570 | control.high = 0; | |
1571 | } else if (((i % 2 == 1) && (oldi % 2 == 1)) || | |
1572 | ((i % 2 == 0) && (oldi % 2 == 0))) { | |
1573 | tmp_control = b43legacy_get_lopair(phy, oldi, | |
1574 | 0); | |
1575 | memcpy(&control, tmp_control, sizeof(control)); | |
1576 | } else { | |
1577 | tmp_control = b43legacy_get_lopair(phy, 3, 0); | |
1578 | memcpy(&control, tmp_control, sizeof(control)); | |
1579 | } | |
1580 | } | |
1581 | /* Loop over each possible BasebandAttenuation/2 */ | |
1582 | for (j = 0; j < 4; j++) { | |
1583 | if (is_initializing) { | |
1584 | tmp = i * 2 + j; | |
1585 | r27 = 0; | |
1586 | r31 = 0; | |
1587 | if (tmp > 14) { | |
1588 | r31 = 1; | |
1589 | if (tmp > 17) | |
1590 | r27 = 1; | |
1591 | if (tmp > 19) | |
1592 | r27 = 2; | |
1593 | } | |
1594 | } else { | |
1595 | tmp_control = b43legacy_get_lopair(phy, i, | |
1596 | j * 2); | |
1597 | if (!tmp_control->used) | |
1598 | continue; | |
1599 | memcpy(&control, tmp_control, sizeof(control)); | |
1600 | r27 = 3; | |
1601 | r31 = 0; | |
1602 | } | |
1603 | b43legacy_radio_write16(dev, 0x43, i); | |
1604 | b43legacy_radio_write16(dev, 0x52, phy->txctl2); | |
1605 | udelay(10); | |
1606 | b43legacy_voluntary_preempt(); | |
1607 | ||
1608 | b43legacy_phy_set_baseband_attenuation(dev, j * 2); | |
1609 | ||
1610 | tmp = (regstack[10] & 0xFFF0); | |
1611 | if (r31) | |
1612 | tmp |= 0x0008; | |
1613 | b43legacy_radio_write16(dev, 0x007A, tmp); | |
1614 | ||
1615 | tmp_control = b43legacy_get_lopair(phy, i, j * 2); | |
1616 | b43legacy_phy_lo_g_state(dev, &control, tmp_control, | |
1617 | r27); | |
1618 | } | |
1619 | oldi = i; | |
1620 | } | |
1621 | /* Loop over each possible RadioAttenuation (10-13) */ | |
1622 | for (i = 10; i < 14; i++) { | |
1623 | /* Loop over each possible BasebandAttenuation/2 */ | |
1624 | for (j = 0; j < 4; j++) { | |
1625 | if (is_initializing) { | |
1626 | tmp_control = b43legacy_get_lopair(phy, i - 9, | |
1627 | j * 2); | |
1628 | memcpy(&control, tmp_control, sizeof(control)); | |
1629 | /* FIXME: The next line is wrong, as the | |
1630 | * following if statement can never trigger. */ | |
1631 | tmp = (i - 9) * 2 + j - 5; | |
1632 | r27 = 0; | |
1633 | r31 = 0; | |
1634 | if (tmp > 14) { | |
1635 | r31 = 1; | |
1636 | if (tmp > 17) | |
1637 | r27 = 1; | |
1638 | if (tmp > 19) | |
1639 | r27 = 2; | |
1640 | } | |
1641 | } else { | |
1642 | tmp_control = b43legacy_get_lopair(phy, i - 9, | |
1643 | j * 2); | |
1644 | if (!tmp_control->used) | |
1645 | continue; | |
1646 | memcpy(&control, tmp_control, sizeof(control)); | |
1647 | r27 = 3; | |
1648 | r31 = 0; | |
1649 | } | |
1650 | b43legacy_radio_write16(dev, 0x43, i - 9); | |
1651 | /* FIXME: shouldn't txctl1 be zero in the next line | |
1652 | * and 3 in the loop above? */ | |
1653 | b43legacy_radio_write16(dev, 0x52, | |
1654 | phy->txctl2 | |
1655 | | (3/*txctl1*/ << 4)); | |
1656 | udelay(10); | |
1657 | b43legacy_voluntary_preempt(); | |
1658 | ||
1659 | b43legacy_phy_set_baseband_attenuation(dev, j * 2); | |
1660 | ||
1661 | tmp = (regstack[10] & 0xFFF0); | |
1662 | if (r31) | |
1663 | tmp |= 0x0008; | |
1664 | b43legacy_radio_write16(dev, 0x7A, tmp); | |
1665 | ||
1666 | tmp_control = b43legacy_get_lopair(phy, i, j * 2); | |
1667 | b43legacy_phy_lo_g_state(dev, &control, tmp_control, | |
1668 | r27); | |
1669 | } | |
1670 | } | |
1671 | ||
1672 | /* Restoration */ | |
1673 | if (phy->gmode) { | |
1674 | b43legacy_phy_write(dev, 0x0015, 0xE300); | |
1675 | b43legacy_phy_write(dev, 0x0812, (r27 << 8) | 0xA0); | |
1676 | udelay(5); | |
1677 | b43legacy_phy_write(dev, 0x0812, (r27 << 8) | 0xA2); | |
1678 | udelay(2); | |
1679 | b43legacy_phy_write(dev, 0x0812, (r27 << 8) | 0xA3); | |
1680 | b43legacy_voluntary_preempt(); | |
1681 | } else | |
1682 | b43legacy_phy_write(dev, 0x0015, r27 | 0xEFA0); | |
1683 | b43legacy_phy_lo_adjust(dev, is_initializing); | |
1684 | b43legacy_phy_write(dev, 0x002E, 0x807F); | |
1685 | if (phy->gmode) | |
1686 | b43legacy_phy_write(dev, 0x002F, 0x0202); | |
1687 | else | |
1688 | b43legacy_phy_write(dev, 0x002F, 0x0101); | |
1689 | b43legacy_write16(dev, B43legacy_MMIO_CHANNEL_EXT, regstack[4]); | |
1690 | b43legacy_phy_write(dev, 0x0015, regstack[5]); | |
1691 | b43legacy_phy_write(dev, 0x002A, regstack[6]); | |
1692 | b43legacy_phy_write(dev, 0x0035, regstack[7]); | |
1693 | b43legacy_phy_write(dev, 0x0060, regstack[8]); | |
1694 | b43legacy_radio_write16(dev, 0x0043, regstack[9]); | |
1695 | b43legacy_radio_write16(dev, 0x007A, regstack[10]); | |
1696 | regstack[11] &= 0x00F0; | |
1697 | regstack[11] |= (b43legacy_radio_read16(dev, 0x52) & 0x000F); | |
1698 | b43legacy_radio_write16(dev, 0x52, regstack[11]); | |
1699 | b43legacy_write16(dev, 0x03E2, regstack[3]); | |
1700 | if (phy->gmode) { | |
1701 | b43legacy_phy_write(dev, 0x0811, regstack[12]); | |
1702 | b43legacy_phy_write(dev, 0x0812, regstack[13]); | |
1703 | b43legacy_phy_write(dev, 0x0814, regstack[14]); | |
1704 | b43legacy_phy_write(dev, 0x0815, regstack[15]); | |
1705 | b43legacy_phy_write(dev, B43legacy_PHY_G_CRS, regstack[0]); | |
1706 | b43legacy_phy_write(dev, 0x0802, regstack[1]); | |
1707 | } | |
1708 | b43legacy_radio_selectchannel(dev, oldchannel, 1); | |
1709 | ||
1710 | #ifdef CONFIG_B43LEGACY_DEBUG | |
1711 | { | |
1712 | /* Sanity check for all lopairs. */ | |
1713 | for (i = 0; i < B43legacy_LO_COUNT; i++) { | |
1714 | tmp_control = phy->_lo_pairs + i; | |
1715 | if (tmp_control->low < -8 || tmp_control->low > 8 || | |
1716 | tmp_control->high < -8 || tmp_control->high > 8) | |
1717 | b43legacywarn(dev->wl, | |
1718 | "WARNING: Invalid LOpair (low: %d, high:" | |
1719 | " %d, index: %d)\n", | |
1720 | tmp_control->low, tmp_control->high, i); | |
1721 | } | |
1722 | } | |
1723 | #endif /* CONFIG_B43LEGACY_DEBUG */ | |
1724 | } | |
1725 | ||
1726 | static | |
1727 | void b43legacy_phy_lo_mark_current_used(struct b43legacy_wldev *dev) | |
1728 | { | |
1729 | struct b43legacy_lopair *pair; | |
1730 | ||
1731 | pair = b43legacy_current_lopair(dev); | |
1732 | pair->used = 1; | |
1733 | } | |
1734 | ||
1735 | void b43legacy_phy_lo_mark_all_unused(struct b43legacy_wldev *dev) | |
1736 | { | |
1737 | struct b43legacy_phy *phy = &dev->phy; | |
1738 | struct b43legacy_lopair *pair; | |
1739 | int i; | |
1740 | ||
1741 | for (i = 0; i < B43legacy_LO_COUNT; i++) { | |
1742 | pair = phy->_lo_pairs + i; | |
1743 | pair->used = 0; | |
1744 | } | |
1745 | } | |
1746 | ||
1747 | /* http://bcm-specs.sipsolutions.net/EstimatePowerOut | |
1748 | * This function converts a TSSI value to dBm in Q5.2 | |
1749 | */ | |
1750 | static s8 b43legacy_phy_estimate_power_out(struct b43legacy_wldev *dev, s8 tssi) | |
1751 | { | |
1752 | struct b43legacy_phy *phy = &dev->phy; | |
1753 | s8 dbm = 0; | |
1754 | s32 tmp; | |
1755 | ||
1756 | tmp = phy->idle_tssi; | |
1757 | tmp += tssi; | |
1758 | tmp -= phy->savedpctlreg; | |
1759 | ||
1760 | switch (phy->type) { | |
1761 | case B43legacy_PHYTYPE_B: | |
1762 | case B43legacy_PHYTYPE_G: | |
1763 | tmp = limit_value(tmp, 0x00, 0x3F); | |
1764 | dbm = phy->tssi2dbm[tmp]; | |
1765 | break; | |
1766 | default: | |
1767 | B43legacy_BUG_ON(1); | |
1768 | } | |
1769 | ||
1770 | return dbm; | |
1771 | } | |
1772 | ||
1773 | /* http://bcm-specs.sipsolutions.net/RecalculateTransmissionPower */ | |
1774 | void b43legacy_phy_xmitpower(struct b43legacy_wldev *dev) | |
1775 | { | |
1776 | struct b43legacy_phy *phy = &dev->phy; | |
1777 | u16 tmp; | |
1778 | u16 txpower; | |
1779 | s8 v0; | |
1780 | s8 v1; | |
1781 | s8 v2; | |
1782 | s8 v3; | |
1783 | s8 average; | |
1784 | int max_pwr; | |
1785 | s16 desired_pwr; | |
1786 | s16 estimated_pwr; | |
1787 | s16 pwr_adjust; | |
1788 | s16 radio_att_delta; | |
1789 | s16 baseband_att_delta; | |
1790 | s16 radio_attenuation; | |
1791 | s16 baseband_attenuation; | |
1792 | unsigned long phylock_flags; | |
1793 | ||
1794 | if (phy->savedpctlreg == 0xFFFF) | |
1795 | return; | |
1796 | if ((dev->dev->bus->boardinfo.type == 0x0416) && | |
1797 | is_bcm_board_vendor(dev)) | |
1798 | return; | |
1799 | #ifdef CONFIG_B43LEGACY_DEBUG | |
1800 | if (phy->manual_txpower_control) | |
1801 | return; | |
1802 | #endif | |
1803 | ||
1804 | B43legacy_BUG_ON(!(phy->type == B43legacy_PHYTYPE_B || | |
1805 | phy->type == B43legacy_PHYTYPE_G)); | |
1806 | tmp = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED, 0x0058); | |
1807 | v0 = (s8)(tmp & 0x00FF); | |
1808 | v1 = (s8)((tmp & 0xFF00) >> 8); | |
1809 | tmp = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED, 0x005A); | |
1810 | v2 = (s8)(tmp & 0x00FF); | |
1811 | v3 = (s8)((tmp & 0xFF00) >> 8); | |
1812 | tmp = 0; | |
1813 | ||
1814 | if (v0 == 0x7F || v1 == 0x7F || v2 == 0x7F || v3 == 0x7F) { | |
1815 | tmp = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED, | |
1816 | 0x0070); | |
1817 | v0 = (s8)(tmp & 0x00FF); | |
1818 | v1 = (s8)((tmp & 0xFF00) >> 8); | |
1819 | tmp = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED, | |
1820 | 0x0072); | |
1821 | v2 = (s8)(tmp & 0x00FF); | |
1822 | v3 = (s8)((tmp & 0xFF00) >> 8); | |
1823 | if (v0 == 0x7F || v1 == 0x7F || v2 == 0x7F || v3 == 0x7F) | |
1824 | return; | |
1825 | v0 = (v0 + 0x20) & 0x3F; | |
1826 | v1 = (v1 + 0x20) & 0x3F; | |
1827 | v2 = (v2 + 0x20) & 0x3F; | |
1828 | v3 = (v3 + 0x20) & 0x3F; | |
1829 | tmp = 1; | |
1830 | } | |
1831 | b43legacy_radio_clear_tssi(dev); | |
1832 | ||
1833 | average = (v0 + v1 + v2 + v3 + 2) / 4; | |
1834 | ||
1835 | if (tmp && (b43legacy_shm_read16(dev, B43legacy_SHM_SHARED, 0x005E) | |
1836 | & 0x8)) | |
1837 | average -= 13; | |
1838 | ||
1839 | estimated_pwr = b43legacy_phy_estimate_power_out(dev, average); | |
1840 | ||
1841 | max_pwr = dev->dev->bus->sprom.r1.maxpwr_bg; | |
1842 | ||
1843 | if ((dev->dev->bus->sprom.r1.boardflags_lo | |
1844 | & B43legacy_BFL_PACTRL) && | |
1845 | (phy->type == B43legacy_PHYTYPE_G)) | |
1846 | max_pwr -= 0x3; | |
1847 | if (unlikely(max_pwr <= 0)) { | |
1848 | b43legacywarn(dev->wl, "Invalid max-TX-power value in SPROM." | |
1849 | "\n"); | |
1850 | max_pwr = 74; /* fake it */ | |
1851 | dev->dev->bus->sprom.r1.maxpwr_bg = max_pwr; | |
1852 | } | |
1853 | ||
1854 | /* Use regulatory information to get the maximum power. | |
1855 | * In the absence of such data from mac80211, we will use 20 dBm, which | |
1856 | * is the value for the EU, US, Canada, and most of the world. | |
1857 | * The regulatory maximum is reduced by the antenna gain (from sprom) | |
1858 | * and 1.5 dBm (a safety factor??). The result is in Q5.2 format | |
1859 | * which accounts for the factor of 4 */ | |
1860 | #define REG_MAX_PWR 20 | |
1861 | max_pwr = min(REG_MAX_PWR * 4 - dev->dev->bus->sprom.r1.antenna_gain_bg | |
1862 | - 0x6, max_pwr); | |
1863 | ||
1864 | /* find the desired power in Q5.2 - power_level is in dBm | |
1865 | * and limit it - max_pwr is already in Q5.2 */ | |
1866 | desired_pwr = limit_value(phy->power_level << 2, 0, max_pwr); | |
1867 | if (b43legacy_debug(dev, B43legacy_DBG_XMITPOWER)) | |
1868 | b43legacydbg(dev->wl, "Current TX power output: " Q52_FMT | |
1869 | " dBm, Desired TX power output: " Q52_FMT | |
1870 | " dBm\n", Q52_ARG(estimated_pwr), | |
1871 | Q52_ARG(desired_pwr)); | |
1872 | /* Check if we need to adjust the current power. The factor of 2 is | |
1873 | * for damping */ | |
1874 | pwr_adjust = (desired_pwr - estimated_pwr) / 2; | |
1875 | /* RF attenuation delta | |
1876 | * The minus sign is because lower attenuation => more power */ | |
1877 | radio_att_delta = -(pwr_adjust + 7) >> 3; | |
1878 | /* Baseband attenuation delta */ | |
1879 | baseband_att_delta = -(pwr_adjust >> 1) - (4 * radio_att_delta); | |
1880 | /* Do we need to adjust anything? */ | |
1881 | if ((radio_att_delta == 0) && (baseband_att_delta == 0)) { | |
1882 | b43legacy_phy_lo_mark_current_used(dev); | |
1883 | return; | |
1884 | } | |
1885 | ||
1886 | /* Calculate the new attenuation values. */ | |
1887 | baseband_attenuation = phy->bbatt; | |
1888 | baseband_attenuation += baseband_att_delta; | |
1889 | radio_attenuation = phy->rfatt; | |
1890 | radio_attenuation += radio_att_delta; | |
1891 | ||
1892 | /* Get baseband and radio attenuation values into permitted ranges. | |
1893 | * baseband 0-11, radio 0-9. | |
1894 | * Radio attenuation affects power level 4 times as much as baseband. | |
1895 | */ | |
1896 | if (radio_attenuation < 0) { | |
1897 | baseband_attenuation -= (4 * -radio_attenuation); | |
1898 | radio_attenuation = 0; | |
1899 | } else if (radio_attenuation > 9) { | |
1900 | baseband_attenuation += (4 * (radio_attenuation - 9)); | |
1901 | radio_attenuation = 9; | |
1902 | } else { | |
1903 | while (baseband_attenuation < 0 && radio_attenuation > 0) { | |
1904 | baseband_attenuation += 4; | |
1905 | radio_attenuation--; | |
1906 | } | |
1907 | while (baseband_attenuation > 11 && radio_attenuation < 9) { | |
1908 | baseband_attenuation -= 4; | |
1909 | radio_attenuation++; | |
1910 | } | |
1911 | } | |
1912 | baseband_attenuation = limit_value(baseband_attenuation, 0, 11); | |
1913 | ||
1914 | txpower = phy->txctl1; | |
1915 | if ((phy->radio_ver == 0x2050) && (phy->radio_rev == 2)) { | |
1916 | if (radio_attenuation <= 1) { | |
1917 | if (txpower == 0) { | |
1918 | txpower = 3; | |
1919 | radio_attenuation += 2; | |
1920 | baseband_attenuation += 2; | |
1921 | } else if (dev->dev->bus->sprom.r1.boardflags_lo | |
1922 | & B43legacy_BFL_PACTRL) { | |
1923 | baseband_attenuation += 4 * | |
1924 | (radio_attenuation - 2); | |
1925 | radio_attenuation = 2; | |
1926 | } | |
1927 | } else if (radio_attenuation > 4 && txpower != 0) { | |
1928 | txpower = 0; | |
1929 | if (baseband_attenuation < 3) { | |
1930 | radio_attenuation -= 3; | |
1931 | baseband_attenuation += 2; | |
1932 | } else { | |
1933 | radio_attenuation -= 2; | |
1934 | baseband_attenuation -= 2; | |
1935 | } | |
1936 | } | |
1937 | } | |
1938 | /* Save the control values */ | |
1939 | phy->txctl1 = txpower; | |
1940 | baseband_attenuation = limit_value(baseband_attenuation, 0, 11); | |
1941 | radio_attenuation = limit_value(radio_attenuation, 0, 9); | |
1942 | phy->rfatt = radio_attenuation; | |
1943 | phy->bbatt = baseband_attenuation; | |
1944 | ||
1945 | /* Adjust the hardware */ | |
1946 | b43legacy_phy_lock(dev, phylock_flags); | |
1947 | b43legacy_radio_lock(dev); | |
1948 | b43legacy_radio_set_txpower_bg(dev, baseband_attenuation, | |
1949 | radio_attenuation, txpower); | |
1950 | b43legacy_phy_lo_mark_current_used(dev); | |
1951 | b43legacy_radio_unlock(dev); | |
1952 | b43legacy_phy_unlock(dev, phylock_flags); | |
1953 | } | |
1954 | ||
1955 | static inline | |
1956 | s32 b43legacy_tssi2dbm_ad(s32 num, s32 den) | |
1957 | { | |
1958 | if (num < 0) | |
1959 | return num/den; | |
1960 | else | |
1961 | return (num+den/2)/den; | |
1962 | } | |
1963 | ||
1964 | static inline | |
1965 | s8 b43legacy_tssi2dbm_entry(s8 entry [], u8 index, s16 pab0, s16 pab1, s16 pab2) | |
1966 | { | |
1967 | s32 m1; | |
1968 | s32 m2; | |
1969 | s32 f = 256; | |
1970 | s32 q; | |
1971 | s32 delta; | |
1972 | s8 i = 0; | |
1973 | ||
1974 | m1 = b43legacy_tssi2dbm_ad(16 * pab0 + index * pab1, 32); | |
1975 | m2 = max(b43legacy_tssi2dbm_ad(32768 + index * pab2, 256), 1); | |
1976 | do { | |
1977 | if (i > 15) | |
1978 | return -EINVAL; | |
1979 | q = b43legacy_tssi2dbm_ad(f * 4096 - | |
1980 | b43legacy_tssi2dbm_ad(m2 * f, 16) * | |
1981 | f, 2048); | |
1982 | delta = abs(q - f); | |
1983 | f = q; | |
1984 | i++; | |
1985 | } while (delta >= 2); | |
1986 | entry[index] = limit_value(b43legacy_tssi2dbm_ad(m1 * f, 8192), | |
1987 | -127, 128); | |
1988 | return 0; | |
1989 | } | |
1990 | ||
1991 | /* http://bcm-specs.sipsolutions.net/TSSI_to_DBM_Table */ | |
1992 | int b43legacy_phy_init_tssi2dbm_table(struct b43legacy_wldev *dev) | |
1993 | { | |
1994 | struct b43legacy_phy *phy = &dev->phy; | |
1995 | s16 pab0; | |
1996 | s16 pab1; | |
1997 | s16 pab2; | |
1998 | u8 idx; | |
1999 | s8 *dyn_tssi2dbm; | |
2000 | ||
2001 | B43legacy_WARN_ON(!(phy->type == B43legacy_PHYTYPE_B || | |
2002 | phy->type == B43legacy_PHYTYPE_G)); | |
2003 | pab0 = (s16)(dev->dev->bus->sprom.r1.pa0b0); | |
2004 | pab1 = (s16)(dev->dev->bus->sprom.r1.pa0b1); | |
2005 | pab2 = (s16)(dev->dev->bus->sprom.r1.pa0b2); | |
2006 | ||
2007 | if ((dev->dev->bus->chip_id == 0x4301) && (phy->radio_ver != 0x2050)) { | |
2008 | phy->idle_tssi = 0x34; | |
2009 | phy->tssi2dbm = b43legacy_tssi2dbm_b_table; | |
2010 | return 0; | |
2011 | } | |
2012 | ||
2013 | if (pab0 != 0 && pab1 != 0 && pab2 != 0 && | |
2014 | pab0 != -1 && pab1 != -1 && pab2 != -1) { | |
2015 | /* The pabX values are set in SPROM. Use them. */ | |
2016 | if ((s8)dev->dev->bus->sprom.r1.itssi_bg != 0 && | |
2017 | (s8)dev->dev->bus->sprom.r1.itssi_bg != -1) | |
2018 | phy->idle_tssi = (s8)(dev->dev->bus->sprom.r1.itssi_bg); | |
2019 | else | |
2020 | phy->idle_tssi = 62; | |
2021 | dyn_tssi2dbm = kmalloc(64, GFP_KERNEL); | |
2022 | if (dyn_tssi2dbm == NULL) { | |
8376e7a3 | 2023 | b43legacyerr(dev->wl, "Could not allocate memory " |
75388acd LF |
2024 | "for tssi2dbm table\n"); |
2025 | return -ENOMEM; | |
2026 | } | |
2027 | for (idx = 0; idx < 64; idx++) | |
2028 | if (b43legacy_tssi2dbm_entry(dyn_tssi2dbm, idx, pab0, | |
2029 | pab1, pab2)) { | |
2030 | phy->tssi2dbm = NULL; | |
2031 | b43legacyerr(dev->wl, "Could not generate " | |
2032 | "tssi2dBm table\n"); | |
2033 | kfree(dyn_tssi2dbm); | |
2034 | return -ENODEV; | |
2035 | } | |
2036 | phy->tssi2dbm = dyn_tssi2dbm; | |
2037 | phy->dyn_tssi_tbl = 1; | |
2038 | } else { | |
2039 | /* pabX values not set in SPROM. */ | |
2040 | switch (phy->type) { | |
2041 | case B43legacy_PHYTYPE_B: | |
2042 | phy->idle_tssi = 0x34; | |
2043 | phy->tssi2dbm = b43legacy_tssi2dbm_b_table; | |
2044 | break; | |
2045 | case B43legacy_PHYTYPE_G: | |
2046 | phy->idle_tssi = 0x34; | |
2047 | phy->tssi2dbm = b43legacy_tssi2dbm_g_table; | |
2048 | break; | |
2049 | } | |
2050 | } | |
2051 | ||
2052 | return 0; | |
2053 | } | |
2054 | ||
2055 | int b43legacy_phy_init(struct b43legacy_wldev *dev) | |
2056 | { | |
2057 | struct b43legacy_phy *phy = &dev->phy; | |
2058 | int err = -ENODEV; | |
2059 | ||
2060 | switch (phy->type) { | |
2061 | case B43legacy_PHYTYPE_B: | |
2062 | switch (phy->rev) { | |
2063 | case 2: | |
2064 | b43legacy_phy_initb2(dev); | |
2065 | err = 0; | |
2066 | break; | |
2067 | case 4: | |
2068 | b43legacy_phy_initb4(dev); | |
2069 | err = 0; | |
2070 | break; | |
2071 | case 5: | |
2072 | b43legacy_phy_initb5(dev); | |
2073 | err = 0; | |
2074 | break; | |
2075 | case 6: | |
2076 | b43legacy_phy_initb6(dev); | |
2077 | err = 0; | |
2078 | break; | |
2079 | } | |
2080 | break; | |
2081 | case B43legacy_PHYTYPE_G: | |
2082 | b43legacy_phy_initg(dev); | |
2083 | err = 0; | |
2084 | break; | |
2085 | } | |
2086 | if (err) | |
2087 | b43legacyerr(dev->wl, "Unknown PHYTYPE found\n"); | |
2088 | ||
2089 | return err; | |
2090 | } | |
2091 | ||
2092 | void b43legacy_phy_set_antenna_diversity(struct b43legacy_wldev *dev) | |
2093 | { | |
2094 | struct b43legacy_phy *phy = &dev->phy; | |
2095 | u16 antennadiv; | |
2096 | u16 offset; | |
2097 | u16 value; | |
2098 | u32 ucodeflags; | |
2099 | ||
2100 | antennadiv = phy->antenna_diversity; | |
2101 | ||
2102 | if (antennadiv == 0xFFFF) | |
2103 | antennadiv = 3; | |
2104 | B43legacy_WARN_ON(antennadiv > 3); | |
2105 | ||
2106 | ucodeflags = b43legacy_shm_read32(dev, B43legacy_SHM_SHARED, | |
2107 | B43legacy_UCODEFLAGS_OFFSET); | |
2108 | b43legacy_shm_write32(dev, B43legacy_SHM_SHARED, | |
2109 | B43legacy_UCODEFLAGS_OFFSET, | |
2110 | ucodeflags & ~B43legacy_UCODEFLAG_AUTODIV); | |
2111 | ||
2112 | switch (phy->type) { | |
2113 | case B43legacy_PHYTYPE_G: | |
2114 | offset = 0x0400; | |
2115 | ||
2116 | if (antennadiv == 2) | |
2117 | value = (3/*automatic*/ << 7); | |
2118 | else | |
2119 | value = (antennadiv << 7); | |
2120 | b43legacy_phy_write(dev, offset + 1, | |
2121 | (b43legacy_phy_read(dev, offset + 1) | |
2122 | & 0x7E7F) | value); | |
2123 | ||
2124 | if (antennadiv >= 2) { | |
2125 | if (antennadiv == 2) | |
2126 | value = (antennadiv << 7); | |
2127 | else | |
2128 | value = (0/*force0*/ << 7); | |
2129 | b43legacy_phy_write(dev, offset + 0x2B, | |
2130 | (b43legacy_phy_read(dev, | |
2131 | offset + 0x2B) | |
2132 | & 0xFEFF) | value); | |
2133 | } | |
2134 | ||
2135 | if (phy->type == B43legacy_PHYTYPE_G) { | |
2136 | if (antennadiv >= 2) | |
2137 | b43legacy_phy_write(dev, 0x048C, | |
2138 | b43legacy_phy_read(dev, | |
2139 | 0x048C) | 0x2000); | |
2140 | else | |
2141 | b43legacy_phy_write(dev, 0x048C, | |
2142 | b43legacy_phy_read(dev, | |
2143 | 0x048C) & ~0x2000); | |
2144 | if (phy->rev >= 2) { | |
2145 | b43legacy_phy_write(dev, 0x0461, | |
2146 | b43legacy_phy_read(dev, | |
2147 | 0x0461) | 0x0010); | |
2148 | b43legacy_phy_write(dev, 0x04AD, | |
2149 | (b43legacy_phy_read(dev, | |
2150 | 0x04AD) | |
2151 | & 0x00FF) | 0x0015); | |
2152 | if (phy->rev == 2) | |
2153 | b43legacy_phy_write(dev, 0x0427, | |
2154 | 0x0008); | |
2155 | else | |
2156 | b43legacy_phy_write(dev, 0x0427, | |
2157 | (b43legacy_phy_read(dev, 0x0427) | |
2158 | & 0x00FF) | 0x0008); | |
2159 | } else if (phy->rev >= 6) | |
2160 | b43legacy_phy_write(dev, 0x049B, 0x00DC); | |
2161 | } else { | |
2162 | if (phy->rev < 3) | |
2163 | b43legacy_phy_write(dev, 0x002B, | |
2164 | (b43legacy_phy_read(dev, | |
2165 | 0x002B) & 0x00FF) | |
2166 | | 0x0024); | |
2167 | else { | |
2168 | b43legacy_phy_write(dev, 0x0061, | |
2169 | b43legacy_phy_read(dev, | |
2170 | 0x0061) | 0x0010); | |
2171 | if (phy->rev == 3) { | |
2172 | b43legacy_phy_write(dev, 0x0093, | |
2173 | 0x001D); | |
2174 | b43legacy_phy_write(dev, 0x0027, | |
2175 | 0x0008); | |
2176 | } else { | |
2177 | b43legacy_phy_write(dev, 0x0093, | |
2178 | 0x003A); | |
2179 | b43legacy_phy_write(dev, 0x0027, | |
2180 | (b43legacy_phy_read(dev, 0x0027) | |
2181 | & 0x00FF) | 0x0008); | |
2182 | } | |
2183 | } | |
2184 | } | |
2185 | break; | |
2186 | case B43legacy_PHYTYPE_B: | |
2187 | if (dev->dev->id.revision == 2) | |
2188 | value = (3/*automatic*/ << 7); | |
2189 | else | |
2190 | value = (antennadiv << 7); | |
2191 | b43legacy_phy_write(dev, 0x03E2, | |
2192 | (b43legacy_phy_read(dev, 0x03E2) | |
2193 | & 0xFE7F) | value); | |
2194 | break; | |
2195 | default: | |
2196 | B43legacy_WARN_ON(1); | |
2197 | } | |
2198 | ||
2199 | if (antennadiv >= 2) { | |
2200 | ucodeflags = b43legacy_shm_read32(dev, B43legacy_SHM_SHARED, | |
2201 | B43legacy_UCODEFLAGS_OFFSET); | |
2202 | b43legacy_shm_write32(dev, B43legacy_SHM_SHARED, | |
2203 | B43legacy_UCODEFLAGS_OFFSET, | |
2204 | ucodeflags | B43legacy_UCODEFLAG_AUTODIV); | |
2205 | } | |
2206 | ||
2207 | phy->antenna_diversity = antennadiv; | |
2208 | } | |
2209 | ||
2210 | /* Set the PowerSavingControlBits. | |
2211 | * Bitvalues: | |
2212 | * 0 => unset the bit | |
2213 | * 1 => set the bit | |
2214 | * -1 => calculate the bit | |
2215 | */ | |
2216 | void b43legacy_power_saving_ctl_bits(struct b43legacy_wldev *dev, | |
2217 | int bit25, int bit26) | |
2218 | { | |
2219 | int i; | |
2220 | u32 status; | |
2221 | ||
2222 | /* FIXME: Force 25 to off and 26 to on for now: */ | |
2223 | bit25 = 0; | |
2224 | bit26 = 1; | |
2225 | ||
2226 | if (bit25 == -1) { | |
2227 | /* TODO: If powersave is not off and FIXME is not set and we | |
2228 | * are not in adhoc and thus is not an AP and we arei | |
2229 | * associated, set bit 25 */ | |
2230 | } | |
2231 | if (bit26 == -1) { | |
2232 | /* TODO: If the device is awake or this is an AP, or we are | |
2233 | * scanning, or FIXME, or we are associated, or FIXME, | |
2234 | * or the latest PS-Poll packet sent was successful, | |
2235 | * set bit26 */ | |
2236 | } | |
2237 | status = b43legacy_read32(dev, B43legacy_MMIO_STATUS_BITFIELD); | |
2238 | if (bit25) | |
2239 | status |= B43legacy_SBF_PS1; | |
2240 | else | |
2241 | status &= ~B43legacy_SBF_PS1; | |
2242 | if (bit26) | |
2243 | status |= B43legacy_SBF_PS2; | |
2244 | else | |
2245 | status &= ~B43legacy_SBF_PS2; | |
2246 | b43legacy_write32(dev, B43legacy_MMIO_STATUS_BITFIELD, status); | |
2247 | if (bit26 && dev->dev->id.revision >= 5) { | |
2248 | for (i = 0; i < 100; i++) { | |
2249 | if (b43legacy_shm_read32(dev, B43legacy_SHM_SHARED, | |
2250 | 0x0040) != 4) | |
2251 | break; | |
2252 | udelay(10); | |
2253 | } | |
2254 | } | |
2255 | } |