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d930faee AK |
1 | /* |
2 | * Marvell Wireless LAN device driver: PCIE specific handling | |
3 | * | |
4 | * Copyright (C) 2011, Marvell International Ltd. | |
5 | * | |
6 | * This software file (the "File") is distributed by Marvell International | |
7 | * Ltd. under the terms of the GNU General Public License Version 2, June 1991 | |
8 | * (the "License"). You may use, redistribute and/or modify this File in | |
9 | * accordance with the terms and conditions of the License, a copy of which | |
10 | * is available by writing to the Free Software Foundation, Inc., | |
11 | * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA or on the | |
12 | * worldwide web at http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt. | |
13 | * | |
14 | * THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE | |
15 | * IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE | |
16 | * ARE EXPRESSLY DISCLAIMED. The License provides additional details about | |
17 | * this warranty disclaimer. | |
18 | */ | |
19 | ||
20 | #include <linux/firmware.h> | |
21 | ||
22 | #include "decl.h" | |
23 | #include "ioctl.h" | |
24 | #include "util.h" | |
25 | #include "fw.h" | |
26 | #include "main.h" | |
27 | #include "wmm.h" | |
28 | #include "11n.h" | |
29 | #include "pcie.h" | |
30 | ||
31 | #define PCIE_VERSION "1.0" | |
32 | #define DRV_NAME "Marvell mwifiex PCIe" | |
33 | ||
34 | static u8 user_rmmod; | |
35 | ||
36 | static struct mwifiex_if_ops pcie_ops; | |
37 | ||
38 | static struct semaphore add_remove_card_sem; | |
39 | static int mwifiex_pcie_enable_host_int(struct mwifiex_adapter *adapter); | |
40 | static int mwifiex_pcie_resume(struct pci_dev *pdev); | |
41 | ||
fc331460 AP |
42 | static int |
43 | mwifiex_map_pci_memory(struct mwifiex_adapter *adapter, struct sk_buff *skb, | |
44 | int size, int flags) | |
d930faee | 45 | { |
fc331460 AP |
46 | struct pcie_service_card *card = adapter->card; |
47 | dma_addr_t buf_pa; | |
d930faee | 48 | |
fc331460 AP |
49 | buf_pa = pci_map_single(card->dev, skb->data, size, flags); |
50 | if (pci_dma_mapping_error(card->dev, buf_pa)) { | |
51 | dev_err(adapter->dev, "failed to map pci memory!\n"); | |
52 | return -1; | |
53 | } | |
54 | memcpy(skb->cb, &buf_pa, sizeof(dma_addr_t)); | |
55 | return 0; | |
d930faee AK |
56 | } |
57 | ||
58 | /* | |
59 | * This function reads sleep cookie and checks if FW is ready | |
60 | */ | |
61 | static bool mwifiex_pcie_ok_to_access_hw(struct mwifiex_adapter *adapter) | |
62 | { | |
63 | u32 *cookie_addr; | |
64 | struct pcie_service_card *card = adapter->card; | |
52301a81 AP |
65 | const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; |
66 | ||
67 | if (!reg->sleep_cookie) | |
68 | return true; | |
d930faee | 69 | |
fc331460 AP |
70 | if (card->sleep_cookie_vbase) { |
71 | cookie_addr = (u32 *)card->sleep_cookie_vbase; | |
d930faee AK |
72 | dev_dbg(adapter->dev, "info: ACCESS_HW: sleep cookie=0x%x\n", |
73 | *cookie_addr); | |
74 | if (*cookie_addr == FW_AWAKE_COOKIE) | |
75 | return true; | |
76 | } | |
77 | ||
78 | return false; | |
79 | } | |
80 | ||
81 | /* | |
82 | * This function probes an mwifiex device and registers it. It allocates | |
83 | * the card structure, enables PCIE function number and initiates the | |
84 | * device registration and initialization procedure by adding a logical | |
85 | * interface. | |
86 | */ | |
87 | static int mwifiex_pcie_probe(struct pci_dev *pdev, | |
88 | const struct pci_device_id *ent) | |
89 | { | |
90 | struct pcie_service_card *card; | |
91 | ||
92 | pr_debug("info: vendor=0x%4.04X device=0x%4.04X rev=%d\n", | |
f57c1edc | 93 | pdev->vendor, pdev->device, pdev->revision); |
d930faee AK |
94 | |
95 | card = kzalloc(sizeof(struct pcie_service_card), GFP_KERNEL); | |
e404decb | 96 | if (!card) |
d930faee | 97 | return -ENOMEM; |
d930faee AK |
98 | |
99 | card->dev = pdev; | |
100 | ||
dd04e6ac AP |
101 | if (ent->driver_data) { |
102 | struct mwifiex_pcie_device *data = (void *)ent->driver_data; | |
103 | card->pcie.firmware = data->firmware; | |
104 | card->pcie.reg = data->reg; | |
105 | card->pcie.blksz_fw_dl = data->blksz_fw_dl; | |
106 | } | |
107 | ||
d930faee AK |
108 | if (mwifiex_add_card(card, &add_remove_card_sem, &pcie_ops, |
109 | MWIFIEX_PCIE)) { | |
110 | pr_err("%s failed\n", __func__); | |
111 | kfree(card); | |
112 | return -1; | |
113 | } | |
114 | ||
115 | return 0; | |
116 | } | |
117 | ||
118 | /* | |
119 | * This function removes the interface and frees up the card structure. | |
120 | */ | |
121 | static void mwifiex_pcie_remove(struct pci_dev *pdev) | |
122 | { | |
123 | struct pcie_service_card *card; | |
124 | struct mwifiex_adapter *adapter; | |
f57c1edc | 125 | struct mwifiex_private *priv; |
d930faee AK |
126 | int i; |
127 | ||
128 | card = pci_get_drvdata(pdev); | |
129 | if (!card) | |
130 | return; | |
131 | ||
132 | adapter = card->adapter; | |
133 | if (!adapter || !adapter->priv_num) | |
134 | return; | |
135 | ||
59a4cc25 AK |
136 | /* In case driver is removed when asynchronous FW load is in progress */ |
137 | wait_for_completion(&adapter->fw_load); | |
138 | ||
d930faee AK |
139 | if (user_rmmod) { |
140 | #ifdef CONFIG_PM | |
141 | if (adapter->is_suspended) | |
142 | mwifiex_pcie_resume(pdev); | |
143 | #endif | |
144 | ||
145 | for (i = 0; i < adapter->priv_num; i++) | |
146 | if ((GET_BSS_ROLE(adapter->priv[i]) == | |
f57c1edc YAP |
147 | MWIFIEX_BSS_ROLE_STA) && |
148 | adapter->priv[i]->media_connected) | |
d930faee AK |
149 | mwifiex_deauthenticate(adapter->priv[i], NULL); |
150 | ||
f57c1edc | 151 | priv = mwifiex_get_priv(adapter, MWIFIEX_BSS_ROLE_ANY); |
d930faee | 152 | |
f57c1edc YAP |
153 | mwifiex_disable_auto_ds(priv); |
154 | ||
155 | mwifiex_init_shutdown_fw(priv, MWIFIEX_FUNC_SHUTDOWN); | |
d930faee AK |
156 | } |
157 | ||
158 | mwifiex_remove_card(card->adapter, &add_remove_card_sem); | |
159 | kfree(card); | |
160 | } | |
161 | ||
162 | /* | |
163 | * Kernel needs to suspend all functions separately. Therefore all | |
164 | * registered functions must have drivers with suspend and resume | |
165 | * methods. Failing that the kernel simply removes the whole card. | |
166 | * | |
167 | * If already not suspended, this function allocates and sends a host | |
168 | * sleep activate request to the firmware and turns off the traffic. | |
169 | */ | |
170 | static int mwifiex_pcie_suspend(struct pci_dev *pdev, pm_message_t state) | |
171 | { | |
172 | struct mwifiex_adapter *adapter; | |
173 | struct pcie_service_card *card; | |
174 | int hs_actived, i; | |
175 | ||
176 | if (pdev) { | |
177 | card = (struct pcie_service_card *) pci_get_drvdata(pdev); | |
83f0c6d1 | 178 | if (!card || !card->adapter) { |
d930faee AK |
179 | pr_err("Card or adapter structure is not valid\n"); |
180 | return 0; | |
181 | } | |
182 | } else { | |
183 | pr_err("PCIE device is not specified\n"); | |
184 | return 0; | |
185 | } | |
186 | ||
187 | adapter = card->adapter; | |
188 | ||
189 | hs_actived = mwifiex_enable_hs(adapter); | |
190 | ||
191 | /* Indicate device suspended */ | |
192 | adapter->is_suspended = true; | |
193 | ||
194 | for (i = 0; i < adapter->priv_num; i++) | |
195 | netif_carrier_off(adapter->priv[i]->netdev); | |
196 | ||
197 | return 0; | |
198 | } | |
199 | ||
200 | /* | |
201 | * Kernel needs to suspend all functions separately. Therefore all | |
202 | * registered functions must have drivers with suspend and resume | |
203 | * methods. Failing that the kernel simply removes the whole card. | |
204 | * | |
205 | * If already not resumed, this function turns on the traffic and | |
206 | * sends a host sleep cancel request to the firmware. | |
207 | */ | |
208 | static int mwifiex_pcie_resume(struct pci_dev *pdev) | |
209 | { | |
210 | struct mwifiex_adapter *adapter; | |
211 | struct pcie_service_card *card; | |
212 | int i; | |
213 | ||
214 | if (pdev) { | |
215 | card = (struct pcie_service_card *) pci_get_drvdata(pdev); | |
216 | if (!card || !card->adapter) { | |
217 | pr_err("Card or adapter structure is not valid\n"); | |
218 | return 0; | |
219 | } | |
220 | } else { | |
221 | pr_err("PCIE device is not specified\n"); | |
222 | return 0; | |
223 | } | |
224 | ||
225 | adapter = card->adapter; | |
226 | ||
227 | if (!adapter->is_suspended) { | |
228 | dev_warn(adapter->dev, "Device already resumed\n"); | |
229 | return 0; | |
230 | } | |
231 | ||
232 | adapter->is_suspended = false; | |
233 | ||
234 | for (i = 0; i < adapter->priv_num; i++) | |
235 | if (adapter->priv[i]->media_connected) | |
236 | netif_carrier_on(adapter->priv[i]->netdev); | |
237 | ||
238 | mwifiex_cancel_hs(mwifiex_get_priv(adapter, MWIFIEX_BSS_ROLE_STA), | |
f57c1edc | 239 | MWIFIEX_ASYNC_CMD); |
d930faee AK |
240 | |
241 | return 0; | |
242 | } | |
243 | ||
d930faee AK |
244 | static DEFINE_PCI_DEVICE_TABLE(mwifiex_ids) = { |
245 | { | |
246 | PCIE_VENDOR_ID_MARVELL, PCIE_DEVICE_ID_MARVELL_88W8766P, | |
247 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, | |
dd04e6ac | 248 | .driver_data = (unsigned long) &mwifiex_pcie8766, |
d930faee | 249 | }, |
ca8f2112 AP |
250 | { |
251 | PCIE_VENDOR_ID_MARVELL, PCIE_DEVICE_ID_MARVELL_88W8897, | |
252 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, | |
253 | .driver_data = (unsigned long) &mwifiex_pcie8897, | |
254 | }, | |
d930faee AK |
255 | {}, |
256 | }; | |
257 | ||
258 | MODULE_DEVICE_TABLE(pci, mwifiex_ids); | |
259 | ||
260 | /* PCI Device Driver */ | |
261 | static struct pci_driver __refdata mwifiex_pcie = { | |
262 | .name = "mwifiex_pcie", | |
263 | .id_table = mwifiex_ids, | |
264 | .probe = mwifiex_pcie_probe, | |
265 | .remove = mwifiex_pcie_remove, | |
266 | #ifdef CONFIG_PM | |
267 | /* Power Management Hooks */ | |
268 | .suspend = mwifiex_pcie_suspend, | |
269 | .resume = mwifiex_pcie_resume, | |
270 | #endif | |
271 | }; | |
272 | ||
273 | /* | |
274 | * This function writes data into PCIE card register. | |
275 | */ | |
276 | static int mwifiex_write_reg(struct mwifiex_adapter *adapter, int reg, u32 data) | |
277 | { | |
278 | struct pcie_service_card *card = adapter->card; | |
279 | ||
280 | iowrite32(data, card->pci_mmap1 + reg); | |
281 | ||
282 | return 0; | |
283 | } | |
284 | ||
285 | /* | |
286 | * This function reads data from PCIE card register. | |
287 | */ | |
288 | static int mwifiex_read_reg(struct mwifiex_adapter *adapter, int reg, u32 *data) | |
289 | { | |
290 | struct pcie_service_card *card = adapter->card; | |
291 | ||
292 | *data = ioread32(card->pci_mmap1 + reg); | |
293 | ||
294 | return 0; | |
295 | } | |
296 | ||
297 | /* | |
298 | * This function wakes up the card. | |
299 | * | |
300 | * A host power up command is written to the card configuration | |
301 | * register to wake up the card. | |
302 | */ | |
303 | static int mwifiex_pm_wakeup_card(struct mwifiex_adapter *adapter) | |
304 | { | |
305 | int i = 0; | |
52301a81 AP |
306 | struct pcie_service_card *card = adapter->card; |
307 | const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; | |
d930faee | 308 | |
52301a81 | 309 | while (reg->sleep_cookie && mwifiex_pcie_ok_to_access_hw(adapter)) { |
d930faee | 310 | i++; |
e7891ba2 | 311 | usleep_range(10, 20); |
d930faee AK |
312 | /* 50ms max wait */ |
313 | if (i == 50000) | |
314 | break; | |
315 | } | |
316 | ||
317 | dev_dbg(adapter->dev, "event: Wakeup device...\n"); | |
318 | ||
319 | /* Enable interrupts or any chip access will wakeup device */ | |
320 | if (mwifiex_write_reg(adapter, PCIE_HOST_INT_MASK, HOST_INTR_MASK)) { | |
321 | dev_warn(adapter->dev, "Enable host interrupt failed\n"); | |
322 | return -1; | |
323 | } | |
324 | ||
325 | dev_dbg(adapter->dev, "PCIE wakeup: Setting PS_STATE_AWAKE\n"); | |
326 | adapter->ps_state = PS_STATE_AWAKE; | |
327 | ||
328 | return 0; | |
329 | } | |
330 | ||
331 | /* | |
332 | * This function is called after the card has woken up. | |
333 | * | |
334 | * The card configuration register is reset. | |
335 | */ | |
336 | static int mwifiex_pm_wakeup_card_complete(struct mwifiex_adapter *adapter) | |
337 | { | |
338 | dev_dbg(adapter->dev, "cmd: Wakeup device completed\n"); | |
339 | ||
340 | return 0; | |
341 | } | |
342 | ||
343 | /* | |
344 | * This function disables the host interrupt. | |
345 | * | |
346 | * The host interrupt mask is read, the disable bit is reset and | |
347 | * written back to the card host interrupt mask register. | |
348 | */ | |
349 | static int mwifiex_pcie_disable_host_int(struct mwifiex_adapter *adapter) | |
350 | { | |
351 | if (mwifiex_pcie_ok_to_access_hw(adapter)) { | |
352 | if (mwifiex_write_reg(adapter, PCIE_HOST_INT_MASK, | |
353 | 0x00000000)) { | |
354 | dev_warn(adapter->dev, "Disable host interrupt failed\n"); | |
355 | return -1; | |
356 | } | |
357 | } | |
358 | ||
359 | return 0; | |
360 | } | |
361 | ||
362 | /* | |
363 | * This function enables the host interrupt. | |
364 | * | |
365 | * The host interrupt enable mask is written to the card | |
366 | * host interrupt mask register. | |
367 | */ | |
368 | static int mwifiex_pcie_enable_host_int(struct mwifiex_adapter *adapter) | |
369 | { | |
370 | if (mwifiex_pcie_ok_to_access_hw(adapter)) { | |
371 | /* Simply write the mask to the register */ | |
372 | if (mwifiex_write_reg(adapter, PCIE_HOST_INT_MASK, | |
373 | HOST_INTR_MASK)) { | |
374 | dev_warn(adapter->dev, "Enable host interrupt failed\n"); | |
375 | return -1; | |
376 | } | |
377 | } | |
378 | ||
379 | return 0; | |
380 | } | |
381 | ||
382 | /* | |
0732484b AP |
383 | * This function initializes TX buffer ring descriptors |
384 | */ | |
385 | static int mwifiex_init_txq_ring(struct mwifiex_adapter *adapter) | |
386 | { | |
387 | struct pcie_service_card *card = adapter->card; | |
ca8f2112 | 388 | const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; |
0732484b | 389 | struct mwifiex_pcie_buf_desc *desc; |
ca8f2112 | 390 | struct mwifiex_pfu_buf_desc *desc2; |
0732484b AP |
391 | int i; |
392 | ||
393 | for (i = 0; i < MWIFIEX_MAX_TXRX_BD; i++) { | |
394 | card->tx_buf_list[i] = NULL; | |
ca8f2112 AP |
395 | if (reg->pfu_enabled) { |
396 | card->txbd_ring[i] = (void *)card->txbd_ring_vbase + | |
397 | (sizeof(*desc2) * i); | |
398 | desc2 = card->txbd_ring[i]; | |
399 | memset(desc2, 0, sizeof(*desc2)); | |
400 | } else { | |
401 | card->txbd_ring[i] = (void *)card->txbd_ring_vbase + | |
402 | (sizeof(*desc) * i); | |
403 | desc = card->txbd_ring[i]; | |
404 | memset(desc, 0, sizeof(*desc)); | |
405 | } | |
0732484b AP |
406 | } |
407 | ||
408 | return 0; | |
409 | } | |
410 | ||
411 | /* This function initializes RX buffer ring descriptors. Each SKB is allocated | |
412 | * here and after mapping PCI memory, its physical address is assigned to | |
413 | * PCIE Rx buffer descriptor's physical address. | |
414 | */ | |
415 | static int mwifiex_init_rxq_ring(struct mwifiex_adapter *adapter) | |
416 | { | |
417 | struct pcie_service_card *card = adapter->card; | |
ca8f2112 | 418 | const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; |
0732484b AP |
419 | struct sk_buff *skb; |
420 | struct mwifiex_pcie_buf_desc *desc; | |
ca8f2112 | 421 | struct mwifiex_pfu_buf_desc *desc2; |
0732484b AP |
422 | dma_addr_t buf_pa; |
423 | int i; | |
424 | ||
425 | for (i = 0; i < MWIFIEX_MAX_TXRX_BD; i++) { | |
426 | /* Allocate skb here so that firmware can DMA data from it */ | |
427 | skb = dev_alloc_skb(MWIFIEX_RX_DATA_BUF_SIZE); | |
428 | if (!skb) { | |
429 | dev_err(adapter->dev, | |
430 | "Unable to allocate skb for RX ring.\n"); | |
431 | kfree(card->rxbd_ring_vbase); | |
432 | return -ENOMEM; | |
433 | } | |
434 | ||
435 | if (mwifiex_map_pci_memory(adapter, skb, | |
436 | MWIFIEX_RX_DATA_BUF_SIZE, | |
437 | PCI_DMA_FROMDEVICE)) | |
438 | return -1; | |
439 | ||
440 | MWIFIEX_SKB_PACB(skb, &buf_pa); | |
441 | ||
442 | dev_dbg(adapter->dev, | |
443 | "info: RX ring: skb=%p len=%d data=%p buf_pa=%#x:%x\n", | |
444 | skb, skb->len, skb->data, (u32)buf_pa, | |
445 | (u32)((u64)buf_pa >> 32)); | |
446 | ||
447 | card->rx_buf_list[i] = skb; | |
ca8f2112 AP |
448 | if (reg->pfu_enabled) { |
449 | card->rxbd_ring[i] = (void *)card->rxbd_ring_vbase + | |
450 | (sizeof(*desc2) * i); | |
451 | desc2 = card->rxbd_ring[i]; | |
452 | desc2->paddr = buf_pa; | |
453 | desc2->len = (u16)skb->len; | |
454 | desc2->frag_len = (u16)skb->len; | |
455 | desc2->flags = reg->ring_flag_eop | reg->ring_flag_sop; | |
456 | desc2->offset = 0; | |
457 | } else { | |
458 | card->rxbd_ring[i] = (void *)(card->rxbd_ring_vbase + | |
459 | (sizeof(*desc) * i)); | |
460 | desc = card->rxbd_ring[i]; | |
461 | desc->paddr = buf_pa; | |
462 | desc->len = (u16)skb->len; | |
463 | desc->flags = 0; | |
464 | } | |
0732484b AP |
465 | } |
466 | ||
467 | return 0; | |
468 | } | |
469 | ||
470 | /* This function initializes event buffer ring descriptors. Each SKB is | |
471 | * allocated here and after mapping PCI memory, its physical address is assigned | |
472 | * to PCIE Rx buffer descriptor's physical address | |
473 | */ | |
474 | static int mwifiex_pcie_init_evt_ring(struct mwifiex_adapter *adapter) | |
475 | { | |
476 | struct pcie_service_card *card = adapter->card; | |
e05dc3e9 | 477 | struct mwifiex_evt_buf_desc *desc; |
0732484b AP |
478 | struct sk_buff *skb; |
479 | dma_addr_t buf_pa; | |
480 | int i; | |
481 | ||
482 | for (i = 0; i < MWIFIEX_MAX_EVT_BD; i++) { | |
483 | /* Allocate skb here so that firmware can DMA data from it */ | |
484 | skb = dev_alloc_skb(MAX_EVENT_SIZE); | |
485 | if (!skb) { | |
486 | dev_err(adapter->dev, | |
487 | "Unable to allocate skb for EVENT buf.\n"); | |
488 | kfree(card->evtbd_ring_vbase); | |
489 | return -ENOMEM; | |
490 | } | |
491 | skb_put(skb, MAX_EVENT_SIZE); | |
492 | ||
493 | if (mwifiex_map_pci_memory(adapter, skb, MAX_EVENT_SIZE, | |
494 | PCI_DMA_FROMDEVICE)) | |
495 | return -1; | |
496 | ||
497 | MWIFIEX_SKB_PACB(skb, &buf_pa); | |
498 | ||
499 | dev_dbg(adapter->dev, | |
500 | "info: EVT ring: skb=%p len=%d data=%p buf_pa=%#x:%x\n", | |
501 | skb, skb->len, skb->data, (u32)buf_pa, | |
502 | (u32)((u64)buf_pa >> 32)); | |
503 | ||
504 | card->evt_buf_list[i] = skb; | |
505 | card->evtbd_ring[i] = (void *)(card->evtbd_ring_vbase + | |
506 | (sizeof(*desc) * i)); | |
0732484b AP |
507 | desc = card->evtbd_ring[i]; |
508 | desc->paddr = buf_pa; | |
509 | desc->len = (u16)skb->len; | |
510 | desc->flags = 0; | |
511 | } | |
512 | ||
513 | return 0; | |
514 | } | |
515 | ||
516 | /* This function cleans up TX buffer rings. If any of the buffer list has valid | |
517 | * SKB address, associated SKB is freed. | |
518 | */ | |
519 | static void mwifiex_cleanup_txq_ring(struct mwifiex_adapter *adapter) | |
520 | { | |
521 | struct pcie_service_card *card = adapter->card; | |
ca8f2112 | 522 | const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; |
0732484b AP |
523 | struct sk_buff *skb; |
524 | struct mwifiex_pcie_buf_desc *desc; | |
ca8f2112 | 525 | struct mwifiex_pfu_buf_desc *desc2; |
0732484b AP |
526 | int i; |
527 | ||
528 | for (i = 0; i < MWIFIEX_MAX_TXRX_BD; i++) { | |
ca8f2112 AP |
529 | if (reg->pfu_enabled) { |
530 | desc2 = card->txbd_ring[i]; | |
531 | if (card->tx_buf_list[i]) { | |
532 | skb = card->tx_buf_list[i]; | |
533 | pci_unmap_single(card->dev, desc2->paddr, | |
534 | skb->len, PCI_DMA_TODEVICE); | |
535 | dev_kfree_skb_any(skb); | |
536 | } | |
537 | memset(desc2, 0, sizeof(*desc2)); | |
538 | } else { | |
539 | desc = card->txbd_ring[i]; | |
540 | if (card->tx_buf_list[i]) { | |
541 | skb = card->tx_buf_list[i]; | |
542 | pci_unmap_single(card->dev, desc->paddr, | |
543 | skb->len, PCI_DMA_TODEVICE); | |
544 | dev_kfree_skb_any(skb); | |
545 | } | |
546 | memset(desc, 0, sizeof(*desc)); | |
0732484b AP |
547 | } |
548 | card->tx_buf_list[i] = NULL; | |
0732484b AP |
549 | } |
550 | ||
551 | return; | |
552 | } | |
553 | ||
554 | /* This function cleans up RX buffer rings. If any of the buffer list has valid | |
555 | * SKB address, associated SKB is freed. | |
556 | */ | |
557 | static void mwifiex_cleanup_rxq_ring(struct mwifiex_adapter *adapter) | |
558 | { | |
559 | struct pcie_service_card *card = adapter->card; | |
ca8f2112 | 560 | const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; |
0732484b | 561 | struct mwifiex_pcie_buf_desc *desc; |
ca8f2112 | 562 | struct mwifiex_pfu_buf_desc *desc2; |
0732484b AP |
563 | struct sk_buff *skb; |
564 | int i; | |
565 | ||
566 | for (i = 0; i < MWIFIEX_MAX_TXRX_BD; i++) { | |
ca8f2112 AP |
567 | if (reg->pfu_enabled) { |
568 | desc2 = card->rxbd_ring[i]; | |
569 | if (card->rx_buf_list[i]) { | |
570 | skb = card->rx_buf_list[i]; | |
571 | pci_unmap_single(card->dev, desc2->paddr, | |
572 | skb->len, PCI_DMA_TODEVICE); | |
573 | dev_kfree_skb_any(skb); | |
574 | } | |
575 | memset(desc2, 0, sizeof(*desc2)); | |
576 | } else { | |
577 | desc = card->rxbd_ring[i]; | |
578 | if (card->rx_buf_list[i]) { | |
579 | skb = card->rx_buf_list[i]; | |
580 | pci_unmap_single(card->dev, desc->paddr, | |
581 | skb->len, PCI_DMA_TODEVICE); | |
582 | dev_kfree_skb_any(skb); | |
583 | } | |
584 | memset(desc, 0, sizeof(*desc)); | |
0732484b | 585 | } |
ca8f2112 | 586 | card->rx_buf_list[i] = NULL; |
0732484b AP |
587 | } |
588 | ||
589 | return; | |
590 | } | |
591 | ||
592 | /* This function cleans up event buffer rings. If any of the buffer list has | |
593 | * valid SKB address, associated SKB is freed. | |
594 | */ | |
595 | static void mwifiex_cleanup_evt_ring(struct mwifiex_adapter *adapter) | |
596 | { | |
597 | struct pcie_service_card *card = adapter->card; | |
e05dc3e9 | 598 | struct mwifiex_evt_buf_desc *desc; |
0732484b AP |
599 | struct sk_buff *skb; |
600 | int i; | |
601 | ||
602 | for (i = 0; i < MWIFIEX_MAX_EVT_BD; i++) { | |
603 | desc = card->evtbd_ring[i]; | |
604 | if (card->evt_buf_list[i]) { | |
605 | skb = card->evt_buf_list[i]; | |
606 | pci_unmap_single(card->dev, desc->paddr, MAX_EVENT_SIZE, | |
607 | PCI_DMA_FROMDEVICE); | |
608 | dev_kfree_skb_any(skb); | |
609 | } | |
610 | card->evt_buf_list[i] = NULL; | |
611 | memset(desc, 0, sizeof(*desc)); | |
612 | } | |
613 | ||
614 | return; | |
615 | } | |
616 | ||
617 | /* This function creates buffer descriptor ring for TX | |
d930faee AK |
618 | */ |
619 | static int mwifiex_pcie_create_txbd_ring(struct mwifiex_adapter *adapter) | |
620 | { | |
621 | struct pcie_service_card *card = adapter->card; | |
dd04e6ac | 622 | const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; |
d930faee AK |
623 | |
624 | /* | |
625 | * driver maintaines the write pointer and firmware maintaines the read | |
626 | * pointer. The write pointer starts at 0 (zero) while the read pointer | |
627 | * starts at zero with rollover bit set | |
628 | */ | |
629 | card->txbd_wrptr = 0; | |
ca8f2112 AP |
630 | |
631 | if (reg->pfu_enabled) | |
632 | card->txbd_rdptr = 0; | |
633 | else | |
634 | card->txbd_rdptr |= reg->tx_rollover_ind; | |
d930faee AK |
635 | |
636 | /* allocate shared memory for the BD ring and divide the same in to | |
637 | several descriptors */ | |
ca8f2112 AP |
638 | if (reg->pfu_enabled) |
639 | card->txbd_ring_size = sizeof(struct mwifiex_pfu_buf_desc) * | |
640 | MWIFIEX_MAX_TXRX_BD; | |
641 | else | |
642 | card->txbd_ring_size = sizeof(struct mwifiex_pcie_buf_desc) * | |
643 | MWIFIEX_MAX_TXRX_BD; | |
644 | ||
d930faee | 645 | dev_dbg(adapter->dev, "info: txbd_ring: Allocating %d bytes\n", |
f57c1edc | 646 | card->txbd_ring_size); |
fc331460 AP |
647 | card->txbd_ring_vbase = pci_alloc_consistent(card->dev, |
648 | card->txbd_ring_size, | |
649 | &card->txbd_ring_pbase); | |
d930faee | 650 | if (!card->txbd_ring_vbase) { |
fc331460 AP |
651 | dev_err(adapter->dev, |
652 | "allocate consistent memory (%d bytes) failed!\n", | |
653 | card->txbd_ring_size); | |
8c53e42d | 654 | return -ENOMEM; |
d930faee | 655 | } |
f57c1edc YAP |
656 | dev_dbg(adapter->dev, |
657 | "info: txbd_ring - base: %p, pbase: %#x:%x, len: %x\n", | |
fc331460 | 658 | card->txbd_ring_vbase, (unsigned int)card->txbd_ring_pbase, |
f57c1edc | 659 | (u32)((u64)card->txbd_ring_pbase >> 32), card->txbd_ring_size); |
d930faee | 660 | |
0732484b | 661 | return mwifiex_init_txq_ring(adapter); |
d930faee AK |
662 | } |
663 | ||
664 | static int mwifiex_pcie_delete_txbd_ring(struct mwifiex_adapter *adapter) | |
665 | { | |
666 | struct pcie_service_card *card = adapter->card; | |
dd04e6ac | 667 | const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; |
d930faee | 668 | |
0732484b | 669 | mwifiex_cleanup_txq_ring(adapter); |
d930faee | 670 | |
fc331460 AP |
671 | if (card->txbd_ring_vbase) |
672 | pci_free_consistent(card->dev, card->txbd_ring_size, | |
673 | card->txbd_ring_vbase, | |
674 | card->txbd_ring_pbase); | |
d930faee AK |
675 | card->txbd_ring_size = 0; |
676 | card->txbd_wrptr = 0; | |
dd04e6ac | 677 | card->txbd_rdptr = 0 | reg->tx_rollover_ind; |
d930faee | 678 | card->txbd_ring_vbase = NULL; |
fc331460 | 679 | card->txbd_ring_pbase = 0; |
d930faee AK |
680 | |
681 | return 0; | |
682 | } | |
683 | ||
684 | /* | |
685 | * This function creates buffer descriptor ring for RX | |
686 | */ | |
687 | static int mwifiex_pcie_create_rxbd_ring(struct mwifiex_adapter *adapter) | |
688 | { | |
689 | struct pcie_service_card *card = adapter->card; | |
dd04e6ac | 690 | const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; |
d930faee AK |
691 | |
692 | /* | |
693 | * driver maintaines the read pointer and firmware maintaines the write | |
694 | * pointer. The write pointer starts at 0 (zero) while the read pointer | |
695 | * starts at zero with rollover bit set | |
696 | */ | |
697 | card->rxbd_wrptr = 0; | |
dd04e6ac | 698 | card->rxbd_rdptr = reg->rx_rollover_ind; |
d930faee | 699 | |
ca8f2112 AP |
700 | if (reg->pfu_enabled) |
701 | card->rxbd_ring_size = sizeof(struct mwifiex_pfu_buf_desc) * | |
702 | MWIFIEX_MAX_TXRX_BD; | |
703 | else | |
704 | card->rxbd_ring_size = sizeof(struct mwifiex_pcie_buf_desc) * | |
705 | MWIFIEX_MAX_TXRX_BD; | |
706 | ||
d930faee | 707 | dev_dbg(adapter->dev, "info: rxbd_ring: Allocating %d bytes\n", |
f57c1edc | 708 | card->rxbd_ring_size); |
fc331460 AP |
709 | card->rxbd_ring_vbase = pci_alloc_consistent(card->dev, |
710 | card->rxbd_ring_size, | |
711 | &card->rxbd_ring_pbase); | |
d930faee | 712 | if (!card->rxbd_ring_vbase) { |
fc331460 AP |
713 | dev_err(adapter->dev, |
714 | "allocate consistent memory (%d bytes) failed!\n", | |
715 | card->rxbd_ring_size); | |
8c53e42d | 716 | return -ENOMEM; |
d930faee | 717 | } |
d930faee | 718 | |
f57c1edc YAP |
719 | dev_dbg(adapter->dev, |
720 | "info: rxbd_ring - base: %p, pbase: %#x:%x, len: %#x\n", | |
721 | card->rxbd_ring_vbase, (u32)card->rxbd_ring_pbase, | |
722 | (u32)((u64)card->rxbd_ring_pbase >> 32), | |
723 | card->rxbd_ring_size); | |
d930faee | 724 | |
0732484b | 725 | return mwifiex_init_rxq_ring(adapter); |
d930faee AK |
726 | } |
727 | ||
728 | /* | |
729 | * This function deletes Buffer descriptor ring for RX | |
730 | */ | |
731 | static int mwifiex_pcie_delete_rxbd_ring(struct mwifiex_adapter *adapter) | |
732 | { | |
733 | struct pcie_service_card *card = adapter->card; | |
dd04e6ac | 734 | const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; |
d930faee | 735 | |
0732484b | 736 | mwifiex_cleanup_rxq_ring(adapter); |
d930faee | 737 | |
fc331460 AP |
738 | if (card->rxbd_ring_vbase) |
739 | pci_free_consistent(card->dev, card->rxbd_ring_size, | |
740 | card->rxbd_ring_vbase, | |
741 | card->rxbd_ring_pbase); | |
d930faee AK |
742 | card->rxbd_ring_size = 0; |
743 | card->rxbd_wrptr = 0; | |
dd04e6ac | 744 | card->rxbd_rdptr = 0 | reg->rx_rollover_ind; |
d930faee | 745 | card->rxbd_ring_vbase = NULL; |
fc331460 | 746 | card->rxbd_ring_pbase = 0; |
d930faee AK |
747 | |
748 | return 0; | |
749 | } | |
750 | ||
751 | /* | |
752 | * This function creates buffer descriptor ring for Events | |
753 | */ | |
754 | static int mwifiex_pcie_create_evtbd_ring(struct mwifiex_adapter *adapter) | |
755 | { | |
756 | struct pcie_service_card *card = adapter->card; | |
dd04e6ac | 757 | const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; |
d930faee AK |
758 | |
759 | /* | |
760 | * driver maintaines the read pointer and firmware maintaines the write | |
761 | * pointer. The write pointer starts at 0 (zero) while the read pointer | |
762 | * starts at zero with rollover bit set | |
763 | */ | |
764 | card->evtbd_wrptr = 0; | |
dd04e6ac | 765 | card->evtbd_rdptr = reg->evt_rollover_ind; |
d930faee | 766 | |
e05dc3e9 | 767 | card->evtbd_ring_size = sizeof(struct mwifiex_evt_buf_desc) * |
ca8f2112 AP |
768 | MWIFIEX_MAX_EVT_BD; |
769 | ||
d930faee | 770 | dev_dbg(adapter->dev, "info: evtbd_ring: Allocating %d bytes\n", |
f57c1edc | 771 | card->evtbd_ring_size); |
fc331460 AP |
772 | card->evtbd_ring_vbase = pci_alloc_consistent(card->dev, |
773 | card->evtbd_ring_size, | |
774 | &card->evtbd_ring_pbase); | |
d930faee | 775 | if (!card->evtbd_ring_vbase) { |
f57c1edc | 776 | dev_err(adapter->dev, |
fc331460 AP |
777 | "allocate consistent memory (%d bytes) failed!\n", |
778 | card->evtbd_ring_size); | |
8c53e42d | 779 | return -ENOMEM; |
d930faee | 780 | } |
d930faee | 781 | |
f57c1edc YAP |
782 | dev_dbg(adapter->dev, |
783 | "info: CMDRSP/EVT bd_ring - base: %p pbase: %#x:%x len: %#x\n", | |
784 | card->evtbd_ring_vbase, (u32)card->evtbd_ring_pbase, | |
785 | (u32)((u64)card->evtbd_ring_pbase >> 32), | |
786 | card->evtbd_ring_size); | |
d930faee | 787 | |
0732484b | 788 | return mwifiex_pcie_init_evt_ring(adapter); |
d930faee AK |
789 | } |
790 | ||
791 | /* | |
792 | * This function deletes Buffer descriptor ring for Events | |
793 | */ | |
794 | static int mwifiex_pcie_delete_evtbd_ring(struct mwifiex_adapter *adapter) | |
795 | { | |
796 | struct pcie_service_card *card = adapter->card; | |
dd04e6ac | 797 | const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; |
d930faee | 798 | |
0732484b | 799 | mwifiex_cleanup_evt_ring(adapter); |
d930faee | 800 | |
fc331460 AP |
801 | if (card->evtbd_ring_vbase) |
802 | pci_free_consistent(card->dev, card->evtbd_ring_size, | |
803 | card->evtbd_ring_vbase, | |
804 | card->evtbd_ring_pbase); | |
d930faee | 805 | card->evtbd_wrptr = 0; |
dd04e6ac | 806 | card->evtbd_rdptr = 0 | reg->evt_rollover_ind; |
d930faee AK |
807 | card->evtbd_ring_size = 0; |
808 | card->evtbd_ring_vbase = NULL; | |
fc331460 | 809 | card->evtbd_ring_pbase = 0; |
d930faee AK |
810 | |
811 | return 0; | |
812 | } | |
813 | ||
814 | /* | |
815 | * This function allocates a buffer for CMDRSP | |
816 | */ | |
817 | static int mwifiex_pcie_alloc_cmdrsp_buf(struct mwifiex_adapter *adapter) | |
818 | { | |
819 | struct pcie_service_card *card = adapter->card; | |
820 | struct sk_buff *skb; | |
821 | ||
822 | /* Allocate memory for receiving command response data */ | |
823 | skb = dev_alloc_skb(MWIFIEX_UPLD_SIZE); | |
824 | if (!skb) { | |
f57c1edc YAP |
825 | dev_err(adapter->dev, |
826 | "Unable to allocate skb for command response data.\n"); | |
d930faee AK |
827 | return -ENOMEM; |
828 | } | |
d930faee | 829 | skb_put(skb, MWIFIEX_UPLD_SIZE); |
fc331460 AP |
830 | if (mwifiex_map_pci_memory(adapter, skb, MWIFIEX_UPLD_SIZE, |
831 | PCI_DMA_FROMDEVICE)) | |
832 | return -1; | |
d930faee | 833 | |
fc331460 | 834 | card->cmdrsp_buf = skb; |
d930faee AK |
835 | |
836 | return 0; | |
837 | } | |
838 | ||
839 | /* | |
840 | * This function deletes a buffer for CMDRSP | |
841 | */ | |
842 | static int mwifiex_pcie_delete_cmdrsp_buf(struct mwifiex_adapter *adapter) | |
843 | { | |
844 | struct pcie_service_card *card; | |
fc331460 | 845 | dma_addr_t buf_pa; |
d930faee AK |
846 | |
847 | if (!adapter) | |
848 | return 0; | |
849 | ||
850 | card = adapter->card; | |
851 | ||
fc331460 AP |
852 | if (card && card->cmdrsp_buf) { |
853 | MWIFIEX_SKB_PACB(card->cmdrsp_buf, &buf_pa); | |
854 | pci_unmap_single(card->dev, buf_pa, MWIFIEX_UPLD_SIZE, | |
855 | PCI_DMA_FROMDEVICE); | |
d930faee | 856 | dev_kfree_skb_any(card->cmdrsp_buf); |
fc331460 | 857 | } |
d930faee | 858 | |
fc331460 AP |
859 | if (card && card->cmd_buf) { |
860 | MWIFIEX_SKB_PACB(card->cmd_buf, &buf_pa); | |
861 | pci_unmap_single(card->dev, buf_pa, MWIFIEX_SIZE_OF_CMD_BUFFER, | |
862 | PCI_DMA_TODEVICE); | |
d930faee | 863 | dev_kfree_skb_any(card->cmd_buf); |
fc331460 | 864 | } |
d930faee AK |
865 | return 0; |
866 | } | |
867 | ||
868 | /* | |
869 | * This function allocates a buffer for sleep cookie | |
870 | */ | |
871 | static int mwifiex_pcie_alloc_sleep_cookie_buf(struct mwifiex_adapter *adapter) | |
872 | { | |
d930faee AK |
873 | struct pcie_service_card *card = adapter->card; |
874 | ||
fc331460 AP |
875 | card->sleep_cookie_vbase = pci_alloc_consistent(card->dev, sizeof(u32), |
876 | &card->sleep_cookie_pbase); | |
877 | if (!card->sleep_cookie_vbase) { | |
878 | dev_err(adapter->dev, "pci_alloc_consistent failed!\n"); | |
d930faee AK |
879 | return -ENOMEM; |
880 | } | |
d930faee | 881 | /* Init val of Sleep Cookie */ |
fc331460 | 882 | *(u32 *)card->sleep_cookie_vbase = FW_AWAKE_COOKIE; |
d930faee AK |
883 | |
884 | dev_dbg(adapter->dev, "alloc_scook: sleep cookie=0x%x\n", | |
fc331460 | 885 | *((u32 *)card->sleep_cookie_vbase)); |
d930faee AK |
886 | |
887 | return 0; | |
888 | } | |
889 | ||
890 | /* | |
891 | * This function deletes buffer for sleep cookie | |
892 | */ | |
893 | static int mwifiex_pcie_delete_sleep_cookie_buf(struct mwifiex_adapter *adapter) | |
894 | { | |
895 | struct pcie_service_card *card; | |
896 | ||
897 | if (!adapter) | |
898 | return 0; | |
899 | ||
900 | card = adapter->card; | |
901 | ||
fc331460 AP |
902 | if (card && card->sleep_cookie_vbase) { |
903 | pci_free_consistent(card->dev, sizeof(u32), | |
904 | card->sleep_cookie_vbase, | |
905 | card->sleep_cookie_pbase); | |
906 | card->sleep_cookie_vbase = NULL; | |
d930faee AK |
907 | } |
908 | ||
909 | return 0; | |
910 | } | |
911 | ||
fbd7e7ac AP |
912 | /* This function flushes the TX buffer descriptor ring |
913 | * This function defined as handler is also called while cleaning TXRX | |
914 | * during disconnect/ bss stop. | |
915 | */ | |
916 | static int mwifiex_clean_pcie_ring_buf(struct mwifiex_adapter *adapter) | |
917 | { | |
918 | struct pcie_service_card *card = adapter->card; | |
dd04e6ac | 919 | const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; |
fbd7e7ac AP |
920 | u32 rdptr; |
921 | ||
922 | /* Read the TX ring read pointer set by firmware */ | |
dd04e6ac | 923 | if (mwifiex_read_reg(adapter, reg->tx_rdptr, &rdptr)) { |
fbd7e7ac | 924 | dev_err(adapter->dev, |
dd04e6ac | 925 | "Flush TXBD: failed to read reg->tx_rdptr\n"); |
fbd7e7ac AP |
926 | return -1; |
927 | } | |
928 | ||
929 | if (!mwifiex_pcie_txbd_empty(card, rdptr)) { | |
930 | card->txbd_flush = 1; | |
931 | /* write pointer already set at last send | |
932 | * send dnld-rdy intr again, wait for completion. | |
933 | */ | |
934 | if (mwifiex_write_reg(adapter, PCIE_CPU_INT_EVENT, | |
935 | CPU_INTR_DNLD_RDY)) { | |
936 | dev_err(adapter->dev, | |
937 | "failed to assert dnld-rdy interrupt.\n"); | |
938 | return -1; | |
939 | } | |
940 | } | |
941 | return 0; | |
942 | } | |
943 | ||
d930faee | 944 | /* |
e7f767a7 | 945 | * This function unmaps and frees downloaded data buffer |
d930faee | 946 | */ |
e7f767a7 | 947 | static int mwifiex_pcie_send_data_complete(struct mwifiex_adapter *adapter) |
d930faee | 948 | { |
e7f767a7 AP |
949 | struct sk_buff *skb; |
950 | dma_addr_t buf_pa; | |
ca8f2112 | 951 | u32 wrdoneidx, rdptr, num_tx_buffs, unmap_count = 0; |
e05dc3e9 | 952 | struct mwifiex_pcie_buf_desc *desc; |
ca8f2112 | 953 | struct mwifiex_pfu_buf_desc *desc2; |
d930faee | 954 | struct pcie_service_card *card = adapter->card; |
dd04e6ac | 955 | const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; |
d930faee AK |
956 | |
957 | if (!mwifiex_pcie_ok_to_access_hw(adapter)) | |
958 | mwifiex_pm_wakeup_card(adapter); | |
959 | ||
960 | /* Read the TX ring read pointer set by firmware */ | |
dd04e6ac | 961 | if (mwifiex_read_reg(adapter, reg->tx_rdptr, &rdptr)) { |
f57c1edc | 962 | dev_err(adapter->dev, |
dd04e6ac | 963 | "SEND COMP: failed to read reg->tx_rdptr\n"); |
d930faee AK |
964 | return -1; |
965 | } | |
966 | ||
e7f767a7 AP |
967 | dev_dbg(adapter->dev, "SEND COMP: rdptr_prev=0x%x, rdptr=0x%x\n", |
968 | card->txbd_rdptr, rdptr); | |
d930faee | 969 | |
ca8f2112 | 970 | num_tx_buffs = MWIFIEX_MAX_TXRX_BD << reg->tx_start_ptr; |
e7f767a7 | 971 | /* free from previous txbd_rdptr to current txbd_rdptr */ |
dd04e6ac AP |
972 | while (((card->txbd_rdptr & reg->tx_mask) != |
973 | (rdptr & reg->tx_mask)) || | |
974 | ((card->txbd_rdptr & reg->tx_rollover_ind) != | |
975 | (rdptr & reg->tx_rollover_ind))) { | |
ca8f2112 AP |
976 | wrdoneidx = (card->txbd_rdptr & reg->tx_mask) >> |
977 | reg->tx_start_ptr; | |
e7f767a7 AP |
978 | |
979 | skb = card->tx_buf_list[wrdoneidx]; | |
980 | if (skb) { | |
981 | dev_dbg(adapter->dev, | |
982 | "SEND COMP: Detach skb %p at txbd_rdidx=%d\n", | |
983 | skb, wrdoneidx); | |
984 | MWIFIEX_SKB_PACB(skb, &buf_pa); | |
985 | pci_unmap_single(card->dev, buf_pa, skb->len, | |
986 | PCI_DMA_TODEVICE); | |
987 | ||
988 | unmap_count++; | |
989 | ||
990 | if (card->txbd_flush) | |
991 | mwifiex_write_data_complete(adapter, skb, 0, | |
992 | -1); | |
993 | else | |
994 | mwifiex_write_data_complete(adapter, skb, 0, 0); | |
995 | } | |
996 | ||
997 | card->tx_buf_list[wrdoneidx] = NULL; | |
ca8f2112 AP |
998 | |
999 | if (reg->pfu_enabled) { | |
1000 | desc2 = (void *)card->txbd_ring[wrdoneidx]; | |
1001 | memset(desc2, 0, sizeof(*desc2)); | |
1002 | } else { | |
1003 | desc = card->txbd_ring[wrdoneidx]; | |
1004 | memset(desc, 0, sizeof(*desc)); | |
1005 | } | |
1006 | switch (card->dev->device) { | |
1007 | case PCIE_DEVICE_ID_MARVELL_88W8766P: | |
1008 | card->txbd_rdptr++; | |
1009 | break; | |
1010 | case PCIE_DEVICE_ID_MARVELL_88W8897: | |
1011 | card->txbd_rdptr += reg->ring_tx_start_ptr; | |
1012 | break; | |
1013 | } | |
1014 | ||
e7f767a7 | 1015 | |
dd04e6ac | 1016 | if ((card->txbd_rdptr & reg->tx_mask) == num_tx_buffs) |
e7f767a7 | 1017 | card->txbd_rdptr = ((card->txbd_rdptr & |
dd04e6ac AP |
1018 | reg->tx_rollover_ind) ^ |
1019 | reg->tx_rollover_ind); | |
e7f767a7 AP |
1020 | } |
1021 | ||
1022 | if (unmap_count) | |
1023 | adapter->data_sent = false; | |
1024 | ||
1025 | if (card->txbd_flush) { | |
3d482038 | 1026 | if (mwifiex_pcie_txbd_empty(card, card->txbd_rdptr)) |
e7f767a7 AP |
1027 | card->txbd_flush = 0; |
1028 | else | |
1029 | mwifiex_clean_pcie_ring_buf(adapter); | |
1030 | } | |
1031 | ||
1032 | return 0; | |
1033 | } | |
1034 | ||
1035 | /* This function sends data buffer to device. First 4 bytes of payload | |
1036 | * are filled with payload length and payload type. Then this payload | |
1037 | * is mapped to PCI device memory. Tx ring pointers are advanced accordingly. | |
1038 | * Download ready interrupt to FW is deffered if Tx ring is not full and | |
1039 | * additional payload can be accomodated. | |
1040 | */ | |
1041 | static int | |
1042 | mwifiex_pcie_send_data(struct mwifiex_adapter *adapter, struct sk_buff *skb, | |
1043 | struct mwifiex_tx_param *tx_param) | |
1044 | { | |
1045 | struct pcie_service_card *card = adapter->card; | |
dd04e6ac | 1046 | const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; |
ca8f2112 | 1047 | u32 wrindx, num_tx_buffs, rx_val; |
e7f767a7 AP |
1048 | int ret; |
1049 | dma_addr_t buf_pa; | |
e05dc3e9 | 1050 | struct mwifiex_pcie_buf_desc *desc; |
ca8f2112 | 1051 | struct mwifiex_pfu_buf_desc *desc2; |
e7f767a7 AP |
1052 | __le16 *tmp; |
1053 | ||
1054 | if (!(skb->data && skb->len)) { | |
1055 | dev_err(adapter->dev, "%s(): invalid parameter <%p, %#x>\n", | |
1056 | __func__, skb->data, skb->len); | |
1057 | return -1; | |
1058 | } | |
1059 | ||
1060 | if (!mwifiex_pcie_ok_to_access_hw(adapter)) | |
1061 | mwifiex_pm_wakeup_card(adapter); | |
1062 | ||
ca8f2112 | 1063 | num_tx_buffs = MWIFIEX_MAX_TXRX_BD << reg->tx_start_ptr; |
e7f767a7 AP |
1064 | dev_dbg(adapter->dev, "info: SEND DATA: <Rd: %#x, Wr: %#x>\n", |
1065 | card->txbd_rdptr, card->txbd_wrptr); | |
1066 | if (mwifiex_pcie_txbd_not_full(card)) { | |
d930faee AK |
1067 | u8 *payload; |
1068 | ||
1069 | adapter->data_sent = true; | |
e7f767a7 | 1070 | payload = skb->data; |
d930faee AK |
1071 | tmp = (__le16 *)&payload[0]; |
1072 | *tmp = cpu_to_le16((u16)skb->len); | |
1073 | tmp = (__le16 *)&payload[2]; | |
1074 | *tmp = cpu_to_le16(MWIFIEX_TYPE_DATA); | |
e7f767a7 AP |
1075 | |
1076 | if (mwifiex_map_pci_memory(adapter, skb, skb->len , | |
1077 | PCI_DMA_TODEVICE)) | |
1078 | return -1; | |
1079 | ||
ca8f2112 | 1080 | wrindx = (card->txbd_wrptr & reg->tx_mask) >> reg->tx_start_ptr; |
e7f767a7 AP |
1081 | MWIFIEX_SKB_PACB(skb, &buf_pa); |
1082 | card->tx_buf_list[wrindx] = skb; | |
d930faee | 1083 | |
ca8f2112 AP |
1084 | if (reg->pfu_enabled) { |
1085 | desc2 = (void *)card->txbd_ring[wrindx]; | |
1086 | desc2->paddr = buf_pa; | |
1087 | desc2->len = (u16)skb->len; | |
1088 | desc2->frag_len = (u16)skb->len; | |
1089 | desc2->offset = 0; | |
1090 | desc2->flags = MWIFIEX_BD_FLAG_FIRST_DESC | | |
1091 | MWIFIEX_BD_FLAG_LAST_DESC; | |
1092 | } else { | |
1093 | desc = card->txbd_ring[wrindx]; | |
1094 | desc->paddr = buf_pa; | |
1095 | desc->len = (u16)skb->len; | |
1096 | desc->flags = MWIFIEX_BD_FLAG_FIRST_DESC | | |
1097 | MWIFIEX_BD_FLAG_LAST_DESC; | |
1098 | } | |
1099 | ||
1100 | switch (card->dev->device) { | |
1101 | case PCIE_DEVICE_ID_MARVELL_88W8766P: | |
1102 | card->txbd_wrptr++; | |
1103 | break; | |
1104 | case PCIE_DEVICE_ID_MARVELL_88W8897: | |
1105 | card->txbd_wrptr += reg->ring_tx_start_ptr; | |
1106 | break; | |
1107 | } | |
1108 | ||
1109 | if ((card->txbd_wrptr & reg->tx_mask) == num_tx_buffs) | |
d930faee | 1110 | card->txbd_wrptr = ((card->txbd_wrptr & |
dd04e6ac AP |
1111 | reg->tx_rollover_ind) ^ |
1112 | reg->tx_rollover_ind); | |
d930faee | 1113 | |
ca8f2112 | 1114 | rx_val = card->rxbd_rdptr & reg->rx_wrap_mask; |
dd04e6ac AP |
1115 | /* Write the TX ring write pointer in to reg->tx_wrptr */ |
1116 | if (mwifiex_write_reg(adapter, reg->tx_wrptr, | |
ca8f2112 | 1117 | card->txbd_wrptr | rx_val)) { |
f57c1edc | 1118 | dev_err(adapter->dev, |
dd04e6ac | 1119 | "SEND DATA: failed to write reg->tx_wrptr\n"); |
e7f767a7 AP |
1120 | ret = -1; |
1121 | goto done_unmap; | |
d930faee | 1122 | } |
e7f767a7 AP |
1123 | if ((mwifiex_pcie_txbd_not_full(card)) && |
1124 | tx_param->next_pkt_len) { | |
1125 | /* have more packets and TxBD still can hold more */ | |
1126 | dev_dbg(adapter->dev, | |
1127 | "SEND DATA: delay dnld-rdy interrupt.\n"); | |
1128 | adapter->data_sent = false; | |
1129 | } else { | |
1130 | /* Send the TX ready interrupt */ | |
1131 | if (mwifiex_write_reg(adapter, PCIE_CPU_INT_EVENT, | |
1132 | CPU_INTR_DNLD_RDY)) { | |
1133 | dev_err(adapter->dev, | |
1134 | "SEND DATA: failed to assert dnld-rdy interrupt.\n"); | |
1135 | ret = -1; | |
1136 | goto done_unmap; | |
1137 | } | |
d930faee AK |
1138 | } |
1139 | dev_dbg(adapter->dev, "info: SEND DATA: Updated <Rd: %#x, Wr: " | |
f57c1edc | 1140 | "%#x> and sent packet to firmware successfully\n", |
e7f767a7 | 1141 | card->txbd_rdptr, card->txbd_wrptr); |
d930faee | 1142 | } else { |
f57c1edc YAP |
1143 | dev_dbg(adapter->dev, |
1144 | "info: TX Ring full, can't send packets to fw\n"); | |
d930faee AK |
1145 | adapter->data_sent = true; |
1146 | /* Send the TX ready interrupt */ | |
1147 | if (mwifiex_write_reg(adapter, PCIE_CPU_INT_EVENT, | |
1148 | CPU_INTR_DNLD_RDY)) | |
f57c1edc YAP |
1149 | dev_err(adapter->dev, |
1150 | "SEND DATA: failed to assert door-bell intr\n"); | |
d930faee AK |
1151 | return -EBUSY; |
1152 | } | |
1153 | ||
e7f767a7 AP |
1154 | return -EINPROGRESS; |
1155 | done_unmap: | |
1156 | MWIFIEX_SKB_PACB(skb, &buf_pa); | |
1157 | pci_unmap_single(card->dev, buf_pa, skb->len, PCI_DMA_TODEVICE); | |
1158 | card->tx_buf_list[wrindx] = NULL; | |
ca8f2112 AP |
1159 | if (reg->pfu_enabled) |
1160 | memset(desc2, 0, sizeof(*desc2)); | |
1161 | else | |
1162 | memset(desc, 0, sizeof(*desc)); | |
1163 | ||
e7f767a7 | 1164 | return ret; |
d930faee AK |
1165 | } |
1166 | ||
1167 | /* | |
1168 | * This function handles received buffer ring and | |
1169 | * dispatches packets to upper | |
1170 | */ | |
1171 | static int mwifiex_pcie_process_recv_data(struct mwifiex_adapter *adapter) | |
1172 | { | |
1173 | struct pcie_service_card *card = adapter->card; | |
dd04e6ac | 1174 | const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; |
ca8f2112 | 1175 | u32 wrptr, rd_index, tx_val; |
e7f767a7 | 1176 | dma_addr_t buf_pa; |
d930faee AK |
1177 | int ret = 0; |
1178 | struct sk_buff *skb_tmp = NULL; | |
e05dc3e9 | 1179 | struct mwifiex_pcie_buf_desc *desc; |
ca8f2112 | 1180 | struct mwifiex_pfu_buf_desc *desc2; |
d930faee | 1181 | |
e7f767a7 AP |
1182 | if (!mwifiex_pcie_ok_to_access_hw(adapter)) |
1183 | mwifiex_pm_wakeup_card(adapter); | |
1184 | ||
d930faee | 1185 | /* Read the RX ring Write pointer set by firmware */ |
dd04e6ac | 1186 | if (mwifiex_read_reg(adapter, reg->rx_wrptr, &wrptr)) { |
f57c1edc | 1187 | dev_err(adapter->dev, |
dd04e6ac | 1188 | "RECV DATA: failed to read reg->rx_wrptr\n"); |
d930faee AK |
1189 | ret = -1; |
1190 | goto done; | |
1191 | } | |
e7f767a7 | 1192 | card->rxbd_wrptr = wrptr; |
d930faee | 1193 | |
dd04e6ac AP |
1194 | while (((wrptr & reg->rx_mask) != |
1195 | (card->rxbd_rdptr & reg->rx_mask)) || | |
1196 | ((wrptr & reg->rx_rollover_ind) == | |
1197 | (card->rxbd_rdptr & reg->rx_rollover_ind))) { | |
d930faee AK |
1198 | struct sk_buff *skb_data; |
1199 | u16 rx_len; | |
e7f767a7 | 1200 | __le16 pkt_len; |
d930faee | 1201 | |
dd04e6ac | 1202 | rd_index = card->rxbd_rdptr & reg->rx_mask; |
d930faee AK |
1203 | skb_data = card->rx_buf_list[rd_index]; |
1204 | ||
e7f767a7 AP |
1205 | MWIFIEX_SKB_PACB(skb_data, &buf_pa); |
1206 | pci_unmap_single(card->dev, buf_pa, MWIFIEX_RX_DATA_BUF_SIZE, | |
1207 | PCI_DMA_FROMDEVICE); | |
1208 | card->rx_buf_list[rd_index] = NULL; | |
1209 | ||
d930faee | 1210 | /* Get data length from interface header - |
e7f767a7 AP |
1211 | * first 2 bytes for len, next 2 bytes is for type |
1212 | */ | |
1213 | pkt_len = *((__le16 *)skb_data->data); | |
1214 | rx_len = le16_to_cpu(pkt_len); | |
1215 | skb_put(skb_data, rx_len); | |
f57c1edc YAP |
1216 | dev_dbg(adapter->dev, |
1217 | "info: RECV DATA: Rd=%#x, Wr=%#x, Len=%d\n", | |
1218 | card->rxbd_rdptr, wrptr, rx_len); | |
e7f767a7 AP |
1219 | skb_pull(skb_data, INTF_HEADER_LEN); |
1220 | mwifiex_handle_rx_packet(adapter, skb_data); | |
1221 | ||
1222 | skb_tmp = dev_alloc_skb(MWIFIEX_RX_DATA_BUF_SIZE); | |
d930faee | 1223 | if (!skb_tmp) { |
e7f767a7 AP |
1224 | dev_err(adapter->dev, |
1225 | "Unable to allocate skb.\n"); | |
1226 | return -ENOMEM; | |
d930faee AK |
1227 | } |
1228 | ||
e7f767a7 AP |
1229 | if (mwifiex_map_pci_memory(adapter, skb_tmp, |
1230 | MWIFIEX_RX_DATA_BUF_SIZE, | |
1231 | PCI_DMA_FROMDEVICE)) | |
1232 | return -1; | |
1233 | ||
1234 | MWIFIEX_SKB_PACB(skb_tmp, &buf_pa); | |
1235 | ||
1236 | dev_dbg(adapter->dev, | |
1237 | "RECV DATA: Attach new sk_buff %p at rxbd_rdidx=%d\n", | |
1238 | skb_tmp, rd_index); | |
1239 | card->rx_buf_list[rd_index] = skb_tmp; | |
ca8f2112 AP |
1240 | |
1241 | if (reg->pfu_enabled) { | |
1242 | desc2 = (void *)card->rxbd_ring[rd_index]; | |
1243 | desc2->paddr = buf_pa; | |
1244 | desc2->len = skb_tmp->len; | |
1245 | desc2->frag_len = skb_tmp->len; | |
1246 | desc2->offset = 0; | |
1247 | desc2->flags = reg->ring_flag_sop | reg->ring_flag_eop; | |
1248 | } else { | |
1249 | desc = card->rxbd_ring[rd_index]; | |
1250 | desc->paddr = buf_pa; | |
1251 | desc->len = skb_tmp->len; | |
1252 | desc->flags = 0; | |
1253 | } | |
d930faee | 1254 | |
dd04e6ac | 1255 | if ((++card->rxbd_rdptr & reg->rx_mask) == |
d930faee AK |
1256 | MWIFIEX_MAX_TXRX_BD) { |
1257 | card->rxbd_rdptr = ((card->rxbd_rdptr & | |
dd04e6ac AP |
1258 | reg->rx_rollover_ind) ^ |
1259 | reg->rx_rollover_ind); | |
d930faee AK |
1260 | } |
1261 | dev_dbg(adapter->dev, "info: RECV DATA: <Rd: %#x, Wr: %#x>\n", | |
f57c1edc | 1262 | card->rxbd_rdptr, wrptr); |
d930faee | 1263 | |
ca8f2112 | 1264 | tx_val = card->txbd_wrptr & reg->tx_wrap_mask; |
dd04e6ac AP |
1265 | /* Write the RX ring read pointer in to reg->rx_rdptr */ |
1266 | if (mwifiex_write_reg(adapter, reg->rx_rdptr, | |
ca8f2112 | 1267 | card->rxbd_rdptr | tx_val)) { |
f57c1edc | 1268 | dev_err(adapter->dev, |
dd04e6ac | 1269 | "RECV DATA: failed to write reg->rx_rdptr\n"); |
d930faee AK |
1270 | ret = -1; |
1271 | goto done; | |
1272 | } | |
1273 | ||
1274 | /* Read the RX ring Write pointer set by firmware */ | |
dd04e6ac | 1275 | if (mwifiex_read_reg(adapter, reg->rx_wrptr, &wrptr)) { |
f57c1edc | 1276 | dev_err(adapter->dev, |
dd04e6ac | 1277 | "RECV DATA: failed to read reg->rx_wrptr\n"); |
d930faee AK |
1278 | ret = -1; |
1279 | goto done; | |
1280 | } | |
f57c1edc YAP |
1281 | dev_dbg(adapter->dev, |
1282 | "info: RECV DATA: Rcvd packet from fw successfully\n"); | |
e7f767a7 | 1283 | card->rxbd_wrptr = wrptr; |
d930faee AK |
1284 | } |
1285 | ||
1286 | done: | |
d930faee AK |
1287 | return ret; |
1288 | } | |
1289 | ||
1290 | /* | |
1291 | * This function downloads the boot command to device | |
1292 | */ | |
1293 | static int | |
1294 | mwifiex_pcie_send_boot_cmd(struct mwifiex_adapter *adapter, struct sk_buff *skb) | |
1295 | { | |
fc331460 AP |
1296 | dma_addr_t buf_pa; |
1297 | struct pcie_service_card *card = adapter->card; | |
dd04e6ac | 1298 | const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; |
d930faee | 1299 | |
fc331460 | 1300 | if (!(skb->data && skb->len)) { |
f57c1edc | 1301 | dev_err(adapter->dev, |
fc331460 AP |
1302 | "Invalid parameter in %s <%p. len %d>\n", |
1303 | __func__, skb->data, skb->len); | |
d930faee AK |
1304 | return -1; |
1305 | } | |
1306 | ||
fc331460 AP |
1307 | if (mwifiex_map_pci_memory(adapter, skb, skb->len , PCI_DMA_TODEVICE)) |
1308 | return -1; | |
1309 | ||
1310 | MWIFIEX_SKB_PACB(skb, &buf_pa); | |
1311 | ||
dd04e6ac AP |
1312 | /* Write the lower 32bits of the physical address to low command |
1313 | * address scratch register | |
1314 | */ | |
1315 | if (mwifiex_write_reg(adapter, reg->cmd_addr_lo, (u32)buf_pa)) { | |
f57c1edc YAP |
1316 | dev_err(adapter->dev, |
1317 | "%s: failed to write download command to boot code.\n", | |
1318 | __func__); | |
fc331460 AP |
1319 | pci_unmap_single(card->dev, buf_pa, MWIFIEX_UPLD_SIZE, |
1320 | PCI_DMA_TODEVICE); | |
d930faee AK |
1321 | return -1; |
1322 | } | |
1323 | ||
dd04e6ac AP |
1324 | /* Write the upper 32bits of the physical address to high command |
1325 | * address scratch register | |
1326 | */ | |
1327 | if (mwifiex_write_reg(adapter, reg->cmd_addr_hi, | |
fc331460 | 1328 | (u32)((u64)buf_pa >> 32))) { |
f57c1edc YAP |
1329 | dev_err(adapter->dev, |
1330 | "%s: failed to write download command to boot code.\n", | |
1331 | __func__); | |
fc331460 AP |
1332 | pci_unmap_single(card->dev, buf_pa, MWIFIEX_UPLD_SIZE, |
1333 | PCI_DMA_TODEVICE); | |
d930faee AK |
1334 | return -1; |
1335 | } | |
1336 | ||
dd04e6ac AP |
1337 | /* Write the command length to cmd_size scratch register */ |
1338 | if (mwifiex_write_reg(adapter, reg->cmd_size, skb->len)) { | |
f57c1edc | 1339 | dev_err(adapter->dev, |
dd04e6ac | 1340 | "%s: failed to write command len to cmd_size scratch reg\n", |
f57c1edc | 1341 | __func__); |
fc331460 AP |
1342 | pci_unmap_single(card->dev, buf_pa, MWIFIEX_UPLD_SIZE, |
1343 | PCI_DMA_TODEVICE); | |
d930faee AK |
1344 | return -1; |
1345 | } | |
1346 | ||
1347 | /* Ring the door bell */ | |
1348 | if (mwifiex_write_reg(adapter, PCIE_CPU_INT_EVENT, | |
1349 | CPU_INTR_DOOR_BELL)) { | |
f57c1edc YAP |
1350 | dev_err(adapter->dev, |
1351 | "%s: failed to assert door-bell intr\n", __func__); | |
fc331460 AP |
1352 | pci_unmap_single(card->dev, buf_pa, |
1353 | MWIFIEX_UPLD_SIZE, PCI_DMA_TODEVICE); | |
d930faee AK |
1354 | return -1; |
1355 | } | |
1356 | ||
1357 | return 0; | |
1358 | } | |
1359 | ||
c6d1d87a AP |
1360 | /* This function init rx port in firmware which in turn enables to receive data |
1361 | * from device before transmitting any packet. | |
1362 | */ | |
1363 | static int mwifiex_pcie_init_fw_port(struct mwifiex_adapter *adapter) | |
1364 | { | |
1365 | struct pcie_service_card *card = adapter->card; | |
dd04e6ac | 1366 | const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; |
ca8f2112 | 1367 | int tx_wrap = card->txbd_wrptr & reg->tx_wrap_mask; |
c6d1d87a | 1368 | |
dd04e6ac | 1369 | /* Write the RX ring read pointer in to reg->rx_rdptr */ |
ca8f2112 AP |
1370 | if (mwifiex_write_reg(adapter, reg->rx_rdptr, card->rxbd_rdptr | |
1371 | tx_wrap)) { | |
c6d1d87a | 1372 | dev_err(adapter->dev, |
dd04e6ac | 1373 | "RECV DATA: failed to write reg->rx_rdptr\n"); |
c6d1d87a AP |
1374 | return -1; |
1375 | } | |
1376 | return 0; | |
1377 | } | |
1378 | ||
1379 | /* This function downloads commands to the device | |
d930faee AK |
1380 | */ |
1381 | static int | |
1382 | mwifiex_pcie_send_cmd(struct mwifiex_adapter *adapter, struct sk_buff *skb) | |
1383 | { | |
1384 | struct pcie_service_card *card = adapter->card; | |
dd04e6ac | 1385 | const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; |
d930faee | 1386 | int ret = 0; |
fc331460 AP |
1387 | dma_addr_t cmd_buf_pa, cmdrsp_buf_pa; |
1388 | u8 *payload = (u8 *)skb->data; | |
d930faee AK |
1389 | |
1390 | if (!(skb->data && skb->len)) { | |
1391 | dev_err(adapter->dev, "Invalid parameter in %s <%p, %#x>\n", | |
f57c1edc | 1392 | __func__, skb->data, skb->len); |
d930faee AK |
1393 | return -1; |
1394 | } | |
1395 | ||
1396 | /* Make sure a command response buffer is available */ | |
1397 | if (!card->cmdrsp_buf) { | |
f57c1edc YAP |
1398 | dev_err(adapter->dev, |
1399 | "No response buffer available, send command failed\n"); | |
d930faee AK |
1400 | return -EBUSY; |
1401 | } | |
1402 | ||
fc331460 AP |
1403 | if (!mwifiex_pcie_ok_to_access_hw(adapter)) |
1404 | mwifiex_pm_wakeup_card(adapter); | |
d930faee AK |
1405 | |
1406 | adapter->cmd_sent = true; | |
fc331460 AP |
1407 | |
1408 | *(__le16 *)&payload[0] = cpu_to_le16((u16)skb->len); | |
1409 | *(__le16 *)&payload[2] = cpu_to_le16(MWIFIEX_TYPE_CMD); | |
1410 | ||
1411 | if (mwifiex_map_pci_memory(adapter, skb, skb->len, PCI_DMA_TODEVICE)) | |
1412 | return -1; | |
1413 | ||
1414 | card->cmd_buf = skb; | |
d930faee AK |
1415 | |
1416 | /* To send a command, the driver will: | |
1417 | 1. Write the 64bit physical address of the data buffer to | |
dd04e6ac | 1418 | cmd response address low + cmd response address high |
d930faee AK |
1419 | 2. Ring the door bell (i.e. set the door bell interrupt) |
1420 | ||
1421 | In response to door bell interrupt, the firmware will perform | |
1422 | the DMA of the command packet (first header to obtain the total | |
1423 | length and then rest of the command). | |
1424 | */ | |
1425 | ||
1426 | if (card->cmdrsp_buf) { | |
fc331460 | 1427 | MWIFIEX_SKB_PACB(card->cmdrsp_buf, &cmdrsp_buf_pa); |
d930faee AK |
1428 | /* Write the lower 32bits of the cmdrsp buffer physical |
1429 | address */ | |
dd04e6ac | 1430 | if (mwifiex_write_reg(adapter, reg->cmdrsp_addr_lo, |
fc331460 | 1431 | (u32)cmdrsp_buf_pa)) { |
f57c1edc YAP |
1432 | dev_err(adapter->dev, |
1433 | "Failed to write download cmd to boot code.\n"); | |
d930faee AK |
1434 | ret = -1; |
1435 | goto done; | |
1436 | } | |
1437 | /* Write the upper 32bits of the cmdrsp buffer physical | |
1438 | address */ | |
dd04e6ac | 1439 | if (mwifiex_write_reg(adapter, reg->cmdrsp_addr_hi, |
fc331460 | 1440 | (u32)((u64)cmdrsp_buf_pa >> 32))) { |
f57c1edc YAP |
1441 | dev_err(adapter->dev, |
1442 | "Failed to write download cmd to boot code.\n"); | |
d930faee AK |
1443 | ret = -1; |
1444 | goto done; | |
1445 | } | |
1446 | } | |
1447 | ||
fc331460 | 1448 | MWIFIEX_SKB_PACB(card->cmd_buf, &cmd_buf_pa); |
dd04e6ac AP |
1449 | /* Write the lower 32bits of the physical address to reg->cmd_addr_lo */ |
1450 | if (mwifiex_write_reg(adapter, reg->cmd_addr_lo, | |
1451 | (u32)cmd_buf_pa)) { | |
f57c1edc YAP |
1452 | dev_err(adapter->dev, |
1453 | "Failed to write download cmd to boot code.\n"); | |
d930faee AK |
1454 | ret = -1; |
1455 | goto done; | |
1456 | } | |
dd04e6ac AP |
1457 | /* Write the upper 32bits of the physical address to reg->cmd_addr_hi */ |
1458 | if (mwifiex_write_reg(adapter, reg->cmd_addr_hi, | |
fc331460 | 1459 | (u32)((u64)cmd_buf_pa >> 32))) { |
f57c1edc YAP |
1460 | dev_err(adapter->dev, |
1461 | "Failed to write download cmd to boot code.\n"); | |
d930faee AK |
1462 | ret = -1; |
1463 | goto done; | |
1464 | } | |
1465 | ||
dd04e6ac AP |
1466 | /* Write the command length to reg->cmd_size */ |
1467 | if (mwifiex_write_reg(adapter, reg->cmd_size, | |
1468 | card->cmd_buf->len)) { | |
f57c1edc | 1469 | dev_err(adapter->dev, |
dd04e6ac | 1470 | "Failed to write cmd len to reg->cmd_size\n"); |
d930faee AK |
1471 | ret = -1; |
1472 | goto done; | |
1473 | } | |
1474 | ||
1475 | /* Ring the door bell */ | |
1476 | if (mwifiex_write_reg(adapter, PCIE_CPU_INT_EVENT, | |
1477 | CPU_INTR_DOOR_BELL)) { | |
f57c1edc YAP |
1478 | dev_err(adapter->dev, |
1479 | "Failed to assert door-bell intr\n"); | |
d930faee AK |
1480 | ret = -1; |
1481 | goto done; | |
1482 | } | |
1483 | ||
1484 | done: | |
1485 | if (ret) | |
1486 | adapter->cmd_sent = false; | |
1487 | ||
1488 | return 0; | |
1489 | } | |
1490 | ||
1491 | /* | |
1492 | * This function handles command complete interrupt | |
1493 | */ | |
1494 | static int mwifiex_pcie_process_cmd_complete(struct mwifiex_adapter *adapter) | |
1495 | { | |
1496 | struct pcie_service_card *card = adapter->card; | |
dd04e6ac | 1497 | const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; |
f57c1edc | 1498 | struct sk_buff *skb = card->cmdrsp_buf; |
d930faee | 1499 | int count = 0; |
fc331460 AP |
1500 | u16 rx_len; |
1501 | __le16 pkt_len; | |
1502 | dma_addr_t buf_pa; | |
d930faee AK |
1503 | |
1504 | dev_dbg(adapter->dev, "info: Rx CMD Response\n"); | |
1505 | ||
fc331460 AP |
1506 | MWIFIEX_SKB_PACB(skb, &buf_pa); |
1507 | pci_unmap_single(card->dev, buf_pa, MWIFIEX_UPLD_SIZE, | |
1508 | PCI_DMA_FROMDEVICE); | |
1509 | ||
1510 | pkt_len = *((__le16 *)skb->data); | |
1511 | rx_len = le16_to_cpu(pkt_len); | |
1512 | skb_trim(skb, rx_len); | |
1513 | skb_pull(skb, INTF_HEADER_LEN); | |
1514 | ||
d930faee | 1515 | if (!adapter->curr_cmd) { |
d930faee | 1516 | if (adapter->ps_state == PS_STATE_SLEEP_CFM) { |
f57c1edc YAP |
1517 | mwifiex_process_sleep_confirm_resp(adapter, skb->data, |
1518 | skb->len); | |
52301a81 AP |
1519 | while (reg->sleep_cookie && (count++ < 10) && |
1520 | mwifiex_pcie_ok_to_access_hw(adapter)) | |
e7891ba2 | 1521 | usleep_range(50, 60); |
d930faee | 1522 | } else { |
f57c1edc YAP |
1523 | dev_err(adapter->dev, |
1524 | "There is no command but got cmdrsp\n"); | |
d930faee | 1525 | } |
f57c1edc YAP |
1526 | memcpy(adapter->upld_buf, skb->data, |
1527 | min_t(u32, MWIFIEX_SIZE_OF_CMD_BUFFER, skb->len)); | |
fc331460 AP |
1528 | if (mwifiex_map_pci_memory(adapter, skb, MWIFIEX_UPLD_SIZE, |
1529 | PCI_DMA_FROMDEVICE)) | |
1530 | return -1; | |
1531 | ||
1532 | MWIFIEX_SKB_PACB(skb, &buf_pa); | |
d930faee | 1533 | } else if (mwifiex_pcie_ok_to_access_hw(adapter)) { |
f57c1edc | 1534 | adapter->curr_cmd->resp_skb = skb; |
d930faee AK |
1535 | adapter->cmd_resp_received = true; |
1536 | /* Take the pointer and set it to CMD node and will | |
1537 | return in the response complete callback */ | |
1538 | card->cmdrsp_buf = NULL; | |
1539 | ||
1540 | /* Clear the cmd-rsp buffer address in scratch registers. This | |
1541 | will prevent firmware from writing to the same response | |
1542 | buffer again. */ | |
dd04e6ac | 1543 | if (mwifiex_write_reg(adapter, reg->cmdrsp_addr_lo, 0)) { |
f57c1edc YAP |
1544 | dev_err(adapter->dev, |
1545 | "cmd_done: failed to clear cmd_rsp_addr_lo\n"); | |
d930faee AK |
1546 | return -1; |
1547 | } | |
1548 | /* Write the upper 32bits of the cmdrsp buffer physical | |
1549 | address */ | |
dd04e6ac | 1550 | if (mwifiex_write_reg(adapter, reg->cmdrsp_addr_hi, 0)) { |
f57c1edc YAP |
1551 | dev_err(adapter->dev, |
1552 | "cmd_done: failed to clear cmd_rsp_addr_hi\n"); | |
d930faee AK |
1553 | return -1; |
1554 | } | |
1555 | } | |
1556 | ||
1557 | return 0; | |
1558 | } | |
1559 | ||
1560 | /* | |
1561 | * Command Response processing complete handler | |
1562 | */ | |
1563 | static int mwifiex_pcie_cmdrsp_complete(struct mwifiex_adapter *adapter, | |
1564 | struct sk_buff *skb) | |
1565 | { | |
1566 | struct pcie_service_card *card = adapter->card; | |
fc331460 AP |
1567 | dma_addr_t buf_pa; |
1568 | struct sk_buff *skb_tmp; | |
d930faee AK |
1569 | |
1570 | if (skb) { | |
1571 | card->cmdrsp_buf = skb; | |
1572 | skb_push(card->cmdrsp_buf, INTF_HEADER_LEN); | |
fc331460 AP |
1573 | if (mwifiex_map_pci_memory(adapter, skb, MWIFIEX_UPLD_SIZE, |
1574 | PCI_DMA_FROMDEVICE)) | |
1575 | return -1; | |
1576 | } | |
1577 | ||
1578 | skb_tmp = card->cmd_buf; | |
1579 | if (skb_tmp) { | |
1580 | MWIFIEX_SKB_PACB(skb_tmp, &buf_pa); | |
1581 | pci_unmap_single(card->dev, buf_pa, MWIFIEX_UPLD_SIZE, | |
1582 | PCI_DMA_FROMDEVICE); | |
1583 | card->cmd_buf = NULL; | |
d930faee AK |
1584 | } |
1585 | ||
1586 | return 0; | |
1587 | } | |
1588 | ||
1589 | /* | |
1590 | * This function handles firmware event ready interrupt | |
1591 | */ | |
1592 | static int mwifiex_pcie_process_event_ready(struct mwifiex_adapter *adapter) | |
1593 | { | |
1594 | struct pcie_service_card *card = adapter->card; | |
dd04e6ac | 1595 | const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; |
d930faee AK |
1596 | u32 rdptr = card->evtbd_rdptr & MWIFIEX_EVTBD_MASK; |
1597 | u32 wrptr, event; | |
fc331460 | 1598 | dma_addr_t buf_pa; |
e05dc3e9 | 1599 | struct mwifiex_evt_buf_desc *desc; |
fc331460 AP |
1600 | |
1601 | if (!mwifiex_pcie_ok_to_access_hw(adapter)) | |
1602 | mwifiex_pm_wakeup_card(adapter); | |
d930faee AK |
1603 | |
1604 | if (adapter->event_received) { | |
f57c1edc YAP |
1605 | dev_dbg(adapter->dev, "info: Event being processed, " |
1606 | "do not process this interrupt just yet\n"); | |
d930faee AK |
1607 | return 0; |
1608 | } | |
1609 | ||
1610 | if (rdptr >= MWIFIEX_MAX_EVT_BD) { | |
1611 | dev_dbg(adapter->dev, "info: Invalid read pointer...\n"); | |
1612 | return -1; | |
1613 | } | |
1614 | ||
1615 | /* Read the event ring write pointer set by firmware */ | |
dd04e6ac | 1616 | if (mwifiex_read_reg(adapter, reg->evt_wrptr, &wrptr)) { |
f57c1edc | 1617 | dev_err(adapter->dev, |
dd04e6ac | 1618 | "EventReady: failed to read reg->evt_wrptr\n"); |
d930faee AK |
1619 | return -1; |
1620 | } | |
1621 | ||
1622 | dev_dbg(adapter->dev, "info: EventReady: Initial <Rd: 0x%x, Wr: 0x%x>", | |
f57c1edc YAP |
1623 | card->evtbd_rdptr, wrptr); |
1624 | if (((wrptr & MWIFIEX_EVTBD_MASK) != (card->evtbd_rdptr | |
1625 | & MWIFIEX_EVTBD_MASK)) || | |
dd04e6ac AP |
1626 | ((wrptr & reg->evt_rollover_ind) == |
1627 | (card->evtbd_rdptr & reg->evt_rollover_ind))) { | |
d930faee AK |
1628 | struct sk_buff *skb_cmd; |
1629 | __le16 data_len = 0; | |
1630 | u16 evt_len; | |
1631 | ||
1632 | dev_dbg(adapter->dev, "info: Read Index: %d\n", rdptr); | |
1633 | skb_cmd = card->evt_buf_list[rdptr]; | |
fc331460 AP |
1634 | MWIFIEX_SKB_PACB(skb_cmd, &buf_pa); |
1635 | pci_unmap_single(card->dev, buf_pa, MAX_EVENT_SIZE, | |
1636 | PCI_DMA_FROMDEVICE); | |
1637 | ||
d930faee AK |
1638 | /* Take the pointer and set it to event pointer in adapter |
1639 | and will return back after event handling callback */ | |
1640 | card->evt_buf_list[rdptr] = NULL; | |
e05dc3e9 AP |
1641 | desc = card->evtbd_ring[rdptr]; |
1642 | memset(desc, 0, sizeof(*desc)); | |
d930faee AK |
1643 | |
1644 | event = *(u32 *) &skb_cmd->data[INTF_HEADER_LEN]; | |
1645 | adapter->event_cause = event; | |
1646 | /* The first 4bytes will be the event transfer header | |
1647 | len is 2 bytes followed by type which is 2 bytes */ | |
1648 | memcpy(&data_len, skb_cmd->data, sizeof(__le16)); | |
1649 | evt_len = le16_to_cpu(data_len); | |
1650 | ||
1651 | skb_pull(skb_cmd, INTF_HEADER_LEN); | |
1652 | dev_dbg(adapter->dev, "info: Event length: %d\n", evt_len); | |
1653 | ||
1654 | if ((evt_len > 0) && (evt_len < MAX_EVENT_SIZE)) | |
1655 | memcpy(adapter->event_body, skb_cmd->data + | |
1656 | MWIFIEX_EVENT_HEADER_LEN, evt_len - | |
1657 | MWIFIEX_EVENT_HEADER_LEN); | |
1658 | ||
1659 | adapter->event_received = true; | |
1660 | adapter->event_skb = skb_cmd; | |
1661 | ||
1662 | /* Do not update the event read pointer here, wait till the | |
1663 | buffer is released. This is just to make things simpler, | |
1664 | we need to find a better method of managing these buffers. | |
1665 | */ | |
1666 | } | |
1667 | ||
1668 | return 0; | |
1669 | } | |
1670 | ||
1671 | /* | |
1672 | * Event processing complete handler | |
1673 | */ | |
1674 | static int mwifiex_pcie_event_complete(struct mwifiex_adapter *adapter, | |
1675 | struct sk_buff *skb) | |
1676 | { | |
1677 | struct pcie_service_card *card = adapter->card; | |
dd04e6ac | 1678 | const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; |
d930faee AK |
1679 | int ret = 0; |
1680 | u32 rdptr = card->evtbd_rdptr & MWIFIEX_EVTBD_MASK; | |
1681 | u32 wrptr; | |
fc331460 | 1682 | dma_addr_t buf_pa; |
e05dc3e9 | 1683 | struct mwifiex_evt_buf_desc *desc; |
d930faee AK |
1684 | |
1685 | if (!skb) | |
1686 | return 0; | |
1687 | ||
1eb54c8a | 1688 | if (rdptr >= MWIFIEX_MAX_EVT_BD) { |
d930faee | 1689 | dev_err(adapter->dev, "event_complete: Invalid rdptr 0x%x\n", |
f57c1edc | 1690 | rdptr); |
8c53e42d | 1691 | return -EINVAL; |
1eb54c8a | 1692 | } |
d930faee AK |
1693 | |
1694 | /* Read the event ring write pointer set by firmware */ | |
dd04e6ac | 1695 | if (mwifiex_read_reg(adapter, reg->evt_wrptr, &wrptr)) { |
f57c1edc | 1696 | dev_err(adapter->dev, |
dd04e6ac | 1697 | "event_complete: failed to read reg->evt_wrptr\n"); |
8c53e42d | 1698 | return -1; |
d930faee AK |
1699 | } |
1700 | ||
1701 | if (!card->evt_buf_list[rdptr]) { | |
1702 | skb_push(skb, INTF_HEADER_LEN); | |
fc331460 AP |
1703 | if (mwifiex_map_pci_memory(adapter, skb, |
1704 | MAX_EVENT_SIZE, | |
1705 | PCI_DMA_FROMDEVICE)) | |
1706 | return -1; | |
1707 | MWIFIEX_SKB_PACB(skb, &buf_pa); | |
d930faee | 1708 | card->evt_buf_list[rdptr] = skb; |
fc331460 | 1709 | MWIFIEX_SKB_PACB(skb, &buf_pa); |
e05dc3e9 AP |
1710 | desc = card->evtbd_ring[rdptr]; |
1711 | desc->paddr = buf_pa; | |
1712 | desc->len = (u16)skb->len; | |
1713 | desc->flags = 0; | |
d930faee AK |
1714 | skb = NULL; |
1715 | } else { | |
f57c1edc YAP |
1716 | dev_dbg(adapter->dev, |
1717 | "info: ERROR: buf still valid at index %d, <%p, %p>\n", | |
1718 | rdptr, card->evt_buf_list[rdptr], skb); | |
d930faee AK |
1719 | } |
1720 | ||
1721 | if ((++card->evtbd_rdptr & MWIFIEX_EVTBD_MASK) == MWIFIEX_MAX_EVT_BD) { | |
1722 | card->evtbd_rdptr = ((card->evtbd_rdptr & | |
dd04e6ac AP |
1723 | reg->evt_rollover_ind) ^ |
1724 | reg->evt_rollover_ind); | |
d930faee AK |
1725 | } |
1726 | ||
1727 | dev_dbg(adapter->dev, "info: Updated <Rd: 0x%x, Wr: 0x%x>", | |
f57c1edc | 1728 | card->evtbd_rdptr, wrptr); |
d930faee | 1729 | |
dd04e6ac AP |
1730 | /* Write the event ring read pointer in to reg->evt_rdptr */ |
1731 | if (mwifiex_write_reg(adapter, reg->evt_rdptr, | |
1732 | card->evtbd_rdptr)) { | |
f57c1edc | 1733 | dev_err(adapter->dev, |
dd04e6ac | 1734 | "event_complete: failed to read reg->evt_rdptr\n"); |
8c53e42d | 1735 | return -1; |
d930faee AK |
1736 | } |
1737 | ||
d930faee AK |
1738 | dev_dbg(adapter->dev, "info: Check Events Again\n"); |
1739 | ret = mwifiex_pcie_process_event_ready(adapter); | |
1740 | ||
1741 | return ret; | |
1742 | } | |
1743 | ||
1744 | /* | |
1745 | * This function downloads the firmware to the card. | |
1746 | * | |
1747 | * Firmware is downloaded to the card in blocks. Every block download | |
1748 | * is tested for CRC errors, and retried a number of times before | |
1749 | * returning failure. | |
1750 | */ | |
1751 | static int mwifiex_prog_fw_w_helper(struct mwifiex_adapter *adapter, | |
1752 | struct mwifiex_fw_image *fw) | |
1753 | { | |
1754 | int ret; | |
1755 | u8 *firmware = fw->fw_buf; | |
1756 | u32 firmware_len = fw->fw_len; | |
1757 | u32 offset = 0; | |
1758 | struct sk_buff *skb; | |
1759 | u32 txlen, tx_blocks = 0, tries, len; | |
1760 | u32 block_retry_cnt = 0; | |
fc331460 AP |
1761 | dma_addr_t buf_pa; |
1762 | struct pcie_service_card *card = adapter->card; | |
dd04e6ac | 1763 | const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; |
d930faee AK |
1764 | |
1765 | if (!firmware || !firmware_len) { | |
f57c1edc YAP |
1766 | dev_err(adapter->dev, |
1767 | "No firmware image found! Terminating download\n"); | |
d930faee AK |
1768 | return -1; |
1769 | } | |
1770 | ||
1771 | dev_dbg(adapter->dev, "info: Downloading FW image (%d bytes)\n", | |
f57c1edc | 1772 | firmware_len); |
d930faee AK |
1773 | |
1774 | if (mwifiex_pcie_disable_host_int(adapter)) { | |
f57c1edc YAP |
1775 | dev_err(adapter->dev, |
1776 | "%s: Disabling interrupts failed.\n", __func__); | |
d930faee AK |
1777 | return -1; |
1778 | } | |
1779 | ||
1780 | skb = dev_alloc_skb(MWIFIEX_UPLD_SIZE); | |
1781 | if (!skb) { | |
1782 | ret = -ENOMEM; | |
1783 | goto done; | |
1784 | } | |
d930faee AK |
1785 | |
1786 | /* Perform firmware data transfer */ | |
1787 | do { | |
1788 | u32 ireg_intr = 0; | |
1789 | ||
1790 | /* More data? */ | |
1791 | if (offset >= firmware_len) | |
1792 | break; | |
1793 | ||
1794 | for (tries = 0; tries < MAX_POLL_TRIES; tries++) { | |
dd04e6ac | 1795 | ret = mwifiex_read_reg(adapter, reg->cmd_size, |
d930faee AK |
1796 | &len); |
1797 | if (ret) { | |
f57c1edc YAP |
1798 | dev_warn(adapter->dev, |
1799 | "Failed reading len from boot code\n"); | |
d930faee AK |
1800 | goto done; |
1801 | } | |
1802 | if (len) | |
1803 | break; | |
e7891ba2 | 1804 | usleep_range(10, 20); |
d930faee AK |
1805 | } |
1806 | ||
1807 | if (!len) { | |
1808 | break; | |
1809 | } else if (len > MWIFIEX_UPLD_SIZE) { | |
1810 | pr_err("FW download failure @ %d, invalid length %d\n", | |
f57c1edc | 1811 | offset, len); |
d930faee AK |
1812 | ret = -1; |
1813 | goto done; | |
1814 | } | |
1815 | ||
1816 | txlen = len; | |
1817 | ||
1818 | if (len & BIT(0)) { | |
1819 | block_retry_cnt++; | |
1820 | if (block_retry_cnt > MAX_WRITE_IOMEM_RETRY) { | |
1821 | pr_err("FW download failure @ %d, over max " | |
1822 | "retry count\n", offset); | |
1823 | ret = -1; | |
1824 | goto done; | |
1825 | } | |
1826 | dev_err(adapter->dev, "FW CRC error indicated by the " | |
f57c1edc YAP |
1827 | "helper: len = 0x%04X, txlen = %d\n", |
1828 | len, txlen); | |
d930faee AK |
1829 | len &= ~BIT(0); |
1830 | /* Setting this to 0 to resend from same offset */ | |
1831 | txlen = 0; | |
1832 | } else { | |
1833 | block_retry_cnt = 0; | |
1834 | /* Set blocksize to transfer - checking for | |
1835 | last block */ | |
1836 | if (firmware_len - offset < txlen) | |
1837 | txlen = firmware_len - offset; | |
1838 | ||
1839 | dev_dbg(adapter->dev, "."); | |
1840 | ||
dd04e6ac AP |
1841 | tx_blocks = (txlen + card->pcie.blksz_fw_dl - 1) / |
1842 | card->pcie.blksz_fw_dl; | |
d930faee AK |
1843 | |
1844 | /* Copy payload to buffer */ | |
1845 | memmove(skb->data, &firmware[offset], txlen); | |
1846 | } | |
1847 | ||
1848 | skb_put(skb, MWIFIEX_UPLD_SIZE - skb->len); | |
dd04e6ac | 1849 | skb_trim(skb, tx_blocks * card->pcie.blksz_fw_dl); |
d930faee AK |
1850 | |
1851 | /* Send the boot command to device */ | |
1852 | if (mwifiex_pcie_send_boot_cmd(adapter, skb)) { | |
f57c1edc YAP |
1853 | dev_err(adapter->dev, |
1854 | "Failed to send firmware download command\n"); | |
d930faee AK |
1855 | ret = -1; |
1856 | goto done; | |
1857 | } | |
fc331460 AP |
1858 | |
1859 | MWIFIEX_SKB_PACB(skb, &buf_pa); | |
1860 | ||
d930faee AK |
1861 | /* Wait for the command done interrupt */ |
1862 | do { | |
1863 | if (mwifiex_read_reg(adapter, PCIE_CPU_INT_STATUS, | |
1864 | &ireg_intr)) { | |
1865 | dev_err(adapter->dev, "%s: Failed to read " | |
f57c1edc YAP |
1866 | "interrupt status during fw dnld.\n", |
1867 | __func__); | |
fc331460 AP |
1868 | pci_unmap_single(card->dev, buf_pa, skb->len, |
1869 | PCI_DMA_TODEVICE); | |
d930faee AK |
1870 | ret = -1; |
1871 | goto done; | |
1872 | } | |
1873 | } while ((ireg_intr & CPU_INTR_DOOR_BELL) == | |
1874 | CPU_INTR_DOOR_BELL); | |
fc331460 AP |
1875 | |
1876 | pci_unmap_single(card->dev, buf_pa, skb->len, | |
1877 | PCI_DMA_TODEVICE); | |
1878 | ||
d930faee AK |
1879 | offset += txlen; |
1880 | } while (true); | |
1881 | ||
1882 | dev_dbg(adapter->dev, "info:\nFW download over, size %d bytes\n", | |
f57c1edc | 1883 | offset); |
d930faee AK |
1884 | |
1885 | ret = 0; | |
1886 | ||
1887 | done: | |
1888 | dev_kfree_skb_any(skb); | |
1889 | return ret; | |
1890 | } | |
1891 | ||
1892 | /* | |
1893 | * This function checks the firmware status in card. | |
1894 | * | |
1895 | * The winner interface is also determined by this function. | |
1896 | */ | |
1897 | static int | |
1898 | mwifiex_check_fw_status(struct mwifiex_adapter *adapter, u32 poll_num) | |
1899 | { | |
1900 | int ret = 0; | |
1901 | u32 firmware_stat, winner_status; | |
dd04e6ac AP |
1902 | struct pcie_service_card *card = adapter->card; |
1903 | const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; | |
d930faee AK |
1904 | u32 tries; |
1905 | ||
1906 | /* Mask spurios interrupts */ | |
1907 | if (mwifiex_write_reg(adapter, PCIE_HOST_INT_STATUS_MASK, | |
f57c1edc | 1908 | HOST_INTR_MASK)) { |
d930faee AK |
1909 | dev_warn(adapter->dev, "Write register failed\n"); |
1910 | return -1; | |
1911 | } | |
1912 | ||
1913 | dev_dbg(adapter->dev, "Setting driver ready signature\n"); | |
dd04e6ac AP |
1914 | if (mwifiex_write_reg(adapter, reg->drv_rdy, |
1915 | FIRMWARE_READY_PCIE)) { | |
f57c1edc YAP |
1916 | dev_err(adapter->dev, |
1917 | "Failed to write driver ready signature\n"); | |
d930faee AK |
1918 | return -1; |
1919 | } | |
1920 | ||
1921 | /* Wait for firmware initialization event */ | |
1922 | for (tries = 0; tries < poll_num; tries++) { | |
dd04e6ac | 1923 | if (mwifiex_read_reg(adapter, reg->fw_status, |
d930faee AK |
1924 | &firmware_stat)) |
1925 | ret = -1; | |
1926 | else | |
1927 | ret = 0; | |
1928 | if (ret) | |
1929 | continue; | |
1930 | if (firmware_stat == FIRMWARE_READY_PCIE) { | |
1931 | ret = 0; | |
1932 | break; | |
1933 | } else { | |
1934 | mdelay(100); | |
1935 | ret = -1; | |
1936 | } | |
1937 | } | |
1938 | ||
1939 | if (ret) { | |
dd04e6ac | 1940 | if (mwifiex_read_reg(adapter, reg->fw_status, |
d930faee AK |
1941 | &winner_status)) |
1942 | ret = -1; | |
1943 | else if (!winner_status) { | |
1944 | dev_err(adapter->dev, "PCI-E is the winner\n"); | |
1945 | adapter->winner = 1; | |
1946 | ret = -1; | |
1947 | } else { | |
f57c1edc YAP |
1948 | dev_err(adapter->dev, |
1949 | "PCI-E is not the winner <%#x,%d>, exit dnld\n", | |
1950 | ret, adapter->winner); | |
d930faee AK |
1951 | ret = 0; |
1952 | } | |
1953 | } | |
1954 | ||
1955 | return ret; | |
1956 | } | |
1957 | ||
1958 | /* | |
1959 | * This function reads the interrupt status from card. | |
1960 | */ | |
1961 | static void mwifiex_interrupt_status(struct mwifiex_adapter *adapter) | |
1962 | { | |
1963 | u32 pcie_ireg; | |
1964 | unsigned long flags; | |
1965 | ||
1966 | if (!mwifiex_pcie_ok_to_access_hw(adapter)) | |
1967 | return; | |
1968 | ||
1969 | if (mwifiex_read_reg(adapter, PCIE_HOST_INT_STATUS, &pcie_ireg)) { | |
1970 | dev_warn(adapter->dev, "Read register failed\n"); | |
1971 | return; | |
1972 | } | |
1973 | ||
1974 | if ((pcie_ireg != 0xFFFFFFFF) && (pcie_ireg)) { | |
1975 | ||
1976 | mwifiex_pcie_disable_host_int(adapter); | |
1977 | ||
1978 | /* Clear the pending interrupts */ | |
1979 | if (mwifiex_write_reg(adapter, PCIE_HOST_INT_STATUS, | |
1980 | ~pcie_ireg)) { | |
1981 | dev_warn(adapter->dev, "Write register failed\n"); | |
1982 | return; | |
1983 | } | |
1984 | spin_lock_irqsave(&adapter->int_lock, flags); | |
1985 | adapter->int_status |= pcie_ireg; | |
1986 | spin_unlock_irqrestore(&adapter->int_lock, flags); | |
1987 | ||
1988 | if (pcie_ireg & HOST_INTR_CMD_DONE) { | |
1989 | if ((adapter->ps_state == PS_STATE_SLEEP_CFM) || | |
1990 | (adapter->ps_state == PS_STATE_SLEEP)) { | |
1991 | mwifiex_pcie_enable_host_int(adapter); | |
1992 | if (mwifiex_write_reg(adapter, | |
f57c1edc YAP |
1993 | PCIE_CPU_INT_EVENT, |
1994 | CPU_INTR_SLEEP_CFM_DONE) | |
1995 | ) { | |
1996 | dev_warn(adapter->dev, | |
1997 | "Write register failed\n"); | |
d930faee AK |
1998 | return; |
1999 | ||
2000 | } | |
2001 | } | |
2002 | } else if (!adapter->pps_uapsd_mode && | |
2003 | adapter->ps_state == PS_STATE_SLEEP) { | |
2004 | /* Potentially for PCIe we could get other | |
2005 | * interrupts like shared. Don't change power | |
2006 | * state until cookie is set */ | |
2007 | if (mwifiex_pcie_ok_to_access_hw(adapter)) | |
2008 | adapter->ps_state = PS_STATE_AWAKE; | |
2009 | } | |
2010 | } | |
2011 | } | |
2012 | ||
2013 | /* | |
2014 | * Interrupt handler for PCIe root port | |
2015 | * | |
2016 | * This function reads the interrupt status from firmware and assigns | |
2017 | * the main process in workqueue which will handle the interrupt. | |
2018 | */ | |
2019 | static irqreturn_t mwifiex_pcie_interrupt(int irq, void *context) | |
2020 | { | |
2021 | struct pci_dev *pdev = (struct pci_dev *)context; | |
2022 | struct pcie_service_card *card; | |
2023 | struct mwifiex_adapter *adapter; | |
2024 | ||
2025 | if (!pdev) { | |
2026 | pr_debug("info: %s: pdev is NULL\n", (u8 *)pdev); | |
2027 | goto exit; | |
2028 | } | |
2029 | ||
2030 | card = (struct pcie_service_card *) pci_get_drvdata(pdev); | |
2031 | if (!card || !card->adapter) { | |
2032 | pr_debug("info: %s: card=%p adapter=%p\n", __func__, card, | |
f57c1edc | 2033 | card ? card->adapter : NULL); |
d930faee AK |
2034 | goto exit; |
2035 | } | |
2036 | adapter = card->adapter; | |
2037 | ||
2038 | if (adapter->surprise_removed) | |
2039 | goto exit; | |
2040 | ||
2041 | mwifiex_interrupt_status(adapter); | |
2042 | queue_work(adapter->workqueue, &adapter->main_work); | |
2043 | ||
2044 | exit: | |
2045 | return IRQ_HANDLED; | |
2046 | } | |
2047 | ||
2048 | /* | |
2049 | * This function checks the current interrupt status. | |
2050 | * | |
2051 | * The following interrupts are checked and handled by this function - | |
2052 | * - Data sent | |
2053 | * - Command sent | |
2054 | * - Command received | |
2055 | * - Packets received | |
2056 | * - Events received | |
2057 | * | |
2058 | * In case of Rx packets received, the packets are uploaded from card to | |
2059 | * host and processed accordingly. | |
2060 | */ | |
2061 | static int mwifiex_process_int_status(struct mwifiex_adapter *adapter) | |
2062 | { | |
2063 | int ret; | |
659c4788 | 2064 | u32 pcie_ireg; |
d930faee AK |
2065 | unsigned long flags; |
2066 | ||
2067 | spin_lock_irqsave(&adapter->int_lock, flags); | |
2068 | /* Clear out unused interrupts */ | |
659c4788 AP |
2069 | pcie_ireg = adapter->int_status; |
2070 | adapter->int_status = 0; | |
d930faee AK |
2071 | spin_unlock_irqrestore(&adapter->int_lock, flags); |
2072 | ||
659c4788 AP |
2073 | while (pcie_ireg & HOST_INTR_MASK) { |
2074 | if (pcie_ireg & HOST_INTR_DNLD_DONE) { | |
2075 | pcie_ireg &= ~HOST_INTR_DNLD_DONE; | |
e7f767a7 AP |
2076 | dev_dbg(adapter->dev, "info: TX DNLD Done\n"); |
2077 | ret = mwifiex_pcie_send_data_complete(adapter); | |
2078 | if (ret) | |
2079 | return ret; | |
d930faee | 2080 | } |
659c4788 AP |
2081 | if (pcie_ireg & HOST_INTR_UPLD_RDY) { |
2082 | pcie_ireg &= ~HOST_INTR_UPLD_RDY; | |
d930faee AK |
2083 | dev_dbg(adapter->dev, "info: Rx DATA\n"); |
2084 | ret = mwifiex_pcie_process_recv_data(adapter); | |
2085 | if (ret) | |
2086 | return ret; | |
2087 | } | |
659c4788 AP |
2088 | if (pcie_ireg & HOST_INTR_EVENT_RDY) { |
2089 | pcie_ireg &= ~HOST_INTR_EVENT_RDY; | |
d930faee AK |
2090 | dev_dbg(adapter->dev, "info: Rx EVENT\n"); |
2091 | ret = mwifiex_pcie_process_event_ready(adapter); | |
2092 | if (ret) | |
2093 | return ret; | |
2094 | } | |
2095 | ||
659c4788 AP |
2096 | if (pcie_ireg & HOST_INTR_CMD_DONE) { |
2097 | pcie_ireg &= ~HOST_INTR_CMD_DONE; | |
d930faee | 2098 | if (adapter->cmd_sent) { |
f57c1edc YAP |
2099 | dev_dbg(adapter->dev, |
2100 | "info: CMD sent Interrupt\n"); | |
d930faee AK |
2101 | adapter->cmd_sent = false; |
2102 | } | |
2103 | /* Handle command response */ | |
2104 | ret = mwifiex_pcie_process_cmd_complete(adapter); | |
2105 | if (ret) | |
2106 | return ret; | |
2107 | } | |
2108 | ||
2109 | if (mwifiex_pcie_ok_to_access_hw(adapter)) { | |
2110 | if (mwifiex_read_reg(adapter, PCIE_HOST_INT_STATUS, | |
2111 | &pcie_ireg)) { | |
f57c1edc YAP |
2112 | dev_warn(adapter->dev, |
2113 | "Read register failed\n"); | |
d930faee AK |
2114 | return -1; |
2115 | } | |
2116 | ||
2117 | if ((pcie_ireg != 0xFFFFFFFF) && (pcie_ireg)) { | |
2118 | if (mwifiex_write_reg(adapter, | |
f57c1edc YAP |
2119 | PCIE_HOST_INT_STATUS, |
2120 | ~pcie_ireg)) { | |
2121 | dev_warn(adapter->dev, | |
2122 | "Write register failed\n"); | |
d930faee AK |
2123 | return -1; |
2124 | } | |
d930faee AK |
2125 | } |
2126 | ||
2127 | } | |
2128 | } | |
2129 | dev_dbg(adapter->dev, "info: cmd_sent=%d data_sent=%d\n", | |
f57c1edc | 2130 | adapter->cmd_sent, adapter->data_sent); |
d930faee AK |
2131 | mwifiex_pcie_enable_host_int(adapter); |
2132 | ||
2133 | return 0; | |
2134 | } | |
2135 | ||
2136 | /* | |
2137 | * This function downloads data from driver to card. | |
2138 | * | |
2139 | * Both commands and data packets are transferred to the card by this | |
2140 | * function. | |
2141 | * | |
2142 | * This function adds the PCIE specific header to the front of the buffer | |
2143 | * before transferring. The header contains the length of the packet and | |
2144 | * the type. The firmware handles the packets based upon this set type. | |
2145 | */ | |
2146 | static int mwifiex_pcie_host_to_card(struct mwifiex_adapter *adapter, u8 type, | |
2147 | struct sk_buff *skb, | |
2148 | struct mwifiex_tx_param *tx_param) | |
2149 | { | |
fa161cb7 DC |
2150 | if (!skb) { |
2151 | dev_err(adapter->dev, "Passed NULL skb to %s\n", __func__); | |
d930faee AK |
2152 | return -1; |
2153 | } | |
2154 | ||
2155 | if (type == MWIFIEX_TYPE_DATA) | |
e7f767a7 | 2156 | return mwifiex_pcie_send_data(adapter, skb, tx_param); |
d930faee AK |
2157 | else if (type == MWIFIEX_TYPE_CMD) |
2158 | return mwifiex_pcie_send_cmd(adapter, skb); | |
2159 | ||
2160 | return 0; | |
2161 | } | |
2162 | ||
2163 | /* | |
2164 | * This function initializes the PCI-E host memory space, WCB rings, etc. | |
2165 | * | |
2166 | * The following initializations steps are followed - | |
2167 | * - Allocate TXBD ring buffers | |
2168 | * - Allocate RXBD ring buffers | |
2169 | * - Allocate event BD ring buffers | |
2170 | * - Allocate command response ring buffer | |
2171 | * - Allocate sleep cookie buffer | |
2172 | */ | |
2173 | static int mwifiex_pcie_init(struct mwifiex_adapter *adapter) | |
2174 | { | |
2175 | struct pcie_service_card *card = adapter->card; | |
2176 | int ret; | |
2177 | struct pci_dev *pdev = card->dev; | |
52301a81 | 2178 | const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; |
d930faee AK |
2179 | |
2180 | pci_set_drvdata(pdev, card); | |
2181 | ||
2182 | ret = pci_enable_device(pdev); | |
2183 | if (ret) | |
2184 | goto err_enable_dev; | |
2185 | ||
2186 | pci_set_master(pdev); | |
2187 | ||
2188 | dev_dbg(adapter->dev, "try set_consistent_dma_mask(32)\n"); | |
2189 | ret = pci_set_dma_mask(pdev, DMA_BIT_MASK(32)); | |
2190 | if (ret) { | |
2191 | dev_err(adapter->dev, "set_dma_mask(32) failed\n"); | |
2192 | goto err_set_dma_mask; | |
2193 | } | |
2194 | ||
2195 | ret = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)); | |
2196 | if (ret) { | |
2197 | dev_err(adapter->dev, "set_consistent_dma_mask(64) failed\n"); | |
2198 | goto err_set_dma_mask; | |
2199 | } | |
2200 | ||
2201 | ret = pci_request_region(pdev, 0, DRV_NAME); | |
2202 | if (ret) { | |
2203 | dev_err(adapter->dev, "req_reg(0) error\n"); | |
2204 | goto err_req_region0; | |
2205 | } | |
2206 | card->pci_mmap = pci_iomap(pdev, 0, 0); | |
2207 | if (!card->pci_mmap) { | |
2208 | dev_err(adapter->dev, "iomap(0) error\n"); | |
3220712d | 2209 | ret = -EIO; |
d930faee AK |
2210 | goto err_iomap0; |
2211 | } | |
2212 | ret = pci_request_region(pdev, 2, DRV_NAME); | |
2213 | if (ret) { | |
2214 | dev_err(adapter->dev, "req_reg(2) error\n"); | |
2215 | goto err_req_region2; | |
2216 | } | |
2217 | card->pci_mmap1 = pci_iomap(pdev, 2, 0); | |
2218 | if (!card->pci_mmap1) { | |
2219 | dev_err(adapter->dev, "iomap(2) error\n"); | |
3220712d | 2220 | ret = -EIO; |
d930faee AK |
2221 | goto err_iomap2; |
2222 | } | |
2223 | ||
f57c1edc YAP |
2224 | dev_dbg(adapter->dev, |
2225 | "PCI memory map Virt0: %p PCI memory map Virt2: %p\n", | |
2226 | card->pci_mmap, card->pci_mmap1); | |
d930faee AK |
2227 | |
2228 | card->cmdrsp_buf = NULL; | |
2229 | ret = mwifiex_pcie_create_txbd_ring(adapter); | |
2230 | if (ret) | |
2231 | goto err_cre_txbd; | |
2232 | ret = mwifiex_pcie_create_rxbd_ring(adapter); | |
2233 | if (ret) | |
2234 | goto err_cre_rxbd; | |
2235 | ret = mwifiex_pcie_create_evtbd_ring(adapter); | |
2236 | if (ret) | |
2237 | goto err_cre_evtbd; | |
2238 | ret = mwifiex_pcie_alloc_cmdrsp_buf(adapter); | |
2239 | if (ret) | |
2240 | goto err_alloc_cmdbuf; | |
52301a81 AP |
2241 | if (reg->sleep_cookie) { |
2242 | ret = mwifiex_pcie_alloc_sleep_cookie_buf(adapter); | |
2243 | if (ret) | |
2244 | goto err_alloc_cookie; | |
2245 | } else { | |
2246 | card->sleep_cookie_vbase = NULL; | |
2247 | } | |
d930faee AK |
2248 | return ret; |
2249 | ||
2250 | err_alloc_cookie: | |
2251 | mwifiex_pcie_delete_cmdrsp_buf(adapter); | |
2252 | err_alloc_cmdbuf: | |
2253 | mwifiex_pcie_delete_evtbd_ring(adapter); | |
2254 | err_cre_evtbd: | |
2255 | mwifiex_pcie_delete_rxbd_ring(adapter); | |
2256 | err_cre_rxbd: | |
2257 | mwifiex_pcie_delete_txbd_ring(adapter); | |
2258 | err_cre_txbd: | |
2259 | pci_iounmap(pdev, card->pci_mmap1); | |
2260 | err_iomap2: | |
2261 | pci_release_region(pdev, 2); | |
2262 | err_req_region2: | |
2263 | pci_iounmap(pdev, card->pci_mmap); | |
2264 | err_iomap0: | |
2265 | pci_release_region(pdev, 0); | |
2266 | err_req_region0: | |
2267 | err_set_dma_mask: | |
2268 | pci_disable_device(pdev); | |
2269 | err_enable_dev: | |
2270 | pci_set_drvdata(pdev, NULL); | |
2271 | return ret; | |
2272 | } | |
2273 | ||
2274 | /* | |
2275 | * This function cleans up the allocated card buffers. | |
2276 | * | |
2277 | * The following are freed by this function - | |
2278 | * - TXBD ring buffers | |
2279 | * - RXBD ring buffers | |
2280 | * - Event BD ring buffers | |
2281 | * - Command response ring buffer | |
2282 | * - Sleep cookie buffer | |
2283 | */ | |
2284 | static void mwifiex_pcie_cleanup(struct mwifiex_adapter *adapter) | |
2285 | { | |
2286 | struct pcie_service_card *card = adapter->card; | |
2287 | struct pci_dev *pdev = card->dev; | |
dd04e6ac | 2288 | const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; |
d930faee | 2289 | |
d930faee | 2290 | if (user_rmmod) { |
fc331460 | 2291 | dev_dbg(adapter->dev, "Clearing driver ready signature\n"); |
dd04e6ac | 2292 | if (mwifiex_write_reg(adapter, reg->drv_rdy, 0x00000000)) |
f57c1edc YAP |
2293 | dev_err(adapter->dev, |
2294 | "Failed to write driver not-ready signature\n"); | |
d930faee AK |
2295 | } |
2296 | ||
2297 | if (pdev) { | |
2298 | pci_iounmap(pdev, card->pci_mmap); | |
2299 | pci_iounmap(pdev, card->pci_mmap1); | |
2300 | ||
2301 | pci_release_regions(pdev); | |
2302 | pci_disable_device(pdev); | |
2303 | pci_set_drvdata(pdev, NULL); | |
2304 | } | |
2305 | } | |
2306 | ||
2307 | /* | |
2308 | * This function registers the PCIE device. | |
2309 | * | |
2310 | * PCIE IRQ is claimed, block size is set and driver data is initialized. | |
2311 | */ | |
2312 | static int mwifiex_register_dev(struct mwifiex_adapter *adapter) | |
2313 | { | |
2314 | int ret; | |
2315 | struct pcie_service_card *card = adapter->card; | |
2316 | struct pci_dev *pdev = card->dev; | |
2317 | ||
2318 | /* save adapter pointer in card */ | |
2319 | card->adapter = adapter; | |
2320 | ||
2321 | ret = request_irq(pdev->irq, mwifiex_pcie_interrupt, IRQF_SHARED, | |
2322 | "MRVL_PCIE", pdev); | |
2323 | if (ret) { | |
2324 | pr_err("request_irq failed: ret=%d\n", ret); | |
2325 | adapter->card = NULL; | |
2326 | return -1; | |
2327 | } | |
2328 | ||
2329 | adapter->dev = &pdev->dev; | |
dd04e6ac | 2330 | strcpy(adapter->fw_name, card->pcie.firmware); |
d930faee AK |
2331 | |
2332 | return 0; | |
2333 | } | |
2334 | ||
2335 | /* | |
2336 | * This function unregisters the PCIE device. | |
2337 | * | |
2338 | * The PCIE IRQ is released, the function is disabled and driver | |
2339 | * data is set to null. | |
2340 | */ | |
2341 | static void mwifiex_unregister_dev(struct mwifiex_adapter *adapter) | |
2342 | { | |
2343 | struct pcie_service_card *card = adapter->card; | |
52301a81 | 2344 | const struct mwifiex_pcie_card_reg *reg; |
d930faee AK |
2345 | |
2346 | if (card) { | |
2347 | dev_dbg(adapter->dev, "%s(): calling free_irq()\n", __func__); | |
2348 | free_irq(card->dev->irq, card->dev); | |
fc331460 | 2349 | |
52301a81 AP |
2350 | reg = card->pcie.reg; |
2351 | if (reg->sleep_cookie) | |
2352 | mwifiex_pcie_delete_sleep_cookie_buf(adapter); | |
2353 | ||
fc331460 AP |
2354 | mwifiex_pcie_delete_cmdrsp_buf(adapter); |
2355 | mwifiex_pcie_delete_evtbd_ring(adapter); | |
2356 | mwifiex_pcie_delete_rxbd_ring(adapter); | |
2357 | mwifiex_pcie_delete_txbd_ring(adapter); | |
2358 | card->cmdrsp_buf = NULL; | |
d930faee AK |
2359 | } |
2360 | } | |
2361 | ||
2362 | static struct mwifiex_if_ops pcie_ops = { | |
2363 | .init_if = mwifiex_pcie_init, | |
2364 | .cleanup_if = mwifiex_pcie_cleanup, | |
2365 | .check_fw_status = mwifiex_check_fw_status, | |
2366 | .prog_fw = mwifiex_prog_fw_w_helper, | |
2367 | .register_dev = mwifiex_register_dev, | |
2368 | .unregister_dev = mwifiex_unregister_dev, | |
2369 | .enable_int = mwifiex_pcie_enable_host_int, | |
2370 | .process_int_status = mwifiex_process_int_status, | |
2371 | .host_to_card = mwifiex_pcie_host_to_card, | |
2372 | .wakeup = mwifiex_pm_wakeup_card, | |
2373 | .wakeup_complete = mwifiex_pm_wakeup_card_complete, | |
2374 | ||
2375 | /* PCIE specific */ | |
2376 | .cmdrsp_complete = mwifiex_pcie_cmdrsp_complete, | |
2377 | .event_complete = mwifiex_pcie_event_complete, | |
2378 | .update_mp_end_port = NULL, | |
2379 | .cleanup_mpa_buf = NULL, | |
c6d1d87a | 2380 | .init_fw_port = mwifiex_pcie_init_fw_port, |
fbd7e7ac | 2381 | .clean_pcie_ring = mwifiex_clean_pcie_ring_buf, |
d930faee AK |
2382 | }; |
2383 | ||
2384 | /* | |
2385 | * This function initializes the PCIE driver module. | |
2386 | * | |
2387 | * This initiates the semaphore and registers the device with | |
2388 | * PCIE bus. | |
2389 | */ | |
2390 | static int mwifiex_pcie_init_module(void) | |
2391 | { | |
2392 | int ret; | |
2393 | ||
ca8f2112 | 2394 | pr_debug("Marvell PCIe Driver\n"); |
d930faee AK |
2395 | |
2396 | sema_init(&add_remove_card_sem, 1); | |
2397 | ||
2398 | /* Clear the flag in case user removes the card. */ | |
2399 | user_rmmod = 0; | |
2400 | ||
2401 | ret = pci_register_driver(&mwifiex_pcie); | |
2402 | if (ret) | |
2403 | pr_err("Driver register failed!\n"); | |
2404 | else | |
2405 | pr_debug("info: Driver registered successfully!\n"); | |
2406 | ||
2407 | return ret; | |
2408 | } | |
2409 | ||
2410 | /* | |
2411 | * This function cleans up the PCIE driver. | |
2412 | * | |
2413 | * The following major steps are followed for cleanup - | |
2414 | * - Resume the device if its suspended | |
2415 | * - Disconnect the device if connected | |
2416 | * - Shutdown the firmware | |
2417 | * - Unregister the device from PCIE bus. | |
2418 | */ | |
2419 | static void mwifiex_pcie_cleanup_module(void) | |
2420 | { | |
2421 | if (!down_interruptible(&add_remove_card_sem)) | |
2422 | up(&add_remove_card_sem); | |
2423 | ||
2424 | /* Set the flag as user is removing this module. */ | |
2425 | user_rmmod = 1; | |
2426 | ||
2427 | pci_unregister_driver(&mwifiex_pcie); | |
2428 | } | |
2429 | ||
2430 | module_init(mwifiex_pcie_init_module); | |
2431 | module_exit(mwifiex_pcie_cleanup_module); | |
2432 | ||
2433 | MODULE_AUTHOR("Marvell International Ltd."); | |
2434 | MODULE_DESCRIPTION("Marvell WiFi-Ex PCI-Express Driver version " PCIE_VERSION); | |
2435 | MODULE_VERSION(PCIE_VERSION); | |
2436 | MODULE_LICENSE("GPL v2"); | |
ca8f2112 AP |
2437 | MODULE_FIRMWARE(PCIE8766_DEFAULT_FW_NAME); |
2438 | MODULE_FIRMWARE(PCIE8897_DEFAULT_FW_NAME); |