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21e4b072 LF |
1 | /****************************************************************************** |
2 | * | |
3 | * Copyright(c) 2009-2010 Realtek Corporation. | |
4 | * | |
5 | * This program is free software; you can redistribute it and/or modify it | |
6 | * under the terms of version 2 of the GNU General Public License as | |
7 | * published by the Free Software Foundation. | |
8 | * | |
9 | * This program is distributed in the hope that it will be useful, but WITHOUT | |
10 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
11 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | |
12 | * more details. | |
13 | * | |
14 | * The full GNU General Public License is included in this distribution in the | |
15 | * file called LICENSE. | |
16 | * | |
17 | * Contact Information: | |
18 | * wlanfae <wlanfae@realtek.com> | |
19 | * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park, | |
20 | * Hsinchu 300, Taiwan. | |
21 | * | |
22 | * Larry Finger <Larry.Finger@lwfinger.net> | |
23 | * | |
24 | *****************************************************************************/ | |
25 | ||
26 | #include "../wifi.h" | |
27 | #include "../core.h" | |
28 | #include "../pci.h" | |
29 | #include "reg.h" | |
30 | #include "def.h" | |
31 | #include "phy.h" | |
32 | #include "dm.h" | |
33 | #include "hw.h" | |
34 | #include "fw.h" | |
35 | #include "sw.h" | |
36 | #include "trx.h" | |
37 | #include "led.h" | |
38 | #include "table.h" | |
39 | #include "../btcoexist/rtl_btc.h" | |
40 | ||
41 | #include <linux/vmalloc.h> | |
42 | #include <linux/module.h> | |
43 | ||
44 | static void rtl8821ae_init_aspm_vars(struct ieee80211_hw *hw) | |
45 | { | |
46 | struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw)); | |
47 | ||
48 | /*close ASPM for AMD defaultly */ | |
49 | rtlpci->const_amdpci_aspm = 0; | |
50 | ||
51 | /** | |
52 | * ASPM PS mode. | |
53 | * 0 - Disable ASPM, | |
54 | * 1 - Enable ASPM without Clock Req, | |
55 | * 2 - Enable ASPM with Clock Req, | |
56 | * 3 - Alwyas Enable ASPM with Clock Req, | |
57 | * 4 - Always Enable ASPM without Clock Req. | |
58 | * set defult to RTL8192CE:3 RTL8192E:2 | |
59 | */ | |
60 | rtlpci->const_pci_aspm = 3; | |
61 | ||
62 | /*Setting for PCI-E device */ | |
63 | rtlpci->const_devicepci_aspm_setting = 0x03; | |
64 | ||
65 | /*Setting for PCI-E bridge */ | |
66 | rtlpci->const_hostpci_aspm_setting = 0x02; | |
67 | ||
68 | /** | |
69 | * In Hw/Sw Radio Off situation. | |
70 | * 0 - Default, | |
71 | * 1 - From ASPM setting without low Mac Pwr, | |
72 | * 2 - From ASPM setting with low Mac Pwr, | |
73 | * 3 - Bus D3 | |
74 | * set default to RTL8192CE:0 RTL8192SE:2 | |
75 | */ | |
76 | rtlpci->const_hwsw_rfoff_d3 = 0; | |
77 | ||
78 | /** | |
79 | * This setting works for those device with | |
80 | * backdoor ASPM setting such as EPHY setting. | |
81 | * 0 - Not support ASPM, | |
82 | * 1 - Support ASPM, | |
83 | * 2 - According to chipset. | |
84 | */ | |
85 | rtlpci->const_support_pciaspm = 1; | |
86 | } | |
87 | ||
21e4b072 LF |
88 | /*InitializeVariables8812E*/ |
89 | int rtl8821ae_init_sw_vars(struct ieee80211_hw *hw) | |
90 | { | |
91 | int err = 0; | |
92 | struct rtl_priv *rtlpriv = rtl_priv(hw); | |
93 | struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw)); | |
94 | struct rtl_mac *mac = rtl_mac(rtl_priv(hw)); | |
95 | struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw)); | |
96 | ||
97 | rtl8821ae_bt_reg_init(hw); | |
98 | rtlpci->msi_support = rtlpriv->cfg->mod_params->msi_support; | |
54328e64 | 99 | rtlpci->int_clear = rtlpriv->cfg->mod_params->int_clear; |
21e4b072 LF |
100 | rtlpriv->btcoexist.btc_ops = rtl_btc_get_ops_pointer(); |
101 | ||
102 | rtlpriv->dm.dm_initialgain_enable = 1; | |
103 | rtlpriv->dm.dm_flag = 0; | |
104 | rtlpriv->dm.disable_framebursting = 0; | |
105 | rtlpriv->dm.thermalvalue = 0; | |
106 | rtlpci->transmit_config = CFENDFORM | BIT(15) | BIT(24) | BIT(25); | |
107 | ||
108 | mac->ht_enable = true; | |
109 | mac->ht_cur_stbc = 0; | |
110 | mac->ht_stbc_cap = 0; | |
111 | mac->vht_cur_ldpc = 0; | |
112 | mac->vht_ldpc_cap = 0; | |
113 | mac->vht_cur_stbc = 0; | |
114 | mac->vht_stbc_cap = 0; | |
115 | ||
116 | rtlpriv->rtlhal.current_bandtype = BAND_ON_2_4G; | |
117 | /*following 2 is for register 5G band, refer to _rtl_init_mac80211()*/ | |
118 | rtlpriv->rtlhal.bandset = BAND_ON_BOTH; | |
119 | rtlpriv->rtlhal.macphymode = SINGLEMAC_SINGLEPHY; | |
120 | ||
121 | rtlpci->receive_config = (RCR_APPFCS | | |
122 | RCR_APP_MIC | | |
123 | RCR_APP_ICV | | |
124 | RCR_APP_PHYST_RXFF | | |
125 | RCR_NONQOS_VHT | | |
126 | RCR_HTC_LOC_CTRL | | |
127 | RCR_AMF | | |
128 | RCR_ACF | | |
129 | /*This bit controls the PS-Poll packet filter.*/ | |
130 | RCR_ADF | | |
131 | RCR_AICV | | |
132 | RCR_ACRC32 | | |
133 | RCR_AB | | |
134 | RCR_AM | | |
135 | RCR_APM | | |
136 | 0); | |
137 | ||
138 | rtlpci->irq_mask[0] = | |
139 | (u32)(IMR_PSTIMEOUT | | |
140 | IMR_GTINT3 | | |
141 | IMR_HSISR_IND_ON_INT | | |
142 | IMR_C2HCMD | | |
143 | IMR_HIGHDOK | | |
144 | IMR_MGNTDOK | | |
145 | IMR_BKDOK | | |
146 | IMR_BEDOK | | |
147 | IMR_VIDOK | | |
148 | IMR_VODOK | | |
149 | IMR_RDU | | |
150 | IMR_ROK | | |
151 | 0); | |
152 | ||
153 | rtlpci->irq_mask[1] = | |
154 | (u32)(IMR_RXFOVW | | |
155 | IMR_TXFOVW | | |
156 | 0); | |
157 | rtlpci->sys_irq_mask = (u32)(HSIMR_PDN_INT_EN | | |
158 | HSIMR_RON_INT_EN | | |
159 | 0); | |
160 | /* for WOWLAN */ | |
161 | rtlpriv->psc.wo_wlan_mode = WAKE_ON_MAGIC_PACKET | | |
162 | WAKE_ON_PATTERN_MATCH; | |
163 | ||
164 | /* for debug level */ | |
165 | rtlpriv->dbg.global_debuglevel = rtlpriv->cfg->mod_params->debug; | |
166 | /* for LPS & IPS */ | |
167 | rtlpriv->psc.inactiveps = rtlpriv->cfg->mod_params->inactiveps; | |
168 | rtlpriv->psc.swctrl_lps = rtlpriv->cfg->mod_params->swctrl_lps; | |
169 | rtlpriv->psc.fwctrl_lps = rtlpriv->cfg->mod_params->fwctrl_lps; | |
170 | rtlpci->msi_support = rtlpriv->cfg->mod_params->msi_support; | |
54328e64 | 171 | rtlpci->msi_support = rtlpriv->cfg->mod_params->int_clear; |
21e4b072 LF |
172 | if (rtlpriv->cfg->mod_params->disable_watchdog) |
173 | pr_info("watchdog disabled\n"); | |
174 | rtlpriv->psc.reg_fwctrl_lps = 3; | |
175 | rtlpriv->psc.reg_max_lps_awakeintvl = 5; | |
176 | rtlpci->msi_support = rtlpriv->cfg->mod_params->msi_support; | |
177 | ||
178 | /* for ASPM, you can close aspm through | |
179 | * set const_support_pciaspm = 0 | |
180 | */ | |
181 | rtl8821ae_init_aspm_vars(hw); | |
182 | ||
183 | if (rtlpriv->psc.reg_fwctrl_lps == 1) | |
184 | rtlpriv->psc.fwctrl_psmode = FW_PS_MIN_MODE; | |
185 | else if (rtlpriv->psc.reg_fwctrl_lps == 2) | |
186 | rtlpriv->psc.fwctrl_psmode = FW_PS_MAX_MODE; | |
187 | else if (rtlpriv->psc.reg_fwctrl_lps == 3) | |
188 | rtlpriv->psc.fwctrl_psmode = FW_PS_DTIM_MODE; | |
189 | ||
21e4b072 LF |
190 | /* for firmware buf */ |
191 | rtlpriv->rtlhal.pfirmware = vzalloc(0x8000); | |
192 | if (!rtlpriv->rtlhal.pfirmware) { | |
193 | RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, | |
194 | "Can't alloc buffer for fw.\n"); | |
195 | return 1; | |
196 | } | |
fe89707f TT |
197 | rtlpriv->rtlhal.wowlan_firmware = vzalloc(0x8000); |
198 | if (!rtlpriv->rtlhal.wowlan_firmware) { | |
199 | RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, | |
200 | "Can't alloc buffer for wowlan fw.\n"); | |
201 | return 1; | |
202 | } | |
21e4b072 | 203 | |
fe89707f | 204 | if (rtlhal->hw_type == HARDWARE_TYPE_RTL8812AE) { |
21e4b072 | 205 | rtlpriv->cfg->fw_name = "rtlwifi/rtl8812aefw.bin"; |
fe89707f TT |
206 | rtlpriv->cfg->wowlan_fw_name = "rtlwifi/rtl8812aefw_wowlan.bin"; |
207 | } else { | |
21e4b072 | 208 | rtlpriv->cfg->fw_name = "rtlwifi/rtl8821aefw.bin"; |
fe89707f TT |
209 | rtlpriv->cfg->wowlan_fw_name = "rtlwifi/rtl8821aefw_wowlan.bin"; |
210 | } | |
21e4b072 LF |
211 | |
212 | rtlpriv->max_fw_size = 0x8000; | |
fe89707f | 213 | /*load normal firmware*/ |
21e4b072 LF |
214 | pr_info("Using firmware %s\n", rtlpriv->cfg->fw_name); |
215 | err = request_firmware_nowait(THIS_MODULE, 1, rtlpriv->cfg->fw_name, | |
216 | rtlpriv->io.dev, GFP_KERNEL, hw, | |
217 | rtl_fw_cb); | |
218 | if (err) { | |
219 | RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, | |
fe89707f TT |
220 | "Failed to request normal firmware!\n"); |
221 | return 1; | |
222 | } | |
223 | /*load wowlan firmware*/ | |
224 | pr_info("Using firmware %s\n", rtlpriv->cfg->wowlan_fw_name); | |
225 | err = request_firmware_nowait(THIS_MODULE, 1, | |
226 | rtlpriv->cfg->wowlan_fw_name, | |
227 | rtlpriv->io.dev, GFP_KERNEL, hw, | |
228 | rtl_wowlan_fw_cb); | |
229 | if (err) { | |
230 | RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, | |
231 | "Failed to request wowlan firmware!\n"); | |
21e4b072 LF |
232 | return 1; |
233 | } | |
234 | return 0; | |
235 | } | |
236 | ||
237 | void rtl8821ae_deinit_sw_vars(struct ieee80211_hw *hw) | |
238 | { | |
239 | struct rtl_priv *rtlpriv = rtl_priv(hw); | |
240 | ||
241 | if (rtlpriv->rtlhal.pfirmware) { | |
242 | vfree(rtlpriv->rtlhal.pfirmware); | |
243 | rtlpriv->rtlhal.pfirmware = NULL; | |
244 | } | |
245 | #if (USE_SPECIFIC_FW_TO_SUPPORT_WOWLAN == 1) | |
246 | if (rtlpriv->rtlhal.wowlan_firmware) { | |
247 | vfree(rtlpriv->rtlhal.wowlan_firmware); | |
248 | rtlpriv->rtlhal.wowlan_firmware = NULL; | |
249 | } | |
250 | #endif | |
251 | } | |
252 | ||
253 | /* get bt coexist status */ | |
254 | bool rtl8821ae_get_btc_status(void) | |
255 | { | |
256 | return true; | |
257 | } | |
258 | ||
259 | static struct rtl_hal_ops rtl8821ae_hal_ops = { | |
260 | .init_sw_vars = rtl8821ae_init_sw_vars, | |
261 | .deinit_sw_vars = rtl8821ae_deinit_sw_vars, | |
262 | .read_eeprom_info = rtl8821ae_read_eeprom_info, | |
263 | .interrupt_recognized = rtl8821ae_interrupt_recognized, | |
264 | .hw_init = rtl8821ae_hw_init, | |
265 | .hw_disable = rtl8821ae_card_disable, | |
266 | .hw_suspend = rtl8821ae_suspend, | |
267 | .hw_resume = rtl8821ae_resume, | |
268 | .enable_interrupt = rtl8821ae_enable_interrupt, | |
269 | .disable_interrupt = rtl8821ae_disable_interrupt, | |
270 | .set_network_type = rtl8821ae_set_network_type, | |
271 | .set_chk_bssid = rtl8821ae_set_check_bssid, | |
272 | .set_qos = rtl8821ae_set_qos, | |
273 | .set_bcn_reg = rtl8821ae_set_beacon_related_registers, | |
274 | .set_bcn_intv = rtl8821ae_set_beacon_interval, | |
275 | .update_interrupt_mask = rtl8821ae_update_interrupt_mask, | |
276 | .get_hw_reg = rtl8821ae_get_hw_reg, | |
277 | .set_hw_reg = rtl8821ae_set_hw_reg, | |
278 | .update_rate_tbl = rtl8821ae_update_hal_rate_tbl, | |
279 | .fill_tx_desc = rtl8821ae_tx_fill_desc, | |
280 | .fill_tx_cmddesc = rtl8821ae_tx_fill_cmddesc, | |
281 | .query_rx_desc = rtl8821ae_rx_query_desc, | |
282 | .set_channel_access = rtl8821ae_update_channel_access_setting, | |
283 | .radio_onoff_checking = rtl8821ae_gpio_radio_on_off_checking, | |
284 | .set_bw_mode = rtl8821ae_phy_set_bw_mode, | |
285 | .switch_channel = rtl8821ae_phy_sw_chnl, | |
286 | .dm_watchdog = rtl8821ae_dm_watchdog, | |
287 | .scan_operation_backup = rtl8821ae_phy_scan_operation_backup, | |
288 | .set_rf_power_state = rtl8821ae_phy_set_rf_power_state, | |
289 | .led_control = rtl8821ae_led_control, | |
290 | .set_desc = rtl8821ae_set_desc, | |
291 | .get_desc = rtl8821ae_get_desc, | |
292 | .is_tx_desc_closed = rtl8821ae_is_tx_desc_closed, | |
293 | .tx_polling = rtl8821ae_tx_polling, | |
294 | .enable_hw_sec = rtl8821ae_enable_hw_security_config, | |
295 | .set_key = rtl8821ae_set_key, | |
296 | .init_sw_leds = rtl8821ae_init_sw_leds, | |
297 | .get_bbreg = rtl8821ae_phy_query_bb_reg, | |
298 | .set_bbreg = rtl8821ae_phy_set_bb_reg, | |
299 | .get_rfreg = rtl8821ae_phy_query_rf_reg, | |
300 | .set_rfreg = rtl8821ae_phy_set_rf_reg, | |
301 | .fill_h2c_cmd = rtl8821ae_fill_h2c_cmd, | |
302 | .get_btc_status = rtl8821ae_get_btc_status, | |
303 | .rx_command_packet = rtl8821ae_rx_command_packet, | |
304 | .add_wowlan_pattern = rtl8821ae_add_wowlan_pattern, | |
305 | }; | |
306 | ||
307 | static struct rtl_mod_params rtl8821ae_mod_params = { | |
308 | .sw_crypto = false, | |
309 | .inactiveps = true, | |
310 | .swctrl_lps = false, | |
311 | .fwctrl_lps = true, | |
312 | .msi_support = true, | |
54328e64 | 313 | .int_clear = true, |
21e4b072 LF |
314 | .debug = DBG_EMERG, |
315 | .disable_watchdog = 0, | |
316 | }; | |
317 | ||
318 | static struct rtl_hal_cfg rtl8821ae_hal_cfg = { | |
319 | .bar_id = 2, | |
320 | .write_readback = true, | |
321 | .name = "rtl8821ae_pci", | |
322 | .fw_name = "rtlwifi/rtl8821aefw.bin", | |
323 | .ops = &rtl8821ae_hal_ops, | |
324 | .mod_params = &rtl8821ae_mod_params, | |
325 | .maps[SYS_ISO_CTRL] = REG_SYS_ISO_CTRL, | |
326 | .maps[SYS_FUNC_EN] = REG_SYS_FUNC_EN, | |
327 | .maps[SYS_CLK] = REG_SYS_CLKR, | |
328 | .maps[MAC_RCR_AM] = AM, | |
329 | .maps[MAC_RCR_AB] = AB, | |
330 | .maps[MAC_RCR_ACRC32] = ACRC32, | |
331 | .maps[MAC_RCR_ACF] = ACF, | |
332 | .maps[MAC_RCR_AAP] = AAP, | |
333 | .maps[MAC_HIMR] = REG_HIMR, | |
334 | .maps[MAC_HIMRE] = REG_HIMRE, | |
335 | ||
336 | .maps[EFUSE_ACCESS] = REG_EFUSE_ACCESS, | |
337 | ||
338 | .maps[EFUSE_TEST] = REG_EFUSE_TEST, | |
339 | .maps[EFUSE_CTRL] = REG_EFUSE_CTRL, | |
340 | .maps[EFUSE_CLK] = 0, | |
341 | .maps[EFUSE_CLK_CTRL] = REG_EFUSE_CTRL, | |
342 | .maps[EFUSE_PWC_EV12V] = PWC_EV12V, | |
343 | .maps[EFUSE_FEN_ELDR] = FEN_ELDR, | |
344 | .maps[EFUSE_LOADER_CLK_EN] = LOADER_CLK_EN, | |
345 | .maps[EFUSE_ANA8M] = ANA8M, | |
346 | .maps[EFUSE_HWSET_MAX_SIZE] = HWSET_MAX_SIZE, | |
347 | .maps[EFUSE_MAX_SECTION_MAP] = EFUSE_MAX_SECTION, | |
348 | .maps[EFUSE_REAL_CONTENT_SIZE] = EFUSE_REAL_CONTENT_LEN, | |
349 | .maps[EFUSE_OOB_PROTECT_BYTES_LEN] = EFUSE_OOB_PROTECT_BYTES, | |
350 | ||
351 | .maps[RWCAM] = REG_CAMCMD, | |
352 | .maps[WCAMI] = REG_CAMWRITE, | |
353 | .maps[RCAMO] = REG_CAMREAD, | |
354 | .maps[CAMDBG] = REG_CAMDBG, | |
355 | .maps[SECR] = REG_SECCFG, | |
356 | .maps[SEC_CAM_NONE] = CAM_NONE, | |
357 | .maps[SEC_CAM_WEP40] = CAM_WEP40, | |
358 | .maps[SEC_CAM_TKIP] = CAM_TKIP, | |
359 | .maps[SEC_CAM_AES] = CAM_AES, | |
360 | .maps[SEC_CAM_WEP104] = CAM_WEP104, | |
361 | ||
362 | .maps[RTL_IMR_BCNDMAINT6] = IMR_BCNDMAINT6, | |
363 | .maps[RTL_IMR_BCNDMAINT5] = IMR_BCNDMAINT5, | |
364 | .maps[RTL_IMR_BCNDMAINT4] = IMR_BCNDMAINT4, | |
365 | .maps[RTL_IMR_BCNDMAINT3] = IMR_BCNDMAINT3, | |
366 | .maps[RTL_IMR_BCNDMAINT2] = IMR_BCNDMAINT2, | |
367 | .maps[RTL_IMR_BCNDMAINT1] = IMR_BCNDMAINT1, | |
368 | /* .maps[RTL_IMR_BCNDOK8] = IMR_BCNDOK8, */ /*need check*/ | |
369 | .maps[RTL_IMR_BCNDOK7] = IMR_BCNDOK7, | |
370 | .maps[RTL_IMR_BCNDOK6] = IMR_BCNDOK6, | |
371 | .maps[RTL_IMR_BCNDOK5] = IMR_BCNDOK5, | |
372 | .maps[RTL_IMR_BCNDOK4] = IMR_BCNDOK4, | |
373 | .maps[RTL_IMR_BCNDOK3] = IMR_BCNDOK3, | |
374 | .maps[RTL_IMR_BCNDOK2] = IMR_BCNDOK2, | |
375 | .maps[RTL_IMR_BCNDOK1] = IMR_BCNDOK1, | |
376 | /* .maps[RTL_IMR_TIMEOUT2] = IMR_TIMEOUT2,*/ | |
377 | /* .maps[RTL_IMR_TIMEOUT1] = IMR_TIMEOUT1,*/ | |
378 | ||
379 | .maps[RTL_IMR_TXFOVW] = IMR_TXFOVW, | |
380 | .maps[RTL_IMR_PSTIMEOUT] = IMR_PSTIMEOUT, | |
381 | .maps[RTL_IMR_BCNINT] = IMR_BCNDMAINT0, | |
382 | .maps[RTL_IMR_RXFOVW] = IMR_RXFOVW, | |
383 | .maps[RTL_IMR_RDU] = IMR_RDU, | |
384 | .maps[RTL_IMR_ATIMEND] = IMR_ATIMEND, | |
385 | .maps[RTL_IMR_BDOK] = IMR_BCNDOK0, | |
386 | .maps[RTL_IMR_MGNTDOK] = IMR_MGNTDOK, | |
387 | .maps[RTL_IMR_TBDER] = IMR_TBDER, | |
388 | .maps[RTL_IMR_HIGHDOK] = IMR_HIGHDOK, | |
389 | .maps[RTL_IMR_TBDOK] = IMR_TBDOK, | |
390 | .maps[RTL_IMR_BKDOK] = IMR_BKDOK, | |
391 | .maps[RTL_IMR_BEDOK] = IMR_BEDOK, | |
392 | .maps[RTL_IMR_VIDOK] = IMR_VIDOK, | |
393 | .maps[RTL_IMR_VODOK] = IMR_VODOK, | |
394 | .maps[RTL_IMR_ROK] = IMR_ROK, | |
395 | .maps[RTL_IBSS_INT_MASKS] = (IMR_BCNDMAINT0 | IMR_TBDOK | IMR_TBDER), | |
396 | ||
397 | .maps[RTL_RC_CCK_RATE1M] = DESC_RATE1M, | |
398 | .maps[RTL_RC_CCK_RATE2M] = DESC_RATE2M, | |
399 | .maps[RTL_RC_CCK_RATE5_5M] = DESC_RATE5_5M, | |
400 | .maps[RTL_RC_CCK_RATE11M] = DESC_RATE11M, | |
401 | .maps[RTL_RC_OFDM_RATE6M] = DESC_RATE6M, | |
402 | .maps[RTL_RC_OFDM_RATE9M] = DESC_RATE9M, | |
403 | .maps[RTL_RC_OFDM_RATE12M] = DESC_RATE12M, | |
404 | .maps[RTL_RC_OFDM_RATE18M] = DESC_RATE18M, | |
405 | .maps[RTL_RC_OFDM_RATE24M] = DESC_RATE24M, | |
406 | .maps[RTL_RC_OFDM_RATE36M] = DESC_RATE36M, | |
407 | .maps[RTL_RC_OFDM_RATE48M] = DESC_RATE48M, | |
408 | .maps[RTL_RC_OFDM_RATE54M] = DESC_RATE54M, | |
409 | ||
410 | .maps[RTL_RC_HT_RATEMCS7] = DESC_RATEMCS7, | |
411 | .maps[RTL_RC_HT_RATEMCS15] = DESC_RATEMCS15, | |
412 | ||
413 | /*VHT hightest rate*/ | |
414 | .maps[RTL_RC_VHT_RATE_1SS_MCS7] = DESC_RATEVHT1SS_MCS7, | |
415 | .maps[RTL_RC_VHT_RATE_1SS_MCS8] = DESC_RATEVHT1SS_MCS8, | |
416 | .maps[RTL_RC_VHT_RATE_1SS_MCS9] = DESC_RATEVHT1SS_MCS9, | |
417 | .maps[RTL_RC_VHT_RATE_2SS_MCS7] = DESC_RATEVHT2SS_MCS7, | |
418 | .maps[RTL_RC_VHT_RATE_2SS_MCS8] = DESC_RATEVHT2SS_MCS8, | |
419 | .maps[RTL_RC_VHT_RATE_2SS_MCS9] = DESC_RATEVHT2SS_MCS9, | |
420 | }; | |
421 | ||
422 | static struct pci_device_id rtl8821ae_pci_ids[] = { | |
423 | {RTL_PCI_DEVICE(PCI_VENDOR_ID_REALTEK, 0x8812, rtl8821ae_hal_cfg)}, | |
424 | {RTL_PCI_DEVICE(PCI_VENDOR_ID_REALTEK, 0x8821, rtl8821ae_hal_cfg)}, | |
425 | {}, | |
426 | }; | |
427 | ||
428 | MODULE_DEVICE_TABLE(pci, rtl8821ae_pci_ids); | |
429 | ||
430 | MODULE_AUTHOR("Realtek WlanFAE <wlanfae@realtek.com>"); | |
431 | MODULE_LICENSE("GPL"); | |
432 | MODULE_DESCRIPTION("Realtek 8821ae 802.11ac PCI wireless"); | |
433 | MODULE_FIRMWARE("rtlwifi/rtl8821aefw.bin"); | |
434 | ||
435 | module_param_named(swenc, rtl8821ae_mod_params.sw_crypto, bool, 0444); | |
436 | module_param_named(debug, rtl8821ae_mod_params.debug, int, 0444); | |
437 | module_param_named(ips, rtl8821ae_mod_params.inactiveps, bool, 0444); | |
438 | module_param_named(swlps, rtl8821ae_mod_params.swctrl_lps, bool, 0444); | |
439 | module_param_named(fwlps, rtl8821ae_mod_params.fwctrl_lps, bool, 0444); | |
440 | module_param_named(msi, rtl8821ae_mod_params.msi_support, bool, 0444); | |
441 | module_param_named(disable_watchdog, rtl8821ae_mod_params.disable_watchdog, | |
442 | bool, 0444); | |
54328e64 | 443 | module_param_named(int_clear, rtl8821ae_mod_params.int_clear, bool, 0444); |
21e4b072 LF |
444 | MODULE_PARM_DESC(swenc, "Set to 1 for software crypto (default 0)\n"); |
445 | MODULE_PARM_DESC(ips, "Set to 0 to not use link power save (default 1)\n"); | |
446 | MODULE_PARM_DESC(swlps, "Set to 1 to use SW control power save (default 0)\n"); | |
447 | MODULE_PARM_DESC(fwlps, "Set to 1 to use FW control power save (default 1)\n"); | |
448 | MODULE_PARM_DESC(msi, "Set to 1 to use MSI interrupts mode (default 1)\n"); | |
449 | MODULE_PARM_DESC(debug, "Set debug level (0-5) (default 0)"); | |
450 | MODULE_PARM_DESC(disable_watchdog, "Set to 1 to disable the watchdog (default 0)\n"); | |
eeec5d0e | 451 | MODULE_PARM_DESC(int_clear, "Set to 0 to disable interrupt clear before set (default 1)\n"); |
21e4b072 LF |
452 | |
453 | static SIMPLE_DEV_PM_OPS(rtlwifi_pm_ops, rtl_pci_suspend, rtl_pci_resume); | |
454 | ||
455 | static struct pci_driver rtl8821ae_driver = { | |
456 | .name = KBUILD_MODNAME, | |
457 | .id_table = rtl8821ae_pci_ids, | |
458 | .probe = rtl_pci_probe, | |
459 | .remove = rtl_pci_disconnect, | |
460 | .driver.pm = &rtlwifi_pm_ops, | |
461 | }; | |
462 | ||
463 | module_pci_driver(rtl8821ae_driver); |