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95ea3627 | 1 | /* |
9c9a0d14 | 2 | Copyright (C) 2004 - 2009 Ivo van Doorn <IvDoorn@gmail.com> |
95ea3627 ID |
3 | <http://rt2x00.serialmonkey.com> |
4 | ||
5 | This program is free software; you can redistribute it and/or modify | |
6 | it under the terms of the GNU General Public License as published by | |
7 | the Free Software Foundation; either version 2 of the License, or | |
8 | (at your option) any later version. | |
9 | ||
10 | This program is distributed in the hope that it will be useful, | |
11 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
12 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
13 | GNU General Public License for more details. | |
14 | ||
15 | You should have received a copy of the GNU General Public License | |
16 | along with this program; if not, write to the | |
17 | Free Software Foundation, Inc., | |
18 | 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. | |
19 | */ | |
20 | ||
21 | /* | |
22 | Module: rt2x00pci | |
23 | Abstract: rt2x00 generic pci device routines. | |
24 | */ | |
25 | ||
95ea3627 ID |
26 | #include <linux/dma-mapping.h> |
27 | #include <linux/kernel.h> | |
28 | #include <linux/module.h> | |
29 | #include <linux/pci.h> | |
30 | ||
31 | #include "rt2x00.h" | |
32 | #include "rt2x00pci.h" | |
33 | ||
c9c3b1a5 ID |
34 | /* |
35 | * Register access. | |
36 | */ | |
37 | int rt2x00pci_regbusy_read(struct rt2x00_dev *rt2x00dev, | |
38 | const unsigned int offset, | |
39 | const struct rt2x00_field32 field, | |
40 | u32 *reg) | |
41 | { | |
42 | unsigned int i; | |
43 | ||
c70762f9 AB |
44 | if (!test_bit(DEVICE_STATE_PRESENT, &rt2x00dev->flags)) |
45 | return 0; | |
46 | ||
c9c3b1a5 ID |
47 | for (i = 0; i < REGISTER_BUSY_COUNT; i++) { |
48 | rt2x00pci_register_read(rt2x00dev, offset, reg); | |
49 | if (!rt2x00_get_field32(*reg, field)) | |
50 | return 1; | |
51 | udelay(REGISTER_BUSY_DELAY); | |
52 | } | |
53 | ||
54 | ERROR(rt2x00dev, "Indirect register access failed: " | |
55 | "offset=0x%.08x, value=0x%.08x\n", offset, *reg); | |
56 | *reg = ~0; | |
57 | ||
58 | return 0; | |
59 | } | |
60 | EXPORT_SYMBOL_GPL(rt2x00pci_regbusy_read); | |
61 | ||
95ea3627 ID |
62 | /* |
63 | * TX data handlers. | |
64 | */ | |
6db3786a | 65 | int rt2x00pci_write_tx_data(struct queue_entry *entry) |
95ea3627 | 66 | { |
798b7adb | 67 | struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev; |
b8be63ff | 68 | struct queue_entry_priv_pci *entry_priv = entry->priv_data; |
181d6902 | 69 | struct skb_frame_desc *skbdesc; |
95ea3627 | 70 | |
6db3786a ID |
71 | /* |
72 | * This should not happen, we already checked the entry | |
73 | * was ours. When the hardware disagrees there has been | |
74 | * a queue corruption! | |
75 | */ | |
798b7adb ID |
76 | if (unlikely(rt2x00dev->ops->lib->get_entry_state(entry))) { |
77 | ERROR(rt2x00dev, | |
6db3786a | 78 | "Corrupt queue %d, accessing entry which is not ours.\n" |
95ea3627 | 79 | "Please file bug report to %s.\n", |
e58c6aca | 80 | entry->queue->qid, DRV_PROJECT); |
95ea3627 ID |
81 | return -EINVAL; |
82 | } | |
83 | ||
08992f7f ID |
84 | /* |
85 | * Fill in skb descriptor | |
86 | */ | |
6db3786a | 87 | skbdesc = get_skb_frame_desc(entry->skb); |
b8be63ff | 88 | skbdesc->desc = entry_priv->desc; |
6db3786a | 89 | skbdesc->desc_len = entry->queue->desc_size; |
95ea3627 | 90 | |
95ea3627 ID |
91 | return 0; |
92 | } | |
93 | EXPORT_SYMBOL_GPL(rt2x00pci_write_tx_data); | |
94 | ||
95 | /* | |
3957ccb5 | 96 | * TX/RX data handlers. |
95ea3627 ID |
97 | */ |
98 | void rt2x00pci_rxdone(struct rt2x00_dev *rt2x00dev) | |
99 | { | |
181d6902 ID |
100 | struct data_queue *queue = rt2x00dev->rx; |
101 | struct queue_entry *entry; | |
b8be63ff | 102 | struct queue_entry_priv_pci *entry_priv; |
c4da0048 | 103 | struct skb_frame_desc *skbdesc; |
95ea3627 ID |
104 | |
105 | while (1) { | |
181d6902 | 106 | entry = rt2x00queue_get_entry(queue, Q_INDEX); |
b8be63ff | 107 | entry_priv = entry->priv_data; |
95ea3627 | 108 | |
798b7adb | 109 | if (rt2x00dev->ops->lib->get_entry_state(entry)) |
95ea3627 ID |
110 | break; |
111 | ||
c4da0048 GW |
112 | /* |
113 | * Fill in desc fields of the skb descriptor | |
114 | */ | |
115 | skbdesc = get_skb_frame_desc(entry->skb); | |
116 | skbdesc->desc = entry_priv->desc; | |
117 | skbdesc->desc_len = entry->queue->desc_size; | |
118 | ||
119 | /* | |
120 | * Send the frame to rt2x00lib for further processing. | |
121 | */ | |
122 | rt2x00lib_rxdone(rt2x00dev, entry); | |
95ea3627 ID |
123 | } |
124 | } | |
125 | EXPORT_SYMBOL_GPL(rt2x00pci_rxdone); | |
126 | ||
127 | /* | |
128 | * Device initialization handlers. | |
129 | */ | |
181d6902 ID |
130 | static int rt2x00pci_alloc_queue_dma(struct rt2x00_dev *rt2x00dev, |
131 | struct data_queue *queue) | |
95ea3627 | 132 | { |
b8be63ff | 133 | struct queue_entry_priv_pci *entry_priv; |
30b3a23c ID |
134 | void *addr; |
135 | dma_addr_t dma; | |
95ea3627 ID |
136 | unsigned int i; |
137 | ||
138 | /* | |
139 | * Allocate DMA memory for descriptor and buffer. | |
140 | */ | |
c4da0048 GW |
141 | addr = dma_alloc_coherent(rt2x00dev->dev, |
142 | queue->limit * queue->desc_size, | |
143 | &dma, GFP_KERNEL | GFP_DMA); | |
30b3a23c | 144 | if (!addr) |
95ea3627 ID |
145 | return -ENOMEM; |
146 | ||
c4da0048 | 147 | memset(addr, 0, queue->limit * queue->desc_size); |
9c9dd2c9 | 148 | |
95ea3627 | 149 | /* |
181d6902 | 150 | * Initialize all queue entries to contain valid addresses. |
95ea3627 | 151 | */ |
181d6902 | 152 | for (i = 0; i < queue->limit; i++) { |
b8be63ff | 153 | entry_priv = queue->entries[i].priv_data; |
c4da0048 GW |
154 | entry_priv->desc = addr + i * queue->desc_size; |
155 | entry_priv->desc_dma = dma + i * queue->desc_size; | |
95ea3627 ID |
156 | } |
157 | ||
158 | return 0; | |
159 | } | |
160 | ||
181d6902 ID |
161 | static void rt2x00pci_free_queue_dma(struct rt2x00_dev *rt2x00dev, |
162 | struct data_queue *queue) | |
95ea3627 | 163 | { |
b8be63ff ID |
164 | struct queue_entry_priv_pci *entry_priv = |
165 | queue->entries[0].priv_data; | |
181d6902 | 166 | |
c4da0048 GW |
167 | if (entry_priv->desc) |
168 | dma_free_coherent(rt2x00dev->dev, | |
169 | queue->limit * queue->desc_size, | |
170 | entry_priv->desc, entry_priv->desc_dma); | |
171 | entry_priv->desc = NULL; | |
95ea3627 ID |
172 | } |
173 | ||
174 | int rt2x00pci_initialize(struct rt2x00_dev *rt2x00dev) | |
175 | { | |
181d6902 | 176 | struct data_queue *queue; |
95ea3627 ID |
177 | int status; |
178 | ||
179 | /* | |
180 | * Allocate DMA | |
181 | */ | |
181d6902 ID |
182 | queue_for_each(rt2x00dev, queue) { |
183 | status = rt2x00pci_alloc_queue_dma(rt2x00dev, queue); | |
95ea3627 ID |
184 | if (status) |
185 | goto exit; | |
186 | } | |
187 | ||
188 | /* | |
189 | * Register interrupt handler. | |
190 | */ | |
440ddada ID |
191 | status = request_irq(rt2x00dev->irq, rt2x00dev->ops->lib->irq_handler, |
192 | IRQF_SHARED, rt2x00dev->name, rt2x00dev); | |
95ea3627 ID |
193 | if (status) { |
194 | ERROR(rt2x00dev, "IRQ %d allocation failed (error %d).\n", | |
440ddada | 195 | rt2x00dev->irq, status); |
b30cdfc5 | 196 | goto exit; |
95ea3627 ID |
197 | } |
198 | ||
199 | return 0; | |
200 | ||
201 | exit: | |
b30cdfc5 ID |
202 | queue_for_each(rt2x00dev, queue) |
203 | rt2x00pci_free_queue_dma(rt2x00dev, queue); | |
95ea3627 ID |
204 | |
205 | return status; | |
206 | } | |
207 | EXPORT_SYMBOL_GPL(rt2x00pci_initialize); | |
208 | ||
209 | void rt2x00pci_uninitialize(struct rt2x00_dev *rt2x00dev) | |
210 | { | |
181d6902 | 211 | struct data_queue *queue; |
95ea3627 ID |
212 | |
213 | /* | |
214 | * Free irq line. | |
215 | */ | |
14a3bf89 | 216 | free_irq(to_pci_dev(rt2x00dev->dev)->irq, rt2x00dev); |
95ea3627 ID |
217 | |
218 | /* | |
219 | * Free DMA | |
220 | */ | |
181d6902 ID |
221 | queue_for_each(rt2x00dev, queue) |
222 | rt2x00pci_free_queue_dma(rt2x00dev, queue); | |
95ea3627 ID |
223 | } |
224 | EXPORT_SYMBOL_GPL(rt2x00pci_uninitialize); | |
225 | ||
226 | /* | |
227 | * PCI driver handlers. | |
228 | */ | |
229 | static void rt2x00pci_free_reg(struct rt2x00_dev *rt2x00dev) | |
230 | { | |
231 | kfree(rt2x00dev->rf); | |
232 | rt2x00dev->rf = NULL; | |
233 | ||
234 | kfree(rt2x00dev->eeprom); | |
235 | rt2x00dev->eeprom = NULL; | |
236 | ||
21795094 ID |
237 | if (rt2x00dev->csr.base) { |
238 | iounmap(rt2x00dev->csr.base); | |
239 | rt2x00dev->csr.base = NULL; | |
95ea3627 ID |
240 | } |
241 | } | |
242 | ||
243 | static int rt2x00pci_alloc_reg(struct rt2x00_dev *rt2x00dev) | |
244 | { | |
14a3bf89 | 245 | struct pci_dev *pci_dev = to_pci_dev(rt2x00dev->dev); |
95ea3627 | 246 | |
275f165f | 247 | rt2x00dev->csr.base = pci_ioremap_bar(pci_dev, 0); |
21795094 | 248 | if (!rt2x00dev->csr.base) |
95ea3627 ID |
249 | goto exit; |
250 | ||
251 | rt2x00dev->eeprom = kzalloc(rt2x00dev->ops->eeprom_size, GFP_KERNEL); | |
252 | if (!rt2x00dev->eeprom) | |
253 | goto exit; | |
254 | ||
255 | rt2x00dev->rf = kzalloc(rt2x00dev->ops->rf_size, GFP_KERNEL); | |
256 | if (!rt2x00dev->rf) | |
257 | goto exit; | |
258 | ||
259 | return 0; | |
260 | ||
261 | exit: | |
262 | ERROR_PROBE("Failed to allocate registers.\n"); | |
263 | ||
264 | rt2x00pci_free_reg(rt2x00dev); | |
265 | ||
266 | return -ENOMEM; | |
267 | } | |
268 | ||
269 | int rt2x00pci_probe(struct pci_dev *pci_dev, const struct pci_device_id *id) | |
270 | { | |
271 | struct rt2x00_ops *ops = (struct rt2x00_ops *)id->driver_data; | |
272 | struct ieee80211_hw *hw; | |
273 | struct rt2x00_dev *rt2x00dev; | |
274 | int retval; | |
275 | ||
276 | retval = pci_request_regions(pci_dev, pci_name(pci_dev)); | |
277 | if (retval) { | |
278 | ERROR_PROBE("PCI request regions failed.\n"); | |
279 | return retval; | |
280 | } | |
281 | ||
282 | retval = pci_enable_device(pci_dev); | |
283 | if (retval) { | |
284 | ERROR_PROBE("Enable device failed.\n"); | |
285 | goto exit_release_regions; | |
286 | } | |
287 | ||
288 | pci_set_master(pci_dev); | |
289 | ||
290 | if (pci_set_mwi(pci_dev)) | |
291 | ERROR_PROBE("MWI not available.\n"); | |
292 | ||
284901a9 | 293 | if (dma_set_mask(&pci_dev->dev, DMA_BIT_MASK(32))) { |
95ea3627 ID |
294 | ERROR_PROBE("PCI DMA not supported.\n"); |
295 | retval = -EIO; | |
296 | goto exit_disable_device; | |
297 | } | |
298 | ||
299 | hw = ieee80211_alloc_hw(sizeof(struct rt2x00_dev), ops->hw); | |
300 | if (!hw) { | |
301 | ERROR_PROBE("Failed to allocate hardware.\n"); | |
302 | retval = -ENOMEM; | |
303 | goto exit_disable_device; | |
304 | } | |
305 | ||
306 | pci_set_drvdata(pci_dev, hw); | |
307 | ||
308 | rt2x00dev = hw->priv; | |
14a3bf89 | 309 | rt2x00dev->dev = &pci_dev->dev; |
95ea3627 ID |
310 | rt2x00dev->ops = ops; |
311 | rt2x00dev->hw = hw; | |
440ddada ID |
312 | rt2x00dev->irq = pci_dev->irq; |
313 | rt2x00dev->name = pci_name(pci_dev); | |
314 | ||
2015d192 GW |
315 | rt2x00_set_chip_intf(rt2x00dev, RT2X00_CHIP_INTF_PCI); |
316 | ||
95ea3627 ID |
317 | retval = rt2x00pci_alloc_reg(rt2x00dev); |
318 | if (retval) | |
319 | goto exit_free_device; | |
320 | ||
321 | retval = rt2x00lib_probe_dev(rt2x00dev); | |
322 | if (retval) | |
323 | goto exit_free_reg; | |
324 | ||
325 | return 0; | |
326 | ||
327 | exit_free_reg: | |
328 | rt2x00pci_free_reg(rt2x00dev); | |
329 | ||
330 | exit_free_device: | |
331 | ieee80211_free_hw(hw); | |
332 | ||
333 | exit_disable_device: | |
334 | if (retval != -EBUSY) | |
335 | pci_disable_device(pci_dev); | |
336 | ||
337 | exit_release_regions: | |
338 | pci_release_regions(pci_dev); | |
339 | ||
340 | pci_set_drvdata(pci_dev, NULL); | |
341 | ||
342 | return retval; | |
343 | } | |
344 | EXPORT_SYMBOL_GPL(rt2x00pci_probe); | |
345 | ||
346 | void rt2x00pci_remove(struct pci_dev *pci_dev) | |
347 | { | |
348 | struct ieee80211_hw *hw = pci_get_drvdata(pci_dev); | |
349 | struct rt2x00_dev *rt2x00dev = hw->priv; | |
350 | ||
351 | /* | |
352 | * Free all allocated data. | |
353 | */ | |
354 | rt2x00lib_remove_dev(rt2x00dev); | |
355 | rt2x00pci_free_reg(rt2x00dev); | |
356 | ieee80211_free_hw(hw); | |
357 | ||
358 | /* | |
359 | * Free the PCI device data. | |
360 | */ | |
361 | pci_set_drvdata(pci_dev, NULL); | |
362 | pci_disable_device(pci_dev); | |
363 | pci_release_regions(pci_dev); | |
364 | } | |
365 | EXPORT_SYMBOL_GPL(rt2x00pci_remove); | |
366 | ||
367 | #ifdef CONFIG_PM | |
368 | int rt2x00pci_suspend(struct pci_dev *pci_dev, pm_message_t state) | |
369 | { | |
370 | struct ieee80211_hw *hw = pci_get_drvdata(pci_dev); | |
371 | struct rt2x00_dev *rt2x00dev = hw->priv; | |
372 | int retval; | |
373 | ||
374 | retval = rt2x00lib_suspend(rt2x00dev, state); | |
375 | if (retval) | |
376 | return retval; | |
377 | ||
95ea3627 ID |
378 | pci_save_state(pci_dev); |
379 | pci_disable_device(pci_dev); | |
380 | return pci_set_power_state(pci_dev, pci_choose_state(pci_dev, state)); | |
381 | } | |
382 | EXPORT_SYMBOL_GPL(rt2x00pci_suspend); | |
383 | ||
384 | int rt2x00pci_resume(struct pci_dev *pci_dev) | |
385 | { | |
386 | struct ieee80211_hw *hw = pci_get_drvdata(pci_dev); | |
387 | struct rt2x00_dev *rt2x00dev = hw->priv; | |
95ea3627 ID |
388 | |
389 | if (pci_set_power_state(pci_dev, PCI_D0) || | |
390 | pci_enable_device(pci_dev) || | |
391 | pci_restore_state(pci_dev)) { | |
392 | ERROR(rt2x00dev, "Failed to resume device.\n"); | |
393 | return -EIO; | |
394 | } | |
395 | ||
499a214c | 396 | return rt2x00lib_resume(rt2x00dev); |
95ea3627 ID |
397 | } |
398 | EXPORT_SYMBOL_GPL(rt2x00pci_resume); | |
399 | #endif /* CONFIG_PM */ | |
400 | ||
401 | /* | |
402 | * rt2x00pci module information. | |
403 | */ | |
404 | MODULE_AUTHOR(DRV_PROJECT); | |
405 | MODULE_VERSION(DRV_VERSION); | |
181d6902 | 406 | MODULE_DESCRIPTION("rt2x00 pci library"); |
95ea3627 | 407 | MODULE_LICENSE("GPL"); |