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Commit | Line | Data |
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21d34711 CH |
1 | /* |
2 | * NVM Express device driver | |
3 | * Copyright (c) 2011-2014, Intel Corporation. | |
4 | * | |
5 | * This program is free software; you can redistribute it and/or modify it | |
6 | * under the terms and conditions of the GNU General Public License, | |
7 | * version 2, as published by the Free Software Foundation. | |
8 | * | |
9 | * This program is distributed in the hope it will be useful, but WITHOUT | |
10 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
11 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | |
12 | * more details. | |
13 | */ | |
14 | ||
15 | #include <linux/blkdev.h> | |
16 | #include <linux/blk-mq.h> | |
5fd4ce1b | 17 | #include <linux/delay.h> |
21d34711 | 18 | #include <linux/errno.h> |
1673f1f0 | 19 | #include <linux/hdreg.h> |
21d34711 | 20 | #include <linux/kernel.h> |
5bae7f73 CH |
21 | #include <linux/module.h> |
22 | #include <linux/list_sort.h> | |
21d34711 CH |
23 | #include <linux/slab.h> |
24 | #include <linux/types.h> | |
1673f1f0 CH |
25 | #include <linux/pr.h> |
26 | #include <linux/ptrace.h> | |
27 | #include <linux/nvme_ioctl.h> | |
28 | #include <linux/t10-pi.h> | |
29 | #include <scsi/sg.h> | |
30 | #include <asm/unaligned.h> | |
21d34711 CH |
31 | |
32 | #include "nvme.h" | |
33 | ||
f3ca80fc CH |
34 | #define NVME_MINORS (1U << MINORBITS) |
35 | ||
ba0ba7d3 ML |
36 | unsigned char admin_timeout = 60; |
37 | module_param(admin_timeout, byte, 0644); | |
38 | MODULE_PARM_DESC(admin_timeout, "timeout in seconds for admin commands"); | |
576d55d6 | 39 | EXPORT_SYMBOL_GPL(admin_timeout); |
ba0ba7d3 ML |
40 | |
41 | unsigned char nvme_io_timeout = 30; | |
42 | module_param_named(io_timeout, nvme_io_timeout, byte, 0644); | |
43 | MODULE_PARM_DESC(io_timeout, "timeout in seconds for I/O"); | |
576d55d6 | 44 | EXPORT_SYMBOL_GPL(nvme_io_timeout); |
ba0ba7d3 ML |
45 | |
46 | unsigned char shutdown_timeout = 5; | |
47 | module_param(shutdown_timeout, byte, 0644); | |
48 | MODULE_PARM_DESC(shutdown_timeout, "timeout in seconds for controller shutdown"); | |
49 | ||
5bae7f73 CH |
50 | static int nvme_major; |
51 | module_param(nvme_major, int, 0); | |
52 | ||
f3ca80fc CH |
53 | static int nvme_char_major; |
54 | module_param(nvme_char_major, int, 0); | |
55 | ||
56 | static LIST_HEAD(nvme_ctrl_list); | |
9f2482b9 | 57 | static DEFINE_SPINLOCK(dev_list_lock); |
1673f1f0 | 58 | |
f3ca80fc CH |
59 | static struct class *nvme_class; |
60 | ||
c55a2fd4 ML |
61 | void nvme_cancel_request(struct request *req, void *data, bool reserved) |
62 | { | |
63 | int status; | |
64 | ||
65 | if (!blk_mq_request_started(req)) | |
66 | return; | |
67 | ||
68 | dev_dbg_ratelimited(((struct nvme_ctrl *) data)->device, | |
69 | "Cancelling I/O %d", req->tag); | |
70 | ||
71 | status = NVME_SC_ABORT_REQ; | |
72 | if (blk_queue_dying(req->q)) | |
73 | status |= NVME_SC_DNR; | |
74 | blk_mq_complete_request(req, status); | |
75 | } | |
76 | EXPORT_SYMBOL_GPL(nvme_cancel_request); | |
77 | ||
bb8d261e CH |
78 | bool nvme_change_ctrl_state(struct nvme_ctrl *ctrl, |
79 | enum nvme_ctrl_state new_state) | |
80 | { | |
81 | enum nvme_ctrl_state old_state = ctrl->state; | |
82 | bool changed = false; | |
83 | ||
84 | spin_lock_irq(&ctrl->lock); | |
85 | switch (new_state) { | |
86 | case NVME_CTRL_LIVE: | |
87 | switch (old_state) { | |
88 | case NVME_CTRL_RESETTING: | |
89 | changed = true; | |
90 | /* FALLTHRU */ | |
91 | default: | |
92 | break; | |
93 | } | |
94 | break; | |
95 | case NVME_CTRL_RESETTING: | |
96 | switch (old_state) { | |
97 | case NVME_CTRL_NEW: | |
98 | case NVME_CTRL_LIVE: | |
99 | changed = true; | |
100 | /* FALLTHRU */ | |
101 | default: | |
102 | break; | |
103 | } | |
104 | break; | |
105 | case NVME_CTRL_DELETING: | |
106 | switch (old_state) { | |
107 | case NVME_CTRL_LIVE: | |
108 | case NVME_CTRL_RESETTING: | |
109 | changed = true; | |
110 | /* FALLTHRU */ | |
111 | default: | |
112 | break; | |
113 | } | |
114 | break; | |
0ff9d4e1 KB |
115 | case NVME_CTRL_DEAD: |
116 | switch (old_state) { | |
117 | case NVME_CTRL_DELETING: | |
118 | changed = true; | |
119 | /* FALLTHRU */ | |
120 | default: | |
121 | break; | |
122 | } | |
123 | break; | |
bb8d261e CH |
124 | default: |
125 | break; | |
126 | } | |
127 | spin_unlock_irq(&ctrl->lock); | |
128 | ||
129 | if (changed) | |
130 | ctrl->state = new_state; | |
131 | ||
132 | return changed; | |
133 | } | |
134 | EXPORT_SYMBOL_GPL(nvme_change_ctrl_state); | |
135 | ||
1673f1f0 CH |
136 | static void nvme_free_ns(struct kref *kref) |
137 | { | |
138 | struct nvme_ns *ns = container_of(kref, struct nvme_ns, kref); | |
139 | ||
140 | if (ns->type == NVME_NS_LIGHTNVM) | |
141 | nvme_nvm_unregister(ns->queue, ns->disk->disk_name); | |
142 | ||
143 | spin_lock(&dev_list_lock); | |
144 | ns->disk->private_data = NULL; | |
145 | spin_unlock(&dev_list_lock); | |
146 | ||
1673f1f0 | 147 | put_disk(ns->disk); |
075790eb KB |
148 | ida_simple_remove(&ns->ctrl->ns_ida, ns->instance); |
149 | nvme_put_ctrl(ns->ctrl); | |
1673f1f0 CH |
150 | kfree(ns); |
151 | } | |
152 | ||
5bae7f73 | 153 | static void nvme_put_ns(struct nvme_ns *ns) |
1673f1f0 CH |
154 | { |
155 | kref_put(&ns->kref, nvme_free_ns); | |
156 | } | |
157 | ||
158 | static struct nvme_ns *nvme_get_ns_from_disk(struct gendisk *disk) | |
159 | { | |
160 | struct nvme_ns *ns; | |
161 | ||
162 | spin_lock(&dev_list_lock); | |
163 | ns = disk->private_data; | |
e439bb12 SG |
164 | if (ns) { |
165 | if (!kref_get_unless_zero(&ns->kref)) | |
166 | goto fail; | |
167 | if (!try_module_get(ns->ctrl->ops->module)) | |
168 | goto fail_put_ns; | |
169 | } | |
1673f1f0 CH |
170 | spin_unlock(&dev_list_lock); |
171 | ||
172 | return ns; | |
e439bb12 SG |
173 | |
174 | fail_put_ns: | |
175 | kref_put(&ns->kref, nvme_free_ns); | |
176 | fail: | |
177 | spin_unlock(&dev_list_lock); | |
178 | return NULL; | |
1673f1f0 CH |
179 | } |
180 | ||
7688faa6 CH |
181 | void nvme_requeue_req(struct request *req) |
182 | { | |
183 | unsigned long flags; | |
184 | ||
185 | blk_mq_requeue_request(req); | |
186 | spin_lock_irqsave(req->q->queue_lock, flags); | |
187 | if (!blk_queue_stopped(req->q)) | |
188 | blk_mq_kick_requeue_list(req->q); | |
189 | spin_unlock_irqrestore(req->q->queue_lock, flags); | |
190 | } | |
576d55d6 | 191 | EXPORT_SYMBOL_GPL(nvme_requeue_req); |
7688faa6 | 192 | |
4160982e CH |
193 | struct request *nvme_alloc_request(struct request_queue *q, |
194 | struct nvme_command *cmd, unsigned int flags) | |
21d34711 CH |
195 | { |
196 | bool write = cmd->common.opcode & 1; | |
21d34711 | 197 | struct request *req; |
21d34711 | 198 | |
4160982e | 199 | req = blk_mq_alloc_request(q, write, flags); |
21d34711 | 200 | if (IS_ERR(req)) |
4160982e | 201 | return req; |
21d34711 CH |
202 | |
203 | req->cmd_type = REQ_TYPE_DRV_PRIV; | |
204 | req->cmd_flags |= REQ_FAILFAST_DRIVER; | |
205 | req->__data_len = 0; | |
206 | req->__sector = (sector_t) -1; | |
207 | req->bio = req->biotail = NULL; | |
208 | ||
21d34711 CH |
209 | req->cmd = (unsigned char *)cmd; |
210 | req->cmd_len = sizeof(struct nvme_command); | |
21d34711 | 211 | |
4160982e CH |
212 | return req; |
213 | } | |
576d55d6 | 214 | EXPORT_SYMBOL_GPL(nvme_alloc_request); |
4160982e | 215 | |
8093f7ca ML |
216 | static inline void nvme_setup_flush(struct nvme_ns *ns, |
217 | struct nvme_command *cmnd) | |
218 | { | |
219 | memset(cmnd, 0, sizeof(*cmnd)); | |
220 | cmnd->common.opcode = nvme_cmd_flush; | |
221 | cmnd->common.nsid = cpu_to_le32(ns->ns_id); | |
222 | } | |
223 | ||
224 | static inline int nvme_setup_discard(struct nvme_ns *ns, struct request *req, | |
225 | struct nvme_command *cmnd) | |
226 | { | |
227 | struct nvme_dsm_range *range; | |
228 | struct page *page; | |
229 | int offset; | |
230 | unsigned int nr_bytes = blk_rq_bytes(req); | |
231 | ||
232 | range = kmalloc(sizeof(*range), GFP_ATOMIC); | |
233 | if (!range) | |
234 | return BLK_MQ_RQ_QUEUE_BUSY; | |
235 | ||
236 | range->cattr = cpu_to_le32(0); | |
237 | range->nlb = cpu_to_le32(nr_bytes >> ns->lba_shift); | |
238 | range->slba = cpu_to_le64(nvme_block_nr(ns, blk_rq_pos(req))); | |
239 | ||
240 | memset(cmnd, 0, sizeof(*cmnd)); | |
241 | cmnd->dsm.opcode = nvme_cmd_dsm; | |
242 | cmnd->dsm.nsid = cpu_to_le32(ns->ns_id); | |
243 | cmnd->dsm.nr = 0; | |
244 | cmnd->dsm.attributes = cpu_to_le32(NVME_DSMGMT_AD); | |
245 | ||
246 | req->completion_data = range; | |
247 | page = virt_to_page(range); | |
248 | offset = offset_in_page(range); | |
249 | blk_add_request_payload(req, page, offset, sizeof(*range)); | |
250 | ||
251 | /* | |
252 | * we set __data_len back to the size of the area to be discarded | |
253 | * on disk. This allows us to report completion on the full amount | |
254 | * of blocks described by the request. | |
255 | */ | |
256 | req->__data_len = nr_bytes; | |
257 | ||
258 | return 0; | |
259 | } | |
260 | ||
261 | static inline void nvme_setup_rw(struct nvme_ns *ns, struct request *req, | |
262 | struct nvme_command *cmnd) | |
263 | { | |
264 | u16 control = 0; | |
265 | u32 dsmgmt = 0; | |
266 | ||
267 | if (req->cmd_flags & REQ_FUA) | |
268 | control |= NVME_RW_FUA; | |
269 | if (req->cmd_flags & (REQ_FAILFAST_DEV | REQ_RAHEAD)) | |
270 | control |= NVME_RW_LR; | |
271 | ||
272 | if (req->cmd_flags & REQ_RAHEAD) | |
273 | dsmgmt |= NVME_RW_DSM_FREQ_PREFETCH; | |
274 | ||
275 | memset(cmnd, 0, sizeof(*cmnd)); | |
276 | cmnd->rw.opcode = (rq_data_dir(req) ? nvme_cmd_write : nvme_cmd_read); | |
277 | cmnd->rw.command_id = req->tag; | |
278 | cmnd->rw.nsid = cpu_to_le32(ns->ns_id); | |
279 | cmnd->rw.slba = cpu_to_le64(nvme_block_nr(ns, blk_rq_pos(req))); | |
280 | cmnd->rw.length = cpu_to_le16((blk_rq_bytes(req) >> ns->lba_shift) - 1); | |
281 | ||
282 | if (ns->ms) { | |
283 | switch (ns->pi_type) { | |
284 | case NVME_NS_DPS_PI_TYPE3: | |
285 | control |= NVME_RW_PRINFO_PRCHK_GUARD; | |
286 | break; | |
287 | case NVME_NS_DPS_PI_TYPE1: | |
288 | case NVME_NS_DPS_PI_TYPE2: | |
289 | control |= NVME_RW_PRINFO_PRCHK_GUARD | | |
290 | NVME_RW_PRINFO_PRCHK_REF; | |
291 | cmnd->rw.reftag = cpu_to_le32( | |
292 | nvme_block_nr(ns, blk_rq_pos(req))); | |
293 | break; | |
294 | } | |
295 | if (!blk_integrity_rq(req)) | |
296 | control |= NVME_RW_PRINFO_PRACT; | |
297 | } | |
298 | ||
299 | cmnd->rw.control = cpu_to_le16(control); | |
300 | cmnd->rw.dsmgmt = cpu_to_le32(dsmgmt); | |
301 | } | |
302 | ||
303 | int nvme_setup_cmd(struct nvme_ns *ns, struct request *req, | |
304 | struct nvme_command *cmd) | |
305 | { | |
306 | int ret = 0; | |
307 | ||
308 | if (req->cmd_type == REQ_TYPE_DRV_PRIV) | |
309 | memcpy(cmd, req->cmd, sizeof(*cmd)); | |
3a5e02ce | 310 | else if (req_op(req) == REQ_OP_FLUSH) |
8093f7ca | 311 | nvme_setup_flush(ns, cmd); |
c2df40df | 312 | else if (req_op(req) == REQ_OP_DISCARD) |
8093f7ca ML |
313 | ret = nvme_setup_discard(ns, req, cmd); |
314 | else | |
315 | nvme_setup_rw(ns, req, cmd); | |
316 | ||
317 | return ret; | |
318 | } | |
319 | EXPORT_SYMBOL_GPL(nvme_setup_cmd); | |
320 | ||
4160982e CH |
321 | /* |
322 | * Returns 0 on success. If the result is negative, it's a Linux error code; | |
323 | * if the result is positive, it's an NVM Express status code | |
324 | */ | |
325 | int __nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd, | |
1cb3cce5 CH |
326 | struct nvme_completion *cqe, void *buffer, unsigned bufflen, |
327 | unsigned timeout) | |
4160982e CH |
328 | { |
329 | struct request *req; | |
330 | int ret; | |
331 | ||
332 | req = nvme_alloc_request(q, cmd, 0); | |
333 | if (IS_ERR(req)) | |
334 | return PTR_ERR(req); | |
335 | ||
336 | req->timeout = timeout ? timeout : ADMIN_TIMEOUT; | |
1cb3cce5 | 337 | req->special = cqe; |
4160982e | 338 | |
21d34711 CH |
339 | if (buffer && bufflen) { |
340 | ret = blk_rq_map_kern(q, req, buffer, bufflen, GFP_KERNEL); | |
341 | if (ret) | |
342 | goto out; | |
4160982e CH |
343 | } |
344 | ||
345 | blk_execute_rq(req->q, NULL, req, 0); | |
4160982e CH |
346 | ret = req->errors; |
347 | out: | |
348 | blk_mq_free_request(req); | |
349 | return ret; | |
350 | } | |
351 | ||
352 | int nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd, | |
353 | void *buffer, unsigned bufflen) | |
354 | { | |
1cb3cce5 | 355 | return __nvme_submit_sync_cmd(q, cmd, NULL, buffer, bufflen, 0); |
4160982e | 356 | } |
576d55d6 | 357 | EXPORT_SYMBOL_GPL(nvme_submit_sync_cmd); |
4160982e | 358 | |
0b7f1f26 KB |
359 | int __nvme_submit_user_cmd(struct request_queue *q, struct nvme_command *cmd, |
360 | void __user *ubuffer, unsigned bufflen, | |
361 | void __user *meta_buffer, unsigned meta_len, u32 meta_seed, | |
362 | u32 *result, unsigned timeout) | |
4160982e | 363 | { |
0b7f1f26 | 364 | bool write = cmd->common.opcode & 1; |
1cb3cce5 | 365 | struct nvme_completion cqe; |
0b7f1f26 KB |
366 | struct nvme_ns *ns = q->queuedata; |
367 | struct gendisk *disk = ns ? ns->disk : NULL; | |
4160982e | 368 | struct request *req; |
0b7f1f26 KB |
369 | struct bio *bio = NULL; |
370 | void *meta = NULL; | |
4160982e CH |
371 | int ret; |
372 | ||
373 | req = nvme_alloc_request(q, cmd, 0); | |
374 | if (IS_ERR(req)) | |
375 | return PTR_ERR(req); | |
376 | ||
377 | req->timeout = timeout ? timeout : ADMIN_TIMEOUT; | |
1cb3cce5 | 378 | req->special = &cqe; |
4160982e CH |
379 | |
380 | if (ubuffer && bufflen) { | |
21d34711 CH |
381 | ret = blk_rq_map_user(q, req, NULL, ubuffer, bufflen, |
382 | GFP_KERNEL); | |
383 | if (ret) | |
384 | goto out; | |
385 | bio = req->bio; | |
21d34711 | 386 | |
0b7f1f26 KB |
387 | if (!disk) |
388 | goto submit; | |
389 | bio->bi_bdev = bdget_disk(disk, 0); | |
390 | if (!bio->bi_bdev) { | |
391 | ret = -ENODEV; | |
392 | goto out_unmap; | |
393 | } | |
394 | ||
e9fc63d6 | 395 | if (meta_buffer && meta_len) { |
0b7f1f26 KB |
396 | struct bio_integrity_payload *bip; |
397 | ||
398 | meta = kmalloc(meta_len, GFP_KERNEL); | |
399 | if (!meta) { | |
400 | ret = -ENOMEM; | |
401 | goto out_unmap; | |
402 | } | |
403 | ||
404 | if (write) { | |
405 | if (copy_from_user(meta, meta_buffer, | |
406 | meta_len)) { | |
407 | ret = -EFAULT; | |
408 | goto out_free_meta; | |
409 | } | |
410 | } | |
411 | ||
412 | bip = bio_integrity_alloc(bio, GFP_KERNEL, 1); | |
06c1e390 KB |
413 | if (IS_ERR(bip)) { |
414 | ret = PTR_ERR(bip); | |
0b7f1f26 KB |
415 | goto out_free_meta; |
416 | } | |
417 | ||
418 | bip->bip_iter.bi_size = meta_len; | |
419 | bip->bip_iter.bi_sector = meta_seed; | |
420 | ||
421 | ret = bio_integrity_add_page(bio, virt_to_page(meta), | |
422 | meta_len, offset_in_page(meta)); | |
423 | if (ret != meta_len) { | |
424 | ret = -ENOMEM; | |
425 | goto out_free_meta; | |
426 | } | |
427 | } | |
428 | } | |
429 | submit: | |
430 | blk_execute_rq(req->q, disk, req, 0); | |
431 | ret = req->errors; | |
21d34711 | 432 | if (result) |
1cb3cce5 | 433 | *result = le32_to_cpu(cqe.result); |
0b7f1f26 KB |
434 | if (meta && !ret && !write) { |
435 | if (copy_to_user(meta_buffer, meta, meta_len)) | |
436 | ret = -EFAULT; | |
437 | } | |
438 | out_free_meta: | |
439 | kfree(meta); | |
440 | out_unmap: | |
441 | if (bio) { | |
442 | if (disk && bio->bi_bdev) | |
443 | bdput(bio->bi_bdev); | |
444 | blk_rq_unmap_user(bio); | |
445 | } | |
21d34711 CH |
446 | out: |
447 | blk_mq_free_request(req); | |
448 | return ret; | |
449 | } | |
450 | ||
0b7f1f26 KB |
451 | int nvme_submit_user_cmd(struct request_queue *q, struct nvme_command *cmd, |
452 | void __user *ubuffer, unsigned bufflen, u32 *result, | |
453 | unsigned timeout) | |
454 | { | |
455 | return __nvme_submit_user_cmd(q, cmd, ubuffer, bufflen, NULL, 0, 0, | |
456 | result, timeout); | |
457 | } | |
458 | ||
1c63dc66 | 459 | int nvme_identify_ctrl(struct nvme_ctrl *dev, struct nvme_id_ctrl **id) |
21d34711 CH |
460 | { |
461 | struct nvme_command c = { }; | |
462 | int error; | |
463 | ||
464 | /* gcc-4.4.4 (at least) has issues with initializers and anon unions */ | |
465 | c.identify.opcode = nvme_admin_identify; | |
466 | c.identify.cns = cpu_to_le32(1); | |
467 | ||
468 | *id = kmalloc(sizeof(struct nvme_id_ctrl), GFP_KERNEL); | |
469 | if (!*id) | |
470 | return -ENOMEM; | |
471 | ||
472 | error = nvme_submit_sync_cmd(dev->admin_q, &c, *id, | |
473 | sizeof(struct nvme_id_ctrl)); | |
474 | if (error) | |
475 | kfree(*id); | |
476 | return error; | |
477 | } | |
478 | ||
540c801c KB |
479 | static int nvme_identify_ns_list(struct nvme_ctrl *dev, unsigned nsid, __le32 *ns_list) |
480 | { | |
481 | struct nvme_command c = { }; | |
482 | ||
483 | c.identify.opcode = nvme_admin_identify; | |
484 | c.identify.cns = cpu_to_le32(2); | |
485 | c.identify.nsid = cpu_to_le32(nsid); | |
486 | return nvme_submit_sync_cmd(dev->admin_q, &c, ns_list, 0x1000); | |
487 | } | |
488 | ||
1c63dc66 | 489 | int nvme_identify_ns(struct nvme_ctrl *dev, unsigned nsid, |
21d34711 CH |
490 | struct nvme_id_ns **id) |
491 | { | |
492 | struct nvme_command c = { }; | |
493 | int error; | |
494 | ||
495 | /* gcc-4.4.4 (at least) has issues with initializers and anon unions */ | |
496 | c.identify.opcode = nvme_admin_identify, | |
497 | c.identify.nsid = cpu_to_le32(nsid), | |
498 | ||
499 | *id = kmalloc(sizeof(struct nvme_id_ns), GFP_KERNEL); | |
500 | if (!*id) | |
501 | return -ENOMEM; | |
502 | ||
503 | error = nvme_submit_sync_cmd(dev->admin_q, &c, *id, | |
504 | sizeof(struct nvme_id_ns)); | |
505 | if (error) | |
506 | kfree(*id); | |
507 | return error; | |
508 | } | |
509 | ||
1c63dc66 | 510 | int nvme_get_features(struct nvme_ctrl *dev, unsigned fid, unsigned nsid, |
21d34711 CH |
511 | dma_addr_t dma_addr, u32 *result) |
512 | { | |
513 | struct nvme_command c; | |
1cb3cce5 CH |
514 | struct nvme_completion cqe; |
515 | int ret; | |
21d34711 CH |
516 | |
517 | memset(&c, 0, sizeof(c)); | |
518 | c.features.opcode = nvme_admin_get_features; | |
519 | c.features.nsid = cpu_to_le32(nsid); | |
520 | c.features.prp1 = cpu_to_le64(dma_addr); | |
521 | c.features.fid = cpu_to_le32(fid); | |
522 | ||
1cb3cce5 CH |
523 | ret = __nvme_submit_sync_cmd(dev->admin_q, &c, &cqe, NULL, 0, 0); |
524 | if (ret >= 0) | |
525 | *result = le32_to_cpu(cqe.result); | |
526 | return ret; | |
21d34711 CH |
527 | } |
528 | ||
1c63dc66 | 529 | int nvme_set_features(struct nvme_ctrl *dev, unsigned fid, unsigned dword11, |
21d34711 CH |
530 | dma_addr_t dma_addr, u32 *result) |
531 | { | |
532 | struct nvme_command c; | |
1cb3cce5 CH |
533 | struct nvme_completion cqe; |
534 | int ret; | |
21d34711 CH |
535 | |
536 | memset(&c, 0, sizeof(c)); | |
537 | c.features.opcode = nvme_admin_set_features; | |
538 | c.features.prp1 = cpu_to_le64(dma_addr); | |
539 | c.features.fid = cpu_to_le32(fid); | |
540 | c.features.dword11 = cpu_to_le32(dword11); | |
541 | ||
1cb3cce5 CH |
542 | ret = __nvme_submit_sync_cmd(dev->admin_q, &c, &cqe, NULL, 0, 0); |
543 | if (ret >= 0) | |
544 | *result = le32_to_cpu(cqe.result); | |
545 | return ret; | |
21d34711 CH |
546 | } |
547 | ||
1c63dc66 | 548 | int nvme_get_log_page(struct nvme_ctrl *dev, struct nvme_smart_log **log) |
21d34711 CH |
549 | { |
550 | struct nvme_command c = { }; | |
551 | int error; | |
552 | ||
553 | c.common.opcode = nvme_admin_get_log_page, | |
554 | c.common.nsid = cpu_to_le32(0xFFFFFFFF), | |
555 | c.common.cdw10[0] = cpu_to_le32( | |
556 | (((sizeof(struct nvme_smart_log) / 4) - 1) << 16) | | |
557 | NVME_LOG_SMART), | |
558 | ||
559 | *log = kmalloc(sizeof(struct nvme_smart_log), GFP_KERNEL); | |
560 | if (!*log) | |
561 | return -ENOMEM; | |
562 | ||
563 | error = nvme_submit_sync_cmd(dev->admin_q, &c, *log, | |
564 | sizeof(struct nvme_smart_log)); | |
565 | if (error) | |
566 | kfree(*log); | |
567 | return error; | |
568 | } | |
1673f1f0 | 569 | |
9a0be7ab CH |
570 | int nvme_set_queue_count(struct nvme_ctrl *ctrl, int *count) |
571 | { | |
572 | u32 q_count = (*count - 1) | ((*count - 1) << 16); | |
573 | u32 result; | |
574 | int status, nr_io_queues; | |
575 | ||
576 | status = nvme_set_features(ctrl, NVME_FEAT_NUM_QUEUES, q_count, 0, | |
577 | &result); | |
578 | if (status) | |
579 | return status; | |
580 | ||
581 | nr_io_queues = min(result & 0xffff, result >> 16) + 1; | |
582 | *count = min(*count, nr_io_queues); | |
583 | return 0; | |
584 | } | |
576d55d6 | 585 | EXPORT_SYMBOL_GPL(nvme_set_queue_count); |
9a0be7ab | 586 | |
1673f1f0 CH |
587 | static int nvme_submit_io(struct nvme_ns *ns, struct nvme_user_io __user *uio) |
588 | { | |
589 | struct nvme_user_io io; | |
590 | struct nvme_command c; | |
591 | unsigned length, meta_len; | |
592 | void __user *metadata; | |
593 | ||
594 | if (copy_from_user(&io, uio, sizeof(io))) | |
595 | return -EFAULT; | |
63088ec7 KB |
596 | if (io.flags) |
597 | return -EINVAL; | |
1673f1f0 CH |
598 | |
599 | switch (io.opcode) { | |
600 | case nvme_cmd_write: | |
601 | case nvme_cmd_read: | |
602 | case nvme_cmd_compare: | |
603 | break; | |
604 | default: | |
605 | return -EINVAL; | |
606 | } | |
607 | ||
608 | length = (io.nblocks + 1) << ns->lba_shift; | |
609 | meta_len = (io.nblocks + 1) * ns->ms; | |
610 | metadata = (void __user *)(uintptr_t)io.metadata; | |
611 | ||
612 | if (ns->ext) { | |
613 | length += meta_len; | |
614 | meta_len = 0; | |
615 | } else if (meta_len) { | |
616 | if ((io.metadata & 3) || !io.metadata) | |
617 | return -EINVAL; | |
618 | } | |
619 | ||
620 | memset(&c, 0, sizeof(c)); | |
621 | c.rw.opcode = io.opcode; | |
622 | c.rw.flags = io.flags; | |
623 | c.rw.nsid = cpu_to_le32(ns->ns_id); | |
624 | c.rw.slba = cpu_to_le64(io.slba); | |
625 | c.rw.length = cpu_to_le16(io.nblocks); | |
626 | c.rw.control = cpu_to_le16(io.control); | |
627 | c.rw.dsmgmt = cpu_to_le32(io.dsmgmt); | |
628 | c.rw.reftag = cpu_to_le32(io.reftag); | |
629 | c.rw.apptag = cpu_to_le16(io.apptag); | |
630 | c.rw.appmask = cpu_to_le16(io.appmask); | |
631 | ||
632 | return __nvme_submit_user_cmd(ns->queue, &c, | |
633 | (void __user *)(uintptr_t)io.addr, length, | |
634 | metadata, meta_len, io.slba, NULL, 0); | |
635 | } | |
636 | ||
f3ca80fc | 637 | static int nvme_user_cmd(struct nvme_ctrl *ctrl, struct nvme_ns *ns, |
1673f1f0 CH |
638 | struct nvme_passthru_cmd __user *ucmd) |
639 | { | |
640 | struct nvme_passthru_cmd cmd; | |
641 | struct nvme_command c; | |
642 | unsigned timeout = 0; | |
643 | int status; | |
644 | ||
645 | if (!capable(CAP_SYS_ADMIN)) | |
646 | return -EACCES; | |
647 | if (copy_from_user(&cmd, ucmd, sizeof(cmd))) | |
648 | return -EFAULT; | |
63088ec7 KB |
649 | if (cmd.flags) |
650 | return -EINVAL; | |
1673f1f0 CH |
651 | |
652 | memset(&c, 0, sizeof(c)); | |
653 | c.common.opcode = cmd.opcode; | |
654 | c.common.flags = cmd.flags; | |
655 | c.common.nsid = cpu_to_le32(cmd.nsid); | |
656 | c.common.cdw2[0] = cpu_to_le32(cmd.cdw2); | |
657 | c.common.cdw2[1] = cpu_to_le32(cmd.cdw3); | |
658 | c.common.cdw10[0] = cpu_to_le32(cmd.cdw10); | |
659 | c.common.cdw10[1] = cpu_to_le32(cmd.cdw11); | |
660 | c.common.cdw10[2] = cpu_to_le32(cmd.cdw12); | |
661 | c.common.cdw10[3] = cpu_to_le32(cmd.cdw13); | |
662 | c.common.cdw10[4] = cpu_to_le32(cmd.cdw14); | |
663 | c.common.cdw10[5] = cpu_to_le32(cmd.cdw15); | |
664 | ||
665 | if (cmd.timeout_ms) | |
666 | timeout = msecs_to_jiffies(cmd.timeout_ms); | |
667 | ||
668 | status = nvme_submit_user_cmd(ns ? ns->queue : ctrl->admin_q, &c, | |
d1ea7be5 | 669 | (void __user *)(uintptr_t)cmd.addr, cmd.data_len, |
1673f1f0 CH |
670 | &cmd.result, timeout); |
671 | if (status >= 0) { | |
672 | if (put_user(cmd.result, &ucmd->result)) | |
673 | return -EFAULT; | |
674 | } | |
675 | ||
676 | return status; | |
677 | } | |
678 | ||
679 | static int nvme_ioctl(struct block_device *bdev, fmode_t mode, | |
680 | unsigned int cmd, unsigned long arg) | |
681 | { | |
682 | struct nvme_ns *ns = bdev->bd_disk->private_data; | |
683 | ||
684 | switch (cmd) { | |
685 | case NVME_IOCTL_ID: | |
686 | force_successful_syscall_return(); | |
687 | return ns->ns_id; | |
688 | case NVME_IOCTL_ADMIN_CMD: | |
689 | return nvme_user_cmd(ns->ctrl, NULL, (void __user *)arg); | |
690 | case NVME_IOCTL_IO_CMD: | |
691 | return nvme_user_cmd(ns->ctrl, ns, (void __user *)arg); | |
692 | case NVME_IOCTL_SUBMIT_IO: | |
693 | return nvme_submit_io(ns, (void __user *)arg); | |
44907332 | 694 | #ifdef CONFIG_BLK_DEV_NVME_SCSI |
1673f1f0 CH |
695 | case SG_GET_VERSION_NUM: |
696 | return nvme_sg_get_version_num((void __user *)arg); | |
697 | case SG_IO: | |
698 | return nvme_sg_io(ns, (void __user *)arg); | |
44907332 | 699 | #endif |
1673f1f0 CH |
700 | default: |
701 | return -ENOTTY; | |
702 | } | |
703 | } | |
704 | ||
705 | #ifdef CONFIG_COMPAT | |
706 | static int nvme_compat_ioctl(struct block_device *bdev, fmode_t mode, | |
707 | unsigned int cmd, unsigned long arg) | |
708 | { | |
709 | switch (cmd) { | |
710 | case SG_IO: | |
711 | return -ENOIOCTLCMD; | |
712 | } | |
713 | return nvme_ioctl(bdev, mode, cmd, arg); | |
714 | } | |
715 | #else | |
716 | #define nvme_compat_ioctl NULL | |
717 | #endif | |
718 | ||
719 | static int nvme_open(struct block_device *bdev, fmode_t mode) | |
720 | { | |
721 | return nvme_get_ns_from_disk(bdev->bd_disk) ? 0 : -ENXIO; | |
722 | } | |
723 | ||
724 | static void nvme_release(struct gendisk *disk, fmode_t mode) | |
725 | { | |
e439bb12 SG |
726 | struct nvme_ns *ns = disk->private_data; |
727 | ||
728 | module_put(ns->ctrl->ops->module); | |
729 | nvme_put_ns(ns); | |
1673f1f0 CH |
730 | } |
731 | ||
732 | static int nvme_getgeo(struct block_device *bdev, struct hd_geometry *geo) | |
733 | { | |
734 | /* some standard values */ | |
735 | geo->heads = 1 << 6; | |
736 | geo->sectors = 1 << 5; | |
737 | geo->cylinders = get_capacity(bdev->bd_disk) >> 11; | |
738 | return 0; | |
739 | } | |
740 | ||
741 | #ifdef CONFIG_BLK_DEV_INTEGRITY | |
742 | static void nvme_init_integrity(struct nvme_ns *ns) | |
743 | { | |
744 | struct blk_integrity integrity; | |
745 | ||
746 | switch (ns->pi_type) { | |
747 | case NVME_NS_DPS_PI_TYPE3: | |
748 | integrity.profile = &t10_pi_type3_crc; | |
ba36c21b NB |
749 | integrity.tag_size = sizeof(u16) + sizeof(u32); |
750 | integrity.flags |= BLK_INTEGRITY_DEVICE_CAPABLE; | |
1673f1f0 CH |
751 | break; |
752 | case NVME_NS_DPS_PI_TYPE1: | |
753 | case NVME_NS_DPS_PI_TYPE2: | |
754 | integrity.profile = &t10_pi_type1_crc; | |
ba36c21b NB |
755 | integrity.tag_size = sizeof(u16); |
756 | integrity.flags |= BLK_INTEGRITY_DEVICE_CAPABLE; | |
1673f1f0 CH |
757 | break; |
758 | default: | |
759 | integrity.profile = NULL; | |
760 | break; | |
761 | } | |
762 | integrity.tuple_size = ns->ms; | |
763 | blk_integrity_register(ns->disk, &integrity); | |
764 | blk_queue_max_integrity_segments(ns->queue, 1); | |
765 | } | |
766 | #else | |
767 | static void nvme_init_integrity(struct nvme_ns *ns) | |
768 | { | |
769 | } | |
770 | #endif /* CONFIG_BLK_DEV_INTEGRITY */ | |
771 | ||
772 | static void nvme_config_discard(struct nvme_ns *ns) | |
773 | { | |
08095e70 | 774 | struct nvme_ctrl *ctrl = ns->ctrl; |
1673f1f0 | 775 | u32 logical_block_size = queue_logical_block_size(ns->queue); |
08095e70 KB |
776 | |
777 | if (ctrl->quirks & NVME_QUIRK_DISCARD_ZEROES) | |
778 | ns->queue->limits.discard_zeroes_data = 1; | |
779 | else | |
780 | ns->queue->limits.discard_zeroes_data = 0; | |
781 | ||
1673f1f0 CH |
782 | ns->queue->limits.discard_alignment = logical_block_size; |
783 | ns->queue->limits.discard_granularity = logical_block_size; | |
784 | blk_queue_max_discard_sectors(ns->queue, 0xffffffff); | |
785 | queue_flag_set_unlocked(QUEUE_FLAG_DISCARD, ns->queue); | |
786 | } | |
787 | ||
5bae7f73 | 788 | static int nvme_revalidate_disk(struct gendisk *disk) |
1673f1f0 CH |
789 | { |
790 | struct nvme_ns *ns = disk->private_data; | |
791 | struct nvme_id_ns *id; | |
792 | u8 lbaf, pi_type; | |
793 | u16 old_ms; | |
794 | unsigned short bs; | |
795 | ||
69d9a99c KB |
796 | if (test_bit(NVME_NS_DEAD, &ns->flags)) { |
797 | set_capacity(disk, 0); | |
798 | return -ENODEV; | |
799 | } | |
1673f1f0 | 800 | if (nvme_identify_ns(ns->ctrl, ns->ns_id, &id)) { |
1b3c47c1 SG |
801 | dev_warn(disk_to_dev(ns->disk), "%s: Identify failure\n", |
802 | __func__); | |
1673f1f0 CH |
803 | return -ENODEV; |
804 | } | |
805 | if (id->ncap == 0) { | |
806 | kfree(id); | |
807 | return -ENODEV; | |
808 | } | |
809 | ||
810 | if (nvme_nvm_ns_supported(ns, id) && ns->type != NVME_NS_LIGHTNVM) { | |
811 | if (nvme_nvm_register(ns->queue, disk->disk_name)) { | |
1b3c47c1 | 812 | dev_warn(disk_to_dev(ns->disk), |
1673f1f0 CH |
813 | "%s: LightNVM init failure\n", __func__); |
814 | kfree(id); | |
815 | return -ENODEV; | |
816 | } | |
817 | ns->type = NVME_NS_LIGHTNVM; | |
818 | } | |
819 | ||
2b9b6e86 KB |
820 | if (ns->ctrl->vs >= NVME_VS(1, 1)) |
821 | memcpy(ns->eui, id->eui64, sizeof(ns->eui)); | |
822 | if (ns->ctrl->vs >= NVME_VS(1, 2)) | |
823 | memcpy(ns->uuid, id->nguid, sizeof(ns->uuid)); | |
824 | ||
1673f1f0 CH |
825 | old_ms = ns->ms; |
826 | lbaf = id->flbas & NVME_NS_FLBAS_LBA_MASK; | |
827 | ns->lba_shift = id->lbaf[lbaf].ds; | |
828 | ns->ms = le16_to_cpu(id->lbaf[lbaf].ms); | |
829 | ns->ext = ns->ms && (id->flbas & NVME_NS_FLBAS_META_EXT); | |
830 | ||
831 | /* | |
832 | * If identify namespace failed, use default 512 byte block size so | |
833 | * block layer can use before failing read/write for 0 capacity. | |
834 | */ | |
835 | if (ns->lba_shift == 0) | |
836 | ns->lba_shift = 9; | |
837 | bs = 1 << ns->lba_shift; | |
1673f1f0 CH |
838 | /* XXX: PI implementation requires metadata equal t10 pi tuple size */ |
839 | pi_type = ns->ms == sizeof(struct t10_pi_tuple) ? | |
840 | id->dps & NVME_NS_DPS_PI_MASK : 0; | |
841 | ||
842 | blk_mq_freeze_queue(disk->queue); | |
843 | if (blk_get_integrity(disk) && (ns->pi_type != pi_type || | |
844 | ns->ms != old_ms || | |
845 | bs != queue_logical_block_size(disk->queue) || | |
846 | (ns->ms && ns->ext))) | |
847 | blk_integrity_unregister(disk); | |
848 | ||
849 | ns->pi_type = pi_type; | |
850 | blk_queue_logical_block_size(ns->queue, bs); | |
851 | ||
4b9d5b15 | 852 | if (ns->ms && !blk_get_integrity(disk) && !ns->ext) |
1673f1f0 | 853 | nvme_init_integrity(ns); |
1673f1f0 CH |
854 | if (ns->ms && !(ns->ms == 8 && ns->pi_type) && !blk_get_integrity(disk)) |
855 | set_capacity(disk, 0); | |
856 | else | |
857 | set_capacity(disk, le64_to_cpup(&id->nsze) << (ns->lba_shift - 9)); | |
858 | ||
859 | if (ns->ctrl->oncs & NVME_CTRL_ONCS_DSM) | |
860 | nvme_config_discard(ns); | |
861 | blk_mq_unfreeze_queue(disk->queue); | |
862 | ||
863 | kfree(id); | |
864 | return 0; | |
865 | } | |
866 | ||
867 | static char nvme_pr_type(enum pr_type type) | |
868 | { | |
869 | switch (type) { | |
870 | case PR_WRITE_EXCLUSIVE: | |
871 | return 1; | |
872 | case PR_EXCLUSIVE_ACCESS: | |
873 | return 2; | |
874 | case PR_WRITE_EXCLUSIVE_REG_ONLY: | |
875 | return 3; | |
876 | case PR_EXCLUSIVE_ACCESS_REG_ONLY: | |
877 | return 4; | |
878 | case PR_WRITE_EXCLUSIVE_ALL_REGS: | |
879 | return 5; | |
880 | case PR_EXCLUSIVE_ACCESS_ALL_REGS: | |
881 | return 6; | |
882 | default: | |
883 | return 0; | |
884 | } | |
885 | }; | |
886 | ||
887 | static int nvme_pr_command(struct block_device *bdev, u32 cdw10, | |
888 | u64 key, u64 sa_key, u8 op) | |
889 | { | |
890 | struct nvme_ns *ns = bdev->bd_disk->private_data; | |
891 | struct nvme_command c; | |
892 | u8 data[16] = { 0, }; | |
893 | ||
894 | put_unaligned_le64(key, &data[0]); | |
895 | put_unaligned_le64(sa_key, &data[8]); | |
896 | ||
897 | memset(&c, 0, sizeof(c)); | |
898 | c.common.opcode = op; | |
899 | c.common.nsid = cpu_to_le32(ns->ns_id); | |
900 | c.common.cdw10[0] = cpu_to_le32(cdw10); | |
901 | ||
902 | return nvme_submit_sync_cmd(ns->queue, &c, data, 16); | |
903 | } | |
904 | ||
905 | static int nvme_pr_register(struct block_device *bdev, u64 old, | |
906 | u64 new, unsigned flags) | |
907 | { | |
908 | u32 cdw10; | |
909 | ||
910 | if (flags & ~PR_FL_IGNORE_KEY) | |
911 | return -EOPNOTSUPP; | |
912 | ||
913 | cdw10 = old ? 2 : 0; | |
914 | cdw10 |= (flags & PR_FL_IGNORE_KEY) ? 1 << 3 : 0; | |
915 | cdw10 |= (1 << 30) | (1 << 31); /* PTPL=1 */ | |
916 | return nvme_pr_command(bdev, cdw10, old, new, nvme_cmd_resv_register); | |
917 | } | |
918 | ||
919 | static int nvme_pr_reserve(struct block_device *bdev, u64 key, | |
920 | enum pr_type type, unsigned flags) | |
921 | { | |
922 | u32 cdw10; | |
923 | ||
924 | if (flags & ~PR_FL_IGNORE_KEY) | |
925 | return -EOPNOTSUPP; | |
926 | ||
927 | cdw10 = nvme_pr_type(type) << 8; | |
928 | cdw10 |= ((flags & PR_FL_IGNORE_KEY) ? 1 << 3 : 0); | |
929 | return nvme_pr_command(bdev, cdw10, key, 0, nvme_cmd_resv_acquire); | |
930 | } | |
931 | ||
932 | static int nvme_pr_preempt(struct block_device *bdev, u64 old, u64 new, | |
933 | enum pr_type type, bool abort) | |
934 | { | |
935 | u32 cdw10 = nvme_pr_type(type) << 8 | abort ? 2 : 1; | |
936 | return nvme_pr_command(bdev, cdw10, old, new, nvme_cmd_resv_acquire); | |
937 | } | |
938 | ||
939 | static int nvme_pr_clear(struct block_device *bdev, u64 key) | |
940 | { | |
8c0b3915 | 941 | u32 cdw10 = 1 | (key ? 1 << 3 : 0); |
1673f1f0 CH |
942 | return nvme_pr_command(bdev, cdw10, key, 0, nvme_cmd_resv_register); |
943 | } | |
944 | ||
945 | static int nvme_pr_release(struct block_device *bdev, u64 key, enum pr_type type) | |
946 | { | |
947 | u32 cdw10 = nvme_pr_type(type) << 8 | key ? 1 << 3 : 0; | |
948 | return nvme_pr_command(bdev, cdw10, key, 0, nvme_cmd_resv_release); | |
949 | } | |
950 | ||
951 | static const struct pr_ops nvme_pr_ops = { | |
952 | .pr_register = nvme_pr_register, | |
953 | .pr_reserve = nvme_pr_reserve, | |
954 | .pr_release = nvme_pr_release, | |
955 | .pr_preempt = nvme_pr_preempt, | |
956 | .pr_clear = nvme_pr_clear, | |
957 | }; | |
958 | ||
5bae7f73 | 959 | static const struct block_device_operations nvme_fops = { |
1673f1f0 CH |
960 | .owner = THIS_MODULE, |
961 | .ioctl = nvme_ioctl, | |
962 | .compat_ioctl = nvme_compat_ioctl, | |
963 | .open = nvme_open, | |
964 | .release = nvme_release, | |
965 | .getgeo = nvme_getgeo, | |
966 | .revalidate_disk= nvme_revalidate_disk, | |
967 | .pr_ops = &nvme_pr_ops, | |
968 | }; | |
969 | ||
5fd4ce1b CH |
970 | static int nvme_wait_ready(struct nvme_ctrl *ctrl, u64 cap, bool enabled) |
971 | { | |
972 | unsigned long timeout = | |
973 | ((NVME_CAP_TIMEOUT(cap) + 1) * HZ / 2) + jiffies; | |
974 | u32 csts, bit = enabled ? NVME_CSTS_RDY : 0; | |
975 | int ret; | |
976 | ||
977 | while ((ret = ctrl->ops->reg_read32(ctrl, NVME_REG_CSTS, &csts)) == 0) { | |
978 | if ((csts & NVME_CSTS_RDY) == bit) | |
979 | break; | |
980 | ||
981 | msleep(100); | |
982 | if (fatal_signal_pending(current)) | |
983 | return -EINTR; | |
984 | if (time_after(jiffies, timeout)) { | |
1b3c47c1 | 985 | dev_err(ctrl->device, |
5fd4ce1b CH |
986 | "Device not ready; aborting %s\n", enabled ? |
987 | "initialisation" : "reset"); | |
988 | return -ENODEV; | |
989 | } | |
990 | } | |
991 | ||
992 | return ret; | |
993 | } | |
994 | ||
995 | /* | |
996 | * If the device has been passed off to us in an enabled state, just clear | |
997 | * the enabled bit. The spec says we should set the 'shutdown notification | |
998 | * bits', but doing so may cause the device to complete commands to the | |
999 | * admin queue ... and we don't know what memory that might be pointing at! | |
1000 | */ | |
1001 | int nvme_disable_ctrl(struct nvme_ctrl *ctrl, u64 cap) | |
1002 | { | |
1003 | int ret; | |
1004 | ||
1005 | ctrl->ctrl_config &= ~NVME_CC_SHN_MASK; | |
1006 | ctrl->ctrl_config &= ~NVME_CC_ENABLE; | |
1007 | ||
1008 | ret = ctrl->ops->reg_write32(ctrl, NVME_REG_CC, ctrl->ctrl_config); | |
1009 | if (ret) | |
1010 | return ret; | |
1011 | return nvme_wait_ready(ctrl, cap, false); | |
1012 | } | |
576d55d6 | 1013 | EXPORT_SYMBOL_GPL(nvme_disable_ctrl); |
5fd4ce1b CH |
1014 | |
1015 | int nvme_enable_ctrl(struct nvme_ctrl *ctrl, u64 cap) | |
1016 | { | |
1017 | /* | |
1018 | * Default to a 4K page size, with the intention to update this | |
1019 | * path in the future to accomodate architectures with differing | |
1020 | * kernel and IO page sizes. | |
1021 | */ | |
1022 | unsigned dev_page_min = NVME_CAP_MPSMIN(cap) + 12, page_shift = 12; | |
1023 | int ret; | |
1024 | ||
1025 | if (page_shift < dev_page_min) { | |
1b3c47c1 | 1026 | dev_err(ctrl->device, |
5fd4ce1b CH |
1027 | "Minimum device page size %u too large for host (%u)\n", |
1028 | 1 << dev_page_min, 1 << page_shift); | |
1029 | return -ENODEV; | |
1030 | } | |
1031 | ||
1032 | ctrl->page_size = 1 << page_shift; | |
1033 | ||
1034 | ctrl->ctrl_config = NVME_CC_CSS_NVM; | |
1035 | ctrl->ctrl_config |= (page_shift - 12) << NVME_CC_MPS_SHIFT; | |
1036 | ctrl->ctrl_config |= NVME_CC_ARB_RR | NVME_CC_SHN_NONE; | |
1037 | ctrl->ctrl_config |= NVME_CC_IOSQES | NVME_CC_IOCQES; | |
1038 | ctrl->ctrl_config |= NVME_CC_ENABLE; | |
1039 | ||
1040 | ret = ctrl->ops->reg_write32(ctrl, NVME_REG_CC, ctrl->ctrl_config); | |
1041 | if (ret) | |
1042 | return ret; | |
1043 | return nvme_wait_ready(ctrl, cap, true); | |
1044 | } | |
576d55d6 | 1045 | EXPORT_SYMBOL_GPL(nvme_enable_ctrl); |
5fd4ce1b CH |
1046 | |
1047 | int nvme_shutdown_ctrl(struct nvme_ctrl *ctrl) | |
1048 | { | |
1049 | unsigned long timeout = SHUTDOWN_TIMEOUT + jiffies; | |
1050 | u32 csts; | |
1051 | int ret; | |
1052 | ||
1053 | ctrl->ctrl_config &= ~NVME_CC_SHN_MASK; | |
1054 | ctrl->ctrl_config |= NVME_CC_SHN_NORMAL; | |
1055 | ||
1056 | ret = ctrl->ops->reg_write32(ctrl, NVME_REG_CC, ctrl->ctrl_config); | |
1057 | if (ret) | |
1058 | return ret; | |
1059 | ||
1060 | while ((ret = ctrl->ops->reg_read32(ctrl, NVME_REG_CSTS, &csts)) == 0) { | |
1061 | if ((csts & NVME_CSTS_SHST_MASK) == NVME_CSTS_SHST_CMPLT) | |
1062 | break; | |
1063 | ||
1064 | msleep(100); | |
1065 | if (fatal_signal_pending(current)) | |
1066 | return -EINTR; | |
1067 | if (time_after(jiffies, timeout)) { | |
1b3c47c1 | 1068 | dev_err(ctrl->device, |
5fd4ce1b CH |
1069 | "Device shutdown incomplete; abort shutdown\n"); |
1070 | return -ENODEV; | |
1071 | } | |
1072 | } | |
1073 | ||
1074 | return ret; | |
1075 | } | |
576d55d6 | 1076 | EXPORT_SYMBOL_GPL(nvme_shutdown_ctrl); |
5fd4ce1b | 1077 | |
da35825d CH |
1078 | static void nvme_set_queue_limits(struct nvme_ctrl *ctrl, |
1079 | struct request_queue *q) | |
1080 | { | |
7c88cb00 JA |
1081 | bool vwc = false; |
1082 | ||
da35825d | 1083 | if (ctrl->max_hw_sectors) { |
45686b61 CH |
1084 | u32 max_segments = |
1085 | (ctrl->max_hw_sectors / (ctrl->page_size >> 9)) + 1; | |
1086 | ||
da35825d | 1087 | blk_queue_max_hw_sectors(q, ctrl->max_hw_sectors); |
45686b61 | 1088 | blk_queue_max_segments(q, min_t(u32, max_segments, USHRT_MAX)); |
da35825d CH |
1089 | } |
1090 | if (ctrl->stripe_size) | |
1091 | blk_queue_chunk_sectors(q, ctrl->stripe_size >> 9); | |
da35825d | 1092 | blk_queue_virt_boundary(q, ctrl->page_size - 1); |
7c88cb00 JA |
1093 | if (ctrl->vwc & NVME_CTRL_VWC_PRESENT) |
1094 | vwc = true; | |
1095 | blk_queue_write_cache(q, vwc, vwc); | |
da35825d CH |
1096 | } |
1097 | ||
7fd8930f CH |
1098 | /* |
1099 | * Initialize the cached copies of the Identify data and various controller | |
1100 | * register in our nvme_ctrl structure. This should be called as soon as | |
1101 | * the admin queue is fully up and running. | |
1102 | */ | |
1103 | int nvme_init_identify(struct nvme_ctrl *ctrl) | |
1104 | { | |
1105 | struct nvme_id_ctrl *id; | |
1106 | u64 cap; | |
1107 | int ret, page_shift; | |
1108 | ||
f3ca80fc CH |
1109 | ret = ctrl->ops->reg_read32(ctrl, NVME_REG_VS, &ctrl->vs); |
1110 | if (ret) { | |
1b3c47c1 | 1111 | dev_err(ctrl->device, "Reading VS failed (%d)\n", ret); |
f3ca80fc CH |
1112 | return ret; |
1113 | } | |
1114 | ||
7fd8930f CH |
1115 | ret = ctrl->ops->reg_read64(ctrl, NVME_REG_CAP, &cap); |
1116 | if (ret) { | |
1b3c47c1 | 1117 | dev_err(ctrl->device, "Reading CAP failed (%d)\n", ret); |
7fd8930f CH |
1118 | return ret; |
1119 | } | |
1120 | page_shift = NVME_CAP_MPSMIN(cap) + 12; | |
1121 | ||
f3ca80fc CH |
1122 | if (ctrl->vs >= NVME_VS(1, 1)) |
1123 | ctrl->subsystem = NVME_CAP_NSSRC(cap); | |
1124 | ||
7fd8930f CH |
1125 | ret = nvme_identify_ctrl(ctrl, &id); |
1126 | if (ret) { | |
1b3c47c1 | 1127 | dev_err(ctrl->device, "Identify Controller failed (%d)\n", ret); |
7fd8930f CH |
1128 | return -EIO; |
1129 | } | |
1130 | ||
118472ab | 1131 | ctrl->vid = le16_to_cpu(id->vid); |
7fd8930f | 1132 | ctrl->oncs = le16_to_cpup(&id->oncs); |
6bf25d16 | 1133 | atomic_set(&ctrl->abort_limit, id->acl + 1); |
7fd8930f | 1134 | ctrl->vwc = id->vwc; |
931e1c22 | 1135 | ctrl->cntlid = le16_to_cpup(&id->cntlid); |
7fd8930f CH |
1136 | memcpy(ctrl->serial, id->sn, sizeof(id->sn)); |
1137 | memcpy(ctrl->model, id->mn, sizeof(id->mn)); | |
1138 | memcpy(ctrl->firmware_rev, id->fr, sizeof(id->fr)); | |
1139 | if (id->mdts) | |
1140 | ctrl->max_hw_sectors = 1 << (id->mdts + page_shift - 9); | |
1141 | else | |
1142 | ctrl->max_hw_sectors = UINT_MAX; | |
1143 | ||
1144 | if ((ctrl->quirks & NVME_QUIRK_STRIPE_SIZE) && id->vs[3]) { | |
1145 | unsigned int max_hw_sectors; | |
1146 | ||
1147 | ctrl->stripe_size = 1 << (id->vs[3] + page_shift); | |
1148 | max_hw_sectors = ctrl->stripe_size >> (page_shift - 9); | |
1149 | if (ctrl->max_hw_sectors) { | |
1150 | ctrl->max_hw_sectors = min(max_hw_sectors, | |
1151 | ctrl->max_hw_sectors); | |
1152 | } else { | |
1153 | ctrl->max_hw_sectors = max_hw_sectors; | |
1154 | } | |
1155 | } | |
1156 | ||
da35825d CH |
1157 | nvme_set_queue_limits(ctrl, ctrl->admin_q); |
1158 | ||
7fd8930f CH |
1159 | kfree(id); |
1160 | return 0; | |
1161 | } | |
576d55d6 | 1162 | EXPORT_SYMBOL_GPL(nvme_init_identify); |
7fd8930f | 1163 | |
f3ca80fc | 1164 | static int nvme_dev_open(struct inode *inode, struct file *file) |
1673f1f0 | 1165 | { |
f3ca80fc CH |
1166 | struct nvme_ctrl *ctrl; |
1167 | int instance = iminor(inode); | |
1168 | int ret = -ENODEV; | |
1673f1f0 | 1169 | |
f3ca80fc CH |
1170 | spin_lock(&dev_list_lock); |
1171 | list_for_each_entry(ctrl, &nvme_ctrl_list, node) { | |
1172 | if (ctrl->instance != instance) | |
1173 | continue; | |
1174 | ||
1175 | if (!ctrl->admin_q) { | |
1176 | ret = -EWOULDBLOCK; | |
1177 | break; | |
1178 | } | |
1179 | if (!kref_get_unless_zero(&ctrl->kref)) | |
1180 | break; | |
1181 | file->private_data = ctrl; | |
1182 | ret = 0; | |
1183 | break; | |
1184 | } | |
1185 | spin_unlock(&dev_list_lock); | |
1186 | ||
1187 | return ret; | |
1673f1f0 CH |
1188 | } |
1189 | ||
f3ca80fc | 1190 | static int nvme_dev_release(struct inode *inode, struct file *file) |
1673f1f0 | 1191 | { |
f3ca80fc CH |
1192 | nvme_put_ctrl(file->private_data); |
1193 | return 0; | |
1194 | } | |
1195 | ||
bfd89471 CH |
1196 | static int nvme_dev_user_cmd(struct nvme_ctrl *ctrl, void __user *argp) |
1197 | { | |
1198 | struct nvme_ns *ns; | |
1199 | int ret; | |
1200 | ||
1201 | mutex_lock(&ctrl->namespaces_mutex); | |
1202 | if (list_empty(&ctrl->namespaces)) { | |
1203 | ret = -ENOTTY; | |
1204 | goto out_unlock; | |
1205 | } | |
1206 | ||
1207 | ns = list_first_entry(&ctrl->namespaces, struct nvme_ns, list); | |
1208 | if (ns != list_last_entry(&ctrl->namespaces, struct nvme_ns, list)) { | |
1b3c47c1 | 1209 | dev_warn(ctrl->device, |
bfd89471 CH |
1210 | "NVME_IOCTL_IO_CMD not supported when multiple namespaces present!\n"); |
1211 | ret = -EINVAL; | |
1212 | goto out_unlock; | |
1213 | } | |
1214 | ||
1b3c47c1 | 1215 | dev_warn(ctrl->device, |
bfd89471 CH |
1216 | "using deprecated NVME_IOCTL_IO_CMD ioctl on the char device!\n"); |
1217 | kref_get(&ns->kref); | |
1218 | mutex_unlock(&ctrl->namespaces_mutex); | |
1219 | ||
1220 | ret = nvme_user_cmd(ctrl, ns, argp); | |
1221 | nvme_put_ns(ns); | |
1222 | return ret; | |
1223 | ||
1224 | out_unlock: | |
1225 | mutex_unlock(&ctrl->namespaces_mutex); | |
1226 | return ret; | |
1227 | } | |
1228 | ||
f3ca80fc CH |
1229 | static long nvme_dev_ioctl(struct file *file, unsigned int cmd, |
1230 | unsigned long arg) | |
1231 | { | |
1232 | struct nvme_ctrl *ctrl = file->private_data; | |
1233 | void __user *argp = (void __user *)arg; | |
f3ca80fc CH |
1234 | |
1235 | switch (cmd) { | |
1236 | case NVME_IOCTL_ADMIN_CMD: | |
1237 | return nvme_user_cmd(ctrl, NULL, argp); | |
1238 | case NVME_IOCTL_IO_CMD: | |
bfd89471 | 1239 | return nvme_dev_user_cmd(ctrl, argp); |
f3ca80fc | 1240 | case NVME_IOCTL_RESET: |
1b3c47c1 | 1241 | dev_warn(ctrl->device, "resetting controller\n"); |
f3ca80fc CH |
1242 | return ctrl->ops->reset_ctrl(ctrl); |
1243 | case NVME_IOCTL_SUBSYS_RESET: | |
1244 | return nvme_reset_subsystem(ctrl); | |
9ec3bb2f KB |
1245 | case NVME_IOCTL_RESCAN: |
1246 | nvme_queue_scan(ctrl); | |
1247 | return 0; | |
f3ca80fc CH |
1248 | default: |
1249 | return -ENOTTY; | |
1250 | } | |
1251 | } | |
1252 | ||
1253 | static const struct file_operations nvme_dev_fops = { | |
1254 | .owner = THIS_MODULE, | |
1255 | .open = nvme_dev_open, | |
1256 | .release = nvme_dev_release, | |
1257 | .unlocked_ioctl = nvme_dev_ioctl, | |
1258 | .compat_ioctl = nvme_dev_ioctl, | |
1259 | }; | |
1260 | ||
1261 | static ssize_t nvme_sysfs_reset(struct device *dev, | |
1262 | struct device_attribute *attr, const char *buf, | |
1263 | size_t count) | |
1264 | { | |
1265 | struct nvme_ctrl *ctrl = dev_get_drvdata(dev); | |
1266 | int ret; | |
1267 | ||
1268 | ret = ctrl->ops->reset_ctrl(ctrl); | |
1269 | if (ret < 0) | |
1270 | return ret; | |
1271 | return count; | |
1673f1f0 | 1272 | } |
f3ca80fc | 1273 | static DEVICE_ATTR(reset_controller, S_IWUSR, NULL, nvme_sysfs_reset); |
1673f1f0 | 1274 | |
9ec3bb2f KB |
1275 | static ssize_t nvme_sysfs_rescan(struct device *dev, |
1276 | struct device_attribute *attr, const char *buf, | |
1277 | size_t count) | |
1278 | { | |
1279 | struct nvme_ctrl *ctrl = dev_get_drvdata(dev); | |
1280 | ||
1281 | nvme_queue_scan(ctrl); | |
1282 | return count; | |
1283 | } | |
1284 | static DEVICE_ATTR(rescan_controller, S_IWUSR, NULL, nvme_sysfs_rescan); | |
1285 | ||
118472ab KB |
1286 | static ssize_t wwid_show(struct device *dev, struct device_attribute *attr, |
1287 | char *buf) | |
1288 | { | |
1289 | struct nvme_ns *ns = dev_to_disk(dev)->private_data; | |
1290 | struct nvme_ctrl *ctrl = ns->ctrl; | |
1291 | int serial_len = sizeof(ctrl->serial); | |
1292 | int model_len = sizeof(ctrl->model); | |
1293 | ||
1294 | if (memchr_inv(ns->uuid, 0, sizeof(ns->uuid))) | |
1295 | return sprintf(buf, "eui.%16phN\n", ns->uuid); | |
1296 | ||
1297 | if (memchr_inv(ns->eui, 0, sizeof(ns->eui))) | |
1298 | return sprintf(buf, "eui.%8phN\n", ns->eui); | |
1299 | ||
1300 | while (ctrl->serial[serial_len - 1] == ' ') | |
1301 | serial_len--; | |
1302 | while (ctrl->model[model_len - 1] == ' ') | |
1303 | model_len--; | |
1304 | ||
1305 | return sprintf(buf, "nvme.%04x-%*phN-%*phN-%08x\n", ctrl->vid, | |
1306 | serial_len, ctrl->serial, model_len, ctrl->model, ns->ns_id); | |
1307 | } | |
1308 | static DEVICE_ATTR(wwid, S_IRUGO, wwid_show, NULL); | |
1309 | ||
2b9b6e86 KB |
1310 | static ssize_t uuid_show(struct device *dev, struct device_attribute *attr, |
1311 | char *buf) | |
1312 | { | |
1313 | struct nvme_ns *ns = dev_to_disk(dev)->private_data; | |
1314 | return sprintf(buf, "%pU\n", ns->uuid); | |
1315 | } | |
1316 | static DEVICE_ATTR(uuid, S_IRUGO, uuid_show, NULL); | |
1317 | ||
1318 | static ssize_t eui_show(struct device *dev, struct device_attribute *attr, | |
1319 | char *buf) | |
1320 | { | |
1321 | struct nvme_ns *ns = dev_to_disk(dev)->private_data; | |
1322 | return sprintf(buf, "%8phd\n", ns->eui); | |
1323 | } | |
1324 | static DEVICE_ATTR(eui, S_IRUGO, eui_show, NULL); | |
1325 | ||
1326 | static ssize_t nsid_show(struct device *dev, struct device_attribute *attr, | |
1327 | char *buf) | |
1328 | { | |
1329 | struct nvme_ns *ns = dev_to_disk(dev)->private_data; | |
1330 | return sprintf(buf, "%d\n", ns->ns_id); | |
1331 | } | |
1332 | static DEVICE_ATTR(nsid, S_IRUGO, nsid_show, NULL); | |
1333 | ||
1334 | static struct attribute *nvme_ns_attrs[] = { | |
118472ab | 1335 | &dev_attr_wwid.attr, |
2b9b6e86 KB |
1336 | &dev_attr_uuid.attr, |
1337 | &dev_attr_eui.attr, | |
1338 | &dev_attr_nsid.attr, | |
1339 | NULL, | |
1340 | }; | |
1341 | ||
1342 | static umode_t nvme_attrs_are_visible(struct kobject *kobj, | |
1343 | struct attribute *a, int n) | |
1344 | { | |
1345 | struct device *dev = container_of(kobj, struct device, kobj); | |
1346 | struct nvme_ns *ns = dev_to_disk(dev)->private_data; | |
1347 | ||
1348 | if (a == &dev_attr_uuid.attr) { | |
1349 | if (!memchr_inv(ns->uuid, 0, sizeof(ns->uuid))) | |
1350 | return 0; | |
1351 | } | |
1352 | if (a == &dev_attr_eui.attr) { | |
1353 | if (!memchr_inv(ns->eui, 0, sizeof(ns->eui))) | |
1354 | return 0; | |
1355 | } | |
1356 | return a->mode; | |
1357 | } | |
1358 | ||
1359 | static const struct attribute_group nvme_ns_attr_group = { | |
1360 | .attrs = nvme_ns_attrs, | |
1361 | .is_visible = nvme_attrs_are_visible, | |
1362 | }; | |
1363 | ||
931e1c22 | 1364 | #define nvme_show_str_function(field) \ |
779ff756 KB |
1365 | static ssize_t field##_show(struct device *dev, \ |
1366 | struct device_attribute *attr, char *buf) \ | |
1367 | { \ | |
1368 | struct nvme_ctrl *ctrl = dev_get_drvdata(dev); \ | |
1369 | return sprintf(buf, "%.*s\n", (int)sizeof(ctrl->field), ctrl->field); \ | |
1370 | } \ | |
1371 | static DEVICE_ATTR(field, S_IRUGO, field##_show, NULL); | |
1372 | ||
931e1c22 ML |
1373 | #define nvme_show_int_function(field) \ |
1374 | static ssize_t field##_show(struct device *dev, \ | |
1375 | struct device_attribute *attr, char *buf) \ | |
1376 | { \ | |
1377 | struct nvme_ctrl *ctrl = dev_get_drvdata(dev); \ | |
1378 | return sprintf(buf, "%d\n", ctrl->field); \ | |
1379 | } \ | |
1380 | static DEVICE_ATTR(field, S_IRUGO, field##_show, NULL); | |
1381 | ||
1382 | nvme_show_str_function(model); | |
1383 | nvme_show_str_function(serial); | |
1384 | nvme_show_str_function(firmware_rev); | |
1385 | nvme_show_int_function(cntlid); | |
779ff756 KB |
1386 | |
1387 | static struct attribute *nvme_dev_attrs[] = { | |
1388 | &dev_attr_reset_controller.attr, | |
9ec3bb2f | 1389 | &dev_attr_rescan_controller.attr, |
779ff756 KB |
1390 | &dev_attr_model.attr, |
1391 | &dev_attr_serial.attr, | |
1392 | &dev_attr_firmware_rev.attr, | |
931e1c22 | 1393 | &dev_attr_cntlid.attr, |
779ff756 KB |
1394 | NULL |
1395 | }; | |
1396 | ||
1397 | static struct attribute_group nvme_dev_attrs_group = { | |
1398 | .attrs = nvme_dev_attrs, | |
1399 | }; | |
1400 | ||
1401 | static const struct attribute_group *nvme_dev_attr_groups[] = { | |
1402 | &nvme_dev_attrs_group, | |
1403 | NULL, | |
1404 | }; | |
1405 | ||
5bae7f73 CH |
1406 | static int ns_cmp(void *priv, struct list_head *a, struct list_head *b) |
1407 | { | |
1408 | struct nvme_ns *nsa = container_of(a, struct nvme_ns, list); | |
1409 | struct nvme_ns *nsb = container_of(b, struct nvme_ns, list); | |
1410 | ||
1411 | return nsa->ns_id - nsb->ns_id; | |
1412 | } | |
1413 | ||
1414 | static struct nvme_ns *nvme_find_ns(struct nvme_ctrl *ctrl, unsigned nsid) | |
1415 | { | |
1416 | struct nvme_ns *ns; | |
1417 | ||
69d3b8ac CH |
1418 | lockdep_assert_held(&ctrl->namespaces_mutex); |
1419 | ||
5bae7f73 CH |
1420 | list_for_each_entry(ns, &ctrl->namespaces, list) { |
1421 | if (ns->ns_id == nsid) | |
1422 | return ns; | |
1423 | if (ns->ns_id > nsid) | |
1424 | break; | |
1425 | } | |
1426 | return NULL; | |
1427 | } | |
1428 | ||
1429 | static void nvme_alloc_ns(struct nvme_ctrl *ctrl, unsigned nsid) | |
1430 | { | |
1431 | struct nvme_ns *ns; | |
1432 | struct gendisk *disk; | |
1433 | int node = dev_to_node(ctrl->dev); | |
1434 | ||
69d3b8ac CH |
1435 | lockdep_assert_held(&ctrl->namespaces_mutex); |
1436 | ||
5bae7f73 CH |
1437 | ns = kzalloc_node(sizeof(*ns), GFP_KERNEL, node); |
1438 | if (!ns) | |
1439 | return; | |
1440 | ||
075790eb KB |
1441 | ns->instance = ida_simple_get(&ctrl->ns_ida, 1, 0, GFP_KERNEL); |
1442 | if (ns->instance < 0) | |
1443 | goto out_free_ns; | |
1444 | ||
5bae7f73 CH |
1445 | ns->queue = blk_mq_init_queue(ctrl->tagset); |
1446 | if (IS_ERR(ns->queue)) | |
075790eb | 1447 | goto out_release_instance; |
5bae7f73 CH |
1448 | queue_flag_set_unlocked(QUEUE_FLAG_NONROT, ns->queue); |
1449 | ns->queue->queuedata = ns; | |
1450 | ns->ctrl = ctrl; | |
1451 | ||
1452 | disk = alloc_disk_node(0, node); | |
1453 | if (!disk) | |
1454 | goto out_free_queue; | |
1455 | ||
1456 | kref_init(&ns->kref); | |
1457 | ns->ns_id = nsid; | |
1458 | ns->disk = disk; | |
1459 | ns->lba_shift = 9; /* set to a default value for 512 until disk is validated */ | |
5bae7f73 | 1460 | |
da35825d | 1461 | |
5bae7f73 | 1462 | blk_queue_logical_block_size(ns->queue, 1 << ns->lba_shift); |
da35825d | 1463 | nvme_set_queue_limits(ctrl, ns->queue); |
5bae7f73 CH |
1464 | |
1465 | disk->major = nvme_major; | |
1466 | disk->first_minor = 0; | |
1467 | disk->fops = &nvme_fops; | |
1468 | disk->private_data = ns; | |
1469 | disk->queue = ns->queue; | |
1470 | disk->driverfs_dev = ctrl->device; | |
1471 | disk->flags = GENHD_FL_EXT_DEVT; | |
075790eb | 1472 | sprintf(disk->disk_name, "nvme%dn%d", ctrl->instance, ns->instance); |
5bae7f73 | 1473 | |
5bae7f73 CH |
1474 | if (nvme_revalidate_disk(ns->disk)) |
1475 | goto out_free_disk; | |
1476 | ||
0bf77e9d | 1477 | list_add_tail_rcu(&ns->list, &ctrl->namespaces); |
5bae7f73 | 1478 | kref_get(&ctrl->kref); |
2b9b6e86 KB |
1479 | if (ns->type == NVME_NS_LIGHTNVM) |
1480 | return; | |
5bae7f73 | 1481 | |
2b9b6e86 KB |
1482 | add_disk(ns->disk); |
1483 | if (sysfs_create_group(&disk_to_dev(ns->disk)->kobj, | |
1484 | &nvme_ns_attr_group)) | |
1485 | pr_warn("%s: failed to create sysfs group for identification\n", | |
1486 | ns->disk->disk_name); | |
5bae7f73 CH |
1487 | return; |
1488 | out_free_disk: | |
1489 | kfree(disk); | |
5bae7f73 CH |
1490 | out_free_queue: |
1491 | blk_cleanup_queue(ns->queue); | |
075790eb KB |
1492 | out_release_instance: |
1493 | ida_simple_remove(&ctrl->ns_ida, ns->instance); | |
5bae7f73 CH |
1494 | out_free_ns: |
1495 | kfree(ns); | |
1496 | } | |
1497 | ||
1498 | static void nvme_ns_remove(struct nvme_ns *ns) | |
1499 | { | |
b7b9c227 ML |
1500 | lockdep_assert_held(&ns->ctrl->namespaces_mutex); |
1501 | ||
646017a6 KB |
1502 | if (test_and_set_bit(NVME_NS_REMOVING, &ns->flags)) |
1503 | return; | |
69d3b8ac | 1504 | |
5bae7f73 CH |
1505 | if (ns->disk->flags & GENHD_FL_UP) { |
1506 | if (blk_get_integrity(ns->disk)) | |
1507 | blk_integrity_unregister(ns->disk); | |
2b9b6e86 KB |
1508 | sysfs_remove_group(&disk_to_dev(ns->disk)->kobj, |
1509 | &nvme_ns_attr_group); | |
5bae7f73 | 1510 | del_gendisk(ns->disk); |
5bae7f73 CH |
1511 | blk_mq_abort_requeue_list(ns->queue); |
1512 | blk_cleanup_queue(ns->queue); | |
1513 | } | |
1514 | list_del_init(&ns->list); | |
0bf77e9d | 1515 | synchronize_rcu(); |
5bae7f73 CH |
1516 | nvme_put_ns(ns); |
1517 | } | |
1518 | ||
540c801c KB |
1519 | static void nvme_validate_ns(struct nvme_ctrl *ctrl, unsigned nsid) |
1520 | { | |
1521 | struct nvme_ns *ns; | |
1522 | ||
1523 | ns = nvme_find_ns(ctrl, nsid); | |
1524 | if (ns) { | |
1525 | if (revalidate_disk(ns->disk)) | |
1526 | nvme_ns_remove(ns); | |
1527 | } else | |
1528 | nvme_alloc_ns(ctrl, nsid); | |
1529 | } | |
1530 | ||
1531 | static int nvme_scan_ns_list(struct nvme_ctrl *ctrl, unsigned nn) | |
1532 | { | |
1533 | struct nvme_ns *ns; | |
1534 | __le32 *ns_list; | |
1535 | unsigned i, j, nsid, prev = 0, num_lists = DIV_ROUND_UP(nn, 1024); | |
1536 | int ret = 0; | |
1537 | ||
1538 | ns_list = kzalloc(0x1000, GFP_KERNEL); | |
1539 | if (!ns_list) | |
1540 | return -ENOMEM; | |
1541 | ||
1542 | for (i = 0; i < num_lists; i++) { | |
1543 | ret = nvme_identify_ns_list(ctrl, prev, ns_list); | |
1544 | if (ret) | |
1545 | goto out; | |
1546 | ||
1547 | for (j = 0; j < min(nn, 1024U); j++) { | |
1548 | nsid = le32_to_cpu(ns_list[j]); | |
1549 | if (!nsid) | |
1550 | goto out; | |
1551 | ||
1552 | nvme_validate_ns(ctrl, nsid); | |
1553 | ||
1554 | while (++prev < nsid) { | |
1555 | ns = nvme_find_ns(ctrl, prev); | |
1556 | if (ns) | |
1557 | nvme_ns_remove(ns); | |
1558 | } | |
1559 | } | |
1560 | nn -= j; | |
1561 | } | |
1562 | out: | |
1563 | kfree(ns_list); | |
1564 | return ret; | |
1565 | } | |
1566 | ||
5955be21 | 1567 | static void nvme_scan_ns_sequential(struct nvme_ctrl *ctrl, unsigned nn) |
5bae7f73 CH |
1568 | { |
1569 | struct nvme_ns *ns, *next; | |
1570 | unsigned i; | |
1571 | ||
69d3b8ac CH |
1572 | lockdep_assert_held(&ctrl->namespaces_mutex); |
1573 | ||
540c801c KB |
1574 | for (i = 1; i <= nn; i++) |
1575 | nvme_validate_ns(ctrl, i); | |
1576 | ||
5bae7f73 CH |
1577 | list_for_each_entry_safe(ns, next, &ctrl->namespaces, list) { |
1578 | if (ns->ns_id > nn) | |
1579 | nvme_ns_remove(ns); | |
1580 | } | |
5bae7f73 CH |
1581 | } |
1582 | ||
5955be21 | 1583 | static void nvme_scan_work(struct work_struct *work) |
5bae7f73 | 1584 | { |
5955be21 CH |
1585 | struct nvme_ctrl *ctrl = |
1586 | container_of(work, struct nvme_ctrl, scan_work); | |
5bae7f73 | 1587 | struct nvme_id_ctrl *id; |
540c801c | 1588 | unsigned nn; |
5bae7f73 | 1589 | |
5955be21 CH |
1590 | if (ctrl->state != NVME_CTRL_LIVE) |
1591 | return; | |
1592 | ||
5bae7f73 CH |
1593 | if (nvme_identify_ctrl(ctrl, &id)) |
1594 | return; | |
540c801c | 1595 | |
69d3b8ac | 1596 | mutex_lock(&ctrl->namespaces_mutex); |
540c801c KB |
1597 | nn = le32_to_cpu(id->nn); |
1598 | if (ctrl->vs >= NVME_VS(1, 1) && | |
1599 | !(ctrl->quirks & NVME_QUIRK_IDENTIFY_CNS)) { | |
1600 | if (!nvme_scan_ns_list(ctrl, nn)) | |
1601 | goto done; | |
1602 | } | |
5955be21 | 1603 | nvme_scan_ns_sequential(ctrl, nn); |
540c801c KB |
1604 | done: |
1605 | list_sort(NULL, &ctrl->namespaces, ns_cmp); | |
69d3b8ac | 1606 | mutex_unlock(&ctrl->namespaces_mutex); |
5bae7f73 | 1607 | kfree(id); |
5955be21 CH |
1608 | |
1609 | if (ctrl->ops->post_scan) | |
1610 | ctrl->ops->post_scan(ctrl); | |
5bae7f73 | 1611 | } |
5955be21 CH |
1612 | |
1613 | void nvme_queue_scan(struct nvme_ctrl *ctrl) | |
1614 | { | |
1615 | /* | |
1616 | * Do not queue new scan work when a controller is reset during | |
1617 | * removal. | |
1618 | */ | |
1619 | if (ctrl->state == NVME_CTRL_LIVE) | |
1620 | schedule_work(&ctrl->scan_work); | |
1621 | } | |
1622 | EXPORT_SYMBOL_GPL(nvme_queue_scan); | |
5bae7f73 CH |
1623 | |
1624 | void nvme_remove_namespaces(struct nvme_ctrl *ctrl) | |
1625 | { | |
1626 | struct nvme_ns *ns, *next; | |
1627 | ||
0ff9d4e1 KB |
1628 | /* |
1629 | * The dead states indicates the controller was not gracefully | |
1630 | * disconnected. In that case, we won't be able to flush any data while | |
1631 | * removing the namespaces' disks; fail all the queues now to avoid | |
1632 | * potentially having to clean up the failed sync later. | |
1633 | */ | |
1634 | if (ctrl->state == NVME_CTRL_DEAD) | |
1635 | nvme_kill_queues(ctrl); | |
1636 | ||
b7b9c227 | 1637 | mutex_lock(&ctrl->namespaces_mutex); |
5bae7f73 CH |
1638 | list_for_each_entry_safe(ns, next, &ctrl->namespaces, list) |
1639 | nvme_ns_remove(ns); | |
b7b9c227 | 1640 | mutex_unlock(&ctrl->namespaces_mutex); |
5bae7f73 | 1641 | } |
576d55d6 | 1642 | EXPORT_SYMBOL_GPL(nvme_remove_namespaces); |
5bae7f73 | 1643 | |
f866fc42 CH |
1644 | static void nvme_async_event_work(struct work_struct *work) |
1645 | { | |
1646 | struct nvme_ctrl *ctrl = | |
1647 | container_of(work, struct nvme_ctrl, async_event_work); | |
1648 | ||
1649 | spin_lock_irq(&ctrl->lock); | |
1650 | while (ctrl->event_limit > 0) { | |
1651 | int aer_idx = --ctrl->event_limit; | |
1652 | ||
1653 | spin_unlock_irq(&ctrl->lock); | |
1654 | ctrl->ops->submit_async_event(ctrl, aer_idx); | |
1655 | spin_lock_irq(&ctrl->lock); | |
1656 | } | |
1657 | spin_unlock_irq(&ctrl->lock); | |
1658 | } | |
1659 | ||
1660 | void nvme_complete_async_event(struct nvme_ctrl *ctrl, | |
1661 | struct nvme_completion *cqe) | |
1662 | { | |
1663 | u16 status = le16_to_cpu(cqe->status) >> 1; | |
1664 | u32 result = le32_to_cpu(cqe->result); | |
1665 | ||
1666 | if (status == NVME_SC_SUCCESS || status == NVME_SC_ABORT_REQ) { | |
1667 | ++ctrl->event_limit; | |
1668 | schedule_work(&ctrl->async_event_work); | |
1669 | } | |
1670 | ||
1671 | if (status != NVME_SC_SUCCESS) | |
1672 | return; | |
1673 | ||
1674 | switch (result & 0xff07) { | |
1675 | case NVME_AER_NOTICE_NS_CHANGED: | |
1676 | dev_info(ctrl->device, "rescanning\n"); | |
1677 | nvme_queue_scan(ctrl); | |
1678 | break; | |
1679 | default: | |
1680 | dev_warn(ctrl->device, "async event result %08x\n", result); | |
1681 | } | |
1682 | } | |
1683 | EXPORT_SYMBOL_GPL(nvme_complete_async_event); | |
1684 | ||
1685 | void nvme_queue_async_events(struct nvme_ctrl *ctrl) | |
1686 | { | |
1687 | ctrl->event_limit = NVME_NR_AERS; | |
1688 | schedule_work(&ctrl->async_event_work); | |
1689 | } | |
1690 | EXPORT_SYMBOL_GPL(nvme_queue_async_events); | |
1691 | ||
f3ca80fc CH |
1692 | static DEFINE_IDA(nvme_instance_ida); |
1693 | ||
1694 | static int nvme_set_instance(struct nvme_ctrl *ctrl) | |
1695 | { | |
1696 | int instance, error; | |
1697 | ||
1698 | do { | |
1699 | if (!ida_pre_get(&nvme_instance_ida, GFP_KERNEL)) | |
1700 | return -ENODEV; | |
1701 | ||
1702 | spin_lock(&dev_list_lock); | |
1703 | error = ida_get_new(&nvme_instance_ida, &instance); | |
1704 | spin_unlock(&dev_list_lock); | |
1705 | } while (error == -EAGAIN); | |
1706 | ||
1707 | if (error) | |
1708 | return -ENODEV; | |
1709 | ||
1710 | ctrl->instance = instance; | |
1711 | return 0; | |
1712 | } | |
1713 | ||
1714 | static void nvme_release_instance(struct nvme_ctrl *ctrl) | |
1715 | { | |
1716 | spin_lock(&dev_list_lock); | |
1717 | ida_remove(&nvme_instance_ida, ctrl->instance); | |
1718 | spin_unlock(&dev_list_lock); | |
1719 | } | |
1720 | ||
53029b04 | 1721 | void nvme_uninit_ctrl(struct nvme_ctrl *ctrl) |
576d55d6 | 1722 | { |
f866fc42 | 1723 | flush_work(&ctrl->async_event_work); |
5955be21 CH |
1724 | flush_work(&ctrl->scan_work); |
1725 | nvme_remove_namespaces(ctrl); | |
1726 | ||
53029b04 | 1727 | device_destroy(nvme_class, MKDEV(nvme_char_major, ctrl->instance)); |
f3ca80fc CH |
1728 | |
1729 | spin_lock(&dev_list_lock); | |
1730 | list_del(&ctrl->node); | |
1731 | spin_unlock(&dev_list_lock); | |
53029b04 | 1732 | } |
576d55d6 | 1733 | EXPORT_SYMBOL_GPL(nvme_uninit_ctrl); |
53029b04 KB |
1734 | |
1735 | static void nvme_free_ctrl(struct kref *kref) | |
1736 | { | |
1737 | struct nvme_ctrl *ctrl = container_of(kref, struct nvme_ctrl, kref); | |
f3ca80fc CH |
1738 | |
1739 | put_device(ctrl->device); | |
1740 | nvme_release_instance(ctrl); | |
075790eb | 1741 | ida_destroy(&ctrl->ns_ida); |
f3ca80fc CH |
1742 | |
1743 | ctrl->ops->free_ctrl(ctrl); | |
1744 | } | |
1745 | ||
1746 | void nvme_put_ctrl(struct nvme_ctrl *ctrl) | |
1747 | { | |
1748 | kref_put(&ctrl->kref, nvme_free_ctrl); | |
1749 | } | |
576d55d6 | 1750 | EXPORT_SYMBOL_GPL(nvme_put_ctrl); |
f3ca80fc CH |
1751 | |
1752 | /* | |
1753 | * Initialize a NVMe controller structures. This needs to be called during | |
1754 | * earliest initialization so that we have the initialized structured around | |
1755 | * during probing. | |
1756 | */ | |
1757 | int nvme_init_ctrl(struct nvme_ctrl *ctrl, struct device *dev, | |
1758 | const struct nvme_ctrl_ops *ops, unsigned long quirks) | |
1759 | { | |
1760 | int ret; | |
1761 | ||
bb8d261e CH |
1762 | ctrl->state = NVME_CTRL_NEW; |
1763 | spin_lock_init(&ctrl->lock); | |
f3ca80fc | 1764 | INIT_LIST_HEAD(&ctrl->namespaces); |
69d3b8ac | 1765 | mutex_init(&ctrl->namespaces_mutex); |
f3ca80fc CH |
1766 | kref_init(&ctrl->kref); |
1767 | ctrl->dev = dev; | |
1768 | ctrl->ops = ops; | |
1769 | ctrl->quirks = quirks; | |
5955be21 | 1770 | INIT_WORK(&ctrl->scan_work, nvme_scan_work); |
f866fc42 | 1771 | INIT_WORK(&ctrl->async_event_work, nvme_async_event_work); |
f3ca80fc CH |
1772 | |
1773 | ret = nvme_set_instance(ctrl); | |
1774 | if (ret) | |
1775 | goto out; | |
1776 | ||
779ff756 | 1777 | ctrl->device = device_create_with_groups(nvme_class, ctrl->dev, |
f3ca80fc | 1778 | MKDEV(nvme_char_major, ctrl->instance), |
f4f0f63e | 1779 | ctrl, nvme_dev_attr_groups, |
779ff756 | 1780 | "nvme%d", ctrl->instance); |
f3ca80fc CH |
1781 | if (IS_ERR(ctrl->device)) { |
1782 | ret = PTR_ERR(ctrl->device); | |
1783 | goto out_release_instance; | |
1784 | } | |
1785 | get_device(ctrl->device); | |
075790eb | 1786 | ida_init(&ctrl->ns_ida); |
f3ca80fc | 1787 | |
f3ca80fc CH |
1788 | spin_lock(&dev_list_lock); |
1789 | list_add_tail(&ctrl->node, &nvme_ctrl_list); | |
1790 | spin_unlock(&dev_list_lock); | |
1791 | ||
1792 | return 0; | |
f3ca80fc CH |
1793 | out_release_instance: |
1794 | nvme_release_instance(ctrl); | |
1795 | out: | |
1796 | return ret; | |
1797 | } | |
576d55d6 | 1798 | EXPORT_SYMBOL_GPL(nvme_init_ctrl); |
f3ca80fc | 1799 | |
69d9a99c KB |
1800 | /** |
1801 | * nvme_kill_queues(): Ends all namespace queues | |
1802 | * @ctrl: the dead controller that needs to end | |
1803 | * | |
1804 | * Call this function when the driver determines it is unable to get the | |
1805 | * controller in a state capable of servicing IO. | |
1806 | */ | |
1807 | void nvme_kill_queues(struct nvme_ctrl *ctrl) | |
1808 | { | |
1809 | struct nvme_ns *ns; | |
1810 | ||
0bf77e9d ML |
1811 | rcu_read_lock(); |
1812 | list_for_each_entry_rcu(ns, &ctrl->namespaces, list) { | |
69d9a99c KB |
1813 | if (!kref_get_unless_zero(&ns->kref)) |
1814 | continue; | |
1815 | ||
1816 | /* | |
1817 | * Revalidating a dead namespace sets capacity to 0. This will | |
1818 | * end buffered writers dirtying pages that can't be synced. | |
1819 | */ | |
1820 | if (!test_and_set_bit(NVME_NS_DEAD, &ns->flags)) | |
1821 | revalidate_disk(ns->disk); | |
1822 | ||
1823 | blk_set_queue_dying(ns->queue); | |
1824 | blk_mq_abort_requeue_list(ns->queue); | |
1825 | blk_mq_start_stopped_hw_queues(ns->queue, true); | |
1826 | ||
1827 | nvme_put_ns(ns); | |
1828 | } | |
0bf77e9d | 1829 | rcu_read_unlock(); |
69d9a99c | 1830 | } |
237045fc | 1831 | EXPORT_SYMBOL_GPL(nvme_kill_queues); |
69d9a99c | 1832 | |
25646264 | 1833 | void nvme_stop_queues(struct nvme_ctrl *ctrl) |
363c9aac SG |
1834 | { |
1835 | struct nvme_ns *ns; | |
1836 | ||
0bf77e9d ML |
1837 | rcu_read_lock(); |
1838 | list_for_each_entry_rcu(ns, &ctrl->namespaces, list) { | |
363c9aac SG |
1839 | spin_lock_irq(ns->queue->queue_lock); |
1840 | queue_flag_set(QUEUE_FLAG_STOPPED, ns->queue); | |
1841 | spin_unlock_irq(ns->queue->queue_lock); | |
1842 | ||
1843 | blk_mq_cancel_requeue_work(ns->queue); | |
1844 | blk_mq_stop_hw_queues(ns->queue); | |
1845 | } | |
0bf77e9d | 1846 | rcu_read_unlock(); |
363c9aac | 1847 | } |
576d55d6 | 1848 | EXPORT_SYMBOL_GPL(nvme_stop_queues); |
363c9aac | 1849 | |
25646264 | 1850 | void nvme_start_queues(struct nvme_ctrl *ctrl) |
363c9aac SG |
1851 | { |
1852 | struct nvme_ns *ns; | |
1853 | ||
0bf77e9d ML |
1854 | rcu_read_lock(); |
1855 | list_for_each_entry_rcu(ns, &ctrl->namespaces, list) { | |
363c9aac | 1856 | queue_flag_clear_unlocked(QUEUE_FLAG_STOPPED, ns->queue); |
363c9aac SG |
1857 | blk_mq_start_stopped_hw_queues(ns->queue, true); |
1858 | blk_mq_kick_requeue_list(ns->queue); | |
1859 | } | |
0bf77e9d | 1860 | rcu_read_unlock(); |
363c9aac | 1861 | } |
576d55d6 | 1862 | EXPORT_SYMBOL_GPL(nvme_start_queues); |
363c9aac | 1863 | |
5bae7f73 CH |
1864 | int __init nvme_core_init(void) |
1865 | { | |
1866 | int result; | |
1867 | ||
1868 | result = register_blkdev(nvme_major, "nvme"); | |
1869 | if (result < 0) | |
1870 | return result; | |
1871 | else if (result > 0) | |
1872 | nvme_major = result; | |
1873 | ||
f3ca80fc CH |
1874 | result = __register_chrdev(nvme_char_major, 0, NVME_MINORS, "nvme", |
1875 | &nvme_dev_fops); | |
1876 | if (result < 0) | |
1877 | goto unregister_blkdev; | |
1878 | else if (result > 0) | |
1879 | nvme_char_major = result; | |
1880 | ||
1881 | nvme_class = class_create(THIS_MODULE, "nvme"); | |
1882 | if (IS_ERR(nvme_class)) { | |
1883 | result = PTR_ERR(nvme_class); | |
1884 | goto unregister_chrdev; | |
1885 | } | |
1886 | ||
5bae7f73 | 1887 | return 0; |
f3ca80fc CH |
1888 | |
1889 | unregister_chrdev: | |
1890 | __unregister_chrdev(nvme_char_major, 0, NVME_MINORS, "nvme"); | |
1891 | unregister_blkdev: | |
1892 | unregister_blkdev(nvme_major, "nvme"); | |
1893 | return result; | |
5bae7f73 CH |
1894 | } |
1895 | ||
1896 | void nvme_core_exit(void) | |
1897 | { | |
f3ca80fc CH |
1898 | class_destroy(nvme_class); |
1899 | __unregister_chrdev(nvme_char_major, 0, NVME_MINORS, "nvme"); | |
23bd63ce | 1900 | unregister_blkdev(nvme_major, "nvme"); |
5bae7f73 | 1901 | } |
576d55d6 ML |
1902 | |
1903 | MODULE_LICENSE("GPL"); | |
1904 | MODULE_VERSION("1.0"); | |
1905 | module_init(nvme_core_init); | |
1906 | module_exit(nvme_core_exit); |