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f11bb3e2 CH |
1 | /* |
2 | * Copyright (c) 2011-2014, Intel Corporation. | |
3 | * | |
4 | * This program is free software; you can redistribute it and/or modify it | |
5 | * under the terms and conditions of the GNU General Public License, | |
6 | * version 2, as published by the Free Software Foundation. | |
7 | * | |
8 | * This program is distributed in the hope it will be useful, but WITHOUT | |
9 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
10 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | |
11 | * more details. | |
12 | */ | |
13 | ||
14 | #ifndef _NVME_H | |
15 | #define _NVME_H | |
16 | ||
17 | #include <linux/nvme.h> | |
18 | #include <linux/pci.h> | |
19 | #include <linux/kref.h> | |
20 | #include <linux/blk-mq.h> | |
b0b4e09c | 21 | #include <linux/lightnvm.h> |
a98e58e5 | 22 | #include <linux/sed-opal.h> |
f11bb3e2 CH |
23 | |
24 | extern unsigned char nvme_io_timeout; | |
25 | #define NVME_IO_TIMEOUT (nvme_io_timeout * HZ) | |
26 | ||
21d34711 CH |
27 | extern unsigned char admin_timeout; |
28 | #define ADMIN_TIMEOUT (admin_timeout * HZ) | |
29 | ||
5fd4ce1b CH |
30 | extern unsigned char shutdown_timeout; |
31 | #define SHUTDOWN_TIMEOUT (shutdown_timeout * HZ) | |
32 | ||
038bd4cb SG |
33 | #define NVME_DEFAULT_KATO 5 |
34 | #define NVME_KATO_GRACE 10 | |
35 | ||
ca064085 MB |
36 | enum { |
37 | NVME_NS_LBA = 0, | |
38 | NVME_NS_LIGHTNVM = 1, | |
39 | }; | |
40 | ||
f11bb3e2 | 41 | /* |
106198ed CH |
42 | * List of workarounds for devices that required behavior not specified in |
43 | * the standard. | |
f11bb3e2 | 44 | */ |
106198ed CH |
45 | enum nvme_quirks { |
46 | /* | |
47 | * Prefers I/O aligned to a stripe size specified in a vendor | |
48 | * specific Identify field. | |
49 | */ | |
50 | NVME_QUIRK_STRIPE_SIZE = (1 << 0), | |
540c801c KB |
51 | |
52 | /* | |
53 | * The controller doesn't handle Identify value others than 0 or 1 | |
54 | * correctly. | |
55 | */ | |
56 | NVME_QUIRK_IDENTIFY_CNS = (1 << 1), | |
08095e70 KB |
57 | |
58 | /* | |
e850fd16 CH |
59 | * The controller deterministically returns O's on reads to |
60 | * logical blocks that deallocate was called on. | |
08095e70 | 61 | */ |
e850fd16 | 62 | NVME_QUIRK_DEALLOCATE_ZEROES = (1 << 2), |
54adc010 GP |
63 | |
64 | /* | |
65 | * The controller needs a delay before starts checking the device | |
66 | * readiness, which is done by reading the NVME_CSTS_RDY bit. | |
67 | */ | |
68 | NVME_QUIRK_DELAY_BEFORE_CHK_RDY = (1 << 3), | |
c5552fde AL |
69 | |
70 | /* | |
71 | * APST should not be used. | |
72 | */ | |
73 | NVME_QUIRK_NO_APST = (1 << 4), | |
106198ed CH |
74 | }; |
75 | ||
d49187e9 CH |
76 | /* |
77 | * Common request structure for NVMe passthrough. All drivers must have | |
78 | * this structure as the first member of their request-private data. | |
79 | */ | |
80 | struct nvme_request { | |
81 | struct nvme_command *cmd; | |
82 | union nvme_result result; | |
44e44b29 | 83 | u8 retries; |
27fa9bc5 CH |
84 | u8 flags; |
85 | u16 status; | |
86 | }; | |
87 | ||
88 | enum { | |
89 | NVME_REQ_CANCELLED = (1 << 0), | |
d49187e9 CH |
90 | }; |
91 | ||
92 | static inline struct nvme_request *nvme_req(struct request *req) | |
93 | { | |
94 | return blk_mq_rq_to_pdu(req); | |
95 | } | |
96 | ||
54adc010 GP |
97 | /* The below value is the specific amount of delay needed before checking |
98 | * readiness in case of the PCI_DEVICE(0x1c58, 0x0003), which needs the | |
99 | * NVME_QUIRK_DELAY_BEFORE_CHK_RDY quirk enabled. The value (in ms) was | |
100 | * found empirically. | |
101 | */ | |
102 | #define NVME_QUIRK_DELAY_AMOUNT 2000 | |
103 | ||
bb8d261e CH |
104 | enum nvme_ctrl_state { |
105 | NVME_CTRL_NEW, | |
106 | NVME_CTRL_LIVE, | |
107 | NVME_CTRL_RESETTING, | |
def61eca | 108 | NVME_CTRL_RECONNECTING, |
bb8d261e | 109 | NVME_CTRL_DELETING, |
0ff9d4e1 | 110 | NVME_CTRL_DEAD, |
bb8d261e CH |
111 | }; |
112 | ||
1c63dc66 | 113 | struct nvme_ctrl { |
bb8d261e | 114 | enum nvme_ctrl_state state; |
bd4da3ab | 115 | bool identified; |
bb8d261e | 116 | spinlock_t lock; |
1c63dc66 | 117 | const struct nvme_ctrl_ops *ops; |
f11bb3e2 | 118 | struct request_queue *admin_q; |
07bfcd09 | 119 | struct request_queue *connect_q; |
f11bb3e2 | 120 | struct device *dev; |
1673f1f0 | 121 | struct kref kref; |
f11bb3e2 | 122 | int instance; |
5bae7f73 | 123 | struct blk_mq_tag_set *tagset; |
f11bb3e2 | 124 | struct list_head namespaces; |
69d3b8ac | 125 | struct mutex namespaces_mutex; |
5bae7f73 | 126 | struct device *device; /* char device */ |
f3ca80fc | 127 | struct list_head node; |
075790eb | 128 | struct ida ns_ida; |
1c63dc66 | 129 | |
4f1244c8 | 130 | struct opal_dev *opal_dev; |
a98e58e5 | 131 | |
f11bb3e2 CH |
132 | char name[12]; |
133 | char serial[20]; | |
134 | char model[40]; | |
135 | char firmware_rev[8]; | |
76e3914a | 136 | u16 cntlid; |
5fd4ce1b CH |
137 | |
138 | u32 ctrl_config; | |
139 | ||
140 | u32 page_size; | |
f11bb3e2 | 141 | u32 max_hw_sectors; |
f11bb3e2 | 142 | u16 oncs; |
118472ab | 143 | u16 vid; |
8a9ae523 | 144 | u16 oacs; |
6bf25d16 | 145 | atomic_t abort_limit; |
f11bb3e2 CH |
146 | u8 event_limit; |
147 | u8 vwc; | |
f3ca80fc | 148 | u32 vs; |
07bfcd09 | 149 | u32 sgls; |
038bd4cb | 150 | u16 kas; |
c5552fde AL |
151 | u8 npss; |
152 | u8 apsta; | |
038bd4cb | 153 | unsigned int kato; |
f3ca80fc | 154 | bool subsystem; |
106198ed | 155 | unsigned long quirks; |
c5552fde | 156 | struct nvme_id_power_state psd[32]; |
5955be21 | 157 | struct work_struct scan_work; |
f866fc42 | 158 | struct work_struct async_event_work; |
038bd4cb | 159 | struct delayed_work ka_work; |
07bfcd09 | 160 | |
c5552fde AL |
161 | /* Power saving configuration */ |
162 | u64 ps_max_latency_us; | |
163 | ||
07bfcd09 CH |
164 | /* Fabrics only */ |
165 | u16 sqsize; | |
166 | u32 ioccsz; | |
167 | u32 iorcsz; | |
168 | u16 icdoff; | |
169 | u16 maxcmd; | |
170 | struct nvmf_ctrl_options *opts; | |
f11bb3e2 CH |
171 | }; |
172 | ||
173 | /* | |
174 | * An NVM Express namespace is equivalent to a SCSI LUN | |
175 | */ | |
176 | struct nvme_ns { | |
177 | struct list_head list; | |
178 | ||
1c63dc66 | 179 | struct nvme_ctrl *ctrl; |
f11bb3e2 CH |
180 | struct request_queue *queue; |
181 | struct gendisk *disk; | |
b0b4e09c | 182 | struct nvm_dev *ndev; |
f11bb3e2 | 183 | struct kref kref; |
075790eb | 184 | int instance; |
f11bb3e2 | 185 | |
2b9b6e86 KB |
186 | u8 eui[8]; |
187 | u8 uuid[16]; | |
188 | ||
f11bb3e2 CH |
189 | unsigned ns_id; |
190 | int lba_shift; | |
191 | u16 ms; | |
192 | bool ext; | |
193 | u8 pi_type; | |
646017a6 KB |
194 | unsigned long flags; |
195 | ||
196 | #define NVME_NS_REMOVING 0 | |
69d9a99c | 197 | #define NVME_NS_DEAD 1 |
646017a6 | 198 | |
f11bb3e2 CH |
199 | u64 mode_select_num_blocks; |
200 | u32 mode_select_block_len; | |
201 | }; | |
202 | ||
1c63dc66 | 203 | struct nvme_ctrl_ops { |
1a353d85 | 204 | const char *name; |
e439bb12 | 205 | struct module *module; |
07bfcd09 | 206 | bool is_fabrics; |
1c63dc66 | 207 | int (*reg_read32)(struct nvme_ctrl *ctrl, u32 off, u32 *val); |
5fd4ce1b | 208 | int (*reg_write32)(struct nvme_ctrl *ctrl, u32 off, u32 val); |
7fd8930f | 209 | int (*reg_read64)(struct nvme_ctrl *ctrl, u32 off, u64 *val); |
f3ca80fc | 210 | int (*reset_ctrl)(struct nvme_ctrl *ctrl); |
1673f1f0 | 211 | void (*free_ctrl)(struct nvme_ctrl *ctrl); |
f866fc42 | 212 | void (*submit_async_event)(struct nvme_ctrl *ctrl, int aer_idx); |
1a353d85 ML |
213 | int (*delete_ctrl)(struct nvme_ctrl *ctrl); |
214 | const char *(*get_subsysnqn)(struct nvme_ctrl *ctrl); | |
215 | int (*get_address)(struct nvme_ctrl *ctrl, char *buf, int size); | |
f11bb3e2 CH |
216 | }; |
217 | ||
1c63dc66 CH |
218 | static inline bool nvme_ctrl_ready(struct nvme_ctrl *ctrl) |
219 | { | |
220 | u32 val = 0; | |
221 | ||
222 | if (ctrl->ops->reg_read32(ctrl, NVME_REG_CSTS, &val)) | |
223 | return false; | |
224 | return val & NVME_CSTS_RDY; | |
225 | } | |
226 | ||
f3ca80fc CH |
227 | static inline int nvme_reset_subsystem(struct nvme_ctrl *ctrl) |
228 | { | |
229 | if (!ctrl->subsystem) | |
230 | return -ENOTTY; | |
231 | return ctrl->ops->reg_write32(ctrl, NVME_REG_NSSR, 0x4E564D65); | |
232 | } | |
233 | ||
f11bb3e2 CH |
234 | static inline u64 nvme_block_nr(struct nvme_ns *ns, sector_t sector) |
235 | { | |
236 | return (sector >> (ns->lba_shift - 9)); | |
237 | } | |
238 | ||
6904242d ML |
239 | static inline void nvme_cleanup_cmd(struct request *req) |
240 | { | |
f9d03f96 CH |
241 | if (req->rq_flags & RQF_SPECIAL_PAYLOAD) { |
242 | kfree(page_address(req->special_vec.bv_page) + | |
243 | req->special_vec.bv_offset); | |
244 | } | |
6904242d ML |
245 | } |
246 | ||
27fa9bc5 CH |
247 | static inline void nvme_end_request(struct request *req, __le16 status, |
248 | union nvme_result result) | |
15a190f7 | 249 | { |
27fa9bc5 CH |
250 | struct nvme_request *rq = nvme_req(req); |
251 | ||
252 | rq->status = le16_to_cpu(status) >> 1; | |
253 | rq->result = result; | |
254 | blk_mq_complete_request(req, 0); | |
15a190f7 CH |
255 | } |
256 | ||
77f02a7a | 257 | void nvme_complete_rq(struct request *req); |
c55a2fd4 | 258 | void nvme_cancel_request(struct request *req, void *data, bool reserved); |
bb8d261e CH |
259 | bool nvme_change_ctrl_state(struct nvme_ctrl *ctrl, |
260 | enum nvme_ctrl_state new_state); | |
5fd4ce1b CH |
261 | int nvme_disable_ctrl(struct nvme_ctrl *ctrl, u64 cap); |
262 | int nvme_enable_ctrl(struct nvme_ctrl *ctrl, u64 cap); | |
263 | int nvme_shutdown_ctrl(struct nvme_ctrl *ctrl); | |
f3ca80fc CH |
264 | int nvme_init_ctrl(struct nvme_ctrl *ctrl, struct device *dev, |
265 | const struct nvme_ctrl_ops *ops, unsigned long quirks); | |
53029b04 | 266 | void nvme_uninit_ctrl(struct nvme_ctrl *ctrl); |
1673f1f0 | 267 | void nvme_put_ctrl(struct nvme_ctrl *ctrl); |
7fd8930f | 268 | int nvme_init_identify(struct nvme_ctrl *ctrl); |
5bae7f73 | 269 | |
5955be21 | 270 | void nvme_queue_scan(struct nvme_ctrl *ctrl); |
5bae7f73 | 271 | void nvme_remove_namespaces(struct nvme_ctrl *ctrl); |
1673f1f0 | 272 | |
4f1244c8 CH |
273 | int nvme_sec_submit(void *data, u16 spsp, u8 secp, void *buffer, size_t len, |
274 | bool send); | |
a98e58e5 | 275 | |
f866fc42 | 276 | #define NVME_NR_AERS 1 |
7bf58533 CH |
277 | void nvme_complete_async_event(struct nvme_ctrl *ctrl, __le16 status, |
278 | union nvme_result *res); | |
f866fc42 CH |
279 | void nvme_queue_async_events(struct nvme_ctrl *ctrl); |
280 | ||
25646264 KB |
281 | void nvme_stop_queues(struct nvme_ctrl *ctrl); |
282 | void nvme_start_queues(struct nvme_ctrl *ctrl); | |
69d9a99c | 283 | void nvme_kill_queues(struct nvme_ctrl *ctrl); |
302ad8cc KB |
284 | void nvme_unfreeze(struct nvme_ctrl *ctrl); |
285 | void nvme_wait_freeze(struct nvme_ctrl *ctrl); | |
286 | void nvme_wait_freeze_timeout(struct nvme_ctrl *ctrl, long timeout); | |
287 | void nvme_start_freeze(struct nvme_ctrl *ctrl); | |
363c9aac | 288 | |
eb71f435 | 289 | #define NVME_QID_ANY -1 |
4160982e | 290 | struct request *nvme_alloc_request(struct request_queue *q, |
eb71f435 | 291 | struct nvme_command *cmd, unsigned int flags, int qid); |
8093f7ca ML |
292 | int nvme_setup_cmd(struct nvme_ns *ns, struct request *req, |
293 | struct nvme_command *cmd); | |
f11bb3e2 CH |
294 | int nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd, |
295 | void *buf, unsigned bufflen); | |
296 | int __nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd, | |
d49187e9 | 297 | union nvme_result *result, void *buffer, unsigned bufflen, |
eb71f435 | 298 | unsigned timeout, int qid, int at_head, int flags); |
4160982e CH |
299 | int nvme_submit_user_cmd(struct request_queue *q, struct nvme_command *cmd, |
300 | void __user *ubuffer, unsigned bufflen, u32 *result, | |
301 | unsigned timeout); | |
0b7f1f26 KB |
302 | int __nvme_submit_user_cmd(struct request_queue *q, struct nvme_command *cmd, |
303 | void __user *ubuffer, unsigned bufflen, | |
304 | void __user *meta_buffer, unsigned meta_len, u32 meta_seed, | |
f11bb3e2 | 305 | u32 *result, unsigned timeout); |
1c63dc66 CH |
306 | int nvme_identify_ctrl(struct nvme_ctrl *dev, struct nvme_id_ctrl **id); |
307 | int nvme_identify_ns(struct nvme_ctrl *dev, unsigned nsid, | |
f11bb3e2 | 308 | struct nvme_id_ns **id); |
1c63dc66 CH |
309 | int nvme_get_log_page(struct nvme_ctrl *dev, struct nvme_smart_log **log); |
310 | int nvme_get_features(struct nvme_ctrl *dev, unsigned fid, unsigned nsid, | |
1a6fe74d | 311 | void *buffer, size_t buflen, u32 *result); |
1c63dc66 | 312 | int nvme_set_features(struct nvme_ctrl *dev, unsigned fid, unsigned dword11, |
1a6fe74d | 313 | void *buffer, size_t buflen, u32 *result); |
9a0be7ab | 314 | int nvme_set_queue_count(struct nvme_ctrl *ctrl, int *count); |
038bd4cb SG |
315 | void nvme_start_keep_alive(struct nvme_ctrl *ctrl); |
316 | void nvme_stop_keep_alive(struct nvme_ctrl *ctrl); | |
f11bb3e2 CH |
317 | |
318 | struct sg_io_hdr; | |
319 | ||
320 | int nvme_sg_io(struct nvme_ns *ns, struct sg_io_hdr __user *u_hdr); | |
321 | int nvme_sg_io32(struct nvme_ns *ns, unsigned long arg); | |
322 | int nvme_sg_get_version_num(int __user *ip); | |
323 | ||
c4699e70 | 324 | #ifdef CONFIG_NVM |
ca064085 | 325 | int nvme_nvm_ns_supported(struct nvme_ns *ns, struct nvme_id_ns *id); |
3dc87dd0 | 326 | int nvme_nvm_register(struct nvme_ns *ns, char *disk_name, int node); |
b0b4e09c | 327 | void nvme_nvm_unregister(struct nvme_ns *ns); |
3dc87dd0 MB |
328 | int nvme_nvm_register_sysfs(struct nvme_ns *ns); |
329 | void nvme_nvm_unregister_sysfs(struct nvme_ns *ns); | |
84d4add7 | 330 | int nvme_nvm_ioctl(struct nvme_ns *ns, unsigned int cmd, unsigned long arg); |
c4699e70 | 331 | #else |
b0b4e09c | 332 | static inline int nvme_nvm_register(struct nvme_ns *ns, char *disk_name, |
3dc87dd0 | 333 | int node) |
c4699e70 KB |
334 | { |
335 | return 0; | |
336 | } | |
337 | ||
b0b4e09c | 338 | static inline void nvme_nvm_unregister(struct nvme_ns *ns) {}; |
3dc87dd0 MB |
339 | static inline int nvme_nvm_register_sysfs(struct nvme_ns *ns) |
340 | { | |
341 | return 0; | |
342 | } | |
343 | static inline void nvme_nvm_unregister_sysfs(struct nvme_ns *ns) {}; | |
c4699e70 KB |
344 | static inline int nvme_nvm_ns_supported(struct nvme_ns *ns, struct nvme_id_ns *id) |
345 | { | |
346 | return 0; | |
347 | } | |
84d4add7 MB |
348 | static inline int nvme_nvm_ioctl(struct nvme_ns *ns, unsigned int cmd, |
349 | unsigned long arg) | |
350 | { | |
351 | return -ENOTTY; | |
352 | } | |
3dc87dd0 MB |
353 | #endif /* CONFIG_NVM */ |
354 | ||
40267efd SL |
355 | static inline struct nvme_ns *nvme_get_ns_from_dev(struct device *dev) |
356 | { | |
357 | return dev_to_disk(dev)->private_data; | |
358 | } | |
ca064085 | 359 | |
5bae7f73 CH |
360 | int __init nvme_core_init(void); |
361 | void nvme_core_exit(void); | |
362 | ||
f11bb3e2 | 363 | #endif /* _NVME_H */ |