[mirror_ubuntu-artful-kernel.git] / drivers / nvme / host / nvme.h

/*
 * Copyright (c) 2011-2014, Intel Corporation.
 *
 * This program is free software; you can redistribute it and/or modify it
 * under the terms and conditions of the GNU General Public License,
 * version 2, as published by the Free Software Foundation.
 *
 * This program is distributed in the hope it will be useful, but WITHOUT
 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
 * more details.
 */

#ifndef _NVME_H
#define _NVME_H

#include <linux/nvme.h>
#include <linux/pci.h>
#include <linux/kref.h>
#include <linux/blk-mq.h>

enum {
	/*
	 * Driver internal status code for commands that were cancelled due
	 * to timeouts or controller shutdown.  The value is negative so
	 * that it a) doesn't overlap with the unsigned hardware error codes,
	 * and b) can easily be tested for.
	 */
	NVME_SC_CANCELLED		= -EINTR,
};

extern unsigned char nvme_io_timeout;
#define NVME_IO_TIMEOUT	(nvme_io_timeout * HZ)

extern unsigned char admin_timeout;
#define ADMIN_TIMEOUT	(admin_timeout * HZ)

extern unsigned char shutdown_timeout;
#define SHUTDOWN_TIMEOUT	(shutdown_timeout * HZ)

enum {
	NVME_NS_LBA		= 0,
	NVME_NS_LIGHTNVM	= 1,
};

/*
 * List of workarounds for devices that required behavior not specified in
 * the standard.
 */
enum nvme_quirks {
	/*
	 * Prefers I/O aligned to a stripe size specified in a vendor
	 * specific Identify field.
	 */
	NVME_QUIRK_STRIPE_SIZE			= (1 << 0),

	/*
	 * The controller doesn't handle Identify value others than 0 or 1
	 * correctly.
	 */
	NVME_QUIRK_IDENTIFY_CNS			= (1 << 1),

	/*
	 * The controller deterministically returns O's on reads to discarded
	 * logical blocks.
	 */
	NVME_QUIRK_DISCARD_ZEROES		= (1 << 2),
};

enum nvme_ctrl_state {
	NVME_CTRL_NEW,
	NVME_CTRL_LIVE,
	NVME_CTRL_RESETTING,
	NVME_CTRL_DELETING,
	NVME_CTRL_DEAD,
};

struct nvme_ctrl {
	enum nvme_ctrl_state state;
	spinlock_t lock;
	const struct nvme_ctrl_ops *ops;
	struct request_queue *admin_q;
	struct device *dev;
	struct kref kref;
	int instance;
	struct blk_mq_tag_set *tagset;
	struct list_head namespaces;
	struct mutex namespaces_mutex;
	struct device *device;	/* char device */
	struct list_head node;
	struct ida ns_ida;

	char name[12];
	char serial[20];
	char model[40];
	char firmware_rev[8];
	u16 cntlid;

	u32 ctrl_config;

	u32 page_size;
	u32 max_hw_sectors;
	u32 stripe_size;
	u16 oncs;
	u16 vid;
	atomic_t abort_limit;
	u8 event_limit;
	u8 vwc;
	u32 vs;
	bool subsystem;
	unsigned long quirks;
	struct work_struct scan_work;
	struct work_struct async_event_work;
};

/*
 * An NVM Express namespace is equivalent to a SCSI LUN
 */
struct nvme_ns {
	struct list_head list;

	struct nvme_ctrl *ctrl;
	struct request_queue *queue;
	struct gendisk *disk;
	struct kref kref;
	int instance;

	u8 eui[8];
	u8 uuid[16];

	unsigned ns_id;
	int lba_shift;
	u16 ms;
	bool ext;
	u8 pi_type;
	int type;
	unsigned long flags;

#define NVME_NS_REMOVING 0
#define NVME_NS_DEAD     1

	u64 mode_select_num_blocks;
	u32 mode_select_block_len;
};

struct nvme_ctrl_ops {
	const char *name;
	struct module *module;
	int (*reg_read32)(struct nvme_ctrl *ctrl, u32 off, u32 *val);
	int (*reg_write32)(struct nvme_ctrl *ctrl, u32 off, u32 val);
	int (*reg_read64)(struct nvme_ctrl *ctrl, u32 off, u64 *val);
	int (*reset_ctrl)(struct nvme_ctrl *ctrl);
	void (*free_ctrl)(struct nvme_ctrl *ctrl);
	void (*post_scan)(struct nvme_ctrl *ctrl);
	void (*submit_async_event)(struct nvme_ctrl *ctrl, int aer_idx);
	int (*delete_ctrl)(struct nvme_ctrl *ctrl);
	const char *(*get_subsysnqn)(struct nvme_ctrl *ctrl);
	int (*get_address)(struct nvme_ctrl *ctrl, char *buf, int size);
};

static inline bool nvme_ctrl_ready(struct nvme_ctrl *ctrl)
{
	u32 val = 0;

	if (ctrl->ops->reg_read32(ctrl, NVME_REG_CSTS, &val))
		return false;
	return val & NVME_CSTS_RDY;
}

static inline int nvme_reset_subsystem(struct nvme_ctrl *ctrl)
{
	if (!ctrl->subsystem)
		return -ENOTTY;
	return ctrl->ops->reg_write32(ctrl, NVME_REG_NSSR, 0x4E564D65);
}

static inline u64 nvme_block_nr(struct nvme_ns *ns, sector_t sector)
{
	return (sector >> (ns->lba_shift - 9));
}

static inline unsigned nvme_map_len(struct request *rq)
{
	if (req_op(rq) == REQ_OP_DISCARD)
		return sizeof(struct nvme_dsm_range);
	else
		return blk_rq_bytes(rq);
}

static inline void nvme_cleanup_cmd(struct request *req)
{
	if (req_op(req) == REQ_OP_DISCARD)
		kfree(req->completion_data);
}

static inline int nvme_error_status(u16 status)
{
	switch (status & 0x7ff) {
	case NVME_SC_SUCCESS:
		return 0;
	case NVME_SC_CAP_EXCEEDED:
		return -ENOSPC;
	default:
		return -EIO;
	}
}

static inline bool nvme_req_needs_retry(struct request *req, u16 status)
{
	return !(status & NVME_SC_DNR || blk_noretry_request(req)) &&
		(jiffies - req->start_time) < req->timeout;
}

void nvme_cancel_request(struct request *req, void *data, bool reserved);
bool nvme_change_ctrl_state(struct nvme_ctrl *ctrl,
		enum nvme_ctrl_state new_state);
int nvme_disable_ctrl(struct nvme_ctrl *ctrl, u64 cap);
int nvme_enable_ctrl(struct nvme_ctrl *ctrl, u64 cap);
int nvme_shutdown_ctrl(struct nvme_ctrl *ctrl);
int nvme_init_ctrl(struct nvme_ctrl *ctrl, struct device *dev,
		const struct nvme_ctrl_ops *ops, unsigned long quirks);
void nvme_uninit_ctrl(struct nvme_ctrl *ctrl);
void nvme_put_ctrl(struct nvme_ctrl *ctrl);
int nvme_init_identify(struct nvme_ctrl *ctrl);

void nvme_queue_scan(struct nvme_ctrl *ctrl);
void nvme_remove_namespaces(struct nvme_ctrl *ctrl);

#define NVME_NR_AERS	1
void nvme_complete_async_event(struct nvme_ctrl *ctrl,
		struct nvme_completion *cqe);
void nvme_queue_async_events(struct nvme_ctrl *ctrl);

void nvme_stop_queues(struct nvme_ctrl *ctrl);
void nvme_start_queues(struct nvme_ctrl *ctrl);
void nvme_kill_queues(struct nvme_ctrl *ctrl);

#define NVME_QID_ANY -1
struct request *nvme_alloc_request(struct request_queue *q,
		struct nvme_command *cmd, unsigned int flags, int qid);
void nvme_requeue_req(struct request *req);
int nvme_setup_cmd(struct nvme_ns *ns, struct request *req,
		struct nvme_command *cmd);
int nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd,
		void *buf, unsigned bufflen);
int __nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd,
		struct nvme_completion *cqe, void *buffer, unsigned bufflen,
		unsigned timeout, int qid, int at_head, int flags);
int nvme_submit_user_cmd(struct request_queue *q, struct nvme_command *cmd,
		void __user *ubuffer, unsigned bufflen, u32 *result,
		unsigned timeout);
int __nvme_submit_user_cmd(struct request_queue *q, struct nvme_command *cmd,
		void __user *ubuffer, unsigned bufflen,
		void __user *meta_buffer, unsigned meta_len, u32 meta_seed,
		u32 *result, unsigned timeout);
int nvme_identify_ctrl(struct nvme_ctrl *dev, struct nvme_id_ctrl **id);
int nvme_identify_ns(struct nvme_ctrl *dev, unsigned nsid,
		struct nvme_id_ns **id);
int nvme_get_log_page(struct nvme_ctrl *dev, struct nvme_smart_log **log);
int nvme_get_features(struct nvme_ctrl *dev, unsigned fid, unsigned nsid,
			dma_addr_t dma_addr, u32 *result);
int nvme_set_features(struct nvme_ctrl *dev, unsigned fid, unsigned dword11,
			dma_addr_t dma_addr, u32 *result);
int nvme_set_queue_count(struct nvme_ctrl *ctrl, int *count);

struct sg_io_hdr;

int nvme_sg_io(struct nvme_ns *ns, struct sg_io_hdr __user *u_hdr);
int nvme_sg_io32(struct nvme_ns *ns, unsigned long arg);
int nvme_sg_get_version_num(int __user *ip);

#ifdef CONFIG_NVM
int nvme_nvm_ns_supported(struct nvme_ns *ns, struct nvme_id_ns *id);
int nvme_nvm_register(struct request_queue *q, char *disk_name);
void nvme_nvm_unregister(struct request_queue *q, char *disk_name);
#else
static inline int nvme_nvm_register(struct request_queue *q, char *disk_name)
{
	return 0;
}

static inline void nvme_nvm_unregister(struct request_queue *q, char *disk_name) {};

static inline int nvme_nvm_ns_supported(struct nvme_ns *ns, struct nvme_id_ns *id)
{
	return 0;
}
#endif /* CONFIG_NVM */

int __init nvme_core_init(void);
void nvme_core_exit(void);

#endif /* _NVME_H */
Commit	Line	Data
f11bb3e2 CH	1	/*
	2	* Copyright (c) 2011-2014, Intel Corporation.
	3	*
	4	* This program is free software; you can redistribute it and/or modify it
	5	* under the terms and conditions of the GNU General Public License,
	6	* version 2, as published by the Free Software Foundation.
	7	*
	8	* This program is distributed in the hope it will be useful, but WITHOUT
	9	* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
	10	* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
	11	* more details.
	12	*/
	13
	14	#ifndef _NVME_H
	15	#define _NVME_H
	16
	17	#include <linux/nvme.h>
	18	#include <linux/pci.h>
	19	#include <linux/kref.h>
	20	#include <linux/blk-mq.h>
	21
297465c8 CH	22	enum {
	23	/*
	24	* Driver internal status code for commands that were cancelled due
	25	* to timeouts or controller shutdown. The value is negative so
	26	* that it a) doesn't overlap with the unsigned hardware error codes,
	27	* and b) can easily be tested for.
	28	*/
	29	NVME_SC_CANCELLED = -EINTR,
	30	};
	31
f11bb3e2 CH	32	extern unsigned char nvme_io_timeout;
	33	#define NVME_IO_TIMEOUT (nvme_io_timeout * HZ)
	34
21d34711 CH	35	extern unsigned char admin_timeout;
	36	#define ADMIN_TIMEOUT (admin_timeout * HZ)
	37
5fd4ce1b CH	38	extern unsigned char shutdown_timeout;
	39	#define SHUTDOWN_TIMEOUT (shutdown_timeout * HZ)
	40
ca064085 MB	41	enum {
	42	NVME_NS_LBA = 0,
	43	NVME_NS_LIGHTNVM = 1,
	44	};
	45
f11bb3e2	46	/*
106198ed CH	47	* List of workarounds for devices that required behavior not specified in
106198ed CH	48	* the standard.
f11bb3e2	49	*/
106198ed CH	50	enum nvme_quirks {
	51	/*
	52	* Prefers I/O aligned to a stripe size specified in a vendor
	53	* specific Identify field.
	54	*/
	55	NVME_QUIRK_STRIPE_SIZE = (1 << 0),
540c801c KB	56
	57	/*
	58	* The controller doesn't handle Identify value others than 0 or 1
	59	* correctly.
	60	*/
	61	NVME_QUIRK_IDENTIFY_CNS = (1 << 1),
08095e70 KB	62
	63	/*
	64	* The controller deterministically returns O's on reads to discarded
	65	* logical blocks.
	66	*/
	67	NVME_QUIRK_DISCARD_ZEROES = (1 << 2),
106198ed CH	68	};
106198ed CH	69
bb8d261e CH	70	enum nvme_ctrl_state {
	71	NVME_CTRL_NEW,
	72	NVME_CTRL_LIVE,
	73	NVME_CTRL_RESETTING,
	74	NVME_CTRL_DELETING,
0ff9d4e1	75	NVME_CTRL_DEAD,
bb8d261e CH	76	};
bb8d261e CH	77
1c63dc66	78	struct nvme_ctrl {
bb8d261e CH	79	enum nvme_ctrl_state state;
bb8d261e CH	80	spinlock_t lock;
1c63dc66	81	const struct nvme_ctrl_ops *ops;
f11bb3e2	82	struct request_queue *admin_q;
f11bb3e2	83	struct device *dev;
1673f1f0	84	struct kref kref;
f11bb3e2	85	int instance;
5bae7f73	86	struct blk_mq_tag_set *tagset;
f11bb3e2	87	struct list_head namespaces;
69d3b8ac	88	struct mutex namespaces_mutex;
5bae7f73	89	struct device device; / char device */
f3ca80fc	90	struct list_head node;
075790eb	91	struct ida ns_ida;
1c63dc66	92
f11bb3e2 CH	93	char name[12];
	94	char serial[20];
	95	char model[40];
	96	char firmware_rev[8];
76e3914a	97	u16 cntlid;
5fd4ce1b CH	98
	99	u32 ctrl_config;
	100
	101	u32 page_size;
f11bb3e2 CH	102	u32 max_hw_sectors;
f11bb3e2 CH	103	u32 stripe_size;
f11bb3e2	104	u16 oncs;
118472ab	105	u16 vid;
6bf25d16	106	atomic_t abort_limit;
f11bb3e2 CH	107	u8 event_limit;
f11bb3e2 CH	108	u8 vwc;
f3ca80fc CH	109	u32 vs;
f3ca80fc CH	110	bool subsystem;
106198ed	111	unsigned long quirks;
5955be21	112	struct work_struct scan_work;
f866fc42	113	struct work_struct async_event_work;
f11bb3e2 CH	114	};
	115
	116	/*
	117	* An NVM Express namespace is equivalent to a SCSI LUN
	118	*/
	119	struct nvme_ns {
	120	struct list_head list;
	121
1c63dc66	122	struct nvme_ctrl *ctrl;
f11bb3e2 CH	123	struct request_queue *queue;
	124	struct gendisk *disk;
	125	struct kref kref;
075790eb	126	int instance;
f11bb3e2	127
2b9b6e86 KB	128	u8 eui[8];
	129	u8 uuid[16];
	130
f11bb3e2 CH	131	unsigned ns_id;
	132	int lba_shift;
	133	u16 ms;
	134	bool ext;
	135	u8 pi_type;
ca064085	136	int type;
646017a6 KB	137	unsigned long flags;
	138
	139	#define NVME_NS_REMOVING 0
69d9a99c	140	#define NVME_NS_DEAD 1
646017a6	141
f11bb3e2 CH	142	u64 mode_select_num_blocks;
	143	u32 mode_select_block_len;
	144	};
	145
1c63dc66	146	struct nvme_ctrl_ops {
1a353d85	147	const char *name;
e439bb12	148	struct module *module;
1c63dc66	149	int (reg_read32)(struct nvme_ctrl ctrl, u32 off, u32 *val);
5fd4ce1b	150	int (reg_write32)(struct nvme_ctrl ctrl, u32 off, u32 val);
7fd8930f	151	int (reg_read64)(struct nvme_ctrl ctrl, u32 off, u64 *val);
f3ca80fc	152	int (reset_ctrl)(struct nvme_ctrl ctrl);
1673f1f0	153	void (free_ctrl)(struct nvme_ctrl ctrl);
5955be21	154	void (post_scan)(struct nvme_ctrl ctrl);
f866fc42	155	void (submit_async_event)(struct nvme_ctrl ctrl, int aer_idx);
1a353d85 ML	156	int (delete_ctrl)(struct nvme_ctrl ctrl);
	157	const char (get_subsysnqn)(struct nvme_ctrl *ctrl);
	158	int (get_address)(struct nvme_ctrl ctrl, char *buf, int size);
f11bb3e2 CH	159	};
f11bb3e2 CH	160
1c63dc66 CH	161	static inline bool nvme_ctrl_ready(struct nvme_ctrl *ctrl)
	162	{
	163	u32 val = 0;
	164
	165	if (ctrl->ops->reg_read32(ctrl, NVME_REG_CSTS, &val))
	166	return false;
	167	return val & NVME_CSTS_RDY;
	168	}
	169
f3ca80fc CH	170	static inline int nvme_reset_subsystem(struct nvme_ctrl *ctrl)
	171	{
	172	if (!ctrl->subsystem)
	173	return -ENOTTY;
	174	return ctrl->ops->reg_write32(ctrl, NVME_REG_NSSR, 0x4E564D65);
	175	}
	176
f11bb3e2 CH	177	static inline u64 nvme_block_nr(struct nvme_ns *ns, sector_t sector)
	178	{
	179	return (sector >> (ns->lba_shift - 9));
	180	}
	181
58b45602 ML	182	static inline unsigned nvme_map_len(struct request *rq)
58b45602 ML	183	{
c2df40df	184	if (req_op(rq) == REQ_OP_DISCARD)
58b45602 ML	185	return sizeof(struct nvme_dsm_range);
	186	else
	187	return blk_rq_bytes(rq);
	188	}
	189
6904242d ML	190	static inline void nvme_cleanup_cmd(struct request *req)
6904242d ML	191	{
c2df40df	192	if (req_op(req) == REQ_OP_DISCARD)
6904242d ML	193	kfree(req->completion_data);
	194	}
	195
15a190f7 CH	196	static inline int nvme_error_status(u16 status)
	197	{
	198	switch (status & 0x7ff) {
	199	case NVME_SC_SUCCESS:
	200	return 0;
	201	case NVME_SC_CAP_EXCEEDED:
	202	return -ENOSPC;
	203	default:
	204	return -EIO;
	205	}
	206	}
	207
7688faa6 CH	208	static inline bool nvme_req_needs_retry(struct request *req, u16 status)
	209	{
	210	return !(status & NVME_SC_DNR \|\| blk_noretry_request(req)) &&
	211	(jiffies - req->start_time) < req->timeout;
	212	}
	213
c55a2fd4	214	void nvme_cancel_request(struct request req, void data, bool reserved);
bb8d261e CH	215	bool nvme_change_ctrl_state(struct nvme_ctrl *ctrl,
bb8d261e CH	216	enum nvme_ctrl_state new_state);
5fd4ce1b CH	217	int nvme_disable_ctrl(struct nvme_ctrl *ctrl, u64 cap);
	218	int nvme_enable_ctrl(struct nvme_ctrl *ctrl, u64 cap);
	219	int nvme_shutdown_ctrl(struct nvme_ctrl *ctrl);
f3ca80fc CH	220	int nvme_init_ctrl(struct nvme_ctrl ctrl, struct device dev,
f3ca80fc CH	221	const struct nvme_ctrl_ops *ops, unsigned long quirks);
53029b04	222	void nvme_uninit_ctrl(struct nvme_ctrl *ctrl);
1673f1f0	223	void nvme_put_ctrl(struct nvme_ctrl *ctrl);
7fd8930f	224	int nvme_init_identify(struct nvme_ctrl *ctrl);
5bae7f73	225
5955be21	226	void nvme_queue_scan(struct nvme_ctrl *ctrl);
5bae7f73	227	void nvme_remove_namespaces(struct nvme_ctrl *ctrl);
1673f1f0	228
f866fc42 CH	229	#define NVME_NR_AERS 1
	230	void nvme_complete_async_event(struct nvme_ctrl *ctrl,
	231	struct nvme_completion *cqe);
	232	void nvme_queue_async_events(struct nvme_ctrl *ctrl);
	233
25646264 KB	234	void nvme_stop_queues(struct nvme_ctrl *ctrl);
25646264 KB	235	void nvme_start_queues(struct nvme_ctrl *ctrl);
69d9a99c	236	void nvme_kill_queues(struct nvme_ctrl *ctrl);
363c9aac	237
eb71f435	238	#define NVME_QID_ANY -1
4160982e	239	struct request nvme_alloc_request(struct request_queue q,
eb71f435	240	struct nvme_command *cmd, unsigned int flags, int qid);
7688faa6	241	void nvme_requeue_req(struct request *req);
8093f7ca ML	242	int nvme_setup_cmd(struct nvme_ns ns, struct request req,
8093f7ca ML	243	struct nvme_command *cmd);
f11bb3e2 CH	244	int nvme_submit_sync_cmd(struct request_queue q, struct nvme_command cmd,
	245	void *buf, unsigned bufflen);
	246	int __nvme_submit_sync_cmd(struct request_queue q, struct nvme_command cmd,
1cb3cce5	247	struct nvme_completion cqe, void buffer, unsigned bufflen,
eb71f435	248	unsigned timeout, int qid, int at_head, int flags);
4160982e CH	249	int nvme_submit_user_cmd(struct request_queue q, struct nvme_command cmd,
	250	void __user ubuffer, unsigned bufflen, u32 result,
	251	unsigned timeout);
0b7f1f26 KB	252	int __nvme_submit_user_cmd(struct request_queue q, struct nvme_command cmd,
	253	void __user *ubuffer, unsigned bufflen,
	254	void __user *meta_buffer, unsigned meta_len, u32 meta_seed,
f11bb3e2	255	u32 *result, unsigned timeout);
1c63dc66 CH	256	int nvme_identify_ctrl(struct nvme_ctrl dev, struct nvme_id_ctrl *id);
1c63dc66 CH	257	int nvme_identify_ns(struct nvme_ctrl *dev, unsigned nsid,
f11bb3e2	258	struct nvme_id_ns **id);
1c63dc66 CH	259	int nvme_get_log_page(struct nvme_ctrl dev, struct nvme_smart_log *log);
1c63dc66 CH	260	int nvme_get_features(struct nvme_ctrl *dev, unsigned fid, unsigned nsid,
f11bb3e2	261	dma_addr_t dma_addr, u32 *result);
1c63dc66	262	int nvme_set_features(struct nvme_ctrl *dev, unsigned fid, unsigned dword11,
f11bb3e2	263	dma_addr_t dma_addr, u32 *result);
9a0be7ab	264	int nvme_set_queue_count(struct nvme_ctrl ctrl, int count);
f11bb3e2 CH	265
	266	struct sg_io_hdr;
	267
	268	int nvme_sg_io(struct nvme_ns ns, struct sg_io_hdr __user u_hdr);
	269	int nvme_sg_io32(struct nvme_ns *ns, unsigned long arg);
	270	int nvme_sg_get_version_num(int __user *ip);
	271
c4699e70	272	#ifdef CONFIG_NVM
ca064085 MB	273	int nvme_nvm_ns_supported(struct nvme_ns ns, struct nvme_id_ns id);
	274	int nvme_nvm_register(struct request_queue q, char disk_name);
	275	void nvme_nvm_unregister(struct request_queue q, char disk_name);
c4699e70 KB	276	#else
	277	static inline int nvme_nvm_register(struct request_queue q, char disk_name)
	278	{
	279	return 0;
	280	}
	281
	282	static inline void nvme_nvm_unregister(struct request_queue q, char disk_name) {};
	283
	284	static inline int nvme_nvm_ns_supported(struct nvme_ns ns, struct nvme_id_ns id)
	285	{
	286	return 0;
	287	}
	288	#endif /* CONFIG_NVM */
ca064085	289
5bae7f73 CH	290	int __init nvme_core_init(void);
	291	void nvme_core_exit(void);
	292
f11bb3e2	293	#endif /* _NVME_H */