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Commit | Line | Data |
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71102307 CH |
1 | /* |
2 | * NVMe over Fabrics RDMA host code. | |
3 | * Copyright (c) 2015-2016 HGST, a Western Digital Company. | |
4 | * | |
5 | * This program is free software; you can redistribute it and/or modify it | |
6 | * under the terms and conditions of the GNU General Public License, | |
7 | * version 2, as published by the Free Software Foundation. | |
8 | * | |
9 | * This program is distributed in the hope it will be useful, but WITHOUT | |
10 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
11 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | |
12 | * more details. | |
13 | */ | |
14 | #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt | |
71102307 CH |
15 | #include <linux/module.h> |
16 | #include <linux/init.h> | |
17 | #include <linux/slab.h> | |
18 | #include <linux/err.h> | |
19 | #include <linux/string.h> | |
71102307 CH |
20 | #include <linux/atomic.h> |
21 | #include <linux/blk-mq.h> | |
22 | #include <linux/types.h> | |
23 | #include <linux/list.h> | |
24 | #include <linux/mutex.h> | |
25 | #include <linux/scatterlist.h> | |
26 | #include <linux/nvme.h> | |
71102307 CH |
27 | #include <asm/unaligned.h> |
28 | ||
29 | #include <rdma/ib_verbs.h> | |
30 | #include <rdma/rdma_cm.h> | |
71102307 CH |
31 | #include <linux/nvme-rdma.h> |
32 | ||
33 | #include "nvme.h" | |
34 | #include "fabrics.h" | |
35 | ||
36 | ||
782d820c | 37 | #define NVME_RDMA_CONNECT_TIMEOUT_MS 3000 /* 3 second */ |
71102307 CH |
38 | |
39 | #define NVME_RDMA_MAX_SEGMENT_SIZE 0xffffff /* 24-bit SGL field */ | |
40 | ||
41 | #define NVME_RDMA_MAX_SEGMENTS 256 | |
42 | ||
43 | #define NVME_RDMA_MAX_INLINE_SEGMENTS 1 | |
44 | ||
71102307 CH |
45 | /* |
46 | * We handle AEN commands ourselves and don't even let the | |
47 | * block layer know about them. | |
48 | */ | |
49 | #define NVME_RDMA_NR_AEN_COMMANDS 1 | |
50 | #define NVME_RDMA_AQ_BLKMQ_DEPTH \ | |
7aa1f427 | 51 | (NVME_AQ_DEPTH - NVME_RDMA_NR_AEN_COMMANDS) |
71102307 CH |
52 | |
53 | struct nvme_rdma_device { | |
54 | struct ib_device *dev; | |
55 | struct ib_pd *pd; | |
71102307 CH |
56 | struct kref ref; |
57 | struct list_head entry; | |
58 | }; | |
59 | ||
60 | struct nvme_rdma_qe { | |
61 | struct ib_cqe cqe; | |
62 | void *data; | |
63 | u64 dma; | |
64 | }; | |
65 | ||
66 | struct nvme_rdma_queue; | |
67 | struct nvme_rdma_request { | |
d49187e9 | 68 | struct nvme_request req; |
71102307 CH |
69 | struct ib_mr *mr; |
70 | struct nvme_rdma_qe sqe; | |
71 | struct ib_sge sge[1 + NVME_RDMA_MAX_INLINE_SEGMENTS]; | |
72 | u32 num_sge; | |
73 | int nents; | |
74 | bool inline_data; | |
71102307 CH |
75 | struct ib_reg_wr reg_wr; |
76 | struct ib_cqe reg_cqe; | |
77 | struct nvme_rdma_queue *queue; | |
78 | struct sg_table sg_table; | |
79 | struct scatterlist first_sgl[]; | |
80 | }; | |
81 | ||
82 | enum nvme_rdma_queue_flags { | |
b282a88d | 83 | NVME_RDMA_Q_LIVE = 0, |
abf87d5e | 84 | NVME_RDMA_Q_DELETING = 1, |
71102307 CH |
85 | }; |
86 | ||
87 | struct nvme_rdma_queue { | |
88 | struct nvme_rdma_qe *rsp_ring; | |
5e599d73 | 89 | atomic_t sig_count; |
71102307 CH |
90 | int queue_size; |
91 | size_t cmnd_capsule_len; | |
92 | struct nvme_rdma_ctrl *ctrl; | |
93 | struct nvme_rdma_device *device; | |
94 | struct ib_cq *ib_cq; | |
95 | struct ib_qp *qp; | |
96 | ||
97 | unsigned long flags; | |
98 | struct rdma_cm_id *cm_id; | |
99 | int cm_error; | |
100 | struct completion cm_done; | |
101 | }; | |
102 | ||
103 | struct nvme_rdma_ctrl { | |
71102307 CH |
104 | /* read only in the hot path */ |
105 | struct nvme_rdma_queue *queues; | |
71102307 CH |
106 | |
107 | /* other member variables */ | |
71102307 CH |
108 | struct blk_mq_tag_set tag_set; |
109 | struct work_struct delete_work; | |
71102307 CH |
110 | struct work_struct err_work; |
111 | ||
112 | struct nvme_rdma_qe async_event_sqe; | |
113 | ||
71102307 CH |
114 | struct delayed_work reconnect_work; |
115 | ||
116 | struct list_head list; | |
117 | ||
118 | struct blk_mq_tag_set admin_tag_set; | |
119 | struct nvme_rdma_device *device; | |
120 | ||
71102307 CH |
121 | u32 max_fr_pages; |
122 | ||
0928f9b4 SG |
123 | struct sockaddr_storage addr; |
124 | struct sockaddr_storage src_addr; | |
71102307 CH |
125 | |
126 | struct nvme_ctrl ctrl; | |
127 | }; | |
128 | ||
129 | static inline struct nvme_rdma_ctrl *to_rdma_ctrl(struct nvme_ctrl *ctrl) | |
130 | { | |
131 | return container_of(ctrl, struct nvme_rdma_ctrl, ctrl); | |
132 | } | |
133 | ||
134 | static LIST_HEAD(device_list); | |
135 | static DEFINE_MUTEX(device_list_mutex); | |
136 | ||
137 | static LIST_HEAD(nvme_rdma_ctrl_list); | |
138 | static DEFINE_MUTEX(nvme_rdma_ctrl_mutex); | |
139 | ||
71102307 CH |
140 | /* |
141 | * Disabling this option makes small I/O goes faster, but is fundamentally | |
142 | * unsafe. With it turned off we will have to register a global rkey that | |
143 | * allows read and write access to all physical memory. | |
144 | */ | |
145 | static bool register_always = true; | |
146 | module_param(register_always, bool, 0444); | |
147 | MODULE_PARM_DESC(register_always, | |
148 | "Use memory registration even for contiguous memory regions"); | |
149 | ||
150 | static int nvme_rdma_cm_handler(struct rdma_cm_id *cm_id, | |
151 | struct rdma_cm_event *event); | |
152 | static void nvme_rdma_recv_done(struct ib_cq *cq, struct ib_wc *wc); | |
71102307 CH |
153 | |
154 | /* XXX: really should move to a generic header sooner or later.. */ | |
155 | static inline void put_unaligned_le24(u32 val, u8 *p) | |
156 | { | |
157 | *p++ = val; | |
158 | *p++ = val >> 8; | |
159 | *p++ = val >> 16; | |
160 | } | |
161 | ||
162 | static inline int nvme_rdma_queue_idx(struct nvme_rdma_queue *queue) | |
163 | { | |
164 | return queue - queue->ctrl->queues; | |
165 | } | |
166 | ||
167 | static inline size_t nvme_rdma_inline_data_size(struct nvme_rdma_queue *queue) | |
168 | { | |
169 | return queue->cmnd_capsule_len - sizeof(struct nvme_command); | |
170 | } | |
171 | ||
172 | static void nvme_rdma_free_qe(struct ib_device *ibdev, struct nvme_rdma_qe *qe, | |
173 | size_t capsule_size, enum dma_data_direction dir) | |
174 | { | |
175 | ib_dma_unmap_single(ibdev, qe->dma, capsule_size, dir); | |
176 | kfree(qe->data); | |
177 | } | |
178 | ||
179 | static int nvme_rdma_alloc_qe(struct ib_device *ibdev, struct nvme_rdma_qe *qe, | |
180 | size_t capsule_size, enum dma_data_direction dir) | |
181 | { | |
182 | qe->data = kzalloc(capsule_size, GFP_KERNEL); | |
183 | if (!qe->data) | |
184 | return -ENOMEM; | |
185 | ||
186 | qe->dma = ib_dma_map_single(ibdev, qe->data, capsule_size, dir); | |
187 | if (ib_dma_mapping_error(ibdev, qe->dma)) { | |
188 | kfree(qe->data); | |
189 | return -ENOMEM; | |
190 | } | |
191 | ||
192 | return 0; | |
193 | } | |
194 | ||
195 | static void nvme_rdma_free_ring(struct ib_device *ibdev, | |
196 | struct nvme_rdma_qe *ring, size_t ib_queue_size, | |
197 | size_t capsule_size, enum dma_data_direction dir) | |
198 | { | |
199 | int i; | |
200 | ||
201 | for (i = 0; i < ib_queue_size; i++) | |
202 | nvme_rdma_free_qe(ibdev, &ring[i], capsule_size, dir); | |
203 | kfree(ring); | |
204 | } | |
205 | ||
206 | static struct nvme_rdma_qe *nvme_rdma_alloc_ring(struct ib_device *ibdev, | |
207 | size_t ib_queue_size, size_t capsule_size, | |
208 | enum dma_data_direction dir) | |
209 | { | |
210 | struct nvme_rdma_qe *ring; | |
211 | int i; | |
212 | ||
213 | ring = kcalloc(ib_queue_size, sizeof(struct nvme_rdma_qe), GFP_KERNEL); | |
214 | if (!ring) | |
215 | return NULL; | |
216 | ||
217 | for (i = 0; i < ib_queue_size; i++) { | |
218 | if (nvme_rdma_alloc_qe(ibdev, &ring[i], capsule_size, dir)) | |
219 | goto out_free_ring; | |
220 | } | |
221 | ||
222 | return ring; | |
223 | ||
224 | out_free_ring: | |
225 | nvme_rdma_free_ring(ibdev, ring, i, capsule_size, dir); | |
226 | return NULL; | |
227 | } | |
228 | ||
229 | static void nvme_rdma_qp_event(struct ib_event *event, void *context) | |
230 | { | |
27a4beef MG |
231 | pr_debug("QP event %s (%d)\n", |
232 | ib_event_msg(event->event), event->event); | |
233 | ||
71102307 CH |
234 | } |
235 | ||
236 | static int nvme_rdma_wait_for_cm(struct nvme_rdma_queue *queue) | |
237 | { | |
238 | wait_for_completion_interruptible_timeout(&queue->cm_done, | |
239 | msecs_to_jiffies(NVME_RDMA_CONNECT_TIMEOUT_MS) + 1); | |
240 | return queue->cm_error; | |
241 | } | |
242 | ||
243 | static int nvme_rdma_create_qp(struct nvme_rdma_queue *queue, const int factor) | |
244 | { | |
245 | struct nvme_rdma_device *dev = queue->device; | |
246 | struct ib_qp_init_attr init_attr; | |
247 | int ret; | |
248 | ||
249 | memset(&init_attr, 0, sizeof(init_attr)); | |
250 | init_attr.event_handler = nvme_rdma_qp_event; | |
251 | /* +1 for drain */ | |
252 | init_attr.cap.max_send_wr = factor * queue->queue_size + 1; | |
253 | /* +1 for drain */ | |
254 | init_attr.cap.max_recv_wr = queue->queue_size + 1; | |
255 | init_attr.cap.max_recv_sge = 1; | |
256 | init_attr.cap.max_send_sge = 1 + NVME_RDMA_MAX_INLINE_SEGMENTS; | |
257 | init_attr.sq_sig_type = IB_SIGNAL_REQ_WR; | |
258 | init_attr.qp_type = IB_QPT_RC; | |
259 | init_attr.send_cq = queue->ib_cq; | |
260 | init_attr.recv_cq = queue->ib_cq; | |
261 | ||
262 | ret = rdma_create_qp(queue->cm_id, dev->pd, &init_attr); | |
263 | ||
264 | queue->qp = queue->cm_id->qp; | |
265 | return ret; | |
266 | } | |
267 | ||
268 | static int nvme_rdma_reinit_request(void *data, struct request *rq) | |
269 | { | |
270 | struct nvme_rdma_ctrl *ctrl = data; | |
271 | struct nvme_rdma_device *dev = ctrl->device; | |
272 | struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq); | |
273 | int ret = 0; | |
274 | ||
71102307 CH |
275 | ib_dereg_mr(req->mr); |
276 | ||
277 | req->mr = ib_alloc_mr(dev->pd, IB_MR_TYPE_MEM_REG, | |
278 | ctrl->max_fr_pages); | |
279 | if (IS_ERR(req->mr)) { | |
71102307 | 280 | ret = PTR_ERR(req->mr); |
458a9632 | 281 | req->mr = NULL; |
1bda18de | 282 | goto out; |
71102307 CH |
283 | } |
284 | ||
f5b7b559 | 285 | req->mr->need_inval = false; |
71102307 CH |
286 | |
287 | out: | |
288 | return ret; | |
289 | } | |
290 | ||
385475ee CH |
291 | static void nvme_rdma_exit_request(struct blk_mq_tag_set *set, |
292 | struct request *rq, unsigned int hctx_idx) | |
71102307 | 293 | { |
385475ee | 294 | struct nvme_rdma_ctrl *ctrl = set->driver_data; |
71102307 | 295 | struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq); |
385475ee | 296 | int queue_idx = (set == &ctrl->tag_set) ? hctx_idx + 1 : 0; |
71102307 CH |
297 | struct nvme_rdma_queue *queue = &ctrl->queues[queue_idx]; |
298 | struct nvme_rdma_device *dev = queue->device; | |
299 | ||
300 | if (req->mr) | |
301 | ib_dereg_mr(req->mr); | |
302 | ||
303 | nvme_rdma_free_qe(dev->dev, &req->sqe, sizeof(struct nvme_command), | |
304 | DMA_TO_DEVICE); | |
305 | } | |
306 | ||
385475ee CH |
307 | static int nvme_rdma_init_request(struct blk_mq_tag_set *set, |
308 | struct request *rq, unsigned int hctx_idx, | |
309 | unsigned int numa_node) | |
71102307 | 310 | { |
385475ee | 311 | struct nvme_rdma_ctrl *ctrl = set->driver_data; |
71102307 | 312 | struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq); |
385475ee | 313 | int queue_idx = (set == &ctrl->tag_set) ? hctx_idx + 1 : 0; |
71102307 CH |
314 | struct nvme_rdma_queue *queue = &ctrl->queues[queue_idx]; |
315 | struct nvme_rdma_device *dev = queue->device; | |
316 | struct ib_device *ibdev = dev->dev; | |
317 | int ret; | |
318 | ||
71102307 CH |
319 | ret = nvme_rdma_alloc_qe(ibdev, &req->sqe, sizeof(struct nvme_command), |
320 | DMA_TO_DEVICE); | |
321 | if (ret) | |
322 | return ret; | |
323 | ||
324 | req->mr = ib_alloc_mr(dev->pd, IB_MR_TYPE_MEM_REG, | |
325 | ctrl->max_fr_pages); | |
326 | if (IS_ERR(req->mr)) { | |
327 | ret = PTR_ERR(req->mr); | |
328 | goto out_free_qe; | |
329 | } | |
330 | ||
331 | req->queue = queue; | |
332 | ||
333 | return 0; | |
334 | ||
335 | out_free_qe: | |
336 | nvme_rdma_free_qe(dev->dev, &req->sqe, sizeof(struct nvme_command), | |
337 | DMA_TO_DEVICE); | |
338 | return -ENOMEM; | |
339 | } | |
340 | ||
71102307 CH |
341 | static int nvme_rdma_init_hctx(struct blk_mq_hw_ctx *hctx, void *data, |
342 | unsigned int hctx_idx) | |
343 | { | |
344 | struct nvme_rdma_ctrl *ctrl = data; | |
345 | struct nvme_rdma_queue *queue = &ctrl->queues[hctx_idx + 1]; | |
346 | ||
d858e5f0 | 347 | BUG_ON(hctx_idx >= ctrl->ctrl.queue_count); |
71102307 CH |
348 | |
349 | hctx->driver_data = queue; | |
350 | return 0; | |
351 | } | |
352 | ||
353 | static int nvme_rdma_init_admin_hctx(struct blk_mq_hw_ctx *hctx, void *data, | |
354 | unsigned int hctx_idx) | |
355 | { | |
356 | struct nvme_rdma_ctrl *ctrl = data; | |
357 | struct nvme_rdma_queue *queue = &ctrl->queues[0]; | |
358 | ||
359 | BUG_ON(hctx_idx != 0); | |
360 | ||
361 | hctx->driver_data = queue; | |
362 | return 0; | |
363 | } | |
364 | ||
365 | static void nvme_rdma_free_dev(struct kref *ref) | |
366 | { | |
367 | struct nvme_rdma_device *ndev = | |
368 | container_of(ref, struct nvme_rdma_device, ref); | |
369 | ||
370 | mutex_lock(&device_list_mutex); | |
371 | list_del(&ndev->entry); | |
372 | mutex_unlock(&device_list_mutex); | |
373 | ||
71102307 | 374 | ib_dealloc_pd(ndev->pd); |
71102307 CH |
375 | kfree(ndev); |
376 | } | |
377 | ||
378 | static void nvme_rdma_dev_put(struct nvme_rdma_device *dev) | |
379 | { | |
380 | kref_put(&dev->ref, nvme_rdma_free_dev); | |
381 | } | |
382 | ||
383 | static int nvme_rdma_dev_get(struct nvme_rdma_device *dev) | |
384 | { | |
385 | return kref_get_unless_zero(&dev->ref); | |
386 | } | |
387 | ||
388 | static struct nvme_rdma_device * | |
389 | nvme_rdma_find_get_device(struct rdma_cm_id *cm_id) | |
390 | { | |
391 | struct nvme_rdma_device *ndev; | |
392 | ||
393 | mutex_lock(&device_list_mutex); | |
394 | list_for_each_entry(ndev, &device_list, entry) { | |
395 | if (ndev->dev->node_guid == cm_id->device->node_guid && | |
396 | nvme_rdma_dev_get(ndev)) | |
397 | goto out_unlock; | |
398 | } | |
399 | ||
400 | ndev = kzalloc(sizeof(*ndev), GFP_KERNEL); | |
401 | if (!ndev) | |
402 | goto out_err; | |
403 | ||
404 | ndev->dev = cm_id->device; | |
405 | kref_init(&ndev->ref); | |
406 | ||
11975e01 CH |
407 | ndev->pd = ib_alloc_pd(ndev->dev, |
408 | register_always ? 0 : IB_PD_UNSAFE_GLOBAL_RKEY); | |
71102307 CH |
409 | if (IS_ERR(ndev->pd)) |
410 | goto out_free_dev; | |
411 | ||
71102307 CH |
412 | if (!(ndev->dev->attrs.device_cap_flags & |
413 | IB_DEVICE_MEM_MGT_EXTENSIONS)) { | |
414 | dev_err(&ndev->dev->dev, | |
415 | "Memory registrations not supported.\n"); | |
11975e01 | 416 | goto out_free_pd; |
71102307 CH |
417 | } |
418 | ||
419 | list_add(&ndev->entry, &device_list); | |
420 | out_unlock: | |
421 | mutex_unlock(&device_list_mutex); | |
422 | return ndev; | |
423 | ||
71102307 CH |
424 | out_free_pd: |
425 | ib_dealloc_pd(ndev->pd); | |
426 | out_free_dev: | |
427 | kfree(ndev); | |
428 | out_err: | |
429 | mutex_unlock(&device_list_mutex); | |
430 | return NULL; | |
431 | } | |
432 | ||
433 | static void nvme_rdma_destroy_queue_ib(struct nvme_rdma_queue *queue) | |
434 | { | |
f361e5a0 SW |
435 | struct nvme_rdma_device *dev; |
436 | struct ib_device *ibdev; | |
71102307 | 437 | |
f361e5a0 SW |
438 | dev = queue->device; |
439 | ibdev = dev->dev; | |
71102307 CH |
440 | rdma_destroy_qp(queue->cm_id); |
441 | ib_free_cq(queue->ib_cq); | |
442 | ||
443 | nvme_rdma_free_ring(ibdev, queue->rsp_ring, queue->queue_size, | |
444 | sizeof(struct nvme_completion), DMA_FROM_DEVICE); | |
445 | ||
446 | nvme_rdma_dev_put(dev); | |
447 | } | |
448 | ||
ca6e95bb | 449 | static int nvme_rdma_create_queue_ib(struct nvme_rdma_queue *queue) |
71102307 | 450 | { |
ca6e95bb | 451 | struct ib_device *ibdev; |
71102307 CH |
452 | const int send_wr_factor = 3; /* MR, SEND, INV */ |
453 | const int cq_factor = send_wr_factor + 1; /* + RECV */ | |
454 | int comp_vector, idx = nvme_rdma_queue_idx(queue); | |
71102307 CH |
455 | int ret; |
456 | ||
ca6e95bb SG |
457 | queue->device = nvme_rdma_find_get_device(queue->cm_id); |
458 | if (!queue->device) { | |
459 | dev_err(queue->cm_id->device->dev.parent, | |
460 | "no client data found!\n"); | |
461 | return -ECONNREFUSED; | |
462 | } | |
463 | ibdev = queue->device->dev; | |
71102307 CH |
464 | |
465 | /* | |
466 | * The admin queue is barely used once the controller is live, so don't | |
467 | * bother to spread it out. | |
468 | */ | |
469 | if (idx == 0) | |
470 | comp_vector = 0; | |
471 | else | |
472 | comp_vector = idx % ibdev->num_comp_vectors; | |
473 | ||
474 | ||
475 | /* +1 for ib_stop_cq */ | |
ca6e95bb SG |
476 | queue->ib_cq = ib_alloc_cq(ibdev, queue, |
477 | cq_factor * queue->queue_size + 1, | |
478 | comp_vector, IB_POLL_SOFTIRQ); | |
71102307 CH |
479 | if (IS_ERR(queue->ib_cq)) { |
480 | ret = PTR_ERR(queue->ib_cq); | |
ca6e95bb | 481 | goto out_put_dev; |
71102307 CH |
482 | } |
483 | ||
484 | ret = nvme_rdma_create_qp(queue, send_wr_factor); | |
485 | if (ret) | |
486 | goto out_destroy_ib_cq; | |
487 | ||
488 | queue->rsp_ring = nvme_rdma_alloc_ring(ibdev, queue->queue_size, | |
489 | sizeof(struct nvme_completion), DMA_FROM_DEVICE); | |
490 | if (!queue->rsp_ring) { | |
491 | ret = -ENOMEM; | |
492 | goto out_destroy_qp; | |
493 | } | |
494 | ||
495 | return 0; | |
496 | ||
497 | out_destroy_qp: | |
498 | ib_destroy_qp(queue->qp); | |
499 | out_destroy_ib_cq: | |
500 | ib_free_cq(queue->ib_cq); | |
ca6e95bb SG |
501 | out_put_dev: |
502 | nvme_rdma_dev_put(queue->device); | |
71102307 CH |
503 | return ret; |
504 | } | |
505 | ||
506 | static int nvme_rdma_init_queue(struct nvme_rdma_ctrl *ctrl, | |
507 | int idx, size_t queue_size) | |
508 | { | |
509 | struct nvme_rdma_queue *queue; | |
8f4e8dac | 510 | struct sockaddr *src_addr = NULL; |
71102307 CH |
511 | int ret; |
512 | ||
513 | queue = &ctrl->queues[idx]; | |
514 | queue->ctrl = ctrl; | |
515 | init_completion(&queue->cm_done); | |
516 | ||
517 | if (idx > 0) | |
518 | queue->cmnd_capsule_len = ctrl->ctrl.ioccsz * 16; | |
519 | else | |
520 | queue->cmnd_capsule_len = sizeof(struct nvme_command); | |
521 | ||
522 | queue->queue_size = queue_size; | |
5e599d73 | 523 | atomic_set(&queue->sig_count, 0); |
71102307 CH |
524 | |
525 | queue->cm_id = rdma_create_id(&init_net, nvme_rdma_cm_handler, queue, | |
526 | RDMA_PS_TCP, IB_QPT_RC); | |
527 | if (IS_ERR(queue->cm_id)) { | |
528 | dev_info(ctrl->ctrl.device, | |
529 | "failed to create CM ID: %ld\n", PTR_ERR(queue->cm_id)); | |
530 | return PTR_ERR(queue->cm_id); | |
531 | } | |
532 | ||
8f4e8dac | 533 | if (ctrl->ctrl.opts->mask & NVMF_OPT_HOST_TRADDR) |
0928f9b4 | 534 | src_addr = (struct sockaddr *)&ctrl->src_addr; |
8f4e8dac | 535 | |
0928f9b4 SG |
536 | queue->cm_error = -ETIMEDOUT; |
537 | ret = rdma_resolve_addr(queue->cm_id, src_addr, | |
538 | (struct sockaddr *)&ctrl->addr, | |
71102307 CH |
539 | NVME_RDMA_CONNECT_TIMEOUT_MS); |
540 | if (ret) { | |
541 | dev_info(ctrl->ctrl.device, | |
542 | "rdma_resolve_addr failed (%d).\n", ret); | |
543 | goto out_destroy_cm_id; | |
544 | } | |
545 | ||
546 | ret = nvme_rdma_wait_for_cm(queue); | |
547 | if (ret) { | |
548 | dev_info(ctrl->ctrl.device, | |
549 | "rdma_resolve_addr wait failed (%d).\n", ret); | |
550 | goto out_destroy_cm_id; | |
551 | } | |
552 | ||
3b4ac786 | 553 | clear_bit(NVME_RDMA_Q_DELETING, &queue->flags); |
71102307 CH |
554 | |
555 | return 0; | |
556 | ||
557 | out_destroy_cm_id: | |
558 | rdma_destroy_id(queue->cm_id); | |
559 | return ret; | |
560 | } | |
561 | ||
562 | static void nvme_rdma_stop_queue(struct nvme_rdma_queue *queue) | |
563 | { | |
564 | rdma_disconnect(queue->cm_id); | |
565 | ib_drain_qp(queue->qp); | |
566 | } | |
567 | ||
568 | static void nvme_rdma_free_queue(struct nvme_rdma_queue *queue) | |
569 | { | |
570 | nvme_rdma_destroy_queue_ib(queue); | |
571 | rdma_destroy_id(queue->cm_id); | |
572 | } | |
573 | ||
574 | static void nvme_rdma_stop_and_free_queue(struct nvme_rdma_queue *queue) | |
575 | { | |
e89ca58f | 576 | if (test_and_set_bit(NVME_RDMA_Q_DELETING, &queue->flags)) |
71102307 CH |
577 | return; |
578 | nvme_rdma_stop_queue(queue); | |
579 | nvme_rdma_free_queue(queue); | |
580 | } | |
581 | ||
582 | static void nvme_rdma_free_io_queues(struct nvme_rdma_ctrl *ctrl) | |
583 | { | |
584 | int i; | |
585 | ||
d858e5f0 | 586 | for (i = 1; i < ctrl->ctrl.queue_count; i++) |
71102307 CH |
587 | nvme_rdma_stop_and_free_queue(&ctrl->queues[i]); |
588 | } | |
589 | ||
590 | static int nvme_rdma_connect_io_queues(struct nvme_rdma_ctrl *ctrl) | |
591 | { | |
592 | int i, ret = 0; | |
593 | ||
d858e5f0 | 594 | for (i = 1; i < ctrl->ctrl.queue_count; i++) { |
71102307 | 595 | ret = nvmf_connect_io_queue(&ctrl->ctrl, i); |
c8dbc37c SW |
596 | if (ret) { |
597 | dev_info(ctrl->ctrl.device, | |
598 | "failed to connect i/o queue: %d\n", ret); | |
599 | goto out_free_queues; | |
600 | } | |
553cd9ef | 601 | set_bit(NVME_RDMA_Q_LIVE, &ctrl->queues[i].flags); |
71102307 CH |
602 | } |
603 | ||
c8dbc37c SW |
604 | return 0; |
605 | ||
606 | out_free_queues: | |
607 | nvme_rdma_free_io_queues(ctrl); | |
71102307 CH |
608 | return ret; |
609 | } | |
610 | ||
611 | static int nvme_rdma_init_io_queues(struct nvme_rdma_ctrl *ctrl) | |
612 | { | |
c248c643 SG |
613 | struct nvmf_ctrl_options *opts = ctrl->ctrl.opts; |
614 | unsigned int nr_io_queues; | |
71102307 CH |
615 | int i, ret; |
616 | ||
c248c643 SG |
617 | nr_io_queues = min(opts->nr_io_queues, num_online_cpus()); |
618 | ret = nvme_set_queue_count(&ctrl->ctrl, &nr_io_queues); | |
619 | if (ret) | |
620 | return ret; | |
621 | ||
d858e5f0 SG |
622 | ctrl->ctrl.queue_count = nr_io_queues + 1; |
623 | if (ctrl->ctrl.queue_count < 2) | |
c248c643 SG |
624 | return 0; |
625 | ||
626 | dev_info(ctrl->ctrl.device, | |
627 | "creating %d I/O queues.\n", nr_io_queues); | |
628 | ||
d858e5f0 | 629 | for (i = 1; i < ctrl->ctrl.queue_count; i++) { |
c5af8654 JF |
630 | ret = nvme_rdma_init_queue(ctrl, i, |
631 | ctrl->ctrl.opts->queue_size); | |
71102307 CH |
632 | if (ret) { |
633 | dev_info(ctrl->ctrl.device, | |
634 | "failed to initialize i/o queue: %d\n", ret); | |
635 | goto out_free_queues; | |
636 | } | |
637 | } | |
638 | ||
639 | return 0; | |
640 | ||
641 | out_free_queues: | |
f361e5a0 | 642 | for (i--; i >= 1; i--) |
71102307 CH |
643 | nvme_rdma_stop_and_free_queue(&ctrl->queues[i]); |
644 | ||
645 | return ret; | |
646 | } | |
647 | ||
648 | static void nvme_rdma_destroy_admin_queue(struct nvme_rdma_ctrl *ctrl) | |
649 | { | |
650 | nvme_rdma_free_qe(ctrl->queues[0].device->dev, &ctrl->async_event_sqe, | |
651 | sizeof(struct nvme_command), DMA_TO_DEVICE); | |
652 | nvme_rdma_stop_and_free_queue(&ctrl->queues[0]); | |
653 | blk_cleanup_queue(ctrl->ctrl.admin_q); | |
654 | blk_mq_free_tag_set(&ctrl->admin_tag_set); | |
655 | nvme_rdma_dev_put(ctrl->device); | |
656 | } | |
657 | ||
658 | static void nvme_rdma_free_ctrl(struct nvme_ctrl *nctrl) | |
659 | { | |
660 | struct nvme_rdma_ctrl *ctrl = to_rdma_ctrl(nctrl); | |
661 | ||
662 | if (list_empty(&ctrl->list)) | |
663 | goto free_ctrl; | |
664 | ||
665 | mutex_lock(&nvme_rdma_ctrl_mutex); | |
666 | list_del(&ctrl->list); | |
667 | mutex_unlock(&nvme_rdma_ctrl_mutex); | |
668 | ||
71102307 CH |
669 | kfree(ctrl->queues); |
670 | nvmf_free_options(nctrl->opts); | |
671 | free_ctrl: | |
672 | kfree(ctrl); | |
673 | } | |
674 | ||
fd8563ce SG |
675 | static void nvme_rdma_reconnect_or_remove(struct nvme_rdma_ctrl *ctrl) |
676 | { | |
677 | /* If we are resetting/deleting then do nothing */ | |
678 | if (ctrl->ctrl.state != NVME_CTRL_RECONNECTING) { | |
679 | WARN_ON_ONCE(ctrl->ctrl.state == NVME_CTRL_NEW || | |
680 | ctrl->ctrl.state == NVME_CTRL_LIVE); | |
681 | return; | |
682 | } | |
683 | ||
684 | if (nvmf_should_reconnect(&ctrl->ctrl)) { | |
685 | dev_info(ctrl->ctrl.device, "Reconnecting in %d seconds...\n", | |
686 | ctrl->ctrl.opts->reconnect_delay); | |
9a6327d2 | 687 | queue_delayed_work(nvme_wq, &ctrl->reconnect_work, |
fd8563ce SG |
688 | ctrl->ctrl.opts->reconnect_delay * HZ); |
689 | } else { | |
690 | dev_info(ctrl->ctrl.device, "Removing controller...\n"); | |
9a6327d2 | 691 | queue_work(nvme_wq, &ctrl->delete_work); |
fd8563ce SG |
692 | } |
693 | } | |
694 | ||
71102307 CH |
695 | static void nvme_rdma_reconnect_ctrl_work(struct work_struct *work) |
696 | { | |
697 | struct nvme_rdma_ctrl *ctrl = container_of(to_delayed_work(work), | |
698 | struct nvme_rdma_ctrl, reconnect_work); | |
699 | bool changed; | |
700 | int ret; | |
701 | ||
fdf9dfa8 | 702 | ++ctrl->ctrl.nr_reconnects; |
fd8563ce | 703 | |
d858e5f0 | 704 | if (ctrl->ctrl.queue_count > 1) { |
71102307 CH |
705 | nvme_rdma_free_io_queues(ctrl); |
706 | ||
707 | ret = blk_mq_reinit_tagset(&ctrl->tag_set); | |
708 | if (ret) | |
709 | goto requeue; | |
710 | } | |
711 | ||
712 | nvme_rdma_stop_and_free_queue(&ctrl->queues[0]); | |
713 | ||
714 | ret = blk_mq_reinit_tagset(&ctrl->admin_tag_set); | |
715 | if (ret) | |
716 | goto requeue; | |
717 | ||
7aa1f427 | 718 | ret = nvme_rdma_init_queue(ctrl, 0, NVME_AQ_DEPTH); |
71102307 CH |
719 | if (ret) |
720 | goto requeue; | |
721 | ||
71102307 CH |
722 | ret = nvmf_connect_admin_queue(&ctrl->ctrl); |
723 | if (ret) | |
e818a5b4 | 724 | goto requeue; |
71102307 | 725 | |
553cd9ef CH |
726 | set_bit(NVME_RDMA_Q_LIVE, &ctrl->queues[0].flags); |
727 | ||
20d0dfe6 | 728 | ret = nvme_enable_ctrl(&ctrl->ctrl, ctrl->ctrl.cap); |
71102307 | 729 | if (ret) |
e818a5b4 | 730 | goto requeue; |
71102307 | 731 | |
d858e5f0 | 732 | if (ctrl->ctrl.queue_count > 1) { |
71102307 CH |
733 | ret = nvme_rdma_init_io_queues(ctrl); |
734 | if (ret) | |
e818a5b4 | 735 | goto requeue; |
71102307 CH |
736 | |
737 | ret = nvme_rdma_connect_io_queues(ctrl); | |
738 | if (ret) | |
e818a5b4 | 739 | goto requeue; |
4c8b99f6 SG |
740 | |
741 | blk_mq_update_nr_hw_queues(&ctrl->tag_set, | |
742 | ctrl->ctrl.queue_count - 1); | |
71102307 CH |
743 | } |
744 | ||
745 | changed = nvme_change_ctrl_state(&ctrl->ctrl, NVME_CTRL_LIVE); | |
746 | WARN_ON_ONCE(!changed); | |
fdf9dfa8 | 747 | ctrl->ctrl.nr_reconnects = 0; |
71102307 | 748 | |
d09f2b45 | 749 | nvme_start_ctrl(&ctrl->ctrl); |
71102307 CH |
750 | |
751 | dev_info(ctrl->ctrl.device, "Successfully reconnected\n"); | |
752 | ||
753 | return; | |
754 | ||
71102307 | 755 | requeue: |
fd8563ce | 756 | dev_info(ctrl->ctrl.device, "Failed reconnect attempt %d\n", |
fdf9dfa8 | 757 | ctrl->ctrl.nr_reconnects); |
fd8563ce | 758 | nvme_rdma_reconnect_or_remove(ctrl); |
71102307 CH |
759 | } |
760 | ||
761 | static void nvme_rdma_error_recovery_work(struct work_struct *work) | |
762 | { | |
763 | struct nvme_rdma_ctrl *ctrl = container_of(work, | |
764 | struct nvme_rdma_ctrl, err_work); | |
e89ca58f | 765 | int i; |
71102307 | 766 | |
d09f2b45 | 767 | nvme_stop_ctrl(&ctrl->ctrl); |
e89ca58f | 768 | |
d858e5f0 | 769 | for (i = 0; i < ctrl->ctrl.queue_count; i++) |
553cd9ef | 770 | clear_bit(NVME_RDMA_Q_LIVE, &ctrl->queues[i].flags); |
e89ca58f | 771 | |
d858e5f0 | 772 | if (ctrl->ctrl.queue_count > 1) |
71102307 | 773 | nvme_stop_queues(&ctrl->ctrl); |
fb051339 | 774 | blk_mq_quiesce_queue(ctrl->ctrl.admin_q); |
71102307 CH |
775 | |
776 | /* We must take care of fastfail/requeue all our inflight requests */ | |
d858e5f0 | 777 | if (ctrl->ctrl.queue_count > 1) |
71102307 CH |
778 | blk_mq_tagset_busy_iter(&ctrl->tag_set, |
779 | nvme_cancel_request, &ctrl->ctrl); | |
780 | blk_mq_tagset_busy_iter(&ctrl->admin_tag_set, | |
781 | nvme_cancel_request, &ctrl->ctrl); | |
782 | ||
e818a5b4 SG |
783 | /* |
784 | * queues are not a live anymore, so restart the queues to fail fast | |
785 | * new IO | |
786 | */ | |
fb051339 | 787 | blk_mq_unquiesce_queue(ctrl->ctrl.admin_q); |
e818a5b4 SG |
788 | nvme_start_queues(&ctrl->ctrl); |
789 | ||
fd8563ce | 790 | nvme_rdma_reconnect_or_remove(ctrl); |
71102307 CH |
791 | } |
792 | ||
793 | static void nvme_rdma_error_recovery(struct nvme_rdma_ctrl *ctrl) | |
794 | { | |
795 | if (!nvme_change_ctrl_state(&ctrl->ctrl, NVME_CTRL_RECONNECTING)) | |
796 | return; | |
797 | ||
9a6327d2 | 798 | queue_work(nvme_wq, &ctrl->err_work); |
71102307 CH |
799 | } |
800 | ||
801 | static void nvme_rdma_wr_error(struct ib_cq *cq, struct ib_wc *wc, | |
802 | const char *op) | |
803 | { | |
804 | struct nvme_rdma_queue *queue = cq->cq_context; | |
805 | struct nvme_rdma_ctrl *ctrl = queue->ctrl; | |
806 | ||
807 | if (ctrl->ctrl.state == NVME_CTRL_LIVE) | |
808 | dev_info(ctrl->ctrl.device, | |
809 | "%s for CQE 0x%p failed with status %s (%d)\n", | |
810 | op, wc->wr_cqe, | |
811 | ib_wc_status_msg(wc->status), wc->status); | |
812 | nvme_rdma_error_recovery(ctrl); | |
813 | } | |
814 | ||
815 | static void nvme_rdma_memreg_done(struct ib_cq *cq, struct ib_wc *wc) | |
816 | { | |
817 | if (unlikely(wc->status != IB_WC_SUCCESS)) | |
818 | nvme_rdma_wr_error(cq, wc, "MEMREG"); | |
819 | } | |
820 | ||
821 | static void nvme_rdma_inv_rkey_done(struct ib_cq *cq, struct ib_wc *wc) | |
822 | { | |
823 | if (unlikely(wc->status != IB_WC_SUCCESS)) | |
824 | nvme_rdma_wr_error(cq, wc, "LOCAL_INV"); | |
825 | } | |
826 | ||
827 | static int nvme_rdma_inv_rkey(struct nvme_rdma_queue *queue, | |
828 | struct nvme_rdma_request *req) | |
829 | { | |
830 | struct ib_send_wr *bad_wr; | |
831 | struct ib_send_wr wr = { | |
832 | .opcode = IB_WR_LOCAL_INV, | |
833 | .next = NULL, | |
834 | .num_sge = 0, | |
835 | .send_flags = 0, | |
836 | .ex.invalidate_rkey = req->mr->rkey, | |
837 | }; | |
838 | ||
839 | req->reg_cqe.done = nvme_rdma_inv_rkey_done; | |
840 | wr.wr_cqe = &req->reg_cqe; | |
841 | ||
842 | return ib_post_send(queue->qp, &wr, &bad_wr); | |
843 | } | |
844 | ||
845 | static void nvme_rdma_unmap_data(struct nvme_rdma_queue *queue, | |
846 | struct request *rq) | |
847 | { | |
848 | struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq); | |
849 | struct nvme_rdma_ctrl *ctrl = queue->ctrl; | |
850 | struct nvme_rdma_device *dev = queue->device; | |
851 | struct ib_device *ibdev = dev->dev; | |
852 | int res; | |
853 | ||
854 | if (!blk_rq_bytes(rq)) | |
855 | return; | |
856 | ||
f5b7b559 | 857 | if (req->mr->need_inval) { |
71102307 CH |
858 | res = nvme_rdma_inv_rkey(queue, req); |
859 | if (res < 0) { | |
860 | dev_err(ctrl->ctrl.device, | |
861 | "Queueing INV WR for rkey %#x failed (%d)\n", | |
862 | req->mr->rkey, res); | |
863 | nvme_rdma_error_recovery(queue->ctrl); | |
864 | } | |
865 | } | |
866 | ||
867 | ib_dma_unmap_sg(ibdev, req->sg_table.sgl, | |
868 | req->nents, rq_data_dir(rq) == | |
869 | WRITE ? DMA_TO_DEVICE : DMA_FROM_DEVICE); | |
870 | ||
871 | nvme_cleanup_cmd(rq); | |
872 | sg_free_table_chained(&req->sg_table, true); | |
873 | } | |
874 | ||
875 | static int nvme_rdma_set_sg_null(struct nvme_command *c) | |
876 | { | |
877 | struct nvme_keyed_sgl_desc *sg = &c->common.dptr.ksgl; | |
878 | ||
879 | sg->addr = 0; | |
880 | put_unaligned_le24(0, sg->length); | |
881 | put_unaligned_le32(0, sg->key); | |
882 | sg->type = NVME_KEY_SGL_FMT_DATA_DESC << 4; | |
883 | return 0; | |
884 | } | |
885 | ||
886 | static int nvme_rdma_map_sg_inline(struct nvme_rdma_queue *queue, | |
887 | struct nvme_rdma_request *req, struct nvme_command *c) | |
888 | { | |
889 | struct nvme_sgl_desc *sg = &c->common.dptr.sgl; | |
890 | ||
891 | req->sge[1].addr = sg_dma_address(req->sg_table.sgl); | |
892 | req->sge[1].length = sg_dma_len(req->sg_table.sgl); | |
893 | req->sge[1].lkey = queue->device->pd->local_dma_lkey; | |
894 | ||
895 | sg->addr = cpu_to_le64(queue->ctrl->ctrl.icdoff); | |
896 | sg->length = cpu_to_le32(sg_dma_len(req->sg_table.sgl)); | |
897 | sg->type = (NVME_SGL_FMT_DATA_DESC << 4) | NVME_SGL_FMT_OFFSET; | |
898 | ||
899 | req->inline_data = true; | |
900 | req->num_sge++; | |
901 | return 0; | |
902 | } | |
903 | ||
904 | static int nvme_rdma_map_sg_single(struct nvme_rdma_queue *queue, | |
905 | struct nvme_rdma_request *req, struct nvme_command *c) | |
906 | { | |
907 | struct nvme_keyed_sgl_desc *sg = &c->common.dptr.ksgl; | |
908 | ||
909 | sg->addr = cpu_to_le64(sg_dma_address(req->sg_table.sgl)); | |
910 | put_unaligned_le24(sg_dma_len(req->sg_table.sgl), sg->length); | |
11975e01 | 911 | put_unaligned_le32(queue->device->pd->unsafe_global_rkey, sg->key); |
71102307 CH |
912 | sg->type = NVME_KEY_SGL_FMT_DATA_DESC << 4; |
913 | return 0; | |
914 | } | |
915 | ||
916 | static int nvme_rdma_map_sg_fr(struct nvme_rdma_queue *queue, | |
917 | struct nvme_rdma_request *req, struct nvme_command *c, | |
918 | int count) | |
919 | { | |
920 | struct nvme_keyed_sgl_desc *sg = &c->common.dptr.ksgl; | |
921 | int nr; | |
922 | ||
923 | nr = ib_map_mr_sg(req->mr, req->sg_table.sgl, count, NULL, PAGE_SIZE); | |
924 | if (nr < count) { | |
925 | if (nr < 0) | |
926 | return nr; | |
927 | return -EINVAL; | |
928 | } | |
929 | ||
930 | ib_update_fast_reg_key(req->mr, ib_inc_rkey(req->mr->rkey)); | |
931 | ||
932 | req->reg_cqe.done = nvme_rdma_memreg_done; | |
933 | memset(&req->reg_wr, 0, sizeof(req->reg_wr)); | |
934 | req->reg_wr.wr.opcode = IB_WR_REG_MR; | |
935 | req->reg_wr.wr.wr_cqe = &req->reg_cqe; | |
936 | req->reg_wr.wr.num_sge = 0; | |
937 | req->reg_wr.mr = req->mr; | |
938 | req->reg_wr.key = req->mr->rkey; | |
939 | req->reg_wr.access = IB_ACCESS_LOCAL_WRITE | | |
940 | IB_ACCESS_REMOTE_READ | | |
941 | IB_ACCESS_REMOTE_WRITE; | |
942 | ||
f5b7b559 | 943 | req->mr->need_inval = true; |
71102307 CH |
944 | |
945 | sg->addr = cpu_to_le64(req->mr->iova); | |
946 | put_unaligned_le24(req->mr->length, sg->length); | |
947 | put_unaligned_le32(req->mr->rkey, sg->key); | |
948 | sg->type = (NVME_KEY_SGL_FMT_DATA_DESC << 4) | | |
949 | NVME_SGL_FMT_INVALIDATE; | |
950 | ||
951 | return 0; | |
952 | } | |
953 | ||
954 | static int nvme_rdma_map_data(struct nvme_rdma_queue *queue, | |
b131c61d | 955 | struct request *rq, struct nvme_command *c) |
71102307 CH |
956 | { |
957 | struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq); | |
958 | struct nvme_rdma_device *dev = queue->device; | |
959 | struct ib_device *ibdev = dev->dev; | |
f9d03f96 | 960 | int count, ret; |
71102307 CH |
961 | |
962 | req->num_sge = 1; | |
963 | req->inline_data = false; | |
f5b7b559 | 964 | req->mr->need_inval = false; |
71102307 CH |
965 | |
966 | c->common.flags |= NVME_CMD_SGL_METABUF; | |
967 | ||
968 | if (!blk_rq_bytes(rq)) | |
969 | return nvme_rdma_set_sg_null(c); | |
970 | ||
971 | req->sg_table.sgl = req->first_sgl; | |
f9d03f96 CH |
972 | ret = sg_alloc_table_chained(&req->sg_table, |
973 | blk_rq_nr_phys_segments(rq), req->sg_table.sgl); | |
71102307 CH |
974 | if (ret) |
975 | return -ENOMEM; | |
976 | ||
f9d03f96 | 977 | req->nents = blk_rq_map_sg(rq->q, rq, req->sg_table.sgl); |
71102307 | 978 | |
f9d03f96 | 979 | count = ib_dma_map_sg(ibdev, req->sg_table.sgl, req->nents, |
71102307 CH |
980 | rq_data_dir(rq) == WRITE ? DMA_TO_DEVICE : DMA_FROM_DEVICE); |
981 | if (unlikely(count <= 0)) { | |
982 | sg_free_table_chained(&req->sg_table, true); | |
983 | return -EIO; | |
984 | } | |
985 | ||
986 | if (count == 1) { | |
b131c61d CH |
987 | if (rq_data_dir(rq) == WRITE && nvme_rdma_queue_idx(queue) && |
988 | blk_rq_payload_bytes(rq) <= | |
989 | nvme_rdma_inline_data_size(queue)) | |
71102307 CH |
990 | return nvme_rdma_map_sg_inline(queue, req, c); |
991 | ||
11975e01 | 992 | if (dev->pd->flags & IB_PD_UNSAFE_GLOBAL_RKEY) |
71102307 CH |
993 | return nvme_rdma_map_sg_single(queue, req, c); |
994 | } | |
995 | ||
996 | return nvme_rdma_map_sg_fr(queue, req, c, count); | |
997 | } | |
998 | ||
999 | static void nvme_rdma_send_done(struct ib_cq *cq, struct ib_wc *wc) | |
1000 | { | |
1001 | if (unlikely(wc->status != IB_WC_SUCCESS)) | |
1002 | nvme_rdma_wr_error(cq, wc, "SEND"); | |
1003 | } | |
1004 | ||
5e599d73 MR |
1005 | /* |
1006 | * We want to signal completion at least every queue depth/2. This returns the | |
1007 | * largest power of two that is not above half of (queue size + 1) to optimize | |
1008 | * (avoid divisions). | |
1009 | */ | |
1010 | static inline bool nvme_rdma_queue_sig_limit(struct nvme_rdma_queue *queue) | |
0544f549 | 1011 | { |
5e599d73 | 1012 | int limit = 1 << ilog2((queue->queue_size + 1) / 2); |
0544f549 | 1013 | |
5e599d73 | 1014 | return (atomic_inc_return(&queue->sig_count) & (limit - 1)) == 0; |
0544f549 MR |
1015 | } |
1016 | ||
71102307 CH |
1017 | static int nvme_rdma_post_send(struct nvme_rdma_queue *queue, |
1018 | struct nvme_rdma_qe *qe, struct ib_sge *sge, u32 num_sge, | |
1019 | struct ib_send_wr *first, bool flush) | |
1020 | { | |
1021 | struct ib_send_wr wr, *bad_wr; | |
1022 | int ret; | |
1023 | ||
1024 | sge->addr = qe->dma; | |
1025 | sge->length = sizeof(struct nvme_command), | |
1026 | sge->lkey = queue->device->pd->local_dma_lkey; | |
1027 | ||
1028 | qe->cqe.done = nvme_rdma_send_done; | |
1029 | ||
1030 | wr.next = NULL; | |
1031 | wr.wr_cqe = &qe->cqe; | |
1032 | wr.sg_list = sge; | |
1033 | wr.num_sge = num_sge; | |
1034 | wr.opcode = IB_WR_SEND; | |
1035 | wr.send_flags = 0; | |
1036 | ||
1037 | /* | |
1038 | * Unsignalled send completions are another giant desaster in the | |
1039 | * IB Verbs spec: If we don't regularly post signalled sends | |
1040 | * the send queue will fill up and only a QP reset will rescue us. | |
1041 | * Would have been way to obvious to handle this in hardware or | |
1042 | * at least the RDMA stack.. | |
1043 | * | |
71102307 CH |
1044 | * Always signal the flushes. The magic request used for the flush |
1045 | * sequencer is not allocated in our driver's tagset and it's | |
1046 | * triggered to be freed by blk_cleanup_queue(). So we need to | |
1047 | * always mark it as signaled to ensure that the "wr_cqe", which is | |
b43daedc | 1048 | * embedded in request's payload, is not freed when __ib_process_cq() |
71102307 CH |
1049 | * calls wr_cqe->done(). |
1050 | */ | |
0544f549 | 1051 | if (nvme_rdma_queue_sig_limit(queue) || flush) |
71102307 CH |
1052 | wr.send_flags |= IB_SEND_SIGNALED; |
1053 | ||
1054 | if (first) | |
1055 | first->next = ≀ | |
1056 | else | |
1057 | first = ≀ | |
1058 | ||
1059 | ret = ib_post_send(queue->qp, first, &bad_wr); | |
1060 | if (ret) { | |
1061 | dev_err(queue->ctrl->ctrl.device, | |
1062 | "%s failed with error code %d\n", __func__, ret); | |
1063 | } | |
1064 | return ret; | |
1065 | } | |
1066 | ||
1067 | static int nvme_rdma_post_recv(struct nvme_rdma_queue *queue, | |
1068 | struct nvme_rdma_qe *qe) | |
1069 | { | |
1070 | struct ib_recv_wr wr, *bad_wr; | |
1071 | struct ib_sge list; | |
1072 | int ret; | |
1073 | ||
1074 | list.addr = qe->dma; | |
1075 | list.length = sizeof(struct nvme_completion); | |
1076 | list.lkey = queue->device->pd->local_dma_lkey; | |
1077 | ||
1078 | qe->cqe.done = nvme_rdma_recv_done; | |
1079 | ||
1080 | wr.next = NULL; | |
1081 | wr.wr_cqe = &qe->cqe; | |
1082 | wr.sg_list = &list; | |
1083 | wr.num_sge = 1; | |
1084 | ||
1085 | ret = ib_post_recv(queue->qp, &wr, &bad_wr); | |
1086 | if (ret) { | |
1087 | dev_err(queue->ctrl->ctrl.device, | |
1088 | "%s failed with error code %d\n", __func__, ret); | |
1089 | } | |
1090 | return ret; | |
1091 | } | |
1092 | ||
1093 | static struct blk_mq_tags *nvme_rdma_tagset(struct nvme_rdma_queue *queue) | |
1094 | { | |
1095 | u32 queue_idx = nvme_rdma_queue_idx(queue); | |
1096 | ||
1097 | if (queue_idx == 0) | |
1098 | return queue->ctrl->admin_tag_set.tags[queue_idx]; | |
1099 | return queue->ctrl->tag_set.tags[queue_idx - 1]; | |
1100 | } | |
1101 | ||
1102 | static void nvme_rdma_submit_async_event(struct nvme_ctrl *arg, int aer_idx) | |
1103 | { | |
1104 | struct nvme_rdma_ctrl *ctrl = to_rdma_ctrl(arg); | |
1105 | struct nvme_rdma_queue *queue = &ctrl->queues[0]; | |
1106 | struct ib_device *dev = queue->device->dev; | |
1107 | struct nvme_rdma_qe *sqe = &ctrl->async_event_sqe; | |
1108 | struct nvme_command *cmd = sqe->data; | |
1109 | struct ib_sge sge; | |
1110 | int ret; | |
1111 | ||
1112 | if (WARN_ON_ONCE(aer_idx != 0)) | |
1113 | return; | |
1114 | ||
1115 | ib_dma_sync_single_for_cpu(dev, sqe->dma, sizeof(*cmd), DMA_TO_DEVICE); | |
1116 | ||
1117 | memset(cmd, 0, sizeof(*cmd)); | |
1118 | cmd->common.opcode = nvme_admin_async_event; | |
1119 | cmd->common.command_id = NVME_RDMA_AQ_BLKMQ_DEPTH; | |
1120 | cmd->common.flags |= NVME_CMD_SGL_METABUF; | |
1121 | nvme_rdma_set_sg_null(cmd); | |
1122 | ||
1123 | ib_dma_sync_single_for_device(dev, sqe->dma, sizeof(*cmd), | |
1124 | DMA_TO_DEVICE); | |
1125 | ||
1126 | ret = nvme_rdma_post_send(queue, sqe, &sge, 1, NULL, false); | |
1127 | WARN_ON_ONCE(ret); | |
1128 | } | |
1129 | ||
1130 | static int nvme_rdma_process_nvme_rsp(struct nvme_rdma_queue *queue, | |
1131 | struct nvme_completion *cqe, struct ib_wc *wc, int tag) | |
1132 | { | |
71102307 CH |
1133 | struct request *rq; |
1134 | struct nvme_rdma_request *req; | |
1135 | int ret = 0; | |
1136 | ||
71102307 CH |
1137 | rq = blk_mq_tag_to_rq(nvme_rdma_tagset(queue), cqe->command_id); |
1138 | if (!rq) { | |
1139 | dev_err(queue->ctrl->ctrl.device, | |
1140 | "tag 0x%x on QP %#x not found\n", | |
1141 | cqe->command_id, queue->qp->qp_num); | |
1142 | nvme_rdma_error_recovery(queue->ctrl); | |
1143 | return ret; | |
1144 | } | |
1145 | req = blk_mq_rq_to_pdu(rq); | |
1146 | ||
71102307 CH |
1147 | if (rq->tag == tag) |
1148 | ret = 1; | |
1149 | ||
1150 | if ((wc->wc_flags & IB_WC_WITH_INVALIDATE) && | |
1151 | wc->ex.invalidate_rkey == req->mr->rkey) | |
f5b7b559 | 1152 | req->mr->need_inval = false; |
71102307 | 1153 | |
27fa9bc5 | 1154 | nvme_end_request(rq, cqe->status, cqe->result); |
71102307 CH |
1155 | return ret; |
1156 | } | |
1157 | ||
1158 | static int __nvme_rdma_recv_done(struct ib_cq *cq, struct ib_wc *wc, int tag) | |
1159 | { | |
1160 | struct nvme_rdma_qe *qe = | |
1161 | container_of(wc->wr_cqe, struct nvme_rdma_qe, cqe); | |
1162 | struct nvme_rdma_queue *queue = cq->cq_context; | |
1163 | struct ib_device *ibdev = queue->device->dev; | |
1164 | struct nvme_completion *cqe = qe->data; | |
1165 | const size_t len = sizeof(struct nvme_completion); | |
1166 | int ret = 0; | |
1167 | ||
1168 | if (unlikely(wc->status != IB_WC_SUCCESS)) { | |
1169 | nvme_rdma_wr_error(cq, wc, "RECV"); | |
1170 | return 0; | |
1171 | } | |
1172 | ||
1173 | ib_dma_sync_single_for_cpu(ibdev, qe->dma, len, DMA_FROM_DEVICE); | |
1174 | /* | |
1175 | * AEN requests are special as they don't time out and can | |
1176 | * survive any kind of queue freeze and often don't respond to | |
1177 | * aborts. We don't even bother to allocate a struct request | |
1178 | * for them but rather special case them here. | |
1179 | */ | |
1180 | if (unlikely(nvme_rdma_queue_idx(queue) == 0 && | |
1181 | cqe->command_id >= NVME_RDMA_AQ_BLKMQ_DEPTH)) | |
7bf58533 CH |
1182 | nvme_complete_async_event(&queue->ctrl->ctrl, cqe->status, |
1183 | &cqe->result); | |
71102307 CH |
1184 | else |
1185 | ret = nvme_rdma_process_nvme_rsp(queue, cqe, wc, tag); | |
1186 | ib_dma_sync_single_for_device(ibdev, qe->dma, len, DMA_FROM_DEVICE); | |
1187 | ||
1188 | nvme_rdma_post_recv(queue, qe); | |
1189 | return ret; | |
1190 | } | |
1191 | ||
1192 | static void nvme_rdma_recv_done(struct ib_cq *cq, struct ib_wc *wc) | |
1193 | { | |
1194 | __nvme_rdma_recv_done(cq, wc, -1); | |
1195 | } | |
1196 | ||
1197 | static int nvme_rdma_conn_established(struct nvme_rdma_queue *queue) | |
1198 | { | |
1199 | int ret, i; | |
1200 | ||
1201 | for (i = 0; i < queue->queue_size; i++) { | |
1202 | ret = nvme_rdma_post_recv(queue, &queue->rsp_ring[i]); | |
1203 | if (ret) | |
1204 | goto out_destroy_queue_ib; | |
1205 | } | |
1206 | ||
1207 | return 0; | |
1208 | ||
1209 | out_destroy_queue_ib: | |
1210 | nvme_rdma_destroy_queue_ib(queue); | |
1211 | return ret; | |
1212 | } | |
1213 | ||
1214 | static int nvme_rdma_conn_rejected(struct nvme_rdma_queue *queue, | |
1215 | struct rdma_cm_event *ev) | |
1216 | { | |
7f03953c SW |
1217 | struct rdma_cm_id *cm_id = queue->cm_id; |
1218 | int status = ev->status; | |
1219 | const char *rej_msg; | |
1220 | const struct nvme_rdma_cm_rej *rej_data; | |
1221 | u8 rej_data_len; | |
1222 | ||
1223 | rej_msg = rdma_reject_msg(cm_id, status); | |
1224 | rej_data = rdma_consumer_reject_data(cm_id, ev, &rej_data_len); | |
1225 | ||
1226 | if (rej_data && rej_data_len >= sizeof(u16)) { | |
1227 | u16 sts = le16_to_cpu(rej_data->sts); | |
71102307 CH |
1228 | |
1229 | dev_err(queue->ctrl->ctrl.device, | |
7f03953c SW |
1230 | "Connect rejected: status %d (%s) nvme status %d (%s).\n", |
1231 | status, rej_msg, sts, nvme_rdma_cm_msg(sts)); | |
71102307 CH |
1232 | } else { |
1233 | dev_err(queue->ctrl->ctrl.device, | |
7f03953c | 1234 | "Connect rejected: status %d (%s).\n", status, rej_msg); |
71102307 CH |
1235 | } |
1236 | ||
1237 | return -ECONNRESET; | |
1238 | } | |
1239 | ||
1240 | static int nvme_rdma_addr_resolved(struct nvme_rdma_queue *queue) | |
1241 | { | |
71102307 CH |
1242 | int ret; |
1243 | ||
ca6e95bb SG |
1244 | ret = nvme_rdma_create_queue_ib(queue); |
1245 | if (ret) | |
1246 | return ret; | |
71102307 CH |
1247 | |
1248 | ret = rdma_resolve_route(queue->cm_id, NVME_RDMA_CONNECT_TIMEOUT_MS); | |
1249 | if (ret) { | |
1250 | dev_err(queue->ctrl->ctrl.device, | |
1251 | "rdma_resolve_route failed (%d).\n", | |
1252 | queue->cm_error); | |
1253 | goto out_destroy_queue; | |
1254 | } | |
1255 | ||
1256 | return 0; | |
1257 | ||
1258 | out_destroy_queue: | |
1259 | nvme_rdma_destroy_queue_ib(queue); | |
71102307 CH |
1260 | return ret; |
1261 | } | |
1262 | ||
1263 | static int nvme_rdma_route_resolved(struct nvme_rdma_queue *queue) | |
1264 | { | |
1265 | struct nvme_rdma_ctrl *ctrl = queue->ctrl; | |
1266 | struct rdma_conn_param param = { }; | |
0b857b44 | 1267 | struct nvme_rdma_cm_req priv = { }; |
71102307 CH |
1268 | int ret; |
1269 | ||
1270 | param.qp_num = queue->qp->qp_num; | |
1271 | param.flow_control = 1; | |
1272 | ||
1273 | param.responder_resources = queue->device->dev->attrs.max_qp_rd_atom; | |
2ac17c28 SG |
1274 | /* maximum retry count */ |
1275 | param.retry_count = 7; | |
71102307 CH |
1276 | param.rnr_retry_count = 7; |
1277 | param.private_data = &priv; | |
1278 | param.private_data_len = sizeof(priv); | |
1279 | ||
1280 | priv.recfmt = cpu_to_le16(NVME_RDMA_CM_FMT_1_0); | |
1281 | priv.qid = cpu_to_le16(nvme_rdma_queue_idx(queue)); | |
f994d9dc JF |
1282 | /* |
1283 | * set the admin queue depth to the minimum size | |
1284 | * specified by the Fabrics standard. | |
1285 | */ | |
1286 | if (priv.qid == 0) { | |
7aa1f427 SG |
1287 | priv.hrqsize = cpu_to_le16(NVME_AQ_DEPTH); |
1288 | priv.hsqsize = cpu_to_le16(NVME_AQ_DEPTH - 1); | |
f994d9dc | 1289 | } else { |
c5af8654 JF |
1290 | /* |
1291 | * current interpretation of the fabrics spec | |
1292 | * is at minimum you make hrqsize sqsize+1, or a | |
1293 | * 1's based representation of sqsize. | |
1294 | */ | |
f994d9dc | 1295 | priv.hrqsize = cpu_to_le16(queue->queue_size); |
c5af8654 | 1296 | priv.hsqsize = cpu_to_le16(queue->ctrl->ctrl.sqsize); |
f994d9dc | 1297 | } |
71102307 CH |
1298 | |
1299 | ret = rdma_connect(queue->cm_id, ¶m); | |
1300 | if (ret) { | |
1301 | dev_err(ctrl->ctrl.device, | |
1302 | "rdma_connect failed (%d).\n", ret); | |
1303 | goto out_destroy_queue_ib; | |
1304 | } | |
1305 | ||
1306 | return 0; | |
1307 | ||
1308 | out_destroy_queue_ib: | |
1309 | nvme_rdma_destroy_queue_ib(queue); | |
1310 | return ret; | |
1311 | } | |
1312 | ||
71102307 CH |
1313 | static int nvme_rdma_cm_handler(struct rdma_cm_id *cm_id, |
1314 | struct rdma_cm_event *ev) | |
1315 | { | |
1316 | struct nvme_rdma_queue *queue = cm_id->context; | |
1317 | int cm_error = 0; | |
1318 | ||
1319 | dev_dbg(queue->ctrl->ctrl.device, "%s (%d): status %d id %p\n", | |
1320 | rdma_event_msg(ev->event), ev->event, | |
1321 | ev->status, cm_id); | |
1322 | ||
1323 | switch (ev->event) { | |
1324 | case RDMA_CM_EVENT_ADDR_RESOLVED: | |
1325 | cm_error = nvme_rdma_addr_resolved(queue); | |
1326 | break; | |
1327 | case RDMA_CM_EVENT_ROUTE_RESOLVED: | |
1328 | cm_error = nvme_rdma_route_resolved(queue); | |
1329 | break; | |
1330 | case RDMA_CM_EVENT_ESTABLISHED: | |
1331 | queue->cm_error = nvme_rdma_conn_established(queue); | |
1332 | /* complete cm_done regardless of success/failure */ | |
1333 | complete(&queue->cm_done); | |
1334 | return 0; | |
1335 | case RDMA_CM_EVENT_REJECTED: | |
abf87d5e | 1336 | nvme_rdma_destroy_queue_ib(queue); |
71102307 CH |
1337 | cm_error = nvme_rdma_conn_rejected(queue, ev); |
1338 | break; | |
71102307 CH |
1339 | case RDMA_CM_EVENT_ROUTE_ERROR: |
1340 | case RDMA_CM_EVENT_CONNECT_ERROR: | |
1341 | case RDMA_CM_EVENT_UNREACHABLE: | |
abf87d5e SG |
1342 | nvme_rdma_destroy_queue_ib(queue); |
1343 | case RDMA_CM_EVENT_ADDR_ERROR: | |
71102307 CH |
1344 | dev_dbg(queue->ctrl->ctrl.device, |
1345 | "CM error event %d\n", ev->event); | |
1346 | cm_error = -ECONNRESET; | |
1347 | break; | |
1348 | case RDMA_CM_EVENT_DISCONNECTED: | |
1349 | case RDMA_CM_EVENT_ADDR_CHANGE: | |
1350 | case RDMA_CM_EVENT_TIMEWAIT_EXIT: | |
1351 | dev_dbg(queue->ctrl->ctrl.device, | |
1352 | "disconnect received - connection closed\n"); | |
1353 | nvme_rdma_error_recovery(queue->ctrl); | |
1354 | break; | |
1355 | case RDMA_CM_EVENT_DEVICE_REMOVAL: | |
e87a911f SW |
1356 | /* device removal is handled via the ib_client API */ |
1357 | break; | |
71102307 CH |
1358 | default: |
1359 | dev_err(queue->ctrl->ctrl.device, | |
1360 | "Unexpected RDMA CM event (%d)\n", ev->event); | |
1361 | nvme_rdma_error_recovery(queue->ctrl); | |
1362 | break; | |
1363 | } | |
1364 | ||
1365 | if (cm_error) { | |
1366 | queue->cm_error = cm_error; | |
1367 | complete(&queue->cm_done); | |
1368 | } | |
1369 | ||
1370 | return 0; | |
1371 | } | |
1372 | ||
1373 | static enum blk_eh_timer_return | |
1374 | nvme_rdma_timeout(struct request *rq, bool reserved) | |
1375 | { | |
1376 | struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq); | |
1377 | ||
1378 | /* queue error recovery */ | |
1379 | nvme_rdma_error_recovery(req->queue->ctrl); | |
1380 | ||
1381 | /* fail with DNR on cmd timeout */ | |
27fa9bc5 | 1382 | nvme_req(rq)->status = NVME_SC_ABORT_REQ | NVME_SC_DNR; |
71102307 CH |
1383 | |
1384 | return BLK_EH_HANDLED; | |
1385 | } | |
1386 | ||
553cd9ef CH |
1387 | /* |
1388 | * We cannot accept any other command until the Connect command has completed. | |
1389 | */ | |
a104c9f2 CH |
1390 | static inline blk_status_t |
1391 | nvme_rdma_queue_is_ready(struct nvme_rdma_queue *queue, struct request *rq) | |
553cd9ef CH |
1392 | { |
1393 | if (unlikely(!test_bit(NVME_RDMA_Q_LIVE, &queue->flags))) { | |
1392370e | 1394 | struct nvme_command *cmd = nvme_req(rq)->cmd; |
553cd9ef | 1395 | |
57292b58 | 1396 | if (!blk_rq_is_passthrough(rq) || |
553cd9ef | 1397 | cmd->common.opcode != nvme_fabrics_command || |
e818a5b4 SG |
1398 | cmd->fabrics.fctype != nvme_fabrics_type_connect) { |
1399 | /* | |
1400 | * reconnecting state means transport disruption, which | |
1401 | * can take a long time and even might fail permanently, | |
1402 | * so we can't let incoming I/O be requeued forever. | |
1403 | * fail it fast to allow upper layers a chance to | |
1404 | * failover. | |
1405 | */ | |
1406 | if (queue->ctrl->ctrl.state == NVME_CTRL_RECONNECTING) | |
a104c9f2 CH |
1407 | return BLK_STS_IOERR; |
1408 | return BLK_STS_RESOURCE; /* try again later */ | |
e818a5b4 | 1409 | } |
553cd9ef CH |
1410 | } |
1411 | ||
e818a5b4 | 1412 | return 0; |
553cd9ef CH |
1413 | } |
1414 | ||
fc17b653 | 1415 | static blk_status_t nvme_rdma_queue_rq(struct blk_mq_hw_ctx *hctx, |
71102307 CH |
1416 | const struct blk_mq_queue_data *bd) |
1417 | { | |
1418 | struct nvme_ns *ns = hctx->queue->queuedata; | |
1419 | struct nvme_rdma_queue *queue = hctx->driver_data; | |
1420 | struct request *rq = bd->rq; | |
1421 | struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq); | |
1422 | struct nvme_rdma_qe *sqe = &req->sqe; | |
1423 | struct nvme_command *c = sqe->data; | |
1424 | bool flush = false; | |
1425 | struct ib_device *dev; | |
fc17b653 CH |
1426 | blk_status_t ret; |
1427 | int err; | |
71102307 CH |
1428 | |
1429 | WARN_ON_ONCE(rq->tag < 0); | |
1430 | ||
e818a5b4 SG |
1431 | ret = nvme_rdma_queue_is_ready(queue, rq); |
1432 | if (unlikely(ret)) | |
a104c9f2 | 1433 | return ret; |
553cd9ef | 1434 | |
71102307 CH |
1435 | dev = queue->device->dev; |
1436 | ib_dma_sync_single_for_cpu(dev, sqe->dma, | |
1437 | sizeof(struct nvme_command), DMA_TO_DEVICE); | |
1438 | ||
1439 | ret = nvme_setup_cmd(ns, rq, c); | |
fc17b653 | 1440 | if (ret) |
71102307 CH |
1441 | return ret; |
1442 | ||
71102307 CH |
1443 | blk_mq_start_request(rq); |
1444 | ||
fc17b653 CH |
1445 | err = nvme_rdma_map_data(queue, rq, c); |
1446 | if (err < 0) { | |
71102307 | 1447 | dev_err(queue->ctrl->ctrl.device, |
fc17b653 | 1448 | "Failed to map data (%d)\n", err); |
71102307 CH |
1449 | nvme_cleanup_cmd(rq); |
1450 | goto err; | |
1451 | } | |
1452 | ||
1453 | ib_dma_sync_single_for_device(dev, sqe->dma, | |
1454 | sizeof(struct nvme_command), DMA_TO_DEVICE); | |
1455 | ||
aebf526b | 1456 | if (req_op(rq) == REQ_OP_FLUSH) |
71102307 | 1457 | flush = true; |
fc17b653 | 1458 | err = nvme_rdma_post_send(queue, sqe, req->sge, req->num_sge, |
f5b7b559 | 1459 | req->mr->need_inval ? &req->reg_wr.wr : NULL, flush); |
fc17b653 | 1460 | if (err) { |
71102307 CH |
1461 | nvme_rdma_unmap_data(queue, rq); |
1462 | goto err; | |
1463 | } | |
1464 | ||
fc17b653 | 1465 | return BLK_STS_OK; |
71102307 | 1466 | err: |
fc17b653 CH |
1467 | if (err == -ENOMEM || err == -EAGAIN) |
1468 | return BLK_STS_RESOURCE; | |
1469 | return BLK_STS_IOERR; | |
71102307 CH |
1470 | } |
1471 | ||
1472 | static int nvme_rdma_poll(struct blk_mq_hw_ctx *hctx, unsigned int tag) | |
1473 | { | |
1474 | struct nvme_rdma_queue *queue = hctx->driver_data; | |
1475 | struct ib_cq *cq = queue->ib_cq; | |
1476 | struct ib_wc wc; | |
1477 | int found = 0; | |
1478 | ||
71102307 CH |
1479 | while (ib_poll_cq(cq, 1, &wc) > 0) { |
1480 | struct ib_cqe *cqe = wc.wr_cqe; | |
1481 | ||
1482 | if (cqe) { | |
1483 | if (cqe->done == nvme_rdma_recv_done) | |
1484 | found |= __nvme_rdma_recv_done(cq, &wc, tag); | |
1485 | else | |
1486 | cqe->done(cq, &wc); | |
1487 | } | |
1488 | } | |
1489 | ||
1490 | return found; | |
1491 | } | |
1492 | ||
1493 | static void nvme_rdma_complete_rq(struct request *rq) | |
1494 | { | |
1495 | struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq); | |
71102307 | 1496 | |
77f02a7a CH |
1497 | nvme_rdma_unmap_data(req->queue, rq); |
1498 | nvme_complete_rq(rq); | |
71102307 CH |
1499 | } |
1500 | ||
f363b089 | 1501 | static const struct blk_mq_ops nvme_rdma_mq_ops = { |
71102307 CH |
1502 | .queue_rq = nvme_rdma_queue_rq, |
1503 | .complete = nvme_rdma_complete_rq, | |
71102307 CH |
1504 | .init_request = nvme_rdma_init_request, |
1505 | .exit_request = nvme_rdma_exit_request, | |
1506 | .reinit_request = nvme_rdma_reinit_request, | |
1507 | .init_hctx = nvme_rdma_init_hctx, | |
1508 | .poll = nvme_rdma_poll, | |
1509 | .timeout = nvme_rdma_timeout, | |
1510 | }; | |
1511 | ||
f363b089 | 1512 | static const struct blk_mq_ops nvme_rdma_admin_mq_ops = { |
71102307 CH |
1513 | .queue_rq = nvme_rdma_queue_rq, |
1514 | .complete = nvme_rdma_complete_rq, | |
385475ee CH |
1515 | .init_request = nvme_rdma_init_request, |
1516 | .exit_request = nvme_rdma_exit_request, | |
71102307 CH |
1517 | .reinit_request = nvme_rdma_reinit_request, |
1518 | .init_hctx = nvme_rdma_init_admin_hctx, | |
1519 | .timeout = nvme_rdma_timeout, | |
1520 | }; | |
1521 | ||
1522 | static int nvme_rdma_configure_admin_queue(struct nvme_rdma_ctrl *ctrl) | |
1523 | { | |
1524 | int error; | |
1525 | ||
7aa1f427 | 1526 | error = nvme_rdma_init_queue(ctrl, 0, NVME_AQ_DEPTH); |
71102307 CH |
1527 | if (error) |
1528 | return error; | |
1529 | ||
1530 | ctrl->device = ctrl->queues[0].device; | |
1531 | ||
1532 | /* | |
1533 | * We need a reference on the device as long as the tag_set is alive, | |
1534 | * as the MRs in the request structures need a valid ib_device. | |
1535 | */ | |
1536 | error = -EINVAL; | |
1537 | if (!nvme_rdma_dev_get(ctrl->device)) | |
1538 | goto out_free_queue; | |
1539 | ||
1540 | ctrl->max_fr_pages = min_t(u32, NVME_RDMA_MAX_SEGMENTS, | |
1541 | ctrl->device->dev->attrs.max_fast_reg_page_list_len); | |
1542 | ||
1543 | memset(&ctrl->admin_tag_set, 0, sizeof(ctrl->admin_tag_set)); | |
1544 | ctrl->admin_tag_set.ops = &nvme_rdma_admin_mq_ops; | |
1545 | ctrl->admin_tag_set.queue_depth = NVME_RDMA_AQ_BLKMQ_DEPTH; | |
1546 | ctrl->admin_tag_set.reserved_tags = 2; /* connect + keep-alive */ | |
1547 | ctrl->admin_tag_set.numa_node = NUMA_NO_NODE; | |
1548 | ctrl->admin_tag_set.cmd_size = sizeof(struct nvme_rdma_request) + | |
1549 | SG_CHUNK_SIZE * sizeof(struct scatterlist); | |
1550 | ctrl->admin_tag_set.driver_data = ctrl; | |
1551 | ctrl->admin_tag_set.nr_hw_queues = 1; | |
1552 | ctrl->admin_tag_set.timeout = ADMIN_TIMEOUT; | |
1553 | ||
1554 | error = blk_mq_alloc_tag_set(&ctrl->admin_tag_set); | |
1555 | if (error) | |
1556 | goto out_put_dev; | |
1557 | ||
1558 | ctrl->ctrl.admin_q = blk_mq_init_queue(&ctrl->admin_tag_set); | |
1559 | if (IS_ERR(ctrl->ctrl.admin_q)) { | |
1560 | error = PTR_ERR(ctrl->ctrl.admin_q); | |
1561 | goto out_free_tagset; | |
1562 | } | |
1563 | ||
1564 | error = nvmf_connect_admin_queue(&ctrl->ctrl); | |
1565 | if (error) | |
1566 | goto out_cleanup_queue; | |
1567 | ||
553cd9ef CH |
1568 | set_bit(NVME_RDMA_Q_LIVE, &ctrl->queues[0].flags); |
1569 | ||
20d0dfe6 SG |
1570 | error = nvmf_reg_read64(&ctrl->ctrl, NVME_REG_CAP, |
1571 | &ctrl->ctrl.cap); | |
71102307 CH |
1572 | if (error) { |
1573 | dev_err(ctrl->ctrl.device, | |
1574 | "prop_get NVME_REG_CAP failed\n"); | |
1575 | goto out_cleanup_queue; | |
1576 | } | |
1577 | ||
1578 | ctrl->ctrl.sqsize = | |
20d0dfe6 | 1579 | min_t(int, NVME_CAP_MQES(ctrl->ctrl.cap), ctrl->ctrl.sqsize); |
71102307 | 1580 | |
20d0dfe6 | 1581 | error = nvme_enable_ctrl(&ctrl->ctrl, ctrl->ctrl.cap); |
71102307 CH |
1582 | if (error) |
1583 | goto out_cleanup_queue; | |
1584 | ||
1585 | ctrl->ctrl.max_hw_sectors = | |
1586 | (ctrl->max_fr_pages - 1) << (PAGE_SHIFT - 9); | |
1587 | ||
1588 | error = nvme_init_identify(&ctrl->ctrl); | |
1589 | if (error) | |
1590 | goto out_cleanup_queue; | |
1591 | ||
1592 | error = nvme_rdma_alloc_qe(ctrl->queues[0].device->dev, | |
1593 | &ctrl->async_event_sqe, sizeof(struct nvme_command), | |
1594 | DMA_TO_DEVICE); | |
1595 | if (error) | |
1596 | goto out_cleanup_queue; | |
1597 | ||
71102307 CH |
1598 | return 0; |
1599 | ||
1600 | out_cleanup_queue: | |
1601 | blk_cleanup_queue(ctrl->ctrl.admin_q); | |
1602 | out_free_tagset: | |
1603 | /* disconnect and drain the queue before freeing the tagset */ | |
1604 | nvme_rdma_stop_queue(&ctrl->queues[0]); | |
1605 | blk_mq_free_tag_set(&ctrl->admin_tag_set); | |
1606 | out_put_dev: | |
1607 | nvme_rdma_dev_put(ctrl->device); | |
1608 | out_free_queue: | |
1609 | nvme_rdma_free_queue(&ctrl->queues[0]); | |
1610 | return error; | |
1611 | } | |
1612 | ||
1613 | static void nvme_rdma_shutdown_ctrl(struct nvme_rdma_ctrl *ctrl) | |
1614 | { | |
71102307 CH |
1615 | cancel_work_sync(&ctrl->err_work); |
1616 | cancel_delayed_work_sync(&ctrl->reconnect_work); | |
1617 | ||
d858e5f0 | 1618 | if (ctrl->ctrl.queue_count > 1) { |
71102307 CH |
1619 | nvme_stop_queues(&ctrl->ctrl); |
1620 | blk_mq_tagset_busy_iter(&ctrl->tag_set, | |
1621 | nvme_cancel_request, &ctrl->ctrl); | |
1622 | nvme_rdma_free_io_queues(ctrl); | |
1623 | } | |
1624 | ||
b282a88d | 1625 | if (test_bit(NVME_RDMA_Q_LIVE, &ctrl->queues[0].flags)) |
71102307 CH |
1626 | nvme_shutdown_ctrl(&ctrl->ctrl); |
1627 | ||
fb051339 | 1628 | blk_mq_quiesce_queue(ctrl->ctrl.admin_q); |
71102307 CH |
1629 | blk_mq_tagset_busy_iter(&ctrl->admin_tag_set, |
1630 | nvme_cancel_request, &ctrl->ctrl); | |
fb051339 | 1631 | blk_mq_unquiesce_queue(ctrl->ctrl.admin_q); |
71102307 CH |
1632 | nvme_rdma_destroy_admin_queue(ctrl); |
1633 | } | |
1634 | ||
2461a8dd SG |
1635 | static void __nvme_rdma_remove_ctrl(struct nvme_rdma_ctrl *ctrl, bool shutdown) |
1636 | { | |
d09f2b45 SG |
1637 | nvme_stop_ctrl(&ctrl->ctrl); |
1638 | nvme_remove_namespaces(&ctrl->ctrl); | |
2461a8dd SG |
1639 | if (shutdown) |
1640 | nvme_rdma_shutdown_ctrl(ctrl); | |
a34ca17a | 1641 | |
d09f2b45 | 1642 | nvme_uninit_ctrl(&ctrl->ctrl); |
a34ca17a SG |
1643 | if (ctrl->ctrl.tagset) { |
1644 | blk_cleanup_queue(ctrl->ctrl.connect_q); | |
1645 | blk_mq_free_tag_set(&ctrl->tag_set); | |
1646 | nvme_rdma_dev_put(ctrl->device); | |
1647 | } | |
1648 | ||
2461a8dd SG |
1649 | nvme_put_ctrl(&ctrl->ctrl); |
1650 | } | |
1651 | ||
71102307 CH |
1652 | static void nvme_rdma_del_ctrl_work(struct work_struct *work) |
1653 | { | |
1654 | struct nvme_rdma_ctrl *ctrl = container_of(work, | |
1655 | struct nvme_rdma_ctrl, delete_work); | |
1656 | ||
2461a8dd | 1657 | __nvme_rdma_remove_ctrl(ctrl, true); |
71102307 CH |
1658 | } |
1659 | ||
1660 | static int __nvme_rdma_del_ctrl(struct nvme_rdma_ctrl *ctrl) | |
1661 | { | |
1662 | if (!nvme_change_ctrl_state(&ctrl->ctrl, NVME_CTRL_DELETING)) | |
1663 | return -EBUSY; | |
1664 | ||
9a6327d2 | 1665 | if (!queue_work(nvme_wq, &ctrl->delete_work)) |
71102307 CH |
1666 | return -EBUSY; |
1667 | ||
1668 | return 0; | |
1669 | } | |
1670 | ||
1671 | static int nvme_rdma_del_ctrl(struct nvme_ctrl *nctrl) | |
1672 | { | |
1673 | struct nvme_rdma_ctrl *ctrl = to_rdma_ctrl(nctrl); | |
cdbecc8d | 1674 | int ret = 0; |
71102307 | 1675 | |
cdbecc8d SW |
1676 | /* |
1677 | * Keep a reference until all work is flushed since | |
1678 | * __nvme_rdma_del_ctrl can free the ctrl mem | |
1679 | */ | |
1680 | if (!kref_get_unless_zero(&ctrl->ctrl.kref)) | |
1681 | return -EBUSY; | |
71102307 | 1682 | ret = __nvme_rdma_del_ctrl(ctrl); |
cdbecc8d SW |
1683 | if (!ret) |
1684 | flush_work(&ctrl->delete_work); | |
1685 | nvme_put_ctrl(&ctrl->ctrl); | |
1686 | return ret; | |
71102307 CH |
1687 | } |
1688 | ||
1689 | static void nvme_rdma_remove_ctrl_work(struct work_struct *work) | |
1690 | { | |
1691 | struct nvme_rdma_ctrl *ctrl = container_of(work, | |
1692 | struct nvme_rdma_ctrl, delete_work); | |
1693 | ||
2461a8dd | 1694 | __nvme_rdma_remove_ctrl(ctrl, false); |
71102307 CH |
1695 | } |
1696 | ||
1697 | static void nvme_rdma_reset_ctrl_work(struct work_struct *work) | |
1698 | { | |
d86c4d8e CH |
1699 | struct nvme_rdma_ctrl *ctrl = |
1700 | container_of(work, struct nvme_rdma_ctrl, ctrl.reset_work); | |
71102307 CH |
1701 | int ret; |
1702 | bool changed; | |
1703 | ||
d09f2b45 | 1704 | nvme_stop_ctrl(&ctrl->ctrl); |
71102307 CH |
1705 | nvme_rdma_shutdown_ctrl(ctrl); |
1706 | ||
1707 | ret = nvme_rdma_configure_admin_queue(ctrl); | |
1708 | if (ret) { | |
1709 | /* ctrl is already shutdown, just remove the ctrl */ | |
1710 | INIT_WORK(&ctrl->delete_work, nvme_rdma_remove_ctrl_work); | |
1711 | goto del_dead_ctrl; | |
1712 | } | |
1713 | ||
d858e5f0 | 1714 | if (ctrl->ctrl.queue_count > 1) { |
71102307 CH |
1715 | ret = blk_mq_reinit_tagset(&ctrl->tag_set); |
1716 | if (ret) | |
1717 | goto del_dead_ctrl; | |
1718 | ||
1719 | ret = nvme_rdma_init_io_queues(ctrl); | |
1720 | if (ret) | |
1721 | goto del_dead_ctrl; | |
1722 | ||
1723 | ret = nvme_rdma_connect_io_queues(ctrl); | |
1724 | if (ret) | |
1725 | goto del_dead_ctrl; | |
4c8b99f6 SG |
1726 | |
1727 | blk_mq_update_nr_hw_queues(&ctrl->tag_set, | |
1728 | ctrl->ctrl.queue_count - 1); | |
71102307 CH |
1729 | } |
1730 | ||
1731 | changed = nvme_change_ctrl_state(&ctrl->ctrl, NVME_CTRL_LIVE); | |
1732 | WARN_ON_ONCE(!changed); | |
1733 | ||
d09f2b45 | 1734 | nvme_start_ctrl(&ctrl->ctrl); |
71102307 CH |
1735 | |
1736 | return; | |
1737 | ||
1738 | del_dead_ctrl: | |
1739 | /* Deleting this dead controller... */ | |
1740 | dev_warn(ctrl->ctrl.device, "Removing after reset failure\n"); | |
9a6327d2 | 1741 | WARN_ON(!queue_work(nvme_wq, &ctrl->delete_work)); |
71102307 CH |
1742 | } |
1743 | ||
71102307 CH |
1744 | static const struct nvme_ctrl_ops nvme_rdma_ctrl_ops = { |
1745 | .name = "rdma", | |
1746 | .module = THIS_MODULE, | |
d3d5b87d | 1747 | .flags = NVME_F_FABRICS, |
71102307 CH |
1748 | .reg_read32 = nvmf_reg_read32, |
1749 | .reg_read64 = nvmf_reg_read64, | |
1750 | .reg_write32 = nvmf_reg_write32, | |
71102307 CH |
1751 | .free_ctrl = nvme_rdma_free_ctrl, |
1752 | .submit_async_event = nvme_rdma_submit_async_event, | |
1753 | .delete_ctrl = nvme_rdma_del_ctrl, | |
71102307 CH |
1754 | .get_address = nvmf_get_address, |
1755 | }; | |
1756 | ||
1757 | static int nvme_rdma_create_io_queues(struct nvme_rdma_ctrl *ctrl) | |
1758 | { | |
71102307 CH |
1759 | int ret; |
1760 | ||
71102307 CH |
1761 | ret = nvme_rdma_init_io_queues(ctrl); |
1762 | if (ret) | |
1763 | return ret; | |
1764 | ||
1765 | /* | |
1766 | * We need a reference on the device as long as the tag_set is alive, | |
1767 | * as the MRs in the request structures need a valid ib_device. | |
1768 | */ | |
1769 | ret = -EINVAL; | |
1770 | if (!nvme_rdma_dev_get(ctrl->device)) | |
1771 | goto out_free_io_queues; | |
1772 | ||
1773 | memset(&ctrl->tag_set, 0, sizeof(ctrl->tag_set)); | |
1774 | ctrl->tag_set.ops = &nvme_rdma_mq_ops; | |
c5af8654 | 1775 | ctrl->tag_set.queue_depth = ctrl->ctrl.opts->queue_size; |
71102307 CH |
1776 | ctrl->tag_set.reserved_tags = 1; /* fabric connect */ |
1777 | ctrl->tag_set.numa_node = NUMA_NO_NODE; | |
1778 | ctrl->tag_set.flags = BLK_MQ_F_SHOULD_MERGE; | |
1779 | ctrl->tag_set.cmd_size = sizeof(struct nvme_rdma_request) + | |
1780 | SG_CHUNK_SIZE * sizeof(struct scatterlist); | |
1781 | ctrl->tag_set.driver_data = ctrl; | |
d858e5f0 | 1782 | ctrl->tag_set.nr_hw_queues = ctrl->ctrl.queue_count - 1; |
71102307 CH |
1783 | ctrl->tag_set.timeout = NVME_IO_TIMEOUT; |
1784 | ||
1785 | ret = blk_mq_alloc_tag_set(&ctrl->tag_set); | |
1786 | if (ret) | |
1787 | goto out_put_dev; | |
1788 | ctrl->ctrl.tagset = &ctrl->tag_set; | |
1789 | ||
1790 | ctrl->ctrl.connect_q = blk_mq_init_queue(&ctrl->tag_set); | |
1791 | if (IS_ERR(ctrl->ctrl.connect_q)) { | |
1792 | ret = PTR_ERR(ctrl->ctrl.connect_q); | |
1793 | goto out_free_tag_set; | |
1794 | } | |
1795 | ||
1796 | ret = nvme_rdma_connect_io_queues(ctrl); | |
1797 | if (ret) | |
1798 | goto out_cleanup_connect_q; | |
1799 | ||
1800 | return 0; | |
1801 | ||
1802 | out_cleanup_connect_q: | |
1803 | blk_cleanup_queue(ctrl->ctrl.connect_q); | |
1804 | out_free_tag_set: | |
1805 | blk_mq_free_tag_set(&ctrl->tag_set); | |
1806 | out_put_dev: | |
1807 | nvme_rdma_dev_put(ctrl->device); | |
1808 | out_free_io_queues: | |
1809 | nvme_rdma_free_io_queues(ctrl); | |
1810 | return ret; | |
1811 | } | |
1812 | ||
71102307 CH |
1813 | static struct nvme_ctrl *nvme_rdma_create_ctrl(struct device *dev, |
1814 | struct nvmf_ctrl_options *opts) | |
1815 | { | |
1816 | struct nvme_rdma_ctrl *ctrl; | |
1817 | int ret; | |
1818 | bool changed; | |
0928f9b4 | 1819 | char *port; |
71102307 CH |
1820 | |
1821 | ctrl = kzalloc(sizeof(*ctrl), GFP_KERNEL); | |
1822 | if (!ctrl) | |
1823 | return ERR_PTR(-ENOMEM); | |
1824 | ctrl->ctrl.opts = opts; | |
1825 | INIT_LIST_HEAD(&ctrl->list); | |
1826 | ||
0928f9b4 SG |
1827 | if (opts->mask & NVMF_OPT_TRSVCID) |
1828 | port = opts->trsvcid; | |
1829 | else | |
1830 | port = __stringify(NVME_RDMA_IP_PORT); | |
1831 | ||
1832 | ret = inet_pton_with_scope(&init_net, AF_UNSPEC, | |
1833 | opts->traddr, port, &ctrl->addr); | |
71102307 | 1834 | if (ret) { |
0928f9b4 | 1835 | pr_err("malformed address passed: %s:%s\n", opts->traddr, port); |
71102307 CH |
1836 | goto out_free_ctrl; |
1837 | } | |
1838 | ||
8f4e8dac | 1839 | if (opts->mask & NVMF_OPT_HOST_TRADDR) { |
0928f9b4 SG |
1840 | ret = inet_pton_with_scope(&init_net, AF_UNSPEC, |
1841 | opts->host_traddr, NULL, &ctrl->src_addr); | |
8f4e8dac | 1842 | if (ret) { |
0928f9b4 | 1843 | pr_err("malformed src address passed: %s\n", |
8f4e8dac MG |
1844 | opts->host_traddr); |
1845 | goto out_free_ctrl; | |
1846 | } | |
1847 | } | |
1848 | ||
71102307 CH |
1849 | ret = nvme_init_ctrl(&ctrl->ctrl, dev, &nvme_rdma_ctrl_ops, |
1850 | 0 /* no quirks, we're perfect! */); | |
1851 | if (ret) | |
1852 | goto out_free_ctrl; | |
1853 | ||
71102307 CH |
1854 | INIT_DELAYED_WORK(&ctrl->reconnect_work, |
1855 | nvme_rdma_reconnect_ctrl_work); | |
1856 | INIT_WORK(&ctrl->err_work, nvme_rdma_error_recovery_work); | |
1857 | INIT_WORK(&ctrl->delete_work, nvme_rdma_del_ctrl_work); | |
d86c4d8e | 1858 | INIT_WORK(&ctrl->ctrl.reset_work, nvme_rdma_reset_ctrl_work); |
71102307 | 1859 | |
d858e5f0 | 1860 | ctrl->ctrl.queue_count = opts->nr_io_queues + 1; /* +1 for admin queue */ |
c5af8654 | 1861 | ctrl->ctrl.sqsize = opts->queue_size - 1; |
71102307 CH |
1862 | ctrl->ctrl.kato = opts->kato; |
1863 | ||
1864 | ret = -ENOMEM; | |
d858e5f0 | 1865 | ctrl->queues = kcalloc(ctrl->ctrl.queue_count, sizeof(*ctrl->queues), |
71102307 CH |
1866 | GFP_KERNEL); |
1867 | if (!ctrl->queues) | |
1868 | goto out_uninit_ctrl; | |
1869 | ||
1870 | ret = nvme_rdma_configure_admin_queue(ctrl); | |
1871 | if (ret) | |
1872 | goto out_kfree_queues; | |
1873 | ||
1874 | /* sanity check icdoff */ | |
1875 | if (ctrl->ctrl.icdoff) { | |
1876 | dev_err(ctrl->ctrl.device, "icdoff is not supported!\n"); | |
bb472baa | 1877 | ret = -EINVAL; |
71102307 CH |
1878 | goto out_remove_admin_queue; |
1879 | } | |
1880 | ||
1881 | /* sanity check keyed sgls */ | |
1882 | if (!(ctrl->ctrl.sgls & (1 << 20))) { | |
1883 | dev_err(ctrl->ctrl.device, "Mandatory keyed sgls are not support\n"); | |
bb472baa | 1884 | ret = -EINVAL; |
71102307 CH |
1885 | goto out_remove_admin_queue; |
1886 | } | |
1887 | ||
1888 | if (opts->queue_size > ctrl->ctrl.maxcmd) { | |
1889 | /* warn if maxcmd is lower than queue_size */ | |
1890 | dev_warn(ctrl->ctrl.device, | |
1891 | "queue_size %zu > ctrl maxcmd %u, clamping down\n", | |
1892 | opts->queue_size, ctrl->ctrl.maxcmd); | |
1893 | opts->queue_size = ctrl->ctrl.maxcmd; | |
1894 | } | |
1895 | ||
76c08bf4 SJ |
1896 | if (opts->queue_size > ctrl->ctrl.sqsize + 1) { |
1897 | /* warn if sqsize is lower than queue_size */ | |
1898 | dev_warn(ctrl->ctrl.device, | |
1899 | "queue_size %zu > ctrl sqsize %u, clamping down\n", | |
1900 | opts->queue_size, ctrl->ctrl.sqsize + 1); | |
1901 | opts->queue_size = ctrl->ctrl.sqsize + 1; | |
1902 | } | |
1903 | ||
71102307 CH |
1904 | if (opts->nr_io_queues) { |
1905 | ret = nvme_rdma_create_io_queues(ctrl); | |
1906 | if (ret) | |
1907 | goto out_remove_admin_queue; | |
1908 | } | |
1909 | ||
1910 | changed = nvme_change_ctrl_state(&ctrl->ctrl, NVME_CTRL_LIVE); | |
1911 | WARN_ON_ONCE(!changed); | |
1912 | ||
0928f9b4 | 1913 | dev_info(ctrl->ctrl.device, "new ctrl: NQN \"%s\", addr %pISpcs\n", |
71102307 CH |
1914 | ctrl->ctrl.opts->subsysnqn, &ctrl->addr); |
1915 | ||
1916 | kref_get(&ctrl->ctrl.kref); | |
1917 | ||
1918 | mutex_lock(&nvme_rdma_ctrl_mutex); | |
1919 | list_add_tail(&ctrl->list, &nvme_rdma_ctrl_list); | |
1920 | mutex_unlock(&nvme_rdma_ctrl_mutex); | |
1921 | ||
d09f2b45 | 1922 | nvme_start_ctrl(&ctrl->ctrl); |
71102307 CH |
1923 | |
1924 | return &ctrl->ctrl; | |
1925 | ||
1926 | out_remove_admin_queue: | |
71102307 CH |
1927 | nvme_rdma_destroy_admin_queue(ctrl); |
1928 | out_kfree_queues: | |
1929 | kfree(ctrl->queues); | |
1930 | out_uninit_ctrl: | |
1931 | nvme_uninit_ctrl(&ctrl->ctrl); | |
1932 | nvme_put_ctrl(&ctrl->ctrl); | |
1933 | if (ret > 0) | |
1934 | ret = -EIO; | |
1935 | return ERR_PTR(ret); | |
1936 | out_free_ctrl: | |
1937 | kfree(ctrl); | |
1938 | return ERR_PTR(ret); | |
1939 | } | |
1940 | ||
1941 | static struct nvmf_transport_ops nvme_rdma_transport = { | |
1942 | .name = "rdma", | |
1943 | .required_opts = NVMF_OPT_TRADDR, | |
8f4e8dac | 1944 | .allowed_opts = NVMF_OPT_TRSVCID | NVMF_OPT_RECONNECT_DELAY | |
fd8563ce | 1945 | NVMF_OPT_HOST_TRADDR | NVMF_OPT_CTRL_LOSS_TMO, |
71102307 CH |
1946 | .create_ctrl = nvme_rdma_create_ctrl, |
1947 | }; | |
1948 | ||
e87a911f SW |
1949 | static void nvme_rdma_add_one(struct ib_device *ib_device) |
1950 | { | |
1951 | } | |
1952 | ||
1953 | static void nvme_rdma_remove_one(struct ib_device *ib_device, void *client_data) | |
1954 | { | |
1955 | struct nvme_rdma_ctrl *ctrl; | |
1956 | ||
1957 | /* Delete all controllers using this device */ | |
1958 | mutex_lock(&nvme_rdma_ctrl_mutex); | |
1959 | list_for_each_entry(ctrl, &nvme_rdma_ctrl_list, list) { | |
1960 | if (ctrl->device->dev != ib_device) | |
1961 | continue; | |
1962 | dev_info(ctrl->ctrl.device, | |
1963 | "Removing ctrl: NQN \"%s\", addr %pISp\n", | |
1964 | ctrl->ctrl.opts->subsysnqn, &ctrl->addr); | |
1965 | __nvme_rdma_del_ctrl(ctrl); | |
1966 | } | |
1967 | mutex_unlock(&nvme_rdma_ctrl_mutex); | |
1968 | ||
9a6327d2 | 1969 | flush_workqueue(nvme_wq); |
e87a911f SW |
1970 | } |
1971 | ||
1972 | static struct ib_client nvme_rdma_ib_client = { | |
1973 | .name = "nvme_rdma", | |
1974 | .add = nvme_rdma_add_one, | |
1975 | .remove = nvme_rdma_remove_one | |
1976 | }; | |
1977 | ||
71102307 CH |
1978 | static int __init nvme_rdma_init_module(void) |
1979 | { | |
e87a911f SW |
1980 | int ret; |
1981 | ||
e87a911f | 1982 | ret = ib_register_client(&nvme_rdma_ib_client); |
a56c79cf | 1983 | if (ret) |
9a6327d2 | 1984 | return ret; |
a56c79cf SG |
1985 | |
1986 | ret = nvmf_register_transport(&nvme_rdma_transport); | |
1987 | if (ret) | |
1988 | goto err_unreg_client; | |
e87a911f | 1989 | |
a56c79cf | 1990 | return 0; |
e87a911f | 1991 | |
a56c79cf SG |
1992 | err_unreg_client: |
1993 | ib_unregister_client(&nvme_rdma_ib_client); | |
a56c79cf | 1994 | return ret; |
71102307 CH |
1995 | } |
1996 | ||
1997 | static void __exit nvme_rdma_cleanup_module(void) | |
1998 | { | |
71102307 | 1999 | nvmf_unregister_transport(&nvme_rdma_transport); |
e87a911f | 2000 | ib_unregister_client(&nvme_rdma_ib_client); |
71102307 CH |
2001 | } |
2002 | ||
2003 | module_init(nvme_rdma_init_module); | |
2004 | module_exit(nvme_rdma_cleanup_module); | |
2005 | ||
2006 | MODULE_LICENSE("GPL v2"); |