]>
Commit | Line | Data |
---|---|---|
8cfab3cf | 1 | // SPDX-License-Identifier: GPL-2.0 |
4daace0d JO |
2 | /* |
3 | * Copyright (c) Microsoft Corporation. | |
4 | * | |
5 | * Author: | |
6 | * Jake Oshins <jakeo@microsoft.com> | |
7 | * | |
8 | * This driver acts as a paravirtual front-end for PCI Express root buses. | |
9 | * When a PCI Express function (either an entire device or an SR-IOV | |
10 | * Virtual Function) is being passed through to the VM, this driver exposes | |
11 | * a new bus to the guest VM. This is modeled as a root PCI bus because | |
12 | * no bridges are being exposed to the VM. In fact, with a "Generation 2" | |
13 | * VM within Hyper-V, there may seem to be no PCI bus at all in the VM | |
14 | * until a device as been exposed using this driver. | |
15 | * | |
16 | * Each root PCI bus has its own PCI domain, which is called "Segment" in | |
17 | * the PCI Firmware Specifications. Thus while each device passed through | |
18 | * to the VM using this front-end will appear at "device 0", the domain will | |
19 | * be unique. Typically, each bus will have one PCI function on it, though | |
20 | * this driver does support more than one. | |
21 | * | |
22 | * In order to map the interrupts from the device through to the guest VM, | |
23 | * this driver also implements an IRQ Domain, which handles interrupts (either | |
24 | * MSI or MSI-X) associated with the functions on the bus. As interrupts are | |
25 | * set up, torn down, or reaffined, this driver communicates with the | |
26 | * underlying hypervisor to adjust the mappings in the I/O MMU so that each | |
27 | * interrupt will be delivered to the correct virtual processor at the right | |
28 | * vector. This driver does not support level-triggered (line-based) | |
29 | * interrupts, and will report that the Interrupt Line register in the | |
30 | * function's configuration space is zero. | |
31 | * | |
32 | * The rest of this driver mostly maps PCI concepts onto underlying Hyper-V | |
33 | * facilities. For instance, the configuration space of a function exposed | |
34 | * by Hyper-V is mapped into a single page of memory space, and the | |
35 | * read and write handlers for config space must be aware of this mechanism. | |
36 | * Similarly, device setup and teardown involves messages sent to and from | |
37 | * the PCI back-end driver in Hyper-V. | |
4daace0d JO |
38 | */ |
39 | ||
40 | #include <linux/kernel.h> | |
41 | #include <linux/module.h> | |
42 | #include <linux/pci.h> | |
88f94c7f | 43 | #include <linux/pci-ecam.h> |
80bfeeb9 | 44 | #include <linux/delay.h> |
4daace0d JO |
45 | #include <linux/semaphore.h> |
46 | #include <linux/irqdomain.h> | |
47 | #include <asm/irqdomain.h> | |
48 | #include <asm/apic.h> | |
447ae316 | 49 | #include <linux/irq.h> |
4daace0d JO |
50 | #include <linux/msi.h> |
51 | #include <linux/hyperv.h> | |
24196f0c | 52 | #include <linux/refcount.h> |
4daace0d JO |
53 | #include <asm/mshyperv.h> |
54 | ||
55 | /* | |
56 | * Protocol versions. The low word is the minor version, the high word the | |
57 | * major version. | |
58 | */ | |
59 | ||
b1db7e7e | 60 | #define PCI_MAKE_VERSION(major, minor) ((u32)(((major) << 16) | (minor))) |
4daace0d JO |
61 | #define PCI_MAJOR_VERSION(version) ((u32)(version) >> 16) |
62 | #define PCI_MINOR_VERSION(version) ((u32)(version) & 0xff) | |
63 | ||
b1db7e7e JL |
64 | enum pci_protocol_version_t { |
65 | PCI_PROTOCOL_VERSION_1_1 = PCI_MAKE_VERSION(1, 1), /* Win10 */ | |
7dcf90e9 | 66 | PCI_PROTOCOL_VERSION_1_2 = PCI_MAKE_VERSION(1, 2), /* RS1 */ |
999dd956 | 67 | PCI_PROTOCOL_VERSION_1_3 = PCI_MAKE_VERSION(1, 3), /* Vibranium */ |
8f6a6b3c | 68 | PCI_PROTOCOL_VERSION_1_4 = PCI_MAKE_VERSION(1, 4), /* WS2022 */ |
4daace0d JO |
69 | }; |
70 | ||
433fcf6b | 71 | #define CPU_AFFINITY_ALL -1ULL |
b1db7e7e JL |
72 | |
73 | /* | |
74 | * Supported protocol versions in the order of probing - highest go | |
75 | * first. | |
76 | */ | |
77 | static enum pci_protocol_version_t pci_protocol_versions[] = { | |
8f6a6b3c | 78 | PCI_PROTOCOL_VERSION_1_4, |
999dd956 | 79 | PCI_PROTOCOL_VERSION_1_3, |
7dcf90e9 | 80 | PCI_PROTOCOL_VERSION_1_2, |
b1db7e7e JL |
81 | PCI_PROTOCOL_VERSION_1_1, |
82 | }; | |
83 | ||
4daace0d JO |
84 | #define PCI_CONFIG_MMIO_LENGTH 0x2000 |
85 | #define CFG_PAGE_OFFSET 0x1000 | |
86 | #define CFG_PAGE_SIZE (PCI_CONFIG_MMIO_LENGTH - CFG_PAGE_OFFSET) | |
87 | ||
88 | #define MAX_SUPPORTED_MSI_MESSAGES 0x400 | |
89 | ||
b1db7e7e JL |
90 | #define STATUS_REVISION_MISMATCH 0xC0000059 |
91 | ||
a15f2c08 SH |
92 | /* space for 32bit serial number as string */ |
93 | #define SLOT_NAME_SIZE 11 | |
94 | ||
4daace0d JO |
95 | /* |
96 | * Message Types | |
97 | */ | |
98 | ||
99 | enum pci_message_type { | |
100 | /* | |
101 | * Version 1.1 | |
102 | */ | |
103 | PCI_MESSAGE_BASE = 0x42490000, | |
104 | PCI_BUS_RELATIONS = PCI_MESSAGE_BASE + 0, | |
105 | PCI_QUERY_BUS_RELATIONS = PCI_MESSAGE_BASE + 1, | |
106 | PCI_POWER_STATE_CHANGE = PCI_MESSAGE_BASE + 4, | |
107 | PCI_QUERY_RESOURCE_REQUIREMENTS = PCI_MESSAGE_BASE + 5, | |
108 | PCI_QUERY_RESOURCE_RESOURCES = PCI_MESSAGE_BASE + 6, | |
109 | PCI_BUS_D0ENTRY = PCI_MESSAGE_BASE + 7, | |
110 | PCI_BUS_D0EXIT = PCI_MESSAGE_BASE + 8, | |
111 | PCI_READ_BLOCK = PCI_MESSAGE_BASE + 9, | |
112 | PCI_WRITE_BLOCK = PCI_MESSAGE_BASE + 0xA, | |
113 | PCI_EJECT = PCI_MESSAGE_BASE + 0xB, | |
114 | PCI_QUERY_STOP = PCI_MESSAGE_BASE + 0xC, | |
115 | PCI_REENABLE = PCI_MESSAGE_BASE + 0xD, | |
116 | PCI_QUERY_STOP_FAILED = PCI_MESSAGE_BASE + 0xE, | |
117 | PCI_EJECTION_COMPLETE = PCI_MESSAGE_BASE + 0xF, | |
118 | PCI_RESOURCES_ASSIGNED = PCI_MESSAGE_BASE + 0x10, | |
119 | PCI_RESOURCES_RELEASED = PCI_MESSAGE_BASE + 0x11, | |
120 | PCI_INVALIDATE_BLOCK = PCI_MESSAGE_BASE + 0x12, | |
121 | PCI_QUERY_PROTOCOL_VERSION = PCI_MESSAGE_BASE + 0x13, | |
122 | PCI_CREATE_INTERRUPT_MESSAGE = PCI_MESSAGE_BASE + 0x14, | |
123 | PCI_DELETE_INTERRUPT_MESSAGE = PCI_MESSAGE_BASE + 0x15, | |
7dcf90e9 JL |
124 | PCI_RESOURCES_ASSIGNED2 = PCI_MESSAGE_BASE + 0x16, |
125 | PCI_CREATE_INTERRUPT_MESSAGE2 = PCI_MESSAGE_BASE + 0x17, | |
126 | PCI_DELETE_INTERRUPT_MESSAGE2 = PCI_MESSAGE_BASE + 0x18, /* unused */ | |
999dd956 | 127 | PCI_BUS_RELATIONS2 = PCI_MESSAGE_BASE + 0x19, |
8f6a6b3c SM |
128 | PCI_RESOURCES_ASSIGNED3 = PCI_MESSAGE_BASE + 0x1A, |
129 | PCI_CREATE_INTERRUPT_MESSAGE3 = PCI_MESSAGE_BASE + 0x1B, | |
4daace0d JO |
130 | PCI_MESSAGE_MAXIMUM |
131 | }; | |
132 | ||
133 | /* | |
134 | * Structures defining the virtual PCI Express protocol. | |
135 | */ | |
136 | ||
137 | union pci_version { | |
138 | struct { | |
139 | u16 minor_version; | |
140 | u16 major_version; | |
141 | } parts; | |
142 | u32 version; | |
143 | } __packed; | |
144 | ||
145 | /* | |
146 | * Function numbers are 8-bits wide on Express, as interpreted through ARI, | |
147 | * which is all this driver does. This representation is the one used in | |
148 | * Windows, which is what is expected when sending this back and forth with | |
149 | * the Hyper-V parent partition. | |
150 | */ | |
151 | union win_slot_encoding { | |
152 | struct { | |
60e2e2fb DC |
153 | u32 dev:5; |
154 | u32 func:3; | |
4daace0d JO |
155 | u32 reserved:24; |
156 | } bits; | |
157 | u32 slot; | |
158 | } __packed; | |
159 | ||
160 | /* | |
161 | * Pretty much as defined in the PCI Specifications. | |
162 | */ | |
163 | struct pci_function_description { | |
164 | u16 v_id; /* vendor ID */ | |
165 | u16 d_id; /* device ID */ | |
166 | u8 rev; | |
167 | u8 prog_intf; | |
168 | u8 subclass; | |
169 | u8 base_class; | |
170 | u32 subsystem_id; | |
171 | union win_slot_encoding win_slot; | |
172 | u32 ser; /* serial number */ | |
173 | } __packed; | |
174 | ||
999dd956 LL |
175 | enum pci_device_description_flags { |
176 | HV_PCI_DEVICE_FLAG_NONE = 0x0, | |
177 | HV_PCI_DEVICE_FLAG_NUMA_AFFINITY = 0x1, | |
178 | }; | |
179 | ||
180 | struct pci_function_description2 { | |
181 | u16 v_id; /* vendor ID */ | |
182 | u16 d_id; /* device ID */ | |
183 | u8 rev; | |
184 | u8 prog_intf; | |
185 | u8 subclass; | |
186 | u8 base_class; | |
187 | u32 subsystem_id; | |
188 | union win_slot_encoding win_slot; | |
189 | u32 ser; /* serial number */ | |
190 | u32 flags; | |
191 | u16 virtual_numa_node; | |
192 | u16 reserved; | |
193 | } __packed; | |
194 | ||
4daace0d JO |
195 | /** |
196 | * struct hv_msi_desc | |
197 | * @vector: IDT entry | |
198 | * @delivery_mode: As defined in Intel's Programmer's | |
199 | * Reference Manual, Volume 3, Chapter 8. | |
200 | * @vector_count: Number of contiguous entries in the | |
201 | * Interrupt Descriptor Table that are | |
202 | * occupied by this Message-Signaled | |
203 | * Interrupt. For "MSI", as first defined | |
204 | * in PCI 2.2, this can be between 1 and | |
205 | * 32. For "MSI-X," as first defined in PCI | |
206 | * 3.0, this must be 1, as each MSI-X table | |
207 | * entry would have its own descriptor. | |
208 | * @reserved: Empty space | |
209 | * @cpu_mask: All the target virtual processors. | |
210 | */ | |
211 | struct hv_msi_desc { | |
212 | u8 vector; | |
213 | u8 delivery_mode; | |
214 | u16 vector_count; | |
215 | u32 reserved; | |
216 | u64 cpu_mask; | |
217 | } __packed; | |
218 | ||
7dcf90e9 JL |
219 | /** |
220 | * struct hv_msi_desc2 - 1.2 version of hv_msi_desc | |
221 | * @vector: IDT entry | |
222 | * @delivery_mode: As defined in Intel's Programmer's | |
223 | * Reference Manual, Volume 3, Chapter 8. | |
224 | * @vector_count: Number of contiguous entries in the | |
225 | * Interrupt Descriptor Table that are | |
226 | * occupied by this Message-Signaled | |
227 | * Interrupt. For "MSI", as first defined | |
228 | * in PCI 2.2, this can be between 1 and | |
229 | * 32. For "MSI-X," as first defined in PCI | |
230 | * 3.0, this must be 1, as each MSI-X table | |
231 | * entry would have its own descriptor. | |
232 | * @processor_count: number of bits enabled in array. | |
233 | * @processor_array: All the target virtual processors. | |
234 | */ | |
235 | struct hv_msi_desc2 { | |
236 | u8 vector; | |
237 | u8 delivery_mode; | |
238 | u16 vector_count; | |
239 | u16 processor_count; | |
240 | u16 processor_array[32]; | |
241 | } __packed; | |
242 | ||
8f6a6b3c SM |
243 | /* |
244 | * struct hv_msi_desc3 - 1.3 version of hv_msi_desc | |
245 | * Everything is the same as in 'hv_msi_desc2' except that the size of the | |
246 | * 'vector' field is larger to support bigger vector values. For ex: LPI | |
247 | * vectors on ARM. | |
248 | */ | |
249 | struct hv_msi_desc3 { | |
250 | u32 vector; | |
251 | u8 delivery_mode; | |
252 | u8 reserved; | |
253 | u16 vector_count; | |
254 | u16 processor_count; | |
255 | u16 processor_array[32]; | |
256 | } __packed; | |
257 | ||
4daace0d JO |
258 | /** |
259 | * struct tran_int_desc | |
260 | * @reserved: unused, padding | |
261 | * @vector_count: same as in hv_msi_desc | |
262 | * @data: This is the "data payload" value that is | |
263 | * written by the device when it generates | |
264 | * a message-signaled interrupt, either MSI | |
265 | * or MSI-X. | |
266 | * @address: This is the address to which the data | |
267 | * payload is written on interrupt | |
268 | * generation. | |
269 | */ | |
270 | struct tran_int_desc { | |
271 | u16 reserved; | |
272 | u16 vector_count; | |
273 | u32 data; | |
274 | u64 address; | |
275 | } __packed; | |
276 | ||
277 | /* | |
278 | * A generic message format for virtual PCI. | |
279 | * Specific message formats are defined later in the file. | |
280 | */ | |
281 | ||
282 | struct pci_message { | |
0c6045d8 | 283 | u32 type; |
4daace0d JO |
284 | } __packed; |
285 | ||
286 | struct pci_child_message { | |
0c6045d8 | 287 | struct pci_message message_type; |
4daace0d JO |
288 | union win_slot_encoding wslot; |
289 | } __packed; | |
290 | ||
291 | struct pci_incoming_message { | |
292 | struct vmpacket_descriptor hdr; | |
293 | struct pci_message message_type; | |
294 | } __packed; | |
295 | ||
296 | struct pci_response { | |
297 | struct vmpacket_descriptor hdr; | |
298 | s32 status; /* negative values are failures */ | |
299 | } __packed; | |
300 | ||
301 | struct pci_packet { | |
302 | void (*completion_func)(void *context, struct pci_response *resp, | |
303 | int resp_packet_size); | |
304 | void *compl_ctxt; | |
0c6045d8 | 305 | |
067fb6c9 | 306 | struct pci_message message[]; |
4daace0d JO |
307 | }; |
308 | ||
309 | /* | |
310 | * Specific message types supporting the PCI protocol. | |
311 | */ | |
312 | ||
313 | /* | |
314 | * Version negotiation message. Sent from the guest to the host. | |
315 | * The guest is free to try different versions until the host | |
316 | * accepts the version. | |
317 | * | |
318 | * pci_version: The protocol version requested. | |
319 | * is_last_attempt: If TRUE, this is the last version guest will request. | |
320 | * reservedz: Reserved field, set to zero. | |
321 | */ | |
322 | ||
323 | struct pci_version_request { | |
324 | struct pci_message message_type; | |
691ac1dc | 325 | u32 protocol_version; |
4daace0d JO |
326 | } __packed; |
327 | ||
328 | /* | |
329 | * Bus D0 Entry. This is sent from the guest to the host when the virtual | |
330 | * bus (PCI Express port) is ready for action. | |
331 | */ | |
332 | ||
333 | struct pci_bus_d0_entry { | |
334 | struct pci_message message_type; | |
335 | u32 reserved; | |
336 | u64 mmio_base; | |
337 | } __packed; | |
338 | ||
339 | struct pci_bus_relations { | |
340 | struct pci_incoming_message incoming; | |
341 | u32 device_count; | |
067fb6c9 | 342 | struct pci_function_description func[]; |
4daace0d JO |
343 | } __packed; |
344 | ||
999dd956 LL |
345 | struct pci_bus_relations2 { |
346 | struct pci_incoming_message incoming; | |
347 | u32 device_count; | |
067fb6c9 | 348 | struct pci_function_description2 func[]; |
999dd956 LL |
349 | } __packed; |
350 | ||
4daace0d JO |
351 | struct pci_q_res_req_response { |
352 | struct vmpacket_descriptor hdr; | |
353 | s32 status; /* negative values are failures */ | |
c9c13ba4 | 354 | u32 probed_bar[PCI_STD_NUM_BARS]; |
4daace0d JO |
355 | } __packed; |
356 | ||
357 | struct pci_set_power { | |
358 | struct pci_message message_type; | |
359 | union win_slot_encoding wslot; | |
360 | u32 power_state; /* In Windows terms */ | |
361 | u32 reserved; | |
362 | } __packed; | |
363 | ||
364 | struct pci_set_power_response { | |
365 | struct vmpacket_descriptor hdr; | |
366 | s32 status; /* negative values are failures */ | |
367 | union win_slot_encoding wslot; | |
368 | u32 resultant_state; /* In Windows terms */ | |
369 | u32 reserved; | |
370 | } __packed; | |
371 | ||
372 | struct pci_resources_assigned { | |
373 | struct pci_message message_type; | |
374 | union win_slot_encoding wslot; | |
375 | u8 memory_range[0x14][6]; /* not used here */ | |
376 | u32 msi_descriptors; | |
377 | u32 reserved[4]; | |
378 | } __packed; | |
379 | ||
7dcf90e9 JL |
380 | struct pci_resources_assigned2 { |
381 | struct pci_message message_type; | |
382 | union win_slot_encoding wslot; | |
383 | u8 memory_range[0x14][6]; /* not used here */ | |
384 | u32 msi_descriptor_count; | |
385 | u8 reserved[70]; | |
386 | } __packed; | |
387 | ||
4daace0d JO |
388 | struct pci_create_interrupt { |
389 | struct pci_message message_type; | |
390 | union win_slot_encoding wslot; | |
391 | struct hv_msi_desc int_desc; | |
392 | } __packed; | |
393 | ||
394 | struct pci_create_int_response { | |
395 | struct pci_response response; | |
396 | u32 reserved; | |
397 | struct tran_int_desc int_desc; | |
398 | } __packed; | |
399 | ||
7dcf90e9 JL |
400 | struct pci_create_interrupt2 { |
401 | struct pci_message message_type; | |
402 | union win_slot_encoding wslot; | |
403 | struct hv_msi_desc2 int_desc; | |
404 | } __packed; | |
405 | ||
8f6a6b3c SM |
406 | struct pci_create_interrupt3 { |
407 | struct pci_message message_type; | |
408 | union win_slot_encoding wslot; | |
409 | struct hv_msi_desc3 int_desc; | |
410 | } __packed; | |
411 | ||
4daace0d JO |
412 | struct pci_delete_interrupt { |
413 | struct pci_message message_type; | |
414 | union win_slot_encoding wslot; | |
415 | struct tran_int_desc int_desc; | |
416 | } __packed; | |
417 | ||
e5d2f910 DC |
418 | /* |
419 | * Note: the VM must pass a valid block id, wslot and bytes_requested. | |
420 | */ | |
421 | struct pci_read_block { | |
422 | struct pci_message message_type; | |
423 | u32 block_id; | |
424 | union win_slot_encoding wslot; | |
425 | u32 bytes_requested; | |
426 | } __packed; | |
427 | ||
428 | struct pci_read_block_response { | |
429 | struct vmpacket_descriptor hdr; | |
430 | u32 status; | |
431 | u8 bytes[HV_CONFIG_BLOCK_SIZE_MAX]; | |
432 | } __packed; | |
433 | ||
434 | /* | |
435 | * Note: the VM must pass a valid block id, wslot and byte_count. | |
436 | */ | |
437 | struct pci_write_block { | |
438 | struct pci_message message_type; | |
439 | u32 block_id; | |
440 | union win_slot_encoding wslot; | |
441 | u32 byte_count; | |
442 | u8 bytes[HV_CONFIG_BLOCK_SIZE_MAX]; | |
443 | } __packed; | |
444 | ||
445 | struct pci_dev_inval_block { | |
446 | struct pci_incoming_message incoming; | |
447 | union win_slot_encoding wslot; | |
448 | u64 block_mask; | |
449 | } __packed; | |
450 | ||
4daace0d JO |
451 | struct pci_dev_incoming { |
452 | struct pci_incoming_message incoming; | |
453 | union win_slot_encoding wslot; | |
454 | } __packed; | |
455 | ||
456 | struct pci_eject_response { | |
0c6045d8 | 457 | struct pci_message message_type; |
4daace0d JO |
458 | union win_slot_encoding wslot; |
459 | u32 status; | |
460 | } __packed; | |
461 | ||
462 | static int pci_ring_size = (4 * PAGE_SIZE); | |
463 | ||
4daace0d JO |
464 | /* |
465 | * Driver specific state. | |
466 | */ | |
467 | ||
468 | enum hv_pcibus_state { | |
469 | hv_pcibus_init = 0, | |
470 | hv_pcibus_probed, | |
471 | hv_pcibus_installed, | |
ac82fc83 | 472 | hv_pcibus_removing, |
4daace0d JO |
473 | hv_pcibus_maximum |
474 | }; | |
475 | ||
476 | struct hv_pcibus_device { | |
88f94c7f | 477 | #ifdef CONFIG_X86 |
4daace0d | 478 | struct pci_sysdata sysdata; |
88f94c7f BF |
479 | #elif defined(CONFIG_ARM64) |
480 | struct pci_config_window sysdata; | |
481 | #endif | |
418cb6c8 | 482 | struct pci_host_bridge *bridge; |
9e7f9178 | 483 | struct fwnode_handle *fwnode; |
14ef39fd DC |
484 | /* Protocol version negotiated with the host */ |
485 | enum pci_protocol_version_t protocol_version; | |
4daace0d | 486 | enum hv_pcibus_state state; |
4daace0d JO |
487 | struct hv_device *hdev; |
488 | resource_size_t low_mmio_space; | |
489 | resource_size_t high_mmio_space; | |
490 | struct resource *mem_config; | |
491 | struct resource *low_mmio_res; | |
492 | struct resource *high_mmio_res; | |
493 | struct completion *survey_event; | |
4daace0d JO |
494 | struct pci_bus *pci_bus; |
495 | spinlock_t config_lock; /* Avoid two threads writing index page */ | |
496 | spinlock_t device_list_lock; /* Protect lists below */ | |
497 | void __iomem *cfg_addr; | |
498 | ||
4daace0d JO |
499 | struct list_head children; |
500 | struct list_head dr_list; | |
4daace0d JO |
501 | |
502 | struct msi_domain_info msi_info; | |
4daace0d | 503 | struct irq_domain *irq_domain; |
be66b673 | 504 | |
0de8ce3e | 505 | spinlock_t retarget_msi_interrupt_lock; |
021ad274 DC |
506 | |
507 | struct workqueue_struct *wq; | |
9bc11742 | 508 | |
83cc3508 WH |
509 | /* Highest slot of child device with resources allocated */ |
510 | int wslot_res_allocated; | |
511 | ||
9bc11742 | 512 | /* hypercall arg, must not cross page boundary */ |
61bfd920 | 513 | struct hv_retarget_device_interrupt retarget_msi_interrupt_params; |
9bc11742 MN |
514 | |
515 | /* | |
516 | * Don't put anything here: retarget_msi_interrupt_params must be last | |
517 | */ | |
4daace0d JO |
518 | }; |
519 | ||
520 | /* | |
521 | * Tracks "Device Relations" messages from the host, which must be both | |
522 | * processed in order and deferred so that they don't run in the context | |
523 | * of the incoming packet callback. | |
524 | */ | |
525 | struct hv_dr_work { | |
526 | struct work_struct wrk; | |
527 | struct hv_pcibus_device *bus; | |
528 | }; | |
529 | ||
f9ad0f36 LL |
530 | struct hv_pcidev_description { |
531 | u16 v_id; /* vendor ID */ | |
532 | u16 d_id; /* device ID */ | |
533 | u8 rev; | |
534 | u8 prog_intf; | |
535 | u8 subclass; | |
536 | u8 base_class; | |
537 | u32 subsystem_id; | |
538 | union win_slot_encoding win_slot; | |
539 | u32 ser; /* serial number */ | |
540 | u32 flags; | |
541 | u16 virtual_numa_node; | |
542 | }; | |
543 | ||
4daace0d JO |
544 | struct hv_dr_state { |
545 | struct list_head list_entry; | |
546 | u32 device_count; | |
067fb6c9 | 547 | struct hv_pcidev_description func[]; |
4daace0d JO |
548 | }; |
549 | ||
550 | enum hv_pcichild_state { | |
551 | hv_pcichild_init = 0, | |
552 | hv_pcichild_requirements, | |
553 | hv_pcichild_resourced, | |
554 | hv_pcichild_ejecting, | |
555 | hv_pcichild_maximum | |
556 | }; | |
557 | ||
4daace0d JO |
558 | struct hv_pci_dev { |
559 | /* List protected by pci_rescan_remove_lock */ | |
560 | struct list_head list_entry; | |
24196f0c | 561 | refcount_t refs; |
4daace0d | 562 | enum hv_pcichild_state state; |
a15f2c08 | 563 | struct pci_slot *pci_slot; |
f9ad0f36 | 564 | struct hv_pcidev_description desc; |
4daace0d JO |
565 | bool reported_missing; |
566 | struct hv_pcibus_device *hbus; | |
567 | struct work_struct wrk; | |
568 | ||
e5d2f910 DC |
569 | void (*block_invalidate)(void *context, u64 block_mask); |
570 | void *invalidate_context; | |
571 | ||
4daace0d JO |
572 | /* |
573 | * What would be observed if one wrote 0xFFFFFFFF to a BAR and then | |
574 | * read it back, for each of the BAR offsets within config space. | |
575 | */ | |
c9c13ba4 | 576 | u32 probed_bar[PCI_STD_NUM_BARS]; |
4daace0d JO |
577 | }; |
578 | ||
579 | struct hv_pci_compl { | |
580 | struct completion host_event; | |
581 | s32 completion_status; | |
582 | }; | |
583 | ||
de0aa7b2 DC |
584 | static void hv_pci_onchannelcallback(void *context); |
585 | ||
4daace0d JO |
586 | /** |
587 | * hv_pci_generic_compl() - Invoked for a completion packet | |
588 | * @context: Set up by the sender of the packet. | |
589 | * @resp: The response packet | |
590 | * @resp_packet_size: Size in bytes of the packet | |
591 | * | |
592 | * This function is used to trigger an event and report status | |
593 | * for any message for which the completion packet contains a | |
594 | * status and nothing else. | |
595 | */ | |
a5b45b7b DC |
596 | static void hv_pci_generic_compl(void *context, struct pci_response *resp, |
597 | int resp_packet_size) | |
4daace0d JO |
598 | { |
599 | struct hv_pci_compl *comp_pkt = context; | |
600 | ||
601 | if (resp_packet_size >= offsetofend(struct pci_response, status)) | |
602 | comp_pkt->completion_status = resp->status; | |
a5b45b7b DC |
603 | else |
604 | comp_pkt->completion_status = -1; | |
605 | ||
4daace0d JO |
606 | complete(&comp_pkt->host_event); |
607 | } | |
608 | ||
609 | static struct hv_pci_dev *get_pcichild_wslot(struct hv_pcibus_device *hbus, | |
610 | u32 wslot); | |
8c99e120 SH |
611 | |
612 | static void get_pcichild(struct hv_pci_dev *hpdev) | |
613 | { | |
614 | refcount_inc(&hpdev->refs); | |
615 | } | |
616 | ||
617 | static void put_pcichild(struct hv_pci_dev *hpdev) | |
618 | { | |
619 | if (refcount_dec_and_test(&hpdev->refs)) | |
620 | kfree(hpdev); | |
621 | } | |
4daace0d | 622 | |
c3635da2 DC |
623 | /* |
624 | * There is no good way to get notified from vmbus_onoffer_rescind(), | |
625 | * so let's use polling here, since this is not a hot path. | |
626 | */ | |
627 | static int wait_for_response(struct hv_device *hdev, | |
628 | struct completion *comp) | |
629 | { | |
630 | while (true) { | |
631 | if (hdev->channel->rescind) { | |
632 | dev_warn_once(&hdev->device, "The device is gone.\n"); | |
633 | return -ENODEV; | |
634 | } | |
635 | ||
636 | if (wait_for_completion_timeout(comp, HZ / 10)) | |
637 | break; | |
638 | } | |
639 | ||
640 | return 0; | |
641 | } | |
642 | ||
4daace0d JO |
643 | /** |
644 | * devfn_to_wslot() - Convert from Linux PCI slot to Windows | |
645 | * @devfn: The Linux representation of PCI slot | |
646 | * | |
647 | * Windows uses a slightly different representation of PCI slot. | |
648 | * | |
649 | * Return: The Windows representation | |
650 | */ | |
651 | static u32 devfn_to_wslot(int devfn) | |
652 | { | |
653 | union win_slot_encoding wslot; | |
654 | ||
655 | wslot.slot = 0; | |
60e2e2fb DC |
656 | wslot.bits.dev = PCI_SLOT(devfn); |
657 | wslot.bits.func = PCI_FUNC(devfn); | |
4daace0d JO |
658 | |
659 | return wslot.slot; | |
660 | } | |
661 | ||
662 | /** | |
663 | * wslot_to_devfn() - Convert from Windows PCI slot to Linux | |
664 | * @wslot: The Windows representation of PCI slot | |
665 | * | |
666 | * Windows uses a slightly different representation of PCI slot. | |
667 | * | |
668 | * Return: The Linux representation | |
669 | */ | |
670 | static int wslot_to_devfn(u32 wslot) | |
671 | { | |
672 | union win_slot_encoding slot_no; | |
673 | ||
674 | slot_no.slot = wslot; | |
60e2e2fb | 675 | return PCI_DEVFN(slot_no.bits.dev, slot_no.bits.func); |
4daace0d JO |
676 | } |
677 | ||
678 | /* | |
679 | * PCI Configuration Space for these root PCI buses is implemented as a pair | |
680 | * of pages in memory-mapped I/O space. Writing to the first page chooses | |
681 | * the PCI function being written or read. Once the first page has been | |
682 | * written to, the following page maps in the entire configuration space of | |
683 | * the function. | |
684 | */ | |
685 | ||
686 | /** | |
687 | * _hv_pcifront_read_config() - Internal PCI config read | |
688 | * @hpdev: The PCI driver's representation of the device | |
689 | * @where: Offset within config space | |
690 | * @size: Size of the transfer | |
691 | * @val: Pointer to the buffer receiving the data | |
692 | */ | |
693 | static void _hv_pcifront_read_config(struct hv_pci_dev *hpdev, int where, | |
694 | int size, u32 *val) | |
695 | { | |
696 | unsigned long flags; | |
697 | void __iomem *addr = hpdev->hbus->cfg_addr + CFG_PAGE_OFFSET + where; | |
698 | ||
699 | /* | |
700 | * If the attempt is to read the IDs or the ROM BAR, simulate that. | |
701 | */ | |
702 | if (where + size <= PCI_COMMAND) { | |
703 | memcpy(val, ((u8 *)&hpdev->desc.v_id) + where, size); | |
704 | } else if (where >= PCI_CLASS_REVISION && where + size <= | |
705 | PCI_CACHE_LINE_SIZE) { | |
706 | memcpy(val, ((u8 *)&hpdev->desc.rev) + where - | |
707 | PCI_CLASS_REVISION, size); | |
708 | } else if (where >= PCI_SUBSYSTEM_VENDOR_ID && where + size <= | |
709 | PCI_ROM_ADDRESS) { | |
710 | memcpy(val, (u8 *)&hpdev->desc.subsystem_id + where - | |
711 | PCI_SUBSYSTEM_VENDOR_ID, size); | |
712 | } else if (where >= PCI_ROM_ADDRESS && where + size <= | |
713 | PCI_CAPABILITY_LIST) { | |
714 | /* ROM BARs are unimplemented */ | |
715 | *val = 0; | |
716 | } else if (where >= PCI_INTERRUPT_LINE && where + size <= | |
717 | PCI_INTERRUPT_PIN) { | |
718 | /* | |
719 | * Interrupt Line and Interrupt PIN are hard-wired to zero | |
720 | * because this front-end only supports message-signaled | |
721 | * interrupts. | |
722 | */ | |
723 | *val = 0; | |
724 | } else if (where + size <= CFG_PAGE_SIZE) { | |
725 | spin_lock_irqsave(&hpdev->hbus->config_lock, flags); | |
726 | /* Choose the function to be read. (See comment above) */ | |
727 | writel(hpdev->desc.win_slot.slot, hpdev->hbus->cfg_addr); | |
bdd74440 VK |
728 | /* Make sure the function was chosen before we start reading. */ |
729 | mb(); | |
4daace0d JO |
730 | /* Read from that function's config space. */ |
731 | switch (size) { | |
732 | case 1: | |
733 | *val = readb(addr); | |
734 | break; | |
735 | case 2: | |
736 | *val = readw(addr); | |
737 | break; | |
738 | default: | |
739 | *val = readl(addr); | |
740 | break; | |
741 | } | |
bdd74440 | 742 | /* |
df3f2159 | 743 | * Make sure the read was done before we release the spinlock |
bdd74440 VK |
744 | * allowing consecutive reads/writes. |
745 | */ | |
746 | mb(); | |
4daace0d JO |
747 | spin_unlock_irqrestore(&hpdev->hbus->config_lock, flags); |
748 | } else { | |
749 | dev_err(&hpdev->hbus->hdev->device, | |
750 | "Attempt to read beyond a function's config space.\n"); | |
751 | } | |
752 | } | |
753 | ||
de0aa7b2 DC |
754 | static u16 hv_pcifront_get_vendor_id(struct hv_pci_dev *hpdev) |
755 | { | |
756 | u16 ret; | |
757 | unsigned long flags; | |
758 | void __iomem *addr = hpdev->hbus->cfg_addr + CFG_PAGE_OFFSET + | |
759 | PCI_VENDOR_ID; | |
760 | ||
761 | spin_lock_irqsave(&hpdev->hbus->config_lock, flags); | |
762 | ||
763 | /* Choose the function to be read. (See comment above) */ | |
764 | writel(hpdev->desc.win_slot.slot, hpdev->hbus->cfg_addr); | |
765 | /* Make sure the function was chosen before we start reading. */ | |
766 | mb(); | |
767 | /* Read from that function's config space. */ | |
768 | ret = readw(addr); | |
769 | /* | |
770 | * mb() is not required here, because the spin_unlock_irqrestore() | |
771 | * is a barrier. | |
772 | */ | |
773 | ||
774 | spin_unlock_irqrestore(&hpdev->hbus->config_lock, flags); | |
775 | ||
776 | return ret; | |
777 | } | |
778 | ||
4daace0d JO |
779 | /** |
780 | * _hv_pcifront_write_config() - Internal PCI config write | |
781 | * @hpdev: The PCI driver's representation of the device | |
782 | * @where: Offset within config space | |
783 | * @size: Size of the transfer | |
784 | * @val: The data being transferred | |
785 | */ | |
786 | static void _hv_pcifront_write_config(struct hv_pci_dev *hpdev, int where, | |
787 | int size, u32 val) | |
788 | { | |
789 | unsigned long flags; | |
790 | void __iomem *addr = hpdev->hbus->cfg_addr + CFG_PAGE_OFFSET + where; | |
791 | ||
792 | if (where >= PCI_SUBSYSTEM_VENDOR_ID && | |
793 | where + size <= PCI_CAPABILITY_LIST) { | |
794 | /* SSIDs and ROM BARs are read-only */ | |
795 | } else if (where >= PCI_COMMAND && where + size <= CFG_PAGE_SIZE) { | |
796 | spin_lock_irqsave(&hpdev->hbus->config_lock, flags); | |
797 | /* Choose the function to be written. (See comment above) */ | |
798 | writel(hpdev->desc.win_slot.slot, hpdev->hbus->cfg_addr); | |
bdd74440 VK |
799 | /* Make sure the function was chosen before we start writing. */ |
800 | wmb(); | |
4daace0d JO |
801 | /* Write to that function's config space. */ |
802 | switch (size) { | |
803 | case 1: | |
804 | writeb(val, addr); | |
805 | break; | |
806 | case 2: | |
807 | writew(val, addr); | |
808 | break; | |
809 | default: | |
810 | writel(val, addr); | |
811 | break; | |
812 | } | |
bdd74440 VK |
813 | /* |
814 | * Make sure the write was done before we release the spinlock | |
815 | * allowing consecutive reads/writes. | |
816 | */ | |
817 | mb(); | |
4daace0d JO |
818 | spin_unlock_irqrestore(&hpdev->hbus->config_lock, flags); |
819 | } else { | |
820 | dev_err(&hpdev->hbus->hdev->device, | |
821 | "Attempt to write beyond a function's config space.\n"); | |
822 | } | |
823 | } | |
824 | ||
825 | /** | |
826 | * hv_pcifront_read_config() - Read configuration space | |
827 | * @bus: PCI Bus structure | |
828 | * @devfn: Device/function | |
829 | * @where: Offset from base | |
830 | * @size: Byte/word/dword | |
831 | * @val: Value to be read | |
832 | * | |
833 | * Return: PCIBIOS_SUCCESSFUL on success | |
834 | * PCIBIOS_DEVICE_NOT_FOUND on failure | |
835 | */ | |
836 | static int hv_pcifront_read_config(struct pci_bus *bus, unsigned int devfn, | |
837 | int where, int size, u32 *val) | |
838 | { | |
839 | struct hv_pcibus_device *hbus = | |
840 | container_of(bus->sysdata, struct hv_pcibus_device, sysdata); | |
841 | struct hv_pci_dev *hpdev; | |
842 | ||
843 | hpdev = get_pcichild_wslot(hbus, devfn_to_wslot(devfn)); | |
844 | if (!hpdev) | |
845 | return PCIBIOS_DEVICE_NOT_FOUND; | |
846 | ||
847 | _hv_pcifront_read_config(hpdev, where, size, val); | |
848 | ||
8c99e120 | 849 | put_pcichild(hpdev); |
4daace0d JO |
850 | return PCIBIOS_SUCCESSFUL; |
851 | } | |
852 | ||
853 | /** | |
854 | * hv_pcifront_write_config() - Write configuration space | |
855 | * @bus: PCI Bus structure | |
856 | * @devfn: Device/function | |
857 | * @where: Offset from base | |
858 | * @size: Byte/word/dword | |
859 | * @val: Value to be written to device | |
860 | * | |
861 | * Return: PCIBIOS_SUCCESSFUL on success | |
862 | * PCIBIOS_DEVICE_NOT_FOUND on failure | |
863 | */ | |
864 | static int hv_pcifront_write_config(struct pci_bus *bus, unsigned int devfn, | |
865 | int where, int size, u32 val) | |
866 | { | |
867 | struct hv_pcibus_device *hbus = | |
868 | container_of(bus->sysdata, struct hv_pcibus_device, sysdata); | |
869 | struct hv_pci_dev *hpdev; | |
870 | ||
871 | hpdev = get_pcichild_wslot(hbus, devfn_to_wslot(devfn)); | |
872 | if (!hpdev) | |
873 | return PCIBIOS_DEVICE_NOT_FOUND; | |
874 | ||
875 | _hv_pcifront_write_config(hpdev, where, size, val); | |
876 | ||
8c99e120 | 877 | put_pcichild(hpdev); |
4daace0d JO |
878 | return PCIBIOS_SUCCESSFUL; |
879 | } | |
880 | ||
881 | /* PCIe operations */ | |
882 | static struct pci_ops hv_pcifront_ops = { | |
883 | .read = hv_pcifront_read_config, | |
884 | .write = hv_pcifront_write_config, | |
885 | }; | |
886 | ||
e5d2f910 DC |
887 | /* |
888 | * Paravirtual backchannel | |
889 | * | |
890 | * Hyper-V SR-IOV provides a backchannel mechanism in software for | |
891 | * communication between a VF driver and a PF driver. These | |
892 | * "configuration blocks" are similar in concept to PCI configuration space, | |
893 | * but instead of doing reads and writes in 32-bit chunks through a very slow | |
894 | * path, packets of up to 128 bytes can be sent or received asynchronously. | |
895 | * | |
896 | * Nearly every SR-IOV device contains just such a communications channel in | |
897 | * hardware, so using this one in software is usually optional. Using the | |
898 | * software channel, however, allows driver implementers to leverage software | |
899 | * tools that fuzz the communications channel looking for vulnerabilities. | |
900 | * | |
901 | * The usage model for these packets puts the responsibility for reading or | |
902 | * writing on the VF driver. The VF driver sends a read or a write packet, | |
903 | * indicating which "block" is being referred to by number. | |
904 | * | |
905 | * If the PF driver wishes to initiate communication, it can "invalidate" one or | |
906 | * more of the first 64 blocks. This invalidation is delivered via a callback | |
907 | * supplied by the VF driver by this driver. | |
908 | * | |
909 | * No protocol is implied, except that supplied by the PF and VF drivers. | |
910 | */ | |
911 | ||
912 | struct hv_read_config_compl { | |
913 | struct hv_pci_compl comp_pkt; | |
914 | void *buf; | |
915 | unsigned int len; | |
916 | unsigned int bytes_returned; | |
917 | }; | |
918 | ||
919 | /** | |
920 | * hv_pci_read_config_compl() - Invoked when a response packet | |
921 | * for a read config block operation arrives. | |
922 | * @context: Identifies the read config operation | |
923 | * @resp: The response packet itself | |
924 | * @resp_packet_size: Size in bytes of the response packet | |
925 | */ | |
926 | static void hv_pci_read_config_compl(void *context, struct pci_response *resp, | |
927 | int resp_packet_size) | |
928 | { | |
929 | struct hv_read_config_compl *comp = context; | |
930 | struct pci_read_block_response *read_resp = | |
931 | (struct pci_read_block_response *)resp; | |
932 | unsigned int data_len, hdr_len; | |
933 | ||
934 | hdr_len = offsetof(struct pci_read_block_response, bytes); | |
935 | if (resp_packet_size < hdr_len) { | |
936 | comp->comp_pkt.completion_status = -1; | |
937 | goto out; | |
938 | } | |
939 | ||
940 | data_len = resp_packet_size - hdr_len; | |
941 | if (data_len > 0 && read_resp->status == 0) { | |
942 | comp->bytes_returned = min(comp->len, data_len); | |
943 | memcpy(comp->buf, read_resp->bytes, comp->bytes_returned); | |
944 | } else { | |
945 | comp->bytes_returned = 0; | |
946 | } | |
947 | ||
948 | comp->comp_pkt.completion_status = read_resp->status; | |
949 | out: | |
950 | complete(&comp->comp_pkt.host_event); | |
951 | } | |
952 | ||
953 | /** | |
954 | * hv_read_config_block() - Sends a read config block request to | |
955 | * the back-end driver running in the Hyper-V parent partition. | |
956 | * @pdev: The PCI driver's representation for this device. | |
957 | * @buf: Buffer into which the config block will be copied. | |
958 | * @len: Size in bytes of buf. | |
959 | * @block_id: Identifies the config block which has been requested. | |
960 | * @bytes_returned: Size which came back from the back-end driver. | |
961 | * | |
962 | * Return: 0 on success, -errno on failure | |
963 | */ | |
a459d9e1 WY |
964 | static int hv_read_config_block(struct pci_dev *pdev, void *buf, |
965 | unsigned int len, unsigned int block_id, | |
966 | unsigned int *bytes_returned) | |
e5d2f910 DC |
967 | { |
968 | struct hv_pcibus_device *hbus = | |
969 | container_of(pdev->bus->sysdata, struct hv_pcibus_device, | |
970 | sysdata); | |
971 | struct { | |
972 | struct pci_packet pkt; | |
973 | char buf[sizeof(struct pci_read_block)]; | |
974 | } pkt; | |
975 | struct hv_read_config_compl comp_pkt; | |
976 | struct pci_read_block *read_blk; | |
977 | int ret; | |
978 | ||
979 | if (len == 0 || len > HV_CONFIG_BLOCK_SIZE_MAX) | |
980 | return -EINVAL; | |
981 | ||
982 | init_completion(&comp_pkt.comp_pkt.host_event); | |
983 | comp_pkt.buf = buf; | |
984 | comp_pkt.len = len; | |
985 | ||
986 | memset(&pkt, 0, sizeof(pkt)); | |
987 | pkt.pkt.completion_func = hv_pci_read_config_compl; | |
988 | pkt.pkt.compl_ctxt = &comp_pkt; | |
989 | read_blk = (struct pci_read_block *)&pkt.pkt.message; | |
990 | read_blk->message_type.type = PCI_READ_BLOCK; | |
991 | read_blk->wslot.slot = devfn_to_wslot(pdev->devfn); | |
992 | read_blk->block_id = block_id; | |
993 | read_blk->bytes_requested = len; | |
994 | ||
995 | ret = vmbus_sendpacket(hbus->hdev->channel, read_blk, | |
996 | sizeof(*read_blk), (unsigned long)&pkt.pkt, | |
997 | VM_PKT_DATA_INBAND, | |
998 | VMBUS_DATA_PACKET_FLAG_COMPLETION_REQUESTED); | |
999 | if (ret) | |
1000 | return ret; | |
1001 | ||
1002 | ret = wait_for_response(hbus->hdev, &comp_pkt.comp_pkt.host_event); | |
1003 | if (ret) | |
1004 | return ret; | |
1005 | ||
1006 | if (comp_pkt.comp_pkt.completion_status != 0 || | |
1007 | comp_pkt.bytes_returned == 0) { | |
1008 | dev_err(&hbus->hdev->device, | |
1009 | "Read Config Block failed: 0x%x, bytes_returned=%d\n", | |
1010 | comp_pkt.comp_pkt.completion_status, | |
1011 | comp_pkt.bytes_returned); | |
1012 | return -EIO; | |
1013 | } | |
1014 | ||
1015 | *bytes_returned = comp_pkt.bytes_returned; | |
1016 | return 0; | |
1017 | } | |
e5d2f910 DC |
1018 | |
1019 | /** | |
1020 | * hv_pci_write_config_compl() - Invoked when a response packet for a write | |
1021 | * config block operation arrives. | |
1022 | * @context: Identifies the write config operation | |
1023 | * @resp: The response packet itself | |
1024 | * @resp_packet_size: Size in bytes of the response packet | |
1025 | */ | |
1026 | static void hv_pci_write_config_compl(void *context, struct pci_response *resp, | |
1027 | int resp_packet_size) | |
1028 | { | |
1029 | struct hv_pci_compl *comp_pkt = context; | |
1030 | ||
1031 | comp_pkt->completion_status = resp->status; | |
1032 | complete(&comp_pkt->host_event); | |
1033 | } | |
1034 | ||
1035 | /** | |
1036 | * hv_write_config_block() - Sends a write config block request to the | |
1037 | * back-end driver running in the Hyper-V parent partition. | |
1038 | * @pdev: The PCI driver's representation for this device. | |
1039 | * @buf: Buffer from which the config block will be copied. | |
1040 | * @len: Size in bytes of buf. | |
1041 | * @block_id: Identifies the config block which is being written. | |
1042 | * | |
1043 | * Return: 0 on success, -errno on failure | |
1044 | */ | |
a459d9e1 WY |
1045 | static int hv_write_config_block(struct pci_dev *pdev, void *buf, |
1046 | unsigned int len, unsigned int block_id) | |
e5d2f910 DC |
1047 | { |
1048 | struct hv_pcibus_device *hbus = | |
1049 | container_of(pdev->bus->sysdata, struct hv_pcibus_device, | |
1050 | sysdata); | |
1051 | struct { | |
1052 | struct pci_packet pkt; | |
1053 | char buf[sizeof(struct pci_write_block)]; | |
1054 | u32 reserved; | |
1055 | } pkt; | |
1056 | struct hv_pci_compl comp_pkt; | |
1057 | struct pci_write_block *write_blk; | |
1058 | u32 pkt_size; | |
1059 | int ret; | |
1060 | ||
1061 | if (len == 0 || len > HV_CONFIG_BLOCK_SIZE_MAX) | |
1062 | return -EINVAL; | |
1063 | ||
1064 | init_completion(&comp_pkt.host_event); | |
1065 | ||
1066 | memset(&pkt, 0, sizeof(pkt)); | |
1067 | pkt.pkt.completion_func = hv_pci_write_config_compl; | |
1068 | pkt.pkt.compl_ctxt = &comp_pkt; | |
1069 | write_blk = (struct pci_write_block *)&pkt.pkt.message; | |
1070 | write_blk->message_type.type = PCI_WRITE_BLOCK; | |
1071 | write_blk->wslot.slot = devfn_to_wslot(pdev->devfn); | |
1072 | write_blk->block_id = block_id; | |
1073 | write_blk->byte_count = len; | |
1074 | memcpy(write_blk->bytes, buf, len); | |
1075 | pkt_size = offsetof(struct pci_write_block, bytes) + len; | |
1076 | /* | |
1077 | * This quirk is required on some hosts shipped around 2018, because | |
1078 | * these hosts don't check the pkt_size correctly (new hosts have been | |
1079 | * fixed since early 2019). The quirk is also safe on very old hosts | |
1080 | * and new hosts, because, on them, what really matters is the length | |
1081 | * specified in write_blk->byte_count. | |
1082 | */ | |
1083 | pkt_size += sizeof(pkt.reserved); | |
1084 | ||
1085 | ret = vmbus_sendpacket(hbus->hdev->channel, write_blk, pkt_size, | |
1086 | (unsigned long)&pkt.pkt, VM_PKT_DATA_INBAND, | |
1087 | VMBUS_DATA_PACKET_FLAG_COMPLETION_REQUESTED); | |
1088 | if (ret) | |
1089 | return ret; | |
1090 | ||
1091 | ret = wait_for_response(hbus->hdev, &comp_pkt.host_event); | |
1092 | if (ret) | |
1093 | return ret; | |
1094 | ||
1095 | if (comp_pkt.completion_status != 0) { | |
1096 | dev_err(&hbus->hdev->device, | |
1097 | "Write Config Block failed: 0x%x\n", | |
1098 | comp_pkt.completion_status); | |
1099 | return -EIO; | |
1100 | } | |
1101 | ||
1102 | return 0; | |
1103 | } | |
e5d2f910 DC |
1104 | |
1105 | /** | |
1106 | * hv_register_block_invalidate() - Invoked when a config block invalidation | |
1107 | * arrives from the back-end driver. | |
1108 | * @pdev: The PCI driver's representation for this device. | |
1109 | * @context: Identifies the device. | |
1110 | * @block_invalidate: Identifies all of the blocks being invalidated. | |
1111 | * | |
1112 | * Return: 0 on success, -errno on failure | |
1113 | */ | |
a459d9e1 WY |
1114 | static int hv_register_block_invalidate(struct pci_dev *pdev, void *context, |
1115 | void (*block_invalidate)(void *context, | |
1116 | u64 block_mask)) | |
e5d2f910 DC |
1117 | { |
1118 | struct hv_pcibus_device *hbus = | |
1119 | container_of(pdev->bus->sysdata, struct hv_pcibus_device, | |
1120 | sysdata); | |
1121 | struct hv_pci_dev *hpdev; | |
1122 | ||
1123 | hpdev = get_pcichild_wslot(hbus, devfn_to_wslot(pdev->devfn)); | |
1124 | if (!hpdev) | |
1125 | return -ENODEV; | |
1126 | ||
1127 | hpdev->block_invalidate = block_invalidate; | |
1128 | hpdev->invalidate_context = context; | |
1129 | ||
1130 | put_pcichild(hpdev); | |
1131 | return 0; | |
1132 | ||
1133 | } | |
e5d2f910 | 1134 | |
4daace0d JO |
1135 | /* Interrupt management hooks */ |
1136 | static void hv_int_desc_free(struct hv_pci_dev *hpdev, | |
1137 | struct tran_int_desc *int_desc) | |
1138 | { | |
1139 | struct pci_delete_interrupt *int_pkt; | |
1140 | struct { | |
1141 | struct pci_packet pkt; | |
0c6045d8 | 1142 | u8 buffer[sizeof(struct pci_delete_interrupt)]; |
4daace0d JO |
1143 | } ctxt; |
1144 | ||
1145 | memset(&ctxt, 0, sizeof(ctxt)); | |
1146 | int_pkt = (struct pci_delete_interrupt *)&ctxt.pkt.message; | |
0c6045d8 | 1147 | int_pkt->message_type.type = |
4daace0d JO |
1148 | PCI_DELETE_INTERRUPT_MESSAGE; |
1149 | int_pkt->wslot.slot = hpdev->desc.win_slot.slot; | |
1150 | int_pkt->int_desc = *int_desc; | |
1151 | vmbus_sendpacket(hpdev->hbus->hdev->channel, int_pkt, sizeof(*int_pkt), | |
1152 | (unsigned long)&ctxt.pkt, VM_PKT_DATA_INBAND, 0); | |
1153 | kfree(int_desc); | |
1154 | } | |
1155 | ||
1156 | /** | |
1157 | * hv_msi_free() - Free the MSI. | |
1158 | * @domain: The interrupt domain pointer | |
1159 | * @info: Extra MSI-related context | |
1160 | * @irq: Identifies the IRQ. | |
1161 | * | |
1162 | * The Hyper-V parent partition and hypervisor are tracking the | |
1163 | * messages that are in use, keeping the interrupt redirection | |
1164 | * table up to date. This callback sends a message that frees | |
1165 | * the IRT entry and related tracking nonsense. | |
1166 | */ | |
1167 | static void hv_msi_free(struct irq_domain *domain, struct msi_domain_info *info, | |
1168 | unsigned int irq) | |
1169 | { | |
1170 | struct hv_pcibus_device *hbus; | |
1171 | struct hv_pci_dev *hpdev; | |
1172 | struct pci_dev *pdev; | |
1173 | struct tran_int_desc *int_desc; | |
1174 | struct irq_data *irq_data = irq_domain_get_irq_data(domain, irq); | |
1175 | struct msi_desc *msi = irq_data_get_msi_desc(irq_data); | |
1176 | ||
1177 | pdev = msi_desc_to_pci_dev(msi); | |
1178 | hbus = info->data; | |
0c6e617f CA |
1179 | int_desc = irq_data_get_irq_chip_data(irq_data); |
1180 | if (!int_desc) | |
4daace0d JO |
1181 | return; |
1182 | ||
0c6e617f CA |
1183 | irq_data->chip_data = NULL; |
1184 | hpdev = get_pcichild_wslot(hbus, devfn_to_wslot(pdev->devfn)); | |
1185 | if (!hpdev) { | |
1186 | kfree(int_desc); | |
1187 | return; | |
4daace0d JO |
1188 | } |
1189 | ||
0c6e617f | 1190 | hv_int_desc_free(hpdev, int_desc); |
8c99e120 | 1191 | put_pcichild(hpdev); |
4daace0d JO |
1192 | } |
1193 | ||
1194 | static int hv_set_affinity(struct irq_data *data, const struct cpumask *dest, | |
1195 | bool force) | |
1196 | { | |
1197 | struct irq_data *parent = data->parent_data; | |
1198 | ||
1199 | return parent->chip->irq_set_affinity(parent, dest, force); | |
1200 | } | |
1201 | ||
542ccf45 | 1202 | static void hv_irq_mask(struct irq_data *data) |
4daace0d JO |
1203 | { |
1204 | pci_msi_mask_irq(data); | |
1205 | } | |
1206 | ||
1207 | /** | |
1208 | * hv_irq_unmask() - "Unmask" the IRQ by setting its current | |
1209 | * affinity. | |
1210 | * @data: Describes the IRQ | |
1211 | * | |
1212 | * Build new a destination for the MSI and make a hypercall to | |
1213 | * update the Interrupt Redirection Table. "Device Logical ID" | |
1214 | * is built out of this PCI bus's instance GUID and the function | |
1215 | * number of the device. | |
1216 | */ | |
542ccf45 | 1217 | static void hv_irq_unmask(struct irq_data *data) |
4daace0d JO |
1218 | { |
1219 | struct msi_desc *msi_desc = irq_data_get_msi_desc(data); | |
1220 | struct irq_cfg *cfg = irqd_cfg(data); | |
61bfd920 | 1221 | struct hv_retarget_device_interrupt *params; |
4daace0d JO |
1222 | struct hv_pcibus_device *hbus; |
1223 | struct cpumask *dest; | |
c8ccf759 | 1224 | cpumask_var_t tmp; |
4daace0d JO |
1225 | struct pci_bus *pbus; |
1226 | struct pci_dev *pdev; | |
0de8ce3e | 1227 | unsigned long flags; |
7dcf90e9 | 1228 | u32 var_size = 0; |
c8ccf759 | 1229 | int cpu, nr_bank; |
7dcf90e9 | 1230 | u64 res; |
4daace0d | 1231 | |
79aa801e | 1232 | dest = irq_data_get_effective_affinity_mask(data); |
4daace0d JO |
1233 | pdev = msi_desc_to_pci_dev(msi_desc); |
1234 | pbus = pdev->bus; | |
1235 | hbus = container_of(pbus->sysdata, struct hv_pcibus_device, sysdata); | |
1236 | ||
0de8ce3e LL |
1237 | spin_lock_irqsave(&hbus->retarget_msi_interrupt_lock, flags); |
1238 | ||
1239 | params = &hbus->retarget_msi_interrupt_params; | |
1240 | memset(params, 0, sizeof(*params)); | |
1241 | params->partition_id = HV_PARTITION_ID_SELF; | |
b59fb7b6 | 1242 | params->int_entry.source = HV_INTERRUPT_SOURCE_MSI; |
1cf106d9 | 1243 | hv_set_msi_entry_from_desc(¶ms->int_entry.msi_entry, msi_desc); |
0de8ce3e | 1244 | params->device_id = (hbus->hdev->dev_instance.b[5] << 24) | |
4daace0d JO |
1245 | (hbus->hdev->dev_instance.b[4] << 16) | |
1246 | (hbus->hdev->dev_instance.b[7] << 8) | | |
1247 | (hbus->hdev->dev_instance.b[6] & 0xf8) | | |
1248 | PCI_FUNC(pdev->devfn); | |
7dcf90e9 JL |
1249 | params->int_target.vector = cfg->vector; |
1250 | ||
1251 | /* | |
72161299 | 1252 | * Honoring apic->delivery_mode set to APIC_DELIVERY_MODE_FIXED by |
7dcf90e9 JL |
1253 | * setting the HV_DEVICE_INTERRUPT_TARGET_MULTICAST flag results in a |
1254 | * spurious interrupt storm. Not doing so does not seem to have a | |
1255 | * negative effect (yet?). | |
1256 | */ | |
1257 | ||
14ef39fd | 1258 | if (hbus->protocol_version >= PCI_PROTOCOL_VERSION_1_2) { |
7dcf90e9 JL |
1259 | /* |
1260 | * PCI_PROTOCOL_VERSION_1_2 supports the VP_SET version of the | |
1261 | * HVCALL_RETARGET_INTERRUPT hypercall, which also coincides | |
1262 | * with >64 VP support. | |
1263 | * ms_hyperv.hints & HV_X64_EX_PROCESSOR_MASKS_RECOMMENDED | |
1264 | * is not sufficient for this hypercall. | |
1265 | */ | |
1266 | params->int_target.flags |= | |
1267 | HV_DEVICE_INTERRUPT_TARGET_PROCESSOR_SET; | |
c8ccf759 MN |
1268 | |
1269 | if (!alloc_cpumask_var(&tmp, GFP_ATOMIC)) { | |
1270 | res = 1; | |
1271 | goto exit_unlock; | |
1272 | } | |
1273 | ||
1274 | cpumask_and(tmp, dest, cpu_online_mask); | |
1275 | nr_bank = cpumask_to_vpset(¶ms->int_target.vp_set, tmp); | |
1276 | free_cpumask_var(tmp); | |
1277 | ||
1278 | if (nr_bank <= 0) { | |
1279 | res = 1; | |
1280 | goto exit_unlock; | |
1281 | } | |
7dcf90e9 JL |
1282 | |
1283 | /* | |
1284 | * var-sized hypercall, var-size starts after vp_mask (thus | |
9bc11742 MN |
1285 | * vp_set.format does not count, but vp_set.valid_bank_mask |
1286 | * does). | |
7dcf90e9 | 1287 | */ |
c8ccf759 | 1288 | var_size = 1 + nr_bank; |
7dcf90e9 JL |
1289 | } else { |
1290 | for_each_cpu_and(cpu, dest, cpu_online_mask) { | |
1291 | params->int_target.vp_mask |= | |
7415aea6 | 1292 | (1ULL << hv_cpu_number_to_vp_number(cpu)); |
7dcf90e9 JL |
1293 | } |
1294 | } | |
0de8ce3e | 1295 | |
7dcf90e9 JL |
1296 | res = hv_do_hypercall(HVCALL_RETARGET_INTERRUPT | (var_size << 17), |
1297 | params, NULL); | |
4daace0d | 1298 | |
7dcf90e9 | 1299 | exit_unlock: |
0de8ce3e | 1300 | spin_unlock_irqrestore(&hbus->retarget_msi_interrupt_lock, flags); |
4daace0d | 1301 | |
915cff7f DC |
1302 | /* |
1303 | * During hibernation, when a CPU is offlined, the kernel tries | |
1304 | * to move the interrupt to the remaining CPUs that haven't | |
1305 | * been offlined yet. In this case, the below hv_do_hypercall() | |
1306 | * always fails since the vmbus channel has been closed: | |
1307 | * refer to cpu_disable_common() -> fixup_irqs() -> | |
1308 | * irq_migrate_all_off_this_cpu() -> migrate_one_irq(). | |
1309 | * | |
1310 | * Suppress the error message for hibernation because the failure | |
1311 | * during hibernation does not matter (at this time all the devices | |
1312 | * have been frozen). Note: the correct affinity info is still updated | |
1313 | * into the irqdata data structure in migrate_one_irq() -> | |
1314 | * irq_do_set_affinity() -> hv_set_affinity(), so later when the VM | |
1315 | * resumes, hv_pci_restore_msi_state() is able to correctly restore | |
1316 | * the interrupt with the correct affinity. | |
1317 | */ | |
753ed9c9 | 1318 | if (!hv_result_success(res) && hbus->state != hv_pcibus_removing) |
7dcf90e9 JL |
1319 | dev_err(&hbus->hdev->device, |
1320 | "%s() failed: %#llx", __func__, res); | |
7dcf90e9 | 1321 | |
4daace0d JO |
1322 | pci_msi_unmask_irq(data); |
1323 | } | |
1324 | ||
1325 | struct compose_comp_ctxt { | |
1326 | struct hv_pci_compl comp_pkt; | |
1327 | struct tran_int_desc int_desc; | |
1328 | }; | |
1329 | ||
1330 | static void hv_pci_compose_compl(void *context, struct pci_response *resp, | |
1331 | int resp_packet_size) | |
1332 | { | |
1333 | struct compose_comp_ctxt *comp_pkt = context; | |
1334 | struct pci_create_int_response *int_resp = | |
1335 | (struct pci_create_int_response *)resp; | |
1336 | ||
1337 | comp_pkt->comp_pkt.completion_status = resp->status; | |
1338 | comp_pkt->int_desc = int_resp->int_desc; | |
1339 | complete(&comp_pkt->comp_pkt.host_event); | |
1340 | } | |
1341 | ||
7dcf90e9 JL |
1342 | static u32 hv_compose_msi_req_v1( |
1343 | struct pci_create_interrupt *int_pkt, struct cpumask *affinity, | |
1344 | u32 slot, u8 vector) | |
1345 | { | |
1346 | int_pkt->message_type.type = PCI_CREATE_INTERRUPT_MESSAGE; | |
1347 | int_pkt->wslot.slot = slot; | |
1348 | int_pkt->int_desc.vector = vector; | |
1349 | int_pkt->int_desc.vector_count = 1; | |
72161299 | 1350 | int_pkt->int_desc.delivery_mode = APIC_DELIVERY_MODE_FIXED; |
7dcf90e9 JL |
1351 | |
1352 | /* | |
1353 | * Create MSI w/ dummy vCPU set, overwritten by subsequent retarget in | |
1354 | * hv_irq_unmask(). | |
1355 | */ | |
1356 | int_pkt->int_desc.cpu_mask = CPU_AFFINITY_ALL; | |
1357 | ||
1358 | return sizeof(*int_pkt); | |
1359 | } | |
1360 | ||
8f6a6b3c SM |
1361 | /* |
1362 | * Create MSI w/ dummy vCPU set targeting just one vCPU, overwritten | |
1363 | * by subsequent retarget in hv_irq_unmask(). | |
1364 | */ | |
1365 | static int hv_compose_msi_req_get_cpu(struct cpumask *affinity) | |
1366 | { | |
1367 | return cpumask_first_and(affinity, cpu_online_mask); | |
1368 | } | |
1369 | ||
7dcf90e9 JL |
1370 | static u32 hv_compose_msi_req_v2( |
1371 | struct pci_create_interrupt2 *int_pkt, struct cpumask *affinity, | |
1372 | u32 slot, u8 vector) | |
1373 | { | |
1374 | int cpu; | |
1375 | ||
1376 | int_pkt->message_type.type = PCI_CREATE_INTERRUPT_MESSAGE2; | |
1377 | int_pkt->wslot.slot = slot; | |
1378 | int_pkt->int_desc.vector = vector; | |
1379 | int_pkt->int_desc.vector_count = 1; | |
72161299 | 1380 | int_pkt->int_desc.delivery_mode = APIC_DELIVERY_MODE_FIXED; |
8f6a6b3c SM |
1381 | cpu = hv_compose_msi_req_get_cpu(affinity); |
1382 | int_pkt->int_desc.processor_array[0] = | |
1383 | hv_cpu_number_to_vp_number(cpu); | |
1384 | int_pkt->int_desc.processor_count = 1; | |
7dcf90e9 | 1385 | |
8f6a6b3c SM |
1386 | return sizeof(*int_pkt); |
1387 | } | |
1388 | ||
1389 | static u32 hv_compose_msi_req_v3( | |
1390 | struct pci_create_interrupt3 *int_pkt, struct cpumask *affinity, | |
1391 | u32 slot, u32 vector) | |
1392 | { | |
1393 | int cpu; | |
1394 | ||
1395 | int_pkt->message_type.type = PCI_CREATE_INTERRUPT_MESSAGE3; | |
1396 | int_pkt->wslot.slot = slot; | |
1397 | int_pkt->int_desc.vector = vector; | |
1398 | int_pkt->int_desc.reserved = 0; | |
1399 | int_pkt->int_desc.vector_count = 1; | |
1400 | int_pkt->int_desc.delivery_mode = APIC_DELIVERY_MODE_FIXED; | |
1401 | cpu = hv_compose_msi_req_get_cpu(affinity); | |
7dcf90e9 | 1402 | int_pkt->int_desc.processor_array[0] = |
7415aea6 | 1403 | hv_cpu_number_to_vp_number(cpu); |
7dcf90e9 JL |
1404 | int_pkt->int_desc.processor_count = 1; |
1405 | ||
1406 | return sizeof(*int_pkt); | |
1407 | } | |
1408 | ||
4daace0d JO |
1409 | /** |
1410 | * hv_compose_msi_msg() - Supplies a valid MSI address/data | |
1411 | * @data: Everything about this MSI | |
1412 | * @msg: Buffer that is filled in by this function | |
1413 | * | |
1414 | * This function unpacks the IRQ looking for target CPU set, IDT | |
1415 | * vector and mode and sends a message to the parent partition | |
1416 | * asking for a mapping for that tuple in this partition. The | |
1417 | * response supplies a data value and address to which that data | |
1418 | * should be written to trigger that interrupt. | |
1419 | */ | |
1420 | static void hv_compose_msi_msg(struct irq_data *data, struct msi_msg *msg) | |
1421 | { | |
1422 | struct irq_cfg *cfg = irqd_cfg(data); | |
1423 | struct hv_pcibus_device *hbus; | |
240ad77c | 1424 | struct vmbus_channel *channel; |
4daace0d JO |
1425 | struct hv_pci_dev *hpdev; |
1426 | struct pci_bus *pbus; | |
1427 | struct pci_dev *pdev; | |
79aa801e | 1428 | struct cpumask *dest; |
4daace0d JO |
1429 | struct compose_comp_ctxt comp; |
1430 | struct tran_int_desc *int_desc; | |
4daace0d | 1431 | struct { |
7dcf90e9 JL |
1432 | struct pci_packet pci_pkt; |
1433 | union { | |
1434 | struct pci_create_interrupt v1; | |
1435 | struct pci_create_interrupt2 v2; | |
8f6a6b3c | 1436 | struct pci_create_interrupt3 v3; |
7dcf90e9 JL |
1437 | } int_pkts; |
1438 | } __packed ctxt; | |
1439 | ||
1440 | u32 size; | |
4daace0d JO |
1441 | int ret; |
1442 | ||
1443 | pdev = msi_desc_to_pci_dev(irq_data_get_msi_desc(data)); | |
79aa801e | 1444 | dest = irq_data_get_effective_affinity_mask(data); |
4daace0d JO |
1445 | pbus = pdev->bus; |
1446 | hbus = container_of(pbus->sysdata, struct hv_pcibus_device, sysdata); | |
240ad77c | 1447 | channel = hbus->hdev->channel; |
4daace0d JO |
1448 | hpdev = get_pcichild_wslot(hbus, devfn_to_wslot(pdev->devfn)); |
1449 | if (!hpdev) | |
1450 | goto return_null_message; | |
1451 | ||
1452 | /* Free any previous message that might have already been composed. */ | |
1453 | if (data->chip_data) { | |
1454 | int_desc = data->chip_data; | |
1455 | data->chip_data = NULL; | |
1456 | hv_int_desc_free(hpdev, int_desc); | |
1457 | } | |
1458 | ||
59c58cee | 1459 | int_desc = kzalloc(sizeof(*int_desc), GFP_ATOMIC); |
4daace0d JO |
1460 | if (!int_desc) |
1461 | goto drop_reference; | |
1462 | ||
1463 | memset(&ctxt, 0, sizeof(ctxt)); | |
1464 | init_completion(&comp.comp_pkt.host_event); | |
7dcf90e9 JL |
1465 | ctxt.pci_pkt.completion_func = hv_pci_compose_compl; |
1466 | ctxt.pci_pkt.compl_ctxt = ∁ | |
1467 | ||
14ef39fd | 1468 | switch (hbus->protocol_version) { |
7dcf90e9 JL |
1469 | case PCI_PROTOCOL_VERSION_1_1: |
1470 | size = hv_compose_msi_req_v1(&ctxt.int_pkts.v1, | |
79aa801e | 1471 | dest, |
7dcf90e9 JL |
1472 | hpdev->desc.win_slot.slot, |
1473 | cfg->vector); | |
1474 | break; | |
4daace0d | 1475 | |
7dcf90e9 | 1476 | case PCI_PROTOCOL_VERSION_1_2: |
999dd956 | 1477 | case PCI_PROTOCOL_VERSION_1_3: |
7dcf90e9 | 1478 | size = hv_compose_msi_req_v2(&ctxt.int_pkts.v2, |
79aa801e | 1479 | dest, |
7dcf90e9 JL |
1480 | hpdev->desc.win_slot.slot, |
1481 | cfg->vector); | |
1482 | break; | |
1483 | ||
8f6a6b3c SM |
1484 | case PCI_PROTOCOL_VERSION_1_4: |
1485 | size = hv_compose_msi_req_v3(&ctxt.int_pkts.v3, | |
1486 | dest, | |
1487 | hpdev->desc.win_slot.slot, | |
1488 | cfg->vector); | |
1489 | break; | |
1490 | ||
7dcf90e9 JL |
1491 | default: |
1492 | /* As we only negotiate protocol versions known to this driver, | |
1493 | * this path should never hit. However, this is it not a hot | |
1494 | * path so we print a message to aid future updates. | |
1495 | */ | |
1496 | dev_err(&hbus->hdev->device, | |
1497 | "Unexpected vPCI protocol, update driver."); | |
1498 | goto free_int_desc; | |
4daace0d JO |
1499 | } |
1500 | ||
7dcf90e9 JL |
1501 | ret = vmbus_sendpacket(hpdev->hbus->hdev->channel, &ctxt.int_pkts, |
1502 | size, (unsigned long)&ctxt.pci_pkt, | |
4daace0d JO |
1503 | VM_PKT_DATA_INBAND, |
1504 | VMBUS_DATA_PACKET_FLAG_COMPLETION_REQUESTED); | |
7dcf90e9 JL |
1505 | if (ret) { |
1506 | dev_err(&hbus->hdev->device, | |
1507 | "Sending request for interrupt failed: 0x%x", | |
1508 | comp.comp_pkt.completion_status); | |
665e2245 | 1509 | goto free_int_desc; |
7dcf90e9 | 1510 | } |
665e2245 | 1511 | |
240ad77c APM |
1512 | /* |
1513 | * Prevents hv_pci_onchannelcallback() from running concurrently | |
1514 | * in the tasklet. | |
1515 | */ | |
be4017ce | 1516 | tasklet_disable_in_atomic(&channel->callback_event); |
240ad77c | 1517 | |
80bfeeb9 SH |
1518 | /* |
1519 | * Since this function is called with IRQ locks held, can't | |
1520 | * do normal wait for completion; instead poll. | |
1521 | */ | |
de0aa7b2 | 1522 | while (!try_wait_for_completion(&comp.comp_pkt.host_event)) { |
240ad77c APM |
1523 | unsigned long flags; |
1524 | ||
de0aa7b2 DC |
1525 | /* 0xFFFF means an invalid PCI VENDOR ID. */ |
1526 | if (hv_pcifront_get_vendor_id(hpdev) == 0xFFFF) { | |
1527 | dev_err_once(&hbus->hdev->device, | |
1528 | "the device has gone\n"); | |
240ad77c | 1529 | goto enable_tasklet; |
de0aa7b2 DC |
1530 | } |
1531 | ||
1532 | /* | |
240ad77c APM |
1533 | * Make sure that the ring buffer data structure doesn't get |
1534 | * freed while we dereference the ring buffer pointer. Test | |
1535 | * for the channel's onchannel_callback being NULL within a | |
1536 | * sched_lock critical section. See also the inline comments | |
1537 | * in vmbus_reset_channel_cb(). | |
de0aa7b2 | 1538 | */ |
240ad77c APM |
1539 | spin_lock_irqsave(&channel->sched_lock, flags); |
1540 | if (unlikely(channel->onchannel_callback == NULL)) { | |
1541 | spin_unlock_irqrestore(&channel->sched_lock, flags); | |
1542 | goto enable_tasklet; | |
1543 | } | |
1544 | hv_pci_onchannelcallback(hbus); | |
1545 | spin_unlock_irqrestore(&channel->sched_lock, flags); | |
de0aa7b2 DC |
1546 | |
1547 | if (hpdev->state == hv_pcichild_ejecting) { | |
1548 | dev_err_once(&hbus->hdev->device, | |
1549 | "the device is being ejected\n"); | |
240ad77c | 1550 | goto enable_tasklet; |
de0aa7b2 DC |
1551 | } |
1552 | ||
80bfeeb9 | 1553 | udelay(100); |
de0aa7b2 | 1554 | } |
4daace0d | 1555 | |
240ad77c APM |
1556 | tasklet_enable(&channel->callback_event); |
1557 | ||
4daace0d JO |
1558 | if (comp.comp_pkt.completion_status < 0) { |
1559 | dev_err(&hbus->hdev->device, | |
1560 | "Request for interrupt failed: 0x%x", | |
1561 | comp.comp_pkt.completion_status); | |
1562 | goto free_int_desc; | |
1563 | } | |
1564 | ||
1565 | /* | |
1566 | * Record the assignment so that this can be unwound later. Using | |
1567 | * irq_set_chip_data() here would be appropriate, but the lock it takes | |
1568 | * is already held. | |
1569 | */ | |
1570 | *int_desc = comp.int_desc; | |
1571 | data->chip_data = int_desc; | |
1572 | ||
1573 | /* Pass up the result. */ | |
1574 | msg->address_hi = comp.int_desc.address >> 32; | |
1575 | msg->address_lo = comp.int_desc.address & 0xffffffff; | |
1576 | msg->data = comp.int_desc.data; | |
1577 | ||
8c99e120 | 1578 | put_pcichild(hpdev); |
4daace0d JO |
1579 | return; |
1580 | ||
240ad77c APM |
1581 | enable_tasklet: |
1582 | tasklet_enable(&channel->callback_event); | |
4daace0d JO |
1583 | free_int_desc: |
1584 | kfree(int_desc); | |
1585 | drop_reference: | |
8c99e120 | 1586 | put_pcichild(hpdev); |
4daace0d JO |
1587 | return_null_message: |
1588 | msg->address_hi = 0; | |
1589 | msg->address_lo = 0; | |
1590 | msg->data = 0; | |
1591 | } | |
1592 | ||
1593 | /* HW Interrupt Chip Descriptor */ | |
1594 | static struct irq_chip hv_msi_irq_chip = { | |
1595 | .name = "Hyper-V PCIe MSI", | |
1596 | .irq_compose_msi_msg = hv_compose_msi_msg, | |
1597 | .irq_set_affinity = hv_set_affinity, | |
1598 | .irq_ack = irq_chip_ack_parent, | |
1599 | .irq_mask = hv_irq_mask, | |
1600 | .irq_unmask = hv_irq_unmask, | |
1601 | }; | |
1602 | ||
4daace0d | 1603 | static struct msi_domain_ops hv_msi_ops = { |
4daace0d | 1604 | .msi_prepare = pci_msi_prepare, |
4daace0d JO |
1605 | .msi_free = hv_msi_free, |
1606 | }; | |
1607 | ||
1608 | /** | |
1609 | * hv_pcie_init_irq_domain() - Initialize IRQ domain | |
1610 | * @hbus: The root PCI bus | |
1611 | * | |
1612 | * This function creates an IRQ domain which will be used for | |
1613 | * interrupts from devices that have been passed through. These | |
1614 | * devices only support MSI and MSI-X, not line-based interrupts | |
1615 | * or simulations of line-based interrupts through PCIe's | |
1616 | * fabric-layer messages. Because interrupts are remapped, we | |
1617 | * can support multi-message MSI here. | |
1618 | * | |
1619 | * Return: '0' on success and error value on failure | |
1620 | */ | |
1621 | static int hv_pcie_init_irq_domain(struct hv_pcibus_device *hbus) | |
1622 | { | |
1623 | hbus->msi_info.chip = &hv_msi_irq_chip; | |
1624 | hbus->msi_info.ops = &hv_msi_ops; | |
1625 | hbus->msi_info.flags = (MSI_FLAG_USE_DEF_DOM_OPS | | |
1626 | MSI_FLAG_USE_DEF_CHIP_OPS | MSI_FLAG_MULTI_PCI_MSI | | |
1627 | MSI_FLAG_PCI_MSIX); | |
1628 | hbus->msi_info.handler = handle_edge_irq; | |
1629 | hbus->msi_info.handler_name = "edge"; | |
1630 | hbus->msi_info.data = hbus; | |
9e7f9178 | 1631 | hbus->irq_domain = pci_msi_create_irq_domain(hbus->fwnode, |
4daace0d JO |
1632 | &hbus->msi_info, |
1633 | x86_vector_domain); | |
1634 | if (!hbus->irq_domain) { | |
1635 | dev_err(&hbus->hdev->device, | |
1636 | "Failed to build an MSI IRQ domain\n"); | |
1637 | return -ENODEV; | |
1638 | } | |
1639 | ||
9e7f9178 BF |
1640 | dev_set_msi_domain(&hbus->bridge->dev, hbus->irq_domain); |
1641 | ||
4daace0d JO |
1642 | return 0; |
1643 | } | |
1644 | ||
1645 | /** | |
1646 | * get_bar_size() - Get the address space consumed by a BAR | |
1647 | * @bar_val: Value that a BAR returned after -1 was written | |
1648 | * to it. | |
1649 | * | |
1650 | * This function returns the size of the BAR, rounded up to 1 | |
1651 | * page. It has to be rounded up because the hypervisor's page | |
1652 | * table entry that maps the BAR into the VM can't specify an | |
1653 | * offset within a page. The invariant is that the hypervisor | |
1654 | * must place any BARs of smaller than page length at the | |
1655 | * beginning of a page. | |
1656 | * | |
1657 | * Return: Size in bytes of the consumed MMIO space. | |
1658 | */ | |
1659 | static u64 get_bar_size(u64 bar_val) | |
1660 | { | |
1661 | return round_up((1 + ~(bar_val & PCI_BASE_ADDRESS_MEM_MASK)), | |
1662 | PAGE_SIZE); | |
1663 | } | |
1664 | ||
1665 | /** | |
1666 | * survey_child_resources() - Total all MMIO requirements | |
1667 | * @hbus: Root PCI bus, as understood by this driver | |
1668 | */ | |
1669 | static void survey_child_resources(struct hv_pcibus_device *hbus) | |
1670 | { | |
4daace0d JO |
1671 | struct hv_pci_dev *hpdev; |
1672 | resource_size_t bar_size = 0; | |
1673 | unsigned long flags; | |
1674 | struct completion *event; | |
1675 | u64 bar_val; | |
1676 | int i; | |
1677 | ||
1678 | /* If nobody is waiting on the answer, don't compute it. */ | |
1679 | event = xchg(&hbus->survey_event, NULL); | |
1680 | if (!event) | |
1681 | return; | |
1682 | ||
1683 | /* If the answer has already been computed, go with it. */ | |
1684 | if (hbus->low_mmio_space || hbus->high_mmio_space) { | |
1685 | complete(event); | |
1686 | return; | |
1687 | } | |
1688 | ||
1689 | spin_lock_irqsave(&hbus->device_list_lock, flags); | |
1690 | ||
1691 | /* | |
1692 | * Due to an interesting quirk of the PCI spec, all memory regions | |
1693 | * for a child device are a power of 2 in size and aligned in memory, | |
1694 | * so it's sufficient to just add them up without tracking alignment. | |
1695 | */ | |
5b8db8f6 | 1696 | list_for_each_entry(hpdev, &hbus->children, list_entry) { |
c9c13ba4 | 1697 | for (i = 0; i < PCI_STD_NUM_BARS; i++) { |
4daace0d JO |
1698 | if (hpdev->probed_bar[i] & PCI_BASE_ADDRESS_SPACE_IO) |
1699 | dev_err(&hbus->hdev->device, | |
1700 | "There's an I/O BAR in this list!\n"); | |
1701 | ||
1702 | if (hpdev->probed_bar[i] != 0) { | |
1703 | /* | |
1704 | * A probed BAR has all the upper bits set that | |
1705 | * can be changed. | |
1706 | */ | |
1707 | ||
1708 | bar_val = hpdev->probed_bar[i]; | |
1709 | if (bar_val & PCI_BASE_ADDRESS_MEM_TYPE_64) | |
1710 | bar_val |= | |
1711 | ((u64)hpdev->probed_bar[++i] << 32); | |
1712 | else | |
1713 | bar_val |= 0xffffffff00000000ULL; | |
1714 | ||
1715 | bar_size = get_bar_size(bar_val); | |
1716 | ||
1717 | if (bar_val & PCI_BASE_ADDRESS_MEM_TYPE_64) | |
1718 | hbus->high_mmio_space += bar_size; | |
1719 | else | |
1720 | hbus->low_mmio_space += bar_size; | |
1721 | } | |
1722 | } | |
1723 | } | |
1724 | ||
1725 | spin_unlock_irqrestore(&hbus->device_list_lock, flags); | |
1726 | complete(event); | |
1727 | } | |
1728 | ||
1729 | /** | |
1730 | * prepopulate_bars() - Fill in BARs with defaults | |
1731 | * @hbus: Root PCI bus, as understood by this driver | |
1732 | * | |
1733 | * The core PCI driver code seems much, much happier if the BARs | |
1734 | * for a device have values upon first scan. So fill them in. | |
1735 | * The algorithm below works down from large sizes to small, | |
1736 | * attempting to pack the assignments optimally. The assumption, | |
1737 | * enforced in other parts of the code, is that the beginning of | |
1738 | * the memory-mapped I/O space will be aligned on the largest | |
1739 | * BAR size. | |
1740 | */ | |
1741 | static void prepopulate_bars(struct hv_pcibus_device *hbus) | |
1742 | { | |
1743 | resource_size_t high_size = 0; | |
1744 | resource_size_t low_size = 0; | |
1745 | resource_size_t high_base = 0; | |
1746 | resource_size_t low_base = 0; | |
1747 | resource_size_t bar_size; | |
1748 | struct hv_pci_dev *hpdev; | |
4daace0d JO |
1749 | unsigned long flags; |
1750 | u64 bar_val; | |
1751 | u32 command; | |
1752 | bool high; | |
1753 | int i; | |
1754 | ||
1755 | if (hbus->low_mmio_space) { | |
1756 | low_size = 1ULL << (63 - __builtin_clzll(hbus->low_mmio_space)); | |
1757 | low_base = hbus->low_mmio_res->start; | |
1758 | } | |
1759 | ||
1760 | if (hbus->high_mmio_space) { | |
1761 | high_size = 1ULL << | |
1762 | (63 - __builtin_clzll(hbus->high_mmio_space)); | |
1763 | high_base = hbus->high_mmio_res->start; | |
1764 | } | |
1765 | ||
1766 | spin_lock_irqsave(&hbus->device_list_lock, flags); | |
1767 | ||
ac82fc83 DC |
1768 | /* |
1769 | * Clear the memory enable bit, in case it's already set. This occurs | |
1770 | * in the suspend path of hibernation, where the device is suspended, | |
1771 | * resumed and suspended again: see hibernation_snapshot() and | |
1772 | * hibernation_platform_enter(). | |
1773 | * | |
c77bfb54 | 1774 | * If the memory enable bit is already set, Hyper-V silently ignores |
ac82fc83 DC |
1775 | * the below BAR updates, and the related PCI device driver can not |
1776 | * work, because reading from the device register(s) always returns | |
1777 | * 0xFFFFFFFF. | |
1778 | */ | |
1779 | list_for_each_entry(hpdev, &hbus->children, list_entry) { | |
1780 | _hv_pcifront_read_config(hpdev, PCI_COMMAND, 2, &command); | |
1781 | command &= ~PCI_COMMAND_MEMORY; | |
1782 | _hv_pcifront_write_config(hpdev, PCI_COMMAND, 2, command); | |
1783 | } | |
1784 | ||
4daace0d JO |
1785 | /* Pick addresses for the BARs. */ |
1786 | do { | |
5b8db8f6 | 1787 | list_for_each_entry(hpdev, &hbus->children, list_entry) { |
c9c13ba4 | 1788 | for (i = 0; i < PCI_STD_NUM_BARS; i++) { |
4daace0d JO |
1789 | bar_val = hpdev->probed_bar[i]; |
1790 | if (bar_val == 0) | |
1791 | continue; | |
1792 | high = bar_val & PCI_BASE_ADDRESS_MEM_TYPE_64; | |
1793 | if (high) { | |
1794 | bar_val |= | |
1795 | ((u64)hpdev->probed_bar[i + 1] | |
1796 | << 32); | |
1797 | } else { | |
1798 | bar_val |= 0xffffffffULL << 32; | |
1799 | } | |
1800 | bar_size = get_bar_size(bar_val); | |
1801 | if (high) { | |
1802 | if (high_size != bar_size) { | |
1803 | i++; | |
1804 | continue; | |
1805 | } | |
1806 | _hv_pcifront_write_config(hpdev, | |
1807 | PCI_BASE_ADDRESS_0 + (4 * i), | |
1808 | 4, | |
1809 | (u32)(high_base & 0xffffff00)); | |
1810 | i++; | |
1811 | _hv_pcifront_write_config(hpdev, | |
1812 | PCI_BASE_ADDRESS_0 + (4 * i), | |
1813 | 4, (u32)(high_base >> 32)); | |
1814 | high_base += bar_size; | |
1815 | } else { | |
1816 | if (low_size != bar_size) | |
1817 | continue; | |
1818 | _hv_pcifront_write_config(hpdev, | |
1819 | PCI_BASE_ADDRESS_0 + (4 * i), | |
1820 | 4, | |
1821 | (u32)(low_base & 0xffffff00)); | |
1822 | low_base += bar_size; | |
1823 | } | |
1824 | } | |
1825 | if (high_size <= 1 && low_size <= 1) { | |
1826 | /* Set the memory enable bit. */ | |
1827 | _hv_pcifront_read_config(hpdev, PCI_COMMAND, 2, | |
1828 | &command); | |
1829 | command |= PCI_COMMAND_MEMORY; | |
1830 | _hv_pcifront_write_config(hpdev, PCI_COMMAND, 2, | |
1831 | command); | |
1832 | break; | |
1833 | } | |
1834 | } | |
1835 | ||
1836 | high_size >>= 1; | |
1837 | low_size >>= 1; | |
1838 | } while (high_size || low_size); | |
1839 | ||
1840 | spin_unlock_irqrestore(&hbus->device_list_lock, flags); | |
1841 | } | |
1842 | ||
a15f2c08 SH |
1843 | /* |
1844 | * Assign entries in sysfs pci slot directory. | |
1845 | * | |
1846 | * Note that this function does not need to lock the children list | |
1847 | * because it is called from pci_devices_present_work which | |
1848 | * is serialized with hv_eject_device_work because they are on the | |
1849 | * same ordered workqueue. Therefore hbus->children list will not change | |
1850 | * even when pci_create_slot sleeps. | |
1851 | */ | |
1852 | static void hv_pci_assign_slots(struct hv_pcibus_device *hbus) | |
1853 | { | |
1854 | struct hv_pci_dev *hpdev; | |
1855 | char name[SLOT_NAME_SIZE]; | |
1856 | int slot_nr; | |
1857 | ||
1858 | list_for_each_entry(hpdev, &hbus->children, list_entry) { | |
1859 | if (hpdev->pci_slot) | |
1860 | continue; | |
1861 | ||
1862 | slot_nr = PCI_SLOT(wslot_to_devfn(hpdev->desc.win_slot.slot)); | |
1863 | snprintf(name, SLOT_NAME_SIZE, "%u", hpdev->desc.ser); | |
418cb6c8 | 1864 | hpdev->pci_slot = pci_create_slot(hbus->bridge->bus, slot_nr, |
a15f2c08 | 1865 | name, NULL); |
54be5b8c | 1866 | if (IS_ERR(hpdev->pci_slot)) { |
a15f2c08 | 1867 | pr_warn("pci_create slot %s failed\n", name); |
54be5b8c WY |
1868 | hpdev->pci_slot = NULL; |
1869 | } | |
a15f2c08 SH |
1870 | } |
1871 | } | |
1872 | ||
15becc2b DC |
1873 | /* |
1874 | * Remove entries in sysfs pci slot directory. | |
1875 | */ | |
1876 | static void hv_pci_remove_slots(struct hv_pcibus_device *hbus) | |
1877 | { | |
1878 | struct hv_pci_dev *hpdev; | |
1879 | ||
1880 | list_for_each_entry(hpdev, &hbus->children, list_entry) { | |
1881 | if (!hpdev->pci_slot) | |
1882 | continue; | |
1883 | pci_destroy_slot(hpdev->pci_slot); | |
1884 | hpdev->pci_slot = NULL; | |
1885 | } | |
1886 | } | |
1887 | ||
999dd956 LL |
1888 | /* |
1889 | * Set NUMA node for the devices on the bus | |
1890 | */ | |
1891 | static void hv_pci_assign_numa_node(struct hv_pcibus_device *hbus) | |
1892 | { | |
1893 | struct pci_dev *dev; | |
418cb6c8 | 1894 | struct pci_bus *bus = hbus->bridge->bus; |
999dd956 LL |
1895 | struct hv_pci_dev *hv_dev; |
1896 | ||
1897 | list_for_each_entry(dev, &bus->devices, bus_list) { | |
1898 | hv_dev = get_pcichild_wslot(hbus, devfn_to_wslot(dev->devfn)); | |
1899 | if (!hv_dev) | |
1900 | continue; | |
1901 | ||
692187a0 LL |
1902 | if (hv_dev->desc.flags & HV_PCI_DEVICE_FLAG_NUMA_AFFINITY && |
1903 | hv_dev->desc.virtual_numa_node < num_possible_nodes()) | |
1904 | /* | |
1905 | * The kernel may boot with some NUMA nodes offline | |
1906 | * (e.g. in a KDUMP kernel) or with NUMA disabled via | |
1907 | * "numa=off". In those cases, adjust the host provided | |
1908 | * NUMA node to a valid NUMA node used by the kernel. | |
1909 | */ | |
1910 | set_dev_node(&dev->dev, | |
1911 | numa_map_to_online_node( | |
1912 | hv_dev->desc.virtual_numa_node)); | |
999dd956 LL |
1913 | |
1914 | put_pcichild(hv_dev); | |
1915 | } | |
1916 | } | |
1917 | ||
4daace0d JO |
1918 | /** |
1919 | * create_root_hv_pci_bus() - Expose a new root PCI bus | |
1920 | * @hbus: Root PCI bus, as understood by this driver | |
1921 | * | |
1922 | * Return: 0 on success, -errno on failure | |
1923 | */ | |
1924 | static int create_root_hv_pci_bus(struct hv_pcibus_device *hbus) | |
1925 | { | |
418cb6c8 AB |
1926 | int error; |
1927 | struct pci_host_bridge *bridge = hbus->bridge; | |
1928 | ||
1929 | bridge->dev.parent = &hbus->hdev->device; | |
1930 | bridge->sysdata = &hbus->sysdata; | |
1931 | bridge->ops = &hv_pcifront_ops; | |
1932 | ||
1933 | error = pci_scan_root_bus_bridge(bridge); | |
1934 | if (error) | |
1935 | return error; | |
4daace0d | 1936 | |
414428c5 | 1937 | pci_lock_rescan_remove(); |
999dd956 | 1938 | hv_pci_assign_numa_node(hbus); |
418cb6c8 | 1939 | pci_bus_assign_resources(bridge->bus); |
a15f2c08 | 1940 | hv_pci_assign_slots(hbus); |
418cb6c8 | 1941 | pci_bus_add_devices(bridge->bus); |
414428c5 | 1942 | pci_unlock_rescan_remove(); |
4daace0d JO |
1943 | hbus->state = hv_pcibus_installed; |
1944 | return 0; | |
1945 | } | |
1946 | ||
1947 | struct q_res_req_compl { | |
1948 | struct completion host_event; | |
1949 | struct hv_pci_dev *hpdev; | |
1950 | }; | |
1951 | ||
1952 | /** | |
1953 | * q_resource_requirements() - Query Resource Requirements | |
1954 | * @context: The completion context. | |
1955 | * @resp: The response that came from the host. | |
1956 | * @resp_packet_size: The size in bytes of resp. | |
1957 | * | |
1958 | * This function is invoked on completion of a Query Resource | |
1959 | * Requirements packet. | |
1960 | */ | |
1961 | static void q_resource_requirements(void *context, struct pci_response *resp, | |
1962 | int resp_packet_size) | |
1963 | { | |
1964 | struct q_res_req_compl *completion = context; | |
1965 | struct pci_q_res_req_response *q_res_req = | |
1966 | (struct pci_q_res_req_response *)resp; | |
1967 | int i; | |
1968 | ||
1969 | if (resp->status < 0) { | |
1970 | dev_err(&completion->hpdev->hbus->hdev->device, | |
1971 | "query resource requirements failed: %x\n", | |
1972 | resp->status); | |
1973 | } else { | |
c9c13ba4 | 1974 | for (i = 0; i < PCI_STD_NUM_BARS; i++) { |
4daace0d JO |
1975 | completion->hpdev->probed_bar[i] = |
1976 | q_res_req->probed_bar[i]; | |
1977 | } | |
1978 | } | |
1979 | ||
1980 | complete(&completion->host_event); | |
1981 | } | |
1982 | ||
4daace0d JO |
1983 | /** |
1984 | * new_pcichild_device() - Create a new child device | |
1985 | * @hbus: The internal struct tracking this root PCI bus. | |
1986 | * @desc: The information supplied so far from the host | |
1987 | * about the device. | |
1988 | * | |
1989 | * This function creates the tracking structure for a new child | |
1990 | * device and kicks off the process of figuring out what it is. | |
1991 | * | |
1992 | * Return: Pointer to the new tracking struct | |
1993 | */ | |
1994 | static struct hv_pci_dev *new_pcichild_device(struct hv_pcibus_device *hbus, | |
f9ad0f36 | 1995 | struct hv_pcidev_description *desc) |
4daace0d JO |
1996 | { |
1997 | struct hv_pci_dev *hpdev; | |
1998 | struct pci_child_message *res_req; | |
1999 | struct q_res_req_compl comp_pkt; | |
8286e96d DC |
2000 | struct { |
2001 | struct pci_packet init_packet; | |
2002 | u8 buffer[sizeof(struct pci_child_message)]; | |
4daace0d JO |
2003 | } pkt; |
2004 | unsigned long flags; | |
2005 | int ret; | |
2006 | ||
7403bd14 | 2007 | hpdev = kzalloc(sizeof(*hpdev), GFP_KERNEL); |
4daace0d JO |
2008 | if (!hpdev) |
2009 | return NULL; | |
2010 | ||
2011 | hpdev->hbus = hbus; | |
2012 | ||
2013 | memset(&pkt, 0, sizeof(pkt)); | |
2014 | init_completion(&comp_pkt.host_event); | |
2015 | comp_pkt.hpdev = hpdev; | |
2016 | pkt.init_packet.compl_ctxt = &comp_pkt; | |
2017 | pkt.init_packet.completion_func = q_resource_requirements; | |
2018 | res_req = (struct pci_child_message *)&pkt.init_packet.message; | |
0c6045d8 | 2019 | res_req->message_type.type = PCI_QUERY_RESOURCE_REQUIREMENTS; |
4daace0d JO |
2020 | res_req->wslot.slot = desc->win_slot.slot; |
2021 | ||
2022 | ret = vmbus_sendpacket(hbus->hdev->channel, res_req, | |
2023 | sizeof(struct pci_child_message), | |
2024 | (unsigned long)&pkt.init_packet, | |
2025 | VM_PKT_DATA_INBAND, | |
2026 | VMBUS_DATA_PACKET_FLAG_COMPLETION_REQUESTED); | |
2027 | if (ret) | |
2028 | goto error; | |
2029 | ||
c3635da2 DC |
2030 | if (wait_for_response(hbus->hdev, &comp_pkt.host_event)) |
2031 | goto error; | |
4daace0d JO |
2032 | |
2033 | hpdev->desc = *desc; | |
24196f0c | 2034 | refcount_set(&hpdev->refs, 1); |
8c99e120 | 2035 | get_pcichild(hpdev); |
4daace0d | 2036 | spin_lock_irqsave(&hbus->device_list_lock, flags); |
4a9b0933 | 2037 | |
4daace0d JO |
2038 | list_add_tail(&hpdev->list_entry, &hbus->children); |
2039 | spin_unlock_irqrestore(&hbus->device_list_lock, flags); | |
2040 | return hpdev; | |
2041 | ||
2042 | error: | |
2043 | kfree(hpdev); | |
2044 | return NULL; | |
2045 | } | |
2046 | ||
2047 | /** | |
2048 | * get_pcichild_wslot() - Find device from slot | |
2049 | * @hbus: Root PCI bus, as understood by this driver | |
2050 | * @wslot: Location on the bus | |
2051 | * | |
2052 | * This function looks up a PCI device and returns the internal | |
2053 | * representation of it. It acquires a reference on it, so that | |
2054 | * the device won't be deleted while somebody is using it. The | |
2055 | * caller is responsible for calling put_pcichild() to release | |
2056 | * this reference. | |
2057 | * | |
2058 | * Return: Internal representation of a PCI device | |
2059 | */ | |
2060 | static struct hv_pci_dev *get_pcichild_wslot(struct hv_pcibus_device *hbus, | |
2061 | u32 wslot) | |
2062 | { | |
2063 | unsigned long flags; | |
2064 | struct hv_pci_dev *iter, *hpdev = NULL; | |
2065 | ||
2066 | spin_lock_irqsave(&hbus->device_list_lock, flags); | |
2067 | list_for_each_entry(iter, &hbus->children, list_entry) { | |
2068 | if (iter->desc.win_slot.slot == wslot) { | |
2069 | hpdev = iter; | |
8c99e120 | 2070 | get_pcichild(hpdev); |
4daace0d JO |
2071 | break; |
2072 | } | |
2073 | } | |
2074 | spin_unlock_irqrestore(&hbus->device_list_lock, flags); | |
2075 | ||
2076 | return hpdev; | |
2077 | } | |
2078 | ||
2079 | /** | |
2080 | * pci_devices_present_work() - Handle new list of child devices | |
2081 | * @work: Work struct embedded in struct hv_dr_work | |
2082 | * | |
2083 | * "Bus Relations" is the Windows term for "children of this | |
2084 | * bus." The terminology is preserved here for people trying to | |
2085 | * debug the interaction between Hyper-V and Linux. This | |
2086 | * function is called when the parent partition reports a list | |
2087 | * of functions that should be observed under this PCI Express | |
2088 | * port (bus). | |
2089 | * | |
2090 | * This function updates the list, and must tolerate being | |
2091 | * called multiple times with the same information. The typical | |
2092 | * number of child devices is one, with very atypical cases | |
2093 | * involving three or four, so the algorithms used here can be | |
2094 | * simple and inefficient. | |
2095 | * | |
2096 | * It must also treat the omission of a previously observed device as | |
2097 | * notification that the device no longer exists. | |
2098 | * | |
021ad274 DC |
2099 | * Note that this function is serialized with hv_eject_device_work(), |
2100 | * because both are pushed to the ordered workqueue hbus->wq. | |
4daace0d JO |
2101 | */ |
2102 | static void pci_devices_present_work(struct work_struct *work) | |
2103 | { | |
2104 | u32 child_no; | |
2105 | bool found; | |
f9ad0f36 | 2106 | struct hv_pcidev_description *new_desc; |
4daace0d JO |
2107 | struct hv_pci_dev *hpdev; |
2108 | struct hv_pcibus_device *hbus; | |
2109 | struct list_head removed; | |
2110 | struct hv_dr_work *dr_wrk; | |
2111 | struct hv_dr_state *dr = NULL; | |
2112 | unsigned long flags; | |
2113 | ||
2114 | dr_wrk = container_of(work, struct hv_dr_work, wrk); | |
2115 | hbus = dr_wrk->bus; | |
2116 | kfree(dr_wrk); | |
2117 | ||
2118 | INIT_LIST_HEAD(&removed); | |
2119 | ||
4daace0d JO |
2120 | /* Pull this off the queue and process it if it was the last one. */ |
2121 | spin_lock_irqsave(&hbus->device_list_lock, flags); | |
2122 | while (!list_empty(&hbus->dr_list)) { | |
2123 | dr = list_first_entry(&hbus->dr_list, struct hv_dr_state, | |
2124 | list_entry); | |
2125 | list_del(&dr->list_entry); | |
2126 | ||
2127 | /* Throw this away if the list still has stuff in it. */ | |
2128 | if (!list_empty(&hbus->dr_list)) { | |
2129 | kfree(dr); | |
2130 | continue; | |
2131 | } | |
2132 | } | |
2133 | spin_unlock_irqrestore(&hbus->device_list_lock, flags); | |
2134 | ||
326dc2e1 | 2135 | if (!dr) |
4daace0d | 2136 | return; |
4daace0d JO |
2137 | |
2138 | /* First, mark all existing children as reported missing. */ | |
2139 | spin_lock_irqsave(&hbus->device_list_lock, flags); | |
5b8db8f6 SH |
2140 | list_for_each_entry(hpdev, &hbus->children, list_entry) { |
2141 | hpdev->reported_missing = true; | |
4daace0d JO |
2142 | } |
2143 | spin_unlock_irqrestore(&hbus->device_list_lock, flags); | |
2144 | ||
2145 | /* Next, add back any reported devices. */ | |
2146 | for (child_no = 0; child_no < dr->device_count; child_no++) { | |
2147 | found = false; | |
2148 | new_desc = &dr->func[child_no]; | |
2149 | ||
2150 | spin_lock_irqsave(&hbus->device_list_lock, flags); | |
5b8db8f6 SH |
2151 | list_for_each_entry(hpdev, &hbus->children, list_entry) { |
2152 | if ((hpdev->desc.win_slot.slot == new_desc->win_slot.slot) && | |
4daace0d JO |
2153 | (hpdev->desc.v_id == new_desc->v_id) && |
2154 | (hpdev->desc.d_id == new_desc->d_id) && | |
2155 | (hpdev->desc.ser == new_desc->ser)) { | |
2156 | hpdev->reported_missing = false; | |
2157 | found = true; | |
2158 | } | |
2159 | } | |
2160 | spin_unlock_irqrestore(&hbus->device_list_lock, flags); | |
2161 | ||
2162 | if (!found) { | |
2163 | hpdev = new_pcichild_device(hbus, new_desc); | |
2164 | if (!hpdev) | |
2165 | dev_err(&hbus->hdev->device, | |
2166 | "couldn't record a child device.\n"); | |
2167 | } | |
2168 | } | |
2169 | ||
2170 | /* Move missing children to a list on the stack. */ | |
2171 | spin_lock_irqsave(&hbus->device_list_lock, flags); | |
2172 | do { | |
2173 | found = false; | |
5b8db8f6 | 2174 | list_for_each_entry(hpdev, &hbus->children, list_entry) { |
4daace0d JO |
2175 | if (hpdev->reported_missing) { |
2176 | found = true; | |
8c99e120 | 2177 | put_pcichild(hpdev); |
4f1cb01a | 2178 | list_move_tail(&hpdev->list_entry, &removed); |
4daace0d JO |
2179 | break; |
2180 | } | |
2181 | } | |
2182 | } while (found); | |
2183 | spin_unlock_irqrestore(&hbus->device_list_lock, flags); | |
2184 | ||
2185 | /* Delete everything that should no longer exist. */ | |
2186 | while (!list_empty(&removed)) { | |
2187 | hpdev = list_first_entry(&removed, struct hv_pci_dev, | |
2188 | list_entry); | |
2189 | list_del(&hpdev->list_entry); | |
340d4556 DC |
2190 | |
2191 | if (hpdev->pci_slot) | |
2192 | pci_destroy_slot(hpdev->pci_slot); | |
2193 | ||
8c99e120 | 2194 | put_pcichild(hpdev); |
4daace0d JO |
2195 | } |
2196 | ||
691ac1dc | 2197 | switch (hbus->state) { |
d3a78d8b LL |
2198 | case hv_pcibus_installed: |
2199 | /* | |
691ac1dc JL |
2200 | * Tell the core to rescan bus |
2201 | * because there may have been changes. | |
2202 | */ | |
4daace0d | 2203 | pci_lock_rescan_remove(); |
418cb6c8 | 2204 | pci_scan_child_bus(hbus->bridge->bus); |
999dd956 | 2205 | hv_pci_assign_numa_node(hbus); |
a15f2c08 | 2206 | hv_pci_assign_slots(hbus); |
4daace0d | 2207 | pci_unlock_rescan_remove(); |
d3a78d8b LL |
2208 | break; |
2209 | ||
2210 | case hv_pcibus_init: | |
2211 | case hv_pcibus_probed: | |
4daace0d | 2212 | survey_child_resources(hbus); |
d3a78d8b LL |
2213 | break; |
2214 | ||
2215 | default: | |
2216 | break; | |
4daace0d JO |
2217 | } |
2218 | ||
4daace0d JO |
2219 | kfree(dr); |
2220 | } | |
2221 | ||
2222 | /** | |
f9ad0f36 | 2223 | * hv_pci_start_relations_work() - Queue work to start device discovery |
4daace0d | 2224 | * @hbus: Root PCI bus, as understood by this driver |
f9ad0f36 | 2225 | * @dr: The list of children returned from host |
4daace0d | 2226 | * |
f9ad0f36 | 2227 | * Return: 0 on success, -errno on failure |
4daace0d | 2228 | */ |
f9ad0f36 LL |
2229 | static int hv_pci_start_relations_work(struct hv_pcibus_device *hbus, |
2230 | struct hv_dr_state *dr) | |
4daace0d | 2231 | { |
4daace0d JO |
2232 | struct hv_dr_work *dr_wrk; |
2233 | unsigned long flags; | |
948373b3 | 2234 | bool pending_dr; |
4daace0d | 2235 | |
ac82fc83 DC |
2236 | if (hbus->state == hv_pcibus_removing) { |
2237 | dev_info(&hbus->hdev->device, | |
2238 | "PCI VMBus BUS_RELATIONS: ignored\n"); | |
f9ad0f36 | 2239 | return -ENOENT; |
ac82fc83 DC |
2240 | } |
2241 | ||
4daace0d JO |
2242 | dr_wrk = kzalloc(sizeof(*dr_wrk), GFP_NOWAIT); |
2243 | if (!dr_wrk) | |
f9ad0f36 | 2244 | return -ENOMEM; |
4daace0d JO |
2245 | |
2246 | INIT_WORK(&dr_wrk->wrk, pci_devices_present_work); | |
2247 | dr_wrk->bus = hbus; | |
4daace0d JO |
2248 | |
2249 | spin_lock_irqsave(&hbus->device_list_lock, flags); | |
948373b3 DC |
2250 | /* |
2251 | * If pending_dr is true, we have already queued a work, | |
2252 | * which will see the new dr. Otherwise, we need to | |
2253 | * queue a new work. | |
2254 | */ | |
2255 | pending_dr = !list_empty(&hbus->dr_list); | |
4daace0d JO |
2256 | list_add_tail(&dr->list_entry, &hbus->dr_list); |
2257 | spin_unlock_irqrestore(&hbus->device_list_lock, flags); | |
2258 | ||
326dc2e1 | 2259 | if (pending_dr) |
948373b3 | 2260 | kfree(dr_wrk); |
326dc2e1 | 2261 | else |
948373b3 | 2262 | queue_work(hbus->wq, &dr_wrk->wrk); |
f9ad0f36 LL |
2263 | |
2264 | return 0; | |
2265 | } | |
2266 | ||
2267 | /** | |
2268 | * hv_pci_devices_present() - Handle list of new children | |
2269 | * @hbus: Root PCI bus, as understood by this driver | |
2270 | * @relations: Packet from host listing children | |
2271 | * | |
2272 | * Process a new list of devices on the bus. The list of devices is | |
2273 | * discovered by VSP and sent to us via VSP message PCI_BUS_RELATIONS, | |
2274 | * whenever a new list of devices for this bus appears. | |
2275 | */ | |
2276 | static void hv_pci_devices_present(struct hv_pcibus_device *hbus, | |
2277 | struct pci_bus_relations *relations) | |
2278 | { | |
2279 | struct hv_dr_state *dr; | |
2280 | int i; | |
2281 | ||
d0684fd0 GS |
2282 | dr = kzalloc(struct_size(dr, func, relations->device_count), |
2283 | GFP_NOWAIT); | |
f9ad0f36 LL |
2284 | if (!dr) |
2285 | return; | |
2286 | ||
2287 | dr->device_count = relations->device_count; | |
2288 | for (i = 0; i < dr->device_count; i++) { | |
2289 | dr->func[i].v_id = relations->func[i].v_id; | |
2290 | dr->func[i].d_id = relations->func[i].d_id; | |
2291 | dr->func[i].rev = relations->func[i].rev; | |
2292 | dr->func[i].prog_intf = relations->func[i].prog_intf; | |
2293 | dr->func[i].subclass = relations->func[i].subclass; | |
2294 | dr->func[i].base_class = relations->func[i].base_class; | |
2295 | dr->func[i].subsystem_id = relations->func[i].subsystem_id; | |
2296 | dr->func[i].win_slot = relations->func[i].win_slot; | |
2297 | dr->func[i].ser = relations->func[i].ser; | |
2298 | } | |
2299 | ||
2300 | if (hv_pci_start_relations_work(hbus, dr)) | |
2301 | kfree(dr); | |
4daace0d JO |
2302 | } |
2303 | ||
999dd956 LL |
2304 | /** |
2305 | * hv_pci_devices_present2() - Handle list of new children | |
2306 | * @hbus: Root PCI bus, as understood by this driver | |
2307 | * @relations: Packet from host listing children | |
2308 | * | |
2309 | * This function is the v2 version of hv_pci_devices_present() | |
2310 | */ | |
2311 | static void hv_pci_devices_present2(struct hv_pcibus_device *hbus, | |
2312 | struct pci_bus_relations2 *relations) | |
2313 | { | |
2314 | struct hv_dr_state *dr; | |
2315 | int i; | |
2316 | ||
d0684fd0 GS |
2317 | dr = kzalloc(struct_size(dr, func, relations->device_count), |
2318 | GFP_NOWAIT); | |
999dd956 LL |
2319 | if (!dr) |
2320 | return; | |
2321 | ||
2322 | dr->device_count = relations->device_count; | |
2323 | for (i = 0; i < dr->device_count; i++) { | |
2324 | dr->func[i].v_id = relations->func[i].v_id; | |
2325 | dr->func[i].d_id = relations->func[i].d_id; | |
2326 | dr->func[i].rev = relations->func[i].rev; | |
2327 | dr->func[i].prog_intf = relations->func[i].prog_intf; | |
2328 | dr->func[i].subclass = relations->func[i].subclass; | |
2329 | dr->func[i].base_class = relations->func[i].base_class; | |
2330 | dr->func[i].subsystem_id = relations->func[i].subsystem_id; | |
2331 | dr->func[i].win_slot = relations->func[i].win_slot; | |
2332 | dr->func[i].ser = relations->func[i].ser; | |
2333 | dr->func[i].flags = relations->func[i].flags; | |
2334 | dr->func[i].virtual_numa_node = | |
2335 | relations->func[i].virtual_numa_node; | |
2336 | } | |
2337 | ||
2338 | if (hv_pci_start_relations_work(hbus, dr)) | |
2339 | kfree(dr); | |
2340 | } | |
2341 | ||
4daace0d JO |
2342 | /** |
2343 | * hv_eject_device_work() - Asynchronously handles ejection | |
2344 | * @work: Work struct embedded in internal device struct | |
2345 | * | |
2346 | * This function handles ejecting a device. Windows will | |
2347 | * attempt to gracefully eject a device, waiting 60 seconds to | |
2348 | * hear back from the guest OS that this completed successfully. | |
2349 | * If this timer expires, the device will be forcibly removed. | |
2350 | */ | |
2351 | static void hv_eject_device_work(struct work_struct *work) | |
2352 | { | |
2353 | struct pci_eject_response *ejct_pkt; | |
4df591b2 | 2354 | struct hv_pcibus_device *hbus; |
4daace0d JO |
2355 | struct hv_pci_dev *hpdev; |
2356 | struct pci_dev *pdev; | |
2357 | unsigned long flags; | |
2358 | int wslot; | |
2359 | struct { | |
2360 | struct pci_packet pkt; | |
0c6045d8 | 2361 | u8 buffer[sizeof(struct pci_eject_response)]; |
4daace0d JO |
2362 | } ctxt; |
2363 | ||
2364 | hpdev = container_of(work, struct hv_pci_dev, wrk); | |
4df591b2 | 2365 | hbus = hpdev->hbus; |
4daace0d | 2366 | |
fca288c0 | 2367 | WARN_ON(hpdev->state != hv_pcichild_ejecting); |
4daace0d JO |
2368 | |
2369 | /* | |
2370 | * Ejection can come before or after the PCI bus has been set up, so | |
2371 | * attempt to find it and tear down the bus state, if it exists. This | |
418cb6c8 AB |
2372 | * must be done without constructs like pci_domain_nr(hbus->bridge->bus) |
2373 | * because hbus->bridge->bus may not exist yet. | |
4daace0d JO |
2374 | */ |
2375 | wslot = wslot_to_devfn(hpdev->desc.win_slot.slot); | |
38c0d266 | 2376 | pdev = pci_get_domain_bus_and_slot(hbus->bridge->domain_nr, 0, wslot); |
4daace0d | 2377 | if (pdev) { |
414428c5 | 2378 | pci_lock_rescan_remove(); |
4daace0d JO |
2379 | pci_stop_and_remove_bus_device(pdev); |
2380 | pci_dev_put(pdev); | |
414428c5 | 2381 | pci_unlock_rescan_remove(); |
4daace0d JO |
2382 | } |
2383 | ||
4df591b2 | 2384 | spin_lock_irqsave(&hbus->device_list_lock, flags); |
e74d2ebd | 2385 | list_del(&hpdev->list_entry); |
4df591b2 | 2386 | spin_unlock_irqrestore(&hbus->device_list_lock, flags); |
e74d2ebd | 2387 | |
a15f2c08 SH |
2388 | if (hpdev->pci_slot) |
2389 | pci_destroy_slot(hpdev->pci_slot); | |
2390 | ||
4daace0d JO |
2391 | memset(&ctxt, 0, sizeof(ctxt)); |
2392 | ejct_pkt = (struct pci_eject_response *)&ctxt.pkt.message; | |
0c6045d8 | 2393 | ejct_pkt->message_type.type = PCI_EJECTION_COMPLETE; |
4daace0d | 2394 | ejct_pkt->wslot.slot = hpdev->desc.win_slot.slot; |
4df591b2 | 2395 | vmbus_sendpacket(hbus->hdev->channel, ejct_pkt, |
4daace0d JO |
2396 | sizeof(*ejct_pkt), (unsigned long)&ctxt.pkt, |
2397 | VM_PKT_DATA_INBAND, 0); | |
2398 | ||
05f151a7 DC |
2399 | /* For the get_pcichild() in hv_pci_eject_device() */ |
2400 | put_pcichild(hpdev); | |
2401 | /* For the two refs got in new_pcichild_device() */ | |
8c99e120 SH |
2402 | put_pcichild(hpdev); |
2403 | put_pcichild(hpdev); | |
4df591b2 | 2404 | /* hpdev has been freed. Do not use it any more. */ |
4daace0d JO |
2405 | } |
2406 | ||
2407 | /** | |
2408 | * hv_pci_eject_device() - Handles device ejection | |
2409 | * @hpdev: Internal device tracking struct | |
2410 | * | |
2411 | * This function is invoked when an ejection packet arrives. It | |
2412 | * just schedules work so that we don't re-enter the packet | |
2413 | * delivery code handling the ejection. | |
2414 | */ | |
2415 | static void hv_pci_eject_device(struct hv_pci_dev *hpdev) | |
2416 | { | |
ac82fc83 DC |
2417 | struct hv_pcibus_device *hbus = hpdev->hbus; |
2418 | struct hv_device *hdev = hbus->hdev; | |
2419 | ||
2420 | if (hbus->state == hv_pcibus_removing) { | |
2421 | dev_info(&hdev->device, "PCI VMBus EJECT: ignored\n"); | |
2422 | return; | |
2423 | } | |
2424 | ||
4daace0d | 2425 | hpdev->state = hv_pcichild_ejecting; |
8c99e120 | 2426 | get_pcichild(hpdev); |
4daace0d | 2427 | INIT_WORK(&hpdev->wrk, hv_eject_device_work); |
ac82fc83 | 2428 | queue_work(hbus->wq, &hpdev->wrk); |
4daace0d JO |
2429 | } |
2430 | ||
2431 | /** | |
2432 | * hv_pci_onchannelcallback() - Handles incoming packets | |
2433 | * @context: Internal bus tracking struct | |
2434 | * | |
2435 | * This function is invoked whenever the host sends a packet to | |
2436 | * this channel (which is private to this root PCI bus). | |
2437 | */ | |
2438 | static void hv_pci_onchannelcallback(void *context) | |
2439 | { | |
2440 | const int packet_size = 0x100; | |
2441 | int ret; | |
2442 | struct hv_pcibus_device *hbus = context; | |
2443 | u32 bytes_recvd; | |
2444 | u64 req_id; | |
2445 | struct vmpacket_descriptor *desc; | |
2446 | unsigned char *buffer; | |
2447 | int bufferlen = packet_size; | |
2448 | struct pci_packet *comp_packet; | |
2449 | struct pci_response *response; | |
2450 | struct pci_incoming_message *new_message; | |
2451 | struct pci_bus_relations *bus_rel; | |
999dd956 | 2452 | struct pci_bus_relations2 *bus_rel2; |
e5d2f910 | 2453 | struct pci_dev_inval_block *inval; |
4daace0d JO |
2454 | struct pci_dev_incoming *dev_message; |
2455 | struct hv_pci_dev *hpdev; | |
2456 | ||
2457 | buffer = kmalloc(bufferlen, GFP_ATOMIC); | |
2458 | if (!buffer) | |
2459 | return; | |
2460 | ||
2461 | while (1) { | |
2462 | ret = vmbus_recvpacket_raw(hbus->hdev->channel, buffer, | |
2463 | bufferlen, &bytes_recvd, &req_id); | |
2464 | ||
2465 | if (ret == -ENOBUFS) { | |
2466 | kfree(buffer); | |
2467 | /* Handle large packet */ | |
2468 | bufferlen = bytes_recvd; | |
2469 | buffer = kmalloc(bytes_recvd, GFP_ATOMIC); | |
2470 | if (!buffer) | |
2471 | return; | |
2472 | continue; | |
2473 | } | |
2474 | ||
837d741e VK |
2475 | /* Zero length indicates there are no more packets. */ |
2476 | if (ret || !bytes_recvd) | |
2477 | break; | |
2478 | ||
4daace0d JO |
2479 | /* |
2480 | * All incoming packets must be at least as large as a | |
2481 | * response. | |
2482 | */ | |
60fcdac8 | 2483 | if (bytes_recvd <= sizeof(struct pci_response)) |
837d741e | 2484 | continue; |
4daace0d JO |
2485 | desc = (struct vmpacket_descriptor *)buffer; |
2486 | ||
2487 | switch (desc->type) { | |
2488 | case VM_PKT_COMP: | |
2489 | ||
2490 | /* | |
2491 | * The host is trusted, and thus it's safe to interpret | |
2492 | * this transaction ID as a pointer. | |
2493 | */ | |
2494 | comp_packet = (struct pci_packet *)req_id; | |
2495 | response = (struct pci_response *)buffer; | |
2496 | comp_packet->completion_func(comp_packet->compl_ctxt, | |
2497 | response, | |
2498 | bytes_recvd); | |
60fcdac8 | 2499 | break; |
4daace0d JO |
2500 | |
2501 | case VM_PKT_DATA_INBAND: | |
2502 | ||
2503 | new_message = (struct pci_incoming_message *)buffer; | |
0c6045d8 | 2504 | switch (new_message->message_type.type) { |
4daace0d JO |
2505 | case PCI_BUS_RELATIONS: |
2506 | ||
2507 | bus_rel = (struct pci_bus_relations *)buffer; | |
2508 | if (bytes_recvd < | |
d0684fd0 GS |
2509 | struct_size(bus_rel, func, |
2510 | bus_rel->device_count)) { | |
4daace0d JO |
2511 | dev_err(&hbus->hdev->device, |
2512 | "bus relations too small\n"); | |
2513 | break; | |
2514 | } | |
2515 | ||
2516 | hv_pci_devices_present(hbus, bus_rel); | |
2517 | break; | |
2518 | ||
999dd956 LL |
2519 | case PCI_BUS_RELATIONS2: |
2520 | ||
2521 | bus_rel2 = (struct pci_bus_relations2 *)buffer; | |
2522 | if (bytes_recvd < | |
d0684fd0 GS |
2523 | struct_size(bus_rel2, func, |
2524 | bus_rel2->device_count)) { | |
999dd956 LL |
2525 | dev_err(&hbus->hdev->device, |
2526 | "bus relations v2 too small\n"); | |
2527 | break; | |
2528 | } | |
2529 | ||
2530 | hv_pci_devices_present2(hbus, bus_rel2); | |
2531 | break; | |
2532 | ||
4daace0d JO |
2533 | case PCI_EJECT: |
2534 | ||
2535 | dev_message = (struct pci_dev_incoming *)buffer; | |
2536 | hpdev = get_pcichild_wslot(hbus, | |
2537 | dev_message->wslot.slot); | |
2538 | if (hpdev) { | |
2539 | hv_pci_eject_device(hpdev); | |
8c99e120 | 2540 | put_pcichild(hpdev); |
4daace0d JO |
2541 | } |
2542 | break; | |
2543 | ||
e5d2f910 DC |
2544 | case PCI_INVALIDATE_BLOCK: |
2545 | ||
2546 | inval = (struct pci_dev_inval_block *)buffer; | |
2547 | hpdev = get_pcichild_wslot(hbus, | |
2548 | inval->wslot.slot); | |
2549 | if (hpdev) { | |
2550 | if (hpdev->block_invalidate) { | |
2551 | hpdev->block_invalidate( | |
2552 | hpdev->invalidate_context, | |
2553 | inval->block_mask); | |
2554 | } | |
2555 | put_pcichild(hpdev); | |
2556 | } | |
2557 | break; | |
2558 | ||
4daace0d JO |
2559 | default: |
2560 | dev_warn(&hbus->hdev->device, | |
2561 | "Unimplemented protocol message %x\n", | |
0c6045d8 | 2562 | new_message->message_type.type); |
4daace0d JO |
2563 | break; |
2564 | } | |
2565 | break; | |
2566 | ||
2567 | default: | |
2568 | dev_err(&hbus->hdev->device, | |
2569 | "unhandled packet type %d, tid %llx len %d\n", | |
2570 | desc->type, req_id, bytes_recvd); | |
2571 | break; | |
2572 | } | |
4daace0d | 2573 | } |
60fcdac8 VK |
2574 | |
2575 | kfree(buffer); | |
4daace0d JO |
2576 | } |
2577 | ||
2578 | /** | |
2579 | * hv_pci_protocol_negotiation() - Set up protocol | |
6d2730cb KW |
2580 | * @hdev: VMBus's tracking struct for this root PCI bus. |
2581 | * @version: Array of supported channel protocol versions in | |
2582 | * the order of probing - highest go first. | |
2583 | * @num_version: Number of elements in the version array. | |
4daace0d JO |
2584 | * |
2585 | * This driver is intended to support running on Windows 10 | |
2586 | * (server) and later versions. It will not run on earlier | |
2587 | * versions, as they assume that many of the operations which | |
2588 | * Linux needs accomplished with a spinlock held were done via | |
2589 | * asynchronous messaging via VMBus. Windows 10 increases the | |
2590 | * surface area of PCI emulation so that these actions can take | |
2591 | * place by suspending a virtual processor for their duration. | |
2592 | * | |
2593 | * This function negotiates the channel protocol version, | |
2594 | * failing if the host doesn't support the necessary protocol | |
2595 | * level. | |
2596 | */ | |
a8e37506 DC |
2597 | static int hv_pci_protocol_negotiation(struct hv_device *hdev, |
2598 | enum pci_protocol_version_t version[], | |
2599 | int num_version) | |
4daace0d | 2600 | { |
14ef39fd | 2601 | struct hv_pcibus_device *hbus = hv_get_drvdata(hdev); |
4daace0d JO |
2602 | struct pci_version_request *version_req; |
2603 | struct hv_pci_compl comp_pkt; | |
2604 | struct pci_packet *pkt; | |
2605 | int ret; | |
b1db7e7e | 2606 | int i; |
4daace0d JO |
2607 | |
2608 | /* | |
2609 | * Initiate the handshake with the host and negotiate | |
2610 | * a version that the host can support. We start with the | |
2611 | * highest version number and go down if the host cannot | |
2612 | * support it. | |
2613 | */ | |
2614 | pkt = kzalloc(sizeof(*pkt) + sizeof(*version_req), GFP_KERNEL); | |
2615 | if (!pkt) | |
2616 | return -ENOMEM; | |
2617 | ||
2618 | init_completion(&comp_pkt.host_event); | |
2619 | pkt->completion_func = hv_pci_generic_compl; | |
2620 | pkt->compl_ctxt = &comp_pkt; | |
2621 | version_req = (struct pci_version_request *)&pkt->message; | |
0c6045d8 | 2622 | version_req->message_type.type = PCI_QUERY_PROTOCOL_VERSION; |
4daace0d | 2623 | |
a8e37506 DC |
2624 | for (i = 0; i < num_version; i++) { |
2625 | version_req->protocol_version = version[i]; | |
b1db7e7e JL |
2626 | ret = vmbus_sendpacket(hdev->channel, version_req, |
2627 | sizeof(struct pci_version_request), | |
2628 | (unsigned long)pkt, VM_PKT_DATA_INBAND, | |
2629 | VMBUS_DATA_PACKET_FLAG_COMPLETION_REQUESTED); | |
c3635da2 DC |
2630 | if (!ret) |
2631 | ret = wait_for_response(hdev, &comp_pkt.host_event); | |
2632 | ||
b1db7e7e JL |
2633 | if (ret) { |
2634 | dev_err(&hdev->device, | |
c3635da2 | 2635 | "PCI Pass-through VSP failed to request version: %d", |
b1db7e7e JL |
2636 | ret); |
2637 | goto exit; | |
2638 | } | |
4daace0d | 2639 | |
b1db7e7e | 2640 | if (comp_pkt.completion_status >= 0) { |
14ef39fd | 2641 | hbus->protocol_version = version[i]; |
b1db7e7e JL |
2642 | dev_info(&hdev->device, |
2643 | "PCI VMBus probing: Using version %#x\n", | |
14ef39fd | 2644 | hbus->protocol_version); |
b1db7e7e JL |
2645 | goto exit; |
2646 | } | |
2647 | ||
2648 | if (comp_pkt.completion_status != STATUS_REVISION_MISMATCH) { | |
2649 | dev_err(&hdev->device, | |
2650 | "PCI Pass-through VSP failed version request: %#x", | |
2651 | comp_pkt.completion_status); | |
2652 | ret = -EPROTO; | |
2653 | goto exit; | |
2654 | } | |
4daace0d | 2655 | |
b1db7e7e | 2656 | reinit_completion(&comp_pkt.host_event); |
4daace0d JO |
2657 | } |
2658 | ||
b1db7e7e JL |
2659 | dev_err(&hdev->device, |
2660 | "PCI pass-through VSP failed to find supported version"); | |
2661 | ret = -EPROTO; | |
4daace0d JO |
2662 | |
2663 | exit: | |
2664 | kfree(pkt); | |
2665 | return ret; | |
2666 | } | |
2667 | ||
2668 | /** | |
2669 | * hv_pci_free_bridge_windows() - Release memory regions for the | |
2670 | * bus | |
2671 | * @hbus: Root PCI bus, as understood by this driver | |
2672 | */ | |
2673 | static void hv_pci_free_bridge_windows(struct hv_pcibus_device *hbus) | |
2674 | { | |
2675 | /* | |
2676 | * Set the resources back to the way they looked when they | |
2677 | * were allocated by setting IORESOURCE_BUSY again. | |
2678 | */ | |
2679 | ||
2680 | if (hbus->low_mmio_space && hbus->low_mmio_res) { | |
2681 | hbus->low_mmio_res->flags |= IORESOURCE_BUSY; | |
696ca5e8 JO |
2682 | vmbus_free_mmio(hbus->low_mmio_res->start, |
2683 | resource_size(hbus->low_mmio_res)); | |
4daace0d JO |
2684 | } |
2685 | ||
2686 | if (hbus->high_mmio_space && hbus->high_mmio_res) { | |
2687 | hbus->high_mmio_res->flags |= IORESOURCE_BUSY; | |
696ca5e8 JO |
2688 | vmbus_free_mmio(hbus->high_mmio_res->start, |
2689 | resource_size(hbus->high_mmio_res)); | |
4daace0d JO |
2690 | } |
2691 | } | |
2692 | ||
2693 | /** | |
2694 | * hv_pci_allocate_bridge_windows() - Allocate memory regions | |
2695 | * for the bus | |
2696 | * @hbus: Root PCI bus, as understood by this driver | |
2697 | * | |
2698 | * This function calls vmbus_allocate_mmio(), which is itself a | |
2699 | * bit of a compromise. Ideally, we might change the pnp layer | |
2700 | * in the kernel such that it comprehends either PCI devices | |
2701 | * which are "grandchildren of ACPI," with some intermediate bus | |
2702 | * node (in this case, VMBus) or change it such that it | |
2703 | * understands VMBus. The pnp layer, however, has been declared | |
2704 | * deprecated, and not subject to change. | |
2705 | * | |
2706 | * The workaround, implemented here, is to ask VMBus to allocate | |
2707 | * MMIO space for this bus. VMBus itself knows which ranges are | |
2708 | * appropriate by looking at its own ACPI objects. Then, after | |
2709 | * these ranges are claimed, they're modified to look like they | |
2710 | * would have looked if the ACPI and pnp code had allocated | |
2711 | * bridge windows. These descriptors have to exist in this form | |
2712 | * in order to satisfy the code which will get invoked when the | |
2713 | * endpoint PCI function driver calls request_mem_region() or | |
2714 | * request_mem_region_exclusive(). | |
2715 | * | |
2716 | * Return: 0 on success, -errno on failure | |
2717 | */ | |
2718 | static int hv_pci_allocate_bridge_windows(struct hv_pcibus_device *hbus) | |
2719 | { | |
2720 | resource_size_t align; | |
2721 | int ret; | |
2722 | ||
2723 | if (hbus->low_mmio_space) { | |
2724 | align = 1ULL << (63 - __builtin_clzll(hbus->low_mmio_space)); | |
2725 | ret = vmbus_allocate_mmio(&hbus->low_mmio_res, hbus->hdev, 0, | |
2726 | (u64)(u32)0xffffffff, | |
2727 | hbus->low_mmio_space, | |
2728 | align, false); | |
2729 | if (ret) { | |
2730 | dev_err(&hbus->hdev->device, | |
2731 | "Need %#llx of low MMIO space. Consider reconfiguring the VM.\n", | |
2732 | hbus->low_mmio_space); | |
2733 | return ret; | |
2734 | } | |
2735 | ||
2736 | /* Modify this resource to become a bridge window. */ | |
2737 | hbus->low_mmio_res->flags |= IORESOURCE_WINDOW; | |
2738 | hbus->low_mmio_res->flags &= ~IORESOURCE_BUSY; | |
418cb6c8 | 2739 | pci_add_resource(&hbus->bridge->windows, hbus->low_mmio_res); |
4daace0d JO |
2740 | } |
2741 | ||
2742 | if (hbus->high_mmio_space) { | |
2743 | align = 1ULL << (63 - __builtin_clzll(hbus->high_mmio_space)); | |
2744 | ret = vmbus_allocate_mmio(&hbus->high_mmio_res, hbus->hdev, | |
2745 | 0x100000000, -1, | |
2746 | hbus->high_mmio_space, align, | |
2747 | false); | |
2748 | if (ret) { | |
2749 | dev_err(&hbus->hdev->device, | |
2750 | "Need %#llx of high MMIO space. Consider reconfiguring the VM.\n", | |
2751 | hbus->high_mmio_space); | |
2752 | goto release_low_mmio; | |
2753 | } | |
2754 | ||
2755 | /* Modify this resource to become a bridge window. */ | |
2756 | hbus->high_mmio_res->flags |= IORESOURCE_WINDOW; | |
2757 | hbus->high_mmio_res->flags &= ~IORESOURCE_BUSY; | |
418cb6c8 | 2758 | pci_add_resource(&hbus->bridge->windows, hbus->high_mmio_res); |
4daace0d JO |
2759 | } |
2760 | ||
2761 | return 0; | |
2762 | ||
2763 | release_low_mmio: | |
2764 | if (hbus->low_mmio_res) { | |
696ca5e8 JO |
2765 | vmbus_free_mmio(hbus->low_mmio_res->start, |
2766 | resource_size(hbus->low_mmio_res)); | |
4daace0d JO |
2767 | } |
2768 | ||
2769 | return ret; | |
2770 | } | |
2771 | ||
2772 | /** | |
2773 | * hv_allocate_config_window() - Find MMIO space for PCI Config | |
2774 | * @hbus: Root PCI bus, as understood by this driver | |
2775 | * | |
2776 | * This function claims memory-mapped I/O space for accessing | |
2777 | * configuration space for the functions on this bus. | |
2778 | * | |
2779 | * Return: 0 on success, -errno on failure | |
2780 | */ | |
2781 | static int hv_allocate_config_window(struct hv_pcibus_device *hbus) | |
2782 | { | |
2783 | int ret; | |
2784 | ||
2785 | /* | |
2786 | * Set up a region of MMIO space to use for accessing configuration | |
2787 | * space. | |
2788 | */ | |
2789 | ret = vmbus_allocate_mmio(&hbus->mem_config, hbus->hdev, 0, -1, | |
2790 | PCI_CONFIG_MMIO_LENGTH, 0x1000, false); | |
2791 | if (ret) | |
2792 | return ret; | |
2793 | ||
2794 | /* | |
2795 | * vmbus_allocate_mmio() gets used for allocating both device endpoint | |
2796 | * resource claims (those which cannot be overlapped) and the ranges | |
2797 | * which are valid for the children of this bus, which are intended | |
2798 | * to be overlapped by those children. Set the flag on this claim | |
2799 | * meaning that this region can't be overlapped. | |
2800 | */ | |
2801 | ||
2802 | hbus->mem_config->flags |= IORESOURCE_BUSY; | |
2803 | ||
2804 | return 0; | |
2805 | } | |
2806 | ||
2807 | static void hv_free_config_window(struct hv_pcibus_device *hbus) | |
2808 | { | |
696ca5e8 | 2809 | vmbus_free_mmio(hbus->mem_config->start, PCI_CONFIG_MMIO_LENGTH); |
4daace0d JO |
2810 | } |
2811 | ||
c81992e7 WH |
2812 | static int hv_pci_bus_exit(struct hv_device *hdev, bool keep_devs); |
2813 | ||
4daace0d JO |
2814 | /** |
2815 | * hv_pci_enter_d0() - Bring the "bus" into the D0 power state | |
2816 | * @hdev: VMBus's tracking struct for this root PCI bus | |
2817 | * | |
2818 | * Return: 0 on success, -errno on failure | |
2819 | */ | |
2820 | static int hv_pci_enter_d0(struct hv_device *hdev) | |
2821 | { | |
2822 | struct hv_pcibus_device *hbus = hv_get_drvdata(hdev); | |
2823 | struct pci_bus_d0_entry *d0_entry; | |
2824 | struct hv_pci_compl comp_pkt; | |
2825 | struct pci_packet *pkt; | |
2826 | int ret; | |
2827 | ||
2828 | /* | |
2829 | * Tell the host that the bus is ready to use, and moved into the | |
2830 | * powered-on state. This includes telling the host which region | |
2831 | * of memory-mapped I/O space has been chosen for configuration space | |
2832 | * access. | |
2833 | */ | |
2834 | pkt = kzalloc(sizeof(*pkt) + sizeof(*d0_entry), GFP_KERNEL); | |
2835 | if (!pkt) | |
2836 | return -ENOMEM; | |
2837 | ||
2838 | init_completion(&comp_pkt.host_event); | |
2839 | pkt->completion_func = hv_pci_generic_compl; | |
2840 | pkt->compl_ctxt = &comp_pkt; | |
2841 | d0_entry = (struct pci_bus_d0_entry *)&pkt->message; | |
0c6045d8 | 2842 | d0_entry->message_type.type = PCI_BUS_D0ENTRY; |
4daace0d JO |
2843 | d0_entry->mmio_base = hbus->mem_config->start; |
2844 | ||
2845 | ret = vmbus_sendpacket(hdev->channel, d0_entry, sizeof(*d0_entry), | |
2846 | (unsigned long)pkt, VM_PKT_DATA_INBAND, | |
2847 | VMBUS_DATA_PACKET_FLAG_COMPLETION_REQUESTED); | |
c3635da2 DC |
2848 | if (!ret) |
2849 | ret = wait_for_response(hdev, &comp_pkt.host_event); | |
2850 | ||
4daace0d JO |
2851 | if (ret) |
2852 | goto exit; | |
2853 | ||
4daace0d JO |
2854 | if (comp_pkt.completion_status < 0) { |
2855 | dev_err(&hdev->device, | |
2856 | "PCI Pass-through VSP failed D0 Entry with status %x\n", | |
2857 | comp_pkt.completion_status); | |
2858 | ret = -EPROTO; | |
2859 | goto exit; | |
2860 | } | |
2861 | ||
2862 | ret = 0; | |
2863 | ||
2864 | exit: | |
2865 | kfree(pkt); | |
2866 | return ret; | |
2867 | } | |
2868 | ||
2869 | /** | |
2870 | * hv_pci_query_relations() - Ask host to send list of child | |
2871 | * devices | |
2872 | * @hdev: VMBus's tracking struct for this root PCI bus | |
2873 | * | |
2874 | * Return: 0 on success, -errno on failure | |
2875 | */ | |
2876 | static int hv_pci_query_relations(struct hv_device *hdev) | |
2877 | { | |
2878 | struct hv_pcibus_device *hbus = hv_get_drvdata(hdev); | |
2879 | struct pci_message message; | |
2880 | struct completion comp; | |
2881 | int ret; | |
2882 | ||
2883 | /* Ask the host to send along the list of child devices */ | |
2884 | init_completion(&comp); | |
2885 | if (cmpxchg(&hbus->survey_event, NULL, &comp)) | |
2886 | return -ENOTEMPTY; | |
2887 | ||
2888 | memset(&message, 0, sizeof(message)); | |
0c6045d8 | 2889 | message.type = PCI_QUERY_BUS_RELATIONS; |
4daace0d JO |
2890 | |
2891 | ret = vmbus_sendpacket(hdev->channel, &message, sizeof(message), | |
2892 | 0, VM_PKT_DATA_INBAND, 0); | |
c3635da2 DC |
2893 | if (!ret) |
2894 | ret = wait_for_response(hdev, &comp); | |
4daace0d | 2895 | |
c3635da2 | 2896 | return ret; |
4daace0d JO |
2897 | } |
2898 | ||
2899 | /** | |
2900 | * hv_send_resources_allocated() - Report local resource choices | |
2901 | * @hdev: VMBus's tracking struct for this root PCI bus | |
2902 | * | |
2903 | * The host OS is expecting to be sent a request as a message | |
2904 | * which contains all the resources that the device will use. | |
2905 | * The response contains those same resources, "translated" | |
2906 | * which is to say, the values which should be used by the | |
2907 | * hardware, when it delivers an interrupt. (MMIO resources are | |
2908 | * used in local terms.) This is nice for Windows, and lines up | |
2909 | * with the FDO/PDO split, which doesn't exist in Linux. Linux | |
2910 | * is deeply expecting to scan an emulated PCI configuration | |
2911 | * space. So this message is sent here only to drive the state | |
2912 | * machine on the host forward. | |
2913 | * | |
2914 | * Return: 0 on success, -errno on failure | |
2915 | */ | |
2916 | static int hv_send_resources_allocated(struct hv_device *hdev) | |
2917 | { | |
2918 | struct hv_pcibus_device *hbus = hv_get_drvdata(hdev); | |
2919 | struct pci_resources_assigned *res_assigned; | |
7dcf90e9 | 2920 | struct pci_resources_assigned2 *res_assigned2; |
4daace0d JO |
2921 | struct hv_pci_compl comp_pkt; |
2922 | struct hv_pci_dev *hpdev; | |
2923 | struct pci_packet *pkt; | |
7dcf90e9 | 2924 | size_t size_res; |
83cc3508 | 2925 | int wslot; |
4daace0d JO |
2926 | int ret; |
2927 | ||
14ef39fd | 2928 | size_res = (hbus->protocol_version < PCI_PROTOCOL_VERSION_1_2) |
7dcf90e9 JL |
2929 | ? sizeof(*res_assigned) : sizeof(*res_assigned2); |
2930 | ||
2931 | pkt = kmalloc(sizeof(*pkt) + size_res, GFP_KERNEL); | |
4daace0d JO |
2932 | if (!pkt) |
2933 | return -ENOMEM; | |
2934 | ||
2935 | ret = 0; | |
2936 | ||
2937 | for (wslot = 0; wslot < 256; wslot++) { | |
2938 | hpdev = get_pcichild_wslot(hbus, wslot); | |
2939 | if (!hpdev) | |
2940 | continue; | |
2941 | ||
7dcf90e9 | 2942 | memset(pkt, 0, sizeof(*pkt) + size_res); |
4daace0d JO |
2943 | init_completion(&comp_pkt.host_event); |
2944 | pkt->completion_func = hv_pci_generic_compl; | |
2945 | pkt->compl_ctxt = &comp_pkt; | |
4daace0d | 2946 | |
14ef39fd | 2947 | if (hbus->protocol_version < PCI_PROTOCOL_VERSION_1_2) { |
7dcf90e9 JL |
2948 | res_assigned = |
2949 | (struct pci_resources_assigned *)&pkt->message; | |
2950 | res_assigned->message_type.type = | |
2951 | PCI_RESOURCES_ASSIGNED; | |
2952 | res_assigned->wslot.slot = hpdev->desc.win_slot.slot; | |
2953 | } else { | |
2954 | res_assigned2 = | |
2955 | (struct pci_resources_assigned2 *)&pkt->message; | |
2956 | res_assigned2->message_type.type = | |
2957 | PCI_RESOURCES_ASSIGNED2; | |
2958 | res_assigned2->wslot.slot = hpdev->desc.win_slot.slot; | |
2959 | } | |
8c99e120 | 2960 | put_pcichild(hpdev); |
4daace0d | 2961 | |
7dcf90e9 JL |
2962 | ret = vmbus_sendpacket(hdev->channel, &pkt->message, |
2963 | size_res, (unsigned long)pkt, | |
2964 | VM_PKT_DATA_INBAND, | |
2965 | VMBUS_DATA_PACKET_FLAG_COMPLETION_REQUESTED); | |
c3635da2 DC |
2966 | if (!ret) |
2967 | ret = wait_for_response(hdev, &comp_pkt.host_event); | |
4daace0d JO |
2968 | if (ret) |
2969 | break; | |
2970 | ||
4daace0d JO |
2971 | if (comp_pkt.completion_status < 0) { |
2972 | ret = -EPROTO; | |
2973 | dev_err(&hdev->device, | |
2974 | "resource allocated returned 0x%x", | |
2975 | comp_pkt.completion_status); | |
2976 | break; | |
2977 | } | |
83cc3508 WH |
2978 | |
2979 | hbus->wslot_res_allocated = wslot; | |
4daace0d JO |
2980 | } |
2981 | ||
2982 | kfree(pkt); | |
2983 | return ret; | |
2984 | } | |
2985 | ||
2986 | /** | |
2987 | * hv_send_resources_released() - Report local resources | |
2988 | * released | |
2989 | * @hdev: VMBus's tracking struct for this root PCI bus | |
2990 | * | |
2991 | * Return: 0 on success, -errno on failure | |
2992 | */ | |
2993 | static int hv_send_resources_released(struct hv_device *hdev) | |
2994 | { | |
2995 | struct hv_pcibus_device *hbus = hv_get_drvdata(hdev); | |
2996 | struct pci_child_message pkt; | |
2997 | struct hv_pci_dev *hpdev; | |
83cc3508 | 2998 | int wslot; |
4daace0d JO |
2999 | int ret; |
3000 | ||
83cc3508 | 3001 | for (wslot = hbus->wslot_res_allocated; wslot >= 0; wslot--) { |
4daace0d JO |
3002 | hpdev = get_pcichild_wslot(hbus, wslot); |
3003 | if (!hpdev) | |
3004 | continue; | |
3005 | ||
3006 | memset(&pkt, 0, sizeof(pkt)); | |
0c6045d8 | 3007 | pkt.message_type.type = PCI_RESOURCES_RELEASED; |
4daace0d JO |
3008 | pkt.wslot.slot = hpdev->desc.win_slot.slot; |
3009 | ||
8c99e120 | 3010 | put_pcichild(hpdev); |
4daace0d JO |
3011 | |
3012 | ret = vmbus_sendpacket(hdev->channel, &pkt, sizeof(pkt), 0, | |
3013 | VM_PKT_DATA_INBAND, 0); | |
3014 | if (ret) | |
3015 | return ret; | |
83cc3508 WH |
3016 | |
3017 | hbus->wslot_res_allocated = wslot - 1; | |
4daace0d JO |
3018 | } |
3019 | ||
83cc3508 WH |
3020 | hbus->wslot_res_allocated = -1; |
3021 | ||
4daace0d JO |
3022 | return 0; |
3023 | } | |
3024 | ||
be700103 HZ |
3025 | #define HVPCI_DOM_MAP_SIZE (64 * 1024) |
3026 | static DECLARE_BITMAP(hvpci_dom_map, HVPCI_DOM_MAP_SIZE); | |
3027 | ||
3028 | /* | |
3029 | * PCI domain number 0 is used by emulated devices on Gen1 VMs, so define 0 | |
3030 | * as invalid for passthrough PCI devices of this driver. | |
3031 | */ | |
3032 | #define HVPCI_DOM_INVALID 0 | |
3033 | ||
3034 | /** | |
3035 | * hv_get_dom_num() - Get a valid PCI domain number | |
3036 | * Check if the PCI domain number is in use, and return another number if | |
3037 | * it is in use. | |
3038 | * | |
3039 | * @dom: Requested domain number | |
3040 | * | |
3041 | * return: domain number on success, HVPCI_DOM_INVALID on failure | |
3042 | */ | |
3043 | static u16 hv_get_dom_num(u16 dom) | |
3044 | { | |
3045 | unsigned int i; | |
3046 | ||
3047 | if (test_and_set_bit(dom, hvpci_dom_map) == 0) | |
3048 | return dom; | |
3049 | ||
3050 | for_each_clear_bit(i, hvpci_dom_map, HVPCI_DOM_MAP_SIZE) { | |
3051 | if (test_and_set_bit(i, hvpci_dom_map) == 0) | |
3052 | return i; | |
3053 | } | |
3054 | ||
3055 | return HVPCI_DOM_INVALID; | |
3056 | } | |
3057 | ||
3058 | /** | |
3059 | * hv_put_dom_num() - Mark the PCI domain number as free | |
3060 | * @dom: Domain number to be freed | |
3061 | */ | |
3062 | static void hv_put_dom_num(u16 dom) | |
3063 | { | |
3064 | clear_bit(dom, hvpci_dom_map); | |
3065 | } | |
3066 | ||
4daace0d JO |
3067 | /** |
3068 | * hv_pci_probe() - New VMBus channel probe, for a root PCI bus | |
3069 | * @hdev: VMBus's tracking struct for this root PCI bus | |
3070 | * @dev_id: Identifies the device itself | |
3071 | * | |
3072 | * Return: 0 on success, -errno on failure | |
3073 | */ | |
3074 | static int hv_pci_probe(struct hv_device *hdev, | |
3075 | const struct hv_vmbus_device_id *dev_id) | |
3076 | { | |
418cb6c8 | 3077 | struct pci_host_bridge *bridge; |
4daace0d | 3078 | struct hv_pcibus_device *hbus; |
be700103 | 3079 | u16 dom_req, dom; |
467a3bb9 | 3080 | char *name; |
d6af2ed2 | 3081 | bool enter_d0_retry = true; |
4daace0d JO |
3082 | int ret; |
3083 | ||
be66b673 JL |
3084 | /* |
3085 | * hv_pcibus_device contains the hypercall arguments for retargeting in | |
3086 | * hv_irq_unmask(). Those must not cross a page boundary. | |
3087 | */ | |
877b911a | 3088 | BUILD_BUG_ON(sizeof(*hbus) > HV_HYP_PAGE_SIZE); |
be66b673 | 3089 | |
418cb6c8 AB |
3090 | bridge = devm_pci_alloc_host_bridge(&hdev->device, 0); |
3091 | if (!bridge) | |
3092 | return -ENOMEM; | |
3093 | ||
877b911a DC |
3094 | /* |
3095 | * With the recent 59bb47985c1d ("mm, sl[aou]b: guarantee natural | |
3096 | * alignment for kmalloc(power-of-two)"), kzalloc() is able to allocate | |
3097 | * a 4KB buffer that is guaranteed to be 4KB-aligned. Here the size and | |
3098 | * alignment of hbus is important because hbus's field | |
3099 | * retarget_msi_interrupt_params must not cross a 4KB page boundary. | |
3100 | * | |
3101 | * Here we prefer kzalloc to get_zeroed_page(), because a buffer | |
3102 | * allocated by the latter is not tracked and scanned by kmemleak, and | |
3103 | * hence kmemleak reports the pointer contained in the hbus buffer | |
3104 | * (i.e. the hpdev struct, which is created in new_pcichild_device() and | |
3105 | * is tracked by hbus->children) as memory leak (false positive). | |
3106 | * | |
3107 | * If the kernel doesn't have 59bb47985c1d, get_zeroed_page() *must* be | |
3108 | * used to allocate the hbus buffer and we can avoid the kmemleak false | |
3109 | * positive by using kmemleak_alloc() and kmemleak_free() to ask | |
3110 | * kmemleak to track and scan the hbus buffer. | |
3111 | */ | |
e658a4fe | 3112 | hbus = kzalloc(HV_HYP_PAGE_SIZE, GFP_KERNEL); |
4daace0d JO |
3113 | if (!hbus) |
3114 | return -ENOMEM; | |
418cb6c8 AB |
3115 | |
3116 | hbus->bridge = bridge; | |
d3a78d8b | 3117 | hbus->state = hv_pcibus_init; |
83cc3508 | 3118 | hbus->wslot_res_allocated = -1; |
4daace0d JO |
3119 | |
3120 | /* | |
be700103 HZ |
3121 | * The PCI bus "domain" is what is called "segment" in ACPI and other |
3122 | * specs. Pull it from the instance ID, to get something usually | |
3123 | * unique. In rare cases of collision, we will find out another number | |
3124 | * not in use. | |
3125 | * | |
3126 | * Note that, since this code only runs in a Hyper-V VM, Hyper-V | |
3127 | * together with this guest driver can guarantee that (1) The only | |
3128 | * domain used by Gen1 VMs for something that looks like a physical | |
3129 | * PCI bus (which is actually emulated by the hypervisor) is domain 0. | |
3130 | * (2) There will be no overlap between domains (after fixing possible | |
3131 | * collisions) in the same VM. | |
4daace0d | 3132 | */ |
f73f8a50 | 3133 | dom_req = hdev->dev_instance.b[5] << 8 | hdev->dev_instance.b[4]; |
be700103 HZ |
3134 | dom = hv_get_dom_num(dom_req); |
3135 | ||
3136 | if (dom == HVPCI_DOM_INVALID) { | |
3137 | dev_err(&hdev->device, | |
3138 | "Unable to use dom# 0x%hx or other numbers", dom_req); | |
3139 | ret = -EINVAL; | |
3140 | goto free_bus; | |
3141 | } | |
3142 | ||
3143 | if (dom != dom_req) | |
3144 | dev_info(&hdev->device, | |
3145 | "PCI dom# 0x%hx has collision, using 0x%hx", | |
3146 | dom_req, dom); | |
3147 | ||
38c0d266 | 3148 | hbus->bridge->domain_nr = dom; |
88f94c7f | 3149 | #ifdef CONFIG_X86 |
be700103 | 3150 | hbus->sysdata.domain = dom; |
88f94c7f | 3151 | #endif |
4daace0d JO |
3152 | |
3153 | hbus->hdev = hdev; | |
4daace0d JO |
3154 | INIT_LIST_HEAD(&hbus->children); |
3155 | INIT_LIST_HEAD(&hbus->dr_list); | |
4daace0d JO |
3156 | spin_lock_init(&hbus->config_lock); |
3157 | spin_lock_init(&hbus->device_list_lock); | |
0de8ce3e | 3158 | spin_lock_init(&hbus->retarget_msi_interrupt_lock); |
021ad274 | 3159 | hbus->wq = alloc_ordered_workqueue("hv_pci_%x", 0, |
38c0d266 | 3160 | hbus->bridge->domain_nr); |
021ad274 DC |
3161 | if (!hbus->wq) { |
3162 | ret = -ENOMEM; | |
be700103 | 3163 | goto free_dom; |
021ad274 | 3164 | } |
4daace0d JO |
3165 | |
3166 | ret = vmbus_open(hdev->channel, pci_ring_size, pci_ring_size, NULL, 0, | |
3167 | hv_pci_onchannelcallback, hbus); | |
3168 | if (ret) | |
021ad274 | 3169 | goto destroy_wq; |
4daace0d JO |
3170 | |
3171 | hv_set_drvdata(hdev, hbus); | |
3172 | ||
a8e37506 DC |
3173 | ret = hv_pci_protocol_negotiation(hdev, pci_protocol_versions, |
3174 | ARRAY_SIZE(pci_protocol_versions)); | |
4daace0d JO |
3175 | if (ret) |
3176 | goto close; | |
3177 | ||
3178 | ret = hv_allocate_config_window(hbus); | |
3179 | if (ret) | |
3180 | goto close; | |
3181 | ||
3182 | hbus->cfg_addr = ioremap(hbus->mem_config->start, | |
3183 | PCI_CONFIG_MMIO_LENGTH); | |
3184 | if (!hbus->cfg_addr) { | |
3185 | dev_err(&hdev->device, | |
3186 | "Unable to map a virtual address for config space\n"); | |
3187 | ret = -ENOMEM; | |
3188 | goto free_config; | |
3189 | } | |
3190 | ||
467a3bb9 MZ |
3191 | name = kasprintf(GFP_KERNEL, "%pUL", &hdev->dev_instance); |
3192 | if (!name) { | |
3193 | ret = -ENOMEM; | |
3194 | goto unmap; | |
3195 | } | |
3196 | ||
9e7f9178 | 3197 | hbus->fwnode = irq_domain_alloc_named_fwnode(name); |
467a3bb9 | 3198 | kfree(name); |
9e7f9178 | 3199 | if (!hbus->fwnode) { |
4daace0d JO |
3200 | ret = -ENOMEM; |
3201 | goto unmap; | |
3202 | } | |
3203 | ||
3204 | ret = hv_pcie_init_irq_domain(hbus); | |
3205 | if (ret) | |
3206 | goto free_fwnode; | |
3207 | ||
d6af2ed2 | 3208 | retry: |
4daace0d JO |
3209 | ret = hv_pci_query_relations(hdev); |
3210 | if (ret) | |
3211 | goto free_irq_domain; | |
3212 | ||
3213 | ret = hv_pci_enter_d0(hdev); | |
d6af2ed2 WH |
3214 | /* |
3215 | * In certain case (Kdump) the pci device of interest was | |
3216 | * not cleanly shut down and resource is still held on host | |
3217 | * side, the host could return invalid device status. | |
3218 | * We need to explicitly request host to release the resource | |
3219 | * and try to enter D0 again. | |
3220 | * Since the hv_pci_bus_exit() call releases structures | |
3221 | * of all its child devices, we need to start the retry from | |
3222 | * hv_pci_query_relations() call, requesting host to send | |
3223 | * the synchronous child device relations message before this | |
3224 | * information is needed in hv_send_resources_allocated() | |
3225 | * call later. | |
3226 | */ | |
3227 | if (ret == -EPROTO && enter_d0_retry) { | |
3228 | enter_d0_retry = false; | |
3229 | ||
3230 | dev_err(&hdev->device, "Retrying D0 Entry\n"); | |
3231 | ||
3232 | /* | |
3233 | * Hv_pci_bus_exit() calls hv_send_resources_released() | |
3234 | * to free up resources of its child devices. | |
3235 | * In the kdump kernel we need to set the | |
3236 | * wslot_res_allocated to 255 so it scans all child | |
3237 | * devices to release resources allocated in the | |
3238 | * normal kernel before panic happened. | |
3239 | */ | |
3240 | hbus->wslot_res_allocated = 255; | |
3241 | ret = hv_pci_bus_exit(hdev, true); | |
3242 | ||
3243 | if (ret == 0) | |
3244 | goto retry; | |
3245 | ||
3246 | dev_err(&hdev->device, | |
3247 | "Retrying D0 failed with ret %d\n", ret); | |
3248 | } | |
4daace0d JO |
3249 | if (ret) |
3250 | goto free_irq_domain; | |
3251 | ||
3252 | ret = hv_pci_allocate_bridge_windows(hbus); | |
3253 | if (ret) | |
83cc3508 | 3254 | goto exit_d0; |
4daace0d JO |
3255 | |
3256 | ret = hv_send_resources_allocated(hdev); | |
3257 | if (ret) | |
3258 | goto free_windows; | |
3259 | ||
3260 | prepopulate_bars(hbus); | |
3261 | ||
3262 | hbus->state = hv_pcibus_probed; | |
3263 | ||
3264 | ret = create_root_hv_pci_bus(hbus); | |
3265 | if (ret) | |
3266 | goto free_windows; | |
3267 | ||
3268 | return 0; | |
3269 | ||
3270 | free_windows: | |
3271 | hv_pci_free_bridge_windows(hbus); | |
83cc3508 WH |
3272 | exit_d0: |
3273 | (void) hv_pci_bus_exit(hdev, true); | |
4daace0d JO |
3274 | free_irq_domain: |
3275 | irq_domain_remove(hbus->irq_domain); | |
3276 | free_fwnode: | |
9e7f9178 | 3277 | irq_domain_free_fwnode(hbus->fwnode); |
4daace0d JO |
3278 | unmap: |
3279 | iounmap(hbus->cfg_addr); | |
3280 | free_config: | |
3281 | hv_free_config_window(hbus); | |
3282 | close: | |
3283 | vmbus_close(hdev->channel); | |
021ad274 DC |
3284 | destroy_wq: |
3285 | destroy_workqueue(hbus->wq); | |
be700103 | 3286 | free_dom: |
38c0d266 | 3287 | hv_put_dom_num(hbus->bridge->domain_nr); |
4daace0d | 3288 | free_bus: |
42c3d418 | 3289 | kfree(hbus); |
4daace0d JO |
3290 | return ret; |
3291 | } | |
3292 | ||
c81992e7 | 3293 | static int hv_pci_bus_exit(struct hv_device *hdev, bool keep_devs) |
4daace0d | 3294 | { |
17978524 DC |
3295 | struct hv_pcibus_device *hbus = hv_get_drvdata(hdev); |
3296 | struct { | |
4daace0d | 3297 | struct pci_packet teardown_packet; |
17978524 | 3298 | u8 buffer[sizeof(struct pci_message)]; |
4daace0d | 3299 | } pkt; |
4daace0d | 3300 | struct hv_pci_compl comp_pkt; |
94d22763 LL |
3301 | struct hv_pci_dev *hpdev, *tmp; |
3302 | unsigned long flags; | |
17978524 | 3303 | int ret; |
4daace0d | 3304 | |
17978524 DC |
3305 | /* |
3306 | * After the host sends the RESCIND_CHANNEL message, it doesn't | |
3307 | * access the per-channel ringbuffer any longer. | |
3308 | */ | |
3309 | if (hdev->channel->rescind) | |
a8e37506 | 3310 | return 0; |
17978524 | 3311 | |
c81992e7 | 3312 | if (!keep_devs) { |
41608b64 LL |
3313 | struct list_head removed; |
3314 | ||
3315 | /* Move all present children to the list on stack */ | |
3316 | INIT_LIST_HEAD(&removed); | |
94d22763 | 3317 | spin_lock_irqsave(&hbus->device_list_lock, flags); |
41608b64 LL |
3318 | list_for_each_entry_safe(hpdev, tmp, &hbus->children, list_entry) |
3319 | list_move_tail(&hpdev->list_entry, &removed); | |
3320 | spin_unlock_irqrestore(&hbus->device_list_lock, flags); | |
3321 | ||
3322 | /* Remove all children in the list */ | |
3323 | list_for_each_entry_safe(hpdev, tmp, &removed, list_entry) { | |
94d22763 LL |
3324 | list_del(&hpdev->list_entry); |
3325 | if (hpdev->pci_slot) | |
3326 | pci_destroy_slot(hpdev->pci_slot); | |
3327 | /* For the two refs got in new_pcichild_device() */ | |
3328 | put_pcichild(hpdev); | |
3329 | put_pcichild(hpdev); | |
3330 | } | |
a8e37506 | 3331 | } |
17978524 DC |
3332 | |
3333 | ret = hv_send_resources_released(hdev); | |
a8e37506 | 3334 | if (ret) { |
17978524 DC |
3335 | dev_err(&hdev->device, |
3336 | "Couldn't send resources released packet(s)\n"); | |
a8e37506 DC |
3337 | return ret; |
3338 | } | |
4daace0d | 3339 | |
4daace0d JO |
3340 | memset(&pkt.teardown_packet, 0, sizeof(pkt.teardown_packet)); |
3341 | init_completion(&comp_pkt.host_event); | |
3342 | pkt.teardown_packet.completion_func = hv_pci_generic_compl; | |
3343 | pkt.teardown_packet.compl_ctxt = &comp_pkt; | |
0c6045d8 | 3344 | pkt.teardown_packet.message[0].type = PCI_BUS_D0EXIT; |
4daace0d JO |
3345 | |
3346 | ret = vmbus_sendpacket(hdev->channel, &pkt.teardown_packet.message, | |
3347 | sizeof(struct pci_message), | |
3348 | (unsigned long)&pkt.teardown_packet, | |
3349 | VM_PKT_DATA_INBAND, | |
3350 | VMBUS_DATA_PACKET_FLAG_COMPLETION_REQUESTED); | |
a8e37506 DC |
3351 | if (ret) |
3352 | return ret; | |
3353 | ||
3354 | if (wait_for_completion_timeout(&comp_pkt.host_event, 10 * HZ) == 0) | |
3355 | return -ETIMEDOUT; | |
3356 | ||
3357 | return 0; | |
17978524 DC |
3358 | } |
3359 | ||
3360 | /** | |
3361 | * hv_pci_remove() - Remove routine for this VMBus channel | |
3362 | * @hdev: VMBus's tracking struct for this root PCI bus | |
3363 | * | |
3364 | * Return: 0 on success, -errno on failure | |
3365 | */ | |
3366 | static int hv_pci_remove(struct hv_device *hdev) | |
3367 | { | |
3368 | struct hv_pcibus_device *hbus; | |
a8e37506 | 3369 | int ret; |
4daace0d | 3370 | |
17978524 | 3371 | hbus = hv_get_drvdata(hdev); |
4daace0d | 3372 | if (hbus->state == hv_pcibus_installed) { |
94d22763 LL |
3373 | tasklet_disable(&hdev->channel->callback_event); |
3374 | hbus->state = hv_pcibus_removing; | |
3375 | tasklet_enable(&hdev->channel->callback_event); | |
3376 | destroy_workqueue(hbus->wq); | |
3377 | hbus->wq = NULL; | |
3378 | /* | |
3379 | * At this point, no work is running or can be scheduled | |
3380 | * on hbus-wq. We can't race with hv_pci_devices_present() | |
3381 | * or hv_pci_eject_device(), it's safe to proceed. | |
3382 | */ | |
3383 | ||
4daace0d JO |
3384 | /* Remove the bus from PCI's point of view. */ |
3385 | pci_lock_rescan_remove(); | |
418cb6c8 | 3386 | pci_stop_root_bus(hbus->bridge->bus); |
15becc2b | 3387 | hv_pci_remove_slots(hbus); |
418cb6c8 | 3388 | pci_remove_root_bus(hbus->bridge->bus); |
4daace0d JO |
3389 | pci_unlock_rescan_remove(); |
3390 | } | |
3391 | ||
a8e37506 | 3392 | ret = hv_pci_bus_exit(hdev, false); |
deb22e5c | 3393 | |
4daace0d JO |
3394 | vmbus_close(hdev->channel); |
3395 | ||
4daace0d JO |
3396 | iounmap(hbus->cfg_addr); |
3397 | hv_free_config_window(hbus); | |
4daace0d JO |
3398 | hv_pci_free_bridge_windows(hbus); |
3399 | irq_domain_remove(hbus->irq_domain); | |
9e7f9178 | 3400 | irq_domain_free_fwnode(hbus->fwnode); |
be700103 | 3401 | |
38c0d266 | 3402 | hv_put_dom_num(hbus->bridge->domain_nr); |
be700103 | 3403 | |
877b911a | 3404 | kfree(hbus); |
a8e37506 | 3405 | return ret; |
4daace0d JO |
3406 | } |
3407 | ||
ac82fc83 DC |
3408 | static int hv_pci_suspend(struct hv_device *hdev) |
3409 | { | |
3410 | struct hv_pcibus_device *hbus = hv_get_drvdata(hdev); | |
3411 | enum hv_pcibus_state old_state; | |
3412 | int ret; | |
3413 | ||
3414 | /* | |
3415 | * hv_pci_suspend() must make sure there are no pending work items | |
3416 | * before calling vmbus_close(), since it runs in a process context | |
3417 | * as a callback in dpm_suspend(). When it starts to run, the channel | |
3418 | * callback hv_pci_onchannelcallback(), which runs in a tasklet | |
3419 | * context, can be still running concurrently and scheduling new work | |
3420 | * items onto hbus->wq in hv_pci_devices_present() and | |
3421 | * hv_pci_eject_device(), and the work item handlers can access the | |
3422 | * vmbus channel, which can be being closed by hv_pci_suspend(), e.g. | |
3423 | * the work item handler pci_devices_present_work() -> | |
3424 | * new_pcichild_device() writes to the vmbus channel. | |
3425 | * | |
3426 | * To eliminate the race, hv_pci_suspend() disables the channel | |
3427 | * callback tasklet, sets hbus->state to hv_pcibus_removing, and | |
3428 | * re-enables the tasklet. This way, when hv_pci_suspend() proceeds, | |
3429 | * it knows that no new work item can be scheduled, and then it flushes | |
3430 | * hbus->wq and safely closes the vmbus channel. | |
3431 | */ | |
3432 | tasklet_disable(&hdev->channel->callback_event); | |
3433 | ||
3434 | /* Change the hbus state to prevent new work items. */ | |
3435 | old_state = hbus->state; | |
3436 | if (hbus->state == hv_pcibus_installed) | |
3437 | hbus->state = hv_pcibus_removing; | |
3438 | ||
3439 | tasklet_enable(&hdev->channel->callback_event); | |
3440 | ||
3441 | if (old_state != hv_pcibus_installed) | |
3442 | return -EINVAL; | |
3443 | ||
3444 | flush_workqueue(hbus->wq); | |
3445 | ||
3446 | ret = hv_pci_bus_exit(hdev, true); | |
3447 | if (ret) | |
3448 | return ret; | |
3449 | ||
3450 | vmbus_close(hdev->channel); | |
3451 | ||
4daace0d JO |
3452 | return 0; |
3453 | } | |
3454 | ||
915cff7f DC |
3455 | static int hv_pci_restore_msi_msg(struct pci_dev *pdev, void *arg) |
3456 | { | |
3457 | struct msi_desc *entry; | |
3458 | struct irq_data *irq_data; | |
3459 | ||
3460 | for_each_pci_msi_entry(entry, pdev) { | |
3461 | irq_data = irq_get_irq_data(entry->irq); | |
3462 | if (WARN_ON_ONCE(!irq_data)) | |
3463 | return -EINVAL; | |
3464 | ||
3465 | hv_compose_msi_msg(irq_data, &entry->msg); | |
3466 | } | |
3467 | ||
3468 | return 0; | |
3469 | } | |
3470 | ||
3471 | /* | |
3472 | * Upon resume, pci_restore_msi_state() -> ... -> __pci_write_msi_msg() | |
3473 | * directly writes the MSI/MSI-X registers via MMIO, but since Hyper-V | |
3474 | * doesn't trap and emulate the MMIO accesses, here hv_compose_msi_msg() | |
3475 | * must be used to ask Hyper-V to re-create the IOMMU Interrupt Remapping | |
3476 | * Table entries. | |
3477 | */ | |
3478 | static void hv_pci_restore_msi_state(struct hv_pcibus_device *hbus) | |
3479 | { | |
418cb6c8 | 3480 | pci_walk_bus(hbus->bridge->bus, hv_pci_restore_msi_msg, NULL); |
915cff7f DC |
3481 | } |
3482 | ||
ac82fc83 DC |
3483 | static int hv_pci_resume(struct hv_device *hdev) |
3484 | { | |
3485 | struct hv_pcibus_device *hbus = hv_get_drvdata(hdev); | |
3486 | enum pci_protocol_version_t version[1]; | |
3487 | int ret; | |
3488 | ||
3489 | hbus->state = hv_pcibus_init; | |
3490 | ||
3491 | ret = vmbus_open(hdev->channel, pci_ring_size, pci_ring_size, NULL, 0, | |
3492 | hv_pci_onchannelcallback, hbus); | |
3493 | if (ret) | |
3494 | return ret; | |
3495 | ||
3496 | /* Only use the version that was in use before hibernation. */ | |
14ef39fd | 3497 | version[0] = hbus->protocol_version; |
ac82fc83 DC |
3498 | ret = hv_pci_protocol_negotiation(hdev, version, 1); |
3499 | if (ret) | |
3500 | goto out; | |
3501 | ||
3502 | ret = hv_pci_query_relations(hdev); | |
3503 | if (ret) | |
3504 | goto out; | |
3505 | ||
3506 | ret = hv_pci_enter_d0(hdev); | |
3507 | if (ret) | |
3508 | goto out; | |
3509 | ||
3510 | ret = hv_send_resources_allocated(hdev); | |
3511 | if (ret) | |
3512 | goto out; | |
3513 | ||
3514 | prepopulate_bars(hbus); | |
3515 | ||
915cff7f DC |
3516 | hv_pci_restore_msi_state(hbus); |
3517 | ||
ac82fc83 DC |
3518 | hbus->state = hv_pcibus_installed; |
3519 | return 0; | |
3520 | out: | |
3521 | vmbus_close(hdev->channel); | |
3522 | return ret; | |
3523 | } | |
3524 | ||
4daace0d JO |
3525 | static const struct hv_vmbus_device_id hv_pci_id_table[] = { |
3526 | /* PCI Pass-through Class ID */ | |
3527 | /* 44C4F61D-4444-4400-9D52-802E27EDE19F */ | |
3528 | { HV_PCIE_GUID, }, | |
3529 | { }, | |
3530 | }; | |
3531 | ||
3532 | MODULE_DEVICE_TABLE(vmbus, hv_pci_id_table); | |
3533 | ||
3534 | static struct hv_driver hv_pci_drv = { | |
3535 | .name = "hv_pci", | |
3536 | .id_table = hv_pci_id_table, | |
3537 | .probe = hv_pci_probe, | |
3538 | .remove = hv_pci_remove, | |
ac82fc83 DC |
3539 | .suspend = hv_pci_suspend, |
3540 | .resume = hv_pci_resume, | |
4daace0d JO |
3541 | }; |
3542 | ||
3543 | static void __exit exit_hv_pci_drv(void) | |
3544 | { | |
3545 | vmbus_driver_unregister(&hv_pci_drv); | |
348dd93e HZ |
3546 | |
3547 | hvpci_block_ops.read_block = NULL; | |
3548 | hvpci_block_ops.write_block = NULL; | |
3549 | hvpci_block_ops.reg_blk_invalidate = NULL; | |
4daace0d JO |
3550 | } |
3551 | ||
3552 | static int __init init_hv_pci_drv(void) | |
3553 | { | |
7d815f4a HZ |
3554 | if (!hv_is_hyperv_initialized()) |
3555 | return -ENODEV; | |
3556 | ||
be700103 HZ |
3557 | /* Set the invalid domain number's bit, so it will not be used */ |
3558 | set_bit(HVPCI_DOM_INVALID, hvpci_dom_map); | |
3559 | ||
348dd93e HZ |
3560 | /* Initialize PCI block r/w interface */ |
3561 | hvpci_block_ops.read_block = hv_read_config_block; | |
3562 | hvpci_block_ops.write_block = hv_write_config_block; | |
3563 | hvpci_block_ops.reg_blk_invalidate = hv_register_block_invalidate; | |
3564 | ||
4daace0d JO |
3565 | return vmbus_driver_register(&hv_pci_drv); |
3566 | } | |
3567 | ||
3568 | module_init(init_hv_pci_drv); | |
3569 | module_exit(exit_hv_pci_drv); | |
3570 | ||
3571 | MODULE_DESCRIPTION("Hyper-V PCI"); | |
3572 | MODULE_LICENSE("GPL v2"); |