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Commit | Line | Data |
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d1b054da YZ |
1 | /* |
2 | * drivers/pci/iov.c | |
3 | * | |
4 | * Copyright (C) 2009 Intel Corporation, Yu Zhao <yu.zhao@intel.com> | |
5 | * | |
6 | * PCI Express I/O Virtualization (IOV) support. | |
7 | * Single Root IOV 1.0 | |
302b4215 | 8 | * Address Translation Service 1.0 |
d1b054da YZ |
9 | */ |
10 | ||
11 | #include <linux/pci.h> | |
5a0e3ad6 | 12 | #include <linux/slab.h> |
d1b054da | 13 | #include <linux/mutex.h> |
363c75db | 14 | #include <linux/export.h> |
d1b054da YZ |
15 | #include <linux/string.h> |
16 | #include <linux/delay.h> | |
5cdede24 | 17 | #include <linux/pci-ats.h> |
d1b054da YZ |
18 | #include "pci.h" |
19 | ||
dd7cc44d | 20 | #define VIRTFN_ID_LEN 16 |
d1b054da | 21 | |
b07579c0 | 22 | int pci_iov_virtfn_bus(struct pci_dev *dev, int vf_id) |
a28724b0 | 23 | { |
b07579c0 WY |
24 | if (!dev->is_physfn) |
25 | return -EINVAL; | |
a28724b0 | 26 | return dev->bus->number + ((dev->devfn + dev->sriov->offset + |
b07579c0 | 27 | dev->sriov->stride * vf_id) >> 8); |
a28724b0 YZ |
28 | } |
29 | ||
b07579c0 | 30 | int pci_iov_virtfn_devfn(struct pci_dev *dev, int vf_id) |
a28724b0 | 31 | { |
b07579c0 WY |
32 | if (!dev->is_physfn) |
33 | return -EINVAL; | |
a28724b0 | 34 | return (dev->devfn + dev->sriov->offset + |
b07579c0 | 35 | dev->sriov->stride * vf_id) & 0xff; |
a28724b0 YZ |
36 | } |
37 | ||
f59dca27 WY |
38 | /* |
39 | * Per SR-IOV spec sec 3.3.10 and 3.3.11, First VF Offset and VF Stride may | |
40 | * change when NumVFs changes. | |
41 | * | |
42 | * Update iov->offset and iov->stride when NumVFs is written. | |
43 | */ | |
44 | static inline void pci_iov_set_numvfs(struct pci_dev *dev, int nr_virtfn) | |
45 | { | |
46 | struct pci_sriov *iov = dev->sriov; | |
47 | ||
48 | pci_write_config_word(dev, iov->pos + PCI_SRIOV_NUM_VF, nr_virtfn); | |
49 | pci_read_config_word(dev, iov->pos + PCI_SRIOV_VF_OFFSET, &iov->offset); | |
50 | pci_read_config_word(dev, iov->pos + PCI_SRIOV_VF_STRIDE, &iov->stride); | |
51 | } | |
52 | ||
4449f079 WY |
53 | /* |
54 | * The PF consumes one bus number. NumVFs, First VF Offset, and VF Stride | |
55 | * determine how many additional bus numbers will be consumed by VFs. | |
56 | * | |
ea9a8854 AD |
57 | * Iterate over all valid NumVFs, validate offset and stride, and calculate |
58 | * the maximum number of bus numbers that could ever be required. | |
4449f079 | 59 | */ |
ea9a8854 | 60 | static int compute_max_vf_buses(struct pci_dev *dev) |
4449f079 WY |
61 | { |
62 | struct pci_sriov *iov = dev->sriov; | |
ea9a8854 | 63 | int nr_virtfn, busnr, rc = 0; |
4449f079 | 64 | |
ea9a8854 | 65 | for (nr_virtfn = iov->total_VFs; nr_virtfn; nr_virtfn--) { |
4449f079 | 66 | pci_iov_set_numvfs(dev, nr_virtfn); |
ea9a8854 AD |
67 | if (!iov->offset || (nr_virtfn > 1 && !iov->stride)) { |
68 | rc = -EIO; | |
69 | goto out; | |
70 | } | |
71 | ||
b07579c0 | 72 | busnr = pci_iov_virtfn_bus(dev, nr_virtfn - 1); |
ea9a8854 AD |
73 | if (busnr > iov->max_VF_buses) |
74 | iov->max_VF_buses = busnr; | |
4449f079 WY |
75 | } |
76 | ||
ea9a8854 AD |
77 | out: |
78 | pci_iov_set_numvfs(dev, 0); | |
79 | return rc; | |
4449f079 WY |
80 | } |
81 | ||
dd7cc44d YZ |
82 | static struct pci_bus *virtfn_add_bus(struct pci_bus *bus, int busnr) |
83 | { | |
dd7cc44d YZ |
84 | struct pci_bus *child; |
85 | ||
86 | if (bus->number == busnr) | |
87 | return bus; | |
88 | ||
89 | child = pci_find_bus(pci_domain_nr(bus), busnr); | |
90 | if (child) | |
91 | return child; | |
92 | ||
93 | child = pci_add_new_bus(bus, NULL, busnr); | |
94 | if (!child) | |
95 | return NULL; | |
96 | ||
b7eac055 | 97 | pci_bus_insert_busn_res(child, busnr, busnr); |
dd7cc44d YZ |
98 | |
99 | return child; | |
100 | } | |
101 | ||
dc087f2f | 102 | static void virtfn_remove_bus(struct pci_bus *physbus, struct pci_bus *virtbus) |
dd7cc44d | 103 | { |
dc087f2f JL |
104 | if (physbus != virtbus && list_empty(&virtbus->devices)) |
105 | pci_remove_bus(virtbus); | |
dd7cc44d YZ |
106 | } |
107 | ||
0e6c9122 WY |
108 | resource_size_t pci_iov_resource_size(struct pci_dev *dev, int resno) |
109 | { | |
110 | if (!dev->is_physfn) | |
111 | return 0; | |
112 | ||
113 | return dev->sriov->barsz[resno - PCI_IOV_RESOURCES]; | |
114 | } | |
115 | ||
c194f7ea | 116 | int pci_iov_add_virtfn(struct pci_dev *dev, int id, int reset) |
dd7cc44d YZ |
117 | { |
118 | int i; | |
dc087f2f | 119 | int rc = -ENOMEM; |
dd7cc44d YZ |
120 | u64 size; |
121 | char buf[VIRTFN_ID_LEN]; | |
122 | struct pci_dev *virtfn; | |
123 | struct resource *res; | |
124 | struct pci_sriov *iov = dev->sriov; | |
8b1fce04 | 125 | struct pci_bus *bus; |
dd7cc44d | 126 | |
b07579c0 | 127 | bus = virtfn_add_bus(dev->bus, pci_iov_virtfn_bus(dev, id)); |
dc087f2f JL |
128 | if (!bus) |
129 | goto failed; | |
130 | ||
131 | virtfn = pci_alloc_dev(bus); | |
dd7cc44d | 132 | if (!virtfn) |
dc087f2f | 133 | goto failed0; |
dd7cc44d | 134 | |
b07579c0 | 135 | virtfn->devfn = pci_iov_virtfn_devfn(dev, id); |
dd7cc44d YZ |
136 | virtfn->vendor = dev->vendor; |
137 | pci_read_config_word(dev, iov->pos + PCI_SRIOV_VF_DID, &virtfn->device); | |
156c5532 PL |
138 | rc = pci_setup_device(virtfn); |
139 | if (rc) | |
140 | goto failed0; | |
141 | ||
dd7cc44d | 142 | virtfn->dev.parent = dev->dev.parent; |
fbf33f51 XH |
143 | virtfn->physfn = pci_dev_get(dev); |
144 | virtfn->is_virtfn = 1; | |
aa931977 | 145 | virtfn->multifunction = 0; |
dd7cc44d YZ |
146 | |
147 | for (i = 0; i < PCI_SRIOV_NUM_BARS; i++) { | |
c1fe1f96 | 148 | res = &dev->resource[i + PCI_IOV_RESOURCES]; |
dd7cc44d YZ |
149 | if (!res->parent) |
150 | continue; | |
151 | virtfn->resource[i].name = pci_name(virtfn); | |
152 | virtfn->resource[i].flags = res->flags; | |
0e6c9122 | 153 | size = pci_iov_resource_size(dev, i + PCI_IOV_RESOURCES); |
dd7cc44d YZ |
154 | virtfn->resource[i].start = res->start + size * id; |
155 | virtfn->resource[i].end = virtfn->resource[i].start + size - 1; | |
156 | rc = request_resource(res, &virtfn->resource[i]); | |
157 | BUG_ON(rc); | |
158 | } | |
159 | ||
160 | if (reset) | |
8c1c699f | 161 | __pci_reset_function(virtfn); |
dd7cc44d YZ |
162 | |
163 | pci_device_add(virtfn, virtfn->bus); | |
dd7cc44d | 164 | |
c893d133 | 165 | pci_bus_add_device(virtfn); |
dd7cc44d YZ |
166 | sprintf(buf, "virtfn%u", id); |
167 | rc = sysfs_create_link(&dev->dev.kobj, &virtfn->dev.kobj, buf); | |
168 | if (rc) | |
169 | goto failed1; | |
170 | rc = sysfs_create_link(&virtfn->dev.kobj, &dev->dev.kobj, "physfn"); | |
171 | if (rc) | |
172 | goto failed2; | |
173 | ||
174 | kobject_uevent(&virtfn->dev.kobj, KOBJ_CHANGE); | |
175 | ||
176 | return 0; | |
177 | ||
178 | failed2: | |
179 | sysfs_remove_link(&dev->dev.kobj, buf); | |
180 | failed1: | |
181 | pci_dev_put(dev); | |
210647af | 182 | pci_stop_and_remove_bus_device(virtfn); |
dc087f2f JL |
183 | failed0: |
184 | virtfn_remove_bus(dev->bus, bus); | |
185 | failed: | |
dd7cc44d YZ |
186 | |
187 | return rc; | |
188 | } | |
189 | ||
c194f7ea | 190 | void pci_iov_remove_virtfn(struct pci_dev *dev, int id, int reset) |
dd7cc44d YZ |
191 | { |
192 | char buf[VIRTFN_ID_LEN]; | |
dd7cc44d | 193 | struct pci_dev *virtfn; |
dd7cc44d | 194 | |
dc087f2f | 195 | virtfn = pci_get_domain_bus_and_slot(pci_domain_nr(dev->bus), |
b07579c0 WY |
196 | pci_iov_virtfn_bus(dev, id), |
197 | pci_iov_virtfn_devfn(dev, id)); | |
dd7cc44d YZ |
198 | if (!virtfn) |
199 | return; | |
200 | ||
dd7cc44d YZ |
201 | if (reset) { |
202 | device_release_driver(&virtfn->dev); | |
8c1c699f | 203 | __pci_reset_function(virtfn); |
dd7cc44d YZ |
204 | } |
205 | ||
206 | sprintf(buf, "virtfn%u", id); | |
207 | sysfs_remove_link(&dev->dev.kobj, buf); | |
09cedbef YL |
208 | /* |
209 | * pci_stop_dev() could have been called for this virtfn already, | |
210 | * so the directory for the virtfn may have been removed before. | |
211 | * Double check to avoid spurious sysfs warnings. | |
212 | */ | |
213 | if (virtfn->dev.kobj.sd) | |
214 | sysfs_remove_link(&virtfn->dev.kobj, "physfn"); | |
dd7cc44d | 215 | |
210647af | 216 | pci_stop_and_remove_bus_device(virtfn); |
dc087f2f | 217 | virtfn_remove_bus(dev->bus, virtfn->bus); |
dd7cc44d | 218 | |
dc087f2f JL |
219 | /* balance pci_get_domain_bus_and_slot() */ |
220 | pci_dev_put(virtfn); | |
dd7cc44d YZ |
221 | pci_dev_put(dev); |
222 | } | |
223 | ||
995df527 WY |
224 | int __weak pcibios_sriov_enable(struct pci_dev *pdev, u16 num_vfs) |
225 | { | |
a39e3fcd AD |
226 | return 0; |
227 | } | |
228 | ||
229 | int __weak pcibios_sriov_disable(struct pci_dev *pdev) | |
230 | { | |
231 | return 0; | |
995df527 WY |
232 | } |
233 | ||
dd7cc44d YZ |
234 | static int sriov_enable(struct pci_dev *dev, int nr_virtfn) |
235 | { | |
236 | int rc; | |
3443c382 | 237 | int i; |
dd7cc44d | 238 | int nres; |
ce288ec3 | 239 | u16 initial; |
dd7cc44d YZ |
240 | struct resource *res; |
241 | struct pci_dev *pdev; | |
242 | struct pci_sriov *iov = dev->sriov; | |
bbef98ab | 243 | int bars = 0; |
b07579c0 | 244 | int bus; |
dd7cc44d YZ |
245 | |
246 | if (!nr_virtfn) | |
247 | return 0; | |
248 | ||
6b136724 | 249 | if (iov->num_VFs) |
dd7cc44d YZ |
250 | return -EINVAL; |
251 | ||
252 | pci_read_config_word(dev, iov->pos + PCI_SRIOV_INITIAL_VF, &initial); | |
6b136724 BH |
253 | if (initial > iov->total_VFs || |
254 | (!(iov->cap & PCI_SRIOV_CAP_VFM) && (initial != iov->total_VFs))) | |
dd7cc44d YZ |
255 | return -EIO; |
256 | ||
6b136724 | 257 | if (nr_virtfn < 0 || nr_virtfn > iov->total_VFs || |
dd7cc44d YZ |
258 | (!(iov->cap & PCI_SRIOV_CAP_VFM) && (nr_virtfn > initial))) |
259 | return -EINVAL; | |
260 | ||
dd7cc44d YZ |
261 | nres = 0; |
262 | for (i = 0; i < PCI_SRIOV_NUM_BARS; i++) { | |
bbef98ab | 263 | bars |= (1 << (i + PCI_IOV_RESOURCES)); |
c1fe1f96 | 264 | res = &dev->resource[i + PCI_IOV_RESOURCES]; |
dd7cc44d YZ |
265 | if (res->parent) |
266 | nres++; | |
267 | } | |
268 | if (nres != iov->nres) { | |
269 | dev_err(&dev->dev, "not enough MMIO resources for SR-IOV\n"); | |
270 | return -ENOMEM; | |
271 | } | |
272 | ||
b07579c0 | 273 | bus = pci_iov_virtfn_bus(dev, nr_virtfn - 1); |
68f8e9fa BH |
274 | if (bus > dev->bus->busn_res.end) { |
275 | dev_err(&dev->dev, "can't enable %d VFs (bus %02x out of range of %pR)\n", | |
276 | nr_virtfn, bus, &dev->bus->busn_res); | |
dd7cc44d YZ |
277 | return -ENOMEM; |
278 | } | |
279 | ||
bbef98ab RP |
280 | if (pci_enable_resources(dev, bars)) { |
281 | dev_err(&dev->dev, "SR-IOV: IOV BARS not allocated\n"); | |
282 | return -ENOMEM; | |
283 | } | |
284 | ||
dd7cc44d YZ |
285 | if (iov->link != dev->devfn) { |
286 | pdev = pci_get_slot(dev->bus, iov->link); | |
287 | if (!pdev) | |
288 | return -ENODEV; | |
289 | ||
dc087f2f JL |
290 | if (!pdev->is_physfn) { |
291 | pci_dev_put(pdev); | |
652d1100 | 292 | return -ENOSYS; |
dc087f2f | 293 | } |
dd7cc44d YZ |
294 | |
295 | rc = sysfs_create_link(&dev->dev.kobj, | |
296 | &pdev->dev.kobj, "dep_link"); | |
dc087f2f | 297 | pci_dev_put(pdev); |
dd7cc44d YZ |
298 | if (rc) |
299 | return rc; | |
300 | } | |
301 | ||
6b136724 | 302 | iov->initial_VFs = initial; |
dd7cc44d YZ |
303 | if (nr_virtfn < initial) |
304 | initial = nr_virtfn; | |
305 | ||
c23b6135 AD |
306 | rc = pcibios_sriov_enable(dev, initial); |
307 | if (rc) { | |
308 | dev_err(&dev->dev, "failure %d from pcibios_sriov_enable()\n", rc); | |
309 | goto err_pcibios; | |
995df527 WY |
310 | } |
311 | ||
f40ec3c7 GS |
312 | pci_iov_set_numvfs(dev, nr_virtfn); |
313 | iov->ctrl |= PCI_SRIOV_CTRL_VFE | PCI_SRIOV_CTRL_MSE; | |
314 | pci_cfg_access_lock(dev); | |
315 | pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl); | |
316 | msleep(100); | |
317 | pci_cfg_access_unlock(dev); | |
318 | ||
dd7cc44d | 319 | for (i = 0; i < initial; i++) { |
c194f7ea | 320 | rc = pci_iov_add_virtfn(dev, i, 0); |
dd7cc44d YZ |
321 | if (rc) |
322 | goto failed; | |
323 | } | |
324 | ||
325 | kobject_uevent(&dev->dev.kobj, KOBJ_CHANGE); | |
6b136724 | 326 | iov->num_VFs = nr_virtfn; |
dd7cc44d YZ |
327 | |
328 | return 0; | |
329 | ||
330 | failed: | |
3443c382 | 331 | while (i--) |
c194f7ea | 332 | pci_iov_remove_virtfn(dev, i, 0); |
dd7cc44d | 333 | |
c23b6135 | 334 | err_pcibios: |
dd7cc44d | 335 | iov->ctrl &= ~(PCI_SRIOV_CTRL_VFE | PCI_SRIOV_CTRL_MSE); |
fb51ccbf | 336 | pci_cfg_access_lock(dev); |
dd7cc44d YZ |
337 | pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl); |
338 | ssleep(1); | |
fb51ccbf | 339 | pci_cfg_access_unlock(dev); |
dd7cc44d | 340 | |
0fc690a7 GS |
341 | pcibios_sriov_disable(dev); |
342 | ||
dd7cc44d YZ |
343 | if (iov->link != dev->devfn) |
344 | sysfs_remove_link(&dev->dev.kobj, "dep_link"); | |
345 | ||
b3908644 | 346 | pci_iov_set_numvfs(dev, 0); |
dd7cc44d YZ |
347 | return rc; |
348 | } | |
349 | ||
350 | static void sriov_disable(struct pci_dev *dev) | |
351 | { | |
352 | int i; | |
353 | struct pci_sriov *iov = dev->sriov; | |
354 | ||
6b136724 | 355 | if (!iov->num_VFs) |
dd7cc44d YZ |
356 | return; |
357 | ||
6b136724 | 358 | for (i = 0; i < iov->num_VFs; i++) |
c194f7ea | 359 | pci_iov_remove_virtfn(dev, i, 0); |
dd7cc44d YZ |
360 | |
361 | iov->ctrl &= ~(PCI_SRIOV_CTRL_VFE | PCI_SRIOV_CTRL_MSE); | |
fb51ccbf | 362 | pci_cfg_access_lock(dev); |
dd7cc44d YZ |
363 | pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl); |
364 | ssleep(1); | |
fb51ccbf | 365 | pci_cfg_access_unlock(dev); |
dd7cc44d | 366 | |
0fc690a7 GS |
367 | pcibios_sriov_disable(dev); |
368 | ||
dd7cc44d YZ |
369 | if (iov->link != dev->devfn) |
370 | sysfs_remove_link(&dev->dev.kobj, "dep_link"); | |
371 | ||
6b136724 | 372 | iov->num_VFs = 0; |
f59dca27 | 373 | pci_iov_set_numvfs(dev, 0); |
dd7cc44d YZ |
374 | } |
375 | ||
d1b054da YZ |
376 | static int sriov_init(struct pci_dev *dev, int pos) |
377 | { | |
0e6c9122 | 378 | int i, bar64; |
d1b054da YZ |
379 | int rc; |
380 | int nres; | |
381 | u32 pgsz; | |
ea9a8854 | 382 | u16 ctrl, total; |
d1b054da YZ |
383 | struct pci_sriov *iov; |
384 | struct resource *res; | |
385 | struct pci_dev *pdev; | |
386 | ||
d1b054da YZ |
387 | pci_read_config_word(dev, pos + PCI_SRIOV_CTRL, &ctrl); |
388 | if (ctrl & PCI_SRIOV_CTRL_VFE) { | |
389 | pci_write_config_word(dev, pos + PCI_SRIOV_CTRL, 0); | |
390 | ssleep(1); | |
391 | } | |
392 | ||
d1b054da YZ |
393 | ctrl = 0; |
394 | list_for_each_entry(pdev, &dev->bus->devices, bus_list) | |
395 | if (pdev->is_physfn) | |
396 | goto found; | |
397 | ||
398 | pdev = NULL; | |
399 | if (pci_ari_enabled(dev->bus)) | |
400 | ctrl |= PCI_SRIOV_CTRL_ARI; | |
401 | ||
402 | found: | |
403 | pci_write_config_word(dev, pos + PCI_SRIOV_CTRL, ctrl); | |
d1b054da | 404 | |
ff45f9dd BS |
405 | pci_read_config_word(dev, pos + PCI_SRIOV_TOTAL_VF, &total); |
406 | if (!total) | |
407 | return 0; | |
d1b054da YZ |
408 | |
409 | pci_read_config_dword(dev, pos + PCI_SRIOV_SUP_PGSIZE, &pgsz); | |
410 | i = PAGE_SHIFT > 12 ? PAGE_SHIFT - 12 : 0; | |
411 | pgsz &= ~((1 << i) - 1); | |
412 | if (!pgsz) | |
413 | return -EIO; | |
414 | ||
415 | pgsz &= ~(pgsz - 1); | |
8161fe91 | 416 | pci_write_config_dword(dev, pos + PCI_SRIOV_SYS_PGSIZE, pgsz); |
d1b054da | 417 | |
0e6c9122 WY |
418 | iov = kzalloc(sizeof(*iov), GFP_KERNEL); |
419 | if (!iov) | |
420 | return -ENOMEM; | |
421 | ||
d1b054da YZ |
422 | nres = 0; |
423 | for (i = 0; i < PCI_SRIOV_NUM_BARS; i++) { | |
c1fe1f96 | 424 | res = &dev->resource[i + PCI_IOV_RESOURCES]; |
11183991 DD |
425 | /* |
426 | * If it is already FIXED, don't change it, something | |
427 | * (perhaps EA or header fixups) wants it this way. | |
428 | */ | |
429 | if (res->flags & IORESOURCE_PCI_FIXED) | |
430 | bar64 = (res->flags & IORESOURCE_MEM_64) ? 1 : 0; | |
431 | else | |
432 | bar64 = __pci_read_base(dev, pci_bar_unknown, res, | |
433 | pos + PCI_SRIOV_BAR + i * 4); | |
d1b054da YZ |
434 | if (!res->flags) |
435 | continue; | |
436 | if (resource_size(res) & (PAGE_SIZE - 1)) { | |
437 | rc = -EIO; | |
438 | goto failed; | |
439 | } | |
0e6c9122 | 440 | iov->barsz[i] = resource_size(res); |
d1b054da | 441 | res->end = res->start + resource_size(res) * total - 1; |
e88ae01d WY |
442 | dev_info(&dev->dev, "VF(n) BAR%d space: %pR (contains BAR%d for %d VFs)\n", |
443 | i, res, i, total); | |
0e6c9122 | 444 | i += bar64; |
d1b054da YZ |
445 | nres++; |
446 | } | |
447 | ||
d1b054da YZ |
448 | iov->pos = pos; |
449 | iov->nres = nres; | |
450 | iov->ctrl = ctrl; | |
6b136724 | 451 | iov->total_VFs = total; |
d1b054da YZ |
452 | iov->pgsz = pgsz; |
453 | iov->self = dev; | |
0e7df224 | 454 | iov->drivers_autoprobe = true; |
d1b054da YZ |
455 | pci_read_config_dword(dev, pos + PCI_SRIOV_CAP, &iov->cap); |
456 | pci_read_config_byte(dev, pos + PCI_SRIOV_FUNC_LINK, &iov->link); | |
62f87c0e | 457 | if (pci_pcie_type(dev) == PCI_EXP_TYPE_RC_END) |
4d135dbe | 458 | iov->link = PCI_DEVFN(PCI_SLOT(dev->devfn), iov->link); |
d1b054da YZ |
459 | |
460 | if (pdev) | |
461 | iov->dev = pci_dev_get(pdev); | |
e277d2fc | 462 | else |
d1b054da | 463 | iov->dev = dev; |
e277d2fc | 464 | |
d1b054da YZ |
465 | dev->sriov = iov; |
466 | dev->is_physfn = 1; | |
ea9a8854 AD |
467 | rc = compute_max_vf_buses(dev); |
468 | if (rc) | |
469 | goto fail_max_buses; | |
d1b054da YZ |
470 | |
471 | return 0; | |
472 | ||
ea9a8854 AD |
473 | fail_max_buses: |
474 | dev->sriov = NULL; | |
475 | dev->is_physfn = 0; | |
d1b054da YZ |
476 | failed: |
477 | for (i = 0; i < PCI_SRIOV_NUM_BARS; i++) { | |
c1fe1f96 | 478 | res = &dev->resource[i + PCI_IOV_RESOURCES]; |
d1b054da YZ |
479 | res->flags = 0; |
480 | } | |
481 | ||
0e6c9122 | 482 | kfree(iov); |
d1b054da YZ |
483 | return rc; |
484 | } | |
485 | ||
486 | static void sriov_release(struct pci_dev *dev) | |
487 | { | |
6b136724 | 488 | BUG_ON(dev->sriov->num_VFs); |
dd7cc44d | 489 | |
e277d2fc | 490 | if (dev != dev->sriov->dev) |
d1b054da YZ |
491 | pci_dev_put(dev->sriov->dev); |
492 | ||
493 | kfree(dev->sriov); | |
494 | dev->sriov = NULL; | |
495 | } | |
496 | ||
8c5cdb6a YZ |
497 | static void sriov_restore_state(struct pci_dev *dev) |
498 | { | |
499 | int i; | |
500 | u16 ctrl; | |
501 | struct pci_sriov *iov = dev->sriov; | |
502 | ||
503 | pci_read_config_word(dev, iov->pos + PCI_SRIOV_CTRL, &ctrl); | |
504 | if (ctrl & PCI_SRIOV_CTRL_VFE) | |
505 | return; | |
506 | ||
507 | for (i = PCI_IOV_RESOURCES; i <= PCI_IOV_RESOURCE_END; i++) | |
508 | pci_update_resource(dev, i); | |
509 | ||
510 | pci_write_config_dword(dev, iov->pos + PCI_SRIOV_SYS_PGSIZE, iov->pgsz); | |
f59dca27 | 511 | pci_iov_set_numvfs(dev, iov->num_VFs); |
8c5cdb6a YZ |
512 | pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl); |
513 | if (iov->ctrl & PCI_SRIOV_CTRL_VFE) | |
514 | msleep(100); | |
515 | } | |
516 | ||
d1b054da YZ |
517 | /** |
518 | * pci_iov_init - initialize the IOV capability | |
519 | * @dev: the PCI device | |
520 | * | |
521 | * Returns 0 on success, or negative on failure. | |
522 | */ | |
523 | int pci_iov_init(struct pci_dev *dev) | |
524 | { | |
525 | int pos; | |
526 | ||
5f4d91a1 | 527 | if (!pci_is_pcie(dev)) |
d1b054da YZ |
528 | return -ENODEV; |
529 | ||
530 | pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_SRIOV); | |
531 | if (pos) | |
532 | return sriov_init(dev, pos); | |
533 | ||
534 | return -ENODEV; | |
535 | } | |
536 | ||
537 | /** | |
538 | * pci_iov_release - release resources used by the IOV capability | |
539 | * @dev: the PCI device | |
540 | */ | |
541 | void pci_iov_release(struct pci_dev *dev) | |
542 | { | |
543 | if (dev->is_physfn) | |
544 | sriov_release(dev); | |
545 | } | |
546 | ||
6ffa2489 BH |
547 | /** |
548 | * pci_iov_update_resource - update a VF BAR | |
549 | * @dev: the PCI device | |
550 | * @resno: the resource number | |
551 | * | |
552 | * Update a VF BAR in the SR-IOV capability of a PF. | |
553 | */ | |
554 | void pci_iov_update_resource(struct pci_dev *dev, int resno) | |
555 | { | |
556 | struct pci_sriov *iov = dev->is_physfn ? dev->sriov : NULL; | |
557 | struct resource *res = dev->resource + resno; | |
558 | int vf_bar = resno - PCI_IOV_RESOURCES; | |
559 | struct pci_bus_region region; | |
546ba9f8 | 560 | u16 cmd; |
6ffa2489 BH |
561 | u32 new; |
562 | int reg; | |
563 | ||
564 | /* | |
565 | * The generic pci_restore_bars() path calls this for all devices, | |
566 | * including VFs and non-SR-IOV devices. If this is not a PF, we | |
567 | * have nothing to do. | |
568 | */ | |
569 | if (!iov) | |
570 | return; | |
571 | ||
546ba9f8 BH |
572 | pci_read_config_word(dev, iov->pos + PCI_SRIOV_CTRL, &cmd); |
573 | if ((cmd & PCI_SRIOV_CTRL_VFE) && (cmd & PCI_SRIOV_CTRL_MSE)) { | |
574 | dev_WARN(&dev->dev, "can't update enabled VF BAR%d %pR\n", | |
575 | vf_bar, res); | |
576 | return; | |
577 | } | |
578 | ||
6ffa2489 BH |
579 | /* |
580 | * Ignore unimplemented BARs, unused resource slots for 64-bit | |
581 | * BARs, and non-movable resources, e.g., those described via | |
582 | * Enhanced Allocation. | |
583 | */ | |
584 | if (!res->flags) | |
585 | return; | |
586 | ||
587 | if (res->flags & IORESOURCE_UNSET) | |
588 | return; | |
589 | ||
590 | if (res->flags & IORESOURCE_PCI_FIXED) | |
591 | return; | |
592 | ||
593 | pcibios_resource_to_bus(dev->bus, ®ion, res); | |
594 | new = region.start; | |
595 | new |= res->flags & ~PCI_BASE_ADDRESS_MEM_MASK; | |
596 | ||
597 | reg = iov->pos + PCI_SRIOV_BAR + 4 * vf_bar; | |
598 | pci_write_config_dword(dev, reg, new); | |
599 | if (res->flags & IORESOURCE_MEM_64) { | |
600 | new = region.start >> 16 >> 16; | |
601 | pci_write_config_dword(dev, reg + 4, new); | |
602 | } | |
603 | } | |
604 | ||
978d2d68 WY |
605 | resource_size_t __weak pcibios_iov_resource_alignment(struct pci_dev *dev, |
606 | int resno) | |
607 | { | |
608 | return pci_iov_resource_size(dev, resno); | |
609 | } | |
610 | ||
6faf17f6 CW |
611 | /** |
612 | * pci_sriov_resource_alignment - get resource alignment for VF BAR | |
613 | * @dev: the PCI device | |
614 | * @resno: the resource number | |
615 | * | |
616 | * Returns the alignment of the VF BAR found in the SR-IOV capability. | |
617 | * This is not the same as the resource size which is defined as | |
618 | * the VF BAR size multiplied by the number of VFs. The alignment | |
619 | * is just the VF BAR size. | |
620 | */ | |
0e52247a | 621 | resource_size_t pci_sriov_resource_alignment(struct pci_dev *dev, int resno) |
6faf17f6 | 622 | { |
978d2d68 | 623 | return pcibios_iov_resource_alignment(dev, resno); |
6faf17f6 CW |
624 | } |
625 | ||
8c5cdb6a YZ |
626 | /** |
627 | * pci_restore_iov_state - restore the state of the IOV capability | |
628 | * @dev: the PCI device | |
629 | */ | |
630 | void pci_restore_iov_state(struct pci_dev *dev) | |
631 | { | |
632 | if (dev->is_physfn) | |
633 | sriov_restore_state(dev); | |
634 | } | |
a28724b0 YZ |
635 | |
636 | /** | |
637 | * pci_iov_bus_range - find bus range used by Virtual Function | |
638 | * @bus: the PCI bus | |
639 | * | |
640 | * Returns max number of buses (exclude current one) used by Virtual | |
641 | * Functions. | |
642 | */ | |
643 | int pci_iov_bus_range(struct pci_bus *bus) | |
644 | { | |
645 | int max = 0; | |
a28724b0 YZ |
646 | struct pci_dev *dev; |
647 | ||
648 | list_for_each_entry(dev, &bus->devices, bus_list) { | |
649 | if (!dev->is_physfn) | |
650 | continue; | |
4449f079 WY |
651 | if (dev->sriov->max_VF_buses > max) |
652 | max = dev->sriov->max_VF_buses; | |
a28724b0 YZ |
653 | } |
654 | ||
655 | return max ? max - bus->number : 0; | |
656 | } | |
dd7cc44d YZ |
657 | |
658 | /** | |
659 | * pci_enable_sriov - enable the SR-IOV capability | |
660 | * @dev: the PCI device | |
52a8873b | 661 | * @nr_virtfn: number of virtual functions to enable |
dd7cc44d YZ |
662 | * |
663 | * Returns 0 on success, or negative on failure. | |
664 | */ | |
665 | int pci_enable_sriov(struct pci_dev *dev, int nr_virtfn) | |
666 | { | |
667 | might_sleep(); | |
668 | ||
669 | if (!dev->is_physfn) | |
652d1100 | 670 | return -ENOSYS; |
dd7cc44d YZ |
671 | |
672 | return sriov_enable(dev, nr_virtfn); | |
673 | } | |
674 | EXPORT_SYMBOL_GPL(pci_enable_sriov); | |
675 | ||
676 | /** | |
677 | * pci_disable_sriov - disable the SR-IOV capability | |
678 | * @dev: the PCI device | |
679 | */ | |
680 | void pci_disable_sriov(struct pci_dev *dev) | |
681 | { | |
682 | might_sleep(); | |
683 | ||
684 | if (!dev->is_physfn) | |
685 | return; | |
686 | ||
687 | sriov_disable(dev); | |
688 | } | |
689 | EXPORT_SYMBOL_GPL(pci_disable_sriov); | |
74bb1bcc | 690 | |
fb8a0d9d WM |
691 | /** |
692 | * pci_num_vf - return number of VFs associated with a PF device_release_driver | |
693 | * @dev: the PCI device | |
694 | * | |
695 | * Returns number of VFs, or 0 if SR-IOV is not enabled. | |
696 | */ | |
697 | int pci_num_vf(struct pci_dev *dev) | |
698 | { | |
1452cd76 | 699 | if (!dev->is_physfn) |
fb8a0d9d | 700 | return 0; |
1452cd76 BH |
701 | |
702 | return dev->sriov->num_VFs; | |
fb8a0d9d WM |
703 | } |
704 | EXPORT_SYMBOL_GPL(pci_num_vf); | |
bff73156 | 705 | |
5a8eb242 AD |
706 | /** |
707 | * pci_vfs_assigned - returns number of VFs are assigned to a guest | |
708 | * @dev: the PCI device | |
709 | * | |
710 | * Returns number of VFs belonging to this device that are assigned to a guest. | |
652d1100 | 711 | * If device is not a physical function returns 0. |
5a8eb242 AD |
712 | */ |
713 | int pci_vfs_assigned(struct pci_dev *dev) | |
714 | { | |
715 | struct pci_dev *vfdev; | |
716 | unsigned int vfs_assigned = 0; | |
717 | unsigned short dev_id; | |
718 | ||
719 | /* only search if we are a PF */ | |
720 | if (!dev->is_physfn) | |
721 | return 0; | |
722 | ||
723 | /* | |
724 | * determine the device ID for the VFs, the vendor ID will be the | |
725 | * same as the PF so there is no need to check for that one | |
726 | */ | |
727 | pci_read_config_word(dev, dev->sriov->pos + PCI_SRIOV_VF_DID, &dev_id); | |
728 | ||
729 | /* loop through all the VFs to see if we own any that are assigned */ | |
730 | vfdev = pci_get_device(dev->vendor, dev_id, NULL); | |
731 | while (vfdev) { | |
732 | /* | |
733 | * It is considered assigned if it is a virtual function with | |
734 | * our dev as the physical function and the assigned bit is set | |
735 | */ | |
736 | if (vfdev->is_virtfn && (vfdev->physfn == dev) && | |
be63497c | 737 | pci_is_dev_assigned(vfdev)) |
5a8eb242 AD |
738 | vfs_assigned++; |
739 | ||
740 | vfdev = pci_get_device(dev->vendor, dev_id, vfdev); | |
741 | } | |
742 | ||
743 | return vfs_assigned; | |
744 | } | |
745 | EXPORT_SYMBOL_GPL(pci_vfs_assigned); | |
746 | ||
bff73156 DD |
747 | /** |
748 | * pci_sriov_set_totalvfs -- reduce the TotalVFs available | |
749 | * @dev: the PCI PF device | |
2094f167 | 750 | * @numvfs: number that should be used for TotalVFs supported |
bff73156 DD |
751 | * |
752 | * Should be called from PF driver's probe routine with | |
753 | * device's mutex held. | |
754 | * | |
755 | * Returns 0 if PF is an SRIOV-capable device and | |
652d1100 SA |
756 | * value of numvfs valid. If not a PF return -ENOSYS; |
757 | * if numvfs is invalid return -EINVAL; | |
bff73156 DD |
758 | * if VFs already enabled, return -EBUSY. |
759 | */ | |
760 | int pci_sriov_set_totalvfs(struct pci_dev *dev, u16 numvfs) | |
761 | { | |
652d1100 SA |
762 | if (!dev->is_physfn) |
763 | return -ENOSYS; | |
764 | if (numvfs > dev->sriov->total_VFs) | |
bff73156 DD |
765 | return -EINVAL; |
766 | ||
767 | /* Shouldn't change if VFs already enabled */ | |
768 | if (dev->sriov->ctrl & PCI_SRIOV_CTRL_VFE) | |
769 | return -EBUSY; | |
770 | else | |
6b136724 | 771 | dev->sriov->driver_max_VFs = numvfs; |
bff73156 DD |
772 | |
773 | return 0; | |
774 | } | |
775 | EXPORT_SYMBOL_GPL(pci_sriov_set_totalvfs); | |
776 | ||
777 | /** | |
ddc191f5 | 778 | * pci_sriov_get_totalvfs -- get total VFs supported on this device |
bff73156 DD |
779 | * @dev: the PCI PF device |
780 | * | |
781 | * For a PCIe device with SRIOV support, return the PCIe | |
6b136724 | 782 | * SRIOV capability value of TotalVFs or the value of driver_max_VFs |
652d1100 | 783 | * if the driver reduced it. Otherwise 0. |
bff73156 DD |
784 | */ |
785 | int pci_sriov_get_totalvfs(struct pci_dev *dev) | |
786 | { | |
1452cd76 | 787 | if (!dev->is_physfn) |
652d1100 | 788 | return 0; |
bff73156 | 789 | |
6b136724 BH |
790 | if (dev->sriov->driver_max_VFs) |
791 | return dev->sriov->driver_max_VFs; | |
1452cd76 BH |
792 | |
793 | return dev->sriov->total_VFs; | |
bff73156 DD |
794 | } |
795 | EXPORT_SYMBOL_GPL(pci_sriov_get_totalvfs); |