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Commit | Line | Data |
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1da177e4 LT |
1 | /* |
2 | * drivers/pci/pci-sysfs.c | |
3 | * | |
4 | * (C) Copyright 2002-2004 Greg Kroah-Hartman <greg@kroah.com> | |
5 | * (C) Copyright 2002-2004 IBM Corp. | |
6 | * (C) Copyright 2003 Matthew Wilcox | |
7 | * (C) Copyright 2003 Hewlett-Packard | |
8 | * (C) Copyright 2004 Jon Smirl <jonsmirl@yahoo.com> | |
9 | * (C) Copyright 2004 Silicon Graphics, Inc. Jesse Barnes <jbarnes@sgi.com> | |
10 | * | |
11 | * File attributes for PCI devices | |
12 | * | |
13 | * Modeled after usb's driverfs.c | |
14 | * | |
15 | */ | |
16 | ||
17 | ||
1da177e4 LT |
18 | #include <linux/kernel.h> |
19 | #include <linux/pci.h> | |
20 | #include <linux/stat.h> | |
21 | #include <linux/topology.h> | |
22 | #include <linux/mm.h> | |
23 | ||
24 | #include "pci.h" | |
25 | ||
26 | static int sysfs_initialized; /* = 0 */ | |
27 | ||
28 | /* show configuration fields */ | |
29 | #define pci_config_attr(field, format_string) \ | |
30 | static ssize_t \ | |
e404e274 | 31 | field##_show(struct device *dev, struct device_attribute *attr, char *buf) \ |
1da177e4 LT |
32 | { \ |
33 | struct pci_dev *pdev; \ | |
34 | \ | |
35 | pdev = to_pci_dev (dev); \ | |
36 | return sprintf (buf, format_string, pdev->field); \ | |
37 | } | |
38 | ||
39 | pci_config_attr(vendor, "0x%04x\n"); | |
40 | pci_config_attr(device, "0x%04x\n"); | |
41 | pci_config_attr(subsystem_vendor, "0x%04x\n"); | |
42 | pci_config_attr(subsystem_device, "0x%04x\n"); | |
43 | pci_config_attr(class, "0x%06x\n"); | |
44 | pci_config_attr(irq, "%u\n"); | |
9f125d30 | 45 | pci_config_attr(is_enabled, "%u\n"); |
1da177e4 | 46 | |
bdee9d98 DT |
47 | static ssize_t broken_parity_status_show(struct device *dev, |
48 | struct device_attribute *attr, | |
49 | char *buf) | |
50 | { | |
51 | struct pci_dev *pdev = to_pci_dev(dev); | |
52 | return sprintf (buf, "%u\n", pdev->broken_parity_status); | |
53 | } | |
54 | ||
55 | static ssize_t broken_parity_status_store(struct device *dev, | |
56 | struct device_attribute *attr, | |
57 | const char *buf, size_t count) | |
58 | { | |
59 | struct pci_dev *pdev = to_pci_dev(dev); | |
60 | ssize_t consumed = -EINVAL; | |
61 | ||
62 | if ((count > 0) && (*buf == '0' || *buf == '1')) { | |
63 | pdev->broken_parity_status = *buf == '1' ? 1 : 0; | |
64 | consumed = count; | |
65 | } | |
66 | return consumed; | |
67 | } | |
68 | ||
4327edf6 AC |
69 | static ssize_t local_cpus_show(struct device *dev, |
70 | struct device_attribute *attr, char *buf) | |
1da177e4 | 71 | { |
4327edf6 AC |
72 | cpumask_t mask; |
73 | int len; | |
74 | ||
75 | mask = pcibus_to_cpumask(to_pci_dev(dev)->bus); | |
76 | len = cpumask_scnprintf(buf, PAGE_SIZE-2, mask); | |
1da177e4 LT |
77 | strcat(buf,"\n"); |
78 | return 1+len; | |
79 | } | |
80 | ||
81 | /* show resources */ | |
82 | static ssize_t | |
e404e274 | 83 | resource_show(struct device * dev, struct device_attribute *attr, char * buf) |
1da177e4 LT |
84 | { |
85 | struct pci_dev * pci_dev = to_pci_dev(dev); | |
86 | char * str = buf; | |
87 | int i; | |
88 | int max = 7; | |
e31dd6e4 | 89 | resource_size_t start, end; |
1da177e4 LT |
90 | |
91 | if (pci_dev->subordinate) | |
92 | max = DEVICE_COUNT_RESOURCE; | |
93 | ||
94 | for (i = 0; i < max; i++) { | |
2311b1f2 ME |
95 | struct resource *res = &pci_dev->resource[i]; |
96 | pci_resource_to_user(pci_dev, i, res, &start, &end); | |
97 | str += sprintf(str,"0x%016llx 0x%016llx 0x%016llx\n", | |
98 | (unsigned long long)start, | |
99 | (unsigned long long)end, | |
100 | (unsigned long long)res->flags); | |
1da177e4 LT |
101 | } |
102 | return (str - buf); | |
103 | } | |
104 | ||
87c8a443 | 105 | static ssize_t modalias_show(struct device *dev, struct device_attribute *attr, char *buf) |
9888549e GKH |
106 | { |
107 | struct pci_dev *pci_dev = to_pci_dev(dev); | |
108 | ||
109 | return sprintf(buf, "pci:v%08Xd%08Xsv%08Xsd%08Xbc%02Xsc%02Xi%02x\n", | |
110 | pci_dev->vendor, pci_dev->device, | |
111 | pci_dev->subsystem_vendor, pci_dev->subsystem_device, | |
112 | (u8)(pci_dev->class >> 16), (u8)(pci_dev->class >> 8), | |
113 | (u8)(pci_dev->class)); | |
114 | } | |
9f125d30 AV |
115 | static ssize_t |
116 | is_enabled_store(struct device *dev, struct device_attribute *attr, | |
117 | const char *buf, size_t count) | |
118 | { | |
119 | struct pci_dev *pdev = to_pci_dev(dev); | |
120 | ||
121 | /* this can crash the machine when done on the "wrong" device */ | |
122 | if (!capable(CAP_SYS_ADMIN)) | |
123 | return count; | |
124 | ||
125 | if (*buf == '0') | |
126 | pci_disable_device(pdev); | |
127 | ||
128 | if (*buf == '1') | |
129 | pci_enable_device(pdev); | |
130 | ||
131 | return count; | |
132 | } | |
133 | ||
fe97064c BG |
134 | static ssize_t |
135 | msi_bus_show(struct device *dev, struct device_attribute *attr, char *buf) | |
136 | { | |
137 | struct pci_dev *pdev = to_pci_dev(dev); | |
138 | ||
139 | if (!pdev->subordinate) | |
140 | return 0; | |
141 | ||
142 | return sprintf (buf, "%u\n", | |
143 | !(pdev->subordinate->bus_flags & PCI_BUS_FLAGS_NO_MSI)); | |
144 | } | |
145 | ||
146 | static ssize_t | |
147 | msi_bus_store(struct device *dev, struct device_attribute *attr, | |
148 | const char *buf, size_t count) | |
149 | { | |
150 | struct pci_dev *pdev = to_pci_dev(dev); | |
151 | ||
152 | /* bad things may happen if the no_msi flag is changed | |
153 | * while some drivers are loaded */ | |
154 | if (!capable(CAP_SYS_ADMIN)) | |
155 | return count; | |
156 | ||
157 | if (!pdev->subordinate) | |
158 | return count; | |
159 | ||
160 | if (*buf == '0') { | |
161 | pdev->subordinate->bus_flags |= PCI_BUS_FLAGS_NO_MSI; | |
162 | dev_warn(&pdev->dev, "forced subordinate bus to not support MSI," | |
163 | " bad things could happen.\n"); | |
164 | } | |
165 | ||
166 | if (*buf == '1') { | |
167 | pdev->subordinate->bus_flags &= ~PCI_BUS_FLAGS_NO_MSI; | |
168 | dev_warn(&pdev->dev, "forced subordinate bus to support MSI," | |
169 | " bad things could happen.\n"); | |
170 | } | |
171 | ||
172 | return count; | |
173 | } | |
9888549e | 174 | |
1da177e4 LT |
175 | struct device_attribute pci_dev_attrs[] = { |
176 | __ATTR_RO(resource), | |
177 | __ATTR_RO(vendor), | |
178 | __ATTR_RO(device), | |
179 | __ATTR_RO(subsystem_vendor), | |
180 | __ATTR_RO(subsystem_device), | |
181 | __ATTR_RO(class), | |
182 | __ATTR_RO(irq), | |
183 | __ATTR_RO(local_cpus), | |
9888549e | 184 | __ATTR_RO(modalias), |
9f125d30 | 185 | __ATTR(enable, 0600, is_enabled_show, is_enabled_store), |
bdee9d98 DT |
186 | __ATTR(broken_parity_status,(S_IRUGO|S_IWUSR), |
187 | broken_parity_status_show,broken_parity_status_store), | |
fe97064c | 188 | __ATTR(msi_bus, 0644, msi_bus_show, msi_bus_store), |
1da177e4 LT |
189 | __ATTR_NULL, |
190 | }; | |
191 | ||
192 | static ssize_t | |
193 | pci_read_config(struct kobject *kobj, char *buf, loff_t off, size_t count) | |
194 | { | |
195 | struct pci_dev *dev = to_pci_dev(container_of(kobj,struct device,kobj)); | |
196 | unsigned int size = 64; | |
197 | loff_t init_off = off; | |
4c0619ad | 198 | u8 *data = (u8*) buf; |
1da177e4 LT |
199 | |
200 | /* Several chips lock up trying to read undefined config space */ | |
201 | if (capable(CAP_SYS_ADMIN)) { | |
202 | size = dev->cfg_size; | |
203 | } else if (dev->hdr_type == PCI_HEADER_TYPE_CARDBUS) { | |
204 | size = 128; | |
205 | } | |
206 | ||
207 | if (off > size) | |
208 | return 0; | |
209 | if (off + count > size) { | |
210 | size -= off; | |
211 | count = size; | |
212 | } else { | |
213 | size = count; | |
214 | } | |
215 | ||
4c0619ad SS |
216 | if ((off & 1) && size) { |
217 | u8 val; | |
e04b0ea2 | 218 | pci_user_read_config_byte(dev, off, &val); |
4c0619ad | 219 | data[off - init_off] = val; |
1da177e4 | 220 | off++; |
4c0619ad SS |
221 | size--; |
222 | } | |
223 | ||
224 | if ((off & 3) && size > 2) { | |
225 | u16 val; | |
e04b0ea2 | 226 | pci_user_read_config_word(dev, off, &val); |
4c0619ad SS |
227 | data[off - init_off] = val & 0xff; |
228 | data[off - init_off + 1] = (val >> 8) & 0xff; | |
229 | off += 2; | |
230 | size -= 2; | |
1da177e4 LT |
231 | } |
232 | ||
233 | while (size > 3) { | |
4c0619ad | 234 | u32 val; |
e04b0ea2 | 235 | pci_user_read_config_dword(dev, off, &val); |
4c0619ad SS |
236 | data[off - init_off] = val & 0xff; |
237 | data[off - init_off + 1] = (val >> 8) & 0xff; | |
238 | data[off - init_off + 2] = (val >> 16) & 0xff; | |
239 | data[off - init_off + 3] = (val >> 24) & 0xff; | |
1da177e4 LT |
240 | off += 4; |
241 | size -= 4; | |
242 | } | |
243 | ||
4c0619ad SS |
244 | if (size >= 2) { |
245 | u16 val; | |
e04b0ea2 | 246 | pci_user_read_config_word(dev, off, &val); |
4c0619ad SS |
247 | data[off - init_off] = val & 0xff; |
248 | data[off - init_off + 1] = (val >> 8) & 0xff; | |
249 | off += 2; | |
250 | size -= 2; | |
251 | } | |
252 | ||
253 | if (size > 0) { | |
254 | u8 val; | |
e04b0ea2 | 255 | pci_user_read_config_byte(dev, off, &val); |
4c0619ad | 256 | data[off - init_off] = val; |
1da177e4 LT |
257 | off++; |
258 | --size; | |
259 | } | |
260 | ||
261 | return count; | |
262 | } | |
263 | ||
264 | static ssize_t | |
265 | pci_write_config(struct kobject *kobj, char *buf, loff_t off, size_t count) | |
266 | { | |
267 | struct pci_dev *dev = to_pci_dev(container_of(kobj,struct device,kobj)); | |
268 | unsigned int size = count; | |
269 | loff_t init_off = off; | |
4c0619ad | 270 | u8 *data = (u8*) buf; |
1da177e4 LT |
271 | |
272 | if (off > dev->cfg_size) | |
273 | return 0; | |
274 | if (off + count > dev->cfg_size) { | |
275 | size = dev->cfg_size - off; | |
276 | count = size; | |
277 | } | |
4c0619ad SS |
278 | |
279 | if ((off & 1) && size) { | |
e04b0ea2 | 280 | pci_user_write_config_byte(dev, off, data[off - init_off]); |
1da177e4 | 281 | off++; |
4c0619ad | 282 | size--; |
1da177e4 | 283 | } |
4c0619ad SS |
284 | |
285 | if ((off & 3) && size > 2) { | |
286 | u16 val = data[off - init_off]; | |
287 | val |= (u16) data[off - init_off + 1] << 8; | |
e04b0ea2 | 288 | pci_user_write_config_word(dev, off, val); |
4c0619ad SS |
289 | off += 2; |
290 | size -= 2; | |
291 | } | |
1da177e4 LT |
292 | |
293 | while (size > 3) { | |
4c0619ad SS |
294 | u32 val = data[off - init_off]; |
295 | val |= (u32) data[off - init_off + 1] << 8; | |
296 | val |= (u32) data[off - init_off + 2] << 16; | |
297 | val |= (u32) data[off - init_off + 3] << 24; | |
e04b0ea2 | 298 | pci_user_write_config_dword(dev, off, val); |
1da177e4 LT |
299 | off += 4; |
300 | size -= 4; | |
301 | } | |
4c0619ad SS |
302 | |
303 | if (size >= 2) { | |
304 | u16 val = data[off - init_off]; | |
305 | val |= (u16) data[off - init_off + 1] << 8; | |
e04b0ea2 | 306 | pci_user_write_config_word(dev, off, val); |
4c0619ad SS |
307 | off += 2; |
308 | size -= 2; | |
309 | } | |
1da177e4 | 310 | |
4c0619ad | 311 | if (size) { |
e04b0ea2 | 312 | pci_user_write_config_byte(dev, off, data[off - init_off]); |
1da177e4 LT |
313 | off++; |
314 | --size; | |
315 | } | |
316 | ||
317 | return count; | |
318 | } | |
319 | ||
320 | #ifdef HAVE_PCI_LEGACY | |
321 | /** | |
322 | * pci_read_legacy_io - read byte(s) from legacy I/O port space | |
323 | * @kobj: kobject corresponding to file to read from | |
324 | * @buf: buffer to store results | |
325 | * @off: offset into legacy I/O port space | |
326 | * @count: number of bytes to read | |
327 | * | |
328 | * Reads 1, 2, or 4 bytes from legacy I/O port space using an arch specific | |
329 | * callback routine (pci_legacy_read). | |
330 | */ | |
331 | ssize_t | |
332 | pci_read_legacy_io(struct kobject *kobj, char *buf, loff_t off, size_t count) | |
333 | { | |
334 | struct pci_bus *bus = to_pci_bus(container_of(kobj, | |
335 | struct class_device, | |
336 | kobj)); | |
337 | ||
338 | /* Only support 1, 2 or 4 byte accesses */ | |
339 | if (count != 1 && count != 2 && count != 4) | |
340 | return -EINVAL; | |
341 | ||
342 | return pci_legacy_read(bus, off, (u32 *)buf, count); | |
343 | } | |
344 | ||
345 | /** | |
346 | * pci_write_legacy_io - write byte(s) to legacy I/O port space | |
347 | * @kobj: kobject corresponding to file to read from | |
348 | * @buf: buffer containing value to be written | |
349 | * @off: offset into legacy I/O port space | |
350 | * @count: number of bytes to write | |
351 | * | |
352 | * Writes 1, 2, or 4 bytes from legacy I/O port space using an arch specific | |
353 | * callback routine (pci_legacy_write). | |
354 | */ | |
355 | ssize_t | |
356 | pci_write_legacy_io(struct kobject *kobj, char *buf, loff_t off, size_t count) | |
357 | { | |
358 | struct pci_bus *bus = to_pci_bus(container_of(kobj, | |
359 | struct class_device, | |
360 | kobj)); | |
361 | /* Only support 1, 2 or 4 byte accesses */ | |
362 | if (count != 1 && count != 2 && count != 4) | |
363 | return -EINVAL; | |
364 | ||
365 | return pci_legacy_write(bus, off, *(u32 *)buf, count); | |
366 | } | |
367 | ||
368 | /** | |
369 | * pci_mmap_legacy_mem - map legacy PCI memory into user memory space | |
370 | * @kobj: kobject corresponding to device to be mapped | |
371 | * @attr: struct bin_attribute for this file | |
372 | * @vma: struct vm_area_struct passed to mmap | |
373 | * | |
374 | * Uses an arch specific callback, pci_mmap_legacy_page_range, to mmap | |
375 | * legacy memory space (first meg of bus space) into application virtual | |
376 | * memory space. | |
377 | */ | |
378 | int | |
379 | pci_mmap_legacy_mem(struct kobject *kobj, struct bin_attribute *attr, | |
380 | struct vm_area_struct *vma) | |
381 | { | |
382 | struct pci_bus *bus = to_pci_bus(container_of(kobj, | |
383 | struct class_device, | |
384 | kobj)); | |
385 | ||
386 | return pci_mmap_legacy_page_range(bus, vma); | |
387 | } | |
388 | #endif /* HAVE_PCI_LEGACY */ | |
389 | ||
390 | #ifdef HAVE_PCI_MMAP | |
391 | /** | |
392 | * pci_mmap_resource - map a PCI resource into user memory space | |
393 | * @kobj: kobject for mapping | |
394 | * @attr: struct bin_attribute for the file being mapped | |
395 | * @vma: struct vm_area_struct passed into the mmap | |
396 | * | |
397 | * Use the regular PCI mapping routines to map a PCI resource into userspace. | |
398 | * FIXME: write combining? maybe automatic for prefetchable regions? | |
399 | */ | |
400 | static int | |
401 | pci_mmap_resource(struct kobject *kobj, struct bin_attribute *attr, | |
402 | struct vm_area_struct *vma) | |
403 | { | |
404 | struct pci_dev *pdev = to_pci_dev(container_of(kobj, | |
405 | struct device, kobj)); | |
406 | struct resource *res = (struct resource *)attr->private; | |
407 | enum pci_mmap_state mmap_type; | |
e31dd6e4 | 408 | resource_size_t start, end; |
2311b1f2 | 409 | int i; |
1da177e4 | 410 | |
2311b1f2 ME |
411 | for (i = 0; i < PCI_ROM_RESOURCE; i++) |
412 | if (res == &pdev->resource[i]) | |
413 | break; | |
414 | if (i >= PCI_ROM_RESOURCE) | |
415 | return -ENODEV; | |
416 | ||
417 | /* pci_mmap_page_range() expects the same kind of entry as coming | |
418 | * from /proc/bus/pci/ which is a "user visible" value. If this is | |
419 | * different from the resource itself, arch will do necessary fixup. | |
420 | */ | |
421 | pci_resource_to_user(pdev, i, res, &start, &end); | |
422 | vma->vm_pgoff += start >> PAGE_SHIFT; | |
1da177e4 LT |
423 | mmap_type = res->flags & IORESOURCE_MEM ? pci_mmap_mem : pci_mmap_io; |
424 | ||
425 | return pci_mmap_page_range(pdev, vma, mmap_type, 0); | |
426 | } | |
427 | ||
428 | /** | |
429 | * pci_create_resource_files - create resource files in sysfs for @dev | |
430 | * @dev: dev in question | |
431 | * | |
432 | * Walk the resources in @dev creating files for each resource available. | |
433 | */ | |
434 | static void | |
435 | pci_create_resource_files(struct pci_dev *pdev) | |
436 | { | |
437 | int i; | |
438 | ||
439 | /* Expose the PCI resources from this device as files */ | |
440 | for (i = 0; i < PCI_ROM_RESOURCE; i++) { | |
441 | struct bin_attribute *res_attr; | |
442 | ||
443 | /* skip empty resources */ | |
444 | if (!pci_resource_len(pdev, i)) | |
445 | continue; | |
446 | ||
d48593bf | 447 | /* allocate attribute structure, piggyback attribute name */ |
656da9da | 448 | res_attr = kzalloc(sizeof(*res_attr) + 10, GFP_ATOMIC); |
1da177e4 | 449 | if (res_attr) { |
d48593bf DT |
450 | char *res_attr_name = (char *)(res_attr + 1); |
451 | ||
1da177e4 | 452 | pdev->res_attr[i] = res_attr; |
d48593bf DT |
453 | sprintf(res_attr_name, "resource%d", i); |
454 | res_attr->attr.name = res_attr_name; | |
1da177e4 LT |
455 | res_attr->attr.mode = S_IRUSR | S_IWUSR; |
456 | res_attr->attr.owner = THIS_MODULE; | |
d48593bf | 457 | res_attr->size = pci_resource_len(pdev, i); |
1da177e4 LT |
458 | res_attr->mmap = pci_mmap_resource; |
459 | res_attr->private = &pdev->resource[i]; | |
460 | sysfs_create_bin_file(&pdev->dev.kobj, res_attr); | |
461 | } | |
462 | } | |
463 | } | |
464 | ||
465 | /** | |
466 | * pci_remove_resource_files - cleanup resource files | |
467 | * @dev: dev to cleanup | |
468 | * | |
469 | * If we created resource files for @dev, remove them from sysfs and | |
470 | * free their resources. | |
471 | */ | |
472 | static void | |
473 | pci_remove_resource_files(struct pci_dev *pdev) | |
474 | { | |
475 | int i; | |
476 | ||
477 | for (i = 0; i < PCI_ROM_RESOURCE; i++) { | |
478 | struct bin_attribute *res_attr; | |
479 | ||
480 | res_attr = pdev->res_attr[i]; | |
481 | if (res_attr) { | |
482 | sysfs_remove_bin_file(&pdev->dev.kobj, res_attr); | |
483 | kfree(res_attr); | |
484 | } | |
485 | } | |
486 | } | |
487 | #else /* !HAVE_PCI_MMAP */ | |
488 | static inline void pci_create_resource_files(struct pci_dev *dev) { return; } | |
489 | static inline void pci_remove_resource_files(struct pci_dev *dev) { return; } | |
490 | #endif /* HAVE_PCI_MMAP */ | |
491 | ||
492 | /** | |
493 | * pci_write_rom - used to enable access to the PCI ROM display | |
494 | * @kobj: kernel object handle | |
495 | * @buf: user input | |
496 | * @off: file offset | |
497 | * @count: number of byte in input | |
498 | * | |
499 | * writing anything except 0 enables it | |
500 | */ | |
501 | static ssize_t | |
502 | pci_write_rom(struct kobject *kobj, char *buf, loff_t off, size_t count) | |
503 | { | |
504 | struct pci_dev *pdev = to_pci_dev(container_of(kobj, struct device, kobj)); | |
505 | ||
506 | if ((off == 0) && (*buf == '0') && (count == 2)) | |
507 | pdev->rom_attr_enabled = 0; | |
508 | else | |
509 | pdev->rom_attr_enabled = 1; | |
510 | ||
511 | return count; | |
512 | } | |
513 | ||
514 | /** | |
515 | * pci_read_rom - read a PCI ROM | |
516 | * @kobj: kernel object handle | |
517 | * @buf: where to put the data we read from the ROM | |
518 | * @off: file offset | |
519 | * @count: number of bytes to read | |
520 | * | |
521 | * Put @count bytes starting at @off into @buf from the ROM in the PCI | |
522 | * device corresponding to @kobj. | |
523 | */ | |
524 | static ssize_t | |
525 | pci_read_rom(struct kobject *kobj, char *buf, loff_t off, size_t count) | |
526 | { | |
527 | struct pci_dev *pdev = to_pci_dev(container_of(kobj, struct device, kobj)); | |
528 | void __iomem *rom; | |
529 | size_t size; | |
530 | ||
531 | if (!pdev->rom_attr_enabled) | |
532 | return -EINVAL; | |
533 | ||
534 | rom = pci_map_rom(pdev, &size); /* size starts out as PCI window size */ | |
535 | if (!rom) | |
536 | return 0; | |
537 | ||
538 | if (off >= size) | |
539 | count = 0; | |
540 | else { | |
541 | if (off + count > size) | |
542 | count = size - off; | |
543 | ||
544 | memcpy_fromio(buf, rom + off, count); | |
545 | } | |
546 | pci_unmap_rom(pdev, rom); | |
547 | ||
548 | return count; | |
549 | } | |
550 | ||
551 | static struct bin_attribute pci_config_attr = { | |
552 | .attr = { | |
553 | .name = "config", | |
554 | .mode = S_IRUGO | S_IWUSR, | |
555 | .owner = THIS_MODULE, | |
556 | }, | |
557 | .size = 256, | |
558 | .read = pci_read_config, | |
559 | .write = pci_write_config, | |
560 | }; | |
561 | ||
562 | static struct bin_attribute pcie_config_attr = { | |
563 | .attr = { | |
564 | .name = "config", | |
565 | .mode = S_IRUGO | S_IWUSR, | |
566 | .owner = THIS_MODULE, | |
567 | }, | |
568 | .size = 4096, | |
569 | .read = pci_read_config, | |
570 | .write = pci_write_config, | |
571 | }; | |
572 | ||
573 | int pci_create_sysfs_dev_files (struct pci_dev *pdev) | |
574 | { | |
575 | if (!sysfs_initialized) | |
576 | return -EACCES; | |
577 | ||
578 | if (pdev->cfg_size < 4096) | |
579 | sysfs_create_bin_file(&pdev->dev.kobj, &pci_config_attr); | |
580 | else | |
581 | sysfs_create_bin_file(&pdev->dev.kobj, &pcie_config_attr); | |
582 | ||
583 | pci_create_resource_files(pdev); | |
584 | ||
585 | /* If the device has a ROM, try to expose it in sysfs. */ | |
586 | if (pci_resource_len(pdev, PCI_ROM_RESOURCE)) { | |
587 | struct bin_attribute *rom_attr; | |
588 | ||
f5afe806 | 589 | rom_attr = kzalloc(sizeof(*rom_attr), GFP_ATOMIC); |
1da177e4 | 590 | if (rom_attr) { |
1da177e4 LT |
591 | pdev->rom_attr = rom_attr; |
592 | rom_attr->size = pci_resource_len(pdev, PCI_ROM_RESOURCE); | |
593 | rom_attr->attr.name = "rom"; | |
594 | rom_attr->attr.mode = S_IRUSR; | |
595 | rom_attr->attr.owner = THIS_MODULE; | |
596 | rom_attr->read = pci_read_rom; | |
597 | rom_attr->write = pci_write_rom; | |
598 | sysfs_create_bin_file(&pdev->dev.kobj, rom_attr); | |
599 | } | |
600 | } | |
601 | /* add platform-specific attributes */ | |
602 | pcibios_add_platform_entries(pdev); | |
603 | ||
604 | return 0; | |
605 | } | |
606 | ||
607 | /** | |
608 | * pci_remove_sysfs_dev_files - cleanup PCI specific sysfs files | |
609 | * @pdev: device whose entries we should free | |
610 | * | |
611 | * Cleanup when @pdev is removed from sysfs. | |
612 | */ | |
613 | void pci_remove_sysfs_dev_files(struct pci_dev *pdev) | |
614 | { | |
615 | if (pdev->cfg_size < 4096) | |
616 | sysfs_remove_bin_file(&pdev->dev.kobj, &pci_config_attr); | |
617 | else | |
618 | sysfs_remove_bin_file(&pdev->dev.kobj, &pcie_config_attr); | |
619 | ||
620 | pci_remove_resource_files(pdev); | |
621 | ||
622 | if (pci_resource_len(pdev, PCI_ROM_RESOURCE)) { | |
623 | if (pdev->rom_attr) { | |
624 | sysfs_remove_bin_file(&pdev->dev.kobj, pdev->rom_attr); | |
625 | kfree(pdev->rom_attr); | |
626 | } | |
627 | } | |
628 | } | |
629 | ||
630 | static int __init pci_sysfs_init(void) | |
631 | { | |
632 | struct pci_dev *pdev = NULL; | |
633 | ||
634 | sysfs_initialized = 1; | |
635 | for_each_pci_dev(pdev) | |
636 | pci_create_sysfs_dev_files(pdev); | |
637 | ||
638 | return 0; | |
639 | } | |
640 | ||
641 | __initcall(pci_sysfs_init); |