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0f15f500 NA |
1 | /* |
2 | * Pin controller and GPIO driver for Amlogic Meson GXL. | |
3 | * | |
4 | * Copyright (C) 2016 Endless Mobile, Inc. | |
5 | * Author: Carlo Caione <carlo@endlessm.com> | |
6 | * | |
7 | * This program is free software; you can redistribute it and/or | |
8 | * modify it under the terms of the GNU General Public License | |
9 | * version 2 as published by the Free Software Foundation. | |
10 | * | |
11 | * You should have received a copy of the GNU General Public License | |
12 | * along with this program. If not, see <http://www.gnu.org/licenses/>. | |
13 | */ | |
14 | ||
15 | #include <dt-bindings/gpio/meson-gxl-gpio.h> | |
16 | #include "pinctrl-meson.h" | |
17 | ||
18 | #define EE_OFF 10 | |
19 | ||
20 | static const struct pinctrl_pin_desc meson_gxl_periphs_pins[] = { | |
21 | MESON_PIN(GPIOZ_0, EE_OFF), | |
22 | MESON_PIN(GPIOZ_1, EE_OFF), | |
23 | MESON_PIN(GPIOZ_2, EE_OFF), | |
24 | MESON_PIN(GPIOZ_3, EE_OFF), | |
25 | MESON_PIN(GPIOZ_4, EE_OFF), | |
26 | MESON_PIN(GPIOZ_5, EE_OFF), | |
27 | MESON_PIN(GPIOZ_6, EE_OFF), | |
28 | MESON_PIN(GPIOZ_7, EE_OFF), | |
29 | MESON_PIN(GPIOZ_8, EE_OFF), | |
30 | MESON_PIN(GPIOZ_9, EE_OFF), | |
31 | MESON_PIN(GPIOZ_10, EE_OFF), | |
32 | MESON_PIN(GPIOZ_11, EE_OFF), | |
33 | MESON_PIN(GPIOZ_12, EE_OFF), | |
34 | MESON_PIN(GPIOZ_13, EE_OFF), | |
35 | MESON_PIN(GPIOZ_14, EE_OFF), | |
36 | MESON_PIN(GPIOZ_15, EE_OFF), | |
37 | ||
38 | MESON_PIN(GPIOH_0, EE_OFF), | |
39 | MESON_PIN(GPIOH_1, EE_OFF), | |
40 | MESON_PIN(GPIOH_2, EE_OFF), | |
41 | MESON_PIN(GPIOH_3, EE_OFF), | |
42 | MESON_PIN(GPIOH_4, EE_OFF), | |
43 | MESON_PIN(GPIOH_5, EE_OFF), | |
44 | MESON_PIN(GPIOH_6, EE_OFF), | |
45 | MESON_PIN(GPIOH_7, EE_OFF), | |
46 | MESON_PIN(GPIOH_8, EE_OFF), | |
47 | MESON_PIN(GPIOH_9, EE_OFF), | |
48 | ||
49 | MESON_PIN(BOOT_0, EE_OFF), | |
50 | MESON_PIN(BOOT_1, EE_OFF), | |
51 | MESON_PIN(BOOT_2, EE_OFF), | |
52 | MESON_PIN(BOOT_3, EE_OFF), | |
53 | MESON_PIN(BOOT_4, EE_OFF), | |
54 | MESON_PIN(BOOT_5, EE_OFF), | |
55 | MESON_PIN(BOOT_6, EE_OFF), | |
56 | MESON_PIN(BOOT_7, EE_OFF), | |
57 | MESON_PIN(BOOT_8, EE_OFF), | |
58 | MESON_PIN(BOOT_9, EE_OFF), | |
59 | MESON_PIN(BOOT_10, EE_OFF), | |
60 | MESON_PIN(BOOT_11, EE_OFF), | |
61 | MESON_PIN(BOOT_12, EE_OFF), | |
62 | MESON_PIN(BOOT_13, EE_OFF), | |
63 | MESON_PIN(BOOT_14, EE_OFF), | |
64 | MESON_PIN(BOOT_15, EE_OFF), | |
65 | ||
66 | MESON_PIN(CARD_0, EE_OFF), | |
67 | MESON_PIN(CARD_1, EE_OFF), | |
68 | MESON_PIN(CARD_2, EE_OFF), | |
69 | MESON_PIN(CARD_3, EE_OFF), | |
70 | MESON_PIN(CARD_4, EE_OFF), | |
71 | MESON_PIN(CARD_5, EE_OFF), | |
72 | MESON_PIN(CARD_6, EE_OFF), | |
73 | ||
74 | MESON_PIN(GPIODV_0, EE_OFF), | |
75 | MESON_PIN(GPIODV_1, EE_OFF), | |
76 | MESON_PIN(GPIODV_2, EE_OFF), | |
77 | MESON_PIN(GPIODV_3, EE_OFF), | |
78 | MESON_PIN(GPIODV_4, EE_OFF), | |
79 | MESON_PIN(GPIODV_5, EE_OFF), | |
80 | MESON_PIN(GPIODV_6, EE_OFF), | |
81 | MESON_PIN(GPIODV_7, EE_OFF), | |
82 | MESON_PIN(GPIODV_8, EE_OFF), | |
83 | MESON_PIN(GPIODV_9, EE_OFF), | |
84 | MESON_PIN(GPIODV_10, EE_OFF), | |
85 | MESON_PIN(GPIODV_11, EE_OFF), | |
86 | MESON_PIN(GPIODV_12, EE_OFF), | |
87 | MESON_PIN(GPIODV_13, EE_OFF), | |
88 | MESON_PIN(GPIODV_14, EE_OFF), | |
89 | MESON_PIN(GPIODV_15, EE_OFF), | |
90 | MESON_PIN(GPIODV_16, EE_OFF), | |
91 | MESON_PIN(GPIODV_17, EE_OFF), | |
92 | MESON_PIN(GPIODV_19, EE_OFF), | |
93 | MESON_PIN(GPIODV_20, EE_OFF), | |
94 | MESON_PIN(GPIODV_21, EE_OFF), | |
95 | MESON_PIN(GPIODV_22, EE_OFF), | |
96 | MESON_PIN(GPIODV_23, EE_OFF), | |
97 | MESON_PIN(GPIODV_24, EE_OFF), | |
98 | MESON_PIN(GPIODV_25, EE_OFF), | |
99 | MESON_PIN(GPIODV_26, EE_OFF), | |
100 | MESON_PIN(GPIODV_27, EE_OFF), | |
101 | MESON_PIN(GPIODV_28, EE_OFF), | |
102 | MESON_PIN(GPIODV_29, EE_OFF), | |
103 | ||
104 | MESON_PIN(GPIOX_0, EE_OFF), | |
105 | MESON_PIN(GPIOX_1, EE_OFF), | |
106 | MESON_PIN(GPIOX_2, EE_OFF), | |
107 | MESON_PIN(GPIOX_3, EE_OFF), | |
108 | MESON_PIN(GPIOX_4, EE_OFF), | |
109 | MESON_PIN(GPIOX_5, EE_OFF), | |
110 | MESON_PIN(GPIOX_6, EE_OFF), | |
111 | MESON_PIN(GPIOX_7, EE_OFF), | |
112 | MESON_PIN(GPIOX_8, EE_OFF), | |
113 | MESON_PIN(GPIOX_9, EE_OFF), | |
114 | MESON_PIN(GPIOX_10, EE_OFF), | |
115 | MESON_PIN(GPIOX_11, EE_OFF), | |
116 | MESON_PIN(GPIOX_12, EE_OFF), | |
117 | MESON_PIN(GPIOX_13, EE_OFF), | |
118 | MESON_PIN(GPIOX_14, EE_OFF), | |
119 | MESON_PIN(GPIOX_15, EE_OFF), | |
120 | MESON_PIN(GPIOX_16, EE_OFF), | |
121 | MESON_PIN(GPIOX_17, EE_OFF), | |
122 | MESON_PIN(GPIOX_18, EE_OFF), | |
123 | ||
124 | MESON_PIN(GPIOCLK_0, EE_OFF), | |
125 | MESON_PIN(GPIOCLK_1, EE_OFF), | |
126 | ||
127 | MESON_PIN(GPIO_TEST_N, EE_OFF), | |
128 | }; | |
129 | ||
130 | static const unsigned int emmc_nand_d07_pins[] = { | |
131 | PIN(BOOT_0, EE_OFF), PIN(BOOT_1, EE_OFF), PIN(BOOT_2, EE_OFF), | |
132 | PIN(BOOT_3, EE_OFF), PIN(BOOT_4, EE_OFF), PIN(BOOT_5, EE_OFF), | |
133 | PIN(BOOT_6, EE_OFF), PIN(BOOT_7, EE_OFF), | |
134 | }; | |
135 | static const unsigned int emmc_clk_pins[] = { PIN(BOOT_8, EE_OFF) }; | |
136 | static const unsigned int emmc_cmd_pins[] = { PIN(BOOT_10, EE_OFF) }; | |
137 | static const unsigned int emmc_ds_pins[] = { PIN(BOOT_15, EE_OFF) }; | |
138 | ||
139 | static const unsigned int sdcard_d0_pins[] = { PIN(CARD_1, EE_OFF) }; | |
140 | static const unsigned int sdcard_d1_pins[] = { PIN(CARD_0, EE_OFF) }; | |
141 | static const unsigned int sdcard_d2_pins[] = { PIN(CARD_5, EE_OFF) }; | |
142 | static const unsigned int sdcard_d3_pins[] = { PIN(CARD_4, EE_OFF) }; | |
143 | static const unsigned int sdcard_cmd_pins[] = { PIN(CARD_3, EE_OFF) }; | |
144 | static const unsigned int sdcard_clk_pins[] = { PIN(CARD_2, EE_OFF) }; | |
145 | ||
146 | static const unsigned int sdio_d0_pins[] = { PIN(GPIOX_0, EE_OFF) }; | |
147 | static const unsigned int sdio_d1_pins[] = { PIN(GPIOX_1, EE_OFF) }; | |
148 | static const unsigned int sdio_d2_pins[] = { PIN(GPIOX_2, EE_OFF) }; | |
149 | static const unsigned int sdio_d3_pins[] = { PIN(GPIOX_3, EE_OFF) }; | |
150 | static const unsigned int sdio_cmd_pins[] = { PIN(GPIOX_4, EE_OFF) }; | |
151 | static const unsigned int sdio_clk_pins[] = { PIN(GPIOX_5, EE_OFF) }; | |
152 | static const unsigned int sdio_irq_pins[] = { PIN(GPIOX_7, EE_OFF) }; | |
153 | ||
154 | static const unsigned int nand_ce0_pins[] = { PIN(BOOT_8, EE_OFF) }; | |
155 | static const unsigned int nand_ce1_pins[] = { PIN(BOOT_9, EE_OFF) }; | |
156 | static const unsigned int nand_rb0_pins[] = { PIN(BOOT_10, EE_OFF) }; | |
157 | static const unsigned int nand_ale_pins[] = { PIN(BOOT_11, EE_OFF) }; | |
158 | static const unsigned int nand_cle_pins[] = { PIN(BOOT_12, EE_OFF) }; | |
159 | static const unsigned int nand_wen_clk_pins[] = { PIN(BOOT_13, EE_OFF) }; | |
160 | static const unsigned int nand_ren_wr_pins[] = { PIN(BOOT_14, EE_OFF) }; | |
161 | static const unsigned int nand_dqs_pins[] = { PIN(BOOT_15, EE_OFF) }; | |
162 | ||
163 | static const unsigned int uart_tx_a_pins[] = { PIN(GPIOX_12, EE_OFF) }; | |
164 | static const unsigned int uart_rx_a_pins[] = { PIN(GPIOX_13, EE_OFF) }; | |
165 | static const unsigned int uart_cts_a_pins[] = { PIN(GPIOX_14, EE_OFF) }; | |
166 | static const unsigned int uart_rts_a_pins[] = { PIN(GPIOX_15, EE_OFF) }; | |
167 | ||
168 | static const unsigned int uart_tx_b_pins[] = { PIN(GPIODV_24, EE_OFF) }; | |
169 | static const unsigned int uart_rx_b_pins[] = { PIN(GPIODV_25, EE_OFF) }; | |
170 | ||
171 | static const unsigned int uart_tx_c_pins[] = { PIN(GPIOX_8, EE_OFF) }; | |
172 | static const unsigned int uart_rx_c_pins[] = { PIN(GPIOX_9, EE_OFF) }; | |
173 | ||
174 | static const unsigned int i2c_sck_a_pins[] = { PIN(GPIODV_25, EE_OFF) }; | |
175 | static const unsigned int i2c_sda_a_pins[] = { PIN(GPIODV_24, EE_OFF) }; | |
176 | ||
177 | static const unsigned int i2c_sck_b_pins[] = { PIN(GPIODV_27, EE_OFF) }; | |
178 | static const unsigned int i2c_sda_b_pins[] = { PIN(GPIODV_26, EE_OFF) }; | |
179 | ||
180 | static const unsigned int i2c_sck_c_pins[] = { PIN(GPIODV_29, EE_OFF) }; | |
181 | static const unsigned int i2c_sda_c_pins[] = { PIN(GPIODV_28, EE_OFF) }; | |
182 | ||
183 | static const unsigned int eth_mdio_pins[] = { PIN(GPIOZ_0, EE_OFF) }; | |
184 | static const unsigned int eth_mdc_pins[] = { PIN(GPIOZ_1, EE_OFF) }; | |
185 | static const unsigned int eth_clk_rx_clk_pins[] = { PIN(GPIOZ_2, EE_OFF) }; | |
186 | static const unsigned int eth_rx_dv_pins[] = { PIN(GPIOZ_3, EE_OFF) }; | |
187 | static const unsigned int eth_rxd0_pins[] = { PIN(GPIOZ_4, EE_OFF) }; | |
188 | static const unsigned int eth_rxd1_pins[] = { PIN(GPIOZ_5, EE_OFF) }; | |
189 | static const unsigned int eth_rxd2_pins[] = { PIN(GPIOZ_6, EE_OFF) }; | |
190 | static const unsigned int eth_rxd3_pins[] = { PIN(GPIOZ_7, EE_OFF) }; | |
191 | static const unsigned int eth_rgmii_tx_clk_pins[] = { PIN(GPIOZ_8, EE_OFF) }; | |
192 | static const unsigned int eth_tx_en_pins[] = { PIN(GPIOZ_9, EE_OFF) }; | |
193 | static const unsigned int eth_txd0_pins[] = { PIN(GPIOZ_10, EE_OFF) }; | |
194 | static const unsigned int eth_txd1_pins[] = { PIN(GPIOZ_11, EE_OFF) }; | |
195 | static const unsigned int eth_txd2_pins[] = { PIN(GPIOZ_12, EE_OFF) }; | |
196 | static const unsigned int eth_txd3_pins[] = { PIN(GPIOZ_13, EE_OFF) }; | |
197 | ||
198 | static const unsigned int pwm_e_pins[] = { PIN(GPIOX_16, EE_OFF) }; | |
199 | ||
200 | static const struct pinctrl_pin_desc meson_gxl_aobus_pins[] = { | |
201 | MESON_PIN(GPIOAO_0, 0), | |
202 | MESON_PIN(GPIOAO_1, 0), | |
203 | MESON_PIN(GPIOAO_2, 0), | |
204 | MESON_PIN(GPIOAO_3, 0), | |
205 | MESON_PIN(GPIOAO_4, 0), | |
206 | MESON_PIN(GPIOAO_5, 0), | |
207 | MESON_PIN(GPIOAO_6, 0), | |
208 | MESON_PIN(GPIOAO_7, 0), | |
209 | MESON_PIN(GPIOAO_8, 0), | |
210 | MESON_PIN(GPIOAO_9, 0), | |
211 | }; | |
212 | ||
213 | static const unsigned int uart_tx_ao_a_pins[] = { PIN(GPIOAO_0, 0) }; | |
214 | static const unsigned int uart_rx_ao_a_pins[] = { PIN(GPIOAO_1, 0) }; | |
215 | static const unsigned int uart_cts_ao_a_pins[] = { PIN(GPIOAO_2, 0) }; | |
216 | static const unsigned int uart_rts_ao_a_pins[] = { PIN(GPIOAO_3, 0) }; | |
b27e3648 MB |
217 | static const unsigned int uart_tx_ao_b_pins[] = { PIN(GPIOAO_4, 0) }; |
218 | static const unsigned int uart_rx_ao_b_pins[] = { PIN(GPIOAO_5, 0) }; | |
0f15f500 NA |
219 | static const unsigned int uart_cts_ao_b_pins[] = { PIN(GPIOAO_2, 0) }; |
220 | static const unsigned int uart_rts_ao_b_pins[] = { PIN(GPIOAO_3, 0) }; | |
221 | ||
222 | static const unsigned int remote_input_ao_pins[] = {PIN(GPIOAO_7, 0) }; | |
223 | ||
224 | static struct meson_pmx_group meson_gxl_periphs_groups[] = { | |
225 | GPIO_GROUP(GPIOZ_0, EE_OFF), | |
226 | GPIO_GROUP(GPIOZ_1, EE_OFF), | |
227 | GPIO_GROUP(GPIOZ_2, EE_OFF), | |
228 | GPIO_GROUP(GPIOZ_3, EE_OFF), | |
229 | GPIO_GROUP(GPIOZ_4, EE_OFF), | |
230 | GPIO_GROUP(GPIOZ_5, EE_OFF), | |
231 | GPIO_GROUP(GPIOZ_6, EE_OFF), | |
232 | GPIO_GROUP(GPIOZ_7, EE_OFF), | |
233 | GPIO_GROUP(GPIOZ_8, EE_OFF), | |
234 | GPIO_GROUP(GPIOZ_9, EE_OFF), | |
235 | GPIO_GROUP(GPIOZ_10, EE_OFF), | |
236 | GPIO_GROUP(GPIOZ_11, EE_OFF), | |
237 | GPIO_GROUP(GPIOZ_12, EE_OFF), | |
238 | GPIO_GROUP(GPIOZ_13, EE_OFF), | |
239 | GPIO_GROUP(GPIOZ_14, EE_OFF), | |
240 | GPIO_GROUP(GPIOZ_15, EE_OFF), | |
241 | ||
242 | GPIO_GROUP(GPIOH_0, EE_OFF), | |
243 | GPIO_GROUP(GPIOH_1, EE_OFF), | |
244 | GPIO_GROUP(GPIOH_2, EE_OFF), | |
245 | GPIO_GROUP(GPIOH_3, EE_OFF), | |
246 | GPIO_GROUP(GPIOH_4, EE_OFF), | |
247 | GPIO_GROUP(GPIOH_5, EE_OFF), | |
248 | GPIO_GROUP(GPIOH_6, EE_OFF), | |
249 | GPIO_GROUP(GPIOH_7, EE_OFF), | |
250 | GPIO_GROUP(GPIOH_8, EE_OFF), | |
251 | GPIO_GROUP(GPIOH_9, EE_OFF), | |
252 | ||
253 | GPIO_GROUP(BOOT_0, EE_OFF), | |
254 | GPIO_GROUP(BOOT_1, EE_OFF), | |
255 | GPIO_GROUP(BOOT_2, EE_OFF), | |
256 | GPIO_GROUP(BOOT_3, EE_OFF), | |
257 | GPIO_GROUP(BOOT_4, EE_OFF), | |
258 | GPIO_GROUP(BOOT_5, EE_OFF), | |
259 | GPIO_GROUP(BOOT_6, EE_OFF), | |
260 | GPIO_GROUP(BOOT_7, EE_OFF), | |
261 | GPIO_GROUP(BOOT_8, EE_OFF), | |
262 | GPIO_GROUP(BOOT_9, EE_OFF), | |
263 | GPIO_GROUP(BOOT_10, EE_OFF), | |
264 | GPIO_GROUP(BOOT_11, EE_OFF), | |
265 | GPIO_GROUP(BOOT_12, EE_OFF), | |
266 | GPIO_GROUP(BOOT_13, EE_OFF), | |
267 | GPIO_GROUP(BOOT_14, EE_OFF), | |
268 | GPIO_GROUP(BOOT_15, EE_OFF), | |
269 | ||
270 | GPIO_GROUP(CARD_0, EE_OFF), | |
271 | GPIO_GROUP(CARD_1, EE_OFF), | |
272 | GPIO_GROUP(CARD_2, EE_OFF), | |
273 | GPIO_GROUP(CARD_3, EE_OFF), | |
274 | GPIO_GROUP(CARD_4, EE_OFF), | |
275 | GPIO_GROUP(CARD_5, EE_OFF), | |
276 | GPIO_GROUP(CARD_6, EE_OFF), | |
277 | ||
278 | GPIO_GROUP(GPIODV_0, EE_OFF), | |
279 | GPIO_GROUP(GPIODV_1, EE_OFF), | |
280 | GPIO_GROUP(GPIODV_2, EE_OFF), | |
281 | GPIO_GROUP(GPIODV_3, EE_OFF), | |
282 | GPIO_GROUP(GPIODV_4, EE_OFF), | |
283 | GPIO_GROUP(GPIODV_5, EE_OFF), | |
284 | GPIO_GROUP(GPIODV_6, EE_OFF), | |
285 | GPIO_GROUP(GPIODV_7, EE_OFF), | |
286 | GPIO_GROUP(GPIODV_8, EE_OFF), | |
287 | GPIO_GROUP(GPIODV_9, EE_OFF), | |
288 | GPIO_GROUP(GPIODV_10, EE_OFF), | |
289 | GPIO_GROUP(GPIODV_11, EE_OFF), | |
290 | GPIO_GROUP(GPIODV_12, EE_OFF), | |
291 | GPIO_GROUP(GPIODV_13, EE_OFF), | |
292 | GPIO_GROUP(GPIODV_14, EE_OFF), | |
293 | GPIO_GROUP(GPIODV_15, EE_OFF), | |
294 | GPIO_GROUP(GPIODV_16, EE_OFF), | |
295 | GPIO_GROUP(GPIODV_17, EE_OFF), | |
296 | GPIO_GROUP(GPIODV_19, EE_OFF), | |
297 | GPIO_GROUP(GPIODV_20, EE_OFF), | |
298 | GPIO_GROUP(GPIODV_21, EE_OFF), | |
299 | GPIO_GROUP(GPIODV_22, EE_OFF), | |
300 | GPIO_GROUP(GPIODV_23, EE_OFF), | |
301 | GPIO_GROUP(GPIODV_24, EE_OFF), | |
302 | GPIO_GROUP(GPIODV_25, EE_OFF), | |
303 | GPIO_GROUP(GPIODV_26, EE_OFF), | |
304 | GPIO_GROUP(GPIODV_27, EE_OFF), | |
305 | GPIO_GROUP(GPIODV_28, EE_OFF), | |
306 | GPIO_GROUP(GPIODV_29, EE_OFF), | |
307 | ||
308 | GPIO_GROUP(GPIOX_0, EE_OFF), | |
309 | GPIO_GROUP(GPIOX_1, EE_OFF), | |
310 | GPIO_GROUP(GPIOX_2, EE_OFF), | |
311 | GPIO_GROUP(GPIOX_3, EE_OFF), | |
312 | GPIO_GROUP(GPIOX_4, EE_OFF), | |
313 | GPIO_GROUP(GPIOX_5, EE_OFF), | |
314 | GPIO_GROUP(GPIOX_6, EE_OFF), | |
315 | GPIO_GROUP(GPIOX_7, EE_OFF), | |
316 | GPIO_GROUP(GPIOX_8, EE_OFF), | |
317 | GPIO_GROUP(GPIOX_9, EE_OFF), | |
318 | GPIO_GROUP(GPIOX_10, EE_OFF), | |
319 | GPIO_GROUP(GPIOX_11, EE_OFF), | |
320 | GPIO_GROUP(GPIOX_12, EE_OFF), | |
321 | GPIO_GROUP(GPIOX_13, EE_OFF), | |
322 | GPIO_GROUP(GPIOX_14, EE_OFF), | |
323 | GPIO_GROUP(GPIOX_15, EE_OFF), | |
324 | GPIO_GROUP(GPIOX_16, EE_OFF), | |
325 | GPIO_GROUP(GPIOX_17, EE_OFF), | |
326 | GPIO_GROUP(GPIOX_18, EE_OFF), | |
327 | ||
328 | GPIO_GROUP(GPIOCLK_0, EE_OFF), | |
329 | GPIO_GROUP(GPIOCLK_1, EE_OFF), | |
330 | ||
331 | GPIO_GROUP(GPIO_TEST_N, EE_OFF), | |
332 | ||
333 | /* Bank X */ | |
334 | GROUP(sdio_d0, 5, 31), | |
335 | GROUP(sdio_d1, 5, 30), | |
336 | GROUP(sdio_d2, 5, 29), | |
337 | GROUP(sdio_d3, 5, 28), | |
338 | GROUP(sdio_cmd, 5, 27), | |
339 | GROUP(sdio_clk, 5, 26), | |
340 | GROUP(sdio_irq, 5, 24), | |
341 | GROUP(uart_tx_a, 5, 19), | |
342 | GROUP(uart_rx_a, 5, 18), | |
343 | GROUP(uart_cts_a, 5, 17), | |
344 | GROUP(uart_rts_a, 5, 16), | |
345 | GROUP(uart_tx_c, 5, 13), | |
346 | GROUP(uart_rx_c, 5, 12), | |
347 | GROUP(pwm_e, 5, 15), | |
348 | ||
349 | /* Bank Z */ | |
350 | GROUP(eth_mdio, 4, 22), | |
351 | GROUP(eth_mdc, 4, 23), | |
352 | GROUP(eth_clk_rx_clk, 4, 21), | |
353 | GROUP(eth_rx_dv, 4, 20), | |
354 | GROUP(eth_rxd0, 4, 19), | |
355 | GROUP(eth_rxd1, 4, 18), | |
356 | GROUP(eth_rxd2, 4, 17), | |
357 | GROUP(eth_rxd3, 4, 16), | |
358 | GROUP(eth_rgmii_tx_clk, 4, 15), | |
359 | GROUP(eth_tx_en, 4, 14), | |
360 | GROUP(eth_txd0, 4, 13), | |
361 | GROUP(eth_txd1, 4, 12), | |
362 | GROUP(eth_txd2, 4, 11), | |
363 | GROUP(eth_txd3, 4, 10), | |
364 | ||
365 | /* Bank DV */ | |
366 | GROUP(uart_tx_b, 2, 16), | |
367 | GROUP(uart_rx_b, 2, 15), | |
368 | GROUP(i2c_sck_a, 1, 15), | |
369 | GROUP(i2c_sda_a, 1, 14), | |
370 | GROUP(i2c_sck_b, 1, 13), | |
371 | GROUP(i2c_sda_b, 1, 12), | |
372 | GROUP(i2c_sck_c, 1, 11), | |
373 | GROUP(i2c_sda_c, 1, 10), | |
374 | ||
375 | /* Bank BOOT */ | |
376 | GROUP(emmc_nand_d07, 7, 31), | |
377 | GROUP(emmc_clk, 7, 30), | |
378 | GROUP(emmc_cmd, 7, 29), | |
379 | GROUP(emmc_ds, 7, 28), | |
380 | GROUP(nand_ce0, 7, 7), | |
381 | GROUP(nand_ce1, 7, 6), | |
382 | GROUP(nand_rb0, 7, 5), | |
383 | GROUP(nand_ale, 7, 4), | |
384 | GROUP(nand_cle, 7, 3), | |
385 | GROUP(nand_wen_clk, 7, 2), | |
386 | GROUP(nand_ren_wr, 7, 1), | |
387 | GROUP(nand_dqs, 7, 0), | |
388 | ||
389 | /* Bank CARD */ | |
390 | GROUP(sdcard_d1, 6, 5), | |
391 | GROUP(sdcard_d0, 6, 4), | |
392 | GROUP(sdcard_d3, 6, 1), | |
393 | GROUP(sdcard_d2, 6, 0), | |
394 | GROUP(sdcard_cmd, 6, 2), | |
395 | GROUP(sdcard_clk, 6, 3), | |
396 | }; | |
397 | ||
398 | static struct meson_pmx_group meson_gxl_aobus_groups[] = { | |
399 | GPIO_GROUP(GPIOAO_0, 0), | |
400 | GPIO_GROUP(GPIOAO_1, 0), | |
401 | GPIO_GROUP(GPIOAO_2, 0), | |
402 | GPIO_GROUP(GPIOAO_3, 0), | |
403 | GPIO_GROUP(GPIOAO_4, 0), | |
404 | GPIO_GROUP(GPIOAO_5, 0), | |
405 | GPIO_GROUP(GPIOAO_6, 0), | |
406 | GPIO_GROUP(GPIOAO_7, 0), | |
407 | GPIO_GROUP(GPIOAO_8, 0), | |
408 | GPIO_GROUP(GPIOAO_9, 0), | |
409 | ||
410 | /* bank AO */ | |
b27e3648 | 411 | GROUP(uart_tx_ao_b, 0, 24), |
0f15f500 NA |
412 | GROUP(uart_rx_ao_b, 0, 25), |
413 | GROUP(uart_tx_ao_a, 0, 12), | |
414 | GROUP(uart_rx_ao_a, 0, 11), | |
415 | GROUP(uart_cts_ao_a, 0, 10), | |
416 | GROUP(uart_rts_ao_a, 0, 9), | |
417 | GROUP(uart_cts_ao_b, 0, 8), | |
418 | GROUP(uart_rts_ao_b, 0, 7), | |
419 | GROUP(remote_input_ao, 0, 0), | |
420 | }; | |
421 | ||
422 | static const char * const gpio_periphs_groups[] = { | |
423 | "GPIOZ_0", "GPIOZ_1", "GPIOZ_2", "GPIOZ_3", "GPIOZ_4", | |
424 | "GPIOZ_5", "GPIOZ_6", "GPIOZ_7", "GPIOZ_8", "GPIOZ_9", | |
425 | "GPIOZ_10", "GPIOZ_11", "GPIOZ_12", "GPIOZ_13", "GPIOZ_14", | |
426 | "GPIOZ_15", | |
427 | ||
428 | "GPIOH_0", "GPIOH_1", "GPIOH_2", "GPIOH_3", "GPIOH_4", | |
429 | "GPIOH_5", "GPIOH_6", "GPIOH_7", "GPIOH_8", "GPIOH_9", | |
430 | ||
431 | "BOOT_0", "BOOT_1", "BOOT_2", "BOOT_3", "BOOT_4", | |
432 | "BOOT_5", "BOOT_6", "BOOT_7", "BOOT_8", "BOOT_9", | |
433 | "BOOT_10", "BOOT_11", "BOOT_12", "BOOT_13", "BOOT_14", | |
434 | "BOOT_15", | |
435 | ||
436 | "CARD_0", "CARD_1", "CARD_2", "CARD_3", "CARD_4", | |
437 | "CARD_5", "CARD_6", | |
438 | ||
439 | "GPIODV_0", "GPIODV_1", "GPIODV_2", "GPIODV_3", "GPIODV_4", | |
440 | "GPIODV_5", "GPIODV_6", "GPIODV_7", "GPIODV_8", "GPIODV_9", | |
441 | "GPIODV_10", "GPIODV_11", "GPIODV_12", "GPIODV_13", "GPIODV_14", | |
442 | "GPIODV_15", "GPIODV_16", "GPIODV_17", "GPIODV_18", "GPIODV_19", | |
443 | "GPIODV_20", "GPIODV_21", "GPIODV_22", "GPIODV_23", "GPIODV_24", | |
444 | "GPIODV_25", "GPIODV_26", "GPIODV_27", "GPIODV_28", "GPIODV_29", | |
445 | ||
446 | "GPIOX_0", "GPIOX_1", "GPIOX_2", "GPIOX_3", "GPIOX_4", | |
447 | "GPIOX_5", "GPIOX_6", "GPIOX_7", "GPIOX_8", "GPIOX_9", | |
448 | "GPIOX_10", "GPIOX_11", "GPIOX_12", "GPIOX_13", "GPIOX_14", | |
449 | "GPIOX_15", "GPIOX_16", "GPIOX_17", "GPIOX_18", | |
450 | ||
451 | "GPIO_TEST_N", | |
452 | }; | |
453 | ||
454 | static const char * const emmc_groups[] = { | |
455 | "emmc_nand_d07", "emmc_clk", "emmc_cmd", "emmc_ds", | |
456 | }; | |
457 | ||
458 | static const char * const sdcard_groups[] = { | |
459 | "sdcard_d0", "sdcard_d1", "sdcard_d2", "sdcard_d3", | |
460 | "sdcard_cmd", "sdcard_clk", | |
461 | }; | |
462 | ||
463 | static const char * const sdio_groups[] = { | |
464 | "sdio_d0", "sdio_d1", "sdio_d2", "sdio_d3", | |
465 | "sdio_cmd", "sdio_clk", "sdio_irq", | |
466 | }; | |
467 | ||
468 | static const char * const nand_groups[] = { | |
469 | "nand_ce0", "nand_ce1", "nand_rb0", "nand_ale", "nand_cle", | |
470 | "nand_wen_clk", "nand_ren_wr", "nand_dqs", | |
471 | }; | |
472 | ||
473 | static const char * const uart_a_groups[] = { | |
474 | "uart_tx_a", "uart_rx_a", "uart_cts_a", "uart_rts_a", | |
475 | }; | |
476 | ||
477 | static const char * const uart_b_groups[] = { | |
478 | "uart_tx_b", "uart_rx_b", | |
479 | }; | |
480 | ||
481 | static const char * const uart_c_groups[] = { | |
482 | "uart_tx_c", "uart_rx_c", | |
483 | }; | |
484 | ||
485 | static const char * const i2c_a_groups[] = { | |
486 | "i2c_sck_a", "i2c_sda_a", | |
487 | }; | |
488 | ||
489 | static const char * const i2c_b_groups[] = { | |
490 | "i2c_sck_b", "i2c_sda_b", | |
491 | }; | |
492 | ||
493 | static const char * const i2c_c_groups[] = { | |
494 | "i2c_sck_c", "i2c_sda_c", | |
495 | }; | |
496 | ||
497 | static const char * const eth_groups[] = { | |
498 | "eth_mdio", "eth_mdc", "eth_clk_rx_clk", "eth_rx_dv", | |
499 | "eth_rxd0", "eth_rxd1", "eth_rxd2", "eth_rxd3", | |
500 | "eth_rgmii_tx_clk", "eth_tx_en", | |
501 | "eth_txd0", "eth_txd1", "eth_txd2", "eth_txd3", | |
502 | }; | |
503 | ||
504 | static const char * const pwm_e_groups[] = { | |
505 | "pwm_e", | |
506 | }; | |
507 | ||
508 | static const char * const gpio_aobus_groups[] = { | |
509 | "GPIOAO_0", "GPIOAO_1", "GPIOAO_2", "GPIOAO_3", "GPIOAO_4", | |
510 | "GPIOAO_5", "GPIOAO_6", "GPIOAO_7", "GPIOAO_8", "GPIOAO_9", | |
511 | }; | |
512 | ||
513 | static const char * const uart_ao_groups[] = { | |
514 | "uart_tx_ao_a", "uart_rx_ao_a", "uart_cts_ao_a", "uart_rts_ao_a", | |
515 | }; | |
516 | ||
517 | static const char * const uart_ao_b_groups[] = { | |
518 | "uart_tx_ao_b", "uart_rx_ao_b", "uart_cts_ao_b", "uart_rts_ao_b", | |
519 | }; | |
520 | ||
521 | static const char * const remote_input_ao_groups[] = { | |
522 | "remote_input_ao", | |
523 | }; | |
524 | ||
525 | static struct meson_pmx_func meson_gxl_periphs_functions[] = { | |
526 | FUNCTION(gpio_periphs), | |
527 | FUNCTION(emmc), | |
528 | FUNCTION(sdcard), | |
529 | FUNCTION(sdio), | |
530 | FUNCTION(nand), | |
531 | FUNCTION(uart_a), | |
532 | FUNCTION(uart_b), | |
533 | FUNCTION(uart_c), | |
534 | FUNCTION(i2c_a), | |
535 | FUNCTION(i2c_b), | |
536 | FUNCTION(i2c_c), | |
537 | FUNCTION(eth), | |
538 | FUNCTION(pwm_e), | |
539 | }; | |
540 | ||
541 | static struct meson_pmx_func meson_gxl_aobus_functions[] = { | |
542 | FUNCTION(gpio_aobus), | |
543 | FUNCTION(uart_ao), | |
544 | FUNCTION(uart_ao_b), | |
545 | FUNCTION(remote_input_ao), | |
546 | }; | |
547 | ||
548 | static struct meson_bank meson_gxl_periphs_banks[] = { | |
549 | /* name first last pullen pull dir out in */ | |
550 | BANK("X", PIN(GPIOX_0, EE_OFF), PIN(GPIOX_18, EE_OFF), 4, 0, 4, 0, 12, 0, 13, 0, 14, 0), | |
551 | BANK("DV", PIN(GPIODV_0, EE_OFF), PIN(GPIODV_29, EE_OFF), 0, 0, 0, 0, 0, 0, 1, 0, 2, 0), | |
552 | BANK("H", PIN(GPIOH_0, EE_OFF), PIN(GPIOH_9, EE_OFF), 1, 20, 1, 20, 3, 20, 4, 20, 5, 20), | |
553 | BANK("Z", PIN(GPIOZ_0, EE_OFF), PIN(GPIOZ_15, EE_OFF), 3, 0, 3, 0, 9, 0, 10, 0, 11, 0), | |
554 | BANK("CARD", PIN(CARD_0, EE_OFF), PIN(CARD_6, EE_OFF), 2, 20, 2, 20, 6, 20, 7, 20, 8, 20), | |
555 | BANK("BOOT", PIN(BOOT_0, EE_OFF), PIN(BOOT_15, EE_OFF), 2, 0, 2, 0, 6, 0, 7, 0, 8, 0), | |
556 | BANK("CLK", PIN(GPIOCLK_0, EE_OFF), PIN(GPIOCLK_1, EE_OFF), 3, 28, 3, 28, 9, 28, 10, 28, 11, 28), | |
557 | }; | |
558 | ||
559 | static struct meson_bank meson_gxl_aobus_banks[] = { | |
560 | /* name first last pullen pull dir out in */ | |
561 | BANK("AO", PIN(GPIOAO_0, 0), PIN(GPIOAO_9, 0), 0, 0, 0, 16, 0, 0, 0, 16, 1, 0), | |
562 | }; | |
563 | ||
564 | struct meson_pinctrl_data meson_gxl_periphs_pinctrl_data = { | |
565 | .name = "periphs-banks", | |
566 | .pin_base = 10, | |
567 | .pins = meson_gxl_periphs_pins, | |
568 | .groups = meson_gxl_periphs_groups, | |
569 | .funcs = meson_gxl_periphs_functions, | |
570 | .banks = meson_gxl_periphs_banks, | |
571 | .num_pins = ARRAY_SIZE(meson_gxl_periphs_pins), | |
572 | .num_groups = ARRAY_SIZE(meson_gxl_periphs_groups), | |
573 | .num_funcs = ARRAY_SIZE(meson_gxl_periphs_functions), | |
574 | .num_banks = ARRAY_SIZE(meson_gxl_periphs_banks), | |
575 | }; | |
576 | ||
577 | struct meson_pinctrl_data meson_gxl_aobus_pinctrl_data = { | |
578 | .name = "aobus-banks", | |
579 | .pin_base = 0, | |
580 | .pins = meson_gxl_aobus_pins, | |
581 | .groups = meson_gxl_aobus_groups, | |
582 | .funcs = meson_gxl_aobus_functions, | |
583 | .banks = meson_gxl_aobus_banks, | |
584 | .num_pins = ARRAY_SIZE(meson_gxl_aobus_pins), | |
585 | .num_groups = ARRAY_SIZE(meson_gxl_aobus_groups), | |
586 | .num_funcs = ARRAY_SIZE(meson_gxl_aobus_functions), | |
587 | .num_banks = ARRAY_SIZE(meson_gxl_aobus_banks), | |
588 | }; |