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pinctrl: qcom: add get_direction function
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1/*
2 * Pin controller and GPIO driver for Amlogic Meson SoCs
3 *
4 * Copyright (C) 2014 Beniamino Galvani <b.galvani@gmail.com>
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * version 2 as published by the Free Software Foundation.
9 *
10 * You should have received a copy of the GNU General Public License
11 * along with this program. If not, see <http://www.gnu.org/licenses/>.
12 */
13
14#include <linux/gpio.h>
15#include <linux/pinctrl/pinctrl.h>
16#include <linux/regmap.h>
17#include <linux/types.h>
18
19/**
20 * struct meson_pmx_group - a pinmux group
21 *
22 * @name: group name
23 * @pins: pins in the group
24 * @num_pins: number of pins in the group
25 * @is_gpio: whether the group is a single GPIO group
26 * @reg: register offset for the group in the domain mux registers
27 * @bit bit index enabling the group
28 * @domain: index of the domain this group belongs to
29 */
30struct meson_pmx_group {
31 const char *name;
32 const unsigned int *pins;
33 unsigned int num_pins;
34 bool is_gpio;
35 unsigned int reg;
36 unsigned int bit;
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37};
38
39/**
40 * struct meson_pmx_func - a pinmux function
41 *
42 * @name: function name
43 * @groups: groups in the function
44 * @num_groups: number of groups in the function
45 */
46struct meson_pmx_func {
47 const char *name;
48 const char * const *groups;
49 unsigned int num_groups;
50};
51
52/**
53 * struct meson_reg_desc - a register descriptor
54 *
55 * @reg: register offset in the regmap
56 * @bit: bit index in register
57 *
58 * The structure describes the information needed to control pull,
59 * pull-enable, direction, etc. for a single pin
60 */
61struct meson_reg_desc {
62 unsigned int reg;
63 unsigned int bit;
64};
65
66/**
67 * enum meson_reg_type - type of registers encoded in @meson_reg_desc
68 */
69enum meson_reg_type {
70 REG_PULLEN,
71 REG_PULL,
72 REG_DIR,
73 REG_OUT,
74 REG_IN,
75 NUM_REG,
76};
77
78/**
79 * struct meson bank
80 *
81 * @name: bank name
82 * @first: first pin of the bank
83 * @last: last pin of the bank
84 * @regs: array of register descriptors
85 *
86 * A bank represents a set of pins controlled by a contiguous set of
87 * bits in the domain registers. The structure specifies which bits in
88 * the regmap control the different functionalities. Each member of
89 * the @regs array refers to the first pin of the bank.
90 */
91struct meson_bank {
92 const char *name;
93 unsigned int first;
94 unsigned int last;
95 struct meson_reg_desc regs[NUM_REG];
96};
97
6ac73095 98struct meson_pinctrl_data {
db80f0e1 99 const char *name;
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100 const struct pinctrl_pin_desc *pins;
101 struct meson_pmx_group *groups;
102 struct meson_pmx_func *funcs;
db80f0e1 103 unsigned int pin_base;
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104 unsigned int num_pins;
105 unsigned int num_groups;
106 unsigned int num_funcs;
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107 struct meson_bank *banks;
108 unsigned int num_banks;
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109};
110
111struct meson_pinctrl {
112 struct device *dev;
113 struct pinctrl_dev *pcdev;
114 struct pinctrl_desc desc;
115 struct meson_pinctrl_data *data;
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116 struct regmap *reg_mux;
117 struct regmap *reg_pullen;
118 struct regmap *reg_pull;
119 struct regmap *reg_gpio;
120 struct gpio_chip chip;
121 struct device_node *of_node;
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122};
123
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124#define PIN(x, b) (b + x)
125
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126#define GROUP(grp, r, b) \
127 { \
128 .name = #grp, \
129 .pins = grp ## _pins, \
130 .num_pins = ARRAY_SIZE(grp ## _pins), \
131 .reg = r, \
132 .bit = b, \
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133 }
134
0cf6f3c2 135#define GPIO_GROUP(gpio, b) \
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136 { \
137 .name = #gpio, \
0cf6f3c2 138 .pins = (const unsigned int[]){ PIN(gpio, b) }, \
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139 .num_pins = 1, \
140 .is_gpio = true, \
141 }
142
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143#define FUNCTION(fn) \
144 { \
145 .name = #fn, \
146 .groups = fn ## _groups, \
147 .num_groups = ARRAY_SIZE(fn ## _groups), \
148 }
149
150#define BANK(n, f, l, per, peb, pr, pb, dr, db, or, ob, ir, ib) \
151 { \
152 .name = n, \
153 .first = f, \
154 .last = l, \
155 .regs = { \
156 [REG_PULLEN] = { per, peb }, \
157 [REG_PULL] = { pr, pb }, \
158 [REG_DIR] = { dr, db }, \
159 [REG_OUT] = { or, ob }, \
160 [REG_IN] = { ir, ib }, \
161 }, \
162 }
163
0cf6f3c2 164#define MESON_PIN(x, b) PINCTRL_PIN(PIN(x, b), #x)
6ac73095 165
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166extern struct meson_pinctrl_data meson8_cbus_pinctrl_data;
167extern struct meson_pinctrl_data meson8_aobus_pinctrl_data;
168extern struct meson_pinctrl_data meson8b_cbus_pinctrl_data;
169extern struct meson_pinctrl_data meson8b_aobus_pinctrl_data;
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170extern struct meson_pinctrl_data meson_gxbb_periphs_pinctrl_data;
171extern struct meson_pinctrl_data meson_gxbb_aobus_pinctrl_data;
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172extern struct meson_pinctrl_data meson_gxl_periphs_pinctrl_data;
173extern struct meson_pinctrl_data meson_gxl_aobus_pinctrl_data;