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0a8b8353 1/*
2 * intel_pmc_ipc.c: Driver for the Intel PMC IPC mechanism
3 *
4 * (C) Copyright 2014-2015 Intel Corporation
5 *
6 * This driver is based on Intel SCU IPC driver(intel_scu_opc.c) by
7 * Sreedhara DS <sreedhara.ds@intel.com>
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License
11 * as published by the Free Software Foundation; version 2
12 * of the License.
13 *
14 * PMC running in ARC processor communicates with other entity running in IA
15 * core through IPC mechanism which in turn messaging between IA core ad PMC.
16 */
17
18#include <linux/module.h>
19#include <linux/delay.h>
20#include <linux/errno.h>
21#include <linux/init.h>
22#include <linux/device.h>
23#include <linux/pm.h>
24#include <linux/pci.h>
25#include <linux/platform_device.h>
26#include <linux/interrupt.h>
27#include <linux/pm_qos.h>
28#include <linux/kernel.h>
29#include <linux/bitops.h>
30#include <linux/sched.h>
31#include <linux/atomic.h>
32#include <linux/notifier.h>
33#include <linux/suspend.h>
34#include <linux/acpi.h>
35#include <asm/intel_pmc_ipc.h>
420b54de 36#include <linux/platform_data/itco_wdt.h>
0a8b8353 37
38/*
39 * IPC registers
40 * The IA write to IPC_CMD command register triggers an interrupt to the ARC,
41 * The ARC handles the interrupt and services it, writing optional data to
42 * the IPC1 registers, updates the IPC_STS response register with the status.
43 */
44#define IPC_CMD 0x0
45#define IPC_CMD_MSI 0x100
46#define IPC_CMD_SIZE 16
47#define IPC_CMD_SUBCMD 12
48#define IPC_STATUS 0x04
49#define IPC_STATUS_IRQ 0x4
50#define IPC_STATUS_ERR 0x2
51#define IPC_STATUS_BUSY 0x1
52#define IPC_SPTR 0x08
53#define IPC_DPTR 0x0C
54#define IPC_WRITE_BUFFER 0x80
55#define IPC_READ_BUFFER 0x90
56
57/*
58 * 16-byte buffer for sending data associated with IPC command.
59 */
60#define IPC_DATA_BUFFER_SIZE 16
61
62#define IPC_LOOP_CNT 3000000
63#define IPC_MAX_SEC 3
64
65#define IPC_TRIGGER_MODE_IRQ true
66
67/* exported resources from IFWI */
68#define PLAT_RESOURCE_IPC_INDEX 0
69#define PLAT_RESOURCE_IPC_SIZE 0x1000
70#define PLAT_RESOURCE_GCR_SIZE 0x1000
71#define PLAT_RESOURCE_PUNIT_DATA_INDEX 1
72#define PLAT_RESOURCE_PUNIT_INTER_INDEX 2
73#define PLAT_RESOURCE_ACPI_IO_INDEX 0
74
75/*
76 * BIOS does not create an ACPI device for each PMC function,
77 * but exports multiple resources from one ACPI device(IPC) for
78 * multiple functions. This driver is responsible to create a
79 * platform device and to export resources for those functions.
80 */
81#define TCO_DEVICE_NAME "iTCO_wdt"
82#define SMI_EN_OFFSET 0x30
83#define SMI_EN_SIZE 4
84#define TCO_BASE_OFFSET 0x60
85#define TCO_REGS_SIZE 16
86#define PUNIT_DEVICE_NAME "intel_punit_ipc"
87
88static const int iTCO_version = 3;
89
90static struct intel_pmc_ipc_dev {
91 struct device *dev;
92 void __iomem *ipc_base;
93 bool irq_mode;
94 int irq;
95 int cmd;
96 struct completion cmd_complete;
97
98 /* The following PMC BARs share the same ACPI device with the IPC */
b78fb51b 99 resource_size_t acpi_io_base;
0a8b8353 100 int acpi_io_size;
101 struct platform_device *tco_dev;
102
103 /* gcr */
b78fb51b 104 resource_size_t gcr_base;
0a8b8353 105 int gcr_size;
106
107 /* punit */
b78fb51b 108 resource_size_t punit_base;
0a8b8353 109 int punit_size;
b78fb51b 110 resource_size_t punit_base2;
0a8b8353 111 int punit_size2;
112 struct platform_device *punit_dev;
113} ipcdev;
114
115static char *ipc_err_sources[] = {
116 [IPC_ERR_NONE] =
117 "no error",
118 [IPC_ERR_CMD_NOT_SUPPORTED] =
119 "command not supported",
120 [IPC_ERR_CMD_NOT_SERVICED] =
121 "command not serviced",
122 [IPC_ERR_UNABLE_TO_SERVICE] =
123 "unable to service",
124 [IPC_ERR_CMD_INVALID] =
125 "command invalid",
126 [IPC_ERR_CMD_FAILED] =
127 "command failed",
128 [IPC_ERR_EMSECURITY] =
129 "Invalid Battery",
130 [IPC_ERR_UNSIGNEDKERNEL] =
131 "Unsigned kernel",
132};
133
134/* Prevent concurrent calls to the PMC */
135static DEFINE_MUTEX(ipclock);
136
137static inline void ipc_send_command(u32 cmd)
138{
139 ipcdev.cmd = cmd;
140 if (ipcdev.irq_mode) {
141 reinit_completion(&ipcdev.cmd_complete);
142 cmd |= IPC_CMD_MSI;
143 }
144 writel(cmd, ipcdev.ipc_base + IPC_CMD);
145}
146
147static inline u32 ipc_read_status(void)
148{
149 return readl(ipcdev.ipc_base + IPC_STATUS);
150}
151
152static inline void ipc_data_writel(u32 data, u32 offset)
153{
154 writel(data, ipcdev.ipc_base + IPC_WRITE_BUFFER + offset);
155}
156
157static inline u8 ipc_data_readb(u32 offset)
158{
159 return readb(ipcdev.ipc_base + IPC_READ_BUFFER + offset);
160}
161
162static inline u32 ipc_data_readl(u32 offset)
163{
164 return readl(ipcdev.ipc_base + IPC_READ_BUFFER + offset);
165}
166
167static int intel_pmc_ipc_check_status(void)
168{
169 int status;
170 int ret = 0;
171
172 if (ipcdev.irq_mode) {
173 if (0 == wait_for_completion_timeout(
174 &ipcdev.cmd_complete, IPC_MAX_SEC * HZ))
175 ret = -ETIMEDOUT;
176 } else {
177 int loop_count = IPC_LOOP_CNT;
178
179 while ((ipc_read_status() & IPC_STATUS_BUSY) && --loop_count)
180 udelay(1);
181 if (loop_count == 0)
182 ret = -ETIMEDOUT;
183 }
184
185 status = ipc_read_status();
186 if (ret == -ETIMEDOUT) {
187 dev_err(ipcdev.dev,
188 "IPC timed out, TS=0x%x, CMD=0x%x\n",
189 status, ipcdev.cmd);
190 return ret;
191 }
192
193 if (status & IPC_STATUS_ERR) {
194 int i;
195
196 ret = -EIO;
197 i = (status >> IPC_CMD_SIZE) & 0xFF;
198 if (i < ARRAY_SIZE(ipc_err_sources))
199 dev_err(ipcdev.dev,
200 "IPC failed: %s, STS=0x%x, CMD=0x%x\n",
201 ipc_err_sources[i], status, ipcdev.cmd);
202 else
203 dev_err(ipcdev.dev,
204 "IPC failed: unknown, STS=0x%x, CMD=0x%x\n",
205 status, ipcdev.cmd);
206 if ((i == IPC_ERR_UNSIGNEDKERNEL) || (i == IPC_ERR_EMSECURITY))
207 ret = -EACCES;
208 }
209
210 return ret;
211}
212
02941007 213/**
214 * intel_pmc_ipc_simple_command() - Simple IPC command
215 * @cmd: IPC command code.
216 * @sub: IPC command sub type.
217 *
218 * Send a simple IPC command to PMC when don't need to specify
219 * input/output data and source/dest pointers.
220 *
221 * Return: an IPC error code or 0 on success.
0a8b8353 222 */
223int intel_pmc_ipc_simple_command(int cmd, int sub)
224{
225 int ret;
226
227 mutex_lock(&ipclock);
228 if (ipcdev.dev == NULL) {
229 mutex_unlock(&ipclock);
230 return -ENODEV;
231 }
232 ipc_send_command(sub << IPC_CMD_SUBCMD | cmd);
233 ret = intel_pmc_ipc_check_status();
234 mutex_unlock(&ipclock);
235
236 return ret;
237}
238EXPORT_SYMBOL_GPL(intel_pmc_ipc_simple_command);
239
02941007 240/**
241 * intel_pmc_ipc_raw_cmd() - IPC command with data and pointers
242 * @cmd: IPC command code.
243 * @sub: IPC command sub type.
244 * @in: input data of this IPC command.
245 * @inlen: input data length in bytes.
246 * @out: output data of this IPC command.
247 * @outlen: output data length in dwords.
248 * @sptr: data writing to SPTR register.
249 * @dptr: data writing to DPTR register.
250 *
251 * Send an IPC command to PMC with input/output data and source/dest pointers.
252 *
253 * Return: an IPC error code or 0 on success.
0a8b8353 254 */
255int intel_pmc_ipc_raw_cmd(u32 cmd, u32 sub, u8 *in, u32 inlen, u32 *out,
256 u32 outlen, u32 dptr, u32 sptr)
257{
258 u32 wbuf[4] = { 0 };
259 int ret;
260 int i;
261
262 if (inlen > IPC_DATA_BUFFER_SIZE || outlen > IPC_DATA_BUFFER_SIZE / 4)
263 return -EINVAL;
264
265 mutex_lock(&ipclock);
266 if (ipcdev.dev == NULL) {
267 mutex_unlock(&ipclock);
268 return -ENODEV;
269 }
270 memcpy(wbuf, in, inlen);
271 writel(dptr, ipcdev.ipc_base + IPC_DPTR);
272 writel(sptr, ipcdev.ipc_base + IPC_SPTR);
273 /* The input data register is 32bit register and inlen is in Byte */
274 for (i = 0; i < ((inlen + 3) / 4); i++)
275 ipc_data_writel(wbuf[i], 4 * i);
276 ipc_send_command((inlen << IPC_CMD_SIZE) |
277 (sub << IPC_CMD_SUBCMD) | cmd);
278 ret = intel_pmc_ipc_check_status();
279 if (!ret) {
280 /* out is read from 32bit register and outlen is in 32bit */
281 for (i = 0; i < outlen; i++)
282 *out++ = ipc_data_readl(4 * i);
283 }
284 mutex_unlock(&ipclock);
285
286 return ret;
287}
288EXPORT_SYMBOL_GPL(intel_pmc_ipc_raw_cmd);
289
02941007 290/**
291 * intel_pmc_ipc_command() - IPC command with input/output data
292 * @cmd: IPC command code.
293 * @sub: IPC command sub type.
294 * @in: input data of this IPC command.
295 * @inlen: input data length in bytes.
296 * @out: output data of this IPC command.
297 * @outlen: output data length in dwords.
298 *
299 * Send an IPC command to PMC with input/output data.
300 *
301 * Return: an IPC error code or 0 on success.
0a8b8353 302 */
303int intel_pmc_ipc_command(u32 cmd, u32 sub, u8 *in, u32 inlen,
304 u32 *out, u32 outlen)
305{
306 return intel_pmc_ipc_raw_cmd(cmd, sub, in, inlen, out, outlen, 0, 0);
307}
308EXPORT_SYMBOL_GPL(intel_pmc_ipc_command);
309
310static irqreturn_t ioc(int irq, void *dev_id)
311{
312 int status;
313
314 if (ipcdev.irq_mode) {
315 status = ipc_read_status();
316 writel(status | IPC_STATUS_IRQ, ipcdev.ipc_base + IPC_STATUS);
317 }
318 complete(&ipcdev.cmd_complete);
319
320 return IRQ_HANDLED;
321}
322
323static int ipc_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
324{
325 resource_size_t pci_resource;
326 int ret;
327 int len;
328
329 ipcdev.dev = &pci_dev_get(pdev)->dev;
330 ipcdev.irq_mode = IPC_TRIGGER_MODE_IRQ;
331
332 ret = pci_enable_device(pdev);
333 if (ret)
334 return ret;
335
336 ret = pci_request_regions(pdev, "intel_pmc_ipc");
337 if (ret)
338 return ret;
339
340 pci_resource = pci_resource_start(pdev, 0);
341 len = pci_resource_len(pdev, 0);
342 if (!pci_resource || !len) {
343 dev_err(&pdev->dev, "Failed to get resource\n");
344 return -ENOMEM;
345 }
346
347 init_completion(&ipcdev.cmd_complete);
348
349 if (request_irq(pdev->irq, ioc, 0, "intel_pmc_ipc", &ipcdev)) {
350 dev_err(&pdev->dev, "Failed to request irq\n");
351 return -EBUSY;
352 }
353
354 ipcdev.ipc_base = ioremap_nocache(pci_resource, len);
355 if (!ipcdev.ipc_base) {
356 dev_err(&pdev->dev, "Failed to ioremap ipc base\n");
357 free_irq(pdev->irq, &ipcdev);
358 ret = -ENOMEM;
359 }
360
361 return ret;
362}
363
364static void ipc_pci_remove(struct pci_dev *pdev)
365{
366 free_irq(pdev->irq, &ipcdev);
367 pci_release_regions(pdev);
368 pci_dev_put(pdev);
369 iounmap(ipcdev.ipc_base);
370 ipcdev.dev = NULL;
371}
372
373static const struct pci_device_id ipc_pci_ids[] = {
374 {PCI_VDEVICE(INTEL, 0x0a94), 0},
375 {PCI_VDEVICE(INTEL, 0x1a94), 0},
376 { 0,}
377};
378MODULE_DEVICE_TABLE(pci, ipc_pci_ids);
379
380static struct pci_driver ipc_pci_driver = {
381 .name = "intel_pmc_ipc",
382 .id_table = ipc_pci_ids,
383 .probe = ipc_pci_probe,
384 .remove = ipc_pci_remove,
385};
386
387static ssize_t intel_pmc_ipc_simple_cmd_store(struct device *dev,
388 struct device_attribute *attr,
389 const char *buf, size_t count)
390{
391 int subcmd;
392 int cmd;
393 int ret;
394
395 ret = sscanf(buf, "%d %d", &cmd, &subcmd);
396 if (ret != 2) {
397 dev_err(dev, "Error args\n");
398 return -EINVAL;
399 }
400
401 ret = intel_pmc_ipc_simple_command(cmd, subcmd);
402 if (ret) {
403 dev_err(dev, "command %d error with %d\n", cmd, ret);
404 return ret;
405 }
406 return (ssize_t)count;
407}
408
409static ssize_t intel_pmc_ipc_northpeak_store(struct device *dev,
410 struct device_attribute *attr,
411 const char *buf, size_t count)
412{
413 unsigned long val;
414 int subcmd;
415 int ret;
416
417 if (kstrtoul(buf, 0, &val))
418 return -EINVAL;
419
420 if (val)
421 subcmd = 1;
422 else
423 subcmd = 0;
424 ret = intel_pmc_ipc_simple_command(PMC_IPC_NORTHPEAK_CTRL, subcmd);
425 if (ret) {
426 dev_err(dev, "command north %d error with %d\n", subcmd, ret);
427 return ret;
428 }
429 return (ssize_t)count;
430}
431
432static DEVICE_ATTR(simplecmd, S_IWUSR,
433 NULL, intel_pmc_ipc_simple_cmd_store);
434static DEVICE_ATTR(northpeak, S_IWUSR,
435 NULL, intel_pmc_ipc_northpeak_store);
436
437static struct attribute *intel_ipc_attrs[] = {
438 &dev_attr_northpeak.attr,
439 &dev_attr_simplecmd.attr,
440 NULL
441};
442
443static const struct attribute_group intel_ipc_group = {
444 .attrs = intel_ipc_attrs,
445};
446
447#define PUNIT_RESOURCE_INTER 1
448static struct resource punit_res[] = {
449 /* Punit */
450 {
451 .flags = IORESOURCE_MEM,
452 },
453 {
454 .flags = IORESOURCE_MEM,
455 },
456};
457
458#define TCO_RESOURCE_ACPI_IO 0
459#define TCO_RESOURCE_SMI_EN_IO 1
460#define TCO_RESOURCE_GCR_MEM 2
461static struct resource tco_res[] = {
462 /* ACPI - TCO */
463 {
464 .flags = IORESOURCE_IO,
465 },
466 /* ACPI - SMI */
467 {
468 .flags = IORESOURCE_IO,
469 },
470 /* GCS */
471 {
472 .flags = IORESOURCE_MEM,
473 },
474};
475
420b54de 476static struct itco_wdt_platform_data tco_info = {
0a8b8353 477 .name = "Apollo Lake SoC",
420b54de 478 .version = 3,
0a8b8353 479};
480
481static int ipc_create_punit_device(void)
482{
483 struct platform_device *pdev;
484 struct resource *res;
485 int ret;
486
487 pdev = platform_device_alloc(PUNIT_DEVICE_NAME, -1);
488 if (!pdev) {
489 dev_err(ipcdev.dev, "Failed to alloc punit platform device\n");
490 return -ENOMEM;
491 }
492
493 pdev->dev.parent = ipcdev.dev;
494
495 res = punit_res;
b78fb51b 496 res->start = ipcdev.punit_base;
0a8b8353 497 res->end = res->start + ipcdev.punit_size - 1;
498
499 res = punit_res + PUNIT_RESOURCE_INTER;
b78fb51b 500 res->start = ipcdev.punit_base2;
0a8b8353 501 res->end = res->start + ipcdev.punit_size2 - 1;
502
503 ret = platform_device_add_resources(pdev, punit_res,
504 ARRAY_SIZE(punit_res));
505 if (ret) {
506 dev_err(ipcdev.dev, "Failed to add platform punit resources\n");
507 goto err;
508 }
509
510 ret = platform_device_add(pdev);
511 if (ret) {
512 dev_err(ipcdev.dev, "Failed to add punit platform device\n");
513 goto err;
514 }
515 ipcdev.punit_dev = pdev;
516
517 return 0;
518err:
519 platform_device_put(pdev);
520 return ret;
521}
522
523static int ipc_create_tco_device(void)
524{
525 struct platform_device *pdev;
526 struct resource *res;
527 int ret;
528
529 pdev = platform_device_alloc(TCO_DEVICE_NAME, -1);
530 if (!pdev) {
531 dev_err(ipcdev.dev, "Failed to alloc tco platform device\n");
532 return -ENOMEM;
533 }
534
535 pdev->dev.parent = ipcdev.dev;
536
537 res = tco_res + TCO_RESOURCE_ACPI_IO;
b78fb51b 538 res->start = ipcdev.acpi_io_base + TCO_BASE_OFFSET;
0a8b8353 539 res->end = res->start + TCO_REGS_SIZE - 1;
540
541 res = tco_res + TCO_RESOURCE_SMI_EN_IO;
b78fb51b 542 res->start = ipcdev.acpi_io_base + SMI_EN_OFFSET;
0a8b8353 543 res->end = res->start + SMI_EN_SIZE - 1;
544
545 res = tco_res + TCO_RESOURCE_GCR_MEM;
b78fb51b 546 res->start = ipcdev.gcr_base;
0a8b8353 547 res->end = res->start + ipcdev.gcr_size - 1;
548
549 ret = platform_device_add_resources(pdev, tco_res, ARRAY_SIZE(tco_res));
550 if (ret) {
551 dev_err(ipcdev.dev, "Failed to add tco platform resources\n");
552 goto err;
553 }
554
420b54de 555 ret = platform_device_add_data(pdev, &tco_info, sizeof(tco_info));
0a8b8353 556 if (ret) {
557 dev_err(ipcdev.dev, "Failed to add tco platform data\n");
558 goto err;
559 }
560
561 ret = platform_device_add(pdev);
562 if (ret) {
563 dev_err(ipcdev.dev, "Failed to add tco platform device\n");
564 goto err;
565 }
566 ipcdev.tco_dev = pdev;
567
568 return 0;
569err:
570 platform_device_put(pdev);
571 return ret;
572}
573
574static int ipc_create_pmc_devices(void)
575{
576 int ret;
577
578 ret = ipc_create_tco_device();
579 if (ret) {
580 dev_err(ipcdev.dev, "Failed to add tco platform device\n");
581 return ret;
582 }
583 ret = ipc_create_punit_device();
584 if (ret) {
585 dev_err(ipcdev.dev, "Failed to add punit platform device\n");
586 platform_device_unregister(ipcdev.tco_dev);
587 }
588 return ret;
589}
590
591static int ipc_plat_get_res(struct platform_device *pdev)
592{
593 struct resource *res;
594 void __iomem *addr;
595 int size;
596
597 res = platform_get_resource(pdev, IORESOURCE_IO,
598 PLAT_RESOURCE_ACPI_IO_INDEX);
599 if (!res) {
600 dev_err(&pdev->dev, "Failed to get io resource\n");
601 return -ENXIO;
602 }
603 size = resource_size(res);
b78fb51b 604 ipcdev.acpi_io_base = res->start;
0a8b8353 605 ipcdev.acpi_io_size = size;
606 dev_info(&pdev->dev, "io res: %llx %x\n",
607 (long long)res->start, (int)resource_size(res));
608
609 res = platform_get_resource(pdev, IORESOURCE_MEM,
610 PLAT_RESOURCE_PUNIT_DATA_INDEX);
611 if (!res) {
612 dev_err(&pdev->dev, "Failed to get punit resource\n");
613 return -ENXIO;
614 }
615 size = resource_size(res);
b78fb51b 616 ipcdev.punit_base = res->start;
0a8b8353 617 ipcdev.punit_size = size;
618 dev_info(&pdev->dev, "punit data res: %llx %x\n",
619 (long long)res->start, (int)resource_size(res));
620
621 res = platform_get_resource(pdev, IORESOURCE_MEM,
622 PLAT_RESOURCE_PUNIT_INTER_INDEX);
623 if (!res) {
624 dev_err(&pdev->dev, "Failed to get punit inter resource\n");
625 return -ENXIO;
626 }
627 size = resource_size(res);
b78fb51b 628 ipcdev.punit_base2 = res->start;
0a8b8353 629 ipcdev.punit_size2 = size;
630 dev_info(&pdev->dev, "punit interface res: %llx %x\n",
631 (long long)res->start, (int)resource_size(res));
632
633 res = platform_get_resource(pdev, IORESOURCE_MEM,
634 PLAT_RESOURCE_IPC_INDEX);
635 if (!res) {
636 dev_err(&pdev->dev, "Failed to get ipc resource\n");
637 return -ENXIO;
638 }
639 size = PLAT_RESOURCE_IPC_SIZE;
640 if (!request_mem_region(res->start, size, pdev->name)) {
641 dev_err(&pdev->dev, "Failed to request ipc resource\n");
642 return -EBUSY;
643 }
644 addr = ioremap_nocache(res->start, size);
645 if (!addr) {
646 dev_err(&pdev->dev, "I/O memory remapping failed\n");
647 release_mem_region(res->start, size);
648 return -ENOMEM;
649 }
650 ipcdev.ipc_base = addr;
651
b78fb51b 652 ipcdev.gcr_base = res->start + size;
0a8b8353 653 ipcdev.gcr_size = PLAT_RESOURCE_GCR_SIZE;
654 dev_info(&pdev->dev, "ipc res: %llx %x\n",
655 (long long)res->start, (int)resource_size(res));
656
657 return 0;
658}
659
660#ifdef CONFIG_ACPI
661static const struct acpi_device_id ipc_acpi_ids[] = {
662 { "INT34D2", 0},
663 { }
664};
665MODULE_DEVICE_TABLE(acpi, ipc_acpi_ids);
666#endif
667
668static int ipc_plat_probe(struct platform_device *pdev)
669{
670 struct resource *res;
671 int ret;
672
673 ipcdev.dev = &pdev->dev;
674 ipcdev.irq_mode = IPC_TRIGGER_MODE_IRQ;
675 init_completion(&ipcdev.cmd_complete);
676
677 ipcdev.irq = platform_get_irq(pdev, 0);
678 if (ipcdev.irq < 0) {
679 dev_err(&pdev->dev, "Failed to get irq\n");
680 return -EINVAL;
681 }
682
683 ret = ipc_plat_get_res(pdev);
684 if (ret) {
685 dev_err(&pdev->dev, "Failed to request resource\n");
686 return ret;
687 }
688
689 ret = ipc_create_pmc_devices();
690 if (ret) {
691 dev_err(&pdev->dev, "Failed to create pmc devices\n");
692 goto err_device;
693 }
694
695 if (request_irq(ipcdev.irq, ioc, 0, "intel_pmc_ipc", &ipcdev)) {
696 dev_err(&pdev->dev, "Failed to request irq\n");
697 ret = -EBUSY;
698 goto err_irq;
699 }
700
701 ret = sysfs_create_group(&pdev->dev.kobj, &intel_ipc_group);
702 if (ret) {
703 dev_err(&pdev->dev, "Failed to create sysfs group %d\n",
704 ret);
705 goto err_sys;
706 }
707
708 return 0;
709err_sys:
710 free_irq(ipcdev.irq, &ipcdev);
711err_irq:
712 platform_device_unregister(ipcdev.tco_dev);
713 platform_device_unregister(ipcdev.punit_dev);
714err_device:
715 iounmap(ipcdev.ipc_base);
716 res = platform_get_resource(pdev, IORESOURCE_MEM,
717 PLAT_RESOURCE_IPC_INDEX);
718 if (res)
719 release_mem_region(res->start, PLAT_RESOURCE_IPC_SIZE);
720 return ret;
721}
722
723static int ipc_plat_remove(struct platform_device *pdev)
724{
725 struct resource *res;
726
727 sysfs_remove_group(&pdev->dev.kobj, &intel_ipc_group);
728 free_irq(ipcdev.irq, &ipcdev);
729 platform_device_unregister(ipcdev.tco_dev);
730 platform_device_unregister(ipcdev.punit_dev);
731 iounmap(ipcdev.ipc_base);
732 res = platform_get_resource(pdev, IORESOURCE_MEM,
733 PLAT_RESOURCE_IPC_INDEX);
734 if (res)
735 release_mem_region(res->start, PLAT_RESOURCE_IPC_SIZE);
736 ipcdev.dev = NULL;
737 return 0;
738}
739
740static struct platform_driver ipc_plat_driver = {
741 .remove = ipc_plat_remove,
742 .probe = ipc_plat_probe,
743 .driver = {
744 .name = "pmc-ipc-plat",
745 .acpi_match_table = ACPI_PTR(ipc_acpi_ids),
746 },
747};
748
749static int __init intel_pmc_ipc_init(void)
750{
751 int ret;
752
753 ret = platform_driver_register(&ipc_plat_driver);
754 if (ret) {
755 pr_err("Failed to register PMC ipc platform driver\n");
756 return ret;
757 }
758 ret = pci_register_driver(&ipc_pci_driver);
759 if (ret) {
760 pr_err("Failed to register PMC ipc pci driver\n");
761 platform_driver_unregister(&ipc_plat_driver);
762 return ret;
763 }
764 return ret;
765}
766
767static void __exit intel_pmc_ipc_exit(void)
768{
769 pci_unregister_driver(&ipc_pci_driver);
770 platform_driver_unregister(&ipc_plat_driver);
771}
772
773MODULE_AUTHOR("Zha Qipeng <qipeng.zha@intel.com>");
774MODULE_DESCRIPTION("Intel PMC IPC driver");
775MODULE_LICENSE("GPL");
776
777/* Some modules are dependent on this, so init earlier */
778fs_initcall(intel_pmc_ipc_init);
779module_exit(intel_pmc_ipc_exit);