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b4f8e52b BA |
1 | /* |
2 | * Copyright (c) 2016-2017, Linaro Ltd | |
3 | * | |
4 | * This program is free software; you can redistribute it and/or modify | |
5 | * it under the terms of the GNU General Public License version 2 and | |
6 | * only version 2 as published by the Free Software Foundation. | |
7 | * | |
8 | * This program is distributed in the hope that it will be useful, | |
9 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
10 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
11 | * GNU General Public License for more details. | |
12 | */ | |
13 | ||
14 | #include <linux/idr.h> | |
15 | #include <linux/interrupt.h> | |
16 | #include <linux/io.h> | |
17 | #include <linux/list.h> | |
18 | #include <linux/mfd/syscon.h> | |
19 | #include <linux/module.h> | |
20 | #include <linux/of.h> | |
21 | #include <linux/of_address.h> | |
22 | #include <linux/platform_device.h> | |
23 | #include <linux/regmap.h> | |
24 | #include <linux/rpmsg.h> | |
25 | #include <linux/slab.h> | |
26 | #include <linux/workqueue.h> | |
27 | #include <linux/mailbox_client.h> | |
28 | ||
29 | #include "rpmsg_internal.h" | |
835764dd | 30 | #include "qcom_glink_native.h" |
b4f8e52b BA |
31 | |
32 | #define RPM_TOC_SIZE 256 | |
33 | #define RPM_TOC_MAGIC 0x67727430 /* grt0 */ | |
34 | #define RPM_TOC_MAX_ENTRIES ((RPM_TOC_SIZE - sizeof(struct rpm_toc)) / \ | |
35 | sizeof(struct rpm_toc_entry)) | |
36 | ||
37 | #define RPM_TX_FIFO_ID 0x61703272 /* ap2r */ | |
38 | #define RPM_RX_FIFO_ID 0x72326170 /* r2ap */ | |
39 | ||
835764dd | 40 | #define to_rpm_pipe(p) container_of(p, struct glink_rpm_pipe, native) |
e45c5dc2 | 41 | |
b4f8e52b BA |
42 | struct rpm_toc_entry { |
43 | __le32 id; | |
44 | __le32 offset; | |
45 | __le32 size; | |
46 | } __packed; | |
47 | ||
48 | struct rpm_toc { | |
49 | __le32 magic; | |
50 | __le32 count; | |
51 | ||
52 | struct rpm_toc_entry entries[]; | |
53 | } __packed; | |
54 | ||
b4f8e52b | 55 | struct glink_rpm_pipe { |
e45c5dc2 BA |
56 | struct qcom_glink_pipe native; |
57 | ||
b4f8e52b BA |
58 | void __iomem *tail; |
59 | void __iomem *head; | |
60 | ||
61 | void __iomem *fifo; | |
b4f8e52b BA |
62 | }; |
63 | ||
e45c5dc2 | 64 | static size_t glink_rpm_rx_avail(struct qcom_glink_pipe *glink_pipe) |
b4f8e52b | 65 | { |
e45c5dc2 | 66 | struct glink_rpm_pipe *pipe = to_rpm_pipe(glink_pipe); |
b4f8e52b BA |
67 | unsigned int head; |
68 | unsigned int tail; | |
69 | ||
70 | head = readl(pipe->head); | |
71 | tail = readl(pipe->tail); | |
72 | ||
73 | if (head < tail) | |
e45c5dc2 | 74 | return pipe->native.length - tail + head; |
b4f8e52b BA |
75 | else |
76 | return head - tail; | |
77 | } | |
78 | ||
e45c5dc2 | 79 | static void glink_rpm_rx_peak(struct qcom_glink_pipe *glink_pipe, |
b88eee97 | 80 | void *data, unsigned int offset, size_t count) |
b4f8e52b | 81 | { |
e45c5dc2 | 82 | struct glink_rpm_pipe *pipe = to_rpm_pipe(glink_pipe); |
b4f8e52b BA |
83 | unsigned int tail; |
84 | size_t len; | |
85 | ||
86 | tail = readl(pipe->tail); | |
b88eee97 BA |
87 | tail += offset; |
88 | if (tail >= pipe->native.length) | |
89 | tail -= pipe->native.length; | |
b4f8e52b | 90 | |
e45c5dc2 | 91 | len = min_t(size_t, count, pipe->native.length - tail); |
b4f8e52b BA |
92 | if (len) { |
93 | __ioread32_copy(data, pipe->fifo + tail, | |
94 | len / sizeof(u32)); | |
95 | } | |
96 | ||
97 | if (len != count) { | |
98 | __ioread32_copy(data + len, pipe->fifo, | |
99 | (count - len) / sizeof(u32)); | |
100 | } | |
101 | } | |
102 | ||
e45c5dc2 BA |
103 | static void glink_rpm_rx_advance(struct qcom_glink_pipe *glink_pipe, |
104 | size_t count) | |
105 | { | |
106 | struct glink_rpm_pipe *pipe = to_rpm_pipe(glink_pipe); | |
b4f8e52b BA |
107 | unsigned int tail; |
108 | ||
109 | tail = readl(pipe->tail); | |
110 | ||
111 | tail += count; | |
e45c5dc2 BA |
112 | if (tail >= pipe->native.length) |
113 | tail -= pipe->native.length; | |
b4f8e52b BA |
114 | |
115 | writel(tail, pipe->tail); | |
116 | } | |
117 | ||
e45c5dc2 | 118 | static size_t glink_rpm_tx_avail(struct qcom_glink_pipe *glink_pipe) |
b4f8e52b | 119 | { |
e45c5dc2 | 120 | struct glink_rpm_pipe *pipe = to_rpm_pipe(glink_pipe); |
b4f8e52b BA |
121 | unsigned int head; |
122 | unsigned int tail; | |
123 | ||
124 | head = readl(pipe->head); | |
125 | tail = readl(pipe->tail); | |
126 | ||
127 | if (tail <= head) | |
e45c5dc2 | 128 | return pipe->native.length - head + tail; |
b4f8e52b BA |
129 | else |
130 | return tail - head; | |
131 | } | |
132 | ||
e45c5dc2 BA |
133 | static unsigned int glink_rpm_tx_write_one(struct glink_rpm_pipe *pipe, |
134 | unsigned int head, | |
135 | const void *data, size_t count) | |
b4f8e52b | 136 | { |
b4f8e52b BA |
137 | size_t len; |
138 | ||
e45c5dc2 | 139 | len = min_t(size_t, count, pipe->native.length - head); |
b4f8e52b BA |
140 | if (len) { |
141 | __iowrite32_copy(pipe->fifo + head, data, | |
142 | len / sizeof(u32)); | |
143 | } | |
144 | ||
145 | if (len != count) { | |
146 | __iowrite32_copy(pipe->fifo, data + len, | |
147 | (count - len) / sizeof(u32)); | |
148 | } | |
149 | ||
150 | head += count; | |
e45c5dc2 BA |
151 | if (head >= pipe->native.length) |
152 | head -= pipe->native.length; | |
b4f8e52b BA |
153 | |
154 | return head; | |
155 | } | |
156 | ||
e45c5dc2 BA |
157 | static void glink_rpm_tx_write(struct qcom_glink_pipe *glink_pipe, |
158 | const void *hdr, size_t hlen, | |
159 | const void *data, size_t dlen) | |
160 | { | |
161 | struct glink_rpm_pipe *pipe = to_rpm_pipe(glink_pipe); | |
7339859d BA |
162 | size_t tlen = hlen + dlen; |
163 | size_t aligned_dlen; | |
e45c5dc2 | 164 | unsigned int head; |
7339859d BA |
165 | char padding[8] = {0}; |
166 | size_t pad; | |
167 | ||
168 | /* Header length comes from glink native and is always 4 byte aligned */ | |
169 | if (WARN(hlen % 4, "Glink Header length must be 4 bytes aligned\n")) | |
170 | return; | |
171 | ||
172 | /* | |
173 | * Move the unaligned tail of the message to the padding chunk, to | |
174 | * ensure word aligned accesses | |
175 | */ | |
176 | aligned_dlen = ALIGN_DOWN(dlen, 4); | |
177 | if (aligned_dlen != dlen) | |
178 | memcpy(padding, data + aligned_dlen, dlen - aligned_dlen); | |
e45c5dc2 BA |
179 | |
180 | head = readl(pipe->head); | |
181 | head = glink_rpm_tx_write_one(pipe, head, hdr, hlen); | |
7339859d BA |
182 | head = glink_rpm_tx_write_one(pipe, head, data, aligned_dlen); |
183 | ||
184 | pad = ALIGN(tlen, 8) - ALIGN_DOWN(tlen, 4); | |
185 | if (pad) | |
186 | head = glink_rpm_tx_write_one(pipe, head, padding, pad); | |
e45c5dc2 BA |
187 | writel(head, pipe->head); |
188 | } | |
189 | ||
b4f8e52b BA |
190 | static int glink_rpm_parse_toc(struct device *dev, |
191 | void __iomem *msg_ram, | |
192 | size_t msg_ram_size, | |
193 | struct glink_rpm_pipe *rx, | |
194 | struct glink_rpm_pipe *tx) | |
195 | { | |
196 | struct rpm_toc *toc; | |
197 | int num_entries; | |
198 | unsigned int id; | |
199 | size_t offset; | |
200 | size_t size; | |
201 | void *buf; | |
202 | int i; | |
203 | ||
204 | buf = kzalloc(RPM_TOC_SIZE, GFP_KERNEL); | |
205 | if (!buf) | |
206 | return -ENOMEM; | |
207 | ||
208 | __ioread32_copy(buf, msg_ram + msg_ram_size - RPM_TOC_SIZE, | |
209 | RPM_TOC_SIZE / sizeof(u32)); | |
210 | ||
211 | toc = buf; | |
212 | ||
213 | if (le32_to_cpu(toc->magic) != RPM_TOC_MAGIC) { | |
214 | dev_err(dev, "RPM TOC has invalid magic\n"); | |
215 | goto err_inval; | |
216 | } | |
217 | ||
218 | num_entries = le32_to_cpu(toc->count); | |
219 | if (num_entries > RPM_TOC_MAX_ENTRIES) { | |
220 | dev_err(dev, "Invalid number of toc entries\n"); | |
221 | goto err_inval; | |
222 | } | |
223 | ||
224 | for (i = 0; i < num_entries; i++) { | |
225 | id = le32_to_cpu(toc->entries[i].id); | |
226 | offset = le32_to_cpu(toc->entries[i].offset); | |
227 | size = le32_to_cpu(toc->entries[i].size); | |
228 | ||
229 | if (offset > msg_ram_size || offset + size > msg_ram_size) { | |
230 | dev_err(dev, "TOC entry with invalid size\n"); | |
231 | continue; | |
232 | } | |
233 | ||
234 | switch (id) { | |
235 | case RPM_RX_FIFO_ID: | |
e45c5dc2 | 236 | rx->native.length = size; |
b4f8e52b BA |
237 | |
238 | rx->tail = msg_ram + offset; | |
239 | rx->head = msg_ram + offset + sizeof(u32); | |
240 | rx->fifo = msg_ram + offset + 2 * sizeof(u32); | |
241 | break; | |
242 | case RPM_TX_FIFO_ID: | |
e45c5dc2 | 243 | tx->native.length = size; |
b4f8e52b BA |
244 | |
245 | tx->tail = msg_ram + offset; | |
246 | tx->head = msg_ram + offset + sizeof(u32); | |
247 | tx->fifo = msg_ram + offset + 2 * sizeof(u32); | |
248 | break; | |
249 | } | |
250 | } | |
251 | ||
252 | if (!rx->fifo || !tx->fifo) { | |
253 | dev_err(dev, "Unable to find rx and tx descriptors\n"); | |
254 | goto err_inval; | |
255 | } | |
256 | ||
257 | kfree(buf); | |
258 | return 0; | |
259 | ||
260 | err_inval: | |
261 | kfree(buf); | |
262 | return -EINVAL; | |
263 | } | |
264 | ||
6799c434 BA |
265 | static int glink_rpm_probe(struct platform_device *pdev) |
266 | { | |
267 | struct qcom_glink *glink; | |
268 | struct glink_rpm_pipe *rx_pipe; | |
269 | struct glink_rpm_pipe *tx_pipe; | |
270 | struct device_node *np; | |
271 | void __iomem *msg_ram; | |
272 | size_t msg_ram_size; | |
273 | struct device *dev = &pdev->dev; | |
274 | struct resource r; | |
275 | int ret; | |
276 | ||
277 | rx_pipe = devm_kzalloc(&pdev->dev, sizeof(*rx_pipe), GFP_KERNEL); | |
278 | tx_pipe = devm_kzalloc(&pdev->dev, sizeof(*tx_pipe), GFP_KERNEL); | |
279 | if (!rx_pipe || !tx_pipe) | |
280 | return -ENOMEM; | |
281 | ||
b4f8e52b BA |
282 | np = of_parse_phandle(dev->of_node, "qcom,rpm-msg-ram", 0); |
283 | ret = of_address_to_resource(np, 0, &r); | |
284 | of_node_put(np); | |
285 | if (ret) | |
286 | return ret; | |
287 | ||
288 | msg_ram = devm_ioremap(dev, r.start, resource_size(&r)); | |
289 | msg_ram_size = resource_size(&r); | |
290 | if (!msg_ram) | |
291 | return -ENOMEM; | |
292 | ||
293 | ret = glink_rpm_parse_toc(dev, msg_ram, msg_ram_size, | |
e45c5dc2 | 294 | rx_pipe, tx_pipe); |
b4f8e52b BA |
295 | if (ret) |
296 | return ret; | |
297 | ||
e45c5dc2 BA |
298 | /* Pipe specific accessors */ |
299 | rx_pipe->native.avail = glink_rpm_rx_avail; | |
300 | rx_pipe->native.peak = glink_rpm_rx_peak; | |
301 | rx_pipe->native.advance = glink_rpm_rx_advance; | |
302 | tx_pipe->native.avail = glink_rpm_tx_avail; | |
303 | tx_pipe->native.write = glink_rpm_tx_write; | |
304 | ||
e45c5dc2 BA |
305 | writel(0, tx_pipe->head); |
306 | writel(0, rx_pipe->tail); | |
b4f8e52b | 307 | |
d31ad615 S |
308 | glink = qcom_glink_native_probe(&pdev->dev, |
309 | 0, | |
310 | &rx_pipe->native, | |
933b45da S |
311 | &tx_pipe->native, |
312 | true); | |
6799c434 BA |
313 | if (IS_ERR(glink)) |
314 | return PTR_ERR(glink); | |
b4f8e52b BA |
315 | |
316 | platform_set_drvdata(pdev, glink); | |
317 | ||
318 | return 0; | |
319 | } | |
320 | ||
b4f8e52b BA |
321 | static int glink_rpm_remove(struct platform_device *pdev) |
322 | { | |
d7101feb | 323 | struct qcom_glink *glink = platform_get_drvdata(pdev); |
b4f8e52b | 324 | |
835764dd | 325 | qcom_glink_native_remove(glink); |
b4f8e52b BA |
326 | |
327 | return 0; | |
328 | } | |
329 | ||
330 | static const struct of_device_id glink_rpm_of_match[] = { | |
331 | { .compatible = "qcom,glink-rpm" }, | |
332 | {} | |
333 | }; | |
334 | MODULE_DEVICE_TABLE(of, glink_rpm_of_match); | |
335 | ||
336 | static struct platform_driver glink_rpm_driver = { | |
337 | .probe = glink_rpm_probe, | |
338 | .remove = glink_rpm_remove, | |
339 | .driver = { | |
340 | .name = "qcom_glink_rpm", | |
341 | .of_match_table = glink_rpm_of_match, | |
342 | }, | |
343 | }; | |
344 | ||
345 | static int __init glink_rpm_init(void) | |
346 | { | |
347 | return platform_driver_register(&glink_rpm_driver); | |
348 | } | |
349 | subsys_initcall(glink_rpm_init); | |
350 | ||
351 | static void __exit glink_rpm_exit(void) | |
352 | { | |
353 | platform_driver_unregister(&glink_rpm_driver); | |
354 | } | |
355 | module_exit(glink_rpm_exit); | |
356 | ||
357 | MODULE_AUTHOR("Bjorn Andersson <bjorn.andersson@linaro.org>"); | |
358 | MODULE_DESCRIPTION("Qualcomm GLINK RPM driver"); | |
359 | MODULE_LICENSE("GPL v2"); |