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Commit | Line | Data |
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7be2c7c9 DB |
1 | /* |
2 | * RTC class driver for "CMOS RTC": PCs, ACPI, etc | |
3 | * | |
4 | * Copyright (C) 1996 Paul Gortmaker (drivers/char/rtc.c) | |
5 | * Copyright (C) 2006 David Brownell (convert to new framework) | |
6 | * | |
7 | * This program is free software; you can redistribute it and/or | |
8 | * modify it under the terms of the GNU General Public License | |
9 | * as published by the Free Software Foundation; either version | |
10 | * 2 of the License, or (at your option) any later version. | |
11 | */ | |
12 | ||
13 | /* | |
14 | * The original "cmos clock" chip was an MC146818 chip, now obsolete. | |
15 | * That defined the register interface now provided by all PCs, some | |
16 | * non-PC systems, and incorporated into ACPI. Modern PC chipsets | |
17 | * integrate an MC146818 clone in their southbridge, and boards use | |
18 | * that instead of discrete clones like the DS12887 or M48T86. There | |
19 | * are also clones that connect using the LPC bus. | |
20 | * | |
21 | * That register API is also used directly by various other drivers | |
22 | * (notably for integrated NVRAM), infrastructure (x86 has code to | |
23 | * bypass the RTC framework, directly reading the RTC during boot | |
24 | * and updating minutes/seconds for systems using NTP synch) and | |
25 | * utilities (like userspace 'hwclock', if no /dev node exists). | |
26 | * | |
27 | * So **ALL** calls to CMOS_READ and CMOS_WRITE must be done with | |
28 | * interrupts disabled, holding the global rtc_lock, to exclude those | |
29 | * other drivers and utilities on correctly configured systems. | |
30 | */ | |
a737e835 JP |
31 | |
32 | #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt | |
33 | ||
7be2c7c9 DB |
34 | #include <linux/kernel.h> |
35 | #include <linux/module.h> | |
36 | #include <linux/init.h> | |
37 | #include <linux/interrupt.h> | |
38 | #include <linux/spinlock.h> | |
39 | #include <linux/platform_device.h> | |
5d2a5037 | 40 | #include <linux/log2.h> |
2fb08e6c | 41 | #include <linux/pm.h> |
3bcbaf6e SAS |
42 | #include <linux/of.h> |
43 | #include <linux/of_platform.h> | |
7be2c7c9 DB |
44 | |
45 | /* this is for "generic access to PC-style RTC" using CMOS_READ/CMOS_WRITE */ | |
5ab788d7 | 46 | #include <linux/mc146818rtc.h> |
7be2c7c9 | 47 | |
7be2c7c9 DB |
48 | struct cmos_rtc { |
49 | struct rtc_device *rtc; | |
50 | struct device *dev; | |
51 | int irq; | |
52 | struct resource *iomem; | |
88b8d33b | 53 | time64_t alarm_expires; |
7be2c7c9 | 54 | |
87ac84f4 DB |
55 | void (*wake_on)(struct device *); |
56 | void (*wake_off)(struct device *); | |
57 | ||
58 | u8 enabled_wake; | |
7be2c7c9 DB |
59 | u8 suspend_ctrl; |
60 | ||
61 | /* newer hardware extends the original register set */ | |
62 | u8 day_alrm; | |
63 | u8 mon_alrm; | |
64 | u8 century; | |
68669d55 GM |
65 | |
66 | struct rtc_wkalrm saved_wkalrm; | |
7be2c7c9 DB |
67 | }; |
68 | ||
69 | /* both platform and pnp busses use negative numbers for invalid irqs */ | |
2fac6674 | 70 | #define is_valid_irq(n) ((n) > 0) |
7be2c7c9 DB |
71 | |
72 | static const char driver_name[] = "rtc_cmos"; | |
73 | ||
bcd9b89c DB |
74 | /* The RTC_INTR register may have e.g. RTC_PF set even if RTC_PIE is clear; |
75 | * always mask it against the irq enable bits in RTC_CONTROL. Bit values | |
76 | * are the same: PF==PIE, AF=AIE, UF=UIE; so RTC_IRQMASK works with both. | |
77 | */ | |
78 | #define RTC_IRQMASK (RTC_PF | RTC_AF | RTC_UF) | |
79 | ||
80 | static inline int is_intr(u8 rtc_intr) | |
81 | { | |
82 | if (!(rtc_intr & RTC_IRQF)) | |
83 | return 0; | |
84 | return rtc_intr & RTC_IRQMASK; | |
85 | } | |
86 | ||
7be2c7c9 DB |
87 | /*----------------------------------------------------------------*/ |
88 | ||
35d3fdd5 DB |
89 | /* Much modern x86 hardware has HPETs (10+ MHz timers) which, because |
90 | * many BIOS programmers don't set up "sane mode" IRQ routing, are mostly | |
91 | * used in a broken "legacy replacement" mode. The breakage includes | |
92 | * HPET #1 hijacking the IRQ for this RTC, and being unavailable for | |
93 | * other (better) use. | |
94 | * | |
95 | * When that broken mode is in use, platform glue provides a partial | |
96 | * emulation of hardware RTC IRQ facilities using HPET #1. We don't | |
97 | * want to use HPET for anything except those IRQs though... | |
98 | */ | |
99 | #ifdef CONFIG_HPET_EMULATE_RTC | |
100 | #include <asm/hpet.h> | |
101 | #else | |
102 | ||
103 | static inline int is_hpet_enabled(void) | |
104 | { | |
105 | return 0; | |
106 | } | |
107 | ||
108 | static inline int hpet_mask_rtc_irq_bit(unsigned long mask) | |
109 | { | |
110 | return 0; | |
111 | } | |
112 | ||
113 | static inline int hpet_set_rtc_irq_bit(unsigned long mask) | |
114 | { | |
115 | return 0; | |
116 | } | |
117 | ||
118 | static inline int | |
119 | hpet_set_alarm_time(unsigned char hrs, unsigned char min, unsigned char sec) | |
120 | { | |
121 | return 0; | |
122 | } | |
123 | ||
124 | static inline int hpet_set_periodic_freq(unsigned long freq) | |
125 | { | |
126 | return 0; | |
127 | } | |
128 | ||
129 | static inline int hpet_rtc_dropped_irq(void) | |
130 | { | |
131 | return 0; | |
132 | } | |
133 | ||
134 | static inline int hpet_rtc_timer_init(void) | |
135 | { | |
136 | return 0; | |
137 | } | |
138 | ||
139 | extern irq_handler_t hpet_rtc_interrupt; | |
140 | ||
141 | static inline int hpet_register_irq_handler(irq_handler_t handler) | |
142 | { | |
143 | return 0; | |
144 | } | |
145 | ||
146 | static inline int hpet_unregister_irq_handler(irq_handler_t handler) | |
147 | { | |
148 | return 0; | |
149 | } | |
150 | ||
151 | #endif | |
152 | ||
153 | /*----------------------------------------------------------------*/ | |
154 | ||
c8fc40cd DB |
155 | #ifdef RTC_PORT |
156 | ||
157 | /* Most newer x86 systems have two register banks, the first used | |
158 | * for RTC and NVRAM and the second only for NVRAM. Caller must | |
159 | * own rtc_lock ... and we won't worry about access during NMI. | |
160 | */ | |
161 | #define can_bank2 true | |
162 | ||
163 | static inline unsigned char cmos_read_bank2(unsigned char addr) | |
164 | { | |
165 | outb(addr, RTC_PORT(2)); | |
166 | return inb(RTC_PORT(3)); | |
167 | } | |
168 | ||
169 | static inline void cmos_write_bank2(unsigned char val, unsigned char addr) | |
170 | { | |
171 | outb(addr, RTC_PORT(2)); | |
b43c1ea4 | 172 | outb(val, RTC_PORT(3)); |
c8fc40cd DB |
173 | } |
174 | ||
175 | #else | |
176 | ||
177 | #define can_bank2 false | |
178 | ||
179 | static inline unsigned char cmos_read_bank2(unsigned char addr) | |
180 | { | |
181 | return 0; | |
182 | } | |
183 | ||
184 | static inline void cmos_write_bank2(unsigned char val, unsigned char addr) | |
185 | { | |
186 | } | |
187 | ||
188 | #endif | |
189 | ||
190 | /*----------------------------------------------------------------*/ | |
191 | ||
7be2c7c9 DB |
192 | static int cmos_read_time(struct device *dev, struct rtc_time *t) |
193 | { | |
ba58d102 CY |
194 | /* |
195 | * If pm_trace abused the RTC for storage, set the timespec to 0, | |
196 | * which tells the caller that this RTC value is unusable. | |
197 | */ | |
198 | if (!pm_trace_rtc_valid()) | |
199 | return -EIO; | |
200 | ||
7be2c7c9 | 201 | /* REVISIT: if the clock has a "century" register, use |
5ab788d7 | 202 | * that instead of the heuristic in mc146818_get_time(). |
7be2c7c9 DB |
203 | * That'll make Y3K compatility (year > 2070) easy! |
204 | */ | |
5ab788d7 | 205 | mc146818_get_time(t); |
7be2c7c9 DB |
206 | return 0; |
207 | } | |
208 | ||
209 | static int cmos_set_time(struct device *dev, struct rtc_time *t) | |
210 | { | |
211 | /* REVISIT: set the "century" register if available | |
212 | * | |
213 | * NOTE: this ignores the issue whereby updating the seconds | |
214 | * takes effect exactly 500ms after we write the register. | |
215 | * (Also queueing and other delays before we get this far.) | |
216 | */ | |
5ab788d7 | 217 | return mc146818_set_time(t); |
7be2c7c9 DB |
218 | } |
219 | ||
220 | static int cmos_read_alarm(struct device *dev, struct rtc_wkalrm *t) | |
221 | { | |
222 | struct cmos_rtc *cmos = dev_get_drvdata(dev); | |
223 | unsigned char rtc_control; | |
224 | ||
225 | if (!is_valid_irq(cmos->irq)) | |
226 | return -EIO; | |
227 | ||
228 | /* Basic alarms only support hour, minute, and seconds fields. | |
229 | * Some also support day and month, for alarms up to a year in | |
230 | * the future. | |
231 | */ | |
7be2c7c9 DB |
232 | |
233 | spin_lock_irq(&rtc_lock); | |
234 | t->time.tm_sec = CMOS_READ(RTC_SECONDS_ALARM); | |
235 | t->time.tm_min = CMOS_READ(RTC_MINUTES_ALARM); | |
236 | t->time.tm_hour = CMOS_READ(RTC_HOURS_ALARM); | |
237 | ||
238 | if (cmos->day_alrm) { | |
615bb29c ML |
239 | /* ignore upper bits on readback per ACPI spec */ |
240 | t->time.tm_mday = CMOS_READ(cmos->day_alrm) & 0x3f; | |
7be2c7c9 DB |
241 | if (!t->time.tm_mday) |
242 | t->time.tm_mday = -1; | |
243 | ||
244 | if (cmos->mon_alrm) { | |
245 | t->time.tm_mon = CMOS_READ(cmos->mon_alrm); | |
246 | if (!t->time.tm_mon) | |
247 | t->time.tm_mon = -1; | |
248 | } | |
249 | } | |
250 | ||
251 | rtc_control = CMOS_READ(RTC_CONTROL); | |
252 | spin_unlock_irq(&rtc_lock); | |
253 | ||
3804a89b AP |
254 | if (!(rtc_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD) { |
255 | if (((unsigned)t->time.tm_sec) < 0x60) | |
256 | t->time.tm_sec = bcd2bin(t->time.tm_sec); | |
7be2c7c9 | 257 | else |
3804a89b AP |
258 | t->time.tm_sec = -1; |
259 | if (((unsigned)t->time.tm_min) < 0x60) | |
260 | t->time.tm_min = bcd2bin(t->time.tm_min); | |
261 | else | |
262 | t->time.tm_min = -1; | |
263 | if (((unsigned)t->time.tm_hour) < 0x24) | |
264 | t->time.tm_hour = bcd2bin(t->time.tm_hour); | |
265 | else | |
266 | t->time.tm_hour = -1; | |
267 | ||
268 | if (cmos->day_alrm) { | |
269 | if (((unsigned)t->time.tm_mday) <= 0x31) | |
270 | t->time.tm_mday = bcd2bin(t->time.tm_mday); | |
7be2c7c9 | 271 | else |
3804a89b AP |
272 | t->time.tm_mday = -1; |
273 | ||
274 | if (cmos->mon_alrm) { | |
275 | if (((unsigned)t->time.tm_mon) <= 0x12) | |
276 | t->time.tm_mon = bcd2bin(t->time.tm_mon)-1; | |
277 | else | |
278 | t->time.tm_mon = -1; | |
279 | } | |
7be2c7c9 DB |
280 | } |
281 | } | |
7be2c7c9 DB |
282 | |
283 | t->enabled = !!(rtc_control & RTC_AIE); | |
284 | t->pending = 0; | |
285 | ||
286 | return 0; | |
287 | } | |
288 | ||
7e2a31da DB |
289 | static void cmos_checkintr(struct cmos_rtc *cmos, unsigned char rtc_control) |
290 | { | |
291 | unsigned char rtc_intr; | |
292 | ||
293 | /* NOTE after changing RTC_xIE bits we always read INTR_FLAGS; | |
294 | * allegedly some older rtcs need that to handle irqs properly | |
295 | */ | |
296 | rtc_intr = CMOS_READ(RTC_INTR_FLAGS); | |
297 | ||
298 | if (is_hpet_enabled()) | |
299 | return; | |
300 | ||
301 | rtc_intr &= (rtc_control & RTC_IRQMASK) | RTC_IRQF; | |
302 | if (is_intr(rtc_intr)) | |
303 | rtc_update_irq(cmos->rtc, 1, rtc_intr); | |
304 | } | |
305 | ||
306 | static void cmos_irq_enable(struct cmos_rtc *cmos, unsigned char mask) | |
307 | { | |
308 | unsigned char rtc_control; | |
309 | ||
310 | /* flush any pending IRQ status, notably for update irqs, | |
311 | * before we enable new IRQs | |
312 | */ | |
313 | rtc_control = CMOS_READ(RTC_CONTROL); | |
314 | cmos_checkintr(cmos, rtc_control); | |
315 | ||
316 | rtc_control |= mask; | |
317 | CMOS_WRITE(rtc_control, RTC_CONTROL); | |
318 | hpet_set_rtc_irq_bit(mask); | |
319 | ||
320 | cmos_checkintr(cmos, rtc_control); | |
321 | } | |
322 | ||
323 | static void cmos_irq_disable(struct cmos_rtc *cmos, unsigned char mask) | |
324 | { | |
325 | unsigned char rtc_control; | |
326 | ||
327 | rtc_control = CMOS_READ(RTC_CONTROL); | |
328 | rtc_control &= ~mask; | |
329 | CMOS_WRITE(rtc_control, RTC_CONTROL); | |
330 | hpet_mask_rtc_irq_bit(mask); | |
331 | ||
332 | cmos_checkintr(cmos, rtc_control); | |
333 | } | |
334 | ||
6a6af3d0 GM |
335 | static int cmos_validate_alarm(struct device *dev, struct rtc_wkalrm *t) |
336 | { | |
337 | struct cmos_rtc *cmos = dev_get_drvdata(dev); | |
338 | struct rtc_time now; | |
339 | ||
340 | cmos_read_time(dev, &now); | |
341 | ||
342 | if (!cmos->day_alrm) { | |
343 | time64_t t_max_date; | |
344 | time64_t t_alrm; | |
345 | ||
346 | t_max_date = rtc_tm_to_time64(&now); | |
347 | t_max_date += 24 * 60 * 60 - 1; | |
348 | t_alrm = rtc_tm_to_time64(&t->time); | |
349 | if (t_alrm > t_max_date) { | |
350 | dev_err(dev, | |
351 | "Alarms can be up to one day in the future\n"); | |
352 | return -EINVAL; | |
353 | } | |
354 | } else if (!cmos->mon_alrm) { | |
355 | struct rtc_time max_date = now; | |
356 | time64_t t_max_date; | |
357 | time64_t t_alrm; | |
358 | int max_mday; | |
359 | ||
360 | if (max_date.tm_mon == 11) { | |
361 | max_date.tm_mon = 0; | |
362 | max_date.tm_year += 1; | |
363 | } else { | |
364 | max_date.tm_mon += 1; | |
365 | } | |
366 | max_mday = rtc_month_days(max_date.tm_mon, max_date.tm_year); | |
367 | if (max_date.tm_mday > max_mday) | |
368 | max_date.tm_mday = max_mday; | |
369 | ||
370 | t_max_date = rtc_tm_to_time64(&max_date); | |
371 | t_max_date -= 1; | |
372 | t_alrm = rtc_tm_to_time64(&t->time); | |
373 | if (t_alrm > t_max_date) { | |
374 | dev_err(dev, | |
375 | "Alarms can be up to one month in the future\n"); | |
376 | return -EINVAL; | |
377 | } | |
378 | } else { | |
379 | struct rtc_time max_date = now; | |
380 | time64_t t_max_date; | |
381 | time64_t t_alrm; | |
382 | int max_mday; | |
383 | ||
384 | max_date.tm_year += 1; | |
385 | max_mday = rtc_month_days(max_date.tm_mon, max_date.tm_year); | |
386 | if (max_date.tm_mday > max_mday) | |
387 | max_date.tm_mday = max_mday; | |
388 | ||
389 | t_max_date = rtc_tm_to_time64(&max_date); | |
390 | t_max_date -= 1; | |
391 | t_alrm = rtc_tm_to_time64(&t->time); | |
392 | if (t_alrm > t_max_date) { | |
393 | dev_err(dev, | |
394 | "Alarms can be up to one year in the future\n"); | |
395 | return -EINVAL; | |
396 | } | |
397 | } | |
398 | ||
399 | return 0; | |
400 | } | |
401 | ||
7be2c7c9 DB |
402 | static int cmos_set_alarm(struct device *dev, struct rtc_wkalrm *t) |
403 | { | |
404 | struct cmos_rtc *cmos = dev_get_drvdata(dev); | |
5e8599d2 | 405 | unsigned char mon, mday, hrs, min, sec, rtc_control; |
6a6af3d0 | 406 | int ret; |
7be2c7c9 DB |
407 | |
408 | if (!is_valid_irq(cmos->irq)) | |
409 | return -EIO; | |
410 | ||
6a6af3d0 GM |
411 | ret = cmos_validate_alarm(dev, t); |
412 | if (ret < 0) | |
413 | return ret; | |
414 | ||
2b653e06 | 415 | mon = t->time.tm_mon + 1; |
7be2c7c9 | 416 | mday = t->time.tm_mday; |
7be2c7c9 | 417 | hrs = t->time.tm_hour; |
7be2c7c9 | 418 | min = t->time.tm_min; |
7be2c7c9 | 419 | sec = t->time.tm_sec; |
3804a89b AP |
420 | |
421 | rtc_control = CMOS_READ(RTC_CONTROL); | |
422 | if (!(rtc_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD) { | |
423 | /* Writing 0xff means "don't care" or "match all". */ | |
424 | mon = (mon <= 12) ? bin2bcd(mon) : 0xff; | |
425 | mday = (mday >= 1 && mday <= 31) ? bin2bcd(mday) : 0xff; | |
426 | hrs = (hrs < 24) ? bin2bcd(hrs) : 0xff; | |
427 | min = (min < 60) ? bin2bcd(min) : 0xff; | |
428 | sec = (sec < 60) ? bin2bcd(sec) : 0xff; | |
429 | } | |
7be2c7c9 DB |
430 | |
431 | spin_lock_irq(&rtc_lock); | |
432 | ||
433 | /* next rtc irq must not be from previous alarm setting */ | |
7e2a31da | 434 | cmos_irq_disable(cmos, RTC_AIE); |
7be2c7c9 DB |
435 | |
436 | /* update alarm */ | |
437 | CMOS_WRITE(hrs, RTC_HOURS_ALARM); | |
438 | CMOS_WRITE(min, RTC_MINUTES_ALARM); | |
439 | CMOS_WRITE(sec, RTC_SECONDS_ALARM); | |
440 | ||
441 | /* the system may support an "enhanced" alarm */ | |
442 | if (cmos->day_alrm) { | |
443 | CMOS_WRITE(mday, cmos->day_alrm); | |
444 | if (cmos->mon_alrm) | |
445 | CMOS_WRITE(mon, cmos->mon_alrm); | |
446 | } | |
447 | ||
35d3fdd5 DB |
448 | /* FIXME the HPET alarm glue currently ignores day_alrm |
449 | * and mon_alrm ... | |
450 | */ | |
451 | hpet_set_alarm_time(t->time.tm_hour, t->time.tm_min, t->time.tm_sec); | |
452 | ||
7e2a31da DB |
453 | if (t->enabled) |
454 | cmos_irq_enable(cmos, RTC_AIE); | |
7be2c7c9 DB |
455 | |
456 | spin_unlock_irq(&rtc_lock); | |
457 | ||
88b8d33b AH |
458 | cmos->alarm_expires = rtc_tm_to_time64(&t->time); |
459 | ||
7be2c7c9 DB |
460 | return 0; |
461 | } | |
462 | ||
a8462ef6 | 463 | static int cmos_alarm_irq_enable(struct device *dev, unsigned int enabled) |
7be2c7c9 DB |
464 | { |
465 | struct cmos_rtc *cmos = dev_get_drvdata(dev); | |
7be2c7c9 DB |
466 | unsigned long flags; |
467 | ||
a8462ef6 HRK |
468 | if (!is_valid_irq(cmos->irq)) |
469 | return -EINVAL; | |
7be2c7c9 DB |
470 | |
471 | spin_lock_irqsave(&rtc_lock, flags); | |
a8462ef6 HRK |
472 | |
473 | if (enabled) | |
7e2a31da | 474 | cmos_irq_enable(cmos, RTC_AIE); |
a8462ef6 HRK |
475 | else |
476 | cmos_irq_disable(cmos, RTC_AIE); | |
477 | ||
7be2c7c9 DB |
478 | spin_unlock_irqrestore(&rtc_lock, flags); |
479 | return 0; | |
480 | } | |
481 | ||
6fca3fc5 | 482 | #if IS_ENABLED(CONFIG_RTC_INTF_PROC) |
7be2c7c9 DB |
483 | |
484 | static int cmos_procfs(struct device *dev, struct seq_file *seq) | |
485 | { | |
486 | struct cmos_rtc *cmos = dev_get_drvdata(dev); | |
487 | unsigned char rtc_control, valid; | |
488 | ||
489 | spin_lock_irq(&rtc_lock); | |
490 | rtc_control = CMOS_READ(RTC_CONTROL); | |
491 | valid = CMOS_READ(RTC_VALID); | |
492 | spin_unlock_irq(&rtc_lock); | |
493 | ||
494 | /* NOTE: at least ICH6 reports battery status using a different | |
495 | * (non-RTC) bit; and SQWE is ignored on many current systems. | |
496 | */ | |
4395eb1f JP |
497 | seq_printf(seq, |
498 | "periodic_IRQ\t: %s\n" | |
499 | "update_IRQ\t: %s\n" | |
500 | "HPET_emulated\t: %s\n" | |
501 | // "square_wave\t: %s\n" | |
502 | "BCD\t\t: %s\n" | |
503 | "DST_enable\t: %s\n" | |
504 | "periodic_freq\t: %d\n" | |
505 | "batt_status\t: %s\n", | |
506 | (rtc_control & RTC_PIE) ? "yes" : "no", | |
507 | (rtc_control & RTC_UIE) ? "yes" : "no", | |
508 | is_hpet_enabled() ? "yes" : "no", | |
509 | // (rtc_control & RTC_SQWE) ? "yes" : "no", | |
510 | (rtc_control & RTC_DM_BINARY) ? "no" : "yes", | |
511 | (rtc_control & RTC_DST_EN) ? "yes" : "no", | |
512 | cmos->rtc->irq_freq, | |
513 | (valid & RTC_VRT) ? "okay" : "dead"); | |
514 | ||
515 | return 0; | |
7be2c7c9 DB |
516 | } |
517 | ||
518 | #else | |
519 | #define cmos_procfs NULL | |
520 | #endif | |
521 | ||
522 | static const struct rtc_class_ops cmos_rtc_ops = { | |
a8462ef6 HRK |
523 | .read_time = cmos_read_time, |
524 | .set_time = cmos_set_time, | |
525 | .read_alarm = cmos_read_alarm, | |
526 | .set_alarm = cmos_set_alarm, | |
527 | .proc = cmos_procfs, | |
a8462ef6 | 528 | .alarm_irq_enable = cmos_alarm_irq_enable, |
7be2c7c9 DB |
529 | }; |
530 | ||
531 | /*----------------------------------------------------------------*/ | |
532 | ||
e07e232c DB |
533 | /* |
534 | * All these chips have at least 64 bytes of address space, shared by | |
535 | * RTC registers and NVRAM. Most of those bytes of NVRAM are used | |
536 | * by boot firmware. Modern chips have 128 or 256 bytes. | |
537 | */ | |
538 | ||
539 | #define NVRAM_OFFSET (RTC_REG_D + 1) | |
540 | ||
541 | static ssize_t | |
2c3c8bea CW |
542 | cmos_nvram_read(struct file *filp, struct kobject *kobj, |
543 | struct bin_attribute *attr, | |
e07e232c DB |
544 | char *buf, loff_t off, size_t count) |
545 | { | |
546 | int retval; | |
547 | ||
c8fc40cd | 548 | off += NVRAM_OFFSET; |
e07e232c | 549 | spin_lock_irq(&rtc_lock); |
c8fc40cd DB |
550 | for (retval = 0; count; count--, off++, retval++) { |
551 | if (off < 128) | |
552 | *buf++ = CMOS_READ(off); | |
553 | else if (can_bank2) | |
554 | *buf++ = cmos_read_bank2(off); | |
555 | else | |
556 | break; | |
557 | } | |
e07e232c DB |
558 | spin_unlock_irq(&rtc_lock); |
559 | ||
560 | return retval; | |
561 | } | |
562 | ||
563 | static ssize_t | |
2c3c8bea CW |
564 | cmos_nvram_write(struct file *filp, struct kobject *kobj, |
565 | struct bin_attribute *attr, | |
e07e232c DB |
566 | char *buf, loff_t off, size_t count) |
567 | { | |
568 | struct cmos_rtc *cmos; | |
569 | int retval; | |
570 | ||
571 | cmos = dev_get_drvdata(container_of(kobj, struct device, kobj)); | |
e07e232c DB |
572 | |
573 | /* NOTE: on at least PCs and Ataris, the boot firmware uses a | |
574 | * checksum on part of the NVRAM data. That's currently ignored | |
575 | * here. If userspace is smart enough to know what fields of | |
576 | * NVRAM to update, updating checksums is also part of its job. | |
577 | */ | |
c8fc40cd | 578 | off += NVRAM_OFFSET; |
e07e232c | 579 | spin_lock_irq(&rtc_lock); |
c8fc40cd | 580 | for (retval = 0; count; count--, off++, retval++) { |
e07e232c DB |
581 | /* don't trash RTC registers */ |
582 | if (off == cmos->day_alrm | |
583 | || off == cmos->mon_alrm | |
584 | || off == cmos->century) | |
585 | buf++; | |
c8fc40cd | 586 | else if (off < 128) |
e07e232c | 587 | CMOS_WRITE(*buf++, off); |
c8fc40cd DB |
588 | else if (can_bank2) |
589 | cmos_write_bank2(*buf++, off); | |
590 | else | |
591 | break; | |
e07e232c DB |
592 | } |
593 | spin_unlock_irq(&rtc_lock); | |
594 | ||
595 | return retval; | |
596 | } | |
597 | ||
598 | static struct bin_attribute nvram = { | |
599 | .attr = { | |
600 | .name = "nvram", | |
601 | .mode = S_IRUGO | S_IWUSR, | |
e07e232c DB |
602 | }, |
603 | ||
604 | .read = cmos_nvram_read, | |
605 | .write = cmos_nvram_write, | |
606 | /* size gets set up later */ | |
607 | }; | |
608 | ||
609 | /*----------------------------------------------------------------*/ | |
610 | ||
7be2c7c9 DB |
611 | static struct cmos_rtc cmos_rtc; |
612 | ||
613 | static irqreturn_t cmos_interrupt(int irq, void *p) | |
614 | { | |
615 | u8 irqstat; | |
8a0bdfd7 | 616 | u8 rtc_control; |
7be2c7c9 DB |
617 | |
618 | spin_lock(&rtc_lock); | |
35d3fdd5 DB |
619 | |
620 | /* When the HPET interrupt handler calls us, the interrupt | |
621 | * status is passed as arg1 instead of the irq number. But | |
622 | * always clear irq status, even when HPET is in the way. | |
623 | * | |
624 | * Note that HPET and RTC are almost certainly out of phase, | |
625 | * giving different IRQ status ... | |
9d8af78b | 626 | */ |
35d3fdd5 DB |
627 | irqstat = CMOS_READ(RTC_INTR_FLAGS); |
628 | rtc_control = CMOS_READ(RTC_CONTROL); | |
9d8af78b BW |
629 | if (is_hpet_enabled()) |
630 | irqstat = (unsigned long)irq & 0xF0; | |
998a0605 DB |
631 | |
632 | /* If we were suspended, RTC_CONTROL may not be accurate since the | |
633 | * bios may have cleared it. | |
634 | */ | |
635 | if (!cmos_rtc.suspend_ctrl) | |
636 | irqstat &= (rtc_control & RTC_IRQMASK) | RTC_IRQF; | |
637 | else | |
638 | irqstat &= (cmos_rtc.suspend_ctrl & RTC_IRQMASK) | RTC_IRQF; | |
8a0bdfd7 DB |
639 | |
640 | /* All Linux RTC alarms should be treated as if they were oneshot. | |
641 | * Similar code may be needed in system wakeup paths, in case the | |
642 | * alarm woke the system. | |
643 | */ | |
644 | if (irqstat & RTC_AIE) { | |
998a0605 | 645 | cmos_rtc.suspend_ctrl &= ~RTC_AIE; |
8a0bdfd7 DB |
646 | rtc_control &= ~RTC_AIE; |
647 | CMOS_WRITE(rtc_control, RTC_CONTROL); | |
35d3fdd5 | 648 | hpet_mask_rtc_irq_bit(RTC_AIE); |
8a0bdfd7 DB |
649 | CMOS_READ(RTC_INTR_FLAGS); |
650 | } | |
7be2c7c9 DB |
651 | spin_unlock(&rtc_lock); |
652 | ||
bcd9b89c | 653 | if (is_intr(irqstat)) { |
7be2c7c9 DB |
654 | rtc_update_irq(p, 1, irqstat); |
655 | return IRQ_HANDLED; | |
656 | } else | |
657 | return IRQ_NONE; | |
658 | } | |
659 | ||
41ac8df9 | 660 | #ifdef CONFIG_PNP |
7be2c7c9 DB |
661 | #define INITSECTION |
662 | ||
663 | #else | |
7be2c7c9 DB |
664 | #define INITSECTION __init |
665 | #endif | |
666 | ||
667 | static int INITSECTION | |
668 | cmos_do_probe(struct device *dev, struct resource *ports, int rtc_irq) | |
669 | { | |
97a92e77 | 670 | struct cmos_rtc_board_info *info = dev_get_platdata(dev); |
7be2c7c9 DB |
671 | int retval = 0; |
672 | unsigned char rtc_control; | |
e07e232c | 673 | unsigned address_space; |
31632dbd | 674 | u32 flags = 0; |
7be2c7c9 DB |
675 | |
676 | /* there can be only one ... */ | |
677 | if (cmos_rtc.dev) | |
678 | return -EBUSY; | |
679 | ||
680 | if (!ports) | |
681 | return -ENODEV; | |
682 | ||
05440dfc DB |
683 | /* Claim I/O ports ASAP, minimizing conflict with legacy driver. |
684 | * | |
685 | * REVISIT non-x86 systems may instead use memory space resources | |
686 | * (needing ioremap etc), not i/o space resources like this ... | |
687 | */ | |
31632dbd MR |
688 | if (RTC_IOMAPPED) |
689 | ports = request_region(ports->start, resource_size(ports), | |
690 | driver_name); | |
691 | else | |
692 | ports = request_mem_region(ports->start, resource_size(ports), | |
693 | driver_name); | |
05440dfc DB |
694 | if (!ports) { |
695 | dev_dbg(dev, "i/o registers already in use\n"); | |
696 | return -EBUSY; | |
697 | } | |
698 | ||
7be2c7c9 DB |
699 | cmos_rtc.irq = rtc_irq; |
700 | cmos_rtc.iomem = ports; | |
701 | ||
e07e232c DB |
702 | /* Heuristic to deduce NVRAM size ... do what the legacy NVRAM |
703 | * driver did, but don't reject unknown configs. Old hardware | |
c8fc40cd DB |
704 | * won't address 128 bytes. Newer chips have multiple banks, |
705 | * though they may not be listed in one I/O resource. | |
e07e232c DB |
706 | */ |
707 | #if defined(CONFIG_ATARI) | |
708 | address_space = 64; | |
95abd0df | 709 | #elif defined(__i386__) || defined(__x86_64__) || defined(__arm__) \ |
8cb7c71b | 710 | || defined(__sparc__) || defined(__mips__) \ |
5ee98ab3 | 711 | || defined(__powerpc__) || defined(CONFIG_MN10300) |
e07e232c DB |
712 | address_space = 128; |
713 | #else | |
714 | #warning Assuming 128 bytes of RTC+NVRAM address space, not 64 bytes. | |
715 | address_space = 128; | |
716 | #endif | |
c8fc40cd DB |
717 | if (can_bank2 && ports->end > (ports->start + 1)) |
718 | address_space = 256; | |
e07e232c | 719 | |
87ac84f4 DB |
720 | /* For ACPI systems extension info comes from the FADT. On others, |
721 | * board specific setup provides it as appropriate. Systems where | |
722 | * the alarm IRQ isn't automatically a wakeup IRQ (like ACPI, and | |
723 | * some almost-clones) can provide hooks to make that behave. | |
e07e232c DB |
724 | * |
725 | * Note that ACPI doesn't preclude putting these registers into | |
726 | * "extended" areas of the chip, including some that we won't yet | |
727 | * expect CMOS_READ and friends to handle. | |
7be2c7c9 DB |
728 | */ |
729 | if (info) { | |
31632dbd MR |
730 | if (info->flags) |
731 | flags = info->flags; | |
732 | if (info->address_space) | |
733 | address_space = info->address_space; | |
734 | ||
e07e232c DB |
735 | if (info->rtc_day_alarm && info->rtc_day_alarm < 128) |
736 | cmos_rtc.day_alrm = info->rtc_day_alarm; | |
737 | if (info->rtc_mon_alarm && info->rtc_mon_alarm < 128) | |
738 | cmos_rtc.mon_alrm = info->rtc_mon_alarm; | |
739 | if (info->rtc_century && info->rtc_century < 128) | |
740 | cmos_rtc.century = info->rtc_century; | |
87ac84f4 DB |
741 | |
742 | if (info->wake_on && info->wake_off) { | |
743 | cmos_rtc.wake_on = info->wake_on; | |
744 | cmos_rtc.wake_off = info->wake_off; | |
745 | } | |
7be2c7c9 DB |
746 | } |
747 | ||
6ba8bcd4 DC |
748 | cmos_rtc.dev = dev; |
749 | dev_set_drvdata(dev, &cmos_rtc); | |
750 | ||
7be2c7c9 DB |
751 | cmos_rtc.rtc = rtc_device_register(driver_name, dev, |
752 | &cmos_rtc_ops, THIS_MODULE); | |
05440dfc DB |
753 | if (IS_ERR(cmos_rtc.rtc)) { |
754 | retval = PTR_ERR(cmos_rtc.rtc); | |
755 | goto cleanup0; | |
756 | } | |
7be2c7c9 | 757 | |
d4afc76c | 758 | rename_region(ports, dev_name(&cmos_rtc.rtc->dev)); |
7be2c7c9 DB |
759 | |
760 | spin_lock_irq(&rtc_lock); | |
761 | ||
31632dbd MR |
762 | if (!(flags & CMOS_RTC_FLAGS_NOFREQ)) { |
763 | /* force periodic irq to CMOS reset default of 1024Hz; | |
764 | * | |
765 | * REVISIT it's been reported that at least one x86_64 ALI | |
766 | * mobo doesn't use 32KHz here ... for portability we might | |
767 | * need to do something about other clock frequencies. | |
768 | */ | |
769 | cmos_rtc.rtc->irq_freq = 1024; | |
770 | hpet_set_periodic_freq(cmos_rtc.rtc->irq_freq); | |
771 | CMOS_WRITE(RTC_REF_CLCK_32KHZ | 0x06, RTC_FREQ_SELECT); | |
772 | } | |
7be2c7c9 | 773 | |
7e2a31da | 774 | /* disable irqs */ |
31632dbd MR |
775 | if (is_valid_irq(rtc_irq)) |
776 | cmos_irq_disable(&cmos_rtc, RTC_PIE | RTC_AIE | RTC_UIE); | |
35d3fdd5 | 777 | |
7e2a31da | 778 | rtc_control = CMOS_READ(RTC_CONTROL); |
7be2c7c9 DB |
779 | |
780 | spin_unlock_irq(&rtc_lock); | |
781 | ||
5e8599d2 | 782 | if (is_valid_irq(rtc_irq) && !(rtc_control & RTC_24H)) { |
3804a89b | 783 | dev_warn(dev, "only 24-hr supported\n"); |
7be2c7c9 DB |
784 | retval = -ENXIO; |
785 | goto cleanup1; | |
786 | } | |
787 | ||
970fc7f4 PA |
788 | hpet_rtc_timer_init(); |
789 | ||
9d8af78b BW |
790 | if (is_valid_irq(rtc_irq)) { |
791 | irq_handler_t rtc_cmos_int_handler; | |
792 | ||
793 | if (is_hpet_enabled()) { | |
9d8af78b | 794 | rtc_cmos_int_handler = hpet_rtc_interrupt; |
24b34472 AM |
795 | retval = hpet_register_irq_handler(cmos_interrupt); |
796 | if (retval) { | |
970fc7f4 | 797 | hpet_mask_rtc_irq_bit(RTC_IRQMASK); |
ee443357 | 798 | dev_warn(dev, "hpet_register_irq_handler " |
9d8af78b BW |
799 | " failed in rtc_init()."); |
800 | goto cleanup1; | |
801 | } | |
802 | } else | |
803 | rtc_cmos_int_handler = cmos_interrupt; | |
804 | ||
805 | retval = request_irq(rtc_irq, rtc_cmos_int_handler, | |
079062b2 | 806 | IRQF_SHARED, dev_name(&cmos_rtc.rtc->dev), |
ab6a2d70 | 807 | cmos_rtc.rtc); |
9d8af78b BW |
808 | if (retval < 0) { |
809 | dev_dbg(dev, "IRQ %d is already in use\n", rtc_irq); | |
810 | goto cleanup1; | |
811 | } | |
7be2c7c9 DB |
812 | } |
813 | ||
e07e232c DB |
814 | /* export at least the first block of NVRAM */ |
815 | nvram.size = address_space - NVRAM_OFFSET; | |
816 | retval = sysfs_create_bin_file(&dev->kobj, &nvram); | |
817 | if (retval < 0) { | |
818 | dev_dbg(dev, "can't create nvram file? %d\n", retval); | |
819 | goto cleanup2; | |
820 | } | |
7be2c7c9 | 821 | |
ee443357 | 822 | dev_info(dev, "%s%s, %zd bytes nvram%s\n", |
6d029b64 KH |
823 | !is_valid_irq(rtc_irq) ? "no alarms" : |
824 | cmos_rtc.mon_alrm ? "alarms up to one year" : | |
825 | cmos_rtc.day_alrm ? "alarms up to one month" : | |
826 | "alarms up to one day", | |
827 | cmos_rtc.century ? ", y3k" : "", | |
828 | nvram.size, | |
829 | is_hpet_enabled() ? ", hpet irqs" : ""); | |
7be2c7c9 DB |
830 | |
831 | return 0; | |
832 | ||
e07e232c DB |
833 | cleanup2: |
834 | if (is_valid_irq(rtc_irq)) | |
835 | free_irq(rtc_irq, cmos_rtc.rtc); | |
7be2c7c9 | 836 | cleanup1: |
05440dfc | 837 | cmos_rtc.dev = NULL; |
7be2c7c9 | 838 | rtc_device_unregister(cmos_rtc.rtc); |
05440dfc | 839 | cleanup0: |
31632dbd MR |
840 | if (RTC_IOMAPPED) |
841 | release_region(ports->start, resource_size(ports)); | |
842 | else | |
843 | release_mem_region(ports->start, resource_size(ports)); | |
7be2c7c9 DB |
844 | return retval; |
845 | } | |
846 | ||
31632dbd | 847 | static void cmos_do_shutdown(int rtc_irq) |
7be2c7c9 | 848 | { |
7be2c7c9 | 849 | spin_lock_irq(&rtc_lock); |
31632dbd MR |
850 | if (is_valid_irq(rtc_irq)) |
851 | cmos_irq_disable(&cmos_rtc, RTC_IRQMASK); | |
7be2c7c9 DB |
852 | spin_unlock_irq(&rtc_lock); |
853 | } | |
854 | ||
a3a0673b | 855 | static void cmos_do_remove(struct device *dev) |
7be2c7c9 DB |
856 | { |
857 | struct cmos_rtc *cmos = dev_get_drvdata(dev); | |
05440dfc | 858 | struct resource *ports; |
7be2c7c9 | 859 | |
31632dbd | 860 | cmos_do_shutdown(cmos->irq); |
7be2c7c9 | 861 | |
e07e232c DB |
862 | sysfs_remove_bin_file(&dev->kobj, &nvram); |
863 | ||
9d8af78b | 864 | if (is_valid_irq(cmos->irq)) { |
05440dfc | 865 | free_irq(cmos->irq, cmos->rtc); |
9d8af78b BW |
866 | hpet_unregister_irq_handler(cmos_interrupt); |
867 | } | |
7be2c7c9 | 868 | |
05440dfc DB |
869 | rtc_device_unregister(cmos->rtc); |
870 | cmos->rtc = NULL; | |
7be2c7c9 | 871 | |
05440dfc | 872 | ports = cmos->iomem; |
31632dbd MR |
873 | if (RTC_IOMAPPED) |
874 | release_region(ports->start, resource_size(ports)); | |
875 | else | |
876 | release_mem_region(ports->start, resource_size(ports)); | |
05440dfc DB |
877 | cmos->iomem = NULL; |
878 | ||
879 | cmos->dev = NULL; | |
7be2c7c9 DB |
880 | } |
881 | ||
88b8d33b AH |
882 | static int cmos_aie_poweroff(struct device *dev) |
883 | { | |
884 | struct cmos_rtc *cmos = dev_get_drvdata(dev); | |
885 | struct rtc_time now; | |
886 | time64_t t_now; | |
887 | int retval = 0; | |
888 | unsigned char rtc_control; | |
889 | ||
890 | if (!cmos->alarm_expires) | |
891 | return -EINVAL; | |
892 | ||
893 | spin_lock_irq(&rtc_lock); | |
894 | rtc_control = CMOS_READ(RTC_CONTROL); | |
895 | spin_unlock_irq(&rtc_lock); | |
896 | ||
897 | /* We only care about the situation where AIE is disabled. */ | |
898 | if (rtc_control & RTC_AIE) | |
899 | return -EBUSY; | |
900 | ||
901 | cmos_read_time(dev, &now); | |
902 | t_now = rtc_tm_to_time64(&now); | |
903 | ||
904 | /* | |
905 | * When enabling "RTC wake-up" in BIOS setup, the machine reboots | |
906 | * automatically right after shutdown on some buggy boxes. | |
907 | * This automatic rebooting issue won't happen when the alarm | |
908 | * time is larger than now+1 seconds. | |
909 | * | |
910 | * If the alarm time is equal to now+1 seconds, the issue can be | |
911 | * prevented by cancelling the alarm. | |
912 | */ | |
913 | if (cmos->alarm_expires == t_now + 1) { | |
914 | struct rtc_wkalrm alarm; | |
915 | ||
916 | /* Cancel the AIE timer by configuring the past time. */ | |
917 | rtc_time64_to_tm(t_now - 1, &alarm.time); | |
918 | alarm.enabled = 0; | |
919 | retval = cmos_set_alarm(dev, &alarm); | |
920 | } else if (cmos->alarm_expires > t_now + 1) { | |
921 | retval = -EBUSY; | |
922 | } | |
923 | ||
924 | return retval; | |
925 | } | |
926 | ||
2fb08e6c | 927 | static int cmos_suspend(struct device *dev) |
7be2c7c9 DB |
928 | { |
929 | struct cmos_rtc *cmos = dev_get_drvdata(dev); | |
bcd9b89c | 930 | unsigned char tmp; |
7be2c7c9 DB |
931 | |
932 | /* only the alarm might be a wakeup event source */ | |
933 | spin_lock_irq(&rtc_lock); | |
934 | cmos->suspend_ctrl = tmp = CMOS_READ(RTC_CONTROL); | |
935 | if (tmp & (RTC_PIE|RTC_AIE|RTC_UIE)) { | |
35d3fdd5 | 936 | unsigned char mask; |
bcd9b89c | 937 | |
74c4633d | 938 | if (device_may_wakeup(dev)) |
35d3fdd5 | 939 | mask = RTC_IRQMASK & ~RTC_AIE; |
7be2c7c9 | 940 | else |
35d3fdd5 DB |
941 | mask = RTC_IRQMASK; |
942 | tmp &= ~mask; | |
7be2c7c9 | 943 | CMOS_WRITE(tmp, RTC_CONTROL); |
e005715e | 944 | hpet_mask_rtc_irq_bit(mask); |
35d3fdd5 | 945 | |
7e2a31da | 946 | cmos_checkintr(cmos, tmp); |
bcd9b89c | 947 | } |
7be2c7c9 DB |
948 | spin_unlock_irq(&rtc_lock); |
949 | ||
87ac84f4 DB |
950 | if (tmp & RTC_AIE) { |
951 | cmos->enabled_wake = 1; | |
952 | if (cmos->wake_on) | |
953 | cmos->wake_on(dev); | |
954 | else | |
955 | enable_irq_wake(cmos->irq); | |
956 | } | |
7be2c7c9 | 957 | |
68669d55 GM |
958 | cmos_read_alarm(dev, &cmos->saved_wkalrm); |
959 | ||
ee443357 | 960 | dev_dbg(dev, "suspend%s, ctrl %02x\n", |
7be2c7c9 DB |
961 | (tmp & RTC_AIE) ? ", alarm may wake" : "", |
962 | tmp); | |
963 | ||
964 | return 0; | |
965 | } | |
966 | ||
74c4633d RW |
967 | /* We want RTC alarms to wake us from e.g. ACPI G2/S5 "soft off", even |
968 | * after a detour through G3 "mechanical off", although the ACPI spec | |
969 | * says wakeup should only work from G1/S4 "hibernate". To most users, | |
970 | * distinctions between S4 and S5 are pointless. So when the hardware | |
971 | * allows, don't draw that distinction. | |
972 | */ | |
973 | static inline int cmos_poweroff(struct device *dev) | |
974 | { | |
00f7f90c AB |
975 | if (!IS_ENABLED(CONFIG_PM)) |
976 | return -ENOSYS; | |
977 | ||
2fb08e6c | 978 | return cmos_suspend(dev); |
74c4633d RW |
979 | } |
980 | ||
68669d55 GM |
981 | static void cmos_check_wkalrm(struct device *dev) |
982 | { | |
983 | struct cmos_rtc *cmos = dev_get_drvdata(dev); | |
984 | struct rtc_wkalrm current_alarm; | |
985 | time64_t t_current_expires; | |
986 | time64_t t_saved_expires; | |
987 | ||
988 | cmos_read_alarm(dev, ¤t_alarm); | |
989 | t_current_expires = rtc_tm_to_time64(¤t_alarm.time); | |
990 | t_saved_expires = rtc_tm_to_time64(&cmos->saved_wkalrm.time); | |
991 | if (t_current_expires != t_saved_expires || | |
992 | cmos->saved_wkalrm.enabled != current_alarm.enabled) { | |
993 | cmos_set_alarm(dev, &cmos->saved_wkalrm); | |
994 | } | |
995 | } | |
996 | ||
983bf125 GM |
997 | static void cmos_check_acpi_rtc_status(struct device *dev, |
998 | unsigned char *rtc_control); | |
999 | ||
00f7f90c | 1000 | static int __maybe_unused cmos_resume(struct device *dev) |
7be2c7c9 DB |
1001 | { |
1002 | struct cmos_rtc *cmos = dev_get_drvdata(dev); | |
998a0605 DB |
1003 | unsigned char tmp; |
1004 | ||
1005 | if (cmos->enabled_wake) { | |
1006 | if (cmos->wake_off) | |
1007 | cmos->wake_off(dev); | |
1008 | else | |
1009 | disable_irq_wake(cmos->irq); | |
1010 | cmos->enabled_wake = 0; | |
1011 | } | |
7be2c7c9 | 1012 | |
68669d55 GM |
1013 | /* The BIOS might have changed the alarm, restore it */ |
1014 | cmos_check_wkalrm(dev); | |
1015 | ||
998a0605 DB |
1016 | spin_lock_irq(&rtc_lock); |
1017 | tmp = cmos->suspend_ctrl; | |
1018 | cmos->suspend_ctrl = 0; | |
7be2c7c9 | 1019 | /* re-enable any irqs previously active */ |
35d3fdd5 DB |
1020 | if (tmp & RTC_IRQMASK) { |
1021 | unsigned char mask; | |
7be2c7c9 | 1022 | |
ebf8d6c8 DB |
1023 | if (device_may_wakeup(dev)) |
1024 | hpet_rtc_timer_init(); | |
1025 | ||
35d3fdd5 DB |
1026 | do { |
1027 | CMOS_WRITE(tmp, RTC_CONTROL); | |
1028 | hpet_set_rtc_irq_bit(tmp & RTC_IRQMASK); | |
1029 | ||
1030 | mask = CMOS_READ(RTC_INTR_FLAGS); | |
1031 | mask &= (tmp & RTC_IRQMASK) | RTC_IRQF; | |
7e2a31da | 1032 | if (!is_hpet_enabled() || !is_intr(mask)) |
35d3fdd5 DB |
1033 | break; |
1034 | ||
1035 | /* force one-shot behavior if HPET blocked | |
1036 | * the wake alarm's irq | |
1037 | */ | |
1038 | rtc_update_irq(cmos->rtc, 1, mask); | |
1039 | tmp &= ~RTC_AIE; | |
1040 | hpet_mask_rtc_irq_bit(RTC_AIE); | |
1041 | } while (mask & RTC_AIE); | |
983bf125 GM |
1042 | |
1043 | if (tmp & RTC_AIE) | |
1044 | cmos_check_acpi_rtc_status(dev, &tmp); | |
7be2c7c9 | 1045 | } |
998a0605 | 1046 | spin_unlock_irq(&rtc_lock); |
7be2c7c9 | 1047 | |
ee443357 | 1048 | dev_dbg(dev, "resume, ctrl %02x\n", tmp); |
7be2c7c9 DB |
1049 | |
1050 | return 0; | |
1051 | } | |
1052 | ||
b5ada460 MW |
1053 | static SIMPLE_DEV_PM_OPS(cmos_pm_ops, cmos_suspend, cmos_resume); |
1054 | ||
7be2c7c9 DB |
1055 | /*----------------------------------------------------------------*/ |
1056 | ||
e07e232c DB |
1057 | /* On non-x86 systems, a "CMOS" RTC lives most naturally on platform_bus. |
1058 | * ACPI systems always list these as PNPACPI devices, and pre-ACPI PCs | |
1059 | * probably list them in similar PNPBIOS tables; so PNP is more common. | |
1060 | * | |
1061 | * We don't use legacy "poke at the hardware" probing. Ancient PCs that | |
1062 | * predate even PNPBIOS should set up platform_bus devices. | |
7be2c7c9 DB |
1063 | */ |
1064 | ||
a474aaed BH |
1065 | #ifdef CONFIG_ACPI |
1066 | ||
1067 | #include <linux/acpi.h> | |
1068 | ||
a474aaed BH |
1069 | static u32 rtc_handler(void *context) |
1070 | { | |
b2201e54 | 1071 | struct device *dev = context; |
983bf125 GM |
1072 | struct cmos_rtc *cmos = dev_get_drvdata(dev); |
1073 | unsigned char rtc_control = 0; | |
1074 | unsigned char rtc_intr; | |
368e21ae | 1075 | unsigned long flags; |
983bf125 | 1076 | |
368e21ae | 1077 | spin_lock_irqsave(&rtc_lock, flags); |
983bf125 GM |
1078 | if (cmos_rtc.suspend_ctrl) |
1079 | rtc_control = CMOS_READ(RTC_CONTROL); | |
1080 | if (rtc_control & RTC_AIE) { | |
1081 | cmos_rtc.suspend_ctrl &= ~RTC_AIE; | |
1082 | CMOS_WRITE(rtc_control, RTC_CONTROL); | |
1083 | rtc_intr = CMOS_READ(RTC_INTR_FLAGS); | |
1084 | rtc_update_irq(cmos->rtc, 1, rtc_intr); | |
1085 | } | |
368e21ae | 1086 | spin_unlock_irqrestore(&rtc_lock, flags); |
b2201e54 DD |
1087 | |
1088 | pm_wakeup_event(dev, 0); | |
a474aaed BH |
1089 | acpi_clear_event(ACPI_EVENT_RTC); |
1090 | acpi_disable_event(ACPI_EVENT_RTC, 0); | |
1091 | return ACPI_INTERRUPT_HANDLED; | |
1092 | } | |
1093 | ||
b2201e54 | 1094 | static inline void rtc_wake_setup(struct device *dev) |
a474aaed | 1095 | { |
b2201e54 | 1096 | acpi_install_fixed_event_handler(ACPI_EVENT_RTC, rtc_handler, dev); |
a474aaed BH |
1097 | /* |
1098 | * After the RTC handler is installed, the Fixed_RTC event should | |
1099 | * be disabled. Only when the RTC alarm is set will it be enabled. | |
1100 | */ | |
1101 | acpi_clear_event(ACPI_EVENT_RTC); | |
1102 | acpi_disable_event(ACPI_EVENT_RTC, 0); | |
1103 | } | |
1104 | ||
1105 | static void rtc_wake_on(struct device *dev) | |
1106 | { | |
1107 | acpi_clear_event(ACPI_EVENT_RTC); | |
1108 | acpi_enable_event(ACPI_EVENT_RTC, 0); | |
1109 | } | |
1110 | ||
1111 | static void rtc_wake_off(struct device *dev) | |
1112 | { | |
1113 | acpi_disable_event(ACPI_EVENT_RTC, 0); | |
1114 | } | |
a474aaed BH |
1115 | |
1116 | /* Every ACPI platform has a mc146818 compatible "cmos rtc". Here we find | |
1117 | * its device node and pass extra config data. This helps its driver use | |
1118 | * capabilities that the now-obsolete mc146818 didn't have, and informs it | |
1119 | * that this board's RTC is wakeup-capable (per ACPI spec). | |
1120 | */ | |
1121 | static struct cmos_rtc_board_info acpi_rtc_info; | |
1122 | ||
5a167f45 | 1123 | static void cmos_wake_setup(struct device *dev) |
a474aaed BH |
1124 | { |
1125 | if (acpi_disabled) | |
1126 | return; | |
1127 | ||
b2201e54 | 1128 | rtc_wake_setup(dev); |
a474aaed BH |
1129 | acpi_rtc_info.wake_on = rtc_wake_on; |
1130 | acpi_rtc_info.wake_off = rtc_wake_off; | |
1131 | ||
1132 | /* workaround bug in some ACPI tables */ | |
1133 | if (acpi_gbl_FADT.month_alarm && !acpi_gbl_FADT.day_alarm) { | |
1134 | dev_dbg(dev, "bogus FADT month_alarm (%d)\n", | |
1135 | acpi_gbl_FADT.month_alarm); | |
1136 | acpi_gbl_FADT.month_alarm = 0; | |
1137 | } | |
1138 | ||
1139 | acpi_rtc_info.rtc_day_alarm = acpi_gbl_FADT.day_alarm; | |
1140 | acpi_rtc_info.rtc_mon_alarm = acpi_gbl_FADT.month_alarm; | |
1141 | acpi_rtc_info.rtc_century = acpi_gbl_FADT.century; | |
1142 | ||
1143 | /* NOTE: S4_RTC_WAKE is NOT currently useful to Linux */ | |
1144 | if (acpi_gbl_FADT.flags & ACPI_FADT_S4_RTC_WAKE) | |
1145 | dev_info(dev, "RTC can wake from S4\n"); | |
1146 | ||
1147 | dev->platform_data = &acpi_rtc_info; | |
1148 | ||
1149 | /* RTC always wakes from S1/S2/S3, and often S4/STD */ | |
1150 | device_init_wakeup(dev, 1); | |
1151 | } | |
1152 | ||
983bf125 GM |
1153 | static void cmos_check_acpi_rtc_status(struct device *dev, |
1154 | unsigned char *rtc_control) | |
1155 | { | |
1156 | struct cmos_rtc *cmos = dev_get_drvdata(dev); | |
1157 | acpi_event_status rtc_status; | |
1158 | acpi_status status; | |
1159 | ||
1160 | if (acpi_gbl_FADT.flags & ACPI_FADT_FIXED_RTC) | |
1161 | return; | |
1162 | ||
1163 | status = acpi_get_event_status(ACPI_EVENT_RTC, &rtc_status); | |
1164 | if (ACPI_FAILURE(status)) { | |
1165 | dev_err(dev, "Could not get RTC status\n"); | |
1166 | } else if (rtc_status & ACPI_EVENT_FLAG_SET) { | |
1167 | unsigned char mask; | |
1168 | *rtc_control &= ~RTC_AIE; | |
1169 | CMOS_WRITE(*rtc_control, RTC_CONTROL); | |
1170 | mask = CMOS_READ(RTC_INTR_FLAGS); | |
1171 | rtc_update_irq(cmos->rtc, 1, mask); | |
1172 | } | |
1173 | } | |
1174 | ||
a474aaed BH |
1175 | #else |
1176 | ||
5a167f45 | 1177 | static void cmos_wake_setup(struct device *dev) |
a474aaed BH |
1178 | { |
1179 | } | |
1180 | ||
983bf125 GM |
1181 | static void cmos_check_acpi_rtc_status(struct device *dev, |
1182 | unsigned char *rtc_control) | |
1183 | { | |
1184 | } | |
1185 | ||
a474aaed BH |
1186 | #endif |
1187 | ||
41ac8df9 | 1188 | #ifdef CONFIG_PNP |
7be2c7c9 DB |
1189 | |
1190 | #include <linux/pnp.h> | |
1191 | ||
5a167f45 | 1192 | static int cmos_pnp_probe(struct pnp_dev *pnp, const struct pnp_device_id *id) |
7be2c7c9 | 1193 | { |
a474aaed BH |
1194 | cmos_wake_setup(&pnp->dev); |
1195 | ||
5e8599d2 | 1196 | if (pnp_port_start(pnp, 0) == 0x70 && !pnp_irq_valid(pnp, 0)) |
6cd8fa87 MG |
1197 | /* Some machines contain a PNP entry for the RTC, but |
1198 | * don't define the IRQ. It should always be safe to | |
1199 | * hardcode it in these cases | |
1200 | */ | |
8766ad0c BH |
1201 | return cmos_do_probe(&pnp->dev, |
1202 | pnp_get_resource(pnp, IORESOURCE_IO, 0), 8); | |
6cd8fa87 MG |
1203 | else |
1204 | return cmos_do_probe(&pnp->dev, | |
8766ad0c BH |
1205 | pnp_get_resource(pnp, IORESOURCE_IO, 0), |
1206 | pnp_irq(pnp, 0)); | |
7be2c7c9 DB |
1207 | } |
1208 | ||
a3a0673b | 1209 | static void cmos_pnp_remove(struct pnp_dev *pnp) |
7be2c7c9 DB |
1210 | { |
1211 | cmos_do_remove(&pnp->dev); | |
1212 | } | |
1213 | ||
004731b2 | 1214 | static void cmos_pnp_shutdown(struct pnp_dev *pnp) |
74c4633d | 1215 | { |
31632dbd MR |
1216 | struct device *dev = &pnp->dev; |
1217 | struct cmos_rtc *cmos = dev_get_drvdata(dev); | |
1218 | ||
88b8d33b AH |
1219 | if (system_state == SYSTEM_POWER_OFF) { |
1220 | int retval = cmos_poweroff(dev); | |
1221 | ||
1222 | if (cmos_aie_poweroff(dev) < 0 && !retval) | |
1223 | return; | |
1224 | } | |
74c4633d | 1225 | |
31632dbd | 1226 | cmos_do_shutdown(cmos->irq); |
74c4633d | 1227 | } |
7be2c7c9 DB |
1228 | |
1229 | static const struct pnp_device_id rtc_ids[] = { | |
1230 | { .id = "PNP0b00", }, | |
1231 | { .id = "PNP0b01", }, | |
1232 | { .id = "PNP0b02", }, | |
1233 | { }, | |
1234 | }; | |
1235 | MODULE_DEVICE_TABLE(pnp, rtc_ids); | |
1236 | ||
1237 | static struct pnp_driver cmos_pnp_driver = { | |
1238 | .name = (char *) driver_name, | |
1239 | .id_table = rtc_ids, | |
1240 | .probe = cmos_pnp_probe, | |
a3a0673b | 1241 | .remove = cmos_pnp_remove, |
004731b2 | 1242 | .shutdown = cmos_pnp_shutdown, |
7be2c7c9 DB |
1243 | |
1244 | /* flag ensures resume() gets called, and stops syslog spam */ | |
1245 | .flags = PNP_DRIVER_RES_DO_NOT_CHANGE, | |
a8a3808b SK |
1246 | .driver = { |
1247 | .pm = &cmos_pm_ops, | |
1248 | }, | |
7be2c7c9 DB |
1249 | }; |
1250 | ||
1da2e3d6 | 1251 | #endif /* CONFIG_PNP */ |
7be2c7c9 | 1252 | |
3bcbaf6e SAS |
1253 | #ifdef CONFIG_OF |
1254 | static const struct of_device_id of_cmos_match[] = { | |
1255 | { | |
1256 | .compatible = "motorola,mc146818", | |
1257 | }, | |
1258 | { }, | |
1259 | }; | |
1260 | MODULE_DEVICE_TABLE(of, of_cmos_match); | |
1261 | ||
1262 | static __init void cmos_of_init(struct platform_device *pdev) | |
1263 | { | |
1264 | struct device_node *node = pdev->dev.of_node; | |
1265 | struct rtc_time time; | |
1266 | int ret; | |
1267 | const __be32 *val; | |
1268 | ||
1269 | if (!node) | |
1270 | return; | |
1271 | ||
1272 | val = of_get_property(node, "ctrl-reg", NULL); | |
1273 | if (val) | |
1274 | CMOS_WRITE(be32_to_cpup(val), RTC_CONTROL); | |
1275 | ||
1276 | val = of_get_property(node, "freq-reg", NULL); | |
1277 | if (val) | |
1278 | CMOS_WRITE(be32_to_cpup(val), RTC_FREQ_SELECT); | |
1279 | ||
5ab788d7 | 1280 | cmos_read_time(&pdev->dev, &time); |
3bcbaf6e SAS |
1281 | ret = rtc_valid_tm(&time); |
1282 | if (ret) { | |
1283 | struct rtc_time def_time = { | |
1284 | .tm_year = 1, | |
1285 | .tm_mday = 1, | |
1286 | }; | |
5ab788d7 | 1287 | cmos_set_time(&pdev->dev, &def_time); |
3bcbaf6e SAS |
1288 | } |
1289 | } | |
1290 | #else | |
1291 | static inline void cmos_of_init(struct platform_device *pdev) {} | |
3bcbaf6e | 1292 | #endif |
7be2c7c9 DB |
1293 | /*----------------------------------------------------------------*/ |
1294 | ||
41ac8df9 | 1295 | /* Platform setup should have set up an RTC device, when PNP is |
bcd9b89c | 1296 | * unavailable ... this could happen even on (older) PCs. |
7be2c7c9 DB |
1297 | */ |
1298 | ||
1299 | static int __init cmos_platform_probe(struct platform_device *pdev) | |
1300 | { | |
31632dbd MR |
1301 | struct resource *resource; |
1302 | int irq; | |
1303 | ||
3bcbaf6e | 1304 | cmos_of_init(pdev); |
a474aaed | 1305 | cmos_wake_setup(&pdev->dev); |
31632dbd MR |
1306 | |
1307 | if (RTC_IOMAPPED) | |
1308 | resource = platform_get_resource(pdev, IORESOURCE_IO, 0); | |
1309 | else | |
1310 | resource = platform_get_resource(pdev, IORESOURCE_MEM, 0); | |
1311 | irq = platform_get_irq(pdev, 0); | |
1312 | if (irq < 0) | |
1313 | irq = -1; | |
1314 | ||
1315 | return cmos_do_probe(&pdev->dev, resource, irq); | |
7be2c7c9 DB |
1316 | } |
1317 | ||
a3a0673b | 1318 | static int cmos_platform_remove(struct platform_device *pdev) |
7be2c7c9 DB |
1319 | { |
1320 | cmos_do_remove(&pdev->dev); | |
1321 | return 0; | |
1322 | } | |
1323 | ||
1324 | static void cmos_platform_shutdown(struct platform_device *pdev) | |
1325 | { | |
31632dbd MR |
1326 | struct device *dev = &pdev->dev; |
1327 | struct cmos_rtc *cmos = dev_get_drvdata(dev); | |
1328 | ||
88b8d33b AH |
1329 | if (system_state == SYSTEM_POWER_OFF) { |
1330 | int retval = cmos_poweroff(dev); | |
1331 | ||
1332 | if (cmos_aie_poweroff(dev) < 0 && !retval) | |
1333 | return; | |
1334 | } | |
74c4633d | 1335 | |
31632dbd | 1336 | cmos_do_shutdown(cmos->irq); |
7be2c7c9 DB |
1337 | } |
1338 | ||
ad28a07b KS |
1339 | /* work with hotplug and coldplug */ |
1340 | MODULE_ALIAS("platform:rtc_cmos"); | |
1341 | ||
7be2c7c9 | 1342 | static struct platform_driver cmos_platform_driver = { |
a3a0673b | 1343 | .remove = cmos_platform_remove, |
7be2c7c9 DB |
1344 | .shutdown = cmos_platform_shutdown, |
1345 | .driver = { | |
c823a202 | 1346 | .name = driver_name, |
2fb08e6c | 1347 | .pm = &cmos_pm_ops, |
c8a6046e | 1348 | .of_match_table = of_match_ptr(of_cmos_match), |
7be2c7c9 DB |
1349 | } |
1350 | }; | |
1351 | ||
65909814 TLSC |
1352 | #ifdef CONFIG_PNP |
1353 | static bool pnp_driver_registered; | |
1354 | #endif | |
1355 | static bool platform_driver_registered; | |
1356 | ||
7be2c7c9 DB |
1357 | static int __init cmos_init(void) |
1358 | { | |
72f22b1e BH |
1359 | int retval = 0; |
1360 | ||
1da2e3d6 | 1361 | #ifdef CONFIG_PNP |
65909814 TLSC |
1362 | retval = pnp_register_driver(&cmos_pnp_driver); |
1363 | if (retval == 0) | |
1364 | pnp_driver_registered = true; | |
72f22b1e BH |
1365 | #endif |
1366 | ||
65909814 | 1367 | if (!cmos_rtc.dev) { |
72f22b1e BH |
1368 | retval = platform_driver_probe(&cmos_platform_driver, |
1369 | cmos_platform_probe); | |
65909814 TLSC |
1370 | if (retval == 0) |
1371 | platform_driver_registered = true; | |
1372 | } | |
72f22b1e BH |
1373 | |
1374 | if (retval == 0) | |
1375 | return 0; | |
1376 | ||
1377 | #ifdef CONFIG_PNP | |
65909814 TLSC |
1378 | if (pnp_driver_registered) |
1379 | pnp_unregister_driver(&cmos_pnp_driver); | |
72f22b1e BH |
1380 | #endif |
1381 | return retval; | |
7be2c7c9 DB |
1382 | } |
1383 | module_init(cmos_init); | |
1384 | ||
1385 | static void __exit cmos_exit(void) | |
1386 | { | |
1da2e3d6 | 1387 | #ifdef CONFIG_PNP |
65909814 TLSC |
1388 | if (pnp_driver_registered) |
1389 | pnp_unregister_driver(&cmos_pnp_driver); | |
72f22b1e | 1390 | #endif |
65909814 TLSC |
1391 | if (platform_driver_registered) |
1392 | platform_driver_unregister(&cmos_platform_driver); | |
7be2c7c9 DB |
1393 | } |
1394 | module_exit(cmos_exit); | |
1395 | ||
1396 | ||
7be2c7c9 DB |
1397 | MODULE_AUTHOR("David Brownell"); |
1398 | MODULE_DESCRIPTION("Driver for PC-style 'CMOS' RTCs"); | |
1399 | MODULE_LICENSE("GPL"); |