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ede1e6f8 HLT |
1 | /* |
2 | * HighPoint RR3xxx controller driver for Linux | |
db9b6e89 | 3 | * Copyright (C) 2006-2007 HighPoint Technologies, Inc. All Rights Reserved. |
ede1e6f8 HLT |
4 | * |
5 | * This program is free software; you can redistribute it and/or modify | |
6 | * it under the terms of the GNU General Public License as published by | |
7 | * the Free Software Foundation; version 2 of the License. | |
8 | * | |
9 | * This program is distributed in the hope that it will be useful, | |
10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
12 | * GNU General Public License for more details. | |
13 | * | |
14 | * Please report bugs/comments/suggestions to linux@highpoint-tech.com | |
15 | * | |
16 | * For more information, visit http://www.highpoint-tech.com | |
17 | */ | |
18 | #ifndef _HPTIOP_H_ | |
19 | #define _HPTIOP_H_ | |
20 | ||
ede1e6f8 HLT |
21 | struct hpt_iopmu |
22 | { | |
23 | __le32 resrved0[4]; | |
24 | __le32 inbound_msgaddr0; | |
25 | __le32 inbound_msgaddr1; | |
26 | __le32 outbound_msgaddr0; | |
27 | __le32 outbound_msgaddr1; | |
28 | __le32 inbound_doorbell; | |
29 | __le32 inbound_intstatus; | |
30 | __le32 inbound_intmask; | |
31 | __le32 outbound_doorbell; | |
32 | __le32 outbound_intstatus; | |
33 | __le32 outbound_intmask; | |
34 | __le32 reserved1[2]; | |
35 | __le32 inbound_queue; | |
36 | __le32 outbound_queue; | |
37 | }; | |
38 | ||
39 | #define IOPMU_QUEUE_EMPTY 0xffffffff | |
40 | #define IOPMU_QUEUE_MASK_HOST_BITS 0xf0000000 | |
41 | #define IOPMU_QUEUE_ADDR_HOST_BIT 0x80000000 | |
db9b6e89 HLT |
42 | #define IOPMU_QUEUE_REQUEST_SIZE_BIT 0x40000000 |
43 | #define IOPMU_QUEUE_REQUEST_RESULT_BIT 0x40000000 | |
ede1e6f8 HLT |
44 | |
45 | #define IOPMU_OUTBOUND_INT_MSG0 1 | |
46 | #define IOPMU_OUTBOUND_INT_MSG1 2 | |
47 | #define IOPMU_OUTBOUND_INT_DOORBELL 4 | |
48 | #define IOPMU_OUTBOUND_INT_POSTQUEUE 8 | |
49 | #define IOPMU_OUTBOUND_INT_PCI 0x10 | |
50 | ||
51 | #define IOPMU_INBOUND_INT_MSG0 1 | |
52 | #define IOPMU_INBOUND_INT_MSG1 2 | |
53 | #define IOPMU_INBOUND_INT_DOORBELL 4 | |
54 | #define IOPMU_INBOUND_INT_ERROR 8 | |
55 | #define IOPMU_INBOUND_INT_POSTQUEUE 0x10 | |
56 | ||
57 | enum hpt_iopmu_message { | |
58 | /* host-to-iop messages */ | |
59 | IOPMU_INBOUND_MSG0_NOP = 0, | |
60 | IOPMU_INBOUND_MSG0_RESET, | |
61 | IOPMU_INBOUND_MSG0_FLUSH, | |
62 | IOPMU_INBOUND_MSG0_SHUTDOWN, | |
63 | IOPMU_INBOUND_MSG0_STOP_BACKGROUND_TASK, | |
64 | IOPMU_INBOUND_MSG0_START_BACKGROUND_TASK, | |
65 | IOPMU_INBOUND_MSG0_MAX = 0xff, | |
66 | /* iop-to-host messages */ | |
67 | IOPMU_OUTBOUND_MSG0_REGISTER_DEVICE_0 = 0x100, | |
68 | IOPMU_OUTBOUND_MSG0_REGISTER_DEVICE_MAX = 0x1ff, | |
69 | IOPMU_OUTBOUND_MSG0_UNREGISTER_DEVICE_0 = 0x200, | |
70 | IOPMU_OUTBOUND_MSG0_UNREGISTER_DEVICE_MAX = 0x2ff, | |
71 | IOPMU_OUTBOUND_MSG0_REVALIDATE_DEVICE_0 = 0x300, | |
72 | IOPMU_OUTBOUND_MSG0_REVALIDATE_DEVICE_MAX = 0x3ff, | |
73 | }; | |
74 | ||
75 | struct hpt_iop_request_header | |
76 | { | |
77 | __le32 size; | |
78 | __le32 type; | |
79 | __le32 flags; | |
80 | __le32 result; | |
81 | __le32 context; /* host context */ | |
82 | __le32 context_hi32; | |
83 | }; | |
84 | ||
85 | #define IOP_REQUEST_FLAG_SYNC_REQUEST 1 | |
86 | #define IOP_REQUEST_FLAG_BIST_REQUEST 2 | |
87 | #define IOP_REQUEST_FLAG_REMAPPED 4 | |
88 | #define IOP_REQUEST_FLAG_OUTPUT_CONTEXT 8 | |
89 | ||
90 | enum hpt_iop_request_type { | |
91 | IOP_REQUEST_TYPE_GET_CONFIG = 0, | |
92 | IOP_REQUEST_TYPE_SET_CONFIG, | |
93 | IOP_REQUEST_TYPE_BLOCK_COMMAND, | |
94 | IOP_REQUEST_TYPE_SCSI_COMMAND, | |
95 | IOP_REQUEST_TYPE_IOCTL_COMMAND, | |
96 | IOP_REQUEST_TYPE_MAX | |
97 | }; | |
98 | ||
99 | enum hpt_iop_result_type { | |
100 | IOP_RESULT_PENDING = 0, | |
101 | IOP_RESULT_SUCCESS, | |
102 | IOP_RESULT_FAIL, | |
103 | IOP_RESULT_BUSY, | |
104 | IOP_RESULT_RESET, | |
105 | IOP_RESULT_INVALID_REQUEST, | |
106 | IOP_RESULT_BAD_TARGET, | |
107 | IOP_RESULT_MODE_SENSE_CHECK_CONDITION, | |
108 | }; | |
109 | ||
110 | struct hpt_iop_request_get_config | |
111 | { | |
112 | struct hpt_iop_request_header header; | |
113 | __le32 interface_version; | |
114 | __le32 firmware_version; | |
115 | __le32 max_requests; | |
116 | __le32 request_size; | |
117 | __le32 max_sg_count; | |
118 | __le32 data_transfer_length; | |
119 | __le32 alignment_mask; | |
120 | __le32 max_devices; | |
121 | __le32 sdram_size; | |
122 | }; | |
123 | ||
124 | struct hpt_iop_request_set_config | |
125 | { | |
126 | struct hpt_iop_request_header header; | |
127 | __le32 iop_id; | |
db9b6e89 HLT |
128 | __le16 vbus_id; |
129 | __le16 max_host_request_size; | |
ede1e6f8 HLT |
130 | __le32 reserve[6]; |
131 | }; | |
132 | ||
133 | struct hpt_iopsg | |
134 | { | |
135 | __le32 size; | |
136 | __le32 eot; /* non-zero: end of table */ | |
137 | __le64 pci_address; | |
138 | }; | |
139 | ||
140 | struct hpt_iop_request_block_command | |
141 | { | |
142 | struct hpt_iop_request_header header; | |
143 | u8 channel; | |
144 | u8 target; | |
145 | u8 lun; | |
146 | u8 pad1; | |
147 | __le16 command; /* IOP_BLOCK_COMMAND_{READ,WRITE} */ | |
148 | __le16 sectors; | |
149 | __le64 lba; | |
150 | struct hpt_iopsg sg_list[1]; | |
151 | }; | |
152 | ||
153 | #define IOP_BLOCK_COMMAND_READ 1 | |
154 | #define IOP_BLOCK_COMMAND_WRITE 2 | |
155 | #define IOP_BLOCK_COMMAND_VERIFY 3 | |
156 | #define IOP_BLOCK_COMMAND_FLUSH 4 | |
157 | #define IOP_BLOCK_COMMAND_SHUTDOWN 5 | |
158 | ||
159 | struct hpt_iop_request_scsi_command | |
160 | { | |
161 | struct hpt_iop_request_header header; | |
162 | u8 channel; | |
163 | u8 target; | |
164 | u8 lun; | |
165 | u8 pad1; | |
166 | u8 cdb[16]; | |
167 | __le32 dataxfer_length; | |
168 | struct hpt_iopsg sg_list[1]; | |
169 | }; | |
170 | ||
171 | struct hpt_iop_request_ioctl_command | |
172 | { | |
173 | struct hpt_iop_request_header header; | |
174 | __le32 ioctl_code; | |
175 | __le32 inbuf_size; | |
176 | __le32 outbuf_size; | |
177 | __le32 bytes_returned; | |
178 | u8 buf[1]; | |
179 | /* out data should be put at buf[(inbuf_size+3)&~3] */ | |
180 | }; | |
181 | ||
182 | #define HPTIOP_MAX_REQUESTS 256u | |
183 | ||
184 | struct hptiop_request { | |
185 | struct hptiop_request * next; | |
186 | void * req_virt; | |
187 | u32 req_shifted_phy; | |
188 | struct scsi_cmnd * scp; | |
189 | int index; | |
190 | }; | |
191 | ||
192 | struct hpt_scsi_pointer { | |
193 | int mapped; | |
194 | int sgcnt; | |
195 | dma_addr_t dma_handle; | |
196 | }; | |
197 | ||
198 | #define HPT_SCP(scp) ((struct hpt_scsi_pointer *)&(scp)->SCp) | |
199 | ||
200 | struct hptiop_hba { | |
201 | struct hpt_iopmu __iomem * iop; | |
202 | struct Scsi_Host * host; | |
203 | struct pci_dev * pcidev; | |
204 | ||
ede1e6f8 | 205 | /* IOP config info */ |
db9b6e89 | 206 | u32 interface_version; |
ede1e6f8 HLT |
207 | u32 firmware_version; |
208 | u32 sdram_size; | |
209 | u32 max_devices; | |
210 | u32 max_requests; | |
211 | u32 max_request_size; | |
212 | u32 max_sg_descriptors; | |
213 | ||
214 | u32 req_size; /* host-allocated request buffer size */ | |
db9b6e89 HLT |
215 | |
216 | int iopintf_v2: 1; | |
217 | int initialized: 1; | |
218 | int msg_done: 1; | |
ede1e6f8 HLT |
219 | |
220 | struct hptiop_request * req_list; | |
221 | struct hptiop_request reqs[HPTIOP_MAX_REQUESTS]; | |
222 | ||
223 | /* used to free allocated dma area */ | |
224 | void * dma_coherent; | |
225 | dma_addr_t dma_coherent_handle; | |
226 | ||
227 | atomic_t reset_count; | |
228 | atomic_t resetting; | |
229 | ||
230 | wait_queue_head_t reset_wq; | |
231 | wait_queue_head_t ioctl_wq; | |
232 | }; | |
233 | ||
234 | struct hpt_ioctl_k | |
235 | { | |
236 | struct hptiop_hba * hba; | |
237 | u32 ioctl_code; | |
238 | u32 inbuf_size; | |
239 | u32 outbuf_size; | |
240 | void * inbuf; | |
241 | void * outbuf; | |
242 | u32 * bytes_returned; | |
243 | void (*done)(struct hpt_ioctl_k *); | |
244 | int result; /* HPT_IOCTL_RESULT_ */ | |
245 | }; | |
246 | ||
247 | #define HPT_IOCTL_RESULT_OK 0 | |
248 | #define HPT_IOCTL_RESULT_FAILED (-1) | |
249 | ||
250 | #if 0 | |
251 | #define dprintk(fmt, args...) do { printk(fmt, ##args); } while(0) | |
252 | #else | |
253 | #define dprintk(fmt, args...) | |
254 | #endif | |
255 | ||
256 | #endif |