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da0436e9 JS |
1 | /******************************************************************* |
2 | * This file is part of the Emulex Linux Device Driver for * | |
3 | * Fibre Channel Host Bus Adapters. * | |
792581de | 4 | * Copyright (C) 2009-2011 Emulex. All rights reserved. * |
da0436e9 JS |
5 | * EMULEX and SLI are trademarks of Emulex. * |
6 | * www.emulex.com * | |
7 | * * | |
8 | * This program is free software; you can redistribute it and/or * | |
9 | * modify it under the terms of version 2 of the GNU General * | |
10 | * Public License as published by the Free Software Foundation. * | |
11 | * This program is distributed in the hope that it will be useful. * | |
12 | * ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND * | |
13 | * WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, * | |
14 | * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE * | |
15 | * DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD * | |
16 | * TO BE LEGALLY INVALID. See the GNU General Public License for * | |
17 | * more details, a copy of which can be found in the file COPYING * | |
18 | * included with this package. * | |
19 | *******************************************************************/ | |
20 | ||
21 | #define LPFC_ACTIVE_MBOX_WAIT_CNT 100 | |
5af5eee7 JS |
22 | #define LPFC_XRI_EXCH_BUSY_WAIT_TMO 10000 |
23 | #define LPFC_XRI_EXCH_BUSY_WAIT_T1 10 | |
24 | #define LPFC_XRI_EXCH_BUSY_WAIT_T2 30000 | |
da0436e9 | 25 | #define LPFC_RELEASE_NOTIFICATION_INTERVAL 32 |
da0436e9 | 26 | #define LPFC_RPI_LOW_WATER_MARK 10 |
ecfd03c6 | 27 | |
a93ff37a JS |
28 | #define LPFC_UNREG_FCF 1 |
29 | #define LPFC_SKIP_UNREG_FCF 0 | |
30 | ||
ecfd03c6 JS |
31 | /* Amount of time in seconds for waiting FCF rediscovery to complete */ |
32 | #define LPFC_FCF_REDISCOVER_WAIT_TMO 2000 /* msec */ | |
33 | ||
da0436e9 JS |
34 | /* Number of SGL entries can be posted in a 4KB nonembedded mbox command */ |
35 | #define LPFC_NEMBED_MBOX_SGL_CNT 254 | |
36 | ||
37 | /* Multi-queue arrangement for fast-path FCP work queues */ | |
38 | #define LPFC_FN_EQN_MAX 8 | |
39 | #define LPFC_SP_EQN_DEF 1 | |
def9c7a9 | 40 | #define LPFC_FP_EQN_DEF 4 |
da0436e9 JS |
41 | #define LPFC_FP_EQN_MIN 1 |
42 | #define LPFC_FP_EQN_MAX (LPFC_FN_EQN_MAX - LPFC_SP_EQN_DEF) | |
43 | ||
44 | #define LPFC_FN_WQN_MAX 32 | |
45 | #define LPFC_SP_WQN_DEF 1 | |
46 | #define LPFC_FP_WQN_DEF 4 | |
47 | #define LPFC_FP_WQN_MIN 1 | |
48 | #define LPFC_FP_WQN_MAX (LPFC_FN_WQN_MAX - LPFC_SP_WQN_DEF) | |
49 | ||
50 | /* | |
51 | * Provide the default FCF Record attributes used by the driver | |
52 | * when nonFIP mode is configured and there is no other default | |
53 | * FCF Record attributes. | |
54 | */ | |
55 | #define LPFC_FCOE_FCF_DEF_INDEX 0 | |
56 | #define LPFC_FCOE_FCF_GET_FIRST 0xFFFF | |
57 | #define LPFC_FCOE_FCF_NEXT_NONE 0xFFFF | |
58 | ||
dbb6b3ab JS |
59 | #define LPFC_FCOE_NULL_VID 0xFFF |
60 | #define LPFC_FCOE_IGNORE_VID 0xFFFF | |
61 | ||
da0436e9 JS |
62 | /* First 3 bytes of default FCF MAC is specified by FC_MAP */ |
63 | #define LPFC_FCOE_FCF_MAC3 0xFF | |
64 | #define LPFC_FCOE_FCF_MAC4 0xFF | |
65 | #define LPFC_FCOE_FCF_MAC5 0xFE | |
66 | #define LPFC_FCOE_FCF_MAP0 0x0E | |
67 | #define LPFC_FCOE_FCF_MAP1 0xFC | |
68 | #define LPFC_FCOE_FCF_MAP2 0x00 | |
98fc5dd9 | 69 | #define LPFC_FCOE_MAX_RCV_SIZE 0x800 |
da0436e9 JS |
70 | #define LPFC_FCOE_FKA_ADV_PER 0 |
71 | #define LPFC_FCOE_FIP_PRIORITY 0x80 | |
72 | ||
6669f9bb JS |
73 | #define sli4_sid_from_fc_hdr(fc_hdr) \ |
74 | ((fc_hdr)->fh_s_id[0] << 16 | \ | |
75 | (fc_hdr)->fh_s_id[1] << 8 | \ | |
76 | (fc_hdr)->fh_s_id[2]) | |
77 | ||
5ffc266e JS |
78 | #define sli4_fctl_from_fc_hdr(fc_hdr) \ |
79 | ((fc_hdr)->fh_f_ctl[0] << 16 | \ | |
80 | (fc_hdr)->fh_f_ctl[1] << 8 | \ | |
81 | (fc_hdr)->fh_f_ctl[2]) | |
82 | ||
88a2cfbb JS |
83 | #define LPFC_FW_RESET_MAXIMUM_WAIT_10MS_CNT 12000 |
84 | ||
da0436e9 JS |
85 | enum lpfc_sli4_queue_type { |
86 | LPFC_EQ, | |
87 | LPFC_GCQ, | |
88 | LPFC_MCQ, | |
89 | LPFC_WCQ, | |
90 | LPFC_RCQ, | |
91 | LPFC_MQ, | |
92 | LPFC_WQ, | |
93 | LPFC_HRQ, | |
94 | LPFC_DRQ | |
95 | }; | |
96 | ||
97 | /* The queue sub-type defines the functional purpose of the queue */ | |
98 | enum lpfc_sli4_queue_subtype { | |
99 | LPFC_NONE, | |
100 | LPFC_MBOX, | |
101 | LPFC_FCP, | |
102 | LPFC_ELS, | |
103 | LPFC_USOL | |
104 | }; | |
105 | ||
106 | union sli4_qe { | |
107 | void *address; | |
108 | struct lpfc_eqe *eqe; | |
109 | struct lpfc_cqe *cqe; | |
110 | struct lpfc_mcqe *mcqe; | |
111 | struct lpfc_wcqe_complete *wcqe_complete; | |
112 | struct lpfc_wcqe_release *wcqe_release; | |
113 | struct sli4_wcqe_xri_aborted *wcqe_xri_aborted; | |
114 | struct lpfc_rcqe_complete *rcqe_complete; | |
115 | struct lpfc_mqe *mqe; | |
116 | union lpfc_wqe *wqe; | |
117 | struct lpfc_rqe *rqe; | |
118 | }; | |
119 | ||
120 | struct lpfc_queue { | |
121 | struct list_head list; | |
122 | enum lpfc_sli4_queue_type type; | |
123 | enum lpfc_sli4_queue_subtype subtype; | |
124 | struct lpfc_hba *phba; | |
125 | struct list_head child_list; | |
126 | uint32_t entry_count; /* Number of entries to support on the queue */ | |
127 | uint32_t entry_size; /* Size of each queue entry. */ | |
73d91e50 JS |
128 | uint32_t entry_repost; /* Count of entries before doorbell is rung */ |
129 | #define LPFC_QUEUE_MIN_REPOST 8 | |
da0436e9 | 130 | uint32_t queue_id; /* Queue ID assigned by the hardware */ |
2a622bfb | 131 | uint32_t assoc_qid; /* Queue ID associated with, for CQ/WQ/MQ */ |
da0436e9 JS |
132 | struct list_head page_list; |
133 | uint32_t page_count; /* Number of pages allocated for this queue */ | |
da0436e9 JS |
134 | uint32_t host_index; /* The host's index for putting or getting */ |
135 | uint32_t hba_index; /* The last known hba index for get or put */ | |
136 | union sli4_qe qe[1]; /* array to index entries (must be last) */ | |
137 | }; | |
138 | ||
da0436e9 JS |
139 | struct lpfc_sli4_link { |
140 | uint8_t speed; | |
141 | uint8_t duplex; | |
142 | uint8_t status; | |
70f3c073 JS |
143 | uint8_t type; |
144 | uint8_t number; | |
da0436e9 | 145 | uint8_t fault; |
65467b6b | 146 | uint16_t logical_speed; |
70f3c073 | 147 | uint16_t topology; |
da0436e9 JS |
148 | }; |
149 | ||
ecfd03c6 JS |
150 | struct lpfc_fcf_rec { |
151 | uint8_t fabric_name[8]; | |
152 | uint8_t switch_name[8]; | |
da0436e9 JS |
153 | uint8_t mac_addr[6]; |
154 | uint16_t fcf_indx; | |
ecfd03c6 JS |
155 | uint32_t priority; |
156 | uint16_t vlan_id; | |
157 | uint32_t addr_mode; | |
158 | uint32_t flag; | |
159 | #define BOOT_ENABLE 0x01 | |
160 | #define RECORD_VALID 0x02 | |
161 | }; | |
162 | ||
7d791df7 JS |
163 | struct lpfc_fcf_pri_rec { |
164 | uint16_t fcf_index; | |
165 | #define LPFC_FCF_ON_PRI_LIST 0x0001 | |
166 | #define LPFC_FCF_FLOGI_FAILED 0x0002 | |
167 | uint16_t flag; | |
168 | uint32_t priority; | |
169 | }; | |
170 | ||
171 | struct lpfc_fcf_pri { | |
172 | struct list_head list; | |
173 | struct lpfc_fcf_pri_rec fcf_rec; | |
174 | }; | |
175 | ||
176 | /* | |
177 | * Maximum FCF table index, it is for driver internal book keeping, it | |
178 | * just needs to be no less than the supported HBA's FCF table size. | |
179 | */ | |
180 | #define LPFC_SLI4_FCF_TBL_INDX_MAX 32 | |
181 | ||
ecfd03c6 | 182 | struct lpfc_fcf { |
da0436e9 JS |
183 | uint16_t fcfi; |
184 | uint32_t fcf_flag; | |
185 | #define FCF_AVAILABLE 0x01 /* FCF available for discovery */ | |
186 | #define FCF_REGISTERED 0x02 /* FCF registered with FW */ | |
ecfd03c6 JS |
187 | #define FCF_SCAN_DONE 0x04 /* FCF table scan done */ |
188 | #define FCF_IN_USE 0x08 /* Atleast one discovery completed */ | |
0c9ab6f5 JS |
189 | #define FCF_INIT_DISC 0x10 /* Initial FCF discovery */ |
190 | #define FCF_DEAD_DISC 0x20 /* FCF DEAD fast FCF failover discovery */ | |
191 | #define FCF_ACVL_DISC 0x40 /* All CVL fast FCF failover discovery */ | |
192 | #define FCF_DISCOVERY (FCF_INIT_DISC | FCF_DEAD_DISC | FCF_ACVL_DISC) | |
193 | #define FCF_REDISC_PEND 0x80 /* FCF rediscovery pending */ | |
194 | #define FCF_REDISC_EVT 0x100 /* FCF rediscovery event to worker thread */ | |
195 | #define FCF_REDISC_FOV 0x200 /* Post FCF rediscovery fast failover */ | |
a93ff37a | 196 | #define FCF_REDISC_PROG (FCF_REDISC_PEND | FCF_REDISC_EVT) |
da0436e9 | 197 | uint32_t addr_mode; |
999d813f | 198 | uint32_t eligible_fcf_cnt; |
ecfd03c6 JS |
199 | struct lpfc_fcf_rec current_rec; |
200 | struct lpfc_fcf_rec failover_rec; | |
7d791df7 JS |
201 | struct list_head fcf_pri_list; |
202 | struct lpfc_fcf_pri fcf_pri[LPFC_SLI4_FCF_TBL_INDX_MAX]; | |
203 | uint32_t current_fcf_scan_pri; | |
ecfd03c6 | 204 | struct timer_list redisc_wait; |
0c9ab6f5 | 205 | unsigned long *fcf_rr_bmask; /* Eligible FCF indexes for RR failover */ |
da0436e9 JS |
206 | }; |
207 | ||
0c9ab6f5 | 208 | |
da0436e9 JS |
209 | #define LPFC_REGION23_SIGNATURE "RG23" |
210 | #define LPFC_REGION23_VERSION 1 | |
211 | #define LPFC_REGION23_LAST_REC 0xff | |
a0c87cbd JS |
212 | #define DRIVER_SPECIFIC_TYPE 0xA2 |
213 | #define LINUX_DRIVER_ID 0x20 | |
214 | #define PORT_STE_TYPE 0x1 | |
215 | ||
da0436e9 JS |
216 | struct lpfc_fip_param_hdr { |
217 | uint8_t type; | |
218 | #define FCOE_PARAM_TYPE 0xA0 | |
219 | uint8_t length; | |
220 | #define FCOE_PARAM_LENGTH 2 | |
221 | uint8_t parm_version; | |
222 | #define FIPP_VERSION 0x01 | |
223 | uint8_t parm_flags; | |
224 | #define lpfc_fip_param_hdr_fipp_mode_SHIFT 6 | |
225 | #define lpfc_fip_param_hdr_fipp_mode_MASK 0x3 | |
226 | #define lpfc_fip_param_hdr_fipp_mode_WORD parm_flags | |
6a9c52cf | 227 | #define FIPP_MODE_ON 0x1 |
da0436e9 JS |
228 | #define FIPP_MODE_OFF 0x0 |
229 | #define FIPP_VLAN_VALID 0x1 | |
230 | }; | |
231 | ||
232 | struct lpfc_fcoe_params { | |
233 | uint8_t fc_map[3]; | |
234 | uint8_t reserved1; | |
235 | uint16_t vlan_tag; | |
236 | uint8_t reserved[2]; | |
237 | }; | |
238 | ||
239 | struct lpfc_fcf_conn_hdr { | |
240 | uint8_t type; | |
241 | #define FCOE_CONN_TBL_TYPE 0xA1 | |
242 | uint8_t length; /* words */ | |
243 | uint8_t reserved[2]; | |
244 | }; | |
245 | ||
246 | struct lpfc_fcf_conn_rec { | |
247 | uint16_t flags; | |
248 | #define FCFCNCT_VALID 0x0001 | |
249 | #define FCFCNCT_BOOT 0x0002 | |
250 | #define FCFCNCT_PRIMARY 0x0004 /* if not set, Secondary */ | |
251 | #define FCFCNCT_FBNM_VALID 0x0008 | |
252 | #define FCFCNCT_SWNM_VALID 0x0010 | |
253 | #define FCFCNCT_VLAN_VALID 0x0020 | |
254 | #define FCFCNCT_AM_VALID 0x0040 | |
255 | #define FCFCNCT_AM_PREFERRED 0x0080 /* if not set, AM Required */ | |
256 | #define FCFCNCT_AM_SPMA 0x0100 /* if not set, FPMA */ | |
257 | ||
258 | uint16_t vlan_tag; | |
259 | uint8_t fabric_name[8]; | |
260 | uint8_t switch_name[8]; | |
261 | }; | |
262 | ||
263 | struct lpfc_fcf_conn_entry { | |
264 | struct list_head list; | |
265 | struct lpfc_fcf_conn_rec conn_rec; | |
266 | }; | |
267 | ||
268 | /* | |
269 | * Define the host's bootstrap mailbox. This structure contains | |
270 | * the member attributes needed to create, use, and destroy the | |
271 | * bootstrap mailbox region. | |
272 | * | |
273 | * The macro definitions for the bmbx data structure are defined | |
274 | * in lpfc_hw4.h with the register definition. | |
275 | */ | |
276 | struct lpfc_bmbx { | |
277 | struct lpfc_dmabuf *dmabuf; | |
278 | struct dma_address dma_address; | |
279 | void *avirt; | |
280 | dma_addr_t aphys; | |
281 | uint32_t bmbx_size; | |
282 | }; | |
283 | ||
284 | #define LPFC_EQE_SIZE LPFC_EQE_SIZE_4 | |
285 | ||
286 | #define LPFC_EQE_SIZE_4B 4 | |
287 | #define LPFC_EQE_SIZE_16B 16 | |
288 | #define LPFC_CQE_SIZE 16 | |
289 | #define LPFC_WQE_SIZE 64 | |
290 | #define LPFC_MQE_SIZE 256 | |
291 | #define LPFC_RQE_SIZE 8 | |
292 | ||
293 | #define LPFC_EQE_DEF_COUNT 1024 | |
294 | #define LPFC_CQE_DEF_COUNT 256 | |
f1126688 | 295 | #define LPFC_WQE_DEF_COUNT 256 |
da0436e9 JS |
296 | #define LPFC_MQE_DEF_COUNT 16 |
297 | #define LPFC_RQE_DEF_COUNT 512 | |
298 | ||
299 | #define LPFC_QUEUE_NOARM false | |
300 | #define LPFC_QUEUE_REARM true | |
301 | ||
302 | ||
303 | /* | |
304 | * SLI4 CT field defines | |
305 | */ | |
306 | #define SLI4_CT_RPI 0 | |
307 | #define SLI4_CT_VPI 1 | |
308 | #define SLI4_CT_VFI 2 | |
309 | #define SLI4_CT_FCFI 3 | |
310 | ||
28baac74 JS |
311 | #define LPFC_SLI4_FL1_MAX_SEGMENT_SIZE 0x10000 |
312 | #define LPFC_SLI4_FL1_MAX_BUF_SIZE 0X2000 | |
313 | #define LPFC_SLI4_MIN_BUF_SIZE 0x400 | |
314 | #define LPFC_SLI4_MAX_BUF_SIZE 0x20000 | |
da0436e9 JS |
315 | |
316 | /* | |
317 | * SLI4 specific data structures | |
318 | */ | |
319 | struct lpfc_max_cfg_param { | |
320 | uint16_t max_xri; | |
321 | uint16_t xri_base; | |
322 | uint16_t xri_used; | |
323 | uint16_t max_rpi; | |
324 | uint16_t rpi_base; | |
325 | uint16_t rpi_used; | |
326 | uint16_t max_vpi; | |
327 | uint16_t vpi_base; | |
328 | uint16_t vpi_used; | |
329 | uint16_t max_vfi; | |
330 | uint16_t vfi_base; | |
331 | uint16_t vfi_used; | |
332 | uint16_t max_fcfi; | |
da0436e9 JS |
333 | uint16_t fcfi_used; |
334 | uint16_t max_eq; | |
335 | uint16_t max_rq; | |
336 | uint16_t max_cq; | |
337 | uint16_t max_wq; | |
338 | }; | |
339 | ||
340 | struct lpfc_hba; | |
341 | /* SLI4 HBA multi-fcp queue handler struct */ | |
342 | struct lpfc_fcp_eq_hdl { | |
343 | uint32_t idx; | |
344 | struct lpfc_hba *phba; | |
345 | }; | |
346 | ||
28baac74 JS |
347 | /* Port Capabilities for SLI4 Parameters */ |
348 | struct lpfc_pc_sli4_params { | |
349 | uint32_t supported; | |
350 | uint32_t if_type; | |
351 | uint32_t sli_rev; | |
352 | uint32_t sli_family; | |
353 | uint32_t featurelevel_1; | |
354 | uint32_t featurelevel_2; | |
355 | uint32_t proto_types; | |
356 | #define LPFC_SLI4_PROTO_FCOE 0x0000001 | |
357 | #define LPFC_SLI4_PROTO_FC 0x0000002 | |
358 | #define LPFC_SLI4_PROTO_NIC 0x0000004 | |
359 | #define LPFC_SLI4_PROTO_ISCSI 0x0000008 | |
360 | #define LPFC_SLI4_PROTO_RDMA 0x0000010 | |
361 | uint32_t sge_supp_len; | |
362 | uint32_t if_page_sz; | |
363 | uint32_t rq_db_window; | |
364 | uint32_t loopbk_scope; | |
365 | uint32_t eq_pages_max; | |
366 | uint32_t eqe_size; | |
367 | uint32_t cq_pages_max; | |
368 | uint32_t cqe_size; | |
369 | uint32_t mq_pages_max; | |
370 | uint32_t mqe_size; | |
371 | uint32_t mq_elem_cnt; | |
372 | uint32_t wq_pages_max; | |
373 | uint32_t wqe_size; | |
374 | uint32_t rq_pages_max; | |
375 | uint32_t rqe_size; | |
376 | uint32_t hdr_pages_max; | |
377 | uint32_t hdr_size; | |
378 | uint32_t hdr_pp_align; | |
379 | uint32_t sgl_pages_max; | |
380 | uint32_t sgl_pp_align; | |
fedd3b7b JS |
381 | uint8_t cqv; |
382 | uint8_t mqv; | |
383 | uint8_t wqv; | |
384 | uint8_t rqv; | |
28baac74 JS |
385 | }; |
386 | ||
912e3acd JS |
387 | struct lpfc_iov { |
388 | uint32_t pf_number; | |
389 | uint32_t vf_number; | |
390 | }; | |
391 | ||
da0436e9 JS |
392 | /* SLI4 HBA data structure entries */ |
393 | struct lpfc_sli4_hba { | |
394 | void __iomem *conf_regs_memmap_p; /* Kernel memory mapped address for | |
395 | PCI BAR0, config space registers */ | |
396 | void __iomem *ctrl_regs_memmap_p; /* Kernel memory mapped address for | |
397 | PCI BAR1, control registers */ | |
398 | void __iomem *drbl_regs_memmap_p; /* Kernel memory mapped address for | |
399 | PCI BAR2, doorbell registers */ | |
2fcee4bf JS |
400 | union { |
401 | struct { | |
402 | /* IF Type 0, BAR 0 PCI cfg space reg mem map */ | |
403 | void __iomem *UERRLOregaddr; | |
404 | void __iomem *UERRHIregaddr; | |
405 | void __iomem *UEMASKLOregaddr; | |
406 | void __iomem *UEMASKHIregaddr; | |
407 | } if_type0; | |
408 | struct { | |
409 | /* IF Type 2, BAR 0 PCI cfg space reg mem map. */ | |
410 | void __iomem *STATUSregaddr; | |
411 | void __iomem *CTRLregaddr; | |
412 | void __iomem *ERR1regaddr; | |
413 | void __iomem *ERR2regaddr; | |
414 | } if_type2; | |
415 | } u; | |
416 | ||
417 | /* IF type 0, BAR1 and if type 2, Bar 0 CSR register memory map */ | |
418 | void __iomem *PSMPHRregaddr; | |
419 | ||
420 | /* Well-known SLI INTF register memory map. */ | |
421 | void __iomem *SLIINTFregaddr; | |
422 | ||
423 | /* IF type 0, BAR 1 function CSR register memory map */ | |
424 | void __iomem *ISRregaddr; /* HST_ISR register */ | |
425 | void __iomem *IMRregaddr; /* HST_IMR register */ | |
426 | void __iomem *ISCRregaddr; /* HST_ISCR register */ | |
427 | /* IF type 0, BAR 0 and if type 2, BAR 0 doorbell register memory map */ | |
428 | void __iomem *RQDBregaddr; /* RQ_DOORBELL register */ | |
429 | void __iomem *WQDBregaddr; /* WQ_DOORBELL register */ | |
430 | void __iomem *EQCQDBregaddr; /* EQCQ_DOORBELL register */ | |
431 | void __iomem *MQDBregaddr; /* MQ_DOORBELL register */ | |
432 | void __iomem *BMBXregaddr; /* BootStrap MBX register */ | |
da0436e9 | 433 | |
a747c9ce JS |
434 | uint32_t ue_mask_lo; |
435 | uint32_t ue_mask_hi; | |
28baac74 JS |
436 | struct lpfc_register sli_intf; |
437 | struct lpfc_pc_sli4_params pc_sli4_params; | |
da0436e9 JS |
438 | struct msix_entry *msix_entries; |
439 | uint32_t cfg_eqn; | |
75baf696 | 440 | uint32_t msix_vec_nr; |
da0436e9 JS |
441 | struct lpfc_fcp_eq_hdl *fcp_eq_hdl; /* FCP per-WQ handle */ |
442 | /* Pointers to the constructed SLI4 queues */ | |
443 | struct lpfc_queue **fp_eq; /* Fast-path event queue */ | |
444 | struct lpfc_queue *sp_eq; /* Slow-path event queue */ | |
445 | struct lpfc_queue **fcp_wq;/* Fast-path FCP work queue */ | |
446 | struct lpfc_queue *mbx_wq; /* Slow-path MBOX work queue */ | |
447 | struct lpfc_queue *els_wq; /* Slow-path ELS work queue */ | |
448 | struct lpfc_queue *hdr_rq; /* Slow-path Header Receive queue */ | |
449 | struct lpfc_queue *dat_rq; /* Slow-path Data Receive queue */ | |
450 | struct lpfc_queue **fcp_cq;/* Fast-path FCP compl queue */ | |
451 | struct lpfc_queue *mbx_cq; /* Slow-path mailbox complete queue */ | |
452 | struct lpfc_queue *els_cq; /* Slow-path ELS response complete queue */ | |
da0436e9 JS |
453 | |
454 | /* Setup information for various queue parameters */ | |
455 | int eq_esize; | |
456 | int eq_ecount; | |
457 | int cq_esize; | |
458 | int cq_ecount; | |
459 | int wq_esize; | |
460 | int wq_ecount; | |
461 | int mq_esize; | |
462 | int mq_ecount; | |
463 | int rq_esize; | |
464 | int rq_ecount; | |
465 | #define LPFC_SP_EQ_MAX_INTR_SEC 10000 | |
466 | #define LPFC_FP_EQ_MAX_INTR_SEC 10000 | |
467 | ||
468 | uint32_t intr_enable; | |
469 | struct lpfc_bmbx bmbx; | |
470 | struct lpfc_max_cfg_param max_cfg_param; | |
6d368e53 JS |
471 | uint16_t extents_in_use; /* must allocate resource extents. */ |
472 | uint16_t rpi_hdrs_in_use; /* must post rpi hdrs if set. */ | |
da0436e9 JS |
473 | uint16_t next_xri; /* last_xri - max_cfg_param.xri_base = used */ |
474 | uint16_t next_rpi; | |
475 | uint16_t scsi_xri_max; | |
476 | uint16_t scsi_xri_cnt; | |
6d368e53 | 477 | uint16_t scsi_xri_start; |
da0436e9 JS |
478 | struct list_head lpfc_free_sgl_list; |
479 | struct list_head lpfc_sgl_list; | |
480 | struct lpfc_sglq **lpfc_els_sgl_array; | |
481 | struct list_head lpfc_abts_els_sgl_list; | |
482 | struct lpfc_scsi_buf **lpfc_scsi_psb_array; | |
483 | struct list_head lpfc_abts_scsi_buf_list; | |
484 | uint32_t total_sglq_bufs; | |
485 | struct lpfc_sglq **lpfc_sglq_active_list; | |
486 | struct list_head lpfc_rpi_hdr_list; | |
487 | unsigned long *rpi_bmask; | |
6d368e53 | 488 | uint16_t *rpi_ids; |
da0436e9 | 489 | uint16_t rpi_count; |
6d368e53 JS |
490 | struct list_head lpfc_rpi_blk_list; |
491 | unsigned long *xri_bmask; | |
492 | uint16_t *xri_ids; | |
493 | uint16_t xri_count; | |
494 | struct list_head lpfc_xri_blk_list; | |
495 | unsigned long *vfi_bmask; | |
496 | uint16_t *vfi_ids; | |
497 | uint16_t vfi_count; | |
498 | struct list_head lpfc_vfi_blk_list; | |
da0436e9 | 499 | struct lpfc_sli4_flags sli4_flags; |
45ed1190 | 500 | struct list_head sp_queue_event; |
da0436e9 JS |
501 | struct list_head sp_cqe_event_pool; |
502 | struct list_head sp_asynce_work_queue; | |
503 | struct list_head sp_fcp_xri_aborted_work_queue; | |
504 | struct list_head sp_els_xri_aborted_work_queue; | |
505 | struct list_head sp_unsol_work_queue; | |
506 | struct lpfc_sli4_link link_state; | |
912e3acd | 507 | struct lpfc_iov iov; |
da0436e9 JS |
508 | spinlock_t abts_scsi_buf_list_lock; /* list of aborted SCSI IOs */ |
509 | spinlock_t abts_sgl_list_lock; /* list of aborted els IOs */ | |
510 | }; | |
511 | ||
512 | enum lpfc_sge_type { | |
513 | GEN_BUFF_TYPE, | |
514 | SCSI_BUFF_TYPE | |
515 | }; | |
516 | ||
0f65ff68 JS |
517 | enum lpfc_sgl_state { |
518 | SGL_FREED, | |
519 | SGL_ALLOCATED, | |
520 | SGL_XRI_ABORTED | |
521 | }; | |
522 | ||
da0436e9 JS |
523 | struct lpfc_sglq { |
524 | /* lpfc_sglqs are used in double linked lists */ | |
525 | struct list_head list; | |
526 | struct list_head clist; | |
527 | enum lpfc_sge_type buff_type; /* is this a scsi sgl */ | |
0f65ff68 | 528 | enum lpfc_sgl_state state; |
19ca7609 | 529 | struct lpfc_nodelist *ndlp; /* ndlp associated with IO */ |
da0436e9 | 530 | uint16_t iotag; /* pre-assigned IO tag */ |
6d368e53 | 531 | uint16_t sli4_lxritag; /* logical pre-assigned xri. */ |
da0436e9 JS |
532 | uint16_t sli4_xritag; /* pre-assigned XRI, (OXID) tag. */ |
533 | struct sli4_sge *sgl; /* pre-assigned SGL */ | |
534 | void *virt; /* virtual address. */ | |
535 | dma_addr_t phys; /* physical address */ | |
536 | }; | |
537 | ||
538 | struct lpfc_rpi_hdr { | |
539 | struct list_head list; | |
540 | uint32_t len; | |
541 | struct lpfc_dmabuf *dmabuf; | |
542 | uint32_t page_count; | |
543 | uint32_t start_rpi; | |
544 | }; | |
545 | ||
6d368e53 JS |
546 | struct lpfc_rsrc_blks { |
547 | struct list_head list; | |
548 | uint16_t rsrc_start; | |
549 | uint16_t rsrc_size; | |
550 | uint16_t rsrc_used; | |
551 | }; | |
552 | ||
da0436e9 JS |
553 | /* |
554 | * SLI4 specific function prototypes | |
555 | */ | |
556 | int lpfc_pci_function_reset(struct lpfc_hba *); | |
73d91e50 | 557 | int lpfc_sli4_pdev_status_reg_wait(struct lpfc_hba *); |
da0436e9 | 558 | int lpfc_sli4_hba_setup(struct lpfc_hba *); |
da0436e9 JS |
559 | int lpfc_sli4_config(struct lpfc_hba *, struct lpfcMboxq *, uint8_t, |
560 | uint8_t, uint32_t, bool); | |
561 | void lpfc_sli4_mbox_cmd_free(struct lpfc_hba *, struct lpfcMboxq *); | |
562 | void lpfc_sli4_mbx_sge_set(struct lpfcMboxq *, uint32_t, dma_addr_t, uint32_t); | |
563 | void lpfc_sli4_mbx_sge_get(struct lpfcMboxq *, uint32_t, | |
564 | struct lpfc_mbx_sge *); | |
0c9ab6f5 JS |
565 | int lpfc_sli4_mbx_read_fcf_rec(struct lpfc_hba *, struct lpfcMboxq *, |
566 | uint16_t); | |
da0436e9 JS |
567 | |
568 | void lpfc_sli4_hba_reset(struct lpfc_hba *); | |
569 | struct lpfc_queue *lpfc_sli4_queue_alloc(struct lpfc_hba *, uint32_t, | |
570 | uint32_t); | |
571 | void lpfc_sli4_queue_free(struct lpfc_queue *); | |
572 | uint32_t lpfc_eq_create(struct lpfc_hba *, struct lpfc_queue *, uint16_t); | |
573 | uint32_t lpfc_cq_create(struct lpfc_hba *, struct lpfc_queue *, | |
574 | struct lpfc_queue *, uint32_t, uint32_t); | |
b19a061a JS |
575 | int32_t lpfc_mq_create(struct lpfc_hba *, struct lpfc_queue *, |
576 | struct lpfc_queue *, uint32_t); | |
da0436e9 JS |
577 | uint32_t lpfc_wq_create(struct lpfc_hba *, struct lpfc_queue *, |
578 | struct lpfc_queue *, uint32_t); | |
579 | uint32_t lpfc_rq_create(struct lpfc_hba *, struct lpfc_queue *, | |
580 | struct lpfc_queue *, struct lpfc_queue *, uint32_t); | |
73d91e50 | 581 | void lpfc_rq_adjust_repost(struct lpfc_hba *, struct lpfc_queue *, int); |
da0436e9 JS |
582 | uint32_t lpfc_eq_destroy(struct lpfc_hba *, struct lpfc_queue *); |
583 | uint32_t lpfc_cq_destroy(struct lpfc_hba *, struct lpfc_queue *); | |
584 | uint32_t lpfc_mq_destroy(struct lpfc_hba *, struct lpfc_queue *); | |
585 | uint32_t lpfc_wq_destroy(struct lpfc_hba *, struct lpfc_queue *); | |
586 | uint32_t lpfc_rq_destroy(struct lpfc_hba *, struct lpfc_queue *, | |
587 | struct lpfc_queue *); | |
588 | int lpfc_sli4_queue_setup(struct lpfc_hba *); | |
589 | void lpfc_sli4_queue_unset(struct lpfc_hba *); | |
590 | int lpfc_sli4_post_sgl(struct lpfc_hba *, dma_addr_t, dma_addr_t, uint16_t); | |
591 | int lpfc_sli4_repost_scsi_sgl_list(struct lpfc_hba *); | |
da0436e9 JS |
592 | uint16_t lpfc_sli4_next_xritag(struct lpfc_hba *); |
593 | int lpfc_sli4_post_async_mbox(struct lpfc_hba *); | |
6d368e53 JS |
594 | int lpfc_sli4_post_els_sgl_list(struct lpfc_hba *phba); |
595 | int lpfc_sli4_post_els_sgl_list_ext(struct lpfc_hba *phba); | |
da0436e9 | 596 | int lpfc_sli4_post_scsi_sgl_block(struct lpfc_hba *, struct list_head *, int); |
6d368e53 JS |
597 | int lpfc_sli4_post_scsi_sgl_blk_ext(struct lpfc_hba *, struct list_head *, |
598 | int); | |
da0436e9 JS |
599 | struct lpfc_cq_event *__lpfc_sli4_cq_event_alloc(struct lpfc_hba *); |
600 | struct lpfc_cq_event *lpfc_sli4_cq_event_alloc(struct lpfc_hba *); | |
601 | void __lpfc_sli4_cq_event_release(struct lpfc_hba *, struct lpfc_cq_event *); | |
602 | void lpfc_sli4_cq_event_release(struct lpfc_hba *, struct lpfc_cq_event *); | |
603 | int lpfc_sli4_init_rpi_hdrs(struct lpfc_hba *); | |
604 | int lpfc_sli4_post_rpi_hdr(struct lpfc_hba *, struct lpfc_rpi_hdr *); | |
605 | int lpfc_sli4_post_all_rpi_hdrs(struct lpfc_hba *); | |
606 | struct lpfc_rpi_hdr *lpfc_sli4_create_rpi_hdr(struct lpfc_hba *); | |
607 | void lpfc_sli4_remove_rpi_hdrs(struct lpfc_hba *); | |
608 | int lpfc_sli4_alloc_rpi(struct lpfc_hba *); | |
609 | void lpfc_sli4_free_rpi(struct lpfc_hba *, int); | |
610 | void lpfc_sli4_remove_rpis(struct lpfc_hba *); | |
611 | void lpfc_sli4_async_event_proc(struct lpfc_hba *); | |
ecfd03c6 | 612 | void lpfc_sli4_fcf_redisc_event_proc(struct lpfc_hba *); |
da0436e9 JS |
613 | int lpfc_sli4_resume_rpi(struct lpfc_nodelist *); |
614 | void lpfc_sli4_fcp_xri_abort_event_proc(struct lpfc_hba *); | |
615 | void lpfc_sli4_els_xri_abort_event_proc(struct lpfc_hba *); | |
616 | void lpfc_sli4_fcp_xri_aborted(struct lpfc_hba *, | |
617 | struct sli4_wcqe_xri_aborted *); | |
618 | void lpfc_sli4_els_xri_aborted(struct lpfc_hba *, | |
619 | struct sli4_wcqe_xri_aborted *); | |
1151e3ec JS |
620 | void lpfc_sli4_vport_delete_els_xri_aborted(struct lpfc_vport *); |
621 | void lpfc_sli4_vport_delete_fcp_xri_aborted(struct lpfc_vport *); | |
da0436e9 JS |
622 | int lpfc_sli4_brdreset(struct lpfc_hba *); |
623 | int lpfc_sli4_add_fcf_record(struct lpfc_hba *, struct fcf_record *); | |
624 | void lpfc_sli_remove_dflt_fcf(struct lpfc_hba *); | |
625 | int lpfc_sli4_get_els_iocb_cnt(struct lpfc_hba *); | |
76a95d75 | 626 | int lpfc_sli4_init_vpi(struct lpfc_vport *); |
da0436e9 JS |
627 | uint32_t lpfc_sli4_cq_release(struct lpfc_queue *, bool); |
628 | uint32_t lpfc_sli4_eq_release(struct lpfc_queue *, bool); | |
629 | void lpfc_sli4_fcfi_unreg(struct lpfc_hba *, uint16_t); | |
0c9ab6f5 JS |
630 | int lpfc_sli4_fcf_scan_read_fcf_rec(struct lpfc_hba *, uint16_t); |
631 | int lpfc_sli4_fcf_rr_read_fcf_rec(struct lpfc_hba *, uint16_t); | |
632 | int lpfc_sli4_read_fcf_rec(struct lpfc_hba *, uint16_t); | |
633 | void lpfc_mbx_cmpl_fcf_scan_read_fcf_rec(struct lpfc_hba *, LPFC_MBOXQ_t *); | |
634 | void lpfc_mbx_cmpl_fcf_rr_read_fcf_rec(struct lpfc_hba *, LPFC_MBOXQ_t *); | |
635 | void lpfc_mbx_cmpl_read_fcf_rec(struct lpfc_hba *, LPFC_MBOXQ_t *); | |
636 | int lpfc_sli4_unregister_fcf(struct lpfc_hba *); | |
da0436e9 JS |
637 | int lpfc_sli4_post_status_check(struct lpfc_hba *); |
638 | uint8_t lpfc_sli4_mbox_opcode_get(struct lpfc_hba *, struct lpfcMboxq *); | |
639 |