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1a59d1b8 1// SPDX-License-Identifier: GPL-2.0-or-later
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2/*
3 * pmcraid.c -- driver for PMC Sierra MaxRAID controller adapters
4 *
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5 * Written By: Anil Ravindranath<anil_ravindranath@pmc-sierra.com>
6 * PMC-Sierra Inc
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7 *
8 * Copyright (C) 2008, 2009 PMC Sierra Inc
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9 */
10#include <linux/fs.h>
11#include <linux/init.h>
12#include <linux/types.h>
13#include <linux/errno.h>
14#include <linux/kernel.h>
15#include <linux/ioport.h>
16#include <linux/delay.h>
17#include <linux/pci.h>
18#include <linux/wait.h>
19#include <linux/spinlock.h>
20#include <linux/sched.h>
21#include <linux/interrupt.h>
22#include <linux/blkdev.h>
23#include <linux/firmware.h>
24#include <linux/module.h>
25#include <linux/moduleparam.h>
26#include <linux/hdreg.h>
89a36810 27#include <linux/io.h>
5a0e3ad6 28#include <linux/slab.h>
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29#include <asm/irq.h>
30#include <asm/processor.h>
31#include <linux/libata.h>
32#include <linux/mutex.h>
9c9bd593 33#include <linux/ktime.h>
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34#include <scsi/scsi.h>
35#include <scsi/scsi_host.h>
34876402 36#include <scsi/scsi_device.h>
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37#include <scsi/scsi_tcq.h>
38#include <scsi/scsi_eh.h>
39#include <scsi/scsi_cmnd.h>
40#include <scsi/scsicam.h>
41
42#include "pmcraid.h"
43
44/*
45 * Module configuration parameters
46 */
47static unsigned int pmcraid_debug_log;
48static unsigned int pmcraid_disable_aen;
49static unsigned int pmcraid_log_level = IOASC_LOG_LEVEL_MUST;
5da61410 50static unsigned int pmcraid_enable_msix;
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51
52/*
53 * Data structures to support multiple adapters by the LLD.
54 * pmcraid_adapter_count - count of configured adapters
55 */
56static atomic_t pmcraid_adapter_count = ATOMIC_INIT(0);
57
58/*
59 * Supporting user-level control interface through IOCTL commands.
60 * pmcraid_major - major number to use
61 * pmcraid_minor - minor number(s) to use
62 */
63static unsigned int pmcraid_major;
64static struct class *pmcraid_class;
144b139c 65static DECLARE_BITMAP(pmcraid_minor, PMCRAID_MAX_ADAPTERS);
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66
67/*
68 * Module parameters
69 */
729c8456 70MODULE_AUTHOR("Anil Ravindranath<anil_ravindranath@pmc-sierra.com>");
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71MODULE_DESCRIPTION("PMC Sierra MaxRAID Controller Driver");
72MODULE_LICENSE("GPL");
73MODULE_VERSION(PMCRAID_DRIVER_VERSION);
74
75module_param_named(log_level, pmcraid_log_level, uint, (S_IRUGO | S_IWUSR));
76MODULE_PARM_DESC(log_level,
77 "Enables firmware error code logging, default :1 high-severity"
78 " errors, 2: all errors including high-severity errors,"
79 " 0: disables logging");
80
81module_param_named(debug, pmcraid_debug_log, uint, (S_IRUGO | S_IWUSR));
82MODULE_PARM_DESC(debug,
83 "Enable driver verbose message logging. Set 1 to enable."
84 "(default: 0)");
85
86module_param_named(disable_aen, pmcraid_disable_aen, uint, (S_IRUGO | S_IWUSR));
87MODULE_PARM_DESC(disable_aen,
88 "Disable driver aen notifications to apps. Set 1 to disable."
89 "(default: 0)");
90
91/* chip specific constants for PMC MaxRAID controllers (same for
92 * 0x5220 and 0x8010
93 */
94static struct pmcraid_chip_details pmcraid_chip_cfg[] = {
95 {
96 .ioastatus = 0x0,
97 .ioarrin = 0x00040,
98 .mailbox = 0x7FC30,
99 .global_intr_mask = 0x00034,
100 .ioa_host_intr = 0x0009C,
101 .ioa_host_intr_clr = 0x000A0,
c20c4267 102 .ioa_host_msix_intr = 0x7FC40,
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103 .ioa_host_mask = 0x7FC28,
104 .ioa_host_mask_clr = 0x7FC28,
105 .host_ioa_intr = 0x00020,
106 .host_ioa_intr_clr = 0x00020,
107 .transop_timeout = 300
108 }
109};
110
111/*
112 * PCI device ids supported by pmcraid driver
113 */
6f039790 114static struct pci_device_id pmcraid_pci_table[] = {
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115 { PCI_DEVICE(PCI_VENDOR_ID_PMC, PCI_DEVICE_ID_PMC_MAXRAID),
116 0, 0, (kernel_ulong_t)&pmcraid_chip_cfg[0]
117 },
118 {}
119};
120
121MODULE_DEVICE_TABLE(pci, pmcraid_pci_table);
122
123
124
125/**
126 * pmcraid_slave_alloc - Prepare for commands to a device
127 * @scsi_dev: scsi device struct
128 *
129 * This function is called by mid-layer prior to sending any command to the new
130 * device. Stores resource entry details of the device in scsi_device struct.
131 * Queuecommand uses the resource handle and other details to fill up IOARCB
132 * while sending commands to the device.
133 *
134 * Return value:
135 * 0 on success / -ENXIO if device does not exist
136 */
137static int pmcraid_slave_alloc(struct scsi_device *scsi_dev)
138{
139 struct pmcraid_resource_entry *temp, *res = NULL;
140 struct pmcraid_instance *pinstance;
141 u8 target, bus, lun;
142 unsigned long lock_flags;
143 int rc = -ENXIO;
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144 u16 fw_version;
145
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146 pinstance = shost_priv(scsi_dev->host);
147
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148 fw_version = be16_to_cpu(pinstance->inq_data->fw_version);
149
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150 /* Driver exposes VSET and GSCSI resources only; all other device types
151 * are not exposed. Resource list is synchronized using resource lock
152 * so any traversal or modifications to the list should be done inside
153 * this lock
154 */
155 spin_lock_irqsave(&pinstance->resource_lock, lock_flags);
156 list_for_each_entry(temp, &pinstance->used_res_q, queue) {
157
729c8456 158 /* do not expose VSETs with order-ids > MAX_VSET_TARGETS */
89a36810 159 if (RES_IS_VSET(temp->cfg_entry)) {
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160 if (fw_version <= PMCRAID_FW_VERSION_1)
161 target = temp->cfg_entry.unique_flags1;
162 else
45c80be6 163 target = le16_to_cpu(temp->cfg_entry.array_id) & 0xFF;
c20c4267 164
729c8456 165 if (target > PMCRAID_MAX_VSET_TARGETS)
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166 continue;
167 bus = PMCRAID_VSET_BUS_ID;
168 lun = 0;
169 } else if (RES_IS_GSCSI(temp->cfg_entry)) {
170 target = RES_TARGET(temp->cfg_entry.resource_address);
171 bus = PMCRAID_PHYS_BUS_ID;
172 lun = RES_LUN(temp->cfg_entry.resource_address);
173 } else {
174 continue;
175 }
176
177 if (bus == scsi_dev->channel &&
178 target == scsi_dev->id &&
179 lun == scsi_dev->lun) {
180 res = temp;
181 break;
182 }
183 }
184
185 if (res) {
186 res->scsi_dev = scsi_dev;
187 scsi_dev->hostdata = res;
188 res->change_detected = 0;
189 atomic_set(&res->read_failures, 0);
190 atomic_set(&res->write_failures, 0);
191 rc = 0;
192 }
193 spin_unlock_irqrestore(&pinstance->resource_lock, lock_flags);
194 return rc;
195}
196
197/**
198 * pmcraid_slave_configure - Configures a SCSI device
199 * @scsi_dev: scsi device struct
200 *
25985edc 201 * This function is executed by SCSI mid layer just after a device is first
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202 * scanned (i.e. it has responded to an INQUIRY). For VSET resources, the
203 * timeout value (default 30s) will be over-written to a higher value (60s)
204 * and max_sectors value will be over-written to 512. It also sets queue depth
205 * to host->cmd_per_lun value
206 *
207 * Return value:
208 * 0 on success
209 */
210static int pmcraid_slave_configure(struct scsi_device *scsi_dev)
211{
212 struct pmcraid_resource_entry *res = scsi_dev->hostdata;
213
214 if (!res)
215 return 0;
216
217 /* LLD exposes VSETs and Enclosure devices only */
218 if (RES_IS_GSCSI(res->cfg_entry) &&
219 scsi_dev->type != TYPE_ENCLOSURE)
220 return -ENXIO;
221
222 pmcraid_info("configuring %x:%x:%x:%x\n",
223 scsi_dev->host->unique_id,
224 scsi_dev->channel,
225 scsi_dev->id,
9cb78c16 226 (u8)scsi_dev->lun);
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227
228 if (RES_IS_GSCSI(res->cfg_entry)) {
229 scsi_dev->allow_restart = 1;
230 } else if (RES_IS_VSET(res->cfg_entry)) {
231 scsi_dev->allow_restart = 1;
232 blk_queue_rq_timeout(scsi_dev->request_queue,
233 PMCRAID_VSET_IO_TIMEOUT);
086fa5ff 234 blk_queue_max_hw_sectors(scsi_dev->request_queue,
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235 PMCRAID_VSET_MAX_SECTORS);
236 }
237
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238 /*
239 * We never want to report TCQ support for these types of devices.
240 */
241 if (!RES_IS_GSCSI(res->cfg_entry) && !RES_IS_VSET(res->cfg_entry))
242 scsi_dev->tagged_supported = 0;
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243
244 return 0;
245}
246
247/**
248 * pmcraid_slave_destroy - Unconfigure a SCSI device before removing it
249 *
250 * @scsi_dev: scsi device struct
251 *
252 * This is called by mid-layer before removing a device. Pointer assignments
253 * done in pmcraid_slave_alloc will be reset to NULL here.
254 *
255 * Return value
256 * none
257 */
258static void pmcraid_slave_destroy(struct scsi_device *scsi_dev)
259{
260 struct pmcraid_resource_entry *res;
261
262 res = (struct pmcraid_resource_entry *)scsi_dev->hostdata;
263
264 if (res)
265 res->scsi_dev = NULL;
266
267 scsi_dev->hostdata = NULL;
268}
269
270/**
271 * pmcraid_change_queue_depth - Change the device's queue depth
272 * @scsi_dev: scsi device struct
273 * @depth: depth to set
274 *
275 * Return value
c20c4267 276 * actual depth set
89a36810 277 */
db5ed4df 278static int pmcraid_change_queue_depth(struct scsi_device *scsi_dev, int depth)
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279{
280 if (depth > PMCRAID_MAX_CMD_PER_LUN)
281 depth = PMCRAID_MAX_CMD_PER_LUN;
db5ed4df 282 return scsi_change_queue_depth(scsi_dev, depth);
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283}
284
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285/**
286 * pmcraid_init_cmdblk - initializes a command block
287 *
288 * @cmd: pointer to struct pmcraid_cmd to be initialized
289 * @index: if >=0 first time initialization; otherwise reinitialization
290 *
291 * Return Value
292 * None
293 */
61b96d5b 294static void pmcraid_init_cmdblk(struct pmcraid_cmd *cmd, int index)
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295{
296 struct pmcraid_ioarcb *ioarcb = &(cmd->ioa_cb->ioarcb);
297 dma_addr_t dma_addr = cmd->ioa_cb_bus_addr;
298
299 if (index >= 0) {
300 /* first time initialization (called from probe) */
301 u32 ioasa_offset =
302 offsetof(struct pmcraid_control_block, ioasa);
303
304 cmd->index = index;
305 ioarcb->response_handle = cpu_to_le32(index << 2);
306 ioarcb->ioarcb_bus_addr = cpu_to_le64(dma_addr);
307 ioarcb->ioasa_bus_addr = cpu_to_le64(dma_addr + ioasa_offset);
308 ioarcb->ioasa_len = cpu_to_le16(sizeof(struct pmcraid_ioasa));
309 } else {
310 /* re-initialization of various lengths, called once command is
311 * processed by IOA
312 */
313 memset(&cmd->ioa_cb->ioarcb.cdb, 0, PMCRAID_MAX_CDB_LEN);
c20c4267 314 ioarcb->hrrq_id = 0;
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315 ioarcb->request_flags0 = 0;
316 ioarcb->request_flags1 = 0;
317 ioarcb->cmd_timeout = 0;
45c80be6 318 ioarcb->ioarcb_bus_addr &= cpu_to_le64(~0x1FULL);
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319 ioarcb->ioadl_bus_addr = 0;
320 ioarcb->ioadl_length = 0;
321 ioarcb->data_transfer_length = 0;
322 ioarcb->add_cmd_param_length = 0;
323 ioarcb->add_cmd_param_offset = 0;
324 cmd->ioa_cb->ioasa.ioasc = 0;
325 cmd->ioa_cb->ioasa.residual_data_length = 0;
c20c4267 326 cmd->time_left = 0;
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327 }
328
329 cmd->cmd_done = NULL;
330 cmd->scsi_cmd = NULL;
331 cmd->release = 0;
332 cmd->completion_req = 0;
144b139c 333 cmd->sense_buffer = NULL;
c20c4267 334 cmd->sense_buffer_dma = 0;
89a36810 335 cmd->dma_handle = 0;
242b5657 336 timer_setup(&cmd->timer, NULL, 0);
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337}
338
339/**
340 * pmcraid_reinit_cmdblk - reinitialize a command block
341 *
342 * @cmd: pointer to struct pmcraid_cmd to be reinitialized
343 *
344 * Return Value
345 * None
346 */
347static void pmcraid_reinit_cmdblk(struct pmcraid_cmd *cmd)
348{
349 pmcraid_init_cmdblk(cmd, -1);
350}
351
352/**
353 * pmcraid_get_free_cmd - get a free cmd block from command block pool
354 * @pinstance: adapter instance structure
355 *
356 * Return Value:
357 * returns pointer to cmd block or NULL if no blocks are available
358 */
359static struct pmcraid_cmd *pmcraid_get_free_cmd(
360 struct pmcraid_instance *pinstance
361)
362{
363 struct pmcraid_cmd *cmd = NULL;
364 unsigned long lock_flags;
365
366 /* free cmd block list is protected by free_pool_lock */
367 spin_lock_irqsave(&pinstance->free_pool_lock, lock_flags);
368
369 if (!list_empty(&pinstance->free_cmd_pool)) {
370 cmd = list_entry(pinstance->free_cmd_pool.next,
371 struct pmcraid_cmd, free_list);
372 list_del(&cmd->free_list);
373 }
374 spin_unlock_irqrestore(&pinstance->free_pool_lock, lock_flags);
375
376 /* Initialize the command block before giving it the caller */
377 if (cmd != NULL)
378 pmcraid_reinit_cmdblk(cmd);
379 return cmd;
380}
381
382/**
383 * pmcraid_return_cmd - return a completed command block back into free pool
384 * @cmd: pointer to the command block
385 *
386 * Return Value:
387 * nothing
388 */
61b96d5b 389static void pmcraid_return_cmd(struct pmcraid_cmd *cmd)
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390{
391 struct pmcraid_instance *pinstance = cmd->drv_inst;
392 unsigned long lock_flags;
393
394 spin_lock_irqsave(&pinstance->free_pool_lock, lock_flags);
395 list_add_tail(&cmd->free_list, &pinstance->free_cmd_pool);
396 spin_unlock_irqrestore(&pinstance->free_pool_lock, lock_flags);
397}
398
399/**
400 * pmcraid_read_interrupts - reads IOA interrupts
401 *
402 * @pinstance: pointer to adapter instance structure
403 *
404 * Return value
405 * interrupts read from IOA
406 */
407static u32 pmcraid_read_interrupts(struct pmcraid_instance *pinstance)
408{
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409 return (pinstance->interrupt_mode) ?
410 ioread32(pinstance->int_regs.ioa_host_msix_interrupt_reg) :
411 ioread32(pinstance->int_regs.ioa_host_interrupt_reg);
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412}
413
414/**
415 * pmcraid_disable_interrupts - Masks and clears all specified interrupts
416 *
417 * @pinstance: pointer to per adapter instance structure
418 * @intrs: interrupts to disable
419 *
420 * Return Value
421 * None
422 */
423static void pmcraid_disable_interrupts(
424 struct pmcraid_instance *pinstance,
425 u32 intrs
426)
427{
428 u32 gmask = ioread32(pinstance->int_regs.global_interrupt_mask_reg);
429 u32 nmask = gmask | GLOBAL_INTERRUPT_MASK;
430
89a36810 431 iowrite32(intrs, pinstance->int_regs.ioa_host_interrupt_clr_reg);
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432 iowrite32(nmask, pinstance->int_regs.global_interrupt_mask_reg);
433 ioread32(pinstance->int_regs.global_interrupt_mask_reg);
434
435 if (!pinstance->interrupt_mode) {
436 iowrite32(intrs,
437 pinstance->int_regs.ioa_host_interrupt_mask_reg);
438 ioread32(pinstance->int_regs.ioa_host_interrupt_mask_reg);
439 }
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440}
441
442/**
443 * pmcraid_enable_interrupts - Enables specified interrupts
444 *
445 * @pinstance: pointer to per adapter instance structure
446 * @intr: interrupts to enable
447 *
448 * Return Value
449 * None
450 */
451static void pmcraid_enable_interrupts(
452 struct pmcraid_instance *pinstance,
453 u32 intrs
454)
455{
456 u32 gmask = ioread32(pinstance->int_regs.global_interrupt_mask_reg);
457 u32 nmask = gmask & (~GLOBAL_INTERRUPT_MASK);
458
459 iowrite32(nmask, pinstance->int_regs.global_interrupt_mask_reg);
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460
461 if (!pinstance->interrupt_mode) {
462 iowrite32(~intrs,
463 pinstance->int_regs.ioa_host_interrupt_mask_reg);
464 ioread32(pinstance->int_regs.ioa_host_interrupt_mask_reg);
465 }
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466
467 pmcraid_info("enabled interrupts global mask = %x intr_mask = %x\n",
468 ioread32(pinstance->int_regs.global_interrupt_mask_reg),
469 ioread32(pinstance->int_regs.ioa_host_interrupt_mask_reg));
470}
471
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472/**
473 * pmcraid_clr_trans_op - clear trans to op interrupt
474 *
475 * @pinstance: pointer to per adapter instance structure
476 *
477 * Return Value
478 * None
479 */
480static void pmcraid_clr_trans_op(
481 struct pmcraid_instance *pinstance
482)
483{
484 unsigned long lock_flags;
485
486 if (!pinstance->interrupt_mode) {
487 iowrite32(INTRS_TRANSITION_TO_OPERATIONAL,
488 pinstance->int_regs.ioa_host_interrupt_mask_reg);
489 ioread32(pinstance->int_regs.ioa_host_interrupt_mask_reg);
490 iowrite32(INTRS_TRANSITION_TO_OPERATIONAL,
491 pinstance->int_regs.ioa_host_interrupt_clr_reg);
492 ioread32(pinstance->int_regs.ioa_host_interrupt_clr_reg);
493 }
494
495 if (pinstance->reset_cmd != NULL) {
496 del_timer(&pinstance->reset_cmd->timer);
497 spin_lock_irqsave(
498 pinstance->host->host_lock, lock_flags);
499 pinstance->reset_cmd->cmd_done(pinstance->reset_cmd);
500 spin_unlock_irqrestore(
501 pinstance->host->host_lock, lock_flags);
502 }
503}
504
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505/**
506 * pmcraid_reset_type - Determine the required reset type
507 * @pinstance: pointer to adapter instance structure
508 *
509 * IOA requires hard reset if any of the following conditions is true.
510 * 1. If HRRQ valid interrupt is not masked
511 * 2. IOA reset alert doorbell is set
512 * 3. If there are any error interrupts
513 */
514static void pmcraid_reset_type(struct pmcraid_instance *pinstance)
515{
516 u32 mask;
517 u32 intrs;
518 u32 alerts;
519
520 mask = ioread32(pinstance->int_regs.ioa_host_interrupt_mask_reg);
521 intrs = ioread32(pinstance->int_regs.ioa_host_interrupt_reg);
522 alerts = ioread32(pinstance->int_regs.host_ioa_interrupt_reg);
523
524 if ((mask & INTRS_HRRQ_VALID) == 0 ||
525 (alerts & DOORBELL_IOA_RESET_ALERT) ||
526 (intrs & PMCRAID_ERROR_INTERRUPTS)) {
527 pmcraid_info("IOA requires hard reset\n");
528 pinstance->ioa_hard_reset = 1;
529 }
530
531 /* If unit check is active, trigger the dump */
532 if (intrs & INTRS_IOA_UNIT_CHECK)
533 pinstance->ioa_unit_check = 1;
534}
535
536/**
537 * pmcraid_bist_done - completion function for PCI BIST
538 * @cmd: pointer to reset command
539 * Return Value
c20c4267 540 * none
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541 */
542
543static void pmcraid_ioa_reset(struct pmcraid_cmd *);
544
242b5657 545static void pmcraid_bist_done(struct timer_list *t)
89a36810 546{
242b5657 547 struct pmcraid_cmd *cmd = from_timer(cmd, t, timer);
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548 struct pmcraid_instance *pinstance = cmd->drv_inst;
549 unsigned long lock_flags;
550 int rc;
551 u16 pci_reg;
552
553 rc = pci_read_config_word(pinstance->pdev, PCI_COMMAND, &pci_reg);
554
555 /* If PCI config space can't be accessed wait for another two secs */
556 if ((rc != PCIBIOS_SUCCESSFUL || (!(pci_reg & PCI_COMMAND_MEMORY))) &&
c20c4267 557 cmd->time_left > 0) {
89a36810 558 pmcraid_info("BIST not complete, waiting another 2 secs\n");
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559 cmd->timer.expires = jiffies + cmd->time_left;
560 cmd->time_left = 0;
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561 add_timer(&cmd->timer);
562 } else {
c20c4267 563 cmd->time_left = 0;
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564 pmcraid_info("BIST is complete, proceeding with reset\n");
565 spin_lock_irqsave(pinstance->host->host_lock, lock_flags);
566 pmcraid_ioa_reset(cmd);
567 spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
568 }
569}
570
571/**
572 * pmcraid_start_bist - starts BIST
573 * @cmd: pointer to reset cmd
574 * Return Value
575 * none
576 */
577static void pmcraid_start_bist(struct pmcraid_cmd *cmd)
578{
579 struct pmcraid_instance *pinstance = cmd->drv_inst;
580 u32 doorbells, intrs;
581
582 /* proceed with bist and wait for 2 seconds */
583 iowrite32(DOORBELL_IOA_START_BIST,
584 pinstance->int_regs.host_ioa_interrupt_reg);
585 doorbells = ioread32(pinstance->int_regs.host_ioa_interrupt_reg);
586 intrs = ioread32(pinstance->int_regs.ioa_host_interrupt_reg);
c20c4267 587 pmcraid_info("doorbells after start bist: %x intrs: %x\n",
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588 doorbells, intrs);
589
c20c4267 590 cmd->time_left = msecs_to_jiffies(PMCRAID_BIST_TIMEOUT);
89a36810 591 cmd->timer.expires = jiffies + msecs_to_jiffies(PMCRAID_BIST_TIMEOUT);
841b86f3 592 cmd->timer.function = pmcraid_bist_done;
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593 add_timer(&cmd->timer);
594}
595
596/**
597 * pmcraid_reset_alert_done - completion routine for reset_alert
598 * @cmd: pointer to command block used in reset sequence
599 * Return value
600 * None
601 */
242b5657 602static void pmcraid_reset_alert_done(struct timer_list *t)
89a36810 603{
242b5657 604 struct pmcraid_cmd *cmd = from_timer(cmd, t, timer);
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605 struct pmcraid_instance *pinstance = cmd->drv_inst;
606 u32 status = ioread32(pinstance->ioa_status);
607 unsigned long lock_flags;
608
609 /* if the critical operation in progress bit is set or the wait times
610 * out, invoke reset engine to proceed with hard reset. If there is
611 * some more time to wait, restart the timer
612 */
613 if (((status & INTRS_CRITICAL_OP_IN_PROGRESS) == 0) ||
c20c4267 614 cmd->time_left <= 0) {
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615 pmcraid_info("critical op is reset proceeding with reset\n");
616 spin_lock_irqsave(pinstance->host->host_lock, lock_flags);
617 pmcraid_ioa_reset(cmd);
618 spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
619 } else {
620 pmcraid_info("critical op is not yet reset waiting again\n");
621 /* restart timer if some more time is available to wait */
c20c4267 622 cmd->time_left -= PMCRAID_CHECK_FOR_RESET_TIMEOUT;
89a36810 623 cmd->timer.expires = jiffies + PMCRAID_CHECK_FOR_RESET_TIMEOUT;
841b86f3 624 cmd->timer.function = pmcraid_reset_alert_done;
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625 add_timer(&cmd->timer);
626 }
627}
628
629/**
630 * pmcraid_reset_alert - alerts IOA for a possible reset
631 * @cmd : command block to be used for reset sequence.
632 *
633 * Return Value
634 * returns 0 if pci config-space is accessible and RESET_DOORBELL is
635 * successfully written to IOA. Returns non-zero in case pci_config_space
636 * is not accessible
637 */
c20c4267 638static void pmcraid_notify_ioastate(struct pmcraid_instance *, u32);
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639static void pmcraid_reset_alert(struct pmcraid_cmd *cmd)
640{
641 struct pmcraid_instance *pinstance = cmd->drv_inst;
642 u32 doorbells;
643 int rc;
644 u16 pci_reg;
645
646 /* If we are able to access IOA PCI config space, alert IOA that we are
647 * going to reset it soon. This enables IOA to preserv persistent error
648 * data if any. In case memory space is not accessible, proceed with
649 * BIST or slot_reset
650 */
651 rc = pci_read_config_word(pinstance->pdev, PCI_COMMAND, &pci_reg);
652 if ((rc == PCIBIOS_SUCCESSFUL) && (pci_reg & PCI_COMMAND_MEMORY)) {
653
654 /* wait for IOA permission i.e until CRITICAL_OPERATION bit is
655 * reset IOA doesn't generate any interrupts when CRITICAL
656 * OPERATION bit is reset. A timer is started to wait for this
657 * bit to be reset.
658 */
c20c4267 659 cmd->time_left = PMCRAID_RESET_TIMEOUT;
89a36810 660 cmd->timer.expires = jiffies + PMCRAID_CHECK_FOR_RESET_TIMEOUT;
841b86f3 661 cmd->timer.function = pmcraid_reset_alert_done;
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662 add_timer(&cmd->timer);
663
664 iowrite32(DOORBELL_IOA_RESET_ALERT,
665 pinstance->int_regs.host_ioa_interrupt_reg);
666 doorbells =
667 ioread32(pinstance->int_regs.host_ioa_interrupt_reg);
668 pmcraid_info("doorbells after reset alert: %x\n", doorbells);
669 } else {
670 pmcraid_info("PCI config is not accessible starting BIST\n");
671 pinstance->ioa_state = IOA_STATE_IN_HARD_RESET;
672 pmcraid_start_bist(cmd);
673 }
674}
675
676/**
677 * pmcraid_timeout_handler - Timeout handler for internally generated ops
678 *
679 * @cmd : pointer to command structure, that got timedout
680 *
681 * This function blocks host requests and initiates an adapter reset.
682 *
683 * Return value:
684 * None
685 */
242b5657 686static void pmcraid_timeout_handler(struct timer_list *t)
89a36810 687{
242b5657 688 struct pmcraid_cmd *cmd = from_timer(cmd, t, timer);
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689 struct pmcraid_instance *pinstance = cmd->drv_inst;
690 unsigned long lock_flags;
691
34876402 692 dev_info(&pinstance->pdev->dev,
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693 "Adapter being reset due to cmd(CDB[0] = %x) timeout\n",
694 cmd->ioa_cb->ioarcb.cdb[0]);
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695
696 /* Command timeouts result in hard reset sequence. The command that got
697 * timed out may be the one used as part of reset sequence. In this
698 * case restart reset sequence using the same command block even if
699 * reset is in progress. Otherwise fail this command and get a free
700 * command block to restart the reset sequence.
701 */
702 spin_lock_irqsave(pinstance->host->host_lock, lock_flags);
703 if (!pinstance->ioa_reset_in_progress) {
704 pinstance->ioa_reset_attempts = 0;
705 cmd = pmcraid_get_free_cmd(pinstance);
706
707 /* If we are out of command blocks, just return here itself.
708 * Some other command's timeout handler can do the reset job
709 */
710 if (cmd == NULL) {
711 spin_unlock_irqrestore(pinstance->host->host_lock,
712 lock_flags);
713 pmcraid_err("no free cmnd block for timeout handler\n");
714 return;
715 }
716
717 pinstance->reset_cmd = cmd;
718 pinstance->ioa_reset_in_progress = 1;
719 } else {
720 pmcraid_info("reset is already in progress\n");
721
722 if (pinstance->reset_cmd != cmd) {
723 /* This command should have been given to IOA, this
724 * command will be completed by fail_outstanding_cmds
725 * anyway
726 */
727 pmcraid_err("cmd is pending but reset in progress\n");
728 }
729
730 /* If this command was being used as part of the reset
731 * sequence, set cmd_done pointer to pmcraid_ioa_reset. This
732 * causes fail_outstanding_commands not to return the command
733 * block back to free pool
734 */
735 if (cmd == pinstance->reset_cmd)
736 cmd->cmd_done = pmcraid_ioa_reset;
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737 }
738
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739 /* Notify apps of important IOA bringup/bringdown sequences */
740 if (pinstance->scn.ioa_state != PMC_DEVICE_EVENT_RESET_START &&
741 pinstance->scn.ioa_state != PMC_DEVICE_EVENT_SHUTDOWN_START)
742 pmcraid_notify_ioastate(pinstance,
743 PMC_DEVICE_EVENT_RESET_START);
744
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745 pinstance->ioa_state = IOA_STATE_IN_RESET_ALERT;
746 scsi_block_requests(pinstance->host);
747 pmcraid_reset_alert(cmd);
748 spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
749}
750
751/**
752 * pmcraid_internal_done - completion routine for internally generated cmds
753 *
754 * @cmd: command that got response from IOA
755 *
756 * Return Value:
757 * none
758 */
759static void pmcraid_internal_done(struct pmcraid_cmd *cmd)
760{
761 pmcraid_info("response internal cmd CDB[0] = %x ioasc = %x\n",
762 cmd->ioa_cb->ioarcb.cdb[0],
763 le32_to_cpu(cmd->ioa_cb->ioasa.ioasc));
764
765 /* Some of the internal commands are sent with callers blocking for the
766 * response. Same will be indicated as part of cmd->completion_req
767 * field. Response path needs to wake up any waiters waiting for cmd
768 * completion if this flag is set.
769 */
770 if (cmd->completion_req) {
771 cmd->completion_req = 0;
772 complete(&cmd->wait_for_completion);
773 }
774
775 /* most of the internal commands are completed by caller itself, so
776 * no need to return the command block back to free pool until we are
777 * required to do so (e.g once done with initialization).
778 */
779 if (cmd->release) {
780 cmd->release = 0;
781 pmcraid_return_cmd(cmd);
782 }
783}
784
785/**
786 * pmcraid_reinit_cfgtable_done - done function for cfg table reinitialization
787 *
788 * @cmd: command that got response from IOA
789 *
790 * This routine is called after driver re-reads configuration table due to a
791 * lost CCN. It returns the command block back to free pool and schedules
792 * worker thread to add/delete devices into the system.
793 *
794 * Return Value:
795 * none
796 */
797static void pmcraid_reinit_cfgtable_done(struct pmcraid_cmd *cmd)
798{
799 pmcraid_info("response internal cmd CDB[0] = %x ioasc = %x\n",
800 cmd->ioa_cb->ioarcb.cdb[0],
801 le32_to_cpu(cmd->ioa_cb->ioasa.ioasc));
802
803 if (cmd->release) {
804 cmd->release = 0;
805 pmcraid_return_cmd(cmd);
806 }
807 pmcraid_info("scheduling worker for config table reinitialization\n");
808 schedule_work(&cmd->drv_inst->worker_q);
809}
810
811/**
812 * pmcraid_erp_done - Process completion of SCSI error response from device
813 * @cmd: pmcraid_command
814 *
815 * This function copies the sense buffer into the scsi_cmd struct and completes
816 * scsi_cmd by calling scsi_done function.
817 *
818 * Return value:
819 * none
820 */
821static void pmcraid_erp_done(struct pmcraid_cmd *cmd)
822{
823 struct scsi_cmnd *scsi_cmd = cmd->scsi_cmd;
824 struct pmcraid_instance *pinstance = cmd->drv_inst;
825 u32 ioasc = le32_to_cpu(cmd->ioa_cb->ioasa.ioasc);
826
827 if (PMCRAID_IOASC_SENSE_KEY(ioasc) > 0) {
828 scsi_cmd->result |= (DID_ERROR << 16);
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829 scmd_printk(KERN_INFO, scsi_cmd,
830 "command CDB[0] = %x failed with IOASC: 0x%08X\n",
831 cmd->ioa_cb->ioarcb.cdb[0], ioasc);
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832 }
833
a9b9e3ad
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834 if (cmd->sense_buffer) {
835 dma_unmap_single(&pinstance->pdev->dev, cmd->sense_buffer_dma,
836 SCSI_SENSE_BUFFERSIZE, DMA_FROM_DEVICE);
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837 cmd->sense_buffer = NULL;
838 cmd->sense_buffer_dma = 0;
839 }
840
841 scsi_dma_unmap(scsi_cmd);
842 pmcraid_return_cmd(cmd);
843 scsi_cmd->scsi_done(scsi_cmd);
844}
845
846/**
847 * pmcraid_fire_command - sends an IOA command to adapter
848 *
849 * This function adds the given block into pending command list
850 * and returns without waiting
851 *
852 * @cmd : command to be sent to the device
853 *
854 * Return Value
855 * None
856 */
857static void _pmcraid_fire_command(struct pmcraid_cmd *cmd)
858{
859 struct pmcraid_instance *pinstance = cmd->drv_inst;
860 unsigned long lock_flags;
861
862 /* Add this command block to pending cmd pool. We do this prior to
863 * writting IOARCB to ioarrin because IOA might complete the command
864 * by the time we are about to add it to the list. Response handler
c20c4267 865 * (isr/tasklet) looks for cmd block in the pending pending list.
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866 */
867 spin_lock_irqsave(&pinstance->pending_pool_lock, lock_flags);
868 list_add_tail(&cmd->free_list, &pinstance->pending_cmd_pool);
869 spin_unlock_irqrestore(&pinstance->pending_pool_lock, lock_flags);
870 atomic_inc(&pinstance->outstanding_cmds);
871
872 /* driver writes lower 32-bit value of IOARCB address only */
873 mb();
45c80be6 874 iowrite32(le64_to_cpu(cmd->ioa_cb->ioarcb.ioarcb_bus_addr), pinstance->ioarrin);
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875}
876
877/**
878 * pmcraid_send_cmd - fires a command to IOA
879 *
880 * This function also sets up timeout function, and command completion
881 * function
882 *
883 * @cmd: pointer to the command block to be fired to IOA
884 * @cmd_done: command completion function, called once IOA responds
885 * @timeout: timeout to wait for this command completion
886 * @timeout_func: timeout handler
887 *
888 * Return value
889 * none
890 */
891static void pmcraid_send_cmd(
892 struct pmcraid_cmd *cmd,
893 void (*cmd_done) (struct pmcraid_cmd *),
894 unsigned long timeout,
242b5657 895 void (*timeout_func) (struct timer_list *)
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896)
897{
898 /* initialize done function */
899 cmd->cmd_done = cmd_done;
900
901 if (timeout_func) {
902 /* setup timeout handler */
89a36810 903 cmd->timer.expires = jiffies + timeout;
841b86f3 904 cmd->timer.function = timeout_func;
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905 add_timer(&cmd->timer);
906 }
907
908 /* fire the command to IOA */
909 _pmcraid_fire_command(cmd);
910}
911
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912/**
913 * pmcraid_ioa_shutdown_done - completion function for IOA shutdown command
914 * @cmd: pointer to the command block used for sending IOA shutdown command
915 *
916 * Return value
917 * None
918 */
919static void pmcraid_ioa_shutdown_done(struct pmcraid_cmd *cmd)
920{
921 struct pmcraid_instance *pinstance = cmd->drv_inst;
922 unsigned long lock_flags;
923
924 spin_lock_irqsave(pinstance->host->host_lock, lock_flags);
925 pmcraid_ioa_reset(cmd);
926 spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
927}
928
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929/**
930 * pmcraid_ioa_shutdown - sends SHUTDOWN command to ioa
931 *
932 * @cmd: pointer to the command block used as part of reset sequence
933 *
934 * Return Value
935 * None
936 */
937static void pmcraid_ioa_shutdown(struct pmcraid_cmd *cmd)
938{
939 pmcraid_info("response for Cancel CCN CDB[0] = %x ioasc = %x\n",
940 cmd->ioa_cb->ioarcb.cdb[0],
941 le32_to_cpu(cmd->ioa_cb->ioasa.ioasc));
942
943 /* Note that commands sent during reset require next command to be sent
944 * to IOA. Hence reinit the done function as well as timeout function
945 */
946 pmcraid_reinit_cmdblk(cmd);
947 cmd->ioa_cb->ioarcb.request_type = REQ_TYPE_IOACMD;
948 cmd->ioa_cb->ioarcb.resource_handle =
949 cpu_to_le32(PMCRAID_IOA_RES_HANDLE);
950 cmd->ioa_cb->ioarcb.cdb[0] = PMCRAID_IOA_SHUTDOWN;
951 cmd->ioa_cb->ioarcb.cdb[1] = PMCRAID_SHUTDOWN_NORMAL;
952
953 /* fire shutdown command to hardware. */
954 pmcraid_info("firing normal shutdown command (%d) to IOA\n",
955 le32_to_cpu(cmd->ioa_cb->ioarcb.response_handle));
956
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957 pmcraid_notify_ioastate(cmd->drv_inst, PMC_DEVICE_EVENT_SHUTDOWN_START);
958
959 pmcraid_send_cmd(cmd, pmcraid_ioa_shutdown_done,
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960 PMCRAID_SHUTDOWN_TIMEOUT,
961 pmcraid_timeout_handler);
962}
963
964/**
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965 * pmcraid_get_fwversion_done - completion function for get_fwversion
966 *
967 * @cmd: pointer to command block used to send INQUIRY command
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968 *
969 * Return Value
c20c4267 970 * none
89a36810 971 */
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972static void pmcraid_querycfg(struct pmcraid_cmd *);
973
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974static void pmcraid_get_fwversion_done(struct pmcraid_cmd *cmd)
975{
976 struct pmcraid_instance *pinstance = cmd->drv_inst;
977 u32 ioasc = le32_to_cpu(cmd->ioa_cb->ioasa.ioasc);
978 unsigned long lock_flags;
979
980 /* configuration table entry size depends on firmware version. If fw
981 * version is not known, it is not possible to interpret IOA config
982 * table
983 */
984 if (ioasc) {
985 pmcraid_err("IOA Inquiry failed with %x\n", ioasc);
986 spin_lock_irqsave(pinstance->host->host_lock, lock_flags);
987 pinstance->ioa_state = IOA_STATE_IN_RESET_ALERT;
988 pmcraid_reset_alert(cmd);
989 spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
990 } else {
991 pmcraid_querycfg(cmd);
992 }
993}
994
995/**
996 * pmcraid_get_fwversion - reads firmware version information
997 *
998 * @cmd: pointer to command block used to send INQUIRY command
999 *
1000 * Return Value
1001 * none
1002 */
1003static void pmcraid_get_fwversion(struct pmcraid_cmd *cmd)
1004{
1005 struct pmcraid_ioarcb *ioarcb = &cmd->ioa_cb->ioarcb;
b22ee87d 1006 struct pmcraid_ioadl_desc *ioadl;
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1007 struct pmcraid_instance *pinstance = cmd->drv_inst;
1008 u16 data_size = sizeof(struct pmcraid_inquiry_data);
1009
1010 pmcraid_reinit_cmdblk(cmd);
1011 ioarcb->request_type = REQ_TYPE_SCSI;
1012 ioarcb->resource_handle = cpu_to_le32(PMCRAID_IOA_RES_HANDLE);
1013 ioarcb->cdb[0] = INQUIRY;
1014 ioarcb->cdb[1] = 1;
1015 ioarcb->cdb[2] = 0xD0;
1016 ioarcb->cdb[3] = (data_size >> 8) & 0xFF;
1017 ioarcb->cdb[4] = data_size & 0xFF;
1018
1019 /* Since entire inquiry data it can be part of IOARCB itself
1020 */
1021 ioarcb->ioadl_bus_addr = cpu_to_le64((cmd->ioa_cb_bus_addr) +
1022 offsetof(struct pmcraid_ioarcb,
1023 add_data.u.ioadl[0]));
1024 ioarcb->ioadl_length = cpu_to_le32(sizeof(struct pmcraid_ioadl_desc));
45c80be6 1025 ioarcb->ioarcb_bus_addr &= cpu_to_le64(~(0x1FULL));
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1026
1027 ioarcb->request_flags0 |= NO_LINK_DESCS;
1028 ioarcb->data_transfer_length = cpu_to_le32(data_size);
1029 ioadl = &(ioarcb->add_data.u.ioadl[0]);
1030 ioadl->flags = IOADL_FLAGS_LAST_DESC;
1031 ioadl->address = cpu_to_le64(pinstance->inq_data_baddr);
1032 ioadl->data_len = cpu_to_le32(data_size);
1033
1034 pmcraid_send_cmd(cmd, pmcraid_get_fwversion_done,
1035 PMCRAID_INTERNAL_TIMEOUT, pmcraid_timeout_handler);
1036}
1037
1038/**
1039 * pmcraid_identify_hrrq - registers host rrq buffers with IOA
1040 * @cmd: pointer to command block to be used for identify hrrq
1041 *
1042 * Return Value
1043 * none
1044 */
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1045static void pmcraid_identify_hrrq(struct pmcraid_cmd *cmd)
1046{
1047 struct pmcraid_instance *pinstance = cmd->drv_inst;
1048 struct pmcraid_ioarcb *ioarcb = &cmd->ioa_cb->ioarcb;
c20c4267 1049 int index = cmd->hrrq_index;
89a36810 1050 __be64 hrrq_addr = cpu_to_be64(pinstance->hrrq_start_bus_addr[index]);
45c80be6 1051 __be32 hrrq_size = cpu_to_be32(sizeof(u32) * PMCRAID_MAX_CMD);
c20c4267 1052 void (*done_function)(struct pmcraid_cmd *);
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1053
1054 pmcraid_reinit_cmdblk(cmd);
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1055 cmd->hrrq_index = index + 1;
1056
1057 if (cmd->hrrq_index < pinstance->num_hrrq) {
1058 done_function = pmcraid_identify_hrrq;
1059 } else {
1060 cmd->hrrq_index = 0;
1061 done_function = pmcraid_get_fwversion;
1062 }
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1063
1064 /* Initialize ioarcb */
1065 ioarcb->request_type = REQ_TYPE_IOACMD;
1066 ioarcb->resource_handle = cpu_to_le32(PMCRAID_IOA_RES_HANDLE);
1067
1068 /* initialize the hrrq number where IOA will respond to this command */
1069 ioarcb->hrrq_id = index;
1070 ioarcb->cdb[0] = PMCRAID_IDENTIFY_HRRQ;
1071 ioarcb->cdb[1] = index;
1072
1073 /* IOA expects 64-bit pci address to be written in B.E format
1074 * (i.e cdb[2]=MSByte..cdb[9]=LSB.
1075 */
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1076 pmcraid_info("HRRQ_IDENTIFY with hrrq:ioarcb:index => %llx:%llx:%x\n",
1077 hrrq_addr, ioarcb->ioarcb_bus_addr, index);
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1078
1079 memcpy(&(ioarcb->cdb[2]), &hrrq_addr, sizeof(hrrq_addr));
1080 memcpy(&(ioarcb->cdb[10]), &hrrq_size, sizeof(hrrq_size));
1081
1082 /* Subsequent commands require HRRQ identification to be successful.
1083 * Note that this gets called even during reset from SCSI mid-layer
1084 * or tasklet
1085 */
c20c4267 1086 pmcraid_send_cmd(cmd, done_function,
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1087 PMCRAID_INTERNAL_TIMEOUT,
1088 pmcraid_timeout_handler);
1089}
1090
1091static void pmcraid_process_ccn(struct pmcraid_cmd *cmd);
1092static void pmcraid_process_ldn(struct pmcraid_cmd *cmd);
1093
1094/**
1095 * pmcraid_send_hcam_cmd - send an initialized command block(HCAM) to IOA
1096 *
1097 * @cmd: initialized command block pointer
1098 *
1099 * Return Value
1100 * none
1101 */
1102static void pmcraid_send_hcam_cmd(struct pmcraid_cmd *cmd)
1103{
1104 if (cmd->ioa_cb->ioarcb.cdb[1] == PMCRAID_HCAM_CODE_CONFIG_CHANGE)
1105 atomic_set(&(cmd->drv_inst->ccn.ignore), 0);
1106 else
1107 atomic_set(&(cmd->drv_inst->ldn.ignore), 0);
1108
1109 pmcraid_send_cmd(cmd, cmd->cmd_done, 0, NULL);
1110}
1111
1112/**
1113 * pmcraid_init_hcam - send an initialized command block(HCAM) to IOA
1114 *
1115 * @pinstance: pointer to adapter instance structure
1116 * @type: HCAM type
1117 *
1118 * Return Value
1119 * pointer to initialized pmcraid_cmd structure or NULL
1120 */
1121static struct pmcraid_cmd *pmcraid_init_hcam
1122(
1123 struct pmcraid_instance *pinstance,
1124 u8 type
1125)
1126{
1127 struct pmcraid_cmd *cmd;
1128 struct pmcraid_ioarcb *ioarcb;
1129 struct pmcraid_ioadl_desc *ioadl;
1130 struct pmcraid_hostrcb *hcam;
1131 void (*cmd_done) (struct pmcraid_cmd *);
1132 dma_addr_t dma;
1133 int rcb_size;
1134
1135 cmd = pmcraid_get_free_cmd(pinstance);
1136
1137 if (!cmd) {
1138 pmcraid_err("no free command blocks for hcam\n");
1139 return cmd;
1140 }
1141
1142 if (type == PMCRAID_HCAM_CODE_CONFIG_CHANGE) {
c20c4267 1143 rcb_size = sizeof(struct pmcraid_hcam_ccn_ext);
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1144 cmd_done = pmcraid_process_ccn;
1145 dma = pinstance->ccn.baddr + PMCRAID_AEN_HDR_SIZE;
1146 hcam = &pinstance->ccn;
1147 } else {
1148 rcb_size = sizeof(struct pmcraid_hcam_ldn);
1149 cmd_done = pmcraid_process_ldn;
1150 dma = pinstance->ldn.baddr + PMCRAID_AEN_HDR_SIZE;
1151 hcam = &pinstance->ldn;
1152 }
1153
1154 /* initialize command pointer used for HCAM registration */
1155 hcam->cmd = cmd;
1156
1157 ioarcb = &cmd->ioa_cb->ioarcb;
1158 ioarcb->ioadl_bus_addr = cpu_to_le64((cmd->ioa_cb_bus_addr) +
1159 offsetof(struct pmcraid_ioarcb,
1160 add_data.u.ioadl[0]));
1161 ioarcb->ioadl_length = cpu_to_le32(sizeof(struct pmcraid_ioadl_desc));
1162 ioadl = ioarcb->add_data.u.ioadl;
1163
1164 /* Initialize ioarcb */
1165 ioarcb->request_type = REQ_TYPE_HCAM;
1166 ioarcb->resource_handle = cpu_to_le32(PMCRAID_IOA_RES_HANDLE);
1167 ioarcb->cdb[0] = PMCRAID_HOST_CONTROLLED_ASYNC;
1168 ioarcb->cdb[1] = type;
1169 ioarcb->cdb[7] = (rcb_size >> 8) & 0xFF;
1170 ioarcb->cdb[8] = (rcb_size) & 0xFF;
1171
1172 ioarcb->data_transfer_length = cpu_to_le32(rcb_size);
1173
88197966 1174 ioadl[0].flags |= IOADL_FLAGS_READ_LAST;
89a36810 1175 ioadl[0].data_len = cpu_to_le32(rcb_size);
45c80be6 1176 ioadl[0].address = cpu_to_le64(dma);
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1177
1178 cmd->cmd_done = cmd_done;
1179 return cmd;
1180}
1181
1182/**
1183 * pmcraid_send_hcam - Send an HCAM to IOA
1184 * @pinstance: ioa config struct
1185 * @type: HCAM type
1186 *
1187 * This function will send a Host Controlled Async command to IOA.
1188 *
1189 * Return value:
c20c4267 1190 * none
89a36810
AR
1191 */
1192static void pmcraid_send_hcam(struct pmcraid_instance *pinstance, u8 type)
1193{
1194 struct pmcraid_cmd *cmd = pmcraid_init_hcam(pinstance, type);
1195 pmcraid_send_hcam_cmd(cmd);
1196}
1197
1198
1199/**
1200 * pmcraid_prepare_cancel_cmd - prepares a command block to abort another
1201 *
1202 * @cmd: pointer to cmd that is used as cancelling command
1203 * @cmd_to_cancel: pointer to the command that needs to be cancelled
1204 */
1205static void pmcraid_prepare_cancel_cmd(
1206 struct pmcraid_cmd *cmd,
1207 struct pmcraid_cmd *cmd_to_cancel
1208)
1209{
1210 struct pmcraid_ioarcb *ioarcb = &cmd->ioa_cb->ioarcb;
45c80be6
AB
1211 __be64 ioarcb_addr;
1212
1213 /* IOARCB address of the command to be cancelled is given in
1214 * cdb[2]..cdb[9] is Big-Endian format. Note that length bits in
1215 * IOARCB address are not masked.
1216 */
1217 ioarcb_addr = cpu_to_be64(le64_to_cpu(cmd_to_cancel->ioa_cb->ioarcb.ioarcb_bus_addr));
89a36810
AR
1218
1219 /* Get the resource handle to where the command to be aborted has been
1220 * sent.
1221 */
1222 ioarcb->resource_handle = cmd_to_cancel->ioa_cb->ioarcb.resource_handle;
1223 ioarcb->request_type = REQ_TYPE_IOACMD;
1224 memset(ioarcb->cdb, 0, PMCRAID_MAX_CDB_LEN);
1225 ioarcb->cdb[0] = PMCRAID_ABORT_CMD;
1226
89a36810
AR
1227 memcpy(&(ioarcb->cdb[2]), &ioarcb_addr, sizeof(ioarcb_addr));
1228}
1229
1230/**
1231 * pmcraid_cancel_hcam - sends ABORT task to abort a given HCAM
1232 *
1233 * @cmd: command to be used as cancelling command
1234 * @type: HCAM type
1235 * @cmd_done: op done function for the cancelling command
1236 */
1237static void pmcraid_cancel_hcam(
1238 struct pmcraid_cmd *cmd,
1239 u8 type,
1240 void (*cmd_done) (struct pmcraid_cmd *)
1241)
1242{
1243 struct pmcraid_instance *pinstance;
1244 struct pmcraid_hostrcb *hcam;
1245
1246 pinstance = cmd->drv_inst;
1247 hcam = (type == PMCRAID_HCAM_CODE_LOG_DATA) ?
1248 &pinstance->ldn : &pinstance->ccn;
1249
1250 /* prepare for cancelling previous hcam command. If the HCAM is
1251 * currently not pending with IOA, we would have hcam->cmd as non-null
1252 */
1253 if (hcam->cmd == NULL)
1254 return;
1255
1256 pmcraid_prepare_cancel_cmd(cmd, hcam->cmd);
1257
1258 /* writing to IOARRIN must be protected by host_lock, as mid-layer
1259 * schedule queuecommand while we are doing this
1260 */
1261 pmcraid_send_cmd(cmd, cmd_done,
1262 PMCRAID_INTERNAL_TIMEOUT,
1263 pmcraid_timeout_handler);
1264}
1265
1266/**
1267 * pmcraid_cancel_ccn - cancel CCN HCAM already registered with IOA
1268 *
1269 * @cmd: command block to be used for cancelling the HCAM
1270 */
1271static void pmcraid_cancel_ccn(struct pmcraid_cmd *cmd)
1272{
1273 pmcraid_info("response for Cancel LDN CDB[0] = %x ioasc = %x\n",
1274 cmd->ioa_cb->ioarcb.cdb[0],
1275 le32_to_cpu(cmd->ioa_cb->ioasa.ioasc));
1276
1277 pmcraid_reinit_cmdblk(cmd);
1278
1279 pmcraid_cancel_hcam(cmd,
1280 PMCRAID_HCAM_CODE_CONFIG_CHANGE,
1281 pmcraid_ioa_shutdown);
1282}
1283
1284/**
1285 * pmcraid_cancel_ldn - cancel LDN HCAM already registered with IOA
1286 *
1287 * @cmd: command block to be used for cancelling the HCAM
1288 */
1289static void pmcraid_cancel_ldn(struct pmcraid_cmd *cmd)
1290{
1291 pmcraid_cancel_hcam(cmd,
1292 PMCRAID_HCAM_CODE_LOG_DATA,
1293 pmcraid_cancel_ccn);
1294}
1295
1296/**
1297 * pmcraid_expose_resource - check if the resource can be exposed to OS
1298 *
c20c4267 1299 * @fw_version: firmware version code
89a36810
AR
1300 * @cfgte: pointer to configuration table entry of the resource
1301 *
1302 * Return value:
c20c4267 1303 * true if resource can be added to midlayer, false(0) otherwise
89a36810 1304 */
c20c4267
AR
1305static int pmcraid_expose_resource(u16 fw_version,
1306 struct pmcraid_config_table_entry *cfgte)
89a36810
AR
1307{
1308 int retval = 0;
1309
c20c4267
AR
1310 if (cfgte->resource_type == RES_TYPE_VSET) {
1311 if (fw_version <= PMCRAID_FW_VERSION_1)
1312 retval = ((cfgte->unique_flags1 & 0x80) == 0);
1313 else
1314 retval = ((cfgte->unique_flags0 & 0x80) == 0 &&
1315 (cfgte->unique_flags1 & 0x80) == 0);
1316
1317 } else if (cfgte->resource_type == RES_TYPE_GSCSI)
89a36810
AR
1318 retval = (RES_BUS(cfgte->resource_address) !=
1319 PMCRAID_VIRTUAL_ENCL_BUS_ID);
1320 return retval;
1321}
1322
1323/* attributes supported by pmcraid_event_family */
1324enum {
1325 PMCRAID_AEN_ATTR_UNSPEC,
1326 PMCRAID_AEN_ATTR_EVENT,
1327 __PMCRAID_AEN_ATTR_MAX,
1328};
1329#define PMCRAID_AEN_ATTR_MAX (__PMCRAID_AEN_ATTR_MAX - 1)
1330
1331/* commands supported by pmcraid_event_family */
1332enum {
1333 PMCRAID_AEN_CMD_UNSPEC,
1334 PMCRAID_AEN_CMD_EVENT,
1335 __PMCRAID_AEN_CMD_MAX,
1336};
1337#define PMCRAID_AEN_CMD_MAX (__PMCRAID_AEN_CMD_MAX - 1)
1338
5e53e689
JB
1339static struct genl_multicast_group pmcraid_mcgrps[] = {
1340 { .name = "events", /* not really used - see ID discussion below */ },
1341};
1342
56989f6d 1343static struct genl_family pmcraid_event_family __ro_after_init = {
489111e5 1344 .module = THIS_MODULE,
89a36810
AR
1345 .name = "pmcraid",
1346 .version = 1,
5e53e689
JB
1347 .maxattr = PMCRAID_AEN_ATTR_MAX,
1348 .mcgrps = pmcraid_mcgrps,
1349 .n_mcgrps = ARRAY_SIZE(pmcraid_mcgrps),
89a36810
AR
1350};
1351
1352/**
1353 * pmcraid_netlink_init - registers pmcraid_event_family
1354 *
1355 * Return value:
c20c4267
AR
1356 * 0 if the pmcraid_event_family is successfully registered
1357 * with netlink generic, non-zero otherwise
89a36810 1358 */
56989f6d 1359static int __init pmcraid_netlink_init(void)
89a36810
AR
1360{
1361 int result;
1362
1363 result = genl_register_family(&pmcraid_event_family);
1364
1365 if (result)
1366 return result;
1367
1368 pmcraid_info("registered NETLINK GENERIC group: %d\n",
1369 pmcraid_event_family.id);
1370
1371 return result;
1372}
1373
1374/**
1375 * pmcraid_netlink_release - unregisters pmcraid_event_family
1376 *
1377 * Return value:
c20c4267 1378 * none
89a36810
AR
1379 */
1380static void pmcraid_netlink_release(void)
1381{
1382 genl_unregister_family(&pmcraid_event_family);
1383}
1384
1385/**
1386 * pmcraid_notify_aen - sends event msg to user space application
1387 * @pinstance: pointer to adapter instance structure
1388 * @type: HCAM type
1389 *
1390 * Return value:
1391 * 0 if success, error value in case of any failure.
1392 */
c20c4267
AR
1393static int pmcraid_notify_aen(
1394 struct pmcraid_instance *pinstance,
1395 struct pmcraid_aen_msg *aen_msg,
1396 u32 data_size
1397)
89a36810
AR
1398{
1399 struct sk_buff *skb;
89a36810 1400 void *msg_header;
c20c4267 1401 u32 total_size, nla_genl_hdr_total_size;
89a36810
AR
1402 int result;
1403
89a36810
AR
1404 aen_msg->hostno = (pinstance->host->unique_id << 16 |
1405 MINOR(pinstance->cdev.dev));
1406 aen_msg->length = data_size;
c20c4267 1407
89a36810
AR
1408 data_size += sizeof(*aen_msg);
1409
1410 total_size = nla_total_size(data_size);
c20c4267
AR
1411 /* Add GENL_HDR to total_size */
1412 nla_genl_hdr_total_size =
1413 (total_size + (GENL_HDRLEN +
1414 ((struct genl_family *)&pmcraid_event_family)->hdrsize)
1415 + NLMSG_HDRLEN);
1416 skb = genlmsg_new(nla_genl_hdr_total_size, GFP_ATOMIC);
89a36810
AR
1417
1418
1419 if (!skb) {
1420 pmcraid_err("Failed to allocate aen data SKB of size: %x\n",
1421 total_size);
1422 return -ENOMEM;
1423 }
1424
1425 /* add the genetlink message header */
1426 msg_header = genlmsg_put(skb, 0, 0,
1427 &pmcraid_event_family, 0,
1428 PMCRAID_AEN_CMD_EVENT);
1429 if (!msg_header) {
1430 pmcraid_err("failed to copy command details\n");
1431 nlmsg_free(skb);
1432 return -ENOMEM;
1433 }
1434
1435 result = nla_put(skb, PMCRAID_AEN_ATTR_EVENT, data_size, aen_msg);
1436
1437 if (result) {
c20c4267 1438 pmcraid_err("failed to copy AEN attribute data\n");
89a36810
AR
1439 nlmsg_free(skb);
1440 return -EINVAL;
1441 }
1442
1443 /* send genetlink multicast message to notify appplications */
053c095a 1444 genlmsg_end(skb, msg_header);
89a36810 1445
5e53e689
JB
1446 result = genlmsg_multicast(&pmcraid_event_family, skb,
1447 0, 0, GFP_ATOMIC);
89a36810
AR
1448
1449 /* If there are no listeners, genlmsg_multicast may return non-zero
1450 * value.
1451 */
1452 if (result)
c20c4267 1453 pmcraid_info("error (%x) sending aen event message\n", result);
89a36810
AR
1454 return result;
1455}
1456
c20c4267
AR
1457/**
1458 * pmcraid_notify_ccn - notifies about CCN event msg to user space
1459 * @pinstance: pointer adapter instance structure
1460 *
1461 * Return value:
1462 * 0 if success, error value in case of any failure
1463 */
1464static int pmcraid_notify_ccn(struct pmcraid_instance *pinstance)
1465{
1466 return pmcraid_notify_aen(pinstance,
1467 pinstance->ccn.msg,
45c80be6 1468 le32_to_cpu(pinstance->ccn.hcam->data_len) +
c20c4267
AR
1469 sizeof(struct pmcraid_hcam_hdr));
1470}
1471
1472/**
1473 * pmcraid_notify_ldn - notifies about CCN event msg to user space
1474 * @pinstance: pointer adapter instance structure
1475 *
1476 * Return value:
1477 * 0 if success, error value in case of any failure
1478 */
1479static int pmcraid_notify_ldn(struct pmcraid_instance *pinstance)
1480{
1481 return pmcraid_notify_aen(pinstance,
1482 pinstance->ldn.msg,
45c80be6 1483 le32_to_cpu(pinstance->ldn.hcam->data_len) +
c20c4267
AR
1484 sizeof(struct pmcraid_hcam_hdr));
1485}
1486
1487/**
1488 * pmcraid_notify_ioastate - sends IOA state event msg to user space
1489 * @pinstance: pointer adapter instance structure
1490 * @evt: controller state event to be sent
1491 *
1492 * Return value:
1493 * 0 if success, error value in case of any failure
1494 */
1495static void pmcraid_notify_ioastate(struct pmcraid_instance *pinstance, u32 evt)
1496{
1497 pinstance->scn.ioa_state = evt;
1498 pmcraid_notify_aen(pinstance,
1499 &pinstance->scn.msg,
1500 sizeof(u32));
1501}
1502
89a36810
AR
1503/**
1504 * pmcraid_handle_config_change - Handle a config change from the adapter
1505 * @pinstance: pointer to per adapter instance structure
1506 *
1507 * Return value:
1508 * none
1509 */
729c8456 1510
89a36810
AR
1511static void pmcraid_handle_config_change(struct pmcraid_instance *pinstance)
1512{
1513 struct pmcraid_config_table_entry *cfg_entry;
1514 struct pmcraid_hcam_ccn *ccn_hcam;
1515 struct pmcraid_cmd *cmd;
1516 struct pmcraid_cmd *cfgcmd;
1517 struct pmcraid_resource_entry *res = NULL;
89a36810
AR
1518 unsigned long lock_flags;
1519 unsigned long host_lock_flags;
729c8456
AR
1520 u32 new_entry = 1;
1521 u32 hidden_entry = 0;
c20c4267 1522 u16 fw_version;
89a36810
AR
1523 int rc;
1524
1525 ccn_hcam = (struct pmcraid_hcam_ccn *)pinstance->ccn.hcam;
1526 cfg_entry = &ccn_hcam->cfg_entry;
c20c4267 1527 fw_version = be16_to_cpu(pinstance->inq_data->fw_version);
89a36810 1528
592488a3
AR
1529 pmcraid_info("CCN(%x): %x timestamp: %llx type: %x lost: %x flags: %x \
1530 res: %x:%x:%x:%x\n",
45c80be6 1531 le32_to_cpu(pinstance->ccn.hcam->ilid),
89a36810 1532 pinstance->ccn.hcam->op_code,
45c80be6
AB
1533 (le32_to_cpu(pinstance->ccn.hcam->timestamp1) |
1534 ((le32_to_cpu(pinstance->ccn.hcam->timestamp2) & 0xffffffffLL) << 32)),
89a36810
AR
1535 pinstance->ccn.hcam->notification_type,
1536 pinstance->ccn.hcam->notification_lost,
1537 pinstance->ccn.hcam->flags,
1538 pinstance->host->unique_id,
1539 RES_IS_VSET(*cfg_entry) ? PMCRAID_VSET_BUS_ID :
1540 (RES_IS_GSCSI(*cfg_entry) ? PMCRAID_PHYS_BUS_ID :
1541 RES_BUS(cfg_entry->resource_address)),
c20c4267
AR
1542 RES_IS_VSET(*cfg_entry) ?
1543 (fw_version <= PMCRAID_FW_VERSION_1 ?
1544 cfg_entry->unique_flags1 :
45c80be6 1545 le16_to_cpu(cfg_entry->array_id) & 0xFF) :
89a36810
AR
1546 RES_TARGET(cfg_entry->resource_address),
1547 RES_LUN(cfg_entry->resource_address));
1548
1549
1550 /* If this HCAM indicates a lost notification, read the config table */
1551 if (pinstance->ccn.hcam->notification_lost) {
1552 cfgcmd = pmcraid_get_free_cmd(pinstance);
1553 if (cfgcmd) {
1554 pmcraid_info("lost CCN, reading config table\b");
1555 pinstance->reinit_cfg_table = 1;
1556 pmcraid_querycfg(cfgcmd);
1557 } else {
1558 pmcraid_err("lost CCN, no free cmd for querycfg\n");
1559 }
1560 goto out_notify_apps;
1561 }
1562
1563 /* If this resource is not going to be added to mid-layer, just notify
729c8456
AR
1564 * applications and return. If this notification is about hiding a VSET
1565 * resource, check if it was exposed already.
89a36810 1566 */
729c8456
AR
1567 if (pinstance->ccn.hcam->notification_type ==
1568 NOTIFICATION_TYPE_ENTRY_CHANGED &&
c20c4267 1569 cfg_entry->resource_type == RES_TYPE_VSET) {
db269932 1570 hidden_entry = (cfg_entry->unique_flags1 & 0x80) != 0;
c20c4267 1571 } else if (!pmcraid_expose_resource(fw_version, cfg_entry)) {
89a36810 1572 goto out_notify_apps;
c20c4267 1573 }
89a36810
AR
1574
1575 spin_lock_irqsave(&pinstance->resource_lock, lock_flags);
1576 list_for_each_entry(res, &pinstance->used_res_q, queue) {
1577 rc = memcmp(&res->cfg_entry.resource_address,
1578 &cfg_entry->resource_address,
1579 sizeof(cfg_entry->resource_address));
1580 if (!rc) {
1581 new_entry = 0;
1582 break;
1583 }
1584 }
1585
1586 if (new_entry) {
1587
729c8456
AR
1588 if (hidden_entry) {
1589 spin_unlock_irqrestore(&pinstance->resource_lock,
1590 lock_flags);
1591 goto out_notify_apps;
1592 }
1593
89a36810
AR
1594 /* If there are more number of resources than what driver can
1595 * manage, do not notify the applications about the CCN. Just
1596 * ignore this notifications and re-register the same HCAM
1597 */
1598 if (list_empty(&pinstance->free_res_q)) {
1599 spin_unlock_irqrestore(&pinstance->resource_lock,
1600 lock_flags);
1601 pmcraid_err("too many resources attached\n");
1602 spin_lock_irqsave(pinstance->host->host_lock,
1603 host_lock_flags);
1604 pmcraid_send_hcam(pinstance,
1605 PMCRAID_HCAM_CODE_CONFIG_CHANGE);
1606 spin_unlock_irqrestore(pinstance->host->host_lock,
1607 host_lock_flags);
1608 return;
1609 }
1610
1611 res = list_entry(pinstance->free_res_q.next,
1612 struct pmcraid_resource_entry, queue);
1613
1614 list_del(&res->queue);
1615 res->scsi_dev = NULL;
1616 res->reset_progress = 0;
1617 list_add_tail(&res->queue, &pinstance->used_res_q);
1618 }
1619
c20c4267 1620 memcpy(&res->cfg_entry, cfg_entry, pinstance->config_table_entry_size);
89a36810
AR
1621
1622 if (pinstance->ccn.hcam->notification_type ==
729c8456 1623 NOTIFICATION_TYPE_ENTRY_DELETED || hidden_entry) {
89a36810 1624 if (res->scsi_dev) {
c20c4267
AR
1625 if (fw_version <= PMCRAID_FW_VERSION_1)
1626 res->cfg_entry.unique_flags1 &= 0x7F;
1627 else
45c80be6 1628 res->cfg_entry.array_id &= cpu_to_le16(0xFF);
89a36810
AR
1629 res->change_detected = RES_CHANGE_DEL;
1630 res->cfg_entry.resource_handle =
1631 PMCRAID_INVALID_RES_HANDLE;
1632 schedule_work(&pinstance->worker_q);
1633 } else {
1634 /* This may be one of the non-exposed resources */
1635 list_move_tail(&res->queue, &pinstance->free_res_q);
1636 }
1637 } else if (!res->scsi_dev) {
1638 res->change_detected = RES_CHANGE_ADD;
1639 schedule_work(&pinstance->worker_q);
1640 }
1641 spin_unlock_irqrestore(&pinstance->resource_lock, lock_flags);
1642
1643out_notify_apps:
1644
1645 /* Notify configuration changes to registered applications.*/
1646 if (!pmcraid_disable_aen)
c20c4267 1647 pmcraid_notify_ccn(pinstance);
89a36810
AR
1648
1649 cmd = pmcraid_init_hcam(pinstance, PMCRAID_HCAM_CODE_CONFIG_CHANGE);
1650 if (cmd)
1651 pmcraid_send_hcam_cmd(cmd);
1652}
1653
1654/**
1655 * pmcraid_get_error_info - return error string for an ioasc
1656 * @ioasc: ioasc code
1657 * Return Value
1658 * none
1659 */
1660static struct pmcraid_ioasc_error *pmcraid_get_error_info(u32 ioasc)
1661{
1662 int i;
1663 for (i = 0; i < ARRAY_SIZE(pmcraid_ioasc_error_table); i++) {
1664 if (pmcraid_ioasc_error_table[i].ioasc_code == ioasc)
1665 return &pmcraid_ioasc_error_table[i];
1666 }
1667 return NULL;
1668}
1669
1670/**
1671 * pmcraid_ioasc_logger - log IOASC information based user-settings
1672 * @ioasc: ioasc code
1673 * @cmd: pointer to command that resulted in 'ioasc'
1674 */
61b96d5b 1675static void pmcraid_ioasc_logger(u32 ioasc, struct pmcraid_cmd *cmd)
89a36810
AR
1676{
1677 struct pmcraid_ioasc_error *error_info = pmcraid_get_error_info(ioasc);
1678
1679 if (error_info == NULL ||
1680 cmd->drv_inst->current_log_level < error_info->log_level)
1681 return;
1682
1683 /* log the error string */
c20c4267 1684 pmcraid_err("cmd [%x] for resource %x failed with %x(%s)\n",
89a36810 1685 cmd->ioa_cb->ioarcb.cdb[0],
45c80be6
AB
1686 le32_to_cpu(cmd->ioa_cb->ioarcb.resource_handle),
1687 ioasc, error_info->error_string);
89a36810
AR
1688}
1689
1690/**
1691 * pmcraid_handle_error_log - Handle a config change (error log) from the IOA
1692 *
1693 * @pinstance: pointer to per adapter instance structure
1694 *
1695 * Return value:
1696 * none
1697 */
1698static void pmcraid_handle_error_log(struct pmcraid_instance *pinstance)
1699{
1700 struct pmcraid_hcam_ldn *hcam_ldn;
1701 u32 ioasc;
1702
1703 hcam_ldn = (struct pmcraid_hcam_ldn *)pinstance->ldn.hcam;
1704
1705 pmcraid_info
1706 ("LDN(%x): %x type: %x lost: %x flags: %x overlay id: %x\n",
1707 pinstance->ldn.hcam->ilid,
1708 pinstance->ldn.hcam->op_code,
1709 pinstance->ldn.hcam->notification_type,
1710 pinstance->ldn.hcam->notification_lost,
1711 pinstance->ldn.hcam->flags,
1712 pinstance->ldn.hcam->overlay_id);
1713
1714 /* log only the errors, no need to log informational log entries */
1715 if (pinstance->ldn.hcam->notification_type !=
1716 NOTIFICATION_TYPE_ERROR_LOG)
1717 return;
1718
1719 if (pinstance->ldn.hcam->notification_lost ==
1720 HOSTRCB_NOTIFICATIONS_LOST)
34876402 1721 dev_info(&pinstance->pdev->dev, "Error notifications lost\n");
89a36810
AR
1722
1723 ioasc = le32_to_cpu(hcam_ldn->error_log.fd_ioasc);
1724
1725 if (ioasc == PMCRAID_IOASC_UA_BUS_WAS_RESET ||
1726 ioasc == PMCRAID_IOASC_UA_BUS_WAS_RESET_BY_OTHER) {
34876402 1727 dev_info(&pinstance->pdev->dev,
89a36810
AR
1728 "UnitAttention due to IOA Bus Reset\n");
1729 scsi_report_bus_reset(
1730 pinstance->host,
1731 RES_BUS(hcam_ldn->error_log.fd_ra));
1732 }
1733
1734 return;
1735}
1736
1737/**
1738 * pmcraid_process_ccn - Op done function for a CCN.
1739 * @cmd: pointer to command struct
1740 *
1741 * This function is the op done function for a configuration
1742 * change notification
1743 *
1744 * Return value:
1745 * none
1746 */
1747static void pmcraid_process_ccn(struct pmcraid_cmd *cmd)
1748{
1749 struct pmcraid_instance *pinstance = cmd->drv_inst;
1750 u32 ioasc = le32_to_cpu(cmd->ioa_cb->ioasa.ioasc);
1751 unsigned long lock_flags;
1752
1753 pinstance->ccn.cmd = NULL;
1754 pmcraid_return_cmd(cmd);
1755
1756 /* If driver initiated IOA reset happened while this hcam was pending
1757 * with IOA, or IOA bringdown sequence is in progress, no need to
1758 * re-register the hcam
1759 */
1760 if (ioasc == PMCRAID_IOASC_IOA_WAS_RESET ||
1761 atomic_read(&pinstance->ccn.ignore) == 1) {
1762 return;
1763 } else if (ioasc) {
34876402 1764 dev_info(&pinstance->pdev->dev,
89a36810
AR
1765 "Host RCB (CCN) failed with IOASC: 0x%08X\n", ioasc);
1766 spin_lock_irqsave(pinstance->host->host_lock, lock_flags);
1767 pmcraid_send_hcam(pinstance, PMCRAID_HCAM_CODE_CONFIG_CHANGE);
1768 spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
1769 } else {
1770 pmcraid_handle_config_change(pinstance);
1771 }
1772}
1773
1774/**
1775 * pmcraid_process_ldn - op done function for an LDN
1776 * @cmd: pointer to command block
1777 *
1778 * Return value
1779 * none
1780 */
1781static void pmcraid_initiate_reset(struct pmcraid_instance *);
592488a3 1782static void pmcraid_set_timestamp(struct pmcraid_cmd *cmd);
89a36810
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1783
1784static void pmcraid_process_ldn(struct pmcraid_cmd *cmd)
1785{
1786 struct pmcraid_instance *pinstance = cmd->drv_inst;
1787 struct pmcraid_hcam_ldn *ldn_hcam =
1788 (struct pmcraid_hcam_ldn *)pinstance->ldn.hcam;
1789 u32 ioasc = le32_to_cpu(cmd->ioa_cb->ioasa.ioasc);
1790 u32 fd_ioasc = le32_to_cpu(ldn_hcam->error_log.fd_ioasc);
1791 unsigned long lock_flags;
1792
1793 /* return the command block back to freepool */
1794 pinstance->ldn.cmd = NULL;
1795 pmcraid_return_cmd(cmd);
1796
1797 /* If driver initiated IOA reset happened while this hcam was pending
1798 * with IOA, no need to re-register the hcam as reset engine will do it
1799 * once reset sequence is complete
1800 */
1801 if (ioasc == PMCRAID_IOASC_IOA_WAS_RESET ||
1802 atomic_read(&pinstance->ccn.ignore) == 1) {
1803 return;
1804 } else if (!ioasc) {
1805 pmcraid_handle_error_log(pinstance);
1806 if (fd_ioasc == PMCRAID_IOASC_NR_IOA_RESET_REQUIRED) {
1807 spin_lock_irqsave(pinstance->host->host_lock,
1808 lock_flags);
1809 pmcraid_initiate_reset(pinstance);
1810 spin_unlock_irqrestore(pinstance->host->host_lock,
1811 lock_flags);
1812 return;
1813 }
592488a3
AR
1814 if (fd_ioasc == PMCRAID_IOASC_TIME_STAMP_OUT_OF_SYNC) {
1815 pinstance->timestamp_error = 1;
1816 pmcraid_set_timestamp(cmd);
1817 }
89a36810 1818 } else {
34876402 1819 dev_info(&pinstance->pdev->dev,
89a36810
AR
1820 "Host RCB(LDN) failed with IOASC: 0x%08X\n", ioasc);
1821 }
1822 /* send netlink message for HCAM notification if enabled */
1823 if (!pmcraid_disable_aen)
c20c4267 1824 pmcraid_notify_ldn(pinstance);
89a36810
AR
1825
1826 cmd = pmcraid_init_hcam(pinstance, PMCRAID_HCAM_CODE_LOG_DATA);
1827 if (cmd)
1828 pmcraid_send_hcam_cmd(cmd);
1829}
1830
1831/**
1832 * pmcraid_register_hcams - register HCAMs for CCN and LDN
1833 *
1834 * @pinstance: pointer per adapter instance structure
1835 *
1836 * Return Value
1837 * none
1838 */
1839static void pmcraid_register_hcams(struct pmcraid_instance *pinstance)
1840{
1841 pmcraid_send_hcam(pinstance, PMCRAID_HCAM_CODE_CONFIG_CHANGE);
1842 pmcraid_send_hcam(pinstance, PMCRAID_HCAM_CODE_LOG_DATA);
1843}
1844
1845/**
1846 * pmcraid_unregister_hcams - cancel HCAMs registered already
1847 * @cmd: pointer to command used as part of reset sequence
1848 */
1849static void pmcraid_unregister_hcams(struct pmcraid_cmd *cmd)
1850{
1851 struct pmcraid_instance *pinstance = cmd->drv_inst;
1852
1853 /* During IOA bringdown, HCAM gets fired and tasklet proceeds with
1854 * handling hcam response though it is not necessary. In order to
1855 * prevent this, set 'ignore', so that bring-down sequence doesn't
1856 * re-send any more hcams
1857 */
1858 atomic_set(&pinstance->ccn.ignore, 1);
1859 atomic_set(&pinstance->ldn.ignore, 1);
1860
1861 /* If adapter reset was forced as part of runtime reset sequence,
c20c4267
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1862 * start the reset sequence. Reset will be triggered even in case
1863 * IOA unit_check.
89a36810 1864 */
c20c4267
AR
1865 if ((pinstance->force_ioa_reset && !pinstance->ioa_bringdown) ||
1866 pinstance->ioa_unit_check) {
89a36810 1867 pinstance->force_ioa_reset = 0;
c20c4267 1868 pinstance->ioa_unit_check = 0;
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AR
1869 pinstance->ioa_state = IOA_STATE_IN_RESET_ALERT;
1870 pmcraid_reset_alert(cmd);
1871 return;
1872 }
1873
1874 /* Driver tries to cancel HCAMs by sending ABORT TASK for each HCAM
1875 * one after the other. So CCN cancellation will be triggered by
1876 * pmcraid_cancel_ldn itself.
1877 */
1878 pmcraid_cancel_ldn(cmd);
1879}
1880
1881/**
1882 * pmcraid_reset_enable_ioa - re-enable IOA after a hard reset
1883 * @pinstance: pointer to adapter instance structure
1884 * Return Value
1885 * 1 if TRANSITION_TO_OPERATIONAL is active, otherwise 0
1886 */
1887static void pmcraid_reinit_buffers(struct pmcraid_instance *);
1888
1889static int pmcraid_reset_enable_ioa(struct pmcraid_instance *pinstance)
1890{
1891 u32 intrs;
1892
1893 pmcraid_reinit_buffers(pinstance);
1894 intrs = pmcraid_read_interrupts(pinstance);
1895
1896 pmcraid_enable_interrupts(pinstance, PMCRAID_PCI_INTERRUPTS);
1897
1898 if (intrs & INTRS_TRANSITION_TO_OPERATIONAL) {
c20c4267
AR
1899 if (!pinstance->interrupt_mode) {
1900 iowrite32(INTRS_TRANSITION_TO_OPERATIONAL,
1901 pinstance->int_regs.
1902 ioa_host_interrupt_mask_reg);
1903 iowrite32(INTRS_TRANSITION_TO_OPERATIONAL,
1904 pinstance->int_regs.ioa_host_interrupt_clr_reg);
1905 }
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AR
1906 return 1;
1907 } else {
1908 return 0;
1909 }
1910}
1911
1912/**
1913 * pmcraid_soft_reset - performs a soft reset and makes IOA become ready
1914 * @cmd : pointer to reset command block
1915 *
1916 * Return Value
1917 * none
1918 */
1919static void pmcraid_soft_reset(struct pmcraid_cmd *cmd)
1920{
1921 struct pmcraid_instance *pinstance = cmd->drv_inst;
1922 u32 int_reg;
1923 u32 doorbell;
1924
1925 /* There will be an interrupt when Transition to Operational bit is
1926 * set so tasklet would execute next reset task. The timeout handler
1927 * would re-initiate a reset
1928 */
1929 cmd->cmd_done = pmcraid_ioa_reset;
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1930 cmd->timer.expires = jiffies +
1931 msecs_to_jiffies(PMCRAID_TRANSOP_TIMEOUT);
841b86f3 1932 cmd->timer.function = pmcraid_timeout_handler;
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1933
1934 if (!timer_pending(&cmd->timer))
1935 add_timer(&cmd->timer);
1936
1937 /* Enable destructive diagnostics on IOA if it is not yet in
1938 * operational state
1939 */
1940 doorbell = DOORBELL_RUNTIME_RESET |
1941 DOORBELL_ENABLE_DESTRUCTIVE_DIAGS;
1942
c20c4267
AR
1943 /* Since we do RESET_ALERT and Start BIST we have to again write
1944 * MSIX Doorbell to indicate the interrupt mode
1945 */
1946 if (pinstance->interrupt_mode) {
1947 iowrite32(DOORBELL_INTR_MODE_MSIX,
1948 pinstance->int_regs.host_ioa_interrupt_reg);
1949 ioread32(pinstance->int_regs.host_ioa_interrupt_reg);
1950 }
1951
89a36810 1952 iowrite32(doorbell, pinstance->int_regs.host_ioa_interrupt_reg);
c20c4267 1953 ioread32(pinstance->int_regs.host_ioa_interrupt_reg),
89a36810 1954 int_reg = ioread32(pinstance->int_regs.ioa_host_interrupt_reg);
c20c4267 1955
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AR
1956 pmcraid_info("Waiting for IOA to become operational %x:%x\n",
1957 ioread32(pinstance->int_regs.host_ioa_interrupt_reg),
1958 int_reg);
1959}
1960
1961/**
1962 * pmcraid_get_dump - retrieves IOA dump in case of Unit Check interrupt
1963 *
1964 * @pinstance: pointer to adapter instance structure
1965 *
1966 * Return Value
1967 * none
1968 */
1969static void pmcraid_get_dump(struct pmcraid_instance *pinstance)
1970{
1971 pmcraid_info("%s is not yet implemented\n", __func__);
1972}
1973
1974/**
1975 * pmcraid_fail_outstanding_cmds - Fails all outstanding ops.
1976 * @pinstance: pointer to adapter instance structure
1977 *
1978 * This function fails all outstanding ops. If they are submitted to IOA
1979 * already, it sends cancel all messages if IOA is still accepting IOARCBs,
1980 * otherwise just completes the commands and returns the cmd blocks to free
1981 * pool.
1982 *
1983 * Return value:
1984 * none
1985 */
1986static void pmcraid_fail_outstanding_cmds(struct pmcraid_instance *pinstance)
1987{
1988 struct pmcraid_cmd *cmd, *temp;
1989 unsigned long lock_flags;
1990
1991 /* pending command list is protected by pending_pool_lock. Its
1992 * traversal must be done as within this lock
1993 */
1994 spin_lock_irqsave(&pinstance->pending_pool_lock, lock_flags);
1995 list_for_each_entry_safe(cmd, temp, &pinstance->pending_cmd_pool,
1996 free_list) {
1997 list_del(&cmd->free_list);
1998 spin_unlock_irqrestore(&pinstance->pending_pool_lock,
1999 lock_flags);
2000 cmd->ioa_cb->ioasa.ioasc =
2001 cpu_to_le32(PMCRAID_IOASC_IOA_WAS_RESET);
2002 cmd->ioa_cb->ioasa.ilid =
45c80be6 2003 cpu_to_le32(PMCRAID_DRIVER_ILID);
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AR
2004
2005 /* In case the command timer is still running */
2006 del_timer(&cmd->timer);
2007
2008 /* If this is an IO command, complete it by invoking scsi_done
2009 * function. If this is one of the internal commands other
2010 * than pmcraid_ioa_reset and HCAM commands invoke cmd_done to
2011 * complete it
2012 */
2013 if (cmd->scsi_cmd) {
2014
2015 struct scsi_cmnd *scsi_cmd = cmd->scsi_cmd;
2016 __le32 resp = cmd->ioa_cb->ioarcb.response_handle;
2017
2018 scsi_cmd->result |= DID_ERROR << 16;
2019
2020 scsi_dma_unmap(scsi_cmd);
2021 pmcraid_return_cmd(cmd);
2022
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AR
2023 pmcraid_info("failing(%d) CDB[0] = %x result: %x\n",
2024 le32_to_cpu(resp) >> 2,
2025 cmd->ioa_cb->ioarcb.cdb[0],
2026 scsi_cmd->result);
2027 scsi_cmd->scsi_done(scsi_cmd);
2028 } else if (cmd->cmd_done == pmcraid_internal_done ||
2029 cmd->cmd_done == pmcraid_erp_done) {
2030 cmd->cmd_done(cmd);
c20c4267
AR
2031 } else if (cmd->cmd_done != pmcraid_ioa_reset &&
2032 cmd->cmd_done != pmcraid_ioa_shutdown_done) {
89a36810
AR
2033 pmcraid_return_cmd(cmd);
2034 }
2035
2036 atomic_dec(&pinstance->outstanding_cmds);
2037 spin_lock_irqsave(&pinstance->pending_pool_lock, lock_flags);
2038 }
2039
2040 spin_unlock_irqrestore(&pinstance->pending_pool_lock, lock_flags);
2041}
2042
2043/**
2044 * pmcraid_ioa_reset - Implementation of IOA reset logic
2045 *
2046 * @cmd: pointer to the cmd block to be used for entire reset process
2047 *
2048 * This function executes most of the steps required for IOA reset. This gets
2049 * called by user threads (modprobe/insmod/rmmod) timer, tasklet and midlayer's
25985edc 2050 * 'eh_' thread. Access to variables used for controlling the reset sequence is
89a36810
AR
2051 * synchronized using host lock. Various functions called during reset process
2052 * would make use of a single command block, pointer to which is also stored in
2053 * adapter instance structure.
2054 *
2055 * Return Value
2056 * None
2057 */
2058static void pmcraid_ioa_reset(struct pmcraid_cmd *cmd)
2059{
2060 struct pmcraid_instance *pinstance = cmd->drv_inst;
2061 u8 reset_complete = 0;
2062
2063 pinstance->ioa_reset_in_progress = 1;
2064
2065 if (pinstance->reset_cmd != cmd) {
2066 pmcraid_err("reset is called with different command block\n");
2067 pinstance->reset_cmd = cmd;
2068 }
2069
2070 pmcraid_info("reset_engine: state = %d, command = %p\n",
2071 pinstance->ioa_state, cmd);
2072
2073 switch (pinstance->ioa_state) {
2074
2075 case IOA_STATE_DEAD:
2076 /* If IOA is offline, whatever may be the reset reason, just
2077 * return. callers might be waiting on the reset wait_q, wake
2078 * up them
2079 */
2080 pmcraid_err("IOA is offline no reset is possible\n");
2081 reset_complete = 1;
2082 break;
2083
2084 case IOA_STATE_IN_BRINGDOWN:
2085 /* we enter here, once ioa shutdown command is processed by IOA
2086 * Alert IOA for a possible reset. If reset alert fails, IOA
2087 * goes through hard-reset
2088 */
2089 pmcraid_disable_interrupts(pinstance, ~0);
2090 pinstance->ioa_state = IOA_STATE_IN_RESET_ALERT;
2091 pmcraid_reset_alert(cmd);
2092 break;
2093
2094 case IOA_STATE_UNKNOWN:
2095 /* We may be called during probe or resume. Some pre-processing
2096 * is required for prior to reset
2097 */
2098 scsi_block_requests(pinstance->host);
2099
2100 /* If asked to reset while IOA was processing responses or
2101 * there are any error responses then IOA may require
2102 * hard-reset.
2103 */
2104 if (pinstance->ioa_hard_reset == 0) {
2105 if (ioread32(pinstance->ioa_status) &
2106 INTRS_TRANSITION_TO_OPERATIONAL) {
2107 pmcraid_info("sticky bit set, bring-up\n");
2108 pinstance->ioa_state = IOA_STATE_IN_BRINGUP;
2109 pmcraid_reinit_cmdblk(cmd);
2110 pmcraid_identify_hrrq(cmd);
2111 } else {
2112 pinstance->ioa_state = IOA_STATE_IN_SOFT_RESET;
2113 pmcraid_soft_reset(cmd);
2114 }
2115 } else {
2116 /* Alert IOA of a possible reset and wait for critical
2117 * operation in progress bit to reset
2118 */
2119 pinstance->ioa_state = IOA_STATE_IN_RESET_ALERT;
2120 pmcraid_reset_alert(cmd);
2121 }
2122 break;
2123
2124 case IOA_STATE_IN_RESET_ALERT:
2125 /* If critical operation in progress bit is reset or wait gets
2126 * timed out, reset proceeds with starting BIST on the IOA.
2127 * pmcraid_ioa_hard_reset keeps a count of reset attempts. If
2128 * they are 3 or more, reset engine marks IOA dead and returns
2129 */
2130 pinstance->ioa_state = IOA_STATE_IN_HARD_RESET;
2131 pmcraid_start_bist(cmd);
2132 break;
2133
2134 case IOA_STATE_IN_HARD_RESET:
2135 pinstance->ioa_reset_attempts++;
2136
2137 /* retry reset if we haven't reached maximum allowed limit */
2138 if (pinstance->ioa_reset_attempts > PMCRAID_RESET_ATTEMPTS) {
2139 pinstance->ioa_reset_attempts = 0;
2140 pmcraid_err("IOA didn't respond marking it as dead\n");
2141 pinstance->ioa_state = IOA_STATE_DEAD;
c20c4267
AR
2142
2143 if (pinstance->ioa_bringdown)
2144 pmcraid_notify_ioastate(pinstance,
2145 PMC_DEVICE_EVENT_SHUTDOWN_FAILED);
2146 else
2147 pmcraid_notify_ioastate(pinstance,
2148 PMC_DEVICE_EVENT_RESET_FAILED);
89a36810
AR
2149 reset_complete = 1;
2150 break;
2151 }
2152
2153 /* Once either bist or pci reset is done, restore PCI config
2154 * space. If this fails, proceed with hard reset again
2155 */
1d3c16a8 2156 pci_restore_state(pinstance->pdev);
89a36810
AR
2157
2158 /* fail all pending commands */
2159 pmcraid_fail_outstanding_cmds(pinstance);
2160
2161 /* check if unit check is active, if so extract dump */
2162 if (pinstance->ioa_unit_check) {
2163 pmcraid_info("unit check is active\n");
2164 pinstance->ioa_unit_check = 0;
2165 pmcraid_get_dump(pinstance);
2166 pinstance->ioa_reset_attempts--;
2167 pinstance->ioa_state = IOA_STATE_IN_RESET_ALERT;
2168 pmcraid_reset_alert(cmd);
2169 break;
2170 }
2171
2172 /* if the reset reason is to bring-down the ioa, we might be
2173 * done with the reset restore pci_config_space and complete
2174 * the reset
2175 */
2176 if (pinstance->ioa_bringdown) {
2177 pmcraid_info("bringing down the adapter\n");
2178 pinstance->ioa_shutdown_type = SHUTDOWN_NONE;
2179 pinstance->ioa_bringdown = 0;
2180 pinstance->ioa_state = IOA_STATE_UNKNOWN;
c20c4267
AR
2181 pmcraid_notify_ioastate(pinstance,
2182 PMC_DEVICE_EVENT_SHUTDOWN_SUCCESS);
89a36810
AR
2183 reset_complete = 1;
2184 } else {
2185 /* bring-up IOA, so proceed with soft reset
2186 * Reinitialize hrrq_buffers and their indices also
2187 * enable interrupts after a pci_restore_state
2188 */
2189 if (pmcraid_reset_enable_ioa(pinstance)) {
2190 pinstance->ioa_state = IOA_STATE_IN_BRINGUP;
2191 pmcraid_info("bringing up the adapter\n");
2192 pmcraid_reinit_cmdblk(cmd);
2193 pmcraid_identify_hrrq(cmd);
2194 } else {
2195 pinstance->ioa_state = IOA_STATE_IN_SOFT_RESET;
2196 pmcraid_soft_reset(cmd);
2197 }
2198 }
2199 break;
2200
2201 case IOA_STATE_IN_SOFT_RESET:
2202 /* TRANSITION TO OPERATIONAL is on so start initialization
2203 * sequence
2204 */
2205 pmcraid_info("In softreset proceeding with bring-up\n");
2206 pinstance->ioa_state = IOA_STATE_IN_BRINGUP;
2207
2208 /* Initialization commands start with HRRQ identification. From
2209 * now on tasklet completes most of the commands as IOA is up
2210 * and intrs are enabled
2211 */
2212 pmcraid_identify_hrrq(cmd);
2213 break;
2214
2215 case IOA_STATE_IN_BRINGUP:
2216 /* we are done with bringing up of IOA, change the ioa_state to
2217 * operational and wake up any waiters
2218 */
2219 pinstance->ioa_state = IOA_STATE_OPERATIONAL;
2220 reset_complete = 1;
2221 break;
2222
2223 case IOA_STATE_OPERATIONAL:
2224 default:
2225 /* When IOA is operational and a reset is requested, check for
2226 * the reset reason. If reset is to bring down IOA, unregister
2227 * HCAMs and initiate shutdown; if adapter reset is forced then
2228 * restart reset sequence again
2229 */
2230 if (pinstance->ioa_shutdown_type == SHUTDOWN_NONE &&
2231 pinstance->force_ioa_reset == 0) {
c20c4267
AR
2232 pmcraid_notify_ioastate(pinstance,
2233 PMC_DEVICE_EVENT_RESET_SUCCESS);
89a36810
AR
2234 reset_complete = 1;
2235 } else {
2236 if (pinstance->ioa_shutdown_type != SHUTDOWN_NONE)
2237 pinstance->ioa_state = IOA_STATE_IN_BRINGDOWN;
2238 pmcraid_reinit_cmdblk(cmd);
2239 pmcraid_unregister_hcams(cmd);
2240 }
2241 break;
2242 }
2243
2244 /* reset will be completed if ioa_state is either DEAD or UNKNOWN or
2245 * OPERATIONAL. Reset all control variables used during reset, wake up
2246 * any waiting threads and let the SCSI mid-layer send commands. Note
2247 * that host_lock must be held before invoking scsi_report_bus_reset.
2248 */
2249 if (reset_complete) {
2250 pinstance->ioa_reset_in_progress = 0;
2251 pinstance->ioa_reset_attempts = 0;
2252 pinstance->reset_cmd = NULL;
2253 pinstance->ioa_shutdown_type = SHUTDOWN_NONE;
2254 pinstance->ioa_bringdown = 0;
2255 pmcraid_return_cmd(cmd);
2256
2257 /* If target state is to bring up the adapter, proceed with
2258 * hcam registration and resource exposure to mid-layer.
2259 */
2260 if (pinstance->ioa_state == IOA_STATE_OPERATIONAL)
2261 pmcraid_register_hcams(pinstance);
2262
2263 wake_up_all(&pinstance->reset_wait_q);
2264 }
2265
2266 return;
2267}
2268
2269/**
2270 * pmcraid_initiate_reset - initiates reset sequence. This is called from
2271 * ISR/tasklet during error interrupts including IOA unit check. If reset
2272 * is already in progress, it just returns, otherwise initiates IOA reset
2273 * to bring IOA up to operational state.
2274 *
2275 * @pinstance: pointer to adapter instance structure
2276 *
2277 * Return value
2278 * none
2279 */
2280static void pmcraid_initiate_reset(struct pmcraid_instance *pinstance)
2281{
2282 struct pmcraid_cmd *cmd;
2283
2284 /* If the reset is already in progress, just return, otherwise start
2285 * reset sequence and return
2286 */
2287 if (!pinstance->ioa_reset_in_progress) {
2288 scsi_block_requests(pinstance->host);
2289 cmd = pmcraid_get_free_cmd(pinstance);
2290
2291 if (cmd == NULL) {
2292 pmcraid_err("no cmnd blocks for initiate_reset\n");
2293 return;
2294 }
2295
2296 pinstance->ioa_shutdown_type = SHUTDOWN_NONE;
2297 pinstance->reset_cmd = cmd;
2298 pinstance->force_ioa_reset = 1;
c20c4267
AR
2299 pmcraid_notify_ioastate(pinstance,
2300 PMC_DEVICE_EVENT_RESET_START);
89a36810
AR
2301 pmcraid_ioa_reset(cmd);
2302 }
2303}
2304
2305/**
2306 * pmcraid_reset_reload - utility routine for doing IOA reset either to bringup
2307 * or bringdown IOA
2308 * @pinstance: pointer adapter instance structure
2309 * @shutdown_type: shutdown type to be used NONE, NORMAL or ABRREV
2310 * @target_state: expected target state after reset
2311 *
2312 * Note: This command initiates reset and waits for its completion. Hence this
2313 * should not be called from isr/timer/tasklet functions (timeout handlers,
2314 * error response handlers and interrupt handlers).
2315 *
2316 * Return Value
2317 * 1 in case ioa_state is not target_state, 0 otherwise.
2318 */
2319static int pmcraid_reset_reload(
2320 struct pmcraid_instance *pinstance,
2321 u8 shutdown_type,
2322 u8 target_state
2323)
2324{
2325 struct pmcraid_cmd *reset_cmd = NULL;
2326 unsigned long lock_flags;
2327 int reset = 1;
2328
2329 spin_lock_irqsave(pinstance->host->host_lock, lock_flags);
2330
2331 if (pinstance->ioa_reset_in_progress) {
2332 pmcraid_info("reset_reload: reset is already in progress\n");
2333
2334 spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
2335
2336 wait_event(pinstance->reset_wait_q,
2337 !pinstance->ioa_reset_in_progress);
2338
2339 spin_lock_irqsave(pinstance->host->host_lock, lock_flags);
2340
2341 if (pinstance->ioa_state == IOA_STATE_DEAD) {
89a36810 2342 pmcraid_info("reset_reload: IOA is dead\n");
91402608
CH
2343 goto out_unlock;
2344 }
2345
2346 if (pinstance->ioa_state == target_state) {
89a36810 2347 reset = 0;
91402608 2348 goto out_unlock;
89a36810
AR
2349 }
2350 }
2351
91402608
CH
2352 pmcraid_info("reset_reload: proceeding with reset\n");
2353 scsi_block_requests(pinstance->host);
2354 reset_cmd = pmcraid_get_free_cmd(pinstance);
2355 if (reset_cmd == NULL) {
2356 pmcraid_err("no free cmnd for reset_reload\n");
2357 goto out_unlock;
2358 }
89a36810 2359
91402608
CH
2360 if (shutdown_type == SHUTDOWN_NORMAL)
2361 pinstance->ioa_bringdown = 1;
89a36810 2362
91402608
CH
2363 pinstance->ioa_shutdown_type = shutdown_type;
2364 pinstance->reset_cmd = reset_cmd;
2365 pinstance->force_ioa_reset = reset;
2366 pmcraid_info("reset_reload: initiating reset\n");
2367 pmcraid_ioa_reset(reset_cmd);
2368 spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
2369 pmcraid_info("reset_reload: waiting for reset to complete\n");
2370 wait_event(pinstance->reset_wait_q,
2371 !pinstance->ioa_reset_in_progress);
89a36810 2372
91402608
CH
2373 pmcraid_info("reset_reload: reset is complete !!\n");
2374 scsi_unblock_requests(pinstance->host);
2375 return pinstance->ioa_state != target_state;
89a36810 2376
91402608
CH
2377out_unlock:
2378 spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
89a36810
AR
2379 return reset;
2380}
2381
2382/**
2383 * pmcraid_reset_bringdown - wrapper over pmcraid_reset_reload to bringdown IOA
2384 *
2385 * @pinstance: pointer to adapter instance structure
2386 *
2387 * Return Value
2388 * whatever is returned from pmcraid_reset_reload
2389 */
2390static int pmcraid_reset_bringdown(struct pmcraid_instance *pinstance)
2391{
2392 return pmcraid_reset_reload(pinstance,
2393 SHUTDOWN_NORMAL,
2394 IOA_STATE_UNKNOWN);
2395}
2396
2397/**
2398 * pmcraid_reset_bringup - wrapper over pmcraid_reset_reload to bring up IOA
2399 *
2400 * @pinstance: pointer to adapter instance structure
2401 *
2402 * Return Value
2403 * whatever is returned from pmcraid_reset_reload
2404 */
2405static int pmcraid_reset_bringup(struct pmcraid_instance *pinstance)
2406{
c20c4267
AR
2407 pmcraid_notify_ioastate(pinstance, PMC_DEVICE_EVENT_RESET_START);
2408
89a36810
AR
2409 return pmcraid_reset_reload(pinstance,
2410 SHUTDOWN_NONE,
2411 IOA_STATE_OPERATIONAL);
2412}
2413
2414/**
2415 * pmcraid_request_sense - Send request sense to a device
2416 * @cmd: pmcraid command struct
2417 *
2418 * This function sends a request sense to a device as a result of a check
2419 * condition. This method re-uses the same command block that failed earlier.
2420 */
2421static void pmcraid_request_sense(struct pmcraid_cmd *cmd)
2422{
2423 struct pmcraid_ioarcb *ioarcb = &cmd->ioa_cb->ioarcb;
2424 struct pmcraid_ioadl_desc *ioadl = ioarcb->add_data.u.ioadl;
a9b9e3ad 2425 struct device *dev = &cmd->drv_inst->pdev->dev;
89a36810 2426
a9b9e3ad
CH
2427 cmd->sense_buffer = cmd->scsi_cmd->sense_buffer;
2428 cmd->sense_buffer_dma = dma_map_single(dev, cmd->sense_buffer,
2429 SCSI_SENSE_BUFFERSIZE, DMA_FROM_DEVICE);
2430 if (dma_mapping_error(dev, cmd->sense_buffer_dma)) {
89a36810
AR
2431 pmcraid_err
2432 ("couldn't allocate sense buffer for request sense\n");
2433 pmcraid_erp_done(cmd);
2434 return;
2435 }
2436
2437 /* re-use the command block */
2438 memset(&cmd->ioa_cb->ioasa, 0, sizeof(struct pmcraid_ioasa));
2439 memset(ioarcb->cdb, 0, PMCRAID_MAX_CDB_LEN);
2440 ioarcb->request_flags0 = (SYNC_COMPLETE |
2441 NO_LINK_DESCS |
2442 INHIBIT_UL_CHECK);
2443 ioarcb->request_type = REQ_TYPE_SCSI;
2444 ioarcb->cdb[0] = REQUEST_SENSE;
2445 ioarcb->cdb[4] = SCSI_SENSE_BUFFERSIZE;
2446
2447 ioarcb->ioadl_bus_addr = cpu_to_le64((cmd->ioa_cb_bus_addr) +
2448 offsetof(struct pmcraid_ioarcb,
2449 add_data.u.ioadl[0]));
2450 ioarcb->ioadl_length = cpu_to_le32(sizeof(struct pmcraid_ioadl_desc));
2451
2452 ioarcb->data_transfer_length = cpu_to_le32(SCSI_SENSE_BUFFERSIZE);
2453
2454 ioadl->address = cpu_to_le64(cmd->sense_buffer_dma);
2455 ioadl->data_len = cpu_to_le32(SCSI_SENSE_BUFFERSIZE);
88197966 2456 ioadl->flags = IOADL_FLAGS_LAST_DESC;
89a36810
AR
2457
2458 /* request sense might be called as part of error response processing
2459 * which runs in tasklets context. It is possible that mid-layer might
2460 * schedule queuecommand during this time, hence, writting to IOARRIN
2461 * must be protect by host_lock
2462 */
2463 pmcraid_send_cmd(cmd, pmcraid_erp_done,
2464 PMCRAID_REQUEST_SENSE_TIMEOUT,
2465 pmcraid_timeout_handler);
2466}
2467
2468/**
2469 * pmcraid_cancel_all - cancel all outstanding IOARCBs as part of error recovery
2470 * @cmd: command that failed
203654b4 2471 * @need_sense: true if request_sense is required after cancel all
89a36810
AR
2472 *
2473 * This function sends a cancel all to a device to clear the queue.
2474 */
203654b4 2475static void pmcraid_cancel_all(struct pmcraid_cmd *cmd, bool need_sense)
89a36810
AR
2476{
2477 struct scsi_cmnd *scsi_cmd = cmd->scsi_cmd;
2478 struct pmcraid_ioarcb *ioarcb = &cmd->ioa_cb->ioarcb;
2479 struct pmcraid_resource_entry *res = scsi_cmd->device->hostdata;
89a36810
AR
2480
2481 memset(ioarcb->cdb, 0, PMCRAID_MAX_CDB_LEN);
2482 ioarcb->request_flags0 = SYNC_OVERRIDE;
2483 ioarcb->request_type = REQ_TYPE_IOACMD;
2484 ioarcb->cdb[0] = PMCRAID_CANCEL_ALL_REQUESTS;
2485
2486 if (RES_IS_GSCSI(res->cfg_entry))
2487 ioarcb->cdb[1] = PMCRAID_SYNC_COMPLETE_AFTER_CANCEL;
2488
2489 ioarcb->ioadl_bus_addr = 0;
2490 ioarcb->ioadl_length = 0;
2491 ioarcb->data_transfer_length = 0;
45c80be6 2492 ioarcb->ioarcb_bus_addr &= cpu_to_le64((~0x1FULL));
89a36810
AR
2493
2494 /* writing to IOARRIN must be protected by host_lock, as mid-layer
2495 * schedule queuecommand while we are doing this
2496 */
203654b4
CH
2497 pmcraid_send_cmd(cmd, need_sense ?
2498 pmcraid_erp_done : pmcraid_request_sense,
89a36810
AR
2499 PMCRAID_REQUEST_SENSE_TIMEOUT,
2500 pmcraid_timeout_handler);
2501}
2502
2503/**
2504 * pmcraid_frame_auto_sense: frame fixed format sense information
2505 *
2506 * @cmd: pointer to failing command block
2507 *
2508 * Return value
2509 * none
2510 */
2511static void pmcraid_frame_auto_sense(struct pmcraid_cmd *cmd)
2512{
2513 u8 *sense_buf = cmd->scsi_cmd->sense_buffer;
2514 struct pmcraid_resource_entry *res = cmd->scsi_cmd->device->hostdata;
2515 struct pmcraid_ioasa *ioasa = &cmd->ioa_cb->ioasa;
2516 u32 ioasc = le32_to_cpu(ioasa->ioasc);
2517 u32 failing_lba = 0;
2518
2519 memset(sense_buf, 0, SCSI_SENSE_BUFFERSIZE);
2520 cmd->scsi_cmd->result = SAM_STAT_CHECK_CONDITION;
2521
2522 if (RES_IS_VSET(res->cfg_entry) &&
2523 ioasc == PMCRAID_IOASC_ME_READ_ERROR_NO_REALLOC &&
2524 ioasa->u.vset.failing_lba_hi != 0) {
2525
2526 sense_buf[0] = 0x72;
2527 sense_buf[1] = PMCRAID_IOASC_SENSE_KEY(ioasc);
2528 sense_buf[2] = PMCRAID_IOASC_SENSE_CODE(ioasc);
2529 sense_buf[3] = PMCRAID_IOASC_SENSE_QUAL(ioasc);
2530
2531 sense_buf[7] = 12;
2532 sense_buf[8] = 0;
2533 sense_buf[9] = 0x0A;
2534 sense_buf[10] = 0x80;
2535
2536 failing_lba = le32_to_cpu(ioasa->u.vset.failing_lba_hi);
2537
2538 sense_buf[12] = (failing_lba & 0xff000000) >> 24;
2539 sense_buf[13] = (failing_lba & 0x00ff0000) >> 16;
2540 sense_buf[14] = (failing_lba & 0x0000ff00) >> 8;
2541 sense_buf[15] = failing_lba & 0x000000ff;
2542
2543 failing_lba = le32_to_cpu(ioasa->u.vset.failing_lba_lo);
2544
2545 sense_buf[16] = (failing_lba & 0xff000000) >> 24;
2546 sense_buf[17] = (failing_lba & 0x00ff0000) >> 16;
2547 sense_buf[18] = (failing_lba & 0x0000ff00) >> 8;
2548 sense_buf[19] = failing_lba & 0x000000ff;
2549 } else {
2550 sense_buf[0] = 0x70;
2551 sense_buf[2] = PMCRAID_IOASC_SENSE_KEY(ioasc);
2552 sense_buf[12] = PMCRAID_IOASC_SENSE_CODE(ioasc);
2553 sense_buf[13] = PMCRAID_IOASC_SENSE_QUAL(ioasc);
2554
2555 if (ioasc == PMCRAID_IOASC_ME_READ_ERROR_NO_REALLOC) {
2556 if (RES_IS_VSET(res->cfg_entry))
2557 failing_lba =
2558 le32_to_cpu(ioasa->u.
2559 vset.failing_lba_lo);
2560 sense_buf[0] |= 0x80;
2561 sense_buf[3] = (failing_lba >> 24) & 0xff;
2562 sense_buf[4] = (failing_lba >> 16) & 0xff;
2563 sense_buf[5] = (failing_lba >> 8) & 0xff;
2564 sense_buf[6] = failing_lba & 0xff;
2565 }
2566
2567 sense_buf[7] = 6; /* additional length */
2568 }
2569}
2570
2571/**
2572 * pmcraid_error_handler - Error response handlers for a SCSI op
2573 * @cmd: pointer to pmcraid_cmd that has failed
2574 *
2575 * This function determines whether or not to initiate ERP on the affected
2576 * device. This is called from a tasklet, which doesn't hold any locks.
2577 *
2578 * Return value:
2579 * 0 it caller can complete the request, otherwise 1 where in error
2580 * handler itself completes the request and returns the command block
2581 * back to free-pool
2582 */
2583static int pmcraid_error_handler(struct pmcraid_cmd *cmd)
2584{
2585 struct scsi_cmnd *scsi_cmd = cmd->scsi_cmd;
2586 struct pmcraid_resource_entry *res = scsi_cmd->device->hostdata;
2587 struct pmcraid_instance *pinstance = cmd->drv_inst;
2588 struct pmcraid_ioasa *ioasa = &cmd->ioa_cb->ioasa;
2589 u32 ioasc = le32_to_cpu(ioasa->ioasc);
2590 u32 masked_ioasc = ioasc & PMCRAID_IOASC_SENSE_MASK;
203654b4 2591 bool sense_copied = false;
89a36810
AR
2592
2593 if (!res) {
2594 pmcraid_info("resource pointer is NULL\n");
2595 return 0;
2596 }
2597
2598 /* If this was a SCSI read/write command keep count of errors */
2599 if (SCSI_CMD_TYPE(scsi_cmd->cmnd[0]) == SCSI_READ_CMD)
2600 atomic_inc(&res->read_failures);
2601 else if (SCSI_CMD_TYPE(scsi_cmd->cmnd[0]) == SCSI_WRITE_CMD)
2602 atomic_inc(&res->write_failures);
2603
2604 if (!RES_IS_GSCSI(res->cfg_entry) &&
2605 masked_ioasc != PMCRAID_IOASC_HW_DEVICE_BUS_STATUS_ERROR) {
2606 pmcraid_frame_auto_sense(cmd);
2607 }
2608
2609 /* Log IOASC/IOASA information based on user settings */
2610 pmcraid_ioasc_logger(ioasc, cmd);
2611
2612 switch (masked_ioasc) {
2613
2614 case PMCRAID_IOASC_AC_TERMINATED_BY_HOST:
2615 scsi_cmd->result |= (DID_ABORT << 16);
2616 break;
2617
2618 case PMCRAID_IOASC_IR_INVALID_RESOURCE_HANDLE:
2619 case PMCRAID_IOASC_HW_CANNOT_COMMUNICATE:
2620 scsi_cmd->result |= (DID_NO_CONNECT << 16);
2621 break;
2622
2623 case PMCRAID_IOASC_NR_SYNC_REQUIRED:
2624 res->sync_reqd = 1;
2625 scsi_cmd->result |= (DID_IMM_RETRY << 16);
2626 break;
2627
2628 case PMCRAID_IOASC_ME_READ_ERROR_NO_REALLOC:
2629 scsi_cmd->result |= (DID_PASSTHROUGH << 16);
2630 break;
2631
2632 case PMCRAID_IOASC_UA_BUS_WAS_RESET:
2633 case PMCRAID_IOASC_UA_BUS_WAS_RESET_BY_OTHER:
2634 if (!res->reset_progress)
2635 scsi_report_bus_reset(pinstance->host,
2636 scsi_cmd->device->channel);
2637 scsi_cmd->result |= (DID_ERROR << 16);
2638 break;
2639
2640 case PMCRAID_IOASC_HW_DEVICE_BUS_STATUS_ERROR:
2641 scsi_cmd->result |= PMCRAID_IOASC_SENSE_STATUS(ioasc);
2642 res->sync_reqd = 1;
2643
2644 /* if check_condition is not active return with error otherwise
2645 * get/frame the sense buffer
2646 */
2647 if (PMCRAID_IOASC_SENSE_STATUS(ioasc) !=
2648 SAM_STAT_CHECK_CONDITION &&
2649 PMCRAID_IOASC_SENSE_STATUS(ioasc) != SAM_STAT_ACA_ACTIVE)
2650 return 0;
2651
2652 /* If we have auto sense data as part of IOASA pass it to
2653 * mid-layer
2654 */
2655 if (ioasa->auto_sense_length != 0) {
45c80be6
AB
2656 short sense_len = le16_to_cpu(ioasa->auto_sense_length);
2657 int data_size = min_t(u16, sense_len,
89a36810
AR
2658 SCSI_SENSE_BUFFERSIZE);
2659
2660 memcpy(scsi_cmd->sense_buffer,
2661 ioasa->sense_data,
2662 data_size);
203654b4 2663 sense_copied = true;
89a36810
AR
2664 }
2665
a70757ba 2666 if (RES_IS_GSCSI(res->cfg_entry))
89a36810 2667 pmcraid_cancel_all(cmd, sense_copied);
a70757ba 2668 else if (sense_copied)
89a36810 2669 pmcraid_erp_done(cmd);
a70757ba 2670 else
89a36810 2671 pmcraid_request_sense(cmd);
89a36810
AR
2672
2673 return 1;
2674
2675 case PMCRAID_IOASC_NR_INIT_CMD_REQUIRED:
2676 break;
2677
2678 default:
2679 if (PMCRAID_IOASC_SENSE_KEY(ioasc) > RECOVERED_ERROR)
2680 scsi_cmd->result |= (DID_ERROR << 16);
2681 break;
2682 }
2683 return 0;
2684}
2685
2686/**
2687 * pmcraid_reset_device - device reset handler functions
2688 *
2689 * @scsi_cmd: scsi command struct
2690 * @modifier: reset modifier indicating the reset sequence to be performed
2691 *
2692 * This function issues a device reset to the affected device.
2693 * A LUN reset will be sent to the device first. If that does
2694 * not work, a target reset will be sent.
2695 *
2696 * Return value:
2697 * SUCCESS / FAILED
2698 */
2699static int pmcraid_reset_device(
2700 struct scsi_cmnd *scsi_cmd,
2701 unsigned long timeout,
2702 u8 modifier
2703)
2704{
2705 struct pmcraid_cmd *cmd;
2706 struct pmcraid_instance *pinstance;
2707 struct pmcraid_resource_entry *res;
2708 struct pmcraid_ioarcb *ioarcb;
2709 unsigned long lock_flags;
2710 u32 ioasc;
2711
2712 pinstance =
2713 (struct pmcraid_instance *)scsi_cmd->device->host->hostdata;
2714 res = scsi_cmd->device->hostdata;
2715
2716 if (!res) {
34876402
AR
2717 sdev_printk(KERN_ERR, scsi_cmd->device,
2718 "reset_device: NULL resource pointer\n");
89a36810
AR
2719 return FAILED;
2720 }
2721
2722 /* If adapter is currently going through reset/reload, return failed.
2723 * This will force the mid-layer to call _eh_bus/host reset, which
2724 * will then go to sleep and wait for the reset to complete
2725 */
2726 spin_lock_irqsave(pinstance->host->host_lock, lock_flags);
2727 if (pinstance->ioa_reset_in_progress ||
2728 pinstance->ioa_state == IOA_STATE_DEAD) {
2729 spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
2730 return FAILED;
2731 }
2732
2733 res->reset_progress = 1;
2734 pmcraid_info("Resetting %s resource with addr %x\n",
2735 ((modifier & RESET_DEVICE_LUN) ? "LUN" :
2736 ((modifier & RESET_DEVICE_TARGET) ? "TARGET" : "BUS")),
2737 le32_to_cpu(res->cfg_entry.resource_address));
2738
2739 /* get a free cmd block */
2740 cmd = pmcraid_get_free_cmd(pinstance);
2741
2742 if (cmd == NULL) {
2743 spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
2744 pmcraid_err("%s: no cmd blocks are available\n", __func__);
2745 return FAILED;
2746 }
2747
2748 ioarcb = &cmd->ioa_cb->ioarcb;
2749 ioarcb->resource_handle = res->cfg_entry.resource_handle;
2750 ioarcb->request_type = REQ_TYPE_IOACMD;
2751 ioarcb->cdb[0] = PMCRAID_RESET_DEVICE;
2752
2753 /* Initialize reset modifier bits */
2754 if (modifier)
2755 modifier = ENABLE_RESET_MODIFIER | modifier;
2756
2757 ioarcb->cdb[1] = modifier;
2758
2759 init_completion(&cmd->wait_for_completion);
2760 cmd->completion_req = 1;
2761
2762 pmcraid_info("cmd(CDB[0] = %x) for %x with index = %d\n",
2763 cmd->ioa_cb->ioarcb.cdb[0],
2764 le32_to_cpu(cmd->ioa_cb->ioarcb.resource_handle),
2765 le32_to_cpu(cmd->ioa_cb->ioarcb.response_handle) >> 2);
2766
2767 pmcraid_send_cmd(cmd,
2768 pmcraid_internal_done,
2769 timeout,
2770 pmcraid_timeout_handler);
2771
2772 spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
2773
2774 /* RESET_DEVICE command completes after all pending IOARCBs are
2775 * completed. Once this command is completed, pmcraind_internal_done
2776 * will wake up the 'completion' queue.
2777 */
2778 wait_for_completion(&cmd->wait_for_completion);
2779
2780 /* complete the command here itself and return the command block
2781 * to free list
2782 */
2783 pmcraid_return_cmd(cmd);
2784 res->reset_progress = 0;
2785 ioasc = le32_to_cpu(cmd->ioa_cb->ioasa.ioasc);
2786
2787 /* set the return value based on the returned ioasc */
2788 return PMCRAID_IOASC_SENSE_KEY(ioasc) ? FAILED : SUCCESS;
2789}
2790
2791/**
2792 * _pmcraid_io_done - helper for pmcraid_io_done function
2793 *
2794 * @cmd: pointer to pmcraid command struct
2795 * @reslen: residual data length to be set in the ioasa
2796 * @ioasc: ioasc either returned by IOA or set by driver itself.
2797 *
2798 * This function is invoked by pmcraid_io_done to complete mid-layer
2799 * scsi ops.
2800 *
2801 * Return value:
2802 * 0 if caller is required to return it to free_pool. Returns 1 if
2803 * caller need not worry about freeing command block as error handler
2804 * will take care of that.
2805 */
2806
2807static int _pmcraid_io_done(struct pmcraid_cmd *cmd, int reslen, int ioasc)
2808{
2809 struct scsi_cmnd *scsi_cmd = cmd->scsi_cmd;
2810 int rc = 0;
2811
2812 scsi_set_resid(scsi_cmd, reslen);
2813
2814 pmcraid_info("response(%d) CDB[0] = %x ioasc:result: %x:%x\n",
2815 le32_to_cpu(cmd->ioa_cb->ioarcb.response_handle) >> 2,
2816 cmd->ioa_cb->ioarcb.cdb[0],
2817 ioasc, scsi_cmd->result);
2818
2819 if (PMCRAID_IOASC_SENSE_KEY(ioasc) != 0)
2820 rc = pmcraid_error_handler(cmd);
2821
2822 if (rc == 0) {
2823 scsi_dma_unmap(scsi_cmd);
2824 scsi_cmd->scsi_done(scsi_cmd);
2825 }
2826
2827 return rc;
2828}
2829
2830/**
2831 * pmcraid_io_done - SCSI completion function
2832 *
2833 * @cmd: pointer to pmcraid command struct
2834 *
2835 * This function is invoked by tasklet/mid-layer error handler to completing
2836 * the SCSI ops sent from mid-layer.
2837 *
2838 * Return value
2839 * none
2840 */
2841
2842static void pmcraid_io_done(struct pmcraid_cmd *cmd)
2843{
2844 u32 ioasc = le32_to_cpu(cmd->ioa_cb->ioasa.ioasc);
2845 u32 reslen = le32_to_cpu(cmd->ioa_cb->ioasa.residual_data_length);
2846
2847 if (_pmcraid_io_done(cmd, reslen, ioasc) == 0)
2848 pmcraid_return_cmd(cmd);
2849}
2850
2851/**
2852 * pmcraid_abort_cmd - Aborts a single IOARCB already submitted to IOA
2853 *
2854 * @cmd: command block of the command to be aborted
2855 *
2856 * Return Value:
2857 * returns pointer to command structure used as cancelling cmd
2858 */
2859static struct pmcraid_cmd *pmcraid_abort_cmd(struct pmcraid_cmd *cmd)
2860{
2861 struct pmcraid_cmd *cancel_cmd;
2862 struct pmcraid_instance *pinstance;
2863 struct pmcraid_resource_entry *res;
2864
2865 pinstance = (struct pmcraid_instance *)cmd->drv_inst;
2866 res = cmd->scsi_cmd->device->hostdata;
2867
2868 cancel_cmd = pmcraid_get_free_cmd(pinstance);
2869
2870 if (cancel_cmd == NULL) {
2871 pmcraid_err("%s: no cmd blocks are available\n", __func__);
2872 return NULL;
2873 }
2874
2875 pmcraid_prepare_cancel_cmd(cancel_cmd, cmd);
2876
2877 pmcraid_info("aborting command CDB[0]= %x with index = %d\n",
2878 cmd->ioa_cb->ioarcb.cdb[0],
45c80be6 2879 le32_to_cpu(cmd->ioa_cb->ioarcb.response_handle) >> 2);
89a36810
AR
2880
2881 init_completion(&cancel_cmd->wait_for_completion);
2882 cancel_cmd->completion_req = 1;
2883
2884 pmcraid_info("command (%d) CDB[0] = %x for %x\n",
2885 le32_to_cpu(cancel_cmd->ioa_cb->ioarcb.response_handle) >> 2,
c20c4267 2886 cancel_cmd->ioa_cb->ioarcb.cdb[0],
89a36810
AR
2887 le32_to_cpu(cancel_cmd->ioa_cb->ioarcb.resource_handle));
2888
2889 pmcraid_send_cmd(cancel_cmd,
2890 pmcraid_internal_done,
2891 PMCRAID_INTERNAL_TIMEOUT,
2892 pmcraid_timeout_handler);
2893 return cancel_cmd;
2894}
2895
2896/**
2897 * pmcraid_abort_complete - Waits for ABORT TASK completion
2898 *
2899 * @cancel_cmd: command block use as cancelling command
2900 *
2901 * Return Value:
2902 * returns SUCCESS if ABORT TASK has good completion
2903 * otherwise FAILED
2904 */
2905static int pmcraid_abort_complete(struct pmcraid_cmd *cancel_cmd)
2906{
2907 struct pmcraid_resource_entry *res;
2908 u32 ioasc;
2909
2910 wait_for_completion(&cancel_cmd->wait_for_completion);
c20c4267
AR
2911 res = cancel_cmd->res;
2912 cancel_cmd->res = NULL;
89a36810
AR
2913 ioasc = le32_to_cpu(cancel_cmd->ioa_cb->ioasa.ioasc);
2914
2915 /* If the abort task is not timed out we will get a Good completion
2916 * as sense_key, otherwise we may get one the following responses
25985edc 2917 * due to subsequent bus reset or device reset. In case IOASC is
89a36810
AR
2918 * NR_SYNC_REQUIRED, set sync_reqd flag for the corresponding resource
2919 */
2920 if (ioasc == PMCRAID_IOASC_UA_BUS_WAS_RESET ||
2921 ioasc == PMCRAID_IOASC_NR_SYNC_REQUIRED) {
2922 if (ioasc == PMCRAID_IOASC_NR_SYNC_REQUIRED)
2923 res->sync_reqd = 1;
2924 ioasc = 0;
2925 }
2926
2927 /* complete the command here itself */
2928 pmcraid_return_cmd(cancel_cmd);
2929 return PMCRAID_IOASC_SENSE_KEY(ioasc) ? FAILED : SUCCESS;
2930}
2931
2932/**
2933 * pmcraid_eh_abort_handler - entry point for aborting a single task on errors
2934 *
2935 * @scsi_cmd: scsi command struct given by mid-layer. When this is called
2936 * mid-layer ensures that no other commands are queued. This
2937 * never gets called under interrupt, but a separate eh thread.
2938 *
2939 * Return value:
2940 * SUCCESS / FAILED
2941 */
2942static int pmcraid_eh_abort_handler(struct scsi_cmnd *scsi_cmd)
2943{
2944 struct pmcraid_instance *pinstance;
2945 struct pmcraid_cmd *cmd;
2946 struct pmcraid_resource_entry *res;
2947 unsigned long host_lock_flags;
2948 unsigned long pending_lock_flags;
2949 struct pmcraid_cmd *cancel_cmd = NULL;
2950 int cmd_found = 0;
2951 int rc = FAILED;
2952
2953 pinstance =
2954 (struct pmcraid_instance *)scsi_cmd->device->host->hostdata;
2955
34876402
AR
2956 scmd_printk(KERN_INFO, scsi_cmd,
2957 "I/O command timed out, aborting it.\n");
89a36810
AR
2958
2959 res = scsi_cmd->device->hostdata;
2960
2961 if (res == NULL)
2962 return rc;
2963
2964 /* If we are currently going through reset/reload, return failed.
2965 * This will force the mid-layer to eventually call
2966 * pmcraid_eh_host_reset which will then go to sleep and wait for the
2967 * reset to complete
2968 */
2969 spin_lock_irqsave(pinstance->host->host_lock, host_lock_flags);
2970
2971 if (pinstance->ioa_reset_in_progress ||
2972 pinstance->ioa_state == IOA_STATE_DEAD) {
2973 spin_unlock_irqrestore(pinstance->host->host_lock,
2974 host_lock_flags);
2975 return rc;
2976 }
2977
2978 /* loop over pending cmd list to find cmd corresponding to this
2979 * scsi_cmd. Note that this command might not have been completed
2980 * already. locking: all pending commands are protected with
2981 * pending_pool_lock.
2982 */
2983 spin_lock_irqsave(&pinstance->pending_pool_lock, pending_lock_flags);
2984 list_for_each_entry(cmd, &pinstance->pending_cmd_pool, free_list) {
2985
2986 if (cmd->scsi_cmd == scsi_cmd) {
2987 cmd_found = 1;
2988 break;
2989 }
2990 }
2991
2992 spin_unlock_irqrestore(&pinstance->pending_pool_lock,
2993 pending_lock_flags);
2994
2995 /* If the command to be aborted was given to IOA and still pending with
2996 * it, send ABORT_TASK to abort this and wait for its completion
2997 */
2998 if (cmd_found)
2999 cancel_cmd = pmcraid_abort_cmd(cmd);
3000
3001 spin_unlock_irqrestore(pinstance->host->host_lock,
3002 host_lock_flags);
3003
3004 if (cancel_cmd) {
c20c4267 3005 cancel_cmd->res = cmd->scsi_cmd->device->hostdata;
89a36810
AR
3006 rc = pmcraid_abort_complete(cancel_cmd);
3007 }
3008
3009 return cmd_found ? rc : SUCCESS;
3010}
3011
3012/**
3013 * pmcraid_eh_xxxx_reset_handler - bus/target/device reset handler callbacks
3014 *
3015 * @scmd: pointer to scsi_cmd that was sent to the resource to be reset.
3016 *
3017 * All these routines invokve pmcraid_reset_device with appropriate parameters.
3018 * Since these are called from mid-layer EH thread, no other IO will be queued
3019 * to the resource being reset. However, control path (IOCTL) may be active so
3020 * it is necessary to synchronize IOARRIN writes which pmcraid_reset_device
3021 * takes care by locking/unlocking host_lock.
3022 *
3023 * Return value
c20c4267 3024 * SUCCESS or FAILED
89a36810
AR
3025 */
3026static int pmcraid_eh_device_reset_handler(struct scsi_cmnd *scmd)
3027{
34876402
AR
3028 scmd_printk(KERN_INFO, scmd,
3029 "resetting device due to an I/O command timeout.\n");
89a36810
AR
3030 return pmcraid_reset_device(scmd,
3031 PMCRAID_INTERNAL_TIMEOUT,
3032 RESET_DEVICE_LUN);
3033}
3034
3035static int pmcraid_eh_bus_reset_handler(struct scsi_cmnd *scmd)
3036{
34876402
AR
3037 scmd_printk(KERN_INFO, scmd,
3038 "Doing bus reset due to an I/O command timeout.\n");
89a36810
AR
3039 return pmcraid_reset_device(scmd,
3040 PMCRAID_RESET_BUS_TIMEOUT,
3041 RESET_DEVICE_BUS);
3042}
3043
3044static int pmcraid_eh_target_reset_handler(struct scsi_cmnd *scmd)
3045{
34876402
AR
3046 scmd_printk(KERN_INFO, scmd,
3047 "Doing target reset due to an I/O command timeout.\n");
89a36810
AR
3048 return pmcraid_reset_device(scmd,
3049 PMCRAID_INTERNAL_TIMEOUT,
3050 RESET_DEVICE_TARGET);
3051}
3052
3053/**
3054 * pmcraid_eh_host_reset_handler - adapter reset handler callback
3055 *
3056 * @scmd: pointer to scsi_cmd that was sent to a resource of adapter
3057 *
3058 * Initiates adapter reset to bring it up to operational state
3059 *
3060 * Return value
c20c4267 3061 * SUCCESS or FAILED
89a36810
AR
3062 */
3063static int pmcraid_eh_host_reset_handler(struct scsi_cmnd *scmd)
3064{
3065 unsigned long interval = 10000; /* 10 seconds interval */
3066 int waits = jiffies_to_msecs(PMCRAID_RESET_HOST_TIMEOUT) / interval;
3067 struct pmcraid_instance *pinstance =
3068 (struct pmcraid_instance *)(scmd->device->host->hostdata);
3069
3070
3071 /* wait for an additional 150 seconds just in case firmware could come
3072 * up and if it could complete all the pending commands excluding the
3073 * two HCAM (CCN and LDN).
3074 */
3075 while (waits--) {
3076 if (atomic_read(&pinstance->outstanding_cmds) <=
3077 PMCRAID_MAX_HCAM_CMD)
3078 return SUCCESS;
3079 msleep(interval);
3080 }
3081
3082 dev_err(&pinstance->pdev->dev,
3083 "Adapter being reset due to an I/O command timeout.\n");
3084 return pmcraid_reset_bringup(pinstance) == 0 ? SUCCESS : FAILED;
3085}
3086
89a36810
AR
3087/**
3088 * pmcraid_init_ioadls - initializes IOADL related fields in IOARCB
3089 * @cmd: pmcraid command struct
3090 * @sgcount: count of scatter-gather elements
3091 *
3092 * Return value
3093 * returns pointer pmcraid_ioadl_desc, initialized to point to internal
3094 * or external IOADLs
3095 */
61b96d5b 3096static struct pmcraid_ioadl_desc *
89a36810
AR
3097pmcraid_init_ioadls(struct pmcraid_cmd *cmd, int sgcount)
3098{
3099 struct pmcraid_ioadl_desc *ioadl;
3100 struct pmcraid_ioarcb *ioarcb = &cmd->ioa_cb->ioarcb;
3101 int ioadl_count = 0;
3102
3103 if (ioarcb->add_cmd_param_length)
45c80be6
AB
3104 ioadl_count = DIV_ROUND_UP(le16_to_cpu(ioarcb->add_cmd_param_length), 16);
3105 ioarcb->ioadl_length = cpu_to_le32(sizeof(struct pmcraid_ioadl_desc) * sgcount);
89a36810
AR
3106
3107 if ((sgcount + ioadl_count) > (ARRAY_SIZE(ioarcb->add_data.u.ioadl))) {
3108 /* external ioadls start at offset 0x80 from control_block
3109 * structure, re-using 24 out of 27 ioadls part of IOARCB.
3110 * It is necessary to indicate to firmware that driver is
3111 * using ioadls to be treated as external to IOARCB.
3112 */
45c80be6 3113 ioarcb->ioarcb_bus_addr &= cpu_to_le64(~(0x1FULL));
89a36810
AR
3114 ioarcb->ioadl_bus_addr =
3115 cpu_to_le64((cmd->ioa_cb_bus_addr) +
3116 offsetof(struct pmcraid_ioarcb,
3117 add_data.u.ioadl[3]));
3118 ioadl = &ioarcb->add_data.u.ioadl[3];
3119 } else {
3120 ioarcb->ioadl_bus_addr =
3121 cpu_to_le64((cmd->ioa_cb_bus_addr) +
3122 offsetof(struct pmcraid_ioarcb,
3123 add_data.u.ioadl[ioadl_count]));
3124
3125 ioadl = &ioarcb->add_data.u.ioadl[ioadl_count];
3126 ioarcb->ioarcb_bus_addr |=
45c80be6 3127 cpu_to_le64(DIV_ROUND_CLOSEST(sgcount + ioadl_count, 8));
89a36810
AR
3128 }
3129
3130 return ioadl;
3131}
3132
3133/**
3134 * pmcraid_build_ioadl - Build a scatter/gather list and map the buffer
3135 * @pinstance: pointer to adapter instance structure
3136 * @cmd: pmcraid command struct
3137 *
3138 * This function is invoked by queuecommand entry point while sending a command
3139 * to firmware. This builds ioadl descriptors and sets up ioarcb fields.
3140 *
3141 * Return value:
c20c4267 3142 * 0 on success or -1 on failure
89a36810
AR
3143 */
3144static int pmcraid_build_ioadl(
3145 struct pmcraid_instance *pinstance,
3146 struct pmcraid_cmd *cmd
3147)
3148{
3149 int i, nseg;
3150 struct scatterlist *sglist;
3151
3152 struct scsi_cmnd *scsi_cmd = cmd->scsi_cmd;
3153 struct pmcraid_ioarcb *ioarcb = &(cmd->ioa_cb->ioarcb);
b22ee87d 3154 struct pmcraid_ioadl_desc *ioadl;
89a36810
AR
3155
3156 u32 length = scsi_bufflen(scsi_cmd);
3157
3158 if (!length)
3159 return 0;
3160
3161 nseg = scsi_dma_map(scsi_cmd);
3162
3163 if (nseg < 0) {
34876402 3164 scmd_printk(KERN_ERR, scsi_cmd, "scsi_map_dma failed!\n");
89a36810
AR
3165 return -1;
3166 } else if (nseg > PMCRAID_MAX_IOADLS) {
3167 scsi_dma_unmap(scsi_cmd);
34876402 3168 scmd_printk(KERN_ERR, scsi_cmd,
89a36810
AR
3169 "sg count is (%d) more than allowed!\n", nseg);
3170 return -1;
3171 }
3172
3173 /* Initialize IOARCB data transfer length fields */
3174 if (scsi_cmd->sc_data_direction == DMA_TO_DEVICE)
3175 ioarcb->request_flags0 |= TRANSFER_DIR_WRITE;
3176
3177 ioarcb->request_flags0 |= NO_LINK_DESCS;
3178 ioarcb->data_transfer_length = cpu_to_le32(length);
3179 ioadl = pmcraid_init_ioadls(cmd, nseg);
3180
3181 /* Initialize IOADL descriptor addresses */
3182 scsi_for_each_sg(scsi_cmd, sglist, nseg, i) {
3183 ioadl[i].data_len = cpu_to_le32(sg_dma_len(sglist));
3184 ioadl[i].address = cpu_to_le64(sg_dma_address(sglist));
3185 ioadl[i].flags = 0;
3186 }
3187 /* setup last descriptor */
88197966 3188 ioadl[i - 1].flags = IOADL_FLAGS_LAST_DESC;
89a36810
AR
3189
3190 return 0;
3191}
3192
3193/**
3194 * pmcraid_free_sglist - Frees an allocated SG buffer list
3195 * @sglist: scatter/gather list pointer
3196 *
3197 * Free a DMA'able memory previously allocated with pmcraid_alloc_sglist
3198 *
3199 * Return value:
c20c4267 3200 * none
89a36810
AR
3201 */
3202static void pmcraid_free_sglist(struct pmcraid_sglist *sglist)
3203{
ed4414ce 3204 sgl_free_order(sglist->scatterlist, sglist->order);
89a36810
AR
3205 kfree(sglist);
3206}
3207
3208/**
3209 * pmcraid_alloc_sglist - Allocates memory for a SG list
3210 * @buflen: buffer length
3211 *
3212 * Allocates a DMA'able buffer in chunks and assembles a scatter/gather
3213 * list.
3214 *
3215 * Return value
c20c4267 3216 * pointer to sglist / NULL on failure
89a36810
AR
3217 */
3218static struct pmcraid_sglist *pmcraid_alloc_sglist(int buflen)
3219{
3220 struct pmcraid_sglist *sglist;
89a36810
AR
3221 int sg_size;
3222 int order;
89a36810
AR
3223
3224 sg_size = buflen / (PMCRAID_MAX_IOADLS - 1);
3225 order = (sg_size > 0) ? get_order(sg_size) : 0;
89a36810
AR
3226
3227 /* Allocate a scatter/gather list for the DMA */
ed4414ce 3228 sglist = kzalloc(sizeof(struct pmcraid_sglist), GFP_KERNEL);
89a36810
AR
3229 if (sglist == NULL)
3230 return NULL;
3231
89a36810 3232 sglist->order = order;
ed4414ce
BVA
3233 sgl_alloc_order(buflen, order, false,
3234 GFP_KERNEL | GFP_DMA | __GFP_ZERO, &sglist->num_sg);
89a36810
AR
3235
3236 return sglist;
3237}
3238
3239/**
3240 * pmcraid_copy_sglist - Copy user buffer to kernel buffer's SG list
3241 * @sglist: scatter/gather list pointer
3242 * @buffer: buffer pointer
3243 * @len: buffer length
3244 * @direction: data transfer direction
3245 *
3246 * Copy a user buffer into a buffer allocated by pmcraid_alloc_sglist
3247 *
3248 * Return value:
3249 * 0 on success / other on failure
3250 */
3251static int pmcraid_copy_sglist(
3252 struct pmcraid_sglist *sglist,
3397623b 3253 void __user *buffer,
89a36810
AR
3254 u32 len,
3255 int direction
3256)
3257{
74eb7446 3258 struct scatterlist *sg;
89a36810
AR
3259 void *kaddr;
3260 int bsize_elem;
3261 int i;
3262 int rc = 0;
3263
3264 /* Determine the actual number of bytes per element */
3265 bsize_elem = PAGE_SIZE * (1 << sglist->order);
3266
74eb7446 3267 sg = sglist->scatterlist;
89a36810 3268
74eb7446
ML
3269 for (i = 0; i < (len / bsize_elem); i++, sg = sg_next(sg), buffer += bsize_elem) {
3270 struct page *page = sg_page(sg);
89a36810
AR
3271
3272 kaddr = kmap(page);
3273 if (direction == DMA_TO_DEVICE)
edb88cef 3274 rc = copy_from_user(kaddr, buffer, bsize_elem);
89a36810 3275 else
edb88cef 3276 rc = copy_to_user(buffer, kaddr, bsize_elem);
89a36810
AR
3277
3278 kunmap(page);
3279
3280 if (rc) {
3281 pmcraid_err("failed to copy user data into sg list\n");
3282 return -EFAULT;
3283 }
3284
74eb7446 3285 sg->length = bsize_elem;
89a36810
AR
3286 }
3287
3288 if (len % bsize_elem) {
74eb7446 3289 struct page *page = sg_page(sg);
89a36810
AR
3290
3291 kaddr = kmap(page);
3292
3293 if (direction == DMA_TO_DEVICE)
edb88cef 3294 rc = copy_from_user(kaddr, buffer, len % bsize_elem);
89a36810 3295 else
edb88cef 3296 rc = copy_to_user(buffer, kaddr, len % bsize_elem);
89a36810
AR
3297
3298 kunmap(page);
3299
74eb7446 3300 sg->length = len % bsize_elem;
89a36810
AR
3301 }
3302
3303 if (rc) {
3304 pmcraid_err("failed to copy user data into sg list\n");
3305 rc = -EFAULT;
3306 }
3307
3308 return rc;
3309}
3310
3311/**
3312 * pmcraid_queuecommand - Queue a mid-layer request
3313 * @scsi_cmd: scsi command struct
3314 * @done: done function
3315 *
3316 * This function queues a request generated by the mid-layer. Midlayer calls
3317 * this routine within host->lock. Some of the functions called by queuecommand
3318 * would use cmd block queue locks (free_pool_lock and pending_pool_lock)
3319 *
3320 * Return value:
3321 * 0 on success
3322 * SCSI_MLQUEUE_DEVICE_BUSY if device is busy
3323 * SCSI_MLQUEUE_HOST_BUSY if host is busy
3324 */
f281233d 3325static int pmcraid_queuecommand_lck(
89a36810
AR
3326 struct scsi_cmnd *scsi_cmd,
3327 void (*done) (struct scsi_cmnd *)
3328)
3329{
3330 struct pmcraid_instance *pinstance;
3331 struct pmcraid_resource_entry *res;
3332 struct pmcraid_ioarcb *ioarcb;
3333 struct pmcraid_cmd *cmd;
c20c4267 3334 u32 fw_version;
89a36810
AR
3335 int rc = 0;
3336
3337 pinstance =
3338 (struct pmcraid_instance *)scsi_cmd->device->host->hostdata;
c20c4267 3339 fw_version = be16_to_cpu(pinstance->inq_data->fw_version);
89a36810
AR
3340 scsi_cmd->scsi_done = done;
3341 res = scsi_cmd->device->hostdata;
3342 scsi_cmd->result = (DID_OK << 16);
3343
3344 /* if adapter is marked as dead, set result to DID_NO_CONNECT complete
3345 * the command
3346 */
3347 if (pinstance->ioa_state == IOA_STATE_DEAD) {
3348 pmcraid_info("IOA is dead, but queuecommand is scheduled\n");
3349 scsi_cmd->result = (DID_NO_CONNECT << 16);
3350 scsi_cmd->scsi_done(scsi_cmd);
3351 return 0;
3352 }
3353
3354 /* If IOA reset is in progress, can't queue the commands */
3355 if (pinstance->ioa_reset_in_progress)
3356 return SCSI_MLQUEUE_HOST_BUSY;
3357
c20c4267
AR
3358 /* Firmware doesn't support SYNCHRONIZE_CACHE command (0x35), complete
3359 * the command here itself with success return
3360 */
3361 if (scsi_cmd->cmnd[0] == SYNCHRONIZE_CACHE) {
3362 pmcraid_info("SYNC_CACHE(0x35), completing in driver itself\n");
3363 scsi_cmd->scsi_done(scsi_cmd);
3364 return 0;
3365 }
3366
89a36810
AR
3367 /* initialize the command and IOARCB to be sent to IOA */
3368 cmd = pmcraid_get_free_cmd(pinstance);
3369
3370 if (cmd == NULL) {
3371 pmcraid_err("free command block is not available\n");
3372 return SCSI_MLQUEUE_HOST_BUSY;
3373 }
3374
3375 cmd->scsi_cmd = scsi_cmd;
3376 ioarcb = &(cmd->ioa_cb->ioarcb);
3377 memcpy(ioarcb->cdb, scsi_cmd->cmnd, scsi_cmd->cmd_len);
3378 ioarcb->resource_handle = res->cfg_entry.resource_handle;
3379 ioarcb->request_type = REQ_TYPE_SCSI;
3380
c20c4267
AR
3381 /* set hrrq number where the IOA should respond to. Note that all cmds
3382 * generated internally uses hrrq_id 0, exception to this is the cmd
3383 * block of scsi_cmd which is re-used (e.g. cancel/abort), which uses
3384 * hrrq_id assigned here in queuecommand
3385 */
3386 ioarcb->hrrq_id = atomic_add_return(1, &(pinstance->last_message_id)) %
3387 pinstance->num_hrrq;
89a36810
AR
3388 cmd->cmd_done = pmcraid_io_done;
3389
3390 if (RES_IS_GSCSI(res->cfg_entry) || RES_IS_VSET(res->cfg_entry)) {
3391 if (scsi_cmd->underflow == 0)
3392 ioarcb->request_flags0 |= INHIBIT_UL_CHECK;
3393
3394 if (res->sync_reqd) {
3395 ioarcb->request_flags0 |= SYNC_COMPLETE;
3396 res->sync_reqd = 0;
3397 }
3398
3399 ioarcb->request_flags0 |= NO_LINK_DESCS;
50668633
CH
3400
3401 if (scsi_cmd->flags & SCMD_TAGGED)
3402 ioarcb->request_flags1 |= TASK_TAG_SIMPLE;
89a36810
AR
3403
3404 if (RES_IS_GSCSI(res->cfg_entry))
3405 ioarcb->request_flags1 |= DELAY_AFTER_RESET;
3406 }
3407
3408 rc = pmcraid_build_ioadl(pinstance, cmd);
3409
3410 pmcraid_info("command (%d) CDB[0] = %x for %x:%x:%x:%x\n",
3411 le32_to_cpu(ioarcb->response_handle) >> 2,
3412 scsi_cmd->cmnd[0], pinstance->host->unique_id,
3413 RES_IS_VSET(res->cfg_entry) ? PMCRAID_VSET_BUS_ID :
3414 PMCRAID_PHYS_BUS_ID,
3415 RES_IS_VSET(res->cfg_entry) ?
c20c4267
AR
3416 (fw_version <= PMCRAID_FW_VERSION_1 ?
3417 res->cfg_entry.unique_flags1 :
45c80be6 3418 le16_to_cpu(res->cfg_entry.array_id) & 0xFF) :
89a36810
AR
3419 RES_TARGET(res->cfg_entry.resource_address),
3420 RES_LUN(res->cfg_entry.resource_address));
3421
3422 if (likely(rc == 0)) {
3423 _pmcraid_fire_command(cmd);
3424 } else {
3425 pmcraid_err("queuecommand could not build ioadl\n");
3426 pmcraid_return_cmd(cmd);
3427 rc = SCSI_MLQUEUE_HOST_BUSY;
3428 }
3429
3430 return rc;
3431}
3432
f281233d
JG
3433static DEF_SCSI_QCMD(pmcraid_queuecommand)
3434
89a36810
AR
3435/**
3436 * pmcraid_open -char node "open" entry, allowed only users with admin access
3437 */
3438static int pmcraid_chr_open(struct inode *inode, struct file *filep)
3439{
3440 struct pmcraid_instance *pinstance;
3441
3442 if (!capable(CAP_SYS_ADMIN))
3443 return -EACCES;
3444
3445 /* Populate adapter instance * pointer for use by ioctl */
3446 pinstance = container_of(inode->i_cdev, struct pmcraid_instance, cdev);
3447 filep->private_data = pinstance;
3448
3449 return 0;
3450}
3451
89a36810
AR
3452/**
3453 * pmcraid_fasync - Async notifier registration from applications
3454 *
3455 * This function adds the calling process to a driver global queue. When an
3456 * event occurs, SIGIO will be sent to all processes in this queue.
3457 */
3458static int pmcraid_chr_fasync(int fd, struct file *filep, int mode)
3459{
3460 struct pmcraid_instance *pinstance;
3461 int rc;
3462
660bdddb 3463 pinstance = filep->private_data;
89a36810
AR
3464 mutex_lock(&pinstance->aen_queue_lock);
3465 rc = fasync_helper(fd, filep, mode, &pinstance->aen_queue);
3466 mutex_unlock(&pinstance->aen_queue_lock);
3467
3468 return rc;
3469}
3470
3471
3472/**
3473 * pmcraid_build_passthrough_ioadls - builds SG elements for passthrough
3474 * commands sent over IOCTL interface
3475 *
3476 * @cmd : pointer to struct pmcraid_cmd
3477 * @buflen : length of the request buffer
3478 * @direction : data transfer direction
3479 *
3480 * Return value
af901ca1 3481 * 0 on success, non-zero error code on failure
89a36810
AR
3482 */
3483static int pmcraid_build_passthrough_ioadls(
3484 struct pmcraid_cmd *cmd,
3485 int buflen,
3486 int direction
3487)
3488{
3489 struct pmcraid_sglist *sglist = NULL;
3490 struct scatterlist *sg = NULL;
3491 struct pmcraid_ioarcb *ioarcb = &cmd->ioa_cb->ioarcb;
3492 struct pmcraid_ioadl_desc *ioadl;
3493 int i;
3494
3495 sglist = pmcraid_alloc_sglist(buflen);
3496
3497 if (!sglist) {
3498 pmcraid_err("can't allocate memory for passthrough SGls\n");
3499 return -ENOMEM;
3500 }
3501
371a6c32 3502 sglist->num_dma_sg = dma_map_sg(&cmd->drv_inst->pdev->dev,
89a36810
AR
3503 sglist->scatterlist,
3504 sglist->num_sg, direction);
3505
3506 if (!sglist->num_dma_sg || sglist->num_dma_sg > PMCRAID_MAX_IOADLS) {
3507 dev_err(&cmd->drv_inst->pdev->dev,
3508 "Failed to map passthrough buffer!\n");
3509 pmcraid_free_sglist(sglist);
3510 return -EIO;
3511 }
3512
3513 cmd->sglist = sglist;
3514 ioarcb->request_flags0 |= NO_LINK_DESCS;
3515
3516 ioadl = pmcraid_init_ioadls(cmd, sglist->num_dma_sg);
3517
3518 /* Initialize IOADL descriptor addresses */
3519 for_each_sg(sglist->scatterlist, sg, sglist->num_dma_sg, i) {
3520 ioadl[i].data_len = cpu_to_le32(sg_dma_len(sg));
3521 ioadl[i].address = cpu_to_le64(sg_dma_address(sg));
3522 ioadl[i].flags = 0;
3523 }
3524
3525 /* setup the last descriptor */
88197966 3526 ioadl[i - 1].flags = IOADL_FLAGS_LAST_DESC;
89a36810
AR
3527
3528 return 0;
3529}
3530
3531
3532/**
3533 * pmcraid_release_passthrough_ioadls - release passthrough ioadls
3534 *
3535 * @cmd: pointer to struct pmcraid_cmd for which ioadls were allocated
3536 * @buflen: size of the request buffer
3537 * @direction: data transfer direction
3538 *
3539 * Return value
af901ca1 3540 * 0 on success, non-zero error code on failure
89a36810
AR
3541 */
3542static void pmcraid_release_passthrough_ioadls(
3543 struct pmcraid_cmd *cmd,
3544 int buflen,
3545 int direction
3546)
3547{
3548 struct pmcraid_sglist *sglist = cmd->sglist;
3549
3550 if (buflen > 0) {
371a6c32 3551 dma_unmap_sg(&cmd->drv_inst->pdev->dev,
89a36810
AR
3552 sglist->scatterlist,
3553 sglist->num_sg,
3554 direction);
3555 pmcraid_free_sglist(sglist);
3556 cmd->sglist = NULL;
3557 }
3558}
3559
3560/**
3561 * pmcraid_ioctl_passthrough - handling passthrough IOCTL commands
3562 *
3563 * @pinstance: pointer to adapter instance structure
3564 * @cmd: ioctl code
3565 * @arg: pointer to pmcraid_passthrough_buffer user buffer
3566 *
3567 * Return value
af901ca1 3568 * 0 on success, non-zero error code on failure
89a36810
AR
3569 */
3570static long pmcraid_ioctl_passthrough(
3571 struct pmcraid_instance *pinstance,
3572 unsigned int ioctl_cmd,
3573 unsigned int buflen,
3397623b 3574 void __user *arg
89a36810
AR
3575)
3576{
3577 struct pmcraid_passthrough_ioctl_buffer *buffer;
3578 struct pmcraid_ioarcb *ioarcb;
3579 struct pmcraid_cmd *cmd;
3580 struct pmcraid_cmd *cancel_cmd;
3397623b 3581 void __user *request_buffer;
89a36810
AR
3582 unsigned long request_offset;
3583 unsigned long lock_flags;
3397623b 3584 void __user *ioasa;
c20c4267 3585 u32 ioasc;
89a36810
AR
3586 int request_size;
3587 int buffer_size;
96d4f267 3588 u8 direction;
89a36810
AR
3589 int rc = 0;
3590
3591 /* If IOA reset is in progress, wait 10 secs for reset to complete */
3592 if (pinstance->ioa_reset_in_progress) {
3593 rc = wait_event_interruptible_timeout(
3594 pinstance->reset_wait_q,
3595 !pinstance->ioa_reset_in_progress,
3596 msecs_to_jiffies(10000));
3597
3598 if (!rc)
3599 return -ETIMEDOUT;
3600 else if (rc < 0)
3601 return -ERESTARTSYS;
3602 }
3603
3604 /* If adapter is not in operational state, return error */
3605 if (pinstance->ioa_state != IOA_STATE_OPERATIONAL) {
3606 pmcraid_err("IOA is not operational\n");
3607 return -ENOTTY;
3608 }
3609
3610 buffer_size = sizeof(struct pmcraid_passthrough_ioctl_buffer);
3611 buffer = kmalloc(buffer_size, GFP_KERNEL);
3612
3613 if (!buffer) {
3614 pmcraid_err("no memory for passthrough buffer\n");
3615 return -ENOMEM;
3616 }
3617
3618 request_offset =
3619 offsetof(struct pmcraid_passthrough_ioctl_buffer, request_buffer);
3620
3621 request_buffer = arg + request_offset;
3622
edb88cef 3623 rc = copy_from_user(buffer, arg,
89a36810 3624 sizeof(struct pmcraid_passthrough_ioctl_buffer));
592488a3 3625
3397623b 3626 ioasa = arg + offsetof(struct pmcraid_passthrough_ioctl_buffer, ioasa);
592488a3 3627
89a36810
AR
3628 if (rc) {
3629 pmcraid_err("ioctl: can't copy passthrough buffer\n");
3630 rc = -EFAULT;
3631 goto out_free_buffer;
3632 }
3633
45c80be6 3634 request_size = le32_to_cpu(buffer->ioarcb.data_transfer_length);
89a36810
AR
3635
3636 if (buffer->ioarcb.request_flags0 & TRANSFER_DIR_WRITE) {
89a36810
AR
3637 direction = DMA_TO_DEVICE;
3638 } else {
89a36810
AR
3639 direction = DMA_FROM_DEVICE;
3640 }
3641
edb88cef 3642 if (request_size < 0) {
5f6279da
DR
3643 rc = -EINVAL;
3644 goto out_free_buffer;
89a36810
AR
3645 }
3646
3647 /* check if we have any additional command parameters */
45c80be6
AB
3648 if (le16_to_cpu(buffer->ioarcb.add_cmd_param_length)
3649 > PMCRAID_ADD_CMD_PARAM_LEN) {
89a36810
AR
3650 rc = -EINVAL;
3651 goto out_free_buffer;
3652 }
3653
3654 cmd = pmcraid_get_free_cmd(pinstance);
3655
3656 if (!cmd) {
3657 pmcraid_err("free command block is not available\n");
3658 rc = -ENOMEM;
3659 goto out_free_buffer;
3660 }
3661
3662 cmd->scsi_cmd = NULL;
3663 ioarcb = &(cmd->ioa_cb->ioarcb);
3664
3665 /* Copy the user-provided IOARCB stuff field by field */
3666 ioarcb->resource_handle = buffer->ioarcb.resource_handle;
3667 ioarcb->data_transfer_length = buffer->ioarcb.data_transfer_length;
3668 ioarcb->cmd_timeout = buffer->ioarcb.cmd_timeout;
3669 ioarcb->request_type = buffer->ioarcb.request_type;
3670 ioarcb->request_flags0 = buffer->ioarcb.request_flags0;
3671 ioarcb->request_flags1 = buffer->ioarcb.request_flags1;
3672 memcpy(ioarcb->cdb, buffer->ioarcb.cdb, PMCRAID_MAX_CDB_LEN);
3673
3674 if (buffer->ioarcb.add_cmd_param_length) {
3675 ioarcb->add_cmd_param_length =
3676 buffer->ioarcb.add_cmd_param_length;
3677 ioarcb->add_cmd_param_offset =
3678 buffer->ioarcb.add_cmd_param_offset;
3679 memcpy(ioarcb->add_data.u.add_cmd_params,
3680 buffer->ioarcb.add_data.u.add_cmd_params,
45c80be6 3681 le16_to_cpu(buffer->ioarcb.add_cmd_param_length));
89a36810
AR
3682 }
3683
c20c4267
AR
3684 /* set hrrq number where the IOA should respond to. Note that all cmds
3685 * generated internally uses hrrq_id 0, exception to this is the cmd
3686 * block of scsi_cmd which is re-used (e.g. cancel/abort), which uses
3687 * hrrq_id assigned here in queuecommand
3688 */
3689 ioarcb->hrrq_id = atomic_add_return(1, &(pinstance->last_message_id)) %
3690 pinstance->num_hrrq;
3691
89a36810
AR
3692 if (request_size) {
3693 rc = pmcraid_build_passthrough_ioadls(cmd,
3694 request_size,
3695 direction);
3696 if (rc) {
3697 pmcraid_err("couldn't build passthrough ioadls\n");
2d76a247 3698 goto out_free_cmd;
89a36810
AR
3699 }
3700 }
3701
3702 /* If data is being written into the device, copy the data from user
3703 * buffers
3704 */
3705 if (direction == DMA_TO_DEVICE && request_size > 0) {
3706 rc = pmcraid_copy_sglist(cmd->sglist,
3707 request_buffer,
3708 request_size,
3709 direction);
3710 if (rc) {
3711 pmcraid_err("failed to copy user buffer\n");
3712 goto out_free_sglist;
3713 }
3714 }
3715
3716 /* passthrough ioctl is a blocking command so, put the user to sleep
3717 * until timeout. Note that a timeout value of 0 means, do timeout.
3718 */
3719 cmd->cmd_done = pmcraid_internal_done;
3720 init_completion(&cmd->wait_for_completion);
3721 cmd->completion_req = 1;
3722
3723 pmcraid_info("command(%d) (CDB[0] = %x) for %x\n",
3724 le32_to_cpu(cmd->ioa_cb->ioarcb.response_handle) >> 2,
3725 cmd->ioa_cb->ioarcb.cdb[0],
3726 le32_to_cpu(cmd->ioa_cb->ioarcb.resource_handle));
3727
3728 spin_lock_irqsave(pinstance->host->host_lock, lock_flags);
3729 _pmcraid_fire_command(cmd);
3730 spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
3731
c20c4267
AR
3732 /* NOTE ! Remove the below line once abort_task is implemented
3733 * in firmware. This line disables ioctl command timeout handling logic
3734 * similar to IO command timeout handling, making ioctl commands to wait
3735 * until the command completion regardless of timeout value specified in
3736 * ioarcb
3737 */
3738 buffer->ioarcb.cmd_timeout = 0;
3739
89a36810
AR
3740 /* If command timeout is specified put caller to wait till that time,
3741 * otherwise it would be blocking wait. If command gets timed out, it
3742 * will be aborted.
3743 */
3744 if (buffer->ioarcb.cmd_timeout == 0) {
3745 wait_for_completion(&cmd->wait_for_completion);
3746 } else if (!wait_for_completion_timeout(
3747 &cmd->wait_for_completion,
45c80be6 3748 msecs_to_jiffies(le16_to_cpu(buffer->ioarcb.cmd_timeout) * 1000))) {
89a36810
AR
3749
3750 pmcraid_info("aborting cmd %d (CDB[0] = %x) due to timeout\n",
45c80be6 3751 le32_to_cpu(cmd->ioa_cb->ioarcb.response_handle) >> 2,
89a36810
AR
3752 cmd->ioa_cb->ioarcb.cdb[0]);
3753
89a36810
AR
3754 spin_lock_irqsave(pinstance->host->host_lock, lock_flags);
3755 cancel_cmd = pmcraid_abort_cmd(cmd);
3756 spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
3757
3758 if (cancel_cmd) {
3759 wait_for_completion(&cancel_cmd->wait_for_completion);
45c80be6 3760 ioasc = le32_to_cpu(cancel_cmd->ioa_cb->ioasa.ioasc);
89a36810 3761 pmcraid_return_cmd(cancel_cmd);
c20c4267
AR
3762
3763 /* if abort task couldn't find the command i.e it got
3764 * completed prior to aborting, return good completion.
25985edc 3765 * if command got aborted successfully or there was IOA
c20c4267
AR
3766 * reset due to abort task itself getting timedout then
3767 * return -ETIMEDOUT
3768 */
3769 if (ioasc == PMCRAID_IOASC_IOA_WAS_RESET ||
3770 PMCRAID_IOASC_SENSE_KEY(ioasc) == 0x00) {
3771 if (ioasc != PMCRAID_IOASC_GC_IOARCB_NOTFOUND)
3772 rc = -ETIMEDOUT;
3773 goto out_handle_response;
3774 }
89a36810
AR
3775 }
3776
c20c4267
AR
3777 /* no command block for abort task or abort task failed to abort
3778 * the IOARCB, then wait for 150 more seconds and initiate reset
3779 * sequence after timeout
3780 */
3781 if (!wait_for_completion_timeout(
3782 &cmd->wait_for_completion,
3783 msecs_to_jiffies(150 * 1000))) {
3784 pmcraid_reset_bringup(cmd->drv_inst);
3785 rc = -ETIMEDOUT;
3786 }
89a36810
AR
3787 }
3788
c20c4267 3789out_handle_response:
592488a3
AR
3790 /* copy entire IOASA buffer and return IOCTL success.
3791 * If copying IOASA to user-buffer fails, return
89a36810
AR
3792 * EFAULT
3793 */
592488a3
AR
3794 if (copy_to_user(ioasa, &cmd->ioa_cb->ioasa,
3795 sizeof(struct pmcraid_ioasa))) {
3796 pmcraid_err("failed to copy ioasa buffer to user\n");
3797 rc = -EFAULT;
89a36810 3798 }
c20c4267 3799
89a36810
AR
3800 /* If the data transfer was from device, copy the data onto user
3801 * buffers
3802 */
3803 else if (direction == DMA_FROM_DEVICE && request_size > 0) {
3804 rc = pmcraid_copy_sglist(cmd->sglist,
3805 request_buffer,
3806 request_size,
3807 direction);
3808 if (rc) {
3809 pmcraid_err("failed to copy user buffer\n");
3810 rc = -EFAULT;
3811 }
3812 }
3813
3814out_free_sglist:
3815 pmcraid_release_passthrough_ioadls(cmd, request_size, direction);
2d76a247
QL
3816
3817out_free_cmd:
89a36810
AR
3818 pmcraid_return_cmd(cmd);
3819
3820out_free_buffer:
3821 kfree(buffer);
3822
3823 return rc;
3824}
3825
3826
3827
3828
3829/**
3830 * pmcraid_ioctl_driver - ioctl handler for commands handled by driver itself
3831 *
3832 * @pinstance: pointer to adapter instance structure
3833 * @cmd: ioctl command passed in
3834 * @buflen: length of user_buffer
3835 * @user_buffer: user buffer pointer
3836 *
3837 * Return Value
3838 * 0 in case of success, otherwise appropriate error code
3839 */
3840static long pmcraid_ioctl_driver(
3841 struct pmcraid_instance *pinstance,
3842 unsigned int cmd,
3843 unsigned int buflen,
3844 void __user *user_buffer
3845)
3846{
3847 int rc = -ENOSYS;
3848
89a36810
AR
3849 switch (cmd) {
3850 case PMCRAID_IOCTL_RESET_ADAPTER:
3851 pmcraid_reset_bringup(pinstance);
3852 rc = 0;
3853 break;
3854
3855 default:
3856 break;
3857 }
3858
3859 return rc;
3860}
3861
3862/**
3863 * pmcraid_check_ioctl_buffer - check for proper access to user buffer
3864 *
3865 * @cmd: ioctl command
3866 * @arg: user buffer
3867 * @hdr: pointer to kernel memory for pmcraid_ioctl_header
3868 *
3869 * Return Value
3870 * negetive error code if there are access issues, otherwise zero.
3871 * Upon success, returns ioctl header copied out of user buffer.
3872 */
3873
3874static int pmcraid_check_ioctl_buffer(
3875 int cmd,
3876 void __user *arg,
3877 struct pmcraid_ioctl_header *hdr
3878)
3879{
edb88cef 3880 int rc;
89a36810
AR
3881
3882 if (copy_from_user(hdr, arg, sizeof(struct pmcraid_ioctl_header))) {
3883 pmcraid_err("couldn't copy ioctl header from user buffer\n");
3884 return -EFAULT;
3885 }
3886
3887 /* check for valid driver signature */
3888 rc = memcmp(hdr->signature,
3889 PMCRAID_IOCTL_SIGNATURE,
3890 sizeof(hdr->signature));
3891 if (rc) {
3892 pmcraid_err("signature verification failed\n");
3893 return -EINVAL;
3894 }
3895
89a36810
AR
3896 return 0;
3897}
3898
3899/**
3900 * pmcraid_ioctl - char node ioctl entry point
3901 */
3902static long pmcraid_chr_ioctl(
3903 struct file *filep,
3904 unsigned int cmd,
3905 unsigned long arg
3906)
3907{
3908 struct pmcraid_instance *pinstance = NULL;
3909 struct pmcraid_ioctl_header *hdr = NULL;
3397623b 3910 void __user *argp = (void __user *)arg;
89a36810
AR
3911 int retval = -ENOTTY;
3912
a63ec376 3913 hdr = kmalloc(sizeof(struct pmcraid_ioctl_header), GFP_KERNEL);
89a36810
AR
3914
3915 if (!hdr) {
4f91b114 3916 pmcraid_err("failed to allocate memory for ioctl header\n");
89a36810
AR
3917 return -ENOMEM;
3918 }
3919
3397623b 3920 retval = pmcraid_check_ioctl_buffer(cmd, argp, hdr);
89a36810
AR
3921
3922 if (retval) {
3923 pmcraid_info("chr_ioctl: header check failed\n");
3924 kfree(hdr);
3925 return retval;
3926 }
3927
660bdddb 3928 pinstance = filep->private_data;
89a36810
AR
3929
3930 if (!pinstance) {
3931 pmcraid_info("adapter instance is not found\n");
3932 kfree(hdr);
3933 return -ENOTTY;
3934 }
3935
3936 switch (_IOC_TYPE(cmd)) {
3937
3938 case PMCRAID_PASSTHROUGH_IOCTL:
3939 /* If ioctl code is to download microcode, we need to block
3940 * mid-layer requests.
3941 */
3942 if (cmd == PMCRAID_IOCTL_DOWNLOAD_MICROCODE)
3943 scsi_block_requests(pinstance->host);
3944
3397623b
AB
3945 retval = pmcraid_ioctl_passthrough(pinstance, cmd,
3946 hdr->buffer_length, argp);
89a36810
AR
3947
3948 if (cmd == PMCRAID_IOCTL_DOWNLOAD_MICROCODE)
3949 scsi_unblock_requests(pinstance->host);
3950 break;
3951
3952 case PMCRAID_DRIVER_IOCTL:
3953 arg += sizeof(struct pmcraid_ioctl_header);
3397623b
AB
3954 retval = pmcraid_ioctl_driver(pinstance, cmd,
3955 hdr->buffer_length, argp);
89a36810
AR
3956 break;
3957
3958 default:
3959 retval = -ENOTTY;
3960 break;
3961 }
3962
3963 kfree(hdr);
3964
3965 return retval;
3966}
3967
3968/**
3969 * File operations structure for management interface
3970 */
3971static const struct file_operations pmcraid_fops = {
3972 .owner = THIS_MODULE,
3973 .open = pmcraid_chr_open,
89a36810
AR
3974 .fasync = pmcraid_chr_fasync,
3975 .unlocked_ioctl = pmcraid_chr_ioctl,
1832f2d8 3976 .compat_ioctl = compat_ptr_ioctl,
6038f373 3977 .llseek = noop_llseek,
89a36810
AR
3978};
3979
3980
3981
3982
3983/**
3984 * pmcraid_show_log_level - Display adapter's error logging level
3985 * @dev: class device struct
3986 * @buf: buffer
3987 *
3988 * Return value:
3989 * number of bytes printed to buffer
3990 */
3991static ssize_t pmcraid_show_log_level(
3992 struct device *dev,
3993 struct device_attribute *attr,
3994 char *buf)
3995{
3996 struct Scsi_Host *shost = class_to_shost(dev);
3997 struct pmcraid_instance *pinstance =
3998 (struct pmcraid_instance *)shost->hostdata;
3999 return snprintf(buf, PAGE_SIZE, "%d\n", pinstance->current_log_level);
4000}
4001
4002/**
4003 * pmcraid_store_log_level - Change the adapter's error logging level
4004 * @dev: class device struct
4005 * @buf: buffer
4006 * @count: not used
4007 *
4008 * Return value:
4009 * number of bytes printed to buffer
4010 */
4011static ssize_t pmcraid_store_log_level(
4012 struct device *dev,
4013 struct device_attribute *attr,
4014 const char *buf,
4015 size_t count
4016)
4017{
4018 struct Scsi_Host *shost;
4019 struct pmcraid_instance *pinstance;
f7c65af5 4020 u8 val;
89a36810 4021
f7c65af5 4022 if (kstrtou8(buf, 10, &val))
89a36810
AR
4023 return -EINVAL;
4024 /* log-level should be from 0 to 2 */
4025 if (val > 2)
4026 return -EINVAL;
4027
4028 shost = class_to_shost(dev);
4029 pinstance = (struct pmcraid_instance *)shost->hostdata;
4030 pinstance->current_log_level = val;
4031
4032 return strlen(buf);
4033}
4034
4035static struct device_attribute pmcraid_log_level_attr = {
4036 .attr = {
4037 .name = "log_level",
4038 .mode = S_IRUGO | S_IWUSR,
4039 },
4040 .show = pmcraid_show_log_level,
4041 .store = pmcraid_store_log_level,
4042};
4043
4044/**
4045 * pmcraid_show_drv_version - Display driver version
4046 * @dev: class device struct
4047 * @buf: buffer
4048 *
4049 * Return value:
4050 * number of bytes printed to buffer
4051 */
4052static ssize_t pmcraid_show_drv_version(
4053 struct device *dev,
4054 struct device_attribute *attr,
4055 char *buf
4056)
4057{
a1b66665
MM
4058 return snprintf(buf, PAGE_SIZE, "version: %s\n",
4059 PMCRAID_DRIVER_VERSION);
89a36810
AR
4060}
4061
4062static struct device_attribute pmcraid_driver_version_attr = {
4063 .attr = {
4064 .name = "drv_version",
4065 .mode = S_IRUGO,
4066 },
4067 .show = pmcraid_show_drv_version,
4068};
4069
4070/**
4071 * pmcraid_show_io_adapter_id - Display driver assigned adapter id
4072 * @dev: class device struct
4073 * @buf: buffer
4074 *
4075 * Return value:
4076 * number of bytes printed to buffer
4077 */
4078static ssize_t pmcraid_show_adapter_id(
4079 struct device *dev,
4080 struct device_attribute *attr,
4081 char *buf
4082)
4083{
4084 struct Scsi_Host *shost = class_to_shost(dev);
4085 struct pmcraid_instance *pinstance =
4086 (struct pmcraid_instance *)shost->hostdata;
4087 u32 adapter_id = (pinstance->pdev->bus->number << 8) |
4088 pinstance->pdev->devfn;
4089 u32 aen_group = pmcraid_event_family.id;
4090
4091 return snprintf(buf, PAGE_SIZE,
4092 "adapter id: %d\nminor: %d\naen group: %d\n",
4093 adapter_id, MINOR(pinstance->cdev.dev), aen_group);
4094}
4095
4096static struct device_attribute pmcraid_adapter_id_attr = {
4097 .attr = {
4098 .name = "adapter_id",
5a0ccb6b 4099 .mode = S_IRUGO,
89a36810
AR
4100 },
4101 .show = pmcraid_show_adapter_id,
4102};
4103
4104static struct device_attribute *pmcraid_host_attrs[] = {
4105 &pmcraid_log_level_attr,
4106 &pmcraid_driver_version_attr,
4107 &pmcraid_adapter_id_attr,
4108 NULL,
4109};
4110
4111
4112/* host template structure for pmcraid driver */
4113static struct scsi_host_template pmcraid_host_template = {
4114 .module = THIS_MODULE,
4115 .name = PMCRAID_DRIVER_NAME,
4116 .queuecommand = pmcraid_queuecommand,
4117 .eh_abort_handler = pmcraid_eh_abort_handler,
4118 .eh_bus_reset_handler = pmcraid_eh_bus_reset_handler,
4119 .eh_target_reset_handler = pmcraid_eh_target_reset_handler,
4120 .eh_device_reset_handler = pmcraid_eh_device_reset_handler,
4121 .eh_host_reset_handler = pmcraid_eh_host_reset_handler,
4122
4123 .slave_alloc = pmcraid_slave_alloc,
4124 .slave_configure = pmcraid_slave_configure,
4125 .slave_destroy = pmcraid_slave_destroy,
4126 .change_queue_depth = pmcraid_change_queue_depth,
89a36810
AR
4127 .can_queue = PMCRAID_MAX_IO_CMD,
4128 .this_id = -1,
4129 .sg_tablesize = PMCRAID_MAX_IOADLS,
4130 .max_sectors = PMCRAID_IOA_MAX_SECTORS,
54b2b50c 4131 .no_write_same = 1,
89a36810 4132 .cmd_per_lun = PMCRAID_MAX_CMD_PER_LUN,
89a36810 4133 .shost_attrs = pmcraid_host_attrs,
2ecb204d 4134 .proc_name = PMCRAID_DRIVER_NAME,
89a36810
AR
4135};
4136
c20c4267
AR
4137/*
4138 * pmcraid_isr_msix - implements MSI-X interrupt handling routine
4139 * @irq: interrupt vector number
4140 * @dev_id: pointer hrrq_vector
89a36810
AR
4141 *
4142 * Return Value
c20c4267 4143 * IRQ_HANDLED if interrupt is handled or IRQ_NONE if ignored
89a36810 4144 */
c20c4267
AR
4145
4146static irqreturn_t pmcraid_isr_msix(int irq, void *dev_id)
89a36810 4147{
c20c4267
AR
4148 struct pmcraid_isr_param *hrrq_vector;
4149 struct pmcraid_instance *pinstance;
4150 unsigned long lock_flags;
4151 u32 intrs_val;
4152 int hrrq_id;
4153
4154 hrrq_vector = (struct pmcraid_isr_param *)dev_id;
4155 hrrq_id = hrrq_vector->hrrq_id;
4156 pinstance = hrrq_vector->drv_inst;
4157
4158 if (!hrrq_id) {
4159 /* Read the interrupt */
4160 intrs_val = pmcraid_read_interrupts(pinstance);
4161 if (intrs_val &&
4162 ((ioread32(pinstance->int_regs.host_ioa_interrupt_reg)
4163 & DOORBELL_INTR_MSIX_CLR) == 0)) {
4164 /* Any error interrupts including unit_check,
4165 * initiate IOA reset.In case of unit check indicate
4166 * to reset_sequence that IOA unit checked and prepare
4167 * for a dump during reset sequence
4168 */
4169 if (intrs_val & PMCRAID_ERROR_INTERRUPTS) {
4170 if (intrs_val & INTRS_IOA_UNIT_CHECK)
4171 pinstance->ioa_unit_check = 1;
4172
4173 pmcraid_err("ISR: error interrupts: %x \
4174 initiating reset\n", intrs_val);
4175 spin_lock_irqsave(pinstance->host->host_lock,
4176 lock_flags);
4177 pmcraid_initiate_reset(pinstance);
4178 spin_unlock_irqrestore(
4179 pinstance->host->host_lock,
4180 lock_flags);
4181 }
4182 /* If interrupt was as part of the ioa initialization,
4183 * clear it. Delete the timer and wakeup the
4184 * reset engine to proceed with reset sequence
4185 */
4186 if (intrs_val & INTRS_TRANSITION_TO_OPERATIONAL)
4187 pmcraid_clr_trans_op(pinstance);
4188
4189 /* Clear the interrupt register by writing
4190 * to host to ioa doorbell. Once done
4191 * FW will clear the interrupt.
4192 */
4193 iowrite32(DOORBELL_INTR_MSIX_CLR,
4194 pinstance->int_regs.host_ioa_interrupt_reg);
4195 ioread32(pinstance->int_regs.host_ioa_interrupt_reg);
4196
89a36810 4197
c20c4267
AR
4198 }
4199 }
4200
4201 tasklet_schedule(&(pinstance->isr_tasklet[hrrq_id]));
4202
4203 return IRQ_HANDLED;
89a36810
AR
4204}
4205
4206/**
c20c4267 4207 * pmcraid_isr - implements legacy interrupt handling routine
89a36810
AR
4208 *
4209 * @irq: interrupt vector number
4210 * @dev_id: pointer hrrq_vector
4211 *
4212 * Return Value
4213 * IRQ_HANDLED if interrupt is handled or IRQ_NONE if ignored
4214 */
4215static irqreturn_t pmcraid_isr(int irq, void *dev_id)
4216{
4217 struct pmcraid_isr_param *hrrq_vector;
4218 struct pmcraid_instance *pinstance;
89a36810 4219 u32 intrs;
c20c4267
AR
4220 unsigned long lock_flags;
4221 int hrrq_id = 0;
89a36810
AR
4222
4223 /* In case of legacy interrupt mode where interrupts are shared across
4224 * isrs, it may be possible that the current interrupt is not from IOA
4225 */
4226 if (!dev_id) {
4227 printk(KERN_INFO "%s(): NULL host pointer\n", __func__);
4228 return IRQ_NONE;
4229 }
89a36810
AR
4230 hrrq_vector = (struct pmcraid_isr_param *)dev_id;
4231 pinstance = hrrq_vector->drv_inst;
4232
89a36810
AR
4233 intrs = pmcraid_read_interrupts(pinstance);
4234
c20c4267 4235 if (unlikely((intrs & PMCRAID_PCI_INTERRUPTS) == 0))
89a36810 4236 return IRQ_NONE;
89a36810
AR
4237
4238 /* Any error interrupts including unit_check, initiate IOA reset.
4239 * In case of unit check indicate to reset_sequence that IOA unit
4240 * checked and prepare for a dump during reset sequence
4241 */
4242 if (intrs & PMCRAID_ERROR_INTERRUPTS) {
4243
4244 if (intrs & INTRS_IOA_UNIT_CHECK)
4245 pinstance->ioa_unit_check = 1;
4246
4247 iowrite32(intrs,
4248 pinstance->int_regs.ioa_host_interrupt_clr_reg);
4249 pmcraid_err("ISR: error interrupts: %x initiating reset\n",
4250 intrs);
c20c4267
AR
4251 intrs = ioread32(
4252 pinstance->int_regs.ioa_host_interrupt_clr_reg);
4253 spin_lock_irqsave(pinstance->host->host_lock, lock_flags);
89a36810 4254 pmcraid_initiate_reset(pinstance);
c20c4267 4255 spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
89a36810 4256 } else {
c20c4267
AR
4257 /* If interrupt was as part of the ioa initialization,
4258 * clear. Delete the timer and wakeup the
4259 * reset engine to proceed with reset sequence
4260 */
4261 if (intrs & INTRS_TRANSITION_TO_OPERATIONAL) {
4262 pmcraid_clr_trans_op(pinstance);
4263 } else {
4264 iowrite32(intrs,
4265 pinstance->int_regs.ioa_host_interrupt_clr_reg);
4266 ioread32(
4267 pinstance->int_regs.ioa_host_interrupt_clr_reg);
89a36810 4268
c20c4267
AR
4269 tasklet_schedule(
4270 &(pinstance->isr_tasklet[hrrq_id]));
4271 }
4272 }
89a36810
AR
4273
4274 return IRQ_HANDLED;
4275}
4276
4277
4278/**
4279 * pmcraid_worker_function - worker thread function
4280 *
4281 * @workp: pointer to struct work queue
4282 *
4283 * Return Value
4284 * None
4285 */
4286
4287static void pmcraid_worker_function(struct work_struct *workp)
4288{
4289 struct pmcraid_instance *pinstance;
4290 struct pmcraid_resource_entry *res;
4291 struct pmcraid_resource_entry *temp;
4292 struct scsi_device *sdev;
4293 unsigned long lock_flags;
4294 unsigned long host_lock_flags;
c20c4267 4295 u16 fw_version;
89a36810
AR
4296 u8 bus, target, lun;
4297
4298 pinstance = container_of(workp, struct pmcraid_instance, worker_q);
4299 /* add resources only after host is added into system */
4300 if (!atomic_read(&pinstance->expose_resources))
4301 return;
4302
c20c4267
AR
4303 fw_version = be16_to_cpu(pinstance->inq_data->fw_version);
4304
89a36810
AR
4305 spin_lock_irqsave(&pinstance->resource_lock, lock_flags);
4306 list_for_each_entry_safe(res, temp, &pinstance->used_res_q, queue) {
4307
4308 if (res->change_detected == RES_CHANGE_DEL && res->scsi_dev) {
4309 sdev = res->scsi_dev;
4310
4311 /* host_lock must be held before calling
4312 * scsi_device_get
4313 */
4314 spin_lock_irqsave(pinstance->host->host_lock,
4315 host_lock_flags);
4316 if (!scsi_device_get(sdev)) {
4317 spin_unlock_irqrestore(
4318 pinstance->host->host_lock,
4319 host_lock_flags);
4320 pmcraid_info("deleting %x from midlayer\n",
4321 res->cfg_entry.resource_address);
4322 list_move_tail(&res->queue,
4323 &pinstance->free_res_q);
4324 spin_unlock_irqrestore(
4325 &pinstance->resource_lock,
4326 lock_flags);
4327 scsi_remove_device(sdev);
4328 scsi_device_put(sdev);
4329 spin_lock_irqsave(&pinstance->resource_lock,
4330 lock_flags);
4331 res->change_detected = 0;
4332 } else {
4333 spin_unlock_irqrestore(
4334 pinstance->host->host_lock,
4335 host_lock_flags);
4336 }
4337 }
4338 }
4339
4340 list_for_each_entry(res, &pinstance->used_res_q, queue) {
4341
4342 if (res->change_detected == RES_CHANGE_ADD) {
4343
c20c4267
AR
4344 if (!pmcraid_expose_resource(fw_version,
4345 &res->cfg_entry))
89a36810
AR
4346 continue;
4347
4348 if (RES_IS_VSET(res->cfg_entry)) {
4349 bus = PMCRAID_VSET_BUS_ID;
c20c4267
AR
4350 if (fw_version <= PMCRAID_FW_VERSION_1)
4351 target = res->cfg_entry.unique_flags1;
4352 else
45c80be6 4353 target = le16_to_cpu(res->cfg_entry.array_id) & 0xFF;
89a36810
AR
4354 lun = PMCRAID_VSET_LUN_ID;
4355 } else {
4356 bus = PMCRAID_PHYS_BUS_ID;
4357 target =
4358 RES_TARGET(
4359 res->cfg_entry.resource_address);
4360 lun = RES_LUN(res->cfg_entry.resource_address);
4361 }
4362
4363 res->change_detected = 0;
4364 spin_unlock_irqrestore(&pinstance->resource_lock,
4365 lock_flags);
4366 scsi_add_device(pinstance->host, bus, target, lun);
4367 spin_lock_irqsave(&pinstance->resource_lock,
4368 lock_flags);
4369 }
4370 }
4371
4372 spin_unlock_irqrestore(&pinstance->resource_lock, lock_flags);
4373}
4374
4375/**
4376 * pmcraid_tasklet_function - Tasklet function
4377 *
4378 * @instance: pointer to msix param structure
4379 *
4380 * Return Value
4381 * None
4382 */
c20c4267 4383static void pmcraid_tasklet_function(unsigned long instance)
89a36810
AR
4384{
4385 struct pmcraid_isr_param *hrrq_vector;
4386 struct pmcraid_instance *pinstance;
4387 unsigned long hrrq_lock_flags;
4388 unsigned long pending_lock_flags;
4389 unsigned long host_lock_flags;
4390 spinlock_t *lockp; /* hrrq buffer lock */
4391 int id;
45c80be6 4392 u32 resp;
89a36810
AR
4393
4394 hrrq_vector = (struct pmcraid_isr_param *)instance;
4395 pinstance = hrrq_vector->drv_inst;
4396 id = hrrq_vector->hrrq_id;
4397 lockp = &(pinstance->hrrq_lock[id]);
89a36810
AR
4398
4399 /* loop through each of the commands responded by IOA. Each HRRQ buf is
4400 * protected by its own lock. Traversals must be done within this lock
4401 * as there may be multiple tasklets running on multiple CPUs. Note
4402 * that the lock is held just for picking up the response handle and
4403 * manipulating hrrq_curr/toggle_bit values.
4404 */
4405 spin_lock_irqsave(lockp, hrrq_lock_flags);
4406
4407 resp = le32_to_cpu(*(pinstance->hrrq_curr[id]));
4408
4409 while ((resp & HRRQ_TOGGLE_BIT) ==
4410 pinstance->host_toggle_bit[id]) {
4411
4412 int cmd_index = resp >> 2;
4413 struct pmcraid_cmd *cmd = NULL;
4414
89a36810
AR
4415 if (pinstance->hrrq_curr[id] < pinstance->hrrq_end[id]) {
4416 pinstance->hrrq_curr[id]++;
4417 } else {
4418 pinstance->hrrq_curr[id] = pinstance->hrrq_start[id];
4419 pinstance->host_toggle_bit[id] ^= 1u;
4420 }
4421
c20c4267
AR
4422 if (cmd_index >= PMCRAID_MAX_CMD) {
4423 /* In case of invalid response handle, log message */
4424 pmcraid_err("Invalid response handle %d\n", cmd_index);
4425 resp = le32_to_cpu(*(pinstance->hrrq_curr[id]));
4426 continue;
4427 }
4428
4429 cmd = pinstance->cmd_list[cmd_index];
89a36810
AR
4430 spin_unlock_irqrestore(lockp, hrrq_lock_flags);
4431
4432 spin_lock_irqsave(&pinstance->pending_pool_lock,
4433 pending_lock_flags);
4434 list_del(&cmd->free_list);
4435 spin_unlock_irqrestore(&pinstance->pending_pool_lock,
4436 pending_lock_flags);
4437 del_timer(&cmd->timer);
4438 atomic_dec(&pinstance->outstanding_cmds);
4439
4440 if (cmd->cmd_done == pmcraid_ioa_reset) {
4441 spin_lock_irqsave(pinstance->host->host_lock,
4442 host_lock_flags);
4443 cmd->cmd_done(cmd);
4444 spin_unlock_irqrestore(pinstance->host->host_lock,
4445 host_lock_flags);
4446 } else if (cmd->cmd_done != NULL) {
4447 cmd->cmd_done(cmd);
4448 }
4449 /* loop over until we are done with all responses */
4450 spin_lock_irqsave(lockp, hrrq_lock_flags);
4451 resp = le32_to_cpu(*(pinstance->hrrq_curr[id]));
4452 }
4453
4454 spin_unlock_irqrestore(lockp, hrrq_lock_flags);
4455}
4456
4457/**
4458 * pmcraid_unregister_interrupt_handler - de-register interrupts handlers
4459 * @pinstance: pointer to adapter instance structure
4460 *
4461 * This routine un-registers registered interrupt handler and
4462 * also frees irqs/vectors.
4463 *
4464 * Retun Value
4465 * None
4466 */
4467static
4468void pmcraid_unregister_interrupt_handler(struct pmcraid_instance *pinstance)
4469{
eab5c150 4470 struct pci_dev *pdev = pinstance->pdev;
c20c4267
AR
4471 int i;
4472
4473 for (i = 0; i < pinstance->num_hrrq; i++)
eab5c150 4474 free_irq(pci_irq_vector(pdev, i), &pinstance->hrrq_vector[i]);
c20c4267 4475
eab5c150
CH
4476 pinstance->interrupt_mode = 0;
4477 pci_free_irq_vectors(pdev);
89a36810
AR
4478}
4479
4480/**
4481 * pmcraid_register_interrupt_handler - registers interrupt handler
4482 * @pinstance: pointer to per-adapter instance structure
4483 *
4484 * Return Value
4485 * 0 on success, non-zero error code otherwise.
4486 */
4487static int
4488pmcraid_register_interrupt_handler(struct pmcraid_instance *pinstance)
4489{
4490 struct pci_dev *pdev = pinstance->pdev;
eab5c150
CH
4491 unsigned int irq_flag = PCI_IRQ_LEGACY, flag;
4492 int num_hrrq, rc, i;
4493 irq_handler_t isr;
89a36810 4494
eab5c150
CH
4495 if (pmcraid_enable_msix)
4496 irq_flag |= PCI_IRQ_MSIX;
4497
4498 num_hrrq = pci_alloc_irq_vectors(pdev, 1, PMCRAID_NUM_MSIX_VECTORS,
4499 irq_flag);
4500 if (num_hrrq < 0)
4501 return num_hrrq;
4502
4503 if (pdev->msix_enabled) {
4504 flag = 0;
4505 isr = pmcraid_isr_msix;
4506 } else {
4507 flag = IRQF_SHARED;
4508 isr = pmcraid_isr;
4509 }
4510
4511 for (i = 0; i < num_hrrq; i++) {
4512 struct pmcraid_isr_param *vec = &pinstance->hrrq_vector[i];
4513
4514 vec->hrrq_id = i;
4515 vec->drv_inst = pinstance;
4516 rc = request_irq(pci_irq_vector(pdev, i), isr, flag,
4517 PMCRAID_DRIVER_NAME, vec);
4518 if (rc)
4519 goto out_unwind;
4520 }
c20c4267 4521
eab5c150
CH
4522 pinstance->num_hrrq = num_hrrq;
4523 if (pdev->msix_enabled) {
c20c4267
AR
4524 pinstance->interrupt_mode = 1;
4525 iowrite32(DOORBELL_INTR_MODE_MSIX,
4526 pinstance->int_regs.host_ioa_interrupt_reg);
4527 ioread32(pinstance->int_regs.host_ioa_interrupt_reg);
c20c4267
AR
4528 }
4529
eab5c150
CH
4530 return 0;
4531
4532out_unwind:
4533 while (--i > 0)
4534 free_irq(pci_irq_vector(pdev, i), &pinstance->hrrq_vector[i]);
4535 pci_free_irq_vectors(pdev);
c20c4267 4536 return rc;
89a36810
AR
4537}
4538
4539/**
4540 * pmcraid_release_cmd_blocks - release buufers allocated for command blocks
4541 * @pinstance: per adapter instance structure pointer
4542 * @max_index: number of buffer blocks to release
4543 *
4544 * Return Value
4545 * None
4546 */
4547static void
4548pmcraid_release_cmd_blocks(struct pmcraid_instance *pinstance, int max_index)
4549{
4550 int i;
4551 for (i = 0; i < max_index; i++) {
4552 kmem_cache_free(pinstance->cmd_cachep, pinstance->cmd_list[i]);
4553 pinstance->cmd_list[i] = NULL;
4554 }
4555 kmem_cache_destroy(pinstance->cmd_cachep);
4556 pinstance->cmd_cachep = NULL;
4557}
4558
4559/**
4560 * pmcraid_release_control_blocks - releases buffers alloced for control blocks
4561 * @pinstance: pointer to per adapter instance structure
4562 * @max_index: number of buffers (from 0 onwards) to release
4563 *
4564 * This function assumes that the command blocks for which control blocks are
4565 * linked are not released.
4566 *
4567 * Return Value
4568 * None
4569 */
4570static void
4571pmcraid_release_control_blocks(
4572 struct pmcraid_instance *pinstance,
4573 int max_index
4574)
4575{
4576 int i;
4577
4578 if (pinstance->control_pool == NULL)
4579 return;
4580
4581 for (i = 0; i < max_index; i++) {
a7ec87a9 4582 dma_pool_free(pinstance->control_pool,
89a36810
AR
4583 pinstance->cmd_list[i]->ioa_cb,
4584 pinstance->cmd_list[i]->ioa_cb_bus_addr);
4585 pinstance->cmd_list[i]->ioa_cb = NULL;
4586 pinstance->cmd_list[i]->ioa_cb_bus_addr = 0;
4587 }
a7ec87a9 4588 dma_pool_destroy(pinstance->control_pool);
89a36810
AR
4589 pinstance->control_pool = NULL;
4590}
4591
4592/**
4593 * pmcraid_allocate_cmd_blocks - allocate memory for cmd block structures
4594 * @pinstance - pointer to per adapter instance structure
4595 *
4596 * Allocates memory for command blocks using kernel slab allocator.
4597 *
4598 * Return Value
4599 * 0 in case of success; -ENOMEM in case of failure
4600 */
6f039790 4601static int pmcraid_allocate_cmd_blocks(struct pmcraid_instance *pinstance)
89a36810
AR
4602{
4603 int i;
4604
4605 sprintf(pinstance->cmd_pool_name, "pmcraid_cmd_pool_%d",
4606 pinstance->host->unique_id);
4607
4608
4609 pinstance->cmd_cachep = kmem_cache_create(
4610 pinstance->cmd_pool_name,
4611 sizeof(struct pmcraid_cmd), 0,
4612 SLAB_HWCACHE_ALIGN, NULL);
4613 if (!pinstance->cmd_cachep)
4614 return -ENOMEM;
4615
4616 for (i = 0; i < PMCRAID_MAX_CMD; i++) {
4617 pinstance->cmd_list[i] =
4618 kmem_cache_alloc(pinstance->cmd_cachep, GFP_KERNEL);
4619 if (!pinstance->cmd_list[i]) {
4620 pmcraid_release_cmd_blocks(pinstance, i);
4621 return -ENOMEM;
4622 }
4623 }
4624 return 0;
4625}
4626
4627/**
4628 * pmcraid_allocate_control_blocks - allocates memory control blocks
4629 * @pinstance : pointer to per adapter instance structure
4630 *
4631 * This function allocates PCI memory for DMAable buffers like IOARCB, IOADLs
4632 * and IOASAs. This is called after command blocks are already allocated.
4633 *
4634 * Return Value
4635 * 0 in case it can allocate all control blocks, otherwise -ENOMEM
4636 */
6f039790 4637static int pmcraid_allocate_control_blocks(struct pmcraid_instance *pinstance)
89a36810
AR
4638{
4639 int i;
4640
4641 sprintf(pinstance->ctl_pool_name, "pmcraid_control_pool_%d",
4642 pinstance->host->unique_id);
4643
4644 pinstance->control_pool =
a7ec87a9
RP
4645 dma_pool_create(pinstance->ctl_pool_name,
4646 &pinstance->pdev->dev,
89a36810
AR
4647 sizeof(struct pmcraid_control_block),
4648 PMCRAID_IOARCB_ALIGNMENT, 0);
4649
4650 if (!pinstance->control_pool)
4651 return -ENOMEM;
4652
4653 for (i = 0; i < PMCRAID_MAX_CMD; i++) {
4654 pinstance->cmd_list[i]->ioa_cb =
f8f794a1 4655 dma_pool_zalloc(
89a36810
AR
4656 pinstance->control_pool,
4657 GFP_KERNEL,
4658 &(pinstance->cmd_list[i]->ioa_cb_bus_addr));
4659
4660 if (!pinstance->cmd_list[i]->ioa_cb) {
4661 pmcraid_release_control_blocks(pinstance, i);
4662 return -ENOMEM;
4663 }
89a36810
AR
4664 }
4665 return 0;
4666}
4667
4668/**
4669 * pmcraid_release_host_rrqs - release memory allocated for hrrq buffer(s)
4670 * @pinstance: pointer to per adapter instance structure
4671 * @maxindex: size of hrrq buffer pointer array
4672 *
4673 * Return Value
4674 * None
4675 */
4676static void
4677pmcraid_release_host_rrqs(struct pmcraid_instance *pinstance, int maxindex)
4678{
4679 int i;
89a36810 4680
371a6c32
CH
4681 for (i = 0; i < maxindex; i++) {
4682 dma_free_coherent(&pinstance->pdev->dev,
89a36810
AR
4683 HRRQ_ENTRY_SIZE * PMCRAID_MAX_CMD,
4684 pinstance->hrrq_start[i],
4685 pinstance->hrrq_start_bus_addr[i]);
4686
4687 /* reset pointers and toggle bit to zeros */
4688 pinstance->hrrq_start[i] = NULL;
4689 pinstance->hrrq_start_bus_addr[i] = 0;
4690 pinstance->host_toggle_bit[i] = 0;
4691 }
4692}
4693
4694/**
4695 * pmcraid_allocate_host_rrqs - Allocate and initialize host RRQ buffers
4696 * @pinstance: pointer to per adapter instance structure
4697 *
4698 * Return value
4699 * 0 hrrq buffers are allocated, -ENOMEM otherwise.
4700 */
6f039790 4701static int pmcraid_allocate_host_rrqs(struct pmcraid_instance *pinstance)
89a36810 4702{
c20c4267 4703 int i, buffer_size;
89a36810 4704
c20c4267 4705 buffer_size = HRRQ_ENTRY_SIZE * PMCRAID_MAX_CMD;
89a36810 4706
c20c4267 4707 for (i = 0; i < pinstance->num_hrrq; i++) {
89a36810 4708 pinstance->hrrq_start[i] =
371a6c32
CH
4709 dma_alloc_coherent(&pinstance->pdev->dev, buffer_size,
4710 &pinstance->hrrq_start_bus_addr[i],
4711 GFP_KERNEL);
144b139c 4712 if (!pinstance->hrrq_start[i]) {
c20c4267
AR
4713 pmcraid_err("pci_alloc failed for hrrq vector : %d\n",
4714 i);
89a36810
AR
4715 pmcraid_release_host_rrqs(pinstance, i);
4716 return -ENOMEM;
4717 }
4718
4719 memset(pinstance->hrrq_start[i], 0, buffer_size);
4720 pinstance->hrrq_curr[i] = pinstance->hrrq_start[i];
4721 pinstance->hrrq_end[i] =
c20c4267 4722 pinstance->hrrq_start[i] + PMCRAID_MAX_CMD - 1;
89a36810
AR
4723 pinstance->host_toggle_bit[i] = 1;
4724 spin_lock_init(&pinstance->hrrq_lock[i]);
4725 }
4726 return 0;
4727}
4728
4729/**
4730 * pmcraid_release_hcams - release HCAM buffers
4731 *
4732 * @pinstance: pointer to per adapter instance structure
4733 *
4734 * Return value
4735 * none
4736 */
4737static void pmcraid_release_hcams(struct pmcraid_instance *pinstance)
4738{
4739 if (pinstance->ccn.msg != NULL) {
371a6c32 4740 dma_free_coherent(&pinstance->pdev->dev,
89a36810 4741 PMCRAID_AEN_HDR_SIZE +
c20c4267 4742 sizeof(struct pmcraid_hcam_ccn_ext),
89a36810
AR
4743 pinstance->ccn.msg,
4744 pinstance->ccn.baddr);
4745
4746 pinstance->ccn.msg = NULL;
4747 pinstance->ccn.hcam = NULL;
4748 pinstance->ccn.baddr = 0;
4749 }
4750
4751 if (pinstance->ldn.msg != NULL) {
371a6c32 4752 dma_free_coherent(&pinstance->pdev->dev,
89a36810
AR
4753 PMCRAID_AEN_HDR_SIZE +
4754 sizeof(struct pmcraid_hcam_ldn),
4755 pinstance->ldn.msg,
4756 pinstance->ldn.baddr);
4757
4758 pinstance->ldn.msg = NULL;
4759 pinstance->ldn.hcam = NULL;
4760 pinstance->ldn.baddr = 0;
4761 }
4762}
4763
4764/**
4765 * pmcraid_allocate_hcams - allocates HCAM buffers
4766 * @pinstance : pointer to per adapter instance structure
4767 *
4768 * Return Value:
4769 * 0 in case of successful allocation, non-zero otherwise
4770 */
4771static int pmcraid_allocate_hcams(struct pmcraid_instance *pinstance)
4772{
371a6c32 4773 pinstance->ccn.msg = dma_alloc_coherent(&pinstance->pdev->dev,
89a36810 4774 PMCRAID_AEN_HDR_SIZE +
c20c4267 4775 sizeof(struct pmcraid_hcam_ccn_ext),
371a6c32 4776 &pinstance->ccn.baddr, GFP_KERNEL);
89a36810 4777
371a6c32 4778 pinstance->ldn.msg = dma_alloc_coherent(&pinstance->pdev->dev,
89a36810
AR
4779 PMCRAID_AEN_HDR_SIZE +
4780 sizeof(struct pmcraid_hcam_ldn),
371a6c32 4781 &pinstance->ldn.baddr, GFP_KERNEL);
89a36810
AR
4782
4783 if (pinstance->ldn.msg == NULL || pinstance->ccn.msg == NULL) {
4784 pmcraid_release_hcams(pinstance);
4785 } else {
4786 pinstance->ccn.hcam =
4787 (void *)pinstance->ccn.msg + PMCRAID_AEN_HDR_SIZE;
4788 pinstance->ldn.hcam =
4789 (void *)pinstance->ldn.msg + PMCRAID_AEN_HDR_SIZE;
4790
4791 atomic_set(&pinstance->ccn.ignore, 0);
4792 atomic_set(&pinstance->ldn.ignore, 0);
4793 }
4794
4795 return (pinstance->ldn.msg == NULL) ? -ENOMEM : 0;
4796}
4797
4798/**
4799 * pmcraid_release_config_buffers - release config.table buffers
4800 * @pinstance: pointer to per adapter instance structure
4801 *
4802 * Return Value
4803 * none
4804 */
4805static void pmcraid_release_config_buffers(struct pmcraid_instance *pinstance)
4806{
4807 if (pinstance->cfg_table != NULL &&
4808 pinstance->cfg_table_bus_addr != 0) {
371a6c32 4809 dma_free_coherent(&pinstance->pdev->dev,
89a36810
AR
4810 sizeof(struct pmcraid_config_table),
4811 pinstance->cfg_table,
4812 pinstance->cfg_table_bus_addr);
4813 pinstance->cfg_table = NULL;
4814 pinstance->cfg_table_bus_addr = 0;
4815 }
4816
4817 if (pinstance->res_entries != NULL) {
4818 int i;
4819
4820 for (i = 0; i < PMCRAID_MAX_RESOURCES; i++)
4821 list_del(&pinstance->res_entries[i].queue);
4822 kfree(pinstance->res_entries);
4823 pinstance->res_entries = NULL;
4824 }
4825
4826 pmcraid_release_hcams(pinstance);
4827}
4828
4829/**
4830 * pmcraid_allocate_config_buffers - allocates DMAable memory for config table
4831 * @pinstance : pointer to per adapter instance structure
4832 *
4833 * Return Value
4834 * 0 for successful allocation, -ENOMEM for any failure
4835 */
6f039790 4836static int pmcraid_allocate_config_buffers(struct pmcraid_instance *pinstance)
89a36810
AR
4837{
4838 int i;
4839
4840 pinstance->res_entries =
6396bb22
KC
4841 kcalloc(PMCRAID_MAX_RESOURCES,
4842 sizeof(struct pmcraid_resource_entry),
4843 GFP_KERNEL);
89a36810
AR
4844
4845 if (NULL == pinstance->res_entries) {
4846 pmcraid_err("failed to allocate memory for resource table\n");
4847 return -ENOMEM;
4848 }
4849
4850 for (i = 0; i < PMCRAID_MAX_RESOURCES; i++)
4851 list_add_tail(&pinstance->res_entries[i].queue,
4852 &pinstance->free_res_q);
4853
371a6c32 4854 pinstance->cfg_table = dma_alloc_coherent(&pinstance->pdev->dev,
89a36810 4855 sizeof(struct pmcraid_config_table),
371a6c32
CH
4856 &pinstance->cfg_table_bus_addr,
4857 GFP_KERNEL);
89a36810
AR
4858
4859 if (NULL == pinstance->cfg_table) {
4860 pmcraid_err("couldn't alloc DMA memory for config table\n");
4861 pmcraid_release_config_buffers(pinstance);
4862 return -ENOMEM;
4863 }
4864
4865 if (pmcraid_allocate_hcams(pinstance)) {
4866 pmcraid_err("could not alloc DMA memory for HCAMS\n");
4867 pmcraid_release_config_buffers(pinstance);
4868 return -ENOMEM;
4869 }
4870
4871 return 0;
4872}
4873
4874/**
4875 * pmcraid_init_tasklets - registers tasklets for response handling
4876 *
4877 * @pinstance: pointer adapter instance structure
4878 *
4879 * Return value
4880 * none
4881 */
4882static void pmcraid_init_tasklets(struct pmcraid_instance *pinstance)
4883{
4884 int i;
4885 for (i = 0; i < pinstance->num_hrrq; i++)
4886 tasklet_init(&pinstance->isr_tasklet[i],
4887 pmcraid_tasklet_function,
4888 (unsigned long)&pinstance->hrrq_vector[i]);
4889}
4890
4891/**
4892 * pmcraid_kill_tasklets - destroys tasklets registered for response handling
4893 *
4894 * @pinstance: pointer to adapter instance structure
4895 *
4896 * Return value
4897 * none
4898 */
4899static void pmcraid_kill_tasklets(struct pmcraid_instance *pinstance)
4900{
4901 int i;
4902 for (i = 0; i < pinstance->num_hrrq; i++)
4903 tasklet_kill(&pinstance->isr_tasklet[i]);
4904}
4905
c20c4267
AR
4906/**
4907 * pmcraid_release_buffers - release per-adapter buffers allocated
4908 *
4909 * @pinstance: pointer to adapter soft state
4910 *
4911 * Return Value
4912 * none
4913 */
4914static void pmcraid_release_buffers(struct pmcraid_instance *pinstance)
4915{
4916 pmcraid_release_config_buffers(pinstance);
4917 pmcraid_release_control_blocks(pinstance, PMCRAID_MAX_CMD);
4918 pmcraid_release_cmd_blocks(pinstance, PMCRAID_MAX_CMD);
4919 pmcraid_release_host_rrqs(pinstance, pinstance->num_hrrq);
4920
4921 if (pinstance->inq_data != NULL) {
371a6c32 4922 dma_free_coherent(&pinstance->pdev->dev,
c20c4267
AR
4923 sizeof(struct pmcraid_inquiry_data),
4924 pinstance->inq_data,
4925 pinstance->inq_data_baddr);
4926
4927 pinstance->inq_data = NULL;
4928 pinstance->inq_data_baddr = 0;
4929 }
592488a3
AR
4930
4931 if (pinstance->timestamp_data != NULL) {
371a6c32 4932 dma_free_coherent(&pinstance->pdev->dev,
592488a3
AR
4933 sizeof(struct pmcraid_timestamp_data),
4934 pinstance->timestamp_data,
4935 pinstance->timestamp_data_baddr);
4936
4937 pinstance->timestamp_data = NULL;
4938 pinstance->timestamp_data_baddr = 0;
4939 }
c20c4267
AR
4940}
4941
89a36810
AR
4942/**
4943 * pmcraid_init_buffers - allocates memory and initializes various structures
4944 * @pinstance: pointer to per adapter instance structure
4945 *
4946 * This routine pre-allocates memory based on the type of block as below:
4947 * cmdblocks(PMCRAID_MAX_CMD): kernel memory using kernel's slab_allocator,
4948 * IOARCBs(PMCRAID_MAX_CMD) : DMAable memory, using pci pool allocator
371a6c32
CH
4949 * config-table entries : DMAable memory using dma_alloc_coherent
4950 * HostRRQs : DMAable memory, using dma_alloc_coherent
89a36810
AR
4951 *
4952 * Return Value
4953 * 0 in case all of the blocks are allocated, -ENOMEM otherwise.
4954 */
6f039790 4955static int pmcraid_init_buffers(struct pmcraid_instance *pinstance)
89a36810
AR
4956{
4957 int i;
4958
4959 if (pmcraid_allocate_host_rrqs(pinstance)) {
4960 pmcraid_err("couldn't allocate memory for %d host rrqs\n",
4961 pinstance->num_hrrq);
4962 return -ENOMEM;
4963 }
4964
4965 if (pmcraid_allocate_config_buffers(pinstance)) {
4966 pmcraid_err("couldn't allocate memory for config buffers\n");
4967 pmcraid_release_host_rrqs(pinstance, pinstance->num_hrrq);
4968 return -ENOMEM;
4969 }
4970
4971 if (pmcraid_allocate_cmd_blocks(pinstance)) {
c20c4267 4972 pmcraid_err("couldn't allocate memory for cmd blocks\n");
89a36810
AR
4973 pmcraid_release_config_buffers(pinstance);
4974 pmcraid_release_host_rrqs(pinstance, pinstance->num_hrrq);
4975 return -ENOMEM;
4976 }
4977
4978 if (pmcraid_allocate_control_blocks(pinstance)) {
c20c4267 4979 pmcraid_err("couldn't allocate memory control blocks\n");
89a36810
AR
4980 pmcraid_release_config_buffers(pinstance);
4981 pmcraid_release_cmd_blocks(pinstance, PMCRAID_MAX_CMD);
4982 pmcraid_release_host_rrqs(pinstance, pinstance->num_hrrq);
4983 return -ENOMEM;
4984 }
4985
c20c4267 4986 /* allocate DMAable memory for page D0 INQUIRY buffer */
371a6c32 4987 pinstance->inq_data = dma_alloc_coherent(&pinstance->pdev->dev,
c20c4267 4988 sizeof(struct pmcraid_inquiry_data),
371a6c32 4989 &pinstance->inq_data_baddr, GFP_KERNEL);
c20c4267
AR
4990 if (pinstance->inq_data == NULL) {
4991 pmcraid_err("couldn't allocate DMA memory for INQUIRY\n");
4992 pmcraid_release_buffers(pinstance);
4993 return -ENOMEM;
4994 }
4995
592488a3 4996 /* allocate DMAable memory for set timestamp data buffer */
371a6c32 4997 pinstance->timestamp_data = dma_alloc_coherent(&pinstance->pdev->dev,
592488a3 4998 sizeof(struct pmcraid_timestamp_data),
371a6c32
CH
4999 &pinstance->timestamp_data_baddr,
5000 GFP_KERNEL);
592488a3
AR
5001 if (pinstance->timestamp_data == NULL) {
5002 pmcraid_err("couldn't allocate DMA memory for \
5003 set time_stamp \n");
5004 pmcraid_release_buffers(pinstance);
5005 return -ENOMEM;
5006 }
5007
5008
89a36810
AR
5009 /* Initialize all the command blocks and add them to free pool. No
5010 * need to lock (free_pool_lock) as this is done in initialization
5011 * itself
5012 */
5013 for (i = 0; i < PMCRAID_MAX_CMD; i++) {
5014 struct pmcraid_cmd *cmdp = pinstance->cmd_list[i];
5015 pmcraid_init_cmdblk(cmdp, i);
5016 cmdp->drv_inst = pinstance;
5017 list_add_tail(&cmdp->free_list, &pinstance->free_cmd_pool);
5018 }
5019
5020 return 0;
5021}
5022
5023/**
5024 * pmcraid_reinit_buffers - resets various buffer pointers
5025 * @pinstance: pointer to adapter instance
5026 * Return value
c20c4267 5027 * none
89a36810
AR
5028 */
5029static void pmcraid_reinit_buffers(struct pmcraid_instance *pinstance)
5030{
5031 int i;
5032 int buffer_size = HRRQ_ENTRY_SIZE * PMCRAID_MAX_CMD;
5033
5034 for (i = 0; i < pinstance->num_hrrq; i++) {
5035 memset(pinstance->hrrq_start[i], 0, buffer_size);
5036 pinstance->hrrq_curr[i] = pinstance->hrrq_start[i];
5037 pinstance->hrrq_end[i] =
5038 pinstance->hrrq_start[i] + PMCRAID_MAX_CMD - 1;
5039 pinstance->host_toggle_bit[i] = 1;
5040 }
5041}
5042
5043/**
5044 * pmcraid_init_instance - initialize per instance data structure
5045 * @pdev: pointer to pci device structure
5046 * @host: pointer to Scsi_Host structure
5047 * @mapped_pci_addr: memory mapped IOA configuration registers
5048 *
5049 * Return Value
5050 * 0 on success, non-zero in case of any failure
5051 */
6f039790
GKH
5052static int pmcraid_init_instance(struct pci_dev *pdev, struct Scsi_Host *host,
5053 void __iomem *mapped_pci_addr)
89a36810
AR
5054{
5055 struct pmcraid_instance *pinstance =
5056 (struct pmcraid_instance *)host->hostdata;
5057
5058 pinstance->host = host;
5059 pinstance->pdev = pdev;
5060
5061 /* Initialize register addresses */
5062 pinstance->mapped_dma_addr = mapped_pci_addr;
5063
5064 /* Initialize chip-specific details */
5065 {
5066 struct pmcraid_chip_details *chip_cfg = pinstance->chip_cfg;
5067 struct pmcraid_interrupts *pint_regs = &pinstance->int_regs;
5068
5069 pinstance->ioarrin = mapped_pci_addr + chip_cfg->ioarrin;
5070
5071 pint_regs->ioa_host_interrupt_reg =
5072 mapped_pci_addr + chip_cfg->ioa_host_intr;
5073 pint_regs->ioa_host_interrupt_clr_reg =
5074 mapped_pci_addr + chip_cfg->ioa_host_intr_clr;
c20c4267
AR
5075 pint_regs->ioa_host_msix_interrupt_reg =
5076 mapped_pci_addr + chip_cfg->ioa_host_msix_intr;
89a36810
AR
5077 pint_regs->host_ioa_interrupt_reg =
5078 mapped_pci_addr + chip_cfg->host_ioa_intr;
5079 pint_regs->host_ioa_interrupt_clr_reg =
5080 mapped_pci_addr + chip_cfg->host_ioa_intr_clr;
5081
5082 /* Current version of firmware exposes interrupt mask set
5083 * and mask clr registers through memory mapped bar0.
5084 */
5085 pinstance->mailbox = mapped_pci_addr + chip_cfg->mailbox;
5086 pinstance->ioa_status = mapped_pci_addr + chip_cfg->ioastatus;
5087 pint_regs->ioa_host_interrupt_mask_reg =
5088 mapped_pci_addr + chip_cfg->ioa_host_mask;
5089 pint_regs->ioa_host_interrupt_mask_clr_reg =
5090 mapped_pci_addr + chip_cfg->ioa_host_mask_clr;
5091 pint_regs->global_interrupt_mask_reg =
5092 mapped_pci_addr + chip_cfg->global_intr_mask;
5093 };
5094
5095 pinstance->ioa_reset_attempts = 0;
5096 init_waitqueue_head(&pinstance->reset_wait_q);
5097
5098 atomic_set(&pinstance->outstanding_cmds, 0);
c20c4267 5099 atomic_set(&pinstance->last_message_id, 0);
89a36810
AR
5100 atomic_set(&pinstance->expose_resources, 0);
5101
5102 INIT_LIST_HEAD(&pinstance->free_res_q);
5103 INIT_LIST_HEAD(&pinstance->used_res_q);
5104 INIT_LIST_HEAD(&pinstance->free_cmd_pool);
5105 INIT_LIST_HEAD(&pinstance->pending_cmd_pool);
5106
5107 spin_lock_init(&pinstance->free_pool_lock);
5108 spin_lock_init(&pinstance->pending_pool_lock);
5109 spin_lock_init(&pinstance->resource_lock);
5110 mutex_init(&pinstance->aen_queue_lock);
5111
5112 /* Work-queue (Shared) for deferred processing error handling */
5113 INIT_WORK(&pinstance->worker_q, pmcraid_worker_function);
5114
5115 /* Initialize the default log_level */
5116 pinstance->current_log_level = pmcraid_log_level;
5117
5118 /* Setup variables required for reset engine */
5119 pinstance->ioa_state = IOA_STATE_UNKNOWN;
5120 pinstance->reset_cmd = NULL;
5121 return 0;
5122}
5123
89a36810
AR
5124/**
5125 * pmcraid_shutdown - shutdown adapter controller.
5126 * @pdev: pci device struct
5127 *
5128 * Issues an adapter shutdown to the card waits for its completion
5129 *
5130 * Return value
5131 * none
5132 */
5133static void pmcraid_shutdown(struct pci_dev *pdev)
5134{
5135 struct pmcraid_instance *pinstance = pci_get_drvdata(pdev);
5136 pmcraid_reset_bringdown(pinstance);
5137}
5138
5139
5140/**
5141 * pmcraid_get_minor - returns unused minor number from minor number bitmap
5142 */
5143static unsigned short pmcraid_get_minor(void)
5144{
5145 int minor;
5146
36d9e0e8 5147 minor = find_first_zero_bit(pmcraid_minor, PMCRAID_MAX_ADAPTERS);
89a36810
AR
5148 __set_bit(minor, pmcraid_minor);
5149 return minor;
5150}
5151
5152/**
5153 * pmcraid_release_minor - releases given minor back to minor number bitmap
5154 */
5155static void pmcraid_release_minor(unsigned short minor)
5156{
5157 __clear_bit(minor, pmcraid_minor);
5158}
5159
5160/**
5161 * pmcraid_setup_chrdev - allocates a minor number and registers a char device
5162 *
5163 * @pinstance: pointer to adapter instance for which to register device
5164 *
5165 * Return value
5166 * 0 in case of success, otherwise non-zero
5167 */
5168static int pmcraid_setup_chrdev(struct pmcraid_instance *pinstance)
5169{
5170 int minor;
5171 int error;
5172
5173 minor = pmcraid_get_minor();
5174 cdev_init(&pinstance->cdev, &pmcraid_fops);
5175 pinstance->cdev.owner = THIS_MODULE;
5176
5177 error = cdev_add(&pinstance->cdev, MKDEV(pmcraid_major, minor), 1);
5178
5179 if (error)
5180 pmcraid_release_minor(minor);
5181 else
5182 device_create(pmcraid_class, NULL, MKDEV(pmcraid_major, minor),
c20c4267 5183 NULL, "%s%u", PMCRAID_DEVFILE, minor);
89a36810
AR
5184 return error;
5185}
5186
5187/**
5188 * pmcraid_release_chrdev - unregisters per-adapter management interface
5189 *
5190 * @pinstance: pointer to adapter instance structure
5191 *
5192 * Return value
5193 * none
5194 */
5195static void pmcraid_release_chrdev(struct pmcraid_instance *pinstance)
5196{
5197 pmcraid_release_minor(MINOR(pinstance->cdev.dev));
5198 device_destroy(pmcraid_class,
5199 MKDEV(pmcraid_major, MINOR(pinstance->cdev.dev)));
5200 cdev_del(&pinstance->cdev);
5201}
5202
5203/**
5204 * pmcraid_remove - IOA hot plug remove entry point
5205 * @pdev: pci device struct
5206 *
5207 * Return value
5208 * none
5209 */
6f039790 5210static void pmcraid_remove(struct pci_dev *pdev)
89a36810
AR
5211{
5212 struct pmcraid_instance *pinstance = pci_get_drvdata(pdev);
5213
5214 /* remove the management interface (/dev file) for this device */
5215 pmcraid_release_chrdev(pinstance);
5216
5217 /* remove host template from scsi midlayer */
5218 scsi_remove_host(pinstance->host);
5219
5220 /* block requests from mid-layer */
5221 scsi_block_requests(pinstance->host);
5222
5223 /* initiate shutdown adapter */
5224 pmcraid_shutdown(pdev);
5225
5226 pmcraid_disable_interrupts(pinstance, ~0);
43829731 5227 flush_work(&pinstance->worker_q);
89a36810
AR
5228
5229 pmcraid_kill_tasklets(pinstance);
5230 pmcraid_unregister_interrupt_handler(pinstance);
5231 pmcraid_release_buffers(pinstance);
5232 iounmap(pinstance->mapped_dma_addr);
5233 pci_release_regions(pdev);
5234 scsi_host_put(pinstance->host);
5235 pci_disable_device(pdev);
5236
5237 return;
5238}
5239
5240#ifdef CONFIG_PM
5241/**
5242 * pmcraid_suspend - driver suspend entry point for power management
5243 * @pdev: PCI device structure
5244 * @state: PCI power state to suspend routine
5245 *
5246 * Return Value - 0 always
5247 */
5248static int pmcraid_suspend(struct pci_dev *pdev, pm_message_t state)
5249{
5250 struct pmcraid_instance *pinstance = pci_get_drvdata(pdev);
5251
5252 pmcraid_shutdown(pdev);
5253 pmcraid_disable_interrupts(pinstance, ~0);
5254 pmcraid_kill_tasklets(pinstance);
5255 pci_set_drvdata(pinstance->pdev, pinstance);
5256 pmcraid_unregister_interrupt_handler(pinstance);
5257 pci_save_state(pdev);
5258 pci_disable_device(pdev);
5259 pci_set_power_state(pdev, pci_choose_state(pdev, state));
5260
5261 return 0;
5262}
5263
5264/**
5265 * pmcraid_resume - driver resume entry point PCI power management
5266 * @pdev: PCI device structure
5267 *
5268 * Return Value - 0 in case of success. Error code in case of any failure
5269 */
5270static int pmcraid_resume(struct pci_dev *pdev)
5271{
5272 struct pmcraid_instance *pinstance = pci_get_drvdata(pdev);
5273 struct Scsi_Host *host = pinstance->host;
5274 int rc;
89a36810
AR
5275
5276 pci_set_power_state(pdev, PCI_D0);
5277 pci_enable_wake(pdev, PCI_D0, 0);
5278 pci_restore_state(pdev);
5279
5280 rc = pci_enable_device(pdev);
5281
5282 if (rc) {
34876402 5283 dev_err(&pdev->dev, "resume: Enable device failed\n");
89a36810
AR
5284 return rc;
5285 }
5286
5287 pci_set_master(pdev);
5288
371a6c32
CH
5289 if (sizeof(dma_addr_t) == 4 ||
5290 dma_set_mask(&pdev->dev, DMA_BIT_MASK(64)))
5291 rc = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32));
89a36810
AR
5292
5293 if (rc == 0)
371a6c32 5294 rc = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32));
89a36810
AR
5295
5296 if (rc != 0) {
34876402 5297 dev_err(&pdev->dev, "resume: Failed to set PCI DMA mask\n");
89a36810
AR
5298 goto disable_device;
5299 }
5300
c20c4267 5301 pmcraid_disable_interrupts(pinstance, ~0);
89a36810 5302 atomic_set(&pinstance->outstanding_cmds, 0);
89a36810
AR
5303 rc = pmcraid_register_interrupt_handler(pinstance);
5304
5305 if (rc) {
34876402
AR
5306 dev_err(&pdev->dev,
5307 "resume: couldn't register interrupt handlers\n");
89a36810
AR
5308 rc = -ENODEV;
5309 goto release_host;
5310 }
5311
5312 pmcraid_init_tasklets(pinstance);
5313 pmcraid_enable_interrupts(pinstance, PMCRAID_PCI_INTERRUPTS);
5314
5315 /* Start with hard reset sequence which brings up IOA to operational
5316 * state as well as completes the reset sequence.
5317 */
5318 pinstance->ioa_hard_reset = 1;
5319
5320 /* Start IOA firmware initialization and bring card to Operational
5321 * state.
5322 */
5323 if (pmcraid_reset_bringup(pinstance)) {
c20c4267 5324 dev_err(&pdev->dev, "couldn't initialize IOA\n");
89a36810
AR
5325 rc = -ENODEV;
5326 goto release_tasklets;
5327 }
5328
5329 return 0;
5330
5331release_tasklets:
c20c4267 5332 pmcraid_disable_interrupts(pinstance, ~0);
89a36810
AR
5333 pmcraid_kill_tasklets(pinstance);
5334 pmcraid_unregister_interrupt_handler(pinstance);
5335
5336release_host:
5337 scsi_host_put(host);
5338
5339disable_device:
5340 pci_disable_device(pdev);
5341
5342 return rc;
5343}
5344
5345#else
5346
5347#define pmcraid_suspend NULL
5348#define pmcraid_resume NULL
5349
5350#endif /* CONFIG_PM */
5351
5352/**
5353 * pmcraid_complete_ioa_reset - Called by either timer or tasklet during
c20c4267 5354 * completion of the ioa reset
89a36810
AR
5355 * @cmd: pointer to reset command block
5356 */
5357static void pmcraid_complete_ioa_reset(struct pmcraid_cmd *cmd)
5358{
5359 struct pmcraid_instance *pinstance = cmd->drv_inst;
5360 unsigned long flags;
5361
5362 spin_lock_irqsave(pinstance->host->host_lock, flags);
5363 pmcraid_ioa_reset(cmd);
5364 spin_unlock_irqrestore(pinstance->host->host_lock, flags);
5365 scsi_unblock_requests(pinstance->host);
5366 schedule_work(&pinstance->worker_q);
5367}
5368
5369/**
5370 * pmcraid_set_supported_devs - sends SET SUPPORTED DEVICES to IOAFP
5371 *
5372 * @cmd: pointer to pmcraid_cmd structure
5373 *
5374 * Return Value
5375 * 0 for success or non-zero for failure cases
5376 */
5377static void pmcraid_set_supported_devs(struct pmcraid_cmd *cmd)
5378{
5379 struct pmcraid_ioarcb *ioarcb = &cmd->ioa_cb->ioarcb;
5380 void (*cmd_done) (struct pmcraid_cmd *) = pmcraid_complete_ioa_reset;
5381
5382 pmcraid_reinit_cmdblk(cmd);
5383
5384 ioarcb->resource_handle = cpu_to_le32(PMCRAID_IOA_RES_HANDLE);
5385 ioarcb->request_type = REQ_TYPE_IOACMD;
5386 ioarcb->cdb[0] = PMCRAID_SET_SUPPORTED_DEVICES;
5387 ioarcb->cdb[1] = ALL_DEVICES_SUPPORTED;
5388
5389 /* If this was called as part of resource table reinitialization due to
5390 * lost CCN, it is enough to return the command block back to free pool
5391 * as part of set_supported_devs completion function.
5392 */
5393 if (cmd->drv_inst->reinit_cfg_table) {
5394 cmd->drv_inst->reinit_cfg_table = 0;
5395 cmd->release = 1;
5396 cmd_done = pmcraid_reinit_cfgtable_done;
5397 }
5398
5399 /* we will be done with the reset sequence after set supported devices,
5400 * setup the done function to return the command block back to free
5401 * pool
5402 */
5403 pmcraid_send_cmd(cmd,
5404 cmd_done,
5405 PMCRAID_SET_SUP_DEV_TIMEOUT,
5406 pmcraid_timeout_handler);
5407 return;
5408}
5409
592488a3
AR
5410/**
5411 * pmcraid_set_timestamp - set the timestamp to IOAFP
5412 *
5413 * @cmd: pointer to pmcraid_cmd structure
5414 *
5415 * Return Value
5416 * 0 for success or non-zero for failure cases
5417 */
5418static void pmcraid_set_timestamp(struct pmcraid_cmd *cmd)
5419{
5420 struct pmcraid_instance *pinstance = cmd->drv_inst;
5421 struct pmcraid_ioarcb *ioarcb = &cmd->ioa_cb->ioarcb;
5422 __be32 time_stamp_len = cpu_to_be32(PMCRAID_TIMESTAMP_LEN);
b22ee87d 5423 struct pmcraid_ioadl_desc *ioadl;
45c80be6 5424 u64 timestamp;
592488a3 5425
9c9bd593 5426 timestamp = ktime_get_real_seconds() * 1000;
592488a3
AR
5427
5428 pinstance->timestamp_data->timestamp[0] = (__u8)(timestamp);
5429 pinstance->timestamp_data->timestamp[1] = (__u8)((timestamp) >> 8);
5430 pinstance->timestamp_data->timestamp[2] = (__u8)((timestamp) >> 16);
5431 pinstance->timestamp_data->timestamp[3] = (__u8)((timestamp) >> 24);
5432 pinstance->timestamp_data->timestamp[4] = (__u8)((timestamp) >> 32);
5433 pinstance->timestamp_data->timestamp[5] = (__u8)((timestamp) >> 40);
5434
5435 pmcraid_reinit_cmdblk(cmd);
5436 ioarcb->request_type = REQ_TYPE_SCSI;
5437 ioarcb->resource_handle = cpu_to_le32(PMCRAID_IOA_RES_HANDLE);
5438 ioarcb->cdb[0] = PMCRAID_SCSI_SET_TIMESTAMP;
5439 ioarcb->cdb[1] = PMCRAID_SCSI_SERVICE_ACTION;
5440 memcpy(&(ioarcb->cdb[6]), &time_stamp_len, sizeof(time_stamp_len));
5441
5442 ioarcb->ioadl_bus_addr = cpu_to_le64((cmd->ioa_cb_bus_addr) +
5443 offsetof(struct pmcraid_ioarcb,
5444 add_data.u.ioadl[0]));
5445 ioarcb->ioadl_length = cpu_to_le32(sizeof(struct pmcraid_ioadl_desc));
45c80be6 5446 ioarcb->ioarcb_bus_addr &= cpu_to_le64(~(0x1FULL));
592488a3
AR
5447
5448 ioarcb->request_flags0 |= NO_LINK_DESCS;
5449 ioarcb->request_flags0 |= TRANSFER_DIR_WRITE;
5450 ioarcb->data_transfer_length =
5451 cpu_to_le32(sizeof(struct pmcraid_timestamp_data));
5452 ioadl = &(ioarcb->add_data.u.ioadl[0]);
5453 ioadl->flags = IOADL_FLAGS_LAST_DESC;
5454 ioadl->address = cpu_to_le64(pinstance->timestamp_data_baddr);
5455 ioadl->data_len = cpu_to_le32(sizeof(struct pmcraid_timestamp_data));
5456
5457 if (!pinstance->timestamp_error) {
5458 pinstance->timestamp_error = 0;
5459 pmcraid_send_cmd(cmd, pmcraid_set_supported_devs,
5460 PMCRAID_INTERNAL_TIMEOUT, pmcraid_timeout_handler);
5461 } else {
5462 pmcraid_send_cmd(cmd, pmcraid_return_cmd,
5463 PMCRAID_INTERNAL_TIMEOUT, pmcraid_timeout_handler);
5464 return;
5465 }
5466}
5467
5468
89a36810
AR
5469/**
5470 * pmcraid_init_res_table - Initialize the resource table
5471 * @cmd: pointer to pmcraid command struct
5472 *
5473 * This function looks through the existing resource table, comparing
5474 * it with the config table. This function will take care of old/new
5475 * devices and schedule adding/removing them from the mid-layer
5476 * as appropriate.
5477 *
5478 * Return value
5479 * None
5480 */
5481static void pmcraid_init_res_table(struct pmcraid_cmd *cmd)
5482{
5483 struct pmcraid_instance *pinstance = cmd->drv_inst;
5484 struct pmcraid_resource_entry *res, *temp;
5485 struct pmcraid_config_table_entry *cfgte;
5486 unsigned long lock_flags;
5487 int found, rc, i;
c20c4267 5488 u16 fw_version;
89a36810
AR
5489 LIST_HEAD(old_res);
5490
5491 if (pinstance->cfg_table->flags & MICROCODE_UPDATE_REQUIRED)
34876402 5492 pmcraid_err("IOA requires microcode download\n");
89a36810 5493
c20c4267
AR
5494 fw_version = be16_to_cpu(pinstance->inq_data->fw_version);
5495
89a36810
AR
5496 /* resource list is protected by pinstance->resource_lock.
5497 * init_res_table can be called from probe (user-thread) or runtime
5498 * reset (timer/tasklet)
5499 */
5500 spin_lock_irqsave(&pinstance->resource_lock, lock_flags);
5501
5502 list_for_each_entry_safe(res, temp, &pinstance->used_res_q, queue)
5503 list_move_tail(&res->queue, &old_res);
5504
45c80be6 5505 for (i = 0; i < le16_to_cpu(pinstance->cfg_table->num_entries); i++) {
c20c4267
AR
5506 if (be16_to_cpu(pinstance->inq_data->fw_version) <=
5507 PMCRAID_FW_VERSION_1)
5508 cfgte = &pinstance->cfg_table->entries[i];
5509 else
5510 cfgte = (struct pmcraid_config_table_entry *)
5511 &pinstance->cfg_table->entries_ext[i];
89a36810 5512
c20c4267 5513 if (!pmcraid_expose_resource(fw_version, cfgte))
89a36810
AR
5514 continue;
5515
5516 found = 0;
5517
5518 /* If this entry was already detected and initialized */
5519 list_for_each_entry_safe(res, temp, &old_res, queue) {
5520
5521 rc = memcmp(&res->cfg_entry.resource_address,
5522 &cfgte->resource_address,
5523 sizeof(cfgte->resource_address));
5524 if (!rc) {
5525 list_move_tail(&res->queue,
5526 &pinstance->used_res_q);
5527 found = 1;
5528 break;
5529 }
5530 }
5531
5532 /* If this is new entry, initialize it and add it the queue */
5533 if (!found) {
5534
5535 if (list_empty(&pinstance->free_res_q)) {
34876402 5536 pmcraid_err("Too many devices attached\n");
89a36810
AR
5537 break;
5538 }
5539
5540 found = 1;
5541 res = list_entry(pinstance->free_res_q.next,
5542 struct pmcraid_resource_entry, queue);
5543
5544 res->scsi_dev = NULL;
5545 res->change_detected = RES_CHANGE_ADD;
5546 res->reset_progress = 0;
5547 list_move_tail(&res->queue, &pinstance->used_res_q);
5548 }
5549
5550 /* copy new configuration table entry details into driver
5551 * maintained resource entry
5552 */
5553 if (found) {
5554 memcpy(&res->cfg_entry, cfgte,
c20c4267 5555 pinstance->config_table_entry_size);
89a36810
AR
5556 pmcraid_info("New res type:%x, vset:%x, addr:%x:\n",
5557 res->cfg_entry.resource_type,
c20c4267
AR
5558 (fw_version <= PMCRAID_FW_VERSION_1 ?
5559 res->cfg_entry.unique_flags1 :
45c80be6 5560 le16_to_cpu(res->cfg_entry.array_id) & 0xFF),
89a36810
AR
5561 le32_to_cpu(res->cfg_entry.resource_address));
5562 }
5563 }
5564
5565 /* Detect any deleted entries, mark them for deletion from mid-layer */
5566 list_for_each_entry_safe(res, temp, &old_res, queue) {
5567
5568 if (res->scsi_dev) {
5569 res->change_detected = RES_CHANGE_DEL;
5570 res->cfg_entry.resource_handle =
5571 PMCRAID_INVALID_RES_HANDLE;
5572 list_move_tail(&res->queue, &pinstance->used_res_q);
5573 } else {
5574 list_move_tail(&res->queue, &pinstance->free_res_q);
5575 }
5576 }
5577
5578 /* release the resource list lock */
5579 spin_unlock_irqrestore(&pinstance->resource_lock, lock_flags);
592488a3 5580 pmcraid_set_timestamp(cmd);
89a36810
AR
5581}
5582
5583/**
5584 * pmcraid_querycfg - Send a Query IOA Config to the adapter.
5585 * @cmd: pointer pmcraid_cmd struct
5586 *
5587 * This function sends a Query IOA Configuration command to the adapter to
5588 * retrieve the IOA configuration table.
5589 *
5590 * Return value:
5591 * none
5592 */
5593static void pmcraid_querycfg(struct pmcraid_cmd *cmd)
5594{
5595 struct pmcraid_ioarcb *ioarcb = &cmd->ioa_cb->ioarcb;
b22ee87d 5596 struct pmcraid_ioadl_desc *ioadl;
89a36810 5597 struct pmcraid_instance *pinstance = cmd->drv_inst;
45c80be6 5598 __be32 cfg_table_size = cpu_to_be32(sizeof(struct pmcraid_config_table));
89a36810 5599
c20c4267
AR
5600 if (be16_to_cpu(pinstance->inq_data->fw_version) <=
5601 PMCRAID_FW_VERSION_1)
5602 pinstance->config_table_entry_size =
5603 sizeof(struct pmcraid_config_table_entry);
5604 else
5605 pinstance->config_table_entry_size =
5606 sizeof(struct pmcraid_config_table_entry_ext);
5607
89a36810
AR
5608 ioarcb->request_type = REQ_TYPE_IOACMD;
5609 ioarcb->resource_handle = cpu_to_le32(PMCRAID_IOA_RES_HANDLE);
5610
5611 ioarcb->cdb[0] = PMCRAID_QUERY_IOA_CONFIG;
5612
5613 /* firmware requires 4-byte length field, specified in B.E format */
5614 memcpy(&(ioarcb->cdb[10]), &cfg_table_size, sizeof(cfg_table_size));
5615
5616 /* Since entire config table can be described by single IOADL, it can
5617 * be part of IOARCB itself
5618 */
5619 ioarcb->ioadl_bus_addr = cpu_to_le64((cmd->ioa_cb_bus_addr) +
5620 offsetof(struct pmcraid_ioarcb,
5621 add_data.u.ioadl[0]));
5622 ioarcb->ioadl_length = cpu_to_le32(sizeof(struct pmcraid_ioadl_desc));
45c80be6 5623 ioarcb->ioarcb_bus_addr &= cpu_to_le64(~0x1FULL);
89a36810
AR
5624
5625 ioarcb->request_flags0 |= NO_LINK_DESCS;
5626 ioarcb->data_transfer_length =
5627 cpu_to_le32(sizeof(struct pmcraid_config_table));
5628
5629 ioadl = &(ioarcb->add_data.u.ioadl[0]);
88197966 5630 ioadl->flags = IOADL_FLAGS_LAST_DESC;
89a36810
AR
5631 ioadl->address = cpu_to_le64(pinstance->cfg_table_bus_addr);
5632 ioadl->data_len = cpu_to_le32(sizeof(struct pmcraid_config_table));
5633
5634 pmcraid_send_cmd(cmd, pmcraid_init_res_table,
5635 PMCRAID_INTERNAL_TIMEOUT, pmcraid_timeout_handler);
5636}
5637
5638
5639/**
c20c4267 5640 * pmcraid_probe - PCI probe entry pointer for PMC MaxRAID controller driver
89a36810
AR
5641 * @pdev: pointer to pci device structure
5642 * @dev_id: pointer to device ids structure
5643 *
5644 * Return Value
5645 * returns 0 if the device is claimed and successfully configured.
5646 * returns non-zero error code in case of any failure
5647 */
6f039790
GKH
5648static int pmcraid_probe(struct pci_dev *pdev,
5649 const struct pci_device_id *dev_id)
89a36810
AR
5650{
5651 struct pmcraid_instance *pinstance;
5652 struct Scsi_Host *host;
5653 void __iomem *mapped_pci_addr;
5654 int rc = PCIBIOS_SUCCESSFUL;
5655
5656 if (atomic_read(&pmcraid_adapter_count) >= PMCRAID_MAX_ADAPTERS) {
5657 pmcraid_err
5658 ("maximum number(%d) of supported adapters reached\n",
5659 atomic_read(&pmcraid_adapter_count));
5660 return -ENOMEM;
5661 }
5662
5663 atomic_inc(&pmcraid_adapter_count);
5664 rc = pci_enable_device(pdev);
5665
5666 if (rc) {
5667 dev_err(&pdev->dev, "Cannot enable adapter\n");
5668 atomic_dec(&pmcraid_adapter_count);
5669 return rc;
5670 }
5671
5672 dev_info(&pdev->dev,
5673 "Found new IOA(%x:%x), Total IOA count: %d\n",
5674 pdev->vendor, pdev->device,
5675 atomic_read(&pmcraid_adapter_count));
5676
5677 rc = pci_request_regions(pdev, PMCRAID_DRIVER_NAME);
5678
5679 if (rc < 0) {
5680 dev_err(&pdev->dev,
5681 "Couldn't register memory range of registers\n");
5682 goto out_disable_device;
5683 }
5684
5685 mapped_pci_addr = pci_iomap(pdev, 0, 0);
5686
5687 if (!mapped_pci_addr) {
5688 dev_err(&pdev->dev, "Couldn't map PCI registers memory\n");
5689 rc = -ENOMEM;
5690 goto out_release_regions;
5691 }
5692
5693 pci_set_master(pdev);
5694
5695 /* Firmware requires the system bus address of IOARCB to be within
5696 * 32-bit addressable range though it has 64-bit IOARRIN register.
5697 * However, firmware supports 64-bit streaming DMA buffers, whereas
371a6c32 5698 * coherent buffers are to be 32-bit. Since dma_alloc_coherent always
89a36810 5699 * returns memory within 4GB (if not, change this logic), coherent
25985edc 5700 * buffers are within firmware acceptable address ranges.
89a36810 5701 */
371a6c32
CH
5702 if (sizeof(dma_addr_t) == 4 ||
5703 dma_set_mask(&pdev->dev, DMA_BIT_MASK(64)))
5704 rc = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32));
89a36810
AR
5705
5706 /* firmware expects 32-bit DMA addresses for IOARRIN register; set 32
371a6c32 5707 * bit mask for dma_alloc_coherent to return addresses within 4GB
89a36810
AR
5708 */
5709 if (rc == 0)
371a6c32 5710 rc = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32));
89a36810
AR
5711
5712 if (rc != 0) {
5713 dev_err(&pdev->dev, "Failed to set PCI DMA mask\n");
5714 goto cleanup_nomem;
5715 }
5716
5717 host = scsi_host_alloc(&pmcraid_host_template,
5718 sizeof(struct pmcraid_instance));
5719
5720 if (!host) {
5721 dev_err(&pdev->dev, "scsi_host_alloc failed!\n");
5722 rc = -ENOMEM;
5723 goto cleanup_nomem;
5724 }
5725
5726 host->max_id = PMCRAID_MAX_NUM_TARGETS_PER_BUS;
5727 host->max_lun = PMCRAID_MAX_NUM_LUNS_PER_TARGET;
5728 host->unique_id = host->host_no;
5729 host->max_channel = PMCRAID_MAX_BUS_TO_SCAN;
5730 host->max_cmd_len = PMCRAID_MAX_CDB_LEN;
5731
5732 /* zero out entire instance structure */
5733 pinstance = (struct pmcraid_instance *)host->hostdata;
5734 memset(pinstance, 0, sizeof(*pinstance));
5735
5736 pinstance->chip_cfg =
5737 (struct pmcraid_chip_details *)(dev_id->driver_data);
5738
5739 rc = pmcraid_init_instance(pdev, host, mapped_pci_addr);
5740
5741 if (rc < 0) {
5742 dev_err(&pdev->dev, "failed to initialize adapter instance\n");
5743 goto out_scsi_host_put;
5744 }
5745
5746 pci_set_drvdata(pdev, pinstance);
5747
5748 /* Save PCI config-space for use following the reset */
5749 rc = pci_save_state(pinstance->pdev);
5750
5751 if (rc != 0) {
5752 dev_err(&pdev->dev, "Failed to save PCI config space\n");
5753 goto out_scsi_host_put;
5754 }
5755
5756 pmcraid_disable_interrupts(pinstance, ~0);
5757
5758 rc = pmcraid_register_interrupt_handler(pinstance);
5759
5760 if (rc) {
34876402 5761 dev_err(&pdev->dev, "couldn't register interrupt handler\n");
89a36810
AR
5762 goto out_scsi_host_put;
5763 }
5764
5765 pmcraid_init_tasklets(pinstance);
5766
5767 /* allocate verious buffers used by LLD.*/
5768 rc = pmcraid_init_buffers(pinstance);
5769
5770 if (rc) {
5771 pmcraid_err("couldn't allocate memory blocks\n");
5772 goto out_unregister_isr;
5773 }
5774
5775 /* check the reset type required */
5776 pmcraid_reset_type(pinstance);
5777
5778 pmcraid_enable_interrupts(pinstance, PMCRAID_PCI_INTERRUPTS);
5779
5780 /* Start IOA firmware initialization and bring card to Operational
5781 * state.
5782 */
5783 pmcraid_info("starting IOA initialization sequence\n");
5784 if (pmcraid_reset_bringup(pinstance)) {
c20c4267 5785 dev_err(&pdev->dev, "couldn't initialize IOA\n");
89a36810
AR
5786 rc = 1;
5787 goto out_release_bufs;
5788 }
5789
5790 /* Add adapter instance into mid-layer list */
5791 rc = scsi_add_host(pinstance->host, &pdev->dev);
5792 if (rc != 0) {
5793 pmcraid_err("couldn't add host into mid-layer: %d\n", rc);
5794 goto out_release_bufs;
5795 }
5796
5797 scsi_scan_host(pinstance->host);
5798
5799 rc = pmcraid_setup_chrdev(pinstance);
5800
5801 if (rc != 0) {
5802 pmcraid_err("couldn't create mgmt interface, error: %x\n",
5803 rc);
5804 goto out_remove_host;
5805 }
5806
5807 /* Schedule worker thread to handle CCN and take care of adding and
5808 * removing devices to OS
5809 */
5810 atomic_set(&pinstance->expose_resources, 1);
5811 schedule_work(&pinstance->worker_q);
5812 return rc;
5813
5814out_remove_host:
5815 scsi_remove_host(host);
5816
5817out_release_bufs:
5818 pmcraid_release_buffers(pinstance);
5819
5820out_unregister_isr:
5821 pmcraid_kill_tasklets(pinstance);
5822 pmcraid_unregister_interrupt_handler(pinstance);
5823
5824out_scsi_host_put:
5825 scsi_host_put(host);
5826
5827cleanup_nomem:
5828 iounmap(mapped_pci_addr);
5829
5830out_release_regions:
5831 pci_release_regions(pdev);
5832
5833out_disable_device:
5834 atomic_dec(&pmcraid_adapter_count);
89a36810
AR
5835 pci_disable_device(pdev);
5836 return -ENODEV;
5837}
5838
5839/*
18daf910 5840 * PCI driver structure of pmcraid driver
89a36810
AR
5841 */
5842static struct pci_driver pmcraid_driver = {
5843 .name = PMCRAID_DRIVER_NAME,
5844 .id_table = pmcraid_pci_table,
5845 .probe = pmcraid_probe,
5846 .remove = pmcraid_remove,
5847 .suspend = pmcraid_suspend,
5848 .resume = pmcraid_resume,
5849 .shutdown = pmcraid_shutdown
5850};
5851
89a36810
AR
5852/**
5853 * pmcraid_init - module load entry point
5854 */
5855static int __init pmcraid_init(void)
5856{
5857 dev_t dev;
5858 int error;
5859
a1b66665
MM
5860 pmcraid_info("%s Device Driver version: %s\n",
5861 PMCRAID_DRIVER_NAME, PMCRAID_DRIVER_VERSION);
89a36810
AR
5862
5863 error = alloc_chrdev_region(&dev, 0,
5864 PMCRAID_MAX_ADAPTERS,
5865 PMCRAID_DEVFILE);
5866
5867 if (error) {
5868 pmcraid_err("failed to get a major number for adapters\n");
5869 goto out_init;
5870 }
5871
5872 pmcraid_major = MAJOR(dev);
5873 pmcraid_class = class_create(THIS_MODULE, PMCRAID_DEVFILE);
5874
5875 if (IS_ERR(pmcraid_class)) {
5876 error = PTR_ERR(pmcraid_class);
278cee05 5877 pmcraid_err("failed to register with sysfs, error = %x\n",
89a36810
AR
5878 error);
5879 goto out_unreg_chrdev;
5880 }
5881
89a36810
AR
5882 error = pmcraid_netlink_init();
5883
2d76a247
QL
5884 if (error) {
5885 class_destroy(pmcraid_class);
89a36810 5886 goto out_unreg_chrdev;
2d76a247 5887 }
89a36810
AR
5888
5889 error = pci_register_driver(&pmcraid_driver);
5890
5891 if (error == 0)
5892 goto out_init;
5893
5894 pmcraid_err("failed to register pmcraid driver, error = %x\n",
5895 error);
5896 class_destroy(pmcraid_class);
5897 pmcraid_netlink_release();
5898
5899out_unreg_chrdev:
5900 unregister_chrdev_region(MKDEV(pmcraid_major, 0), PMCRAID_MAX_ADAPTERS);
34876402 5901
89a36810
AR
5902out_init:
5903 return error;
5904}
5905
5906/**
5907 * pmcraid_exit - module unload entry point
5908 */
5909static void __exit pmcraid_exit(void)
5910{
5911 pmcraid_netlink_release();
89a36810
AR
5912 unregister_chrdev_region(MKDEV(pmcraid_major, 0),
5913 PMCRAID_MAX_ADAPTERS);
5914 pci_unregister_driver(&pmcraid_driver);
592488a3 5915 class_destroy(pmcraid_class);
89a36810
AR
5916}
5917
5918module_init(pmcraid_init);
5919module_exit(pmcraid_exit);