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soundwire: cadence: add parity error injection through debugfs
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1// SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause)
2// Copyright(c) 2015-17 Intel Corporation.
3
4#include <linux/acpi.h>
0231453b 5#include <linux/delay.h>
7c3cd189 6#include <linux/mod_devicetable.h>
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7#include <linux/pm_runtime.h>
8#include <linux/soundwire/sdw_registers.h>
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9#include <linux/soundwire/sdw.h>
10#include "bus.h"
bcac5902 11#include "sysfs_local.h"
7c3cd189 12
dbb50c7a
BL
13static DEFINE_IDA(sdw_ida);
14
15static int sdw_get_id(struct sdw_bus *bus)
16{
17 int rc = ida_alloc(&sdw_ida, GFP_KERNEL);
18
19 if (rc < 0)
20 return rc;
21
22 bus->id = rc;
23 return 0;
24}
25
7c3cd189 26/**
5cab3ff2 27 * sdw_bus_master_add() - add a bus Master instance
7c3cd189 28 * @bus: bus instance
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29 * @parent: parent device
30 * @fwnode: firmware node handle
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31 *
32 * Initializes the bus instance, read properties and create child
33 * devices.
34 */
5cab3ff2
PLB
35int sdw_bus_master_add(struct sdw_bus *bus, struct device *parent,
36 struct fwnode_handle *fwnode)
7c3cd189 37{
5c3eb9f7 38 struct sdw_master_prop *prop = NULL;
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39 int ret;
40
7ceaa40b
PLB
41 if (!parent) {
42 pr_err("SoundWire parent device is not set\n");
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43 return -ENODEV;
44 }
45
dbb50c7a
BL
46 ret = sdw_get_id(bus);
47 if (ret) {
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PLB
48 dev_err(parent, "Failed to get bus id\n");
49 return ret;
50 }
51
52 ret = sdw_master_device_add(bus, parent, fwnode);
53 if (ret) {
54 dev_err(parent, "Failed to add master device at link %d\n",
55 bus->link_id);
dbb50c7a
BL
56 return ret;
57 }
58
9d715fa0 59 if (!bus->ops) {
17ed5bef 60 dev_err(bus->dev, "SoundWire Bus ops are not set\n");
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61 return -EINVAL;
62 }
63
64 mutex_init(&bus->msg_lock);
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65 mutex_init(&bus->bus_lock);
66 INIT_LIST_HEAD(&bus->slaves);
89e59053 67 INIT_LIST_HEAD(&bus->m_rt_list);
7c3cd189 68
ce6e74d0
SN
69 /*
70 * Initialize multi_link flag
71 * TODO: populate this flag by reading property from FW node
72 */
73 bus->multi_link = false;
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74 if (bus->ops->read_prop) {
75 ret = bus->ops->read_prop(bus);
76 if (ret < 0) {
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77 dev_err(bus->dev,
78 "Bus read properties failed:%d\n", ret);
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79 return ret;
80 }
81 }
82
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83 sdw_bus_debugfs_init(bus);
84
7c3cd189 85 /*
21c2de29 86 * Device numbers in SoundWire are 0 through 15. Enumeration device
7c3cd189
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87 * number (0), Broadcast device number (15), Group numbers (12 and
88 * 13) and Master device number (14) are not used for assignment so
89 * mask these and other higher bits.
90 */
91
92 /* Set higher order bits */
93 *bus->assigned = ~GENMASK(SDW_BROADCAST_DEV_NUM, SDW_ENUM_DEV_NUM);
94
95 /* Set enumuration device number and broadcast device number */
96 set_bit(SDW_ENUM_DEV_NUM, bus->assigned);
97 set_bit(SDW_BROADCAST_DEV_NUM, bus->assigned);
98
99 /* Set group device numbers and master device number */
100 set_bit(SDW_GROUP12_DEV_NUM, bus->assigned);
101 set_bit(SDW_GROUP13_DEV_NUM, bus->assigned);
102 set_bit(SDW_MASTER_DEV_NUM, bus->assigned);
103
104 /*
105 * SDW is an enumerable bus, but devices can be powered off. So,
106 * they won't be able to report as present.
107 *
108 * Create Slave devices based on Slaves described in
109 * the respective firmware (ACPI/DT)
110 */
111 if (IS_ENABLED(CONFIG_ACPI) && ACPI_HANDLE(bus->dev))
112 ret = sdw_acpi_find_slaves(bus);
a2e48458
SK
113 else if (IS_ENABLED(CONFIG_OF) && bus->dev->of_node)
114 ret = sdw_of_find_slaves(bus);
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115 else
116 ret = -ENOTSUPP; /* No ACPI/DT so error out */
117
118 if (ret) {
119 dev_err(bus->dev, "Finding slaves failed:%d\n", ret);
120 return ret;
121 }
122
99b8a5d6 123 /*
5c3eb9f7 124 * Initialize clock values based on Master properties. The max
3424305b 125 * frequency is read from max_clk_freq property. Current assumption
5c3eb9f7
SK
126 * is that the bus will start at highest clock frequency when
127 * powered on.
128 *
99b8a5d6
SK
129 * Default active bank will be 0 as out of reset the Slaves have
130 * to start with bank 0 (Table 40 of Spec)
131 */
5c3eb9f7 132 prop = &bus->prop;
3424305b 133 bus->params.max_dr_freq = prop->max_clk_freq * SDW_DOUBLE_RATE_FACTOR;
5c3eb9f7 134 bus->params.curr_dr_freq = bus->params.max_dr_freq;
99b8a5d6
SK
135 bus->params.curr_bank = SDW_BANK0;
136 bus->params.next_bank = SDW_BANK1;
137
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138 return 0;
139}
5cab3ff2 140EXPORT_SYMBOL(sdw_bus_master_add);
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141
142static int sdw_delete_slave(struct device *dev, void *data)
143{
144 struct sdw_slave *slave = dev_to_sdw_dev(dev);
145 struct sdw_bus *bus = slave->bus;
146
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147 pm_runtime_disable(dev);
148
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149 sdw_slave_debugfs_exit(slave);
150
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151 mutex_lock(&bus->bus_lock);
152
153 if (slave->dev_num) /* clear dev_num if assigned */
154 clear_bit(slave->dev_num, bus->assigned);
155
156 list_del_init(&slave->node);
157 mutex_unlock(&bus->bus_lock);
158
159 device_unregister(dev);
160 return 0;
161}
162
163/**
5cab3ff2 164 * sdw_bus_master_delete() - delete the bus master instance
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165 * @bus: bus to be deleted
166 *
167 * Remove the instance, delete the child devices.
168 */
5cab3ff2 169void sdw_bus_master_delete(struct sdw_bus *bus)
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170{
171 device_for_each_child(bus->dev, NULL, sdw_delete_slave);
7ceaa40b 172 sdw_master_device_del(bus);
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173
174 sdw_bus_debugfs_exit(bus);
dbb50c7a 175 ida_free(&sdw_ida, bus->id);
7c3cd189 176}
5cab3ff2 177EXPORT_SYMBOL(sdw_bus_master_delete);
7c3cd189 178
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179/*
180 * SDW IO Calls
181 */
182
183static inline int find_response_code(enum sdw_command_response resp)
184{
185 switch (resp) {
186 case SDW_CMD_OK:
187 return 0;
188
189 case SDW_CMD_IGNORED:
190 return -ENODATA;
191
192 case SDW_CMD_TIMEOUT:
193 return -ETIMEDOUT;
194
195 default:
196 return -EIO;
197 }
198}
199
200static inline int do_transfer(struct sdw_bus *bus, struct sdw_msg *msg)
201{
202 int retry = bus->prop.err_threshold;
203 enum sdw_command_response resp;
204 int ret = 0, i;
205
206 for (i = 0; i <= retry; i++) {
207 resp = bus->ops->xfer_msg(bus, msg);
208 ret = find_response_code(resp);
209
210 /* if cmd is ok or ignored return */
211 if (ret == 0 || ret == -ENODATA)
212 return ret;
213 }
214
215 return ret;
216}
217
218static inline int do_transfer_defer(struct sdw_bus *bus,
73ede046
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219 struct sdw_msg *msg,
220 struct sdw_defer *defer)
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221{
222 int retry = bus->prop.err_threshold;
223 enum sdw_command_response resp;
224 int ret = 0, i;
225
226 defer->msg = msg;
227 defer->length = msg->len;
a306a0e4 228 init_completion(&defer->complete);
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229
230 for (i = 0; i <= retry; i++) {
231 resp = bus->ops->xfer_msg_defer(bus, msg, defer);
232 ret = find_response_code(resp);
233 /* if cmd is ok or ignored return */
234 if (ret == 0 || ret == -ENODATA)
235 return ret;
236 }
237
238 return ret;
239}
240
241static int sdw_reset_page(struct sdw_bus *bus, u16 dev_num)
242{
243 int retry = bus->prop.err_threshold;
244 enum sdw_command_response resp;
245 int ret = 0, i;
246
247 for (i = 0; i <= retry; i++) {
248 resp = bus->ops->reset_page_addr(bus, dev_num);
249 ret = find_response_code(resp);
250 /* if cmd is ok or ignored return */
251 if (ret == 0 || ret == -ENODATA)
252 return ret;
253 }
254
255 return ret;
256}
257
a350aff4
PLB
258static int sdw_transfer_unlocked(struct sdw_bus *bus, struct sdw_msg *msg)
259{
260 int ret;
261
262 ret = do_transfer(bus, msg);
263 if (ret != 0 && ret != -ENODATA)
264 dev_err(bus->dev, "trf on Slave %d failed:%d\n",
265 msg->dev_num, ret);
266
267 if (msg->page)
268 sdw_reset_page(bus, msg->dev_num);
269
270 return ret;
271}
272
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273/**
274 * sdw_transfer() - Synchronous transfer message to a SDW Slave device
275 * @bus: SDW bus
276 * @msg: SDW message to be xfered
277 */
278int sdw_transfer(struct sdw_bus *bus, struct sdw_msg *msg)
279{
280 int ret;
281
282 mutex_lock(&bus->msg_lock);
283
a350aff4 284 ret = sdw_transfer_unlocked(bus, msg);
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285
286 mutex_unlock(&bus->msg_lock);
287
288 return ret;
289}
290
291/**
292 * sdw_transfer_defer() - Asynchronously transfer message to a SDW Slave device
293 * @bus: SDW bus
294 * @msg: SDW message to be xfered
295 * @defer: Defer block for signal completion
296 *
297 * Caller needs to hold the msg_lock lock while calling this
298 */
299int sdw_transfer_defer(struct sdw_bus *bus, struct sdw_msg *msg,
73ede046 300 struct sdw_defer *defer)
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301{
302 int ret;
303
304 if (!bus->ops->xfer_msg_defer)
305 return -ENOTSUPP;
306
307 ret = do_transfer_defer(bus, msg, defer);
308 if (ret != 0 && ret != -ENODATA)
309 dev_err(bus->dev, "Defer trf on Slave %d failed:%d\n",
73ede046 310 msg->dev_num, ret);
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311
312 if (msg->page)
313 sdw_reset_page(bus, msg->dev_num);
314
315 return ret;
316}
317
9d715fa0 318int sdw_fill_msg(struct sdw_msg *msg, struct sdw_slave *slave,
73ede046 319 u32 addr, size_t count, u16 dev_num, u8 flags, u8 *buf)
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320{
321 memset(msg, 0, sizeof(*msg));
322 msg->addr = addr; /* addr is 16 bit and truncated here */
323 msg->len = count;
324 msg->dev_num = dev_num;
325 msg->flags = flags;
326 msg->buf = buf;
9d715fa0 327
f779ad09 328 if (addr < SDW_REG_NO_PAGE) /* no paging area */
9d715fa0 329 return 0;
f779ad09
GL
330
331 if (addr >= SDW_REG_MAX) { /* illegal addr */
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332 pr_err("SDW: Invalid address %x passed\n", addr);
333 return -EINVAL;
334 }
335
336 if (addr < SDW_REG_OPTIONAL_PAGE) { /* 32k but no page */
337 if (slave && !slave->prop.paging_support)
338 return 0;
21c2de29 339 /* no need for else as that will fall-through to paging */
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340 }
341
342 /* paging mandatory */
343 if (dev_num == SDW_ENUM_DEV_NUM || dev_num == SDW_BROADCAST_DEV_NUM) {
344 pr_err("SDW: Invalid device for paging :%d\n", dev_num);
345 return -EINVAL;
346 }
347
348 if (!slave) {
349 pr_err("SDW: No slave for paging addr\n");
350 return -EINVAL;
f779ad09
GL
351 }
352
353 if (!slave->prop.paging_support) {
9d715fa0 354 dev_err(&slave->dev,
17ed5bef 355 "address %x needs paging but no support\n", addr);
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356 return -EINVAL;
357 }
358
d5826a4b
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359 msg->addr_page1 = FIELD_GET(SDW_SCP_ADDRPAGE1_MASK, addr);
360 msg->addr_page2 = FIELD_GET(SDW_SCP_ADDRPAGE2_MASK, addr);
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361 msg->addr |= BIT(15);
362 msg->page = true;
363
364 return 0;
365}
366
60ee9be2
PLB
367/*
368 * Read/Write IO functions.
369 * no_pm versions can only be called by the bus, e.g. while enumerating or
370 * handling suspend-resume sequences.
371 * all clients need to use the pm versions
372 */
373
374static int
375sdw_nread_no_pm(struct sdw_slave *slave, u32 addr, size_t count, u8 *val)
376{
377 struct sdw_msg msg;
378 int ret;
379
380 ret = sdw_fill_msg(&msg, slave, addr, count,
381 slave->dev_num, SDW_MSG_FLAG_READ, val);
382 if (ret < 0)
383 return ret;
384
385 return sdw_transfer(slave->bus, &msg);
386}
387
388static int
389sdw_nwrite_no_pm(struct sdw_slave *slave, u32 addr, size_t count, u8 *val)
390{
391 struct sdw_msg msg;
392 int ret;
393
394 ret = sdw_fill_msg(&msg, slave, addr, count,
395 slave->dev_num, SDW_MSG_FLAG_WRITE, val);
396 if (ret < 0)
397 return ret;
398
399 return sdw_transfer(slave->bus, &msg);
400}
401
402static int sdw_write_no_pm(struct sdw_slave *slave, u32 addr, u8 value)
403{
404 return sdw_nwrite_no_pm(slave, addr, 1, &value);
405}
406
0231453b
RW
407static int
408sdw_bread_no_pm(struct sdw_bus *bus, u16 dev_num, u32 addr)
409{
410 struct sdw_msg msg;
411 u8 buf;
412 int ret;
413
414 ret = sdw_fill_msg(&msg, NULL, addr, 1, dev_num,
415 SDW_MSG_FLAG_READ, &buf);
416 if (ret)
417 return ret;
418
419 ret = sdw_transfer(bus, &msg);
420 if (ret < 0)
421 return ret;
f779ad09
GL
422
423 return buf;
0231453b
RW
424}
425
426static int
427sdw_bwrite_no_pm(struct sdw_bus *bus, u16 dev_num, u32 addr, u8 value)
428{
429 struct sdw_msg msg;
430 int ret;
431
432 ret = sdw_fill_msg(&msg, NULL, addr, 1, dev_num,
433 SDW_MSG_FLAG_WRITE, &value);
434 if (ret)
435 return ret;
436
437 return sdw_transfer(bus, &msg);
438}
439
a350aff4
PLB
440int sdw_bread_no_pm_unlocked(struct sdw_bus *bus, u16 dev_num, u32 addr)
441{
442 struct sdw_msg msg;
443 u8 buf;
444 int ret;
445
446 ret = sdw_fill_msg(&msg, NULL, addr, 1, dev_num,
447 SDW_MSG_FLAG_READ, &buf);
448 if (ret)
449 return ret;
450
451 ret = sdw_transfer_unlocked(bus, &msg);
452 if (ret < 0)
453 return ret;
454
455 return buf;
456}
457EXPORT_SYMBOL(sdw_bread_no_pm_unlocked);
458
459int sdw_bwrite_no_pm_unlocked(struct sdw_bus *bus, u16 dev_num, u32 addr, u8 value)
460{
461 struct sdw_msg msg;
462 int ret;
463
464 ret = sdw_fill_msg(&msg, NULL, addr, 1, dev_num,
465 SDW_MSG_FLAG_WRITE, &value);
466 if (ret)
467 return ret;
468
469 return sdw_transfer_unlocked(bus, &msg);
470}
471EXPORT_SYMBOL(sdw_bwrite_no_pm_unlocked);
472
0231453b
RW
473static int
474sdw_read_no_pm(struct sdw_slave *slave, u32 addr)
475{
476 u8 buf;
477 int ret;
478
479 ret = sdw_nread_no_pm(slave, addr, 1, &buf);
480 if (ret < 0)
481 return ret;
482 else
483 return buf;
484}
485
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486/**
487 * sdw_nread() - Read "n" contiguous SDW Slave registers
488 * @slave: SDW Slave
489 * @addr: Register address
490 * @count: length
491 * @val: Buffer for values to be read
492 */
493int sdw_nread(struct sdw_slave *slave, u32 addr, size_t count, u8 *val)
494{
9d715fa0
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495 int ret;
496
9d715fa0 497 ret = pm_runtime_get_sync(slave->bus->dev);
60ee9be2
PLB
498 if (ret < 0 && ret != -EACCES) {
499 pm_runtime_put_noidle(slave->bus->dev);
9d715fa0 500 return ret;
60ee9be2
PLB
501 }
502
503 ret = sdw_nread_no_pm(slave, addr, count, val);
9d715fa0 504
60ee9be2 505 pm_runtime_mark_last_busy(slave->bus->dev);
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VK
506 pm_runtime_put(slave->bus->dev);
507
508 return ret;
509}
510EXPORT_SYMBOL(sdw_nread);
511
512/**
513 * sdw_nwrite() - Write "n" contiguous SDW Slave registers
514 * @slave: SDW Slave
515 * @addr: Register address
516 * @count: length
517 * @val: Buffer for values to be read
518 */
519int sdw_nwrite(struct sdw_slave *slave, u32 addr, size_t count, u8 *val)
520{
9d715fa0
VK
521 int ret;
522
9d715fa0 523 ret = pm_runtime_get_sync(slave->bus->dev);
60ee9be2
PLB
524 if (ret < 0 && ret != -EACCES) {
525 pm_runtime_put_noidle(slave->bus->dev);
9d715fa0 526 return ret;
60ee9be2
PLB
527 }
528
529 ret = sdw_nwrite_no_pm(slave, addr, count, val);
9d715fa0 530
60ee9be2 531 pm_runtime_mark_last_busy(slave->bus->dev);
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532 pm_runtime_put(slave->bus->dev);
533
534 return ret;
535}
536EXPORT_SYMBOL(sdw_nwrite);
537
538/**
539 * sdw_read() - Read a SDW Slave register
540 * @slave: SDW Slave
541 * @addr: Register address
542 */
543int sdw_read(struct sdw_slave *slave, u32 addr)
544{
545 u8 buf;
546 int ret;
547
548 ret = sdw_nread(slave, addr, 1, &buf);
549 if (ret < 0)
550 return ret;
f779ad09
GL
551
552 return buf;
9d715fa0
VK
553}
554EXPORT_SYMBOL(sdw_read);
555
556/**
557 * sdw_write() - Write a SDW Slave register
558 * @slave: SDW Slave
559 * @addr: Register address
560 * @value: Register value
561 */
562int sdw_write(struct sdw_slave *slave, u32 addr, u8 value)
563{
564 return sdw_nwrite(slave, addr, 1, &value);
9d715fa0
VK
565}
566EXPORT_SYMBOL(sdw_write);
567
d52d7a1b
SK
568/*
569 * SDW alert handling
570 */
571
572/* called with bus_lock held */
573static struct sdw_slave *sdw_get_slave(struct sdw_bus *bus, int i)
574{
575 struct sdw_slave *slave = NULL;
576
577 list_for_each_entry(slave, &bus->slaves, node) {
578 if (slave->dev_num == i)
579 return slave;
580 }
581
582 return NULL;
583}
584
585static int sdw_compare_devid(struct sdw_slave *slave, struct sdw_slave_id id)
586{
2e8c4ad1 587 if (slave->id.mfg_id != id.mfg_id ||
09830d5e 588 slave->id.part_id != id.part_id ||
2e8c4ad1
PLB
589 slave->id.class_id != id.class_id ||
590 (slave->id.unique_id != SDW_IGNORED_UNIQUE_ID &&
591 slave->id.unique_id != id.unique_id))
d52d7a1b
SK
592 return -ENODEV;
593
594 return 0;
595}
596
597/* called with bus_lock held */
598static int sdw_get_device_num(struct sdw_slave *slave)
599{
600 int bit;
601
602 bit = find_first_zero_bit(slave->bus->assigned, SDW_MAX_DEVICES);
603 if (bit == SDW_MAX_DEVICES) {
604 bit = -ENODEV;
605 goto err;
606 }
607
608 /*
609 * Do not update dev_num in Slave data structure here,
610 * Update once program dev_num is successful
611 */
612 set_bit(bit, slave->bus->assigned);
613
614err:
615 return bit;
616}
617
618static int sdw_assign_device_num(struct sdw_slave *slave)
619{
620 int ret, dev_num;
fd6a3ac8 621 bool new_device = false;
d52d7a1b
SK
622
623 /* check first if device number is assigned, if so reuse that */
624 if (!slave->dev_num) {
fd6a3ac8
PLB
625 if (!slave->dev_num_sticky) {
626 mutex_lock(&slave->bus->bus_lock);
627 dev_num = sdw_get_device_num(slave);
628 mutex_unlock(&slave->bus->bus_lock);
629 if (dev_num < 0) {
630 dev_err(slave->bus->dev, "Get dev_num failed: %d\n",
631 dev_num);
632 return dev_num;
633 }
634 slave->dev_num = dev_num;
635 slave->dev_num_sticky = dev_num;
636 new_device = true;
637 } else {
638 slave->dev_num = slave->dev_num_sticky;
d52d7a1b 639 }
fd6a3ac8
PLB
640 }
641
642 if (!new_device)
f48f4fd9
PLB
643 dev_dbg(slave->bus->dev,
644 "Slave already registered, reusing dev_num:%d\n",
645 slave->dev_num);
d52d7a1b 646
fd6a3ac8
PLB
647 /* Clear the slave->dev_num to transfer message on device 0 */
648 dev_num = slave->dev_num;
649 slave->dev_num = 0;
d52d7a1b 650
d300de4f 651 ret = sdw_write_no_pm(slave, SDW_SCP_DEVNUMBER, dev_num);
d52d7a1b 652 if (ret < 0) {
6e0ac6a6
PLB
653 dev_err(&slave->dev, "Program device_num %d failed: %d\n",
654 dev_num, ret);
d52d7a1b
SK
655 return ret;
656 }
657
658 /* After xfer of msg, restore dev_num */
fd6a3ac8 659 slave->dev_num = slave->dev_num_sticky;
d52d7a1b
SK
660
661 return 0;
662}
663
7c3cd189 664void sdw_extract_slave_id(struct sdw_bus *bus,
73ede046 665 u64 addr, struct sdw_slave_id *id)
7c3cd189 666{
17ed5bef 667 dev_dbg(bus->dev, "SDW Slave Addr: %llx\n", addr);
7c3cd189 668
2c6cff68
PLB
669 id->sdw_version = SDW_VERSION(addr);
670 id->unique_id = SDW_UNIQUE_ID(addr);
671 id->mfg_id = SDW_MFG_ID(addr);
672 id->part_id = SDW_PART_ID(addr);
673 id->class_id = SDW_CLASS_ID(addr);
7c3cd189
VK
674
675 dev_dbg(bus->dev,
17ed5bef 676 "SDW Slave class_id %x, part_id %x, mfg_id %x, unique_id %x, version %x\n",
7c3cd189
VK
677 id->class_id, id->part_id, id->mfg_id,
678 id->unique_id, id->sdw_version);
7c3cd189 679}
d52d7a1b
SK
680
681static int sdw_program_device_num(struct sdw_bus *bus)
682{
683 u8 buf[SDW_NUM_DEV_ID_REGISTERS] = {0};
684 struct sdw_slave *slave, *_s;
685 struct sdw_slave_id id;
686 struct sdw_msg msg;
687 bool found = false;
688 int count = 0, ret;
689 u64 addr;
690
691 /* No Slave, so use raw xfer api */
692 ret = sdw_fill_msg(&msg, NULL, SDW_SCP_DEVID_0,
73ede046 693 SDW_NUM_DEV_ID_REGISTERS, 0, SDW_MSG_FLAG_READ, buf);
d52d7a1b
SK
694 if (ret < 0)
695 return ret;
696
697 do {
698 ret = sdw_transfer(bus, &msg);
699 if (ret == -ENODATA) { /* end of device id reads */
6e0ac6a6 700 dev_dbg(bus->dev, "No more devices to enumerate\n");
d52d7a1b
SK
701 ret = 0;
702 break;
703 }
704 if (ret < 0) {
705 dev_err(bus->dev, "DEVID read fail:%d\n", ret);
706 break;
707 }
708
709 /*
710 * Construct the addr and extract. Cast the higher shift
711 * bits to avoid truncation due to size limit.
712 */
713 addr = buf[5] | (buf[4] << 8) | (buf[3] << 16) |
0132af05
CIK
714 ((u64)buf[2] << 24) | ((u64)buf[1] << 32) |
715 ((u64)buf[0] << 40);
d52d7a1b
SK
716
717 sdw_extract_slave_id(bus, addr, &id);
718
719 /* Now compare with entries */
720 list_for_each_entry_safe(slave, _s, &bus->slaves, node) {
721 if (sdw_compare_devid(slave, id) == 0) {
722 found = true;
723
724 /*
725 * Assign a new dev_num to this Slave and
726 * not mark it present. It will be marked
727 * present after it reports ATTACHED on new
728 * dev_num
729 */
730 ret = sdw_assign_device_num(slave);
731 if (ret) {
732 dev_err(slave->bus->dev,
17ed5bef 733 "Assign dev_num failed:%d\n",
d52d7a1b
SK
734 ret);
735 return ret;
736 }
737
738 break;
739 }
740 }
741
d7b956b6 742 if (!found) {
d52d7a1b 743 /* TODO: Park this device in Group 13 */
17ed5bef 744 dev_err(bus->dev, "Slave Entry not found\n");
d52d7a1b
SK
745 }
746
747 count++;
748
749 /*
750 * Check till error out or retry (count) exhausts.
751 * Device can drop off and rejoin during enumeration
752 * so count till twice the bound.
753 */
754
755 } while (ret == 0 && count < (SDW_MAX_DEVICES * 2));
756
757 return ret;
758}
759
760static void sdw_modify_slave_status(struct sdw_slave *slave,
73ede046 761 enum sdw_slave_status status)
d52d7a1b
SK
762{
763 mutex_lock(&slave->bus->bus_lock);
fb9469e5
PLB
764
765 dev_vdbg(&slave->dev,
766 "%s: changing status slave %d status %d new status %d\n",
767 __func__, slave->dev_num, slave->status, status);
768
769 if (status == SDW_SLAVE_UNATTACHED) {
770 dev_dbg(&slave->dev,
771 "%s: initializing completion for Slave %d\n",
772 __func__, slave->dev_num);
773
774 init_completion(&slave->enumeration_complete);
a90def06 775 init_completion(&slave->initialization_complete);
fb9469e5
PLB
776
777 } else if ((status == SDW_SLAVE_ATTACHED) &&
778 (slave->status == SDW_SLAVE_UNATTACHED)) {
779 dev_dbg(&slave->dev,
780 "%s: signaling completion for Slave %d\n",
781 __func__, slave->dev_num);
782
783 complete(&slave->enumeration_complete);
784 }
d52d7a1b
SK
785 slave->status = status;
786 mutex_unlock(&slave->bus->bus_lock);
787}
788
0231453b
RW
789static enum sdw_clk_stop_mode sdw_get_clk_stop_mode(struct sdw_slave *slave)
790{
791 enum sdw_clk_stop_mode mode;
792
793 /*
794 * Query for clock stop mode if Slave implements
795 * ops->get_clk_stop_mode, else read from property.
796 */
797 if (slave->ops && slave->ops->get_clk_stop_mode) {
798 mode = slave->ops->get_clk_stop_mode(slave);
799 } else {
800 if (slave->prop.clk_stop_mode1)
801 mode = SDW_CLK_STOP_MODE1;
802 else
803 mode = SDW_CLK_STOP_MODE0;
804 }
805
806 return mode;
807}
808
809static int sdw_slave_clk_stop_callback(struct sdw_slave *slave,
810 enum sdw_clk_stop_mode mode,
811 enum sdw_clk_stop_type type)
812{
813 int ret;
814
815 if (slave->ops && slave->ops->clk_stop) {
816 ret = slave->ops->clk_stop(slave, mode, type);
817 if (ret < 0) {
818 dev_err(&slave->dev,
819 "Clk Stop type =%d failed: %d\n", type, ret);
820 return ret;
821 }
822 }
823
824 return 0;
825}
826
827static int sdw_slave_clk_stop_prepare(struct sdw_slave *slave,
828 enum sdw_clk_stop_mode mode,
829 bool prepare)
830{
831 bool wake_en;
832 u32 val = 0;
833 int ret;
834
835 wake_en = slave->prop.wake_capable;
836
837 if (prepare) {
838 val = SDW_SCP_SYSTEMCTRL_CLK_STP_PREP;
839
840 if (mode == SDW_CLK_STOP_MODE1)
841 val |= SDW_SCP_SYSTEMCTRL_CLK_STP_MODE1;
842
843 if (wake_en)
844 val |= SDW_SCP_SYSTEMCTRL_WAKE_UP_EN;
845 } else {
846 val = sdw_read_no_pm(slave, SDW_SCP_SYSTEMCTRL);
847
848 val &= ~(SDW_SCP_SYSTEMCTRL_CLK_STP_PREP);
849 }
850
851 ret = sdw_write_no_pm(slave, SDW_SCP_SYSTEMCTRL, val);
852
853 if (ret != 0)
854 dev_err(&slave->dev,
855 "Clock Stop prepare failed for slave: %d", ret);
856
857 return ret;
858}
859
860static int sdw_bus_wait_for_clk_prep_deprep(struct sdw_bus *bus, u16 dev_num)
861{
862 int retry = bus->clk_stop_timeout;
863 int val;
864
865 do {
866 val = sdw_bread_no_pm(bus, dev_num, SDW_SCP_STAT) &
867 SDW_SCP_STAT_CLK_STP_NF;
868 if (!val) {
869 dev_info(bus->dev, "clock stop prep/de-prep done slave:%d",
870 dev_num);
871 return 0;
872 }
873
874 usleep_range(1000, 1500);
875 retry--;
876 } while (retry);
877
878 dev_err(bus->dev, "clock stop prep/de-prep failed slave:%d",
879 dev_num);
880
881 return -ETIMEDOUT;
882}
883
884/**
885 * sdw_bus_prep_clk_stop: prepare Slave(s) for clock stop
886 *
887 * @bus: SDW bus instance
888 *
889 * Query Slave for clock stop mode and prepare for that mode.
890 */
891int sdw_bus_prep_clk_stop(struct sdw_bus *bus)
892{
893 enum sdw_clk_stop_mode slave_mode;
894 bool simple_clk_stop = true;
895 struct sdw_slave *slave;
896 bool is_slave = false;
897 int ret = 0;
898
899 /*
900 * In order to save on transition time, prepare
901 * each Slave and then wait for all Slave(s) to be
902 * prepared for clock stop.
903 */
904 list_for_each_entry(slave, &bus->slaves, node) {
905 if (!slave->dev_num)
906 continue;
907
0231453b
RW
908 if (slave->status != SDW_SLAVE_ATTACHED &&
909 slave->status != SDW_SLAVE_ALERT)
910 continue;
911
929cfee3
BL
912 /* Identify if Slave(s) are available on Bus */
913 is_slave = true;
914
0231453b
RW
915 slave_mode = sdw_get_clk_stop_mode(slave);
916 slave->curr_clk_stop_mode = slave_mode;
917
918 ret = sdw_slave_clk_stop_callback(slave, slave_mode,
919 SDW_CLK_PRE_PREPARE);
920 if (ret < 0) {
921 dev_err(&slave->dev,
922 "pre-prepare failed:%d", ret);
923 return ret;
924 }
925
926 ret = sdw_slave_clk_stop_prepare(slave,
927 slave_mode, true);
928 if (ret < 0) {
929 dev_err(&slave->dev,
930 "pre-prepare failed:%d", ret);
931 return ret;
932 }
933
934 if (slave_mode == SDW_CLK_STOP_MODE1)
935 simple_clk_stop = false;
936 }
937
938 if (is_slave && !simple_clk_stop) {
939 ret = sdw_bus_wait_for_clk_prep_deprep(bus,
940 SDW_BROADCAST_DEV_NUM);
941 if (ret < 0)
942 return ret;
943 }
944
929cfee3
BL
945 /* Don't need to inform slaves if there is no slave attached */
946 if (!is_slave)
947 return ret;
948
0231453b
RW
949 /* Inform slaves that prep is done */
950 list_for_each_entry(slave, &bus->slaves, node) {
951 if (!slave->dev_num)
952 continue;
953
954 if (slave->status != SDW_SLAVE_ATTACHED &&
955 slave->status != SDW_SLAVE_ALERT)
956 continue;
957
958 slave_mode = slave->curr_clk_stop_mode;
959
960 if (slave_mode == SDW_CLK_STOP_MODE1) {
961 ret = sdw_slave_clk_stop_callback(slave,
962 slave_mode,
963 SDW_CLK_POST_PREPARE);
964
965 if (ret < 0) {
966 dev_err(&slave->dev,
967 "post-prepare failed:%d", ret);
968 }
969 }
970 }
971
972 return ret;
973}
974EXPORT_SYMBOL(sdw_bus_prep_clk_stop);
975
976/**
977 * sdw_bus_clk_stop: stop bus clock
978 *
979 * @bus: SDW bus instance
980 *
981 * After preparing the Slaves for clock stop, stop the clock by broadcasting
982 * write to SCP_CTRL register.
983 */
984int sdw_bus_clk_stop(struct sdw_bus *bus)
985{
986 int ret;
987
988 /*
989 * broadcast clock stop now, attached Slaves will ACK this,
990 * unattached will ignore
991 */
992 ret = sdw_bwrite_no_pm(bus, SDW_BROADCAST_DEV_NUM,
993 SDW_SCP_CTRL, SDW_SCP_CTRL_CLK_STP_NOW);
994 if (ret < 0) {
dde73538
PLB
995 if (ret == -ENODATA)
996 dev_dbg(bus->dev,
997 "ClockStopNow Broadcast msg ignored %d", ret);
998 else
999 dev_err(bus->dev,
1000 "ClockStopNow Broadcast msg failed %d", ret);
0231453b
RW
1001 return ret;
1002 }
1003
1004 return 0;
1005}
1006EXPORT_SYMBOL(sdw_bus_clk_stop);
1007
1008/**
1009 * sdw_bus_exit_clk_stop: Exit clock stop mode
1010 *
1011 * @bus: SDW bus instance
1012 *
1013 * This De-prepares the Slaves by exiting Clock Stop Mode 0. For the Slaves
1014 * exiting Clock Stop Mode 1, they will be de-prepared after they enumerate
1015 * back.
1016 */
1017int sdw_bus_exit_clk_stop(struct sdw_bus *bus)
1018{
1019 enum sdw_clk_stop_mode mode;
1020 bool simple_clk_stop = true;
1021 struct sdw_slave *slave;
1022 bool is_slave = false;
1023 int ret;
1024
1025 /*
1026 * In order to save on transition time, de-prepare
1027 * each Slave and then wait for all Slave(s) to be
1028 * de-prepared after clock resume.
1029 */
1030 list_for_each_entry(slave, &bus->slaves, node) {
1031 if (!slave->dev_num)
1032 continue;
1033
0231453b
RW
1034 if (slave->status != SDW_SLAVE_ATTACHED &&
1035 slave->status != SDW_SLAVE_ALERT)
1036 continue;
1037
929cfee3
BL
1038 /* Identify if Slave(s) are available on Bus */
1039 is_slave = true;
1040
0231453b
RW
1041 mode = slave->curr_clk_stop_mode;
1042
1043 if (mode == SDW_CLK_STOP_MODE1) {
1044 simple_clk_stop = false;
1045 continue;
1046 }
1047
1048 ret = sdw_slave_clk_stop_callback(slave, mode,
1049 SDW_CLK_PRE_DEPREPARE);
1050 if (ret < 0)
1051 dev_warn(&slave->dev,
1052 "clk stop deprep failed:%d", ret);
1053
1054 ret = sdw_slave_clk_stop_prepare(slave, mode,
1055 false);
1056
1057 if (ret < 0)
1058 dev_warn(&slave->dev,
1059 "clk stop deprep failed:%d", ret);
1060 }
1061
1062 if (is_slave && !simple_clk_stop)
1063 sdw_bus_wait_for_clk_prep_deprep(bus, SDW_BROADCAST_DEV_NUM);
1064
929cfee3
BL
1065 /*
1066 * Don't need to call slave callback function if there is no slave
1067 * attached
1068 */
1069 if (!is_slave)
1070 return 0;
1071
0231453b
RW
1072 list_for_each_entry(slave, &bus->slaves, node) {
1073 if (!slave->dev_num)
1074 continue;
1075
1076 if (slave->status != SDW_SLAVE_ATTACHED &&
1077 slave->status != SDW_SLAVE_ALERT)
1078 continue;
1079
1080 mode = slave->curr_clk_stop_mode;
1081 sdw_slave_clk_stop_callback(slave, mode,
1082 SDW_CLK_POST_DEPREPARE);
1083 }
1084
1085 return 0;
1086}
1087EXPORT_SYMBOL(sdw_bus_exit_clk_stop);
1088
79df15b7 1089int sdw_configure_dpn_intr(struct sdw_slave *slave,
73ede046 1090 int port, bool enable, int mask)
79df15b7
SK
1091{
1092 u32 addr;
1093 int ret;
1094 u8 val = 0;
1095
1096 addr = SDW_DPN_INTMASK(port);
1097
1098 /* Set/Clear port ready interrupt mask */
1099 if (enable) {
1100 val |= mask;
1101 val |= SDW_DPN_INT_PORT_READY;
1102 } else {
1103 val &= ~(mask);
1104 val &= ~SDW_DPN_INT_PORT_READY;
1105 }
1106
1107 ret = sdw_update(slave, addr, (mask | SDW_DPN_INT_PORT_READY), val);
1108 if (ret < 0)
1109 dev_err(slave->bus->dev,
17ed5bef 1110 "SDW_DPN_INTMASK write failed:%d\n", val);
79df15b7
SK
1111
1112 return ret;
1113}
1114
29d158f9
PLB
1115static int sdw_slave_set_frequency(struct sdw_slave *slave)
1116{
1117 u32 mclk_freq = slave->bus->prop.mclk_freq;
1118 u32 curr_freq = slave->bus->params.curr_dr_freq >> 1;
1119 unsigned int scale;
1120 u8 scale_index;
1121 u8 base;
1122 int ret;
1123
1124 /*
1125 * frequency base and scale registers are required for SDCA
1126 * devices. They may also be used for 1.2+/non-SDCA devices,
1127 * but we will need a DisCo property to cover this case
1128 */
1129 if (!slave->id.class_id)
1130 return 0;
1131
1132 if (!mclk_freq) {
1133 dev_err(&slave->dev,
1134 "no bus MCLK, cannot set SDW_SCP_BUS_CLOCK_BASE\n");
1135 return -EINVAL;
1136 }
1137
1138 /*
1139 * map base frequency using Table 89 of SoundWire 1.2 spec.
1140 * The order of the tests just follows the specification, this
1141 * is not a selection between possible values or a search for
1142 * the best value but just a mapping. Only one case per platform
1143 * is relevant.
1144 * Some BIOS have inconsistent values for mclk_freq but a
1145 * correct root so we force the mclk_freq to avoid variations.
1146 */
1147 if (!(19200000 % mclk_freq)) {
1148 mclk_freq = 19200000;
1149 base = SDW_SCP_BASE_CLOCK_19200000_HZ;
1150 } else if (!(24000000 % mclk_freq)) {
1151 mclk_freq = 24000000;
1152 base = SDW_SCP_BASE_CLOCK_24000000_HZ;
1153 } else if (!(24576000 % mclk_freq)) {
1154 mclk_freq = 24576000;
1155 base = SDW_SCP_BASE_CLOCK_24576000_HZ;
1156 } else if (!(22579200 % mclk_freq)) {
1157 mclk_freq = 22579200;
1158 base = SDW_SCP_BASE_CLOCK_22579200_HZ;
1159 } else if (!(32000000 % mclk_freq)) {
1160 mclk_freq = 32000000;
1161 base = SDW_SCP_BASE_CLOCK_32000000_HZ;
1162 } else {
1163 dev_err(&slave->dev,
1164 "Unsupported clock base, mclk %d\n",
1165 mclk_freq);
1166 return -EINVAL;
1167 }
1168
1169 if (mclk_freq % curr_freq) {
1170 dev_err(&slave->dev,
1171 "mclk %d is not multiple of bus curr_freq %d\n",
1172 mclk_freq, curr_freq);
1173 return -EINVAL;
1174 }
1175
1176 scale = mclk_freq / curr_freq;
1177
1178 /*
1179 * map scale to Table 90 of SoundWire 1.2 spec - and check
1180 * that the scale is a power of two and maximum 64
1181 */
1182 scale_index = ilog2(scale);
1183
1184 if (BIT(scale_index) != scale || scale_index > 6) {
1185 dev_err(&slave->dev,
1186 "No match found for scale %d, bus mclk %d curr_freq %d\n",
1187 scale, mclk_freq, curr_freq);
1188 return -EINVAL;
1189 }
1190 scale_index++;
1191
1192 ret = sdw_write(slave, SDW_SCP_BUS_CLOCK_BASE, base);
1193 if (ret < 0) {
1194 dev_err(&slave->dev,
1195 "SDW_SCP_BUS_CLOCK_BASE write failed:%d\n", ret);
1196 return ret;
1197 }
1198
1199 /* initialize scale for both banks */
1200 ret = sdw_write(slave, SDW_SCP_BUSCLOCK_SCALE_B0, scale_index);
1201 if (ret < 0) {
1202 dev_err(&slave->dev,
1203 "SDW_SCP_BUSCLOCK_SCALE_B0 write failed:%d\n", ret);
1204 return ret;
1205 }
1206 ret = sdw_write(slave, SDW_SCP_BUSCLOCK_SCALE_B1, scale_index);
1207 if (ret < 0)
1208 dev_err(&slave->dev,
1209 "SDW_SCP_BUSCLOCK_SCALE_B1 write failed:%d\n", ret);
1210
1211 dev_dbg(&slave->dev,
1212 "Configured bus base %d, scale %d, mclk %d, curr_freq %d\n",
1213 base, scale_index, mclk_freq, curr_freq);
1214
1215 return ret;
1216}
1217
d52d7a1b
SK
1218static int sdw_initialize_slave(struct sdw_slave *slave)
1219{
1220 struct sdw_slave_prop *prop = &slave->prop;
1221 int ret;
1222 u8 val;
1223
29d158f9
PLB
1224 ret = sdw_slave_set_frequency(slave);
1225 if (ret < 0)
1226 return ret;
1227
d52d7a1b 1228 /*
2acd30b9
PLB
1229 * Set SCP_INT1_MASK register, typically bus clash and
1230 * implementation-defined interrupt mask. The Parity detection
1231 * may not always be correct on startup so its use is
1232 * device-dependent, it might e.g. only be enabled in
1233 * steady-state after a couple of frames.
d52d7a1b 1234 */
2acd30b9 1235 val = slave->prop.scp_int1_mask;
d52d7a1b
SK
1236
1237 /* Enable SCP interrupts */
1238 ret = sdw_update(slave, SDW_SCP_INTMASK1, val, val);
1239 if (ret < 0) {
1240 dev_err(slave->bus->dev,
17ed5bef 1241 "SDW_SCP_INTMASK1 write failed:%d\n", ret);
d52d7a1b
SK
1242 return ret;
1243 }
1244
1245 /* No need to continue if DP0 is not present */
1246 if (!slave->prop.dp0_prop)
1247 return 0;
1248
1249 /* Enable DP0 interrupts */
8acbbfec 1250 val = prop->dp0_prop->imp_def_interrupts;
d52d7a1b
SK
1251 val |= SDW_DP0_INT_PORT_READY | SDW_DP0_INT_BRA_FAILURE;
1252
1253 ret = sdw_update(slave, SDW_DP0_INTMASK, val, val);
5de79ba8 1254 if (ret < 0)
d52d7a1b 1255 dev_err(slave->bus->dev,
17ed5bef 1256 "SDW_DP0_INTMASK read failed:%d\n", ret);
5de79ba8 1257 return ret;
d52d7a1b 1258}
b0a9c37b
VK
1259
1260static int sdw_handle_dp0_interrupt(struct sdw_slave *slave, u8 *slave_status)
1261{
1262 u8 clear = 0, impl_int_mask;
1263 int status, status2, ret, count = 0;
1264
1265 status = sdw_read(slave, SDW_DP0_INT);
1266 if (status < 0) {
1267 dev_err(slave->bus->dev,
17ed5bef 1268 "SDW_DP0_INT read failed:%d\n", status);
b0a9c37b
VK
1269 return status;
1270 }
1271
1272 do {
b0a9c37b 1273 if (status & SDW_DP0_INT_TEST_FAIL) {
17ed5bef 1274 dev_err(&slave->dev, "Test fail for port 0\n");
b0a9c37b
VK
1275 clear |= SDW_DP0_INT_TEST_FAIL;
1276 }
1277
1278 /*
1279 * Assumption: PORT_READY interrupt will be received only for
1280 * ports implementing Channel Prepare state machine (CP_SM)
1281 */
1282
1283 if (status & SDW_DP0_INT_PORT_READY) {
1284 complete(&slave->port_ready[0]);
1285 clear |= SDW_DP0_INT_PORT_READY;
1286 }
1287
1288 if (status & SDW_DP0_INT_BRA_FAILURE) {
17ed5bef 1289 dev_err(&slave->dev, "BRA failed\n");
b0a9c37b
VK
1290 clear |= SDW_DP0_INT_BRA_FAILURE;
1291 }
1292
1293 impl_int_mask = SDW_DP0_INT_IMPDEF1 |
1294 SDW_DP0_INT_IMPDEF2 | SDW_DP0_INT_IMPDEF3;
1295
1296 if (status & impl_int_mask) {
1297 clear |= impl_int_mask;
1298 *slave_status = clear;
1299 }
1300
1301 /* clear the interrupt */
1302 ret = sdw_write(slave, SDW_DP0_INT, clear);
1303 if (ret < 0) {
1304 dev_err(slave->bus->dev,
17ed5bef 1305 "SDW_DP0_INT write failed:%d\n", ret);
b0a9c37b
VK
1306 return ret;
1307 }
1308
1309 /* Read DP0 interrupt again */
1310 status2 = sdw_read(slave, SDW_DP0_INT);
1311 if (status2 < 0) {
1312 dev_err(slave->bus->dev,
17ed5bef 1313 "SDW_DP0_INT read failed:%d\n", status2);
80cd8f01 1314 return status2;
b0a9c37b
VK
1315 }
1316 status &= status2;
1317
1318 count++;
1319
1320 /* we can get alerts while processing so keep retrying */
1321 } while (status != 0 && count < SDW_READ_INTR_CLEAR_RETRY);
1322
1323 if (count == SDW_READ_INTR_CLEAR_RETRY)
17ed5bef 1324 dev_warn(slave->bus->dev, "Reached MAX_RETRY on DP0 read\n");
b0a9c37b
VK
1325
1326 return ret;
1327}
1328
1329static int sdw_handle_port_interrupt(struct sdw_slave *slave,
73ede046 1330 int port, u8 *slave_status)
b0a9c37b
VK
1331{
1332 u8 clear = 0, impl_int_mask;
1333 int status, status2, ret, count = 0;
1334 u32 addr;
1335
1336 if (port == 0)
1337 return sdw_handle_dp0_interrupt(slave, slave_status);
1338
1339 addr = SDW_DPN_INT(port);
1340 status = sdw_read(slave, addr);
1341 if (status < 0) {
1342 dev_err(slave->bus->dev,
17ed5bef 1343 "SDW_DPN_INT read failed:%d\n", status);
b0a9c37b
VK
1344
1345 return status;
1346 }
1347
1348 do {
b0a9c37b 1349 if (status & SDW_DPN_INT_TEST_FAIL) {
17ed5bef 1350 dev_err(&slave->dev, "Test fail for port:%d\n", port);
b0a9c37b
VK
1351 clear |= SDW_DPN_INT_TEST_FAIL;
1352 }
1353
1354 /*
1355 * Assumption: PORT_READY interrupt will be received only
1356 * for ports implementing CP_SM.
1357 */
1358 if (status & SDW_DPN_INT_PORT_READY) {
1359 complete(&slave->port_ready[port]);
1360 clear |= SDW_DPN_INT_PORT_READY;
1361 }
1362
1363 impl_int_mask = SDW_DPN_INT_IMPDEF1 |
1364 SDW_DPN_INT_IMPDEF2 | SDW_DPN_INT_IMPDEF3;
1365
b0a9c37b
VK
1366 if (status & impl_int_mask) {
1367 clear |= impl_int_mask;
1368 *slave_status = clear;
1369 }
1370
1371 /* clear the interrupt */
1372 ret = sdw_write(slave, addr, clear);
1373 if (ret < 0) {
1374 dev_err(slave->bus->dev,
17ed5bef 1375 "SDW_DPN_INT write failed:%d\n", ret);
b0a9c37b
VK
1376 return ret;
1377 }
1378
1379 /* Read DPN interrupt again */
1380 status2 = sdw_read(slave, addr);
80cd8f01 1381 if (status2 < 0) {
b0a9c37b 1382 dev_err(slave->bus->dev,
17ed5bef 1383 "SDW_DPN_INT read failed:%d\n", status2);
80cd8f01 1384 return status2;
b0a9c37b
VK
1385 }
1386 status &= status2;
1387
1388 count++;
1389
1390 /* we can get alerts while processing so keep retrying */
1391 } while (status != 0 && count < SDW_READ_INTR_CLEAR_RETRY);
1392
1393 if (count == SDW_READ_INTR_CLEAR_RETRY)
1394 dev_warn(slave->bus->dev, "Reached MAX_RETRY on port read");
1395
1396 return ret;
1397}
1398
1399static int sdw_handle_slave_alerts(struct sdw_slave *slave)
1400{
1401 struct sdw_slave_intr_status slave_intr;
f1fac63a 1402 u8 clear = 0, bit, port_status[15] = {0};
b0a9c37b
VK
1403 int port_num, stat, ret, count = 0;
1404 unsigned long port;
1405 bool slave_notify = false;
1406 u8 buf, buf2[2], _buf, _buf2[2];
4724f12c
PLB
1407 bool parity_check;
1408 bool parity_quirk;
b0a9c37b
VK
1409
1410 sdw_modify_slave_status(slave, SDW_SLAVE_ALERT);
1411
aa792935
RW
1412 ret = pm_runtime_get_sync(&slave->dev);
1413 if (ret < 0 && ret != -EACCES) {
1414 dev_err(&slave->dev, "Failed to resume device: %d\n", ret);
1415 pm_runtime_put_noidle(slave->bus->dev);
1416 return ret;
1417 }
1418
b0a9c37b 1419 /* Read Instat 1, Instat 2 and Instat 3 registers */
72b16d4a 1420 ret = sdw_read(slave, SDW_SCP_INT1);
b0a9c37b
VK
1421 if (ret < 0) {
1422 dev_err(slave->bus->dev,
17ed5bef 1423 "SDW_SCP_INT1 read failed:%d\n", ret);
aa792935 1424 goto io_err;
b0a9c37b 1425 }
72b16d4a 1426 buf = ret;
b0a9c37b
VK
1427
1428 ret = sdw_nread(slave, SDW_SCP_INTSTAT2, 2, buf2);
1429 if (ret < 0) {
1430 dev_err(slave->bus->dev,
17ed5bef 1431 "SDW_SCP_INT2/3 read failed:%d\n", ret);
aa792935 1432 goto io_err;
b0a9c37b
VK
1433 }
1434
1435 do {
1436 /*
1437 * Check parity, bus clash and Slave (impl defined)
1438 * interrupt
1439 */
1440 if (buf & SDW_SCP_INT1_PARITY) {
4724f12c
PLB
1441 parity_check = slave->prop.scp_int1_mask & SDW_SCP_INT1_PARITY;
1442 parity_quirk = !slave->first_interrupt_done &&
1443 (slave->prop.quirks & SDW_SLAVE_QUIRKS_INVALID_INITIAL_PARITY);
1444
1445 if (parity_check && !parity_quirk)
310f6dc6 1446 dev_err(&slave->dev, "Parity error detected\n");
b0a9c37b
VK
1447 clear |= SDW_SCP_INT1_PARITY;
1448 }
1449
1450 if (buf & SDW_SCP_INT1_BUS_CLASH) {
310f6dc6
PLB
1451 if (slave->prop.scp_int1_mask & SDW_SCP_INT1_BUS_CLASH)
1452 dev_err(&slave->dev, "Bus clash detected\n");
b0a9c37b
VK
1453 clear |= SDW_SCP_INT1_BUS_CLASH;
1454 }
1455
1456 /*
1457 * When bus clash or parity errors are detected, such errors
1458 * are unlikely to be recoverable errors.
1459 * TODO: In such scenario, reset bus. Make this configurable
1460 * via sysfs property with bus reset being the default.
1461 */
1462
1463 if (buf & SDW_SCP_INT1_IMPL_DEF) {
310f6dc6
PLB
1464 if (slave->prop.scp_int1_mask & SDW_SCP_INT1_IMPL_DEF) {
1465 dev_dbg(&slave->dev, "Slave impl defined interrupt\n");
1466 slave_notify = true;
1467 }
b0a9c37b 1468 clear |= SDW_SCP_INT1_IMPL_DEF;
b0a9c37b
VK
1469 }
1470
1471 /* Check port 0 - 3 interrupts */
1472 port = buf & SDW_SCP_INT1_PORT0_3;
1473
1474 /* To get port number corresponding to bits, shift it */
d5826a4b 1475 port = FIELD_GET(SDW_SCP_INT1_PORT0_3, port);
b0a9c37b
VK
1476 for_each_set_bit(bit, &port, 8) {
1477 sdw_handle_port_interrupt(slave, bit,
73ede046 1478 &port_status[bit]);
b0a9c37b
VK
1479 }
1480
1481 /* Check if cascade 2 interrupt is present */
1482 if (buf & SDW_SCP_INT1_SCP2_CASCADE) {
1483 port = buf2[0] & SDW_SCP_INTSTAT2_PORT4_10;
1484 for_each_set_bit(bit, &port, 8) {
1485 /* scp2 ports start from 4 */
1486 port_num = bit + 3;
1487 sdw_handle_port_interrupt(slave,
1488 port_num,
1489 &port_status[port_num]);
1490 }
1491 }
1492
1493 /* now check last cascade */
1494 if (buf2[0] & SDW_SCP_INTSTAT2_SCP3_CASCADE) {
1495 port = buf2[1] & SDW_SCP_INTSTAT3_PORT11_14;
1496 for_each_set_bit(bit, &port, 8) {
1497 /* scp3 ports start from 11 */
1498 port_num = bit + 10;
1499 sdw_handle_port_interrupt(slave,
1500 port_num,
1501 &port_status[port_num]);
1502 }
1503 }
1504
1505 /* Update the Slave driver */
09830d5e
PLB
1506 if (slave_notify && slave->ops &&
1507 slave->ops->interrupt_callback) {
b0a9c37b
VK
1508 slave_intr.control_port = clear;
1509 memcpy(slave_intr.port, &port_status,
73ede046 1510 sizeof(slave_intr.port));
b0a9c37b
VK
1511
1512 slave->ops->interrupt_callback(slave, &slave_intr);
1513 }
1514
1515 /* Ack interrupt */
1516 ret = sdw_write(slave, SDW_SCP_INT1, clear);
1517 if (ret < 0) {
1518 dev_err(slave->bus->dev,
17ed5bef 1519 "SDW_SCP_INT1 write failed:%d\n", ret);
aa792935 1520 goto io_err;
b0a9c37b
VK
1521 }
1522
c2819e19
PLB
1523 /* at this point all initial interrupt sources were handled */
1524 slave->first_interrupt_done = true;
1525
b0a9c37b
VK
1526 /*
1527 * Read status again to ensure no new interrupts arrived
1528 * while servicing interrupts.
1529 */
72b16d4a 1530 ret = sdw_read(slave, SDW_SCP_INT1);
b0a9c37b
VK
1531 if (ret < 0) {
1532 dev_err(slave->bus->dev,
17ed5bef 1533 "SDW_SCP_INT1 read failed:%d\n", ret);
aa792935 1534 goto io_err;
b0a9c37b 1535 }
72b16d4a 1536 _buf = ret;
b0a9c37b
VK
1537
1538 ret = sdw_nread(slave, SDW_SCP_INTSTAT2, 2, _buf2);
1539 if (ret < 0) {
1540 dev_err(slave->bus->dev,
17ed5bef 1541 "SDW_SCP_INT2/3 read failed:%d\n", ret);
aa792935 1542 goto io_err;
b0a9c37b
VK
1543 }
1544
1545 /* Make sure no interrupts are pending */
1546 buf &= _buf;
1547 buf2[0] &= _buf2[0];
1548 buf2[1] &= _buf2[1];
1549 stat = buf || buf2[0] || buf2[1];
1550
1551 /*
1552 * Exit loop if Slave is continuously in ALERT state even
1553 * after servicing the interrupt multiple times.
1554 */
1555 count++;
1556
1557 /* we can get alerts while processing so keep retrying */
1558 } while (stat != 0 && count < SDW_READ_INTR_CLEAR_RETRY);
1559
1560 if (count == SDW_READ_INTR_CLEAR_RETRY)
17ed5bef 1561 dev_warn(slave->bus->dev, "Reached MAX_RETRY on alert read\n");
b0a9c37b 1562
aa792935
RW
1563io_err:
1564 pm_runtime_mark_last_busy(&slave->dev);
1565 pm_runtime_put_autosuspend(&slave->dev);
1566
b0a9c37b
VK
1567 return ret;
1568}
1569
1570static int sdw_update_slave_status(struct sdw_slave *slave,
73ede046 1571 enum sdw_slave_status status)
b0a9c37b 1572{
2140b66b 1573 unsigned long time;
b0a9c37b 1574
2140b66b
PLB
1575 if (!slave->probed) {
1576 /*
1577 * the slave status update is typically handled in an
1578 * interrupt thread, which can race with the driver
1579 * probe, e.g. when a module needs to be loaded.
1580 *
1581 * make sure the probe is complete before updating
1582 * status.
1583 */
1584 time = wait_for_completion_timeout(&slave->probe_complete,
1585 msecs_to_jiffies(DEFAULT_PROBE_TIMEOUT));
1586 if (!time) {
1587 dev_err(&slave->dev, "Probe not complete, timed out\n");
1588 return -ETIMEDOUT;
1589 }
1590 }
1591
1592 if (!slave->ops || !slave->ops->update_status)
1593 return 0;
1594
1595 return slave->ops->update_status(slave, status);
b0a9c37b
VK
1596}
1597
1598/**
1599 * sdw_handle_slave_status() - Handle Slave status
1600 * @bus: SDW bus instance
1601 * @status: Status for all Slave(s)
1602 */
1603int sdw_handle_slave_status(struct sdw_bus *bus,
73ede046 1604 enum sdw_slave_status status[])
b0a9c37b
VK
1605{
1606 enum sdw_slave_status prev_status;
1607 struct sdw_slave *slave;
a90def06 1608 bool attached_initializing;
b0a9c37b
VK
1609 int i, ret = 0;
1610
61061901
PLB
1611 /* first check if any Slaves fell off the bus */
1612 for (i = 1; i <= SDW_MAX_DEVICES; i++) {
1613 mutex_lock(&bus->bus_lock);
1614 if (test_bit(i, bus->assigned) == false) {
1615 mutex_unlock(&bus->bus_lock);
1616 continue;
1617 }
1618 mutex_unlock(&bus->bus_lock);
1619
1620 slave = sdw_get_slave(bus, i);
1621 if (!slave)
1622 continue;
1623
1624 if (status[i] == SDW_SLAVE_UNATTACHED &&
1625 slave->status != SDW_SLAVE_UNATTACHED)
1626 sdw_modify_slave_status(slave, SDW_SLAVE_UNATTACHED);
1627 }
1628
b0a9c37b 1629 if (status[0] == SDW_SLAVE_ATTACHED) {
6e0ac6a6 1630 dev_dbg(bus->dev, "Slave attached, programming device number\n");
b0a9c37b
VK
1631 ret = sdw_program_device_num(bus);
1632 if (ret)
17ed5bef 1633 dev_err(bus->dev, "Slave attach failed: %d\n", ret);
15ed3ea2
PLB
1634 /*
1635 * programming a device number will have side effects,
1636 * so we deal with other devices at a later time
1637 */
1638 return ret;
b0a9c37b
VK
1639 }
1640
1641 /* Continue to check other slave statuses */
1642 for (i = 1; i <= SDW_MAX_DEVICES; i++) {
1643 mutex_lock(&bus->bus_lock);
1644 if (test_bit(i, bus->assigned) == false) {
1645 mutex_unlock(&bus->bus_lock);
1646 continue;
1647 }
1648 mutex_unlock(&bus->bus_lock);
1649
1650 slave = sdw_get_slave(bus, i);
1651 if (!slave)
1652 continue;
1653
a90def06
PLB
1654 attached_initializing = false;
1655
b0a9c37b
VK
1656 switch (status[i]) {
1657 case SDW_SLAVE_UNATTACHED:
1658 if (slave->status == SDW_SLAVE_UNATTACHED)
1659 break;
1660
1661 sdw_modify_slave_status(slave, SDW_SLAVE_UNATTACHED);
1662 break;
1663
1664 case SDW_SLAVE_ALERT:
1665 ret = sdw_handle_slave_alerts(slave);
1666 if (ret)
1667 dev_err(bus->dev,
17ed5bef 1668 "Slave %d alert handling failed: %d\n",
b0a9c37b
VK
1669 i, ret);
1670 break;
1671
1672 case SDW_SLAVE_ATTACHED:
1673 if (slave->status == SDW_SLAVE_ATTACHED)
1674 break;
1675
1676 prev_status = slave->status;
1677 sdw_modify_slave_status(slave, SDW_SLAVE_ATTACHED);
1678
1679 if (prev_status == SDW_SLAVE_ALERT)
1680 break;
1681
a90def06
PLB
1682 attached_initializing = true;
1683
b0a9c37b
VK
1684 ret = sdw_initialize_slave(slave);
1685 if (ret)
1686 dev_err(bus->dev,
17ed5bef 1687 "Slave %d initialization failed: %d\n",
b0a9c37b
VK
1688 i, ret);
1689
1690 break;
1691
1692 default:
17ed5bef 1693 dev_err(bus->dev, "Invalid slave %d status:%d\n",
73ede046 1694 i, status[i]);
b0a9c37b
VK
1695 break;
1696 }
1697
1698 ret = sdw_update_slave_status(slave, status[i]);
1699 if (ret)
1700 dev_err(slave->bus->dev,
17ed5bef 1701 "Update Slave status failed:%d\n", ret);
a90def06
PLB
1702 if (attached_initializing)
1703 complete(&slave->initialization_complete);
b0a9c37b
VK
1704 }
1705
1706 return ret;
1707}
1708EXPORT_SYMBOL(sdw_handle_slave_status);
3ab2ca40
PLB
1709
1710void sdw_clear_slave_status(struct sdw_bus *bus, u32 request)
1711{
1712 struct sdw_slave *slave;
1713 int i;
1714
1715 /* Check all non-zero devices */
1716 for (i = 1; i <= SDW_MAX_DEVICES; i++) {
1717 mutex_lock(&bus->bus_lock);
1718 if (test_bit(i, bus->assigned) == false) {
1719 mutex_unlock(&bus->bus_lock);
1720 continue;
1721 }
1722 mutex_unlock(&bus->bus_lock);
1723
1724 slave = sdw_get_slave(bus, i);
1725 if (!slave)
1726 continue;
1727
c2819e19 1728 if (slave->status != SDW_SLAVE_UNATTACHED) {
3ab2ca40 1729 sdw_modify_slave_status(slave, SDW_SLAVE_UNATTACHED);
c2819e19
PLB
1730 slave->first_interrupt_done = false;
1731 }
3ab2ca40
PLB
1732
1733 /* keep track of request, used in pm_runtime resume */
1734 slave->unattach_request = request;
1735 }
1736}
1737EXPORT_SYMBOL(sdw_clear_slave_status);