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soundwire: cadence: add status in dev_dbg 'State change' log
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1// SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause)
2// Copyright(c) 2015-17 Intel Corporation.
3
4#include <linux/acpi.h>
0231453b 5#include <linux/delay.h>
7c3cd189 6#include <linux/mod_devicetable.h>
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7#include <linux/pm_runtime.h>
8#include <linux/soundwire/sdw_registers.h>
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9#include <linux/soundwire/sdw.h>
10#include "bus.h"
bcac5902 11#include "sysfs_local.h"
7c3cd189 12
dbb50c7a
BL
13static DEFINE_IDA(sdw_ida);
14
15static int sdw_get_id(struct sdw_bus *bus)
16{
17 int rc = ida_alloc(&sdw_ida, GFP_KERNEL);
18
19 if (rc < 0)
20 return rc;
21
22 bus->id = rc;
23 return 0;
24}
25
7c3cd189 26/**
5cab3ff2 27 * sdw_bus_master_add() - add a bus Master instance
7c3cd189 28 * @bus: bus instance
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29 * @parent: parent device
30 * @fwnode: firmware node handle
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31 *
32 * Initializes the bus instance, read properties and create child
33 * devices.
34 */
5cab3ff2
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35int sdw_bus_master_add(struct sdw_bus *bus, struct device *parent,
36 struct fwnode_handle *fwnode)
7c3cd189 37{
5c3eb9f7 38 struct sdw_master_prop *prop = NULL;
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39 int ret;
40
7ceaa40b
PLB
41 if (!parent) {
42 pr_err("SoundWire parent device is not set\n");
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43 return -ENODEV;
44 }
45
dbb50c7a
BL
46 ret = sdw_get_id(bus);
47 if (ret) {
7ceaa40b
PLB
48 dev_err(parent, "Failed to get bus id\n");
49 return ret;
50 }
51
52 ret = sdw_master_device_add(bus, parent, fwnode);
53 if (ret) {
54 dev_err(parent, "Failed to add master device at link %d\n",
55 bus->link_id);
dbb50c7a
BL
56 return ret;
57 }
58
9d715fa0 59 if (!bus->ops) {
17ed5bef 60 dev_err(bus->dev, "SoundWire Bus ops are not set\n");
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61 return -EINVAL;
62 }
63
9026118f
BL
64 if (!bus->compute_params) {
65 dev_err(bus->dev,
66 "Bandwidth allocation not configured, compute_params no set\n");
67 return -EINVAL;
68 }
69
9d715fa0 70 mutex_init(&bus->msg_lock);
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71 mutex_init(&bus->bus_lock);
72 INIT_LIST_HEAD(&bus->slaves);
89e59053 73 INIT_LIST_HEAD(&bus->m_rt_list);
7c3cd189 74
ce6e74d0
SN
75 /*
76 * Initialize multi_link flag
77 * TODO: populate this flag by reading property from FW node
78 */
79 bus->multi_link = false;
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80 if (bus->ops->read_prop) {
81 ret = bus->ops->read_prop(bus);
82 if (ret < 0) {
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83 dev_err(bus->dev,
84 "Bus read properties failed:%d\n", ret);
56d4fe31
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85 return ret;
86 }
87 }
88
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89 sdw_bus_debugfs_init(bus);
90
7c3cd189 91 /*
21c2de29 92 * Device numbers in SoundWire are 0 through 15. Enumeration device
7c3cd189
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93 * number (0), Broadcast device number (15), Group numbers (12 and
94 * 13) and Master device number (14) are not used for assignment so
95 * mask these and other higher bits.
96 */
97
98 /* Set higher order bits */
99 *bus->assigned = ~GENMASK(SDW_BROADCAST_DEV_NUM, SDW_ENUM_DEV_NUM);
100
101 /* Set enumuration device number and broadcast device number */
102 set_bit(SDW_ENUM_DEV_NUM, bus->assigned);
103 set_bit(SDW_BROADCAST_DEV_NUM, bus->assigned);
104
105 /* Set group device numbers and master device number */
106 set_bit(SDW_GROUP12_DEV_NUM, bus->assigned);
107 set_bit(SDW_GROUP13_DEV_NUM, bus->assigned);
108 set_bit(SDW_MASTER_DEV_NUM, bus->assigned);
109
110 /*
111 * SDW is an enumerable bus, but devices can be powered off. So,
112 * they won't be able to report as present.
113 *
114 * Create Slave devices based on Slaves described in
115 * the respective firmware (ACPI/DT)
116 */
117 if (IS_ENABLED(CONFIG_ACPI) && ACPI_HANDLE(bus->dev))
118 ret = sdw_acpi_find_slaves(bus);
a2e48458
SK
119 else if (IS_ENABLED(CONFIG_OF) && bus->dev->of_node)
120 ret = sdw_of_find_slaves(bus);
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121 else
122 ret = -ENOTSUPP; /* No ACPI/DT so error out */
123
124 if (ret) {
125 dev_err(bus->dev, "Finding slaves failed:%d\n", ret);
126 return ret;
127 }
128
99b8a5d6 129 /*
5c3eb9f7 130 * Initialize clock values based on Master properties. The max
3424305b 131 * frequency is read from max_clk_freq property. Current assumption
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132 * is that the bus will start at highest clock frequency when
133 * powered on.
134 *
99b8a5d6
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135 * Default active bank will be 0 as out of reset the Slaves have
136 * to start with bank 0 (Table 40 of Spec)
137 */
5c3eb9f7 138 prop = &bus->prop;
3424305b 139 bus->params.max_dr_freq = prop->max_clk_freq * SDW_DOUBLE_RATE_FACTOR;
5c3eb9f7 140 bus->params.curr_dr_freq = bus->params.max_dr_freq;
99b8a5d6
SK
141 bus->params.curr_bank = SDW_BANK0;
142 bus->params.next_bank = SDW_BANK1;
143
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144 return 0;
145}
5cab3ff2 146EXPORT_SYMBOL(sdw_bus_master_add);
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147
148static int sdw_delete_slave(struct device *dev, void *data)
149{
150 struct sdw_slave *slave = dev_to_sdw_dev(dev);
151 struct sdw_bus *bus = slave->bus;
152
dff70572
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153 pm_runtime_disable(dev);
154
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155 sdw_slave_debugfs_exit(slave);
156
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157 mutex_lock(&bus->bus_lock);
158
159 if (slave->dev_num) /* clear dev_num if assigned */
160 clear_bit(slave->dev_num, bus->assigned);
161
162 list_del_init(&slave->node);
163 mutex_unlock(&bus->bus_lock);
164
165 device_unregister(dev);
166 return 0;
167}
168
169/**
5cab3ff2 170 * sdw_bus_master_delete() - delete the bus master instance
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171 * @bus: bus to be deleted
172 *
173 * Remove the instance, delete the child devices.
174 */
5cab3ff2 175void sdw_bus_master_delete(struct sdw_bus *bus)
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176{
177 device_for_each_child(bus->dev, NULL, sdw_delete_slave);
7ceaa40b 178 sdw_master_device_del(bus);
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179
180 sdw_bus_debugfs_exit(bus);
dbb50c7a 181 ida_free(&sdw_ida, bus->id);
7c3cd189 182}
5cab3ff2 183EXPORT_SYMBOL(sdw_bus_master_delete);
7c3cd189 184
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185/*
186 * SDW IO Calls
187 */
188
189static inline int find_response_code(enum sdw_command_response resp)
190{
191 switch (resp) {
192 case SDW_CMD_OK:
193 return 0;
194
195 case SDW_CMD_IGNORED:
196 return -ENODATA;
197
198 case SDW_CMD_TIMEOUT:
199 return -ETIMEDOUT;
200
201 default:
202 return -EIO;
203 }
204}
205
206static inline int do_transfer(struct sdw_bus *bus, struct sdw_msg *msg)
207{
208 int retry = bus->prop.err_threshold;
209 enum sdw_command_response resp;
210 int ret = 0, i;
211
212 for (i = 0; i <= retry; i++) {
213 resp = bus->ops->xfer_msg(bus, msg);
214 ret = find_response_code(resp);
215
216 /* if cmd is ok or ignored return */
217 if (ret == 0 || ret == -ENODATA)
218 return ret;
219 }
220
221 return ret;
222}
223
224static inline int do_transfer_defer(struct sdw_bus *bus,
73ede046
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225 struct sdw_msg *msg,
226 struct sdw_defer *defer)
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227{
228 int retry = bus->prop.err_threshold;
229 enum sdw_command_response resp;
230 int ret = 0, i;
231
232 defer->msg = msg;
233 defer->length = msg->len;
a306a0e4 234 init_completion(&defer->complete);
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235
236 for (i = 0; i <= retry; i++) {
237 resp = bus->ops->xfer_msg_defer(bus, msg, defer);
238 ret = find_response_code(resp);
239 /* if cmd is ok or ignored return */
240 if (ret == 0 || ret == -ENODATA)
241 return ret;
242 }
243
244 return ret;
245}
246
247static int sdw_reset_page(struct sdw_bus *bus, u16 dev_num)
248{
249 int retry = bus->prop.err_threshold;
250 enum sdw_command_response resp;
251 int ret = 0, i;
252
253 for (i = 0; i <= retry; i++) {
254 resp = bus->ops->reset_page_addr(bus, dev_num);
255 ret = find_response_code(resp);
256 /* if cmd is ok or ignored return */
257 if (ret == 0 || ret == -ENODATA)
258 return ret;
259 }
260
261 return ret;
262}
263
a350aff4
PLB
264static int sdw_transfer_unlocked(struct sdw_bus *bus, struct sdw_msg *msg)
265{
266 int ret;
267
268 ret = do_transfer(bus, msg);
269 if (ret != 0 && ret != -ENODATA)
270 dev_err(bus->dev, "trf on Slave %d failed:%d\n",
271 msg->dev_num, ret);
272
273 if (msg->page)
274 sdw_reset_page(bus, msg->dev_num);
275
276 return ret;
277}
278
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279/**
280 * sdw_transfer() - Synchronous transfer message to a SDW Slave device
281 * @bus: SDW bus
282 * @msg: SDW message to be xfered
283 */
284int sdw_transfer(struct sdw_bus *bus, struct sdw_msg *msg)
285{
286 int ret;
287
288 mutex_lock(&bus->msg_lock);
289
a350aff4 290 ret = sdw_transfer_unlocked(bus, msg);
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291
292 mutex_unlock(&bus->msg_lock);
293
294 return ret;
295}
296
297/**
298 * sdw_transfer_defer() - Asynchronously transfer message to a SDW Slave device
299 * @bus: SDW bus
300 * @msg: SDW message to be xfered
301 * @defer: Defer block for signal completion
302 *
303 * Caller needs to hold the msg_lock lock while calling this
304 */
305int sdw_transfer_defer(struct sdw_bus *bus, struct sdw_msg *msg,
73ede046 306 struct sdw_defer *defer)
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307{
308 int ret;
309
310 if (!bus->ops->xfer_msg_defer)
311 return -ENOTSUPP;
312
313 ret = do_transfer_defer(bus, msg, defer);
314 if (ret != 0 && ret != -ENODATA)
315 dev_err(bus->dev, "Defer trf on Slave %d failed:%d\n",
73ede046 316 msg->dev_num, ret);
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317
318 if (msg->page)
319 sdw_reset_page(bus, msg->dev_num);
320
321 return ret;
322}
323
9d715fa0 324int sdw_fill_msg(struct sdw_msg *msg, struct sdw_slave *slave,
73ede046 325 u32 addr, size_t count, u16 dev_num, u8 flags, u8 *buf)
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326{
327 memset(msg, 0, sizeof(*msg));
328 msg->addr = addr; /* addr is 16 bit and truncated here */
329 msg->len = count;
330 msg->dev_num = dev_num;
331 msg->flags = flags;
332 msg->buf = buf;
9d715fa0 333
f779ad09 334 if (addr < SDW_REG_NO_PAGE) /* no paging area */
9d715fa0 335 return 0;
f779ad09
GL
336
337 if (addr >= SDW_REG_MAX) { /* illegal addr */
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338 pr_err("SDW: Invalid address %x passed\n", addr);
339 return -EINVAL;
340 }
341
342 if (addr < SDW_REG_OPTIONAL_PAGE) { /* 32k but no page */
343 if (slave && !slave->prop.paging_support)
344 return 0;
21c2de29 345 /* no need for else as that will fall-through to paging */
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346 }
347
348 /* paging mandatory */
349 if (dev_num == SDW_ENUM_DEV_NUM || dev_num == SDW_BROADCAST_DEV_NUM) {
350 pr_err("SDW: Invalid device for paging :%d\n", dev_num);
351 return -EINVAL;
352 }
353
354 if (!slave) {
355 pr_err("SDW: No slave for paging addr\n");
356 return -EINVAL;
f779ad09
GL
357 }
358
359 if (!slave->prop.paging_support) {
9d715fa0 360 dev_err(&slave->dev,
17ed5bef 361 "address %x needs paging but no support\n", addr);
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362 return -EINVAL;
363 }
364
d5826a4b
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365 msg->addr_page1 = FIELD_GET(SDW_SCP_ADDRPAGE1_MASK, addr);
366 msg->addr_page2 = FIELD_GET(SDW_SCP_ADDRPAGE2_MASK, addr);
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367 msg->addr |= BIT(15);
368 msg->page = true;
369
370 return 0;
371}
372
60ee9be2
PLB
373/*
374 * Read/Write IO functions.
375 * no_pm versions can only be called by the bus, e.g. while enumerating or
376 * handling suspend-resume sequences.
377 * all clients need to use the pm versions
378 */
379
380static int
381sdw_nread_no_pm(struct sdw_slave *slave, u32 addr, size_t count, u8 *val)
382{
383 struct sdw_msg msg;
384 int ret;
385
386 ret = sdw_fill_msg(&msg, slave, addr, count,
387 slave->dev_num, SDW_MSG_FLAG_READ, val);
388 if (ret < 0)
389 return ret;
390
391 return sdw_transfer(slave->bus, &msg);
392}
393
394static int
395sdw_nwrite_no_pm(struct sdw_slave *slave, u32 addr, size_t count, u8 *val)
396{
397 struct sdw_msg msg;
398 int ret;
399
400 ret = sdw_fill_msg(&msg, slave, addr, count,
401 slave->dev_num, SDW_MSG_FLAG_WRITE, val);
402 if (ret < 0)
403 return ret;
404
405 return sdw_transfer(slave->bus, &msg);
406}
407
408static int sdw_write_no_pm(struct sdw_slave *slave, u32 addr, u8 value)
409{
410 return sdw_nwrite_no_pm(slave, addr, 1, &value);
411}
412
0231453b
RW
413static int
414sdw_bread_no_pm(struct sdw_bus *bus, u16 dev_num, u32 addr)
415{
416 struct sdw_msg msg;
417 u8 buf;
418 int ret;
419
420 ret = sdw_fill_msg(&msg, NULL, addr, 1, dev_num,
421 SDW_MSG_FLAG_READ, &buf);
422 if (ret)
423 return ret;
424
425 ret = sdw_transfer(bus, &msg);
426 if (ret < 0)
427 return ret;
f779ad09
GL
428
429 return buf;
0231453b
RW
430}
431
432static int
433sdw_bwrite_no_pm(struct sdw_bus *bus, u16 dev_num, u32 addr, u8 value)
434{
435 struct sdw_msg msg;
436 int ret;
437
438 ret = sdw_fill_msg(&msg, NULL, addr, 1, dev_num,
439 SDW_MSG_FLAG_WRITE, &value);
440 if (ret)
441 return ret;
442
443 return sdw_transfer(bus, &msg);
444}
445
a350aff4
PLB
446int sdw_bread_no_pm_unlocked(struct sdw_bus *bus, u16 dev_num, u32 addr)
447{
448 struct sdw_msg msg;
449 u8 buf;
450 int ret;
451
452 ret = sdw_fill_msg(&msg, NULL, addr, 1, dev_num,
453 SDW_MSG_FLAG_READ, &buf);
454 if (ret)
455 return ret;
456
457 ret = sdw_transfer_unlocked(bus, &msg);
458 if (ret < 0)
459 return ret;
460
461 return buf;
462}
463EXPORT_SYMBOL(sdw_bread_no_pm_unlocked);
464
465int sdw_bwrite_no_pm_unlocked(struct sdw_bus *bus, u16 dev_num, u32 addr, u8 value)
466{
467 struct sdw_msg msg;
468 int ret;
469
470 ret = sdw_fill_msg(&msg, NULL, addr, 1, dev_num,
471 SDW_MSG_FLAG_WRITE, &value);
472 if (ret)
473 return ret;
474
475 return sdw_transfer_unlocked(bus, &msg);
476}
477EXPORT_SYMBOL(sdw_bwrite_no_pm_unlocked);
478
0231453b
RW
479static int
480sdw_read_no_pm(struct sdw_slave *slave, u32 addr)
481{
482 u8 buf;
483 int ret;
484
485 ret = sdw_nread_no_pm(slave, addr, 1, &buf);
486 if (ret < 0)
487 return ret;
488 else
489 return buf;
490}
491
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492/**
493 * sdw_nread() - Read "n" contiguous SDW Slave registers
494 * @slave: SDW Slave
495 * @addr: Register address
496 * @count: length
497 * @val: Buffer for values to be read
498 */
499int sdw_nread(struct sdw_slave *slave, u32 addr, size_t count, u8 *val)
500{
9d715fa0
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501 int ret;
502
9d715fa0 503 ret = pm_runtime_get_sync(slave->bus->dev);
60ee9be2
PLB
504 if (ret < 0 && ret != -EACCES) {
505 pm_runtime_put_noidle(slave->bus->dev);
9d715fa0 506 return ret;
60ee9be2
PLB
507 }
508
509 ret = sdw_nread_no_pm(slave, addr, count, val);
9d715fa0 510
60ee9be2 511 pm_runtime_mark_last_busy(slave->bus->dev);
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VK
512 pm_runtime_put(slave->bus->dev);
513
514 return ret;
515}
516EXPORT_SYMBOL(sdw_nread);
517
518/**
519 * sdw_nwrite() - Write "n" contiguous SDW Slave registers
520 * @slave: SDW Slave
521 * @addr: Register address
522 * @count: length
523 * @val: Buffer for values to be read
524 */
525int sdw_nwrite(struct sdw_slave *slave, u32 addr, size_t count, u8 *val)
526{
9d715fa0
VK
527 int ret;
528
9d715fa0 529 ret = pm_runtime_get_sync(slave->bus->dev);
60ee9be2
PLB
530 if (ret < 0 && ret != -EACCES) {
531 pm_runtime_put_noidle(slave->bus->dev);
9d715fa0 532 return ret;
60ee9be2
PLB
533 }
534
535 ret = sdw_nwrite_no_pm(slave, addr, count, val);
9d715fa0 536
60ee9be2 537 pm_runtime_mark_last_busy(slave->bus->dev);
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538 pm_runtime_put(slave->bus->dev);
539
540 return ret;
541}
542EXPORT_SYMBOL(sdw_nwrite);
543
544/**
545 * sdw_read() - Read a SDW Slave register
546 * @slave: SDW Slave
547 * @addr: Register address
548 */
549int sdw_read(struct sdw_slave *slave, u32 addr)
550{
551 u8 buf;
552 int ret;
553
554 ret = sdw_nread(slave, addr, 1, &buf);
555 if (ret < 0)
556 return ret;
f779ad09
GL
557
558 return buf;
9d715fa0
VK
559}
560EXPORT_SYMBOL(sdw_read);
561
562/**
563 * sdw_write() - Write a SDW Slave register
564 * @slave: SDW Slave
565 * @addr: Register address
566 * @value: Register value
567 */
568int sdw_write(struct sdw_slave *slave, u32 addr, u8 value)
569{
570 return sdw_nwrite(slave, addr, 1, &value);
9d715fa0
VK
571}
572EXPORT_SYMBOL(sdw_write);
573
d52d7a1b
SK
574/*
575 * SDW alert handling
576 */
577
578/* called with bus_lock held */
579static struct sdw_slave *sdw_get_slave(struct sdw_bus *bus, int i)
580{
581 struct sdw_slave *slave = NULL;
582
583 list_for_each_entry(slave, &bus->slaves, node) {
584 if (slave->dev_num == i)
585 return slave;
586 }
587
588 return NULL;
589}
590
591static int sdw_compare_devid(struct sdw_slave *slave, struct sdw_slave_id id)
592{
2e8c4ad1 593 if (slave->id.mfg_id != id.mfg_id ||
09830d5e 594 slave->id.part_id != id.part_id ||
2e8c4ad1
PLB
595 slave->id.class_id != id.class_id ||
596 (slave->id.unique_id != SDW_IGNORED_UNIQUE_ID &&
597 slave->id.unique_id != id.unique_id))
d52d7a1b
SK
598 return -ENODEV;
599
600 return 0;
601}
602
603/* called with bus_lock held */
604static int sdw_get_device_num(struct sdw_slave *slave)
605{
606 int bit;
607
608 bit = find_first_zero_bit(slave->bus->assigned, SDW_MAX_DEVICES);
609 if (bit == SDW_MAX_DEVICES) {
610 bit = -ENODEV;
611 goto err;
612 }
613
614 /*
615 * Do not update dev_num in Slave data structure here,
616 * Update once program dev_num is successful
617 */
618 set_bit(bit, slave->bus->assigned);
619
620err:
621 return bit;
622}
623
624static int sdw_assign_device_num(struct sdw_slave *slave)
625{
626 int ret, dev_num;
fd6a3ac8 627 bool new_device = false;
d52d7a1b
SK
628
629 /* check first if device number is assigned, if so reuse that */
630 if (!slave->dev_num) {
fd6a3ac8
PLB
631 if (!slave->dev_num_sticky) {
632 mutex_lock(&slave->bus->bus_lock);
633 dev_num = sdw_get_device_num(slave);
634 mutex_unlock(&slave->bus->bus_lock);
635 if (dev_num < 0) {
636 dev_err(slave->bus->dev, "Get dev_num failed: %d\n",
637 dev_num);
638 return dev_num;
639 }
640 slave->dev_num = dev_num;
641 slave->dev_num_sticky = dev_num;
642 new_device = true;
643 } else {
644 slave->dev_num = slave->dev_num_sticky;
d52d7a1b 645 }
fd6a3ac8
PLB
646 }
647
648 if (!new_device)
f48f4fd9
PLB
649 dev_dbg(slave->bus->dev,
650 "Slave already registered, reusing dev_num:%d\n",
651 slave->dev_num);
d52d7a1b 652
fd6a3ac8
PLB
653 /* Clear the slave->dev_num to transfer message on device 0 */
654 dev_num = slave->dev_num;
655 slave->dev_num = 0;
d52d7a1b 656
d300de4f 657 ret = sdw_write_no_pm(slave, SDW_SCP_DEVNUMBER, dev_num);
d52d7a1b 658 if (ret < 0) {
6e0ac6a6
PLB
659 dev_err(&slave->dev, "Program device_num %d failed: %d\n",
660 dev_num, ret);
d52d7a1b
SK
661 return ret;
662 }
663
664 /* After xfer of msg, restore dev_num */
fd6a3ac8 665 slave->dev_num = slave->dev_num_sticky;
d52d7a1b
SK
666
667 return 0;
668}
669
7c3cd189 670void sdw_extract_slave_id(struct sdw_bus *bus,
73ede046 671 u64 addr, struct sdw_slave_id *id)
7c3cd189 672{
17ed5bef 673 dev_dbg(bus->dev, "SDW Slave Addr: %llx\n", addr);
7c3cd189 674
2c6cff68
PLB
675 id->sdw_version = SDW_VERSION(addr);
676 id->unique_id = SDW_UNIQUE_ID(addr);
677 id->mfg_id = SDW_MFG_ID(addr);
678 id->part_id = SDW_PART_ID(addr);
679 id->class_id = SDW_CLASS_ID(addr);
7c3cd189
VK
680
681 dev_dbg(bus->dev,
c397efb7
PLB
682 "SDW Slave class_id 0x%02x, mfg_id 0x%04x, part_id 0x%04x, unique_id 0x%x, version 0x%x\n",
683 id->class_id, id->mfg_id, id->part_id, id->unique_id, id->sdw_version);
7c3cd189 684}
d52d7a1b
SK
685
686static int sdw_program_device_num(struct sdw_bus *bus)
687{
688 u8 buf[SDW_NUM_DEV_ID_REGISTERS] = {0};
689 struct sdw_slave *slave, *_s;
690 struct sdw_slave_id id;
691 struct sdw_msg msg;
692 bool found = false;
693 int count = 0, ret;
694 u64 addr;
695
696 /* No Slave, so use raw xfer api */
697 ret = sdw_fill_msg(&msg, NULL, SDW_SCP_DEVID_0,
73ede046 698 SDW_NUM_DEV_ID_REGISTERS, 0, SDW_MSG_FLAG_READ, buf);
d52d7a1b
SK
699 if (ret < 0)
700 return ret;
701
702 do {
703 ret = sdw_transfer(bus, &msg);
704 if (ret == -ENODATA) { /* end of device id reads */
6e0ac6a6 705 dev_dbg(bus->dev, "No more devices to enumerate\n");
d52d7a1b
SK
706 ret = 0;
707 break;
708 }
709 if (ret < 0) {
710 dev_err(bus->dev, "DEVID read fail:%d\n", ret);
711 break;
712 }
713
714 /*
715 * Construct the addr and extract. Cast the higher shift
716 * bits to avoid truncation due to size limit.
717 */
718 addr = buf[5] | (buf[4] << 8) | (buf[3] << 16) |
0132af05
CIK
719 ((u64)buf[2] << 24) | ((u64)buf[1] << 32) |
720 ((u64)buf[0] << 40);
d52d7a1b
SK
721
722 sdw_extract_slave_id(bus, addr, &id);
723
724 /* Now compare with entries */
725 list_for_each_entry_safe(slave, _s, &bus->slaves, node) {
726 if (sdw_compare_devid(slave, id) == 0) {
727 found = true;
728
729 /*
730 * Assign a new dev_num to this Slave and
731 * not mark it present. It will be marked
732 * present after it reports ATTACHED on new
733 * dev_num
734 */
735 ret = sdw_assign_device_num(slave);
736 if (ret) {
737 dev_err(slave->bus->dev,
17ed5bef 738 "Assign dev_num failed:%d\n",
d52d7a1b
SK
739 ret);
740 return ret;
741 }
742
743 break;
744 }
745 }
746
d7b956b6 747 if (!found) {
d52d7a1b 748 /* TODO: Park this device in Group 13 */
fcb9d730
SK
749
750 /*
751 * add Slave device even if there is no platform
752 * firmware description. There will be no driver probe
753 * but the user/integration will be able to see the
754 * device, enumeration status and device number in sysfs
755 */
756 sdw_slave_add(bus, &id, NULL);
757
17ed5bef 758 dev_err(bus->dev, "Slave Entry not found\n");
d52d7a1b
SK
759 }
760
761 count++;
762
763 /*
764 * Check till error out or retry (count) exhausts.
765 * Device can drop off and rejoin during enumeration
766 * so count till twice the bound.
767 */
768
769 } while (ret == 0 && count < (SDW_MAX_DEVICES * 2));
770
771 return ret;
772}
773
774static void sdw_modify_slave_status(struct sdw_slave *slave,
73ede046 775 enum sdw_slave_status status)
d52d7a1b
SK
776{
777 mutex_lock(&slave->bus->bus_lock);
fb9469e5
PLB
778
779 dev_vdbg(&slave->dev,
780 "%s: changing status slave %d status %d new status %d\n",
781 __func__, slave->dev_num, slave->status, status);
782
783 if (status == SDW_SLAVE_UNATTACHED) {
784 dev_dbg(&slave->dev,
785 "%s: initializing completion for Slave %d\n",
786 __func__, slave->dev_num);
787
788 init_completion(&slave->enumeration_complete);
a90def06 789 init_completion(&slave->initialization_complete);
fb9469e5
PLB
790
791 } else if ((status == SDW_SLAVE_ATTACHED) &&
792 (slave->status == SDW_SLAVE_UNATTACHED)) {
793 dev_dbg(&slave->dev,
794 "%s: signaling completion for Slave %d\n",
795 __func__, slave->dev_num);
796
797 complete(&slave->enumeration_complete);
798 }
d52d7a1b
SK
799 slave->status = status;
800 mutex_unlock(&slave->bus->bus_lock);
801}
802
0231453b
RW
803static enum sdw_clk_stop_mode sdw_get_clk_stop_mode(struct sdw_slave *slave)
804{
805 enum sdw_clk_stop_mode mode;
806
807 /*
808 * Query for clock stop mode if Slave implements
809 * ops->get_clk_stop_mode, else read from property.
810 */
811 if (slave->ops && slave->ops->get_clk_stop_mode) {
812 mode = slave->ops->get_clk_stop_mode(slave);
813 } else {
814 if (slave->prop.clk_stop_mode1)
815 mode = SDW_CLK_STOP_MODE1;
816 else
817 mode = SDW_CLK_STOP_MODE0;
818 }
819
820 return mode;
821}
822
823static int sdw_slave_clk_stop_callback(struct sdw_slave *slave,
824 enum sdw_clk_stop_mode mode,
825 enum sdw_clk_stop_type type)
826{
827 int ret;
828
829 if (slave->ops && slave->ops->clk_stop) {
830 ret = slave->ops->clk_stop(slave, mode, type);
831 if (ret < 0) {
832 dev_err(&slave->dev,
833 "Clk Stop type =%d failed: %d\n", type, ret);
834 return ret;
835 }
836 }
837
838 return 0;
839}
840
841static int sdw_slave_clk_stop_prepare(struct sdw_slave *slave,
842 enum sdw_clk_stop_mode mode,
843 bool prepare)
844{
845 bool wake_en;
846 u32 val = 0;
847 int ret;
848
849 wake_en = slave->prop.wake_capable;
850
851 if (prepare) {
852 val = SDW_SCP_SYSTEMCTRL_CLK_STP_PREP;
853
854 if (mode == SDW_CLK_STOP_MODE1)
855 val |= SDW_SCP_SYSTEMCTRL_CLK_STP_MODE1;
856
857 if (wake_en)
858 val |= SDW_SCP_SYSTEMCTRL_WAKE_UP_EN;
859 } else {
860 val = sdw_read_no_pm(slave, SDW_SCP_SYSTEMCTRL);
861
862 val &= ~(SDW_SCP_SYSTEMCTRL_CLK_STP_PREP);
863 }
864
865 ret = sdw_write_no_pm(slave, SDW_SCP_SYSTEMCTRL, val);
866
867 if (ret != 0)
868 dev_err(&slave->dev,
869 "Clock Stop prepare failed for slave: %d", ret);
870
871 return ret;
872}
873
874static int sdw_bus_wait_for_clk_prep_deprep(struct sdw_bus *bus, u16 dev_num)
875{
876 int retry = bus->clk_stop_timeout;
877 int val;
878
879 do {
880 val = sdw_bread_no_pm(bus, dev_num, SDW_SCP_STAT) &
881 SDW_SCP_STAT_CLK_STP_NF;
882 if (!val) {
883 dev_info(bus->dev, "clock stop prep/de-prep done slave:%d",
884 dev_num);
885 return 0;
886 }
887
888 usleep_range(1000, 1500);
889 retry--;
890 } while (retry);
891
892 dev_err(bus->dev, "clock stop prep/de-prep failed slave:%d",
893 dev_num);
894
895 return -ETIMEDOUT;
896}
897
898/**
899 * sdw_bus_prep_clk_stop: prepare Slave(s) for clock stop
900 *
901 * @bus: SDW bus instance
902 *
903 * Query Slave for clock stop mode and prepare for that mode.
904 */
905int sdw_bus_prep_clk_stop(struct sdw_bus *bus)
906{
907 enum sdw_clk_stop_mode slave_mode;
908 bool simple_clk_stop = true;
909 struct sdw_slave *slave;
910 bool is_slave = false;
911 int ret = 0;
912
913 /*
914 * In order to save on transition time, prepare
915 * each Slave and then wait for all Slave(s) to be
916 * prepared for clock stop.
917 */
918 list_for_each_entry(slave, &bus->slaves, node) {
919 if (!slave->dev_num)
920 continue;
921
0231453b
RW
922 if (slave->status != SDW_SLAVE_ATTACHED &&
923 slave->status != SDW_SLAVE_ALERT)
924 continue;
925
929cfee3
BL
926 /* Identify if Slave(s) are available on Bus */
927 is_slave = true;
928
0231453b
RW
929 slave_mode = sdw_get_clk_stop_mode(slave);
930 slave->curr_clk_stop_mode = slave_mode;
931
932 ret = sdw_slave_clk_stop_callback(slave, slave_mode,
933 SDW_CLK_PRE_PREPARE);
934 if (ret < 0) {
935 dev_err(&slave->dev,
936 "pre-prepare failed:%d", ret);
937 return ret;
938 }
939
940 ret = sdw_slave_clk_stop_prepare(slave,
941 slave_mode, true);
942 if (ret < 0) {
943 dev_err(&slave->dev,
944 "pre-prepare failed:%d", ret);
945 return ret;
946 }
947
948 if (slave_mode == SDW_CLK_STOP_MODE1)
949 simple_clk_stop = false;
950 }
951
952 if (is_slave && !simple_clk_stop) {
953 ret = sdw_bus_wait_for_clk_prep_deprep(bus,
954 SDW_BROADCAST_DEV_NUM);
955 if (ret < 0)
956 return ret;
957 }
958
929cfee3
BL
959 /* Don't need to inform slaves if there is no slave attached */
960 if (!is_slave)
961 return ret;
962
0231453b
RW
963 /* Inform slaves that prep is done */
964 list_for_each_entry(slave, &bus->slaves, node) {
965 if (!slave->dev_num)
966 continue;
967
968 if (slave->status != SDW_SLAVE_ATTACHED &&
969 slave->status != SDW_SLAVE_ALERT)
970 continue;
971
972 slave_mode = slave->curr_clk_stop_mode;
973
974 if (slave_mode == SDW_CLK_STOP_MODE1) {
975 ret = sdw_slave_clk_stop_callback(slave,
976 slave_mode,
977 SDW_CLK_POST_PREPARE);
978
979 if (ret < 0) {
980 dev_err(&slave->dev,
981 "post-prepare failed:%d", ret);
982 }
983 }
984 }
985
986 return ret;
987}
988EXPORT_SYMBOL(sdw_bus_prep_clk_stop);
989
990/**
991 * sdw_bus_clk_stop: stop bus clock
992 *
993 * @bus: SDW bus instance
994 *
995 * After preparing the Slaves for clock stop, stop the clock by broadcasting
996 * write to SCP_CTRL register.
997 */
998int sdw_bus_clk_stop(struct sdw_bus *bus)
999{
1000 int ret;
1001
1002 /*
1003 * broadcast clock stop now, attached Slaves will ACK this,
1004 * unattached will ignore
1005 */
1006 ret = sdw_bwrite_no_pm(bus, SDW_BROADCAST_DEV_NUM,
1007 SDW_SCP_CTRL, SDW_SCP_CTRL_CLK_STP_NOW);
1008 if (ret < 0) {
dde73538
PLB
1009 if (ret == -ENODATA)
1010 dev_dbg(bus->dev,
1011 "ClockStopNow Broadcast msg ignored %d", ret);
1012 else
1013 dev_err(bus->dev,
1014 "ClockStopNow Broadcast msg failed %d", ret);
0231453b
RW
1015 return ret;
1016 }
1017
1018 return 0;
1019}
1020EXPORT_SYMBOL(sdw_bus_clk_stop);
1021
1022/**
1023 * sdw_bus_exit_clk_stop: Exit clock stop mode
1024 *
1025 * @bus: SDW bus instance
1026 *
1027 * This De-prepares the Slaves by exiting Clock Stop Mode 0. For the Slaves
1028 * exiting Clock Stop Mode 1, they will be de-prepared after they enumerate
1029 * back.
1030 */
1031int sdw_bus_exit_clk_stop(struct sdw_bus *bus)
1032{
1033 enum sdw_clk_stop_mode mode;
1034 bool simple_clk_stop = true;
1035 struct sdw_slave *slave;
1036 bool is_slave = false;
1037 int ret;
1038
1039 /*
1040 * In order to save on transition time, de-prepare
1041 * each Slave and then wait for all Slave(s) to be
1042 * de-prepared after clock resume.
1043 */
1044 list_for_each_entry(slave, &bus->slaves, node) {
1045 if (!slave->dev_num)
1046 continue;
1047
0231453b
RW
1048 if (slave->status != SDW_SLAVE_ATTACHED &&
1049 slave->status != SDW_SLAVE_ALERT)
1050 continue;
1051
929cfee3
BL
1052 /* Identify if Slave(s) are available on Bus */
1053 is_slave = true;
1054
0231453b
RW
1055 mode = slave->curr_clk_stop_mode;
1056
1057 if (mode == SDW_CLK_STOP_MODE1) {
1058 simple_clk_stop = false;
1059 continue;
1060 }
1061
1062 ret = sdw_slave_clk_stop_callback(slave, mode,
1063 SDW_CLK_PRE_DEPREPARE);
1064 if (ret < 0)
1065 dev_warn(&slave->dev,
1066 "clk stop deprep failed:%d", ret);
1067
1068 ret = sdw_slave_clk_stop_prepare(slave, mode,
1069 false);
1070
1071 if (ret < 0)
1072 dev_warn(&slave->dev,
1073 "clk stop deprep failed:%d", ret);
1074 }
1075
1076 if (is_slave && !simple_clk_stop)
1077 sdw_bus_wait_for_clk_prep_deprep(bus, SDW_BROADCAST_DEV_NUM);
1078
929cfee3
BL
1079 /*
1080 * Don't need to call slave callback function if there is no slave
1081 * attached
1082 */
1083 if (!is_slave)
1084 return 0;
1085
0231453b
RW
1086 list_for_each_entry(slave, &bus->slaves, node) {
1087 if (!slave->dev_num)
1088 continue;
1089
1090 if (slave->status != SDW_SLAVE_ATTACHED &&
1091 slave->status != SDW_SLAVE_ALERT)
1092 continue;
1093
1094 mode = slave->curr_clk_stop_mode;
1095 sdw_slave_clk_stop_callback(slave, mode,
1096 SDW_CLK_POST_DEPREPARE);
1097 }
1098
1099 return 0;
1100}
1101EXPORT_SYMBOL(sdw_bus_exit_clk_stop);
1102
79df15b7 1103int sdw_configure_dpn_intr(struct sdw_slave *slave,
73ede046 1104 int port, bool enable, int mask)
79df15b7
SK
1105{
1106 u32 addr;
1107 int ret;
1108 u8 val = 0;
1109
dd87a72a
PLB
1110 if (slave->bus->params.s_data_mode != SDW_PORT_DATA_MODE_NORMAL) {
1111 dev_dbg(&slave->dev, "TEST FAIL interrupt %s\n",
1112 enable ? "on" : "off");
1113 mask |= SDW_DPN_INT_TEST_FAIL;
1114 }
1115
79df15b7
SK
1116 addr = SDW_DPN_INTMASK(port);
1117
1118 /* Set/Clear port ready interrupt mask */
1119 if (enable) {
1120 val |= mask;
1121 val |= SDW_DPN_INT_PORT_READY;
1122 } else {
1123 val &= ~(mask);
1124 val &= ~SDW_DPN_INT_PORT_READY;
1125 }
1126
1127 ret = sdw_update(slave, addr, (mask | SDW_DPN_INT_PORT_READY), val);
1128 if (ret < 0)
1129 dev_err(slave->bus->dev,
17ed5bef 1130 "SDW_DPN_INTMASK write failed:%d\n", val);
79df15b7
SK
1131
1132 return ret;
1133}
1134
29d158f9
PLB
1135static int sdw_slave_set_frequency(struct sdw_slave *slave)
1136{
1137 u32 mclk_freq = slave->bus->prop.mclk_freq;
1138 u32 curr_freq = slave->bus->params.curr_dr_freq >> 1;
1139 unsigned int scale;
1140 u8 scale_index;
1141 u8 base;
1142 int ret;
1143
1144 /*
1145 * frequency base and scale registers are required for SDCA
1146 * devices. They may also be used for 1.2+/non-SDCA devices,
1147 * but we will need a DisCo property to cover this case
1148 */
1149 if (!slave->id.class_id)
1150 return 0;
1151
1152 if (!mclk_freq) {
1153 dev_err(&slave->dev,
1154 "no bus MCLK, cannot set SDW_SCP_BUS_CLOCK_BASE\n");
1155 return -EINVAL;
1156 }
1157
1158 /*
1159 * map base frequency using Table 89 of SoundWire 1.2 spec.
1160 * The order of the tests just follows the specification, this
1161 * is not a selection between possible values or a search for
1162 * the best value but just a mapping. Only one case per platform
1163 * is relevant.
1164 * Some BIOS have inconsistent values for mclk_freq but a
1165 * correct root so we force the mclk_freq to avoid variations.
1166 */
1167 if (!(19200000 % mclk_freq)) {
1168 mclk_freq = 19200000;
1169 base = SDW_SCP_BASE_CLOCK_19200000_HZ;
1170 } else if (!(24000000 % mclk_freq)) {
1171 mclk_freq = 24000000;
1172 base = SDW_SCP_BASE_CLOCK_24000000_HZ;
1173 } else if (!(24576000 % mclk_freq)) {
1174 mclk_freq = 24576000;
1175 base = SDW_SCP_BASE_CLOCK_24576000_HZ;
1176 } else if (!(22579200 % mclk_freq)) {
1177 mclk_freq = 22579200;
1178 base = SDW_SCP_BASE_CLOCK_22579200_HZ;
1179 } else if (!(32000000 % mclk_freq)) {
1180 mclk_freq = 32000000;
1181 base = SDW_SCP_BASE_CLOCK_32000000_HZ;
1182 } else {
1183 dev_err(&slave->dev,
1184 "Unsupported clock base, mclk %d\n",
1185 mclk_freq);
1186 return -EINVAL;
1187 }
1188
1189 if (mclk_freq % curr_freq) {
1190 dev_err(&slave->dev,
1191 "mclk %d is not multiple of bus curr_freq %d\n",
1192 mclk_freq, curr_freq);
1193 return -EINVAL;
1194 }
1195
1196 scale = mclk_freq / curr_freq;
1197
1198 /*
1199 * map scale to Table 90 of SoundWire 1.2 spec - and check
1200 * that the scale is a power of two and maximum 64
1201 */
1202 scale_index = ilog2(scale);
1203
1204 if (BIT(scale_index) != scale || scale_index > 6) {
1205 dev_err(&slave->dev,
1206 "No match found for scale %d, bus mclk %d curr_freq %d\n",
1207 scale, mclk_freq, curr_freq);
1208 return -EINVAL;
1209 }
1210 scale_index++;
1211
1212 ret = sdw_write(slave, SDW_SCP_BUS_CLOCK_BASE, base);
1213 if (ret < 0) {
1214 dev_err(&slave->dev,
1215 "SDW_SCP_BUS_CLOCK_BASE write failed:%d\n", ret);
1216 return ret;
1217 }
1218
1219 /* initialize scale for both banks */
1220 ret = sdw_write(slave, SDW_SCP_BUSCLOCK_SCALE_B0, scale_index);
1221 if (ret < 0) {
1222 dev_err(&slave->dev,
1223 "SDW_SCP_BUSCLOCK_SCALE_B0 write failed:%d\n", ret);
1224 return ret;
1225 }
1226 ret = sdw_write(slave, SDW_SCP_BUSCLOCK_SCALE_B1, scale_index);
1227 if (ret < 0)
1228 dev_err(&slave->dev,
1229 "SDW_SCP_BUSCLOCK_SCALE_B1 write failed:%d\n", ret);
1230
1231 dev_dbg(&slave->dev,
1232 "Configured bus base %d, scale %d, mclk %d, curr_freq %d\n",
1233 base, scale_index, mclk_freq, curr_freq);
1234
1235 return ret;
1236}
1237
d52d7a1b
SK
1238static int sdw_initialize_slave(struct sdw_slave *slave)
1239{
1240 struct sdw_slave_prop *prop = &slave->prop;
1241 int ret;
1242 u8 val;
1243
29d158f9
PLB
1244 ret = sdw_slave_set_frequency(slave);
1245 if (ret < 0)
1246 return ret;
1247
d52d7a1b 1248 /*
2acd30b9
PLB
1249 * Set SCP_INT1_MASK register, typically bus clash and
1250 * implementation-defined interrupt mask. The Parity detection
1251 * may not always be correct on startup so its use is
1252 * device-dependent, it might e.g. only be enabled in
1253 * steady-state after a couple of frames.
d52d7a1b 1254 */
2acd30b9 1255 val = slave->prop.scp_int1_mask;
d52d7a1b
SK
1256
1257 /* Enable SCP interrupts */
1258 ret = sdw_update(slave, SDW_SCP_INTMASK1, val, val);
1259 if (ret < 0) {
1260 dev_err(slave->bus->dev,
17ed5bef 1261 "SDW_SCP_INTMASK1 write failed:%d\n", ret);
d52d7a1b
SK
1262 return ret;
1263 }
1264
1265 /* No need to continue if DP0 is not present */
1266 if (!slave->prop.dp0_prop)
1267 return 0;
1268
1269 /* Enable DP0 interrupts */
8acbbfec 1270 val = prop->dp0_prop->imp_def_interrupts;
d52d7a1b
SK
1271 val |= SDW_DP0_INT_PORT_READY | SDW_DP0_INT_BRA_FAILURE;
1272
1273 ret = sdw_update(slave, SDW_DP0_INTMASK, val, val);
5de79ba8 1274 if (ret < 0)
d52d7a1b 1275 dev_err(slave->bus->dev,
17ed5bef 1276 "SDW_DP0_INTMASK read failed:%d\n", ret);
5de79ba8 1277 return ret;
d52d7a1b 1278}
b0a9c37b
VK
1279
1280static int sdw_handle_dp0_interrupt(struct sdw_slave *slave, u8 *slave_status)
1281{
b35991de 1282 u8 clear, impl_int_mask;
b0a9c37b
VK
1283 int status, status2, ret, count = 0;
1284
1285 status = sdw_read(slave, SDW_DP0_INT);
1286 if (status < 0) {
1287 dev_err(slave->bus->dev,
17ed5bef 1288 "SDW_DP0_INT read failed:%d\n", status);
b0a9c37b
VK
1289 return status;
1290 }
1291
1292 do {
b35991de
PLB
1293 clear = status & ~SDW_DP0_INTERRUPTS;
1294
b0a9c37b 1295 if (status & SDW_DP0_INT_TEST_FAIL) {
17ed5bef 1296 dev_err(&slave->dev, "Test fail for port 0\n");
b0a9c37b
VK
1297 clear |= SDW_DP0_INT_TEST_FAIL;
1298 }
1299
1300 /*
1301 * Assumption: PORT_READY interrupt will be received only for
1302 * ports implementing Channel Prepare state machine (CP_SM)
1303 */
1304
1305 if (status & SDW_DP0_INT_PORT_READY) {
1306 complete(&slave->port_ready[0]);
1307 clear |= SDW_DP0_INT_PORT_READY;
1308 }
1309
1310 if (status & SDW_DP0_INT_BRA_FAILURE) {
17ed5bef 1311 dev_err(&slave->dev, "BRA failed\n");
b0a9c37b
VK
1312 clear |= SDW_DP0_INT_BRA_FAILURE;
1313 }
1314
1315 impl_int_mask = SDW_DP0_INT_IMPDEF1 |
1316 SDW_DP0_INT_IMPDEF2 | SDW_DP0_INT_IMPDEF3;
1317
1318 if (status & impl_int_mask) {
1319 clear |= impl_int_mask;
1320 *slave_status = clear;
1321 }
1322
b35991de 1323 /* clear the interrupts but don't touch reserved and SDCA_CASCADE fields */
b0a9c37b
VK
1324 ret = sdw_write(slave, SDW_DP0_INT, clear);
1325 if (ret < 0) {
1326 dev_err(slave->bus->dev,
17ed5bef 1327 "SDW_DP0_INT write failed:%d\n", ret);
b0a9c37b
VK
1328 return ret;
1329 }
1330
1331 /* Read DP0 interrupt again */
1332 status2 = sdw_read(slave, SDW_DP0_INT);
1333 if (status2 < 0) {
1334 dev_err(slave->bus->dev,
17ed5bef 1335 "SDW_DP0_INT read failed:%d\n", status2);
80cd8f01 1336 return status2;
b0a9c37b 1337 }
6e06a855 1338 /* filter to limit loop to interrupts identified in the first status read */
b0a9c37b
VK
1339 status &= status2;
1340
1341 count++;
1342
1343 /* we can get alerts while processing so keep retrying */
b35991de 1344 } while ((status & SDW_DP0_INTERRUPTS) && (count < SDW_READ_INTR_CLEAR_RETRY));
b0a9c37b
VK
1345
1346 if (count == SDW_READ_INTR_CLEAR_RETRY)
17ed5bef 1347 dev_warn(slave->bus->dev, "Reached MAX_RETRY on DP0 read\n");
b0a9c37b
VK
1348
1349 return ret;
1350}
1351
1352static int sdw_handle_port_interrupt(struct sdw_slave *slave,
73ede046 1353 int port, u8 *slave_status)
b0a9c37b 1354{
47b85209 1355 u8 clear, impl_int_mask;
b0a9c37b
VK
1356 int status, status2, ret, count = 0;
1357 u32 addr;
1358
1359 if (port == 0)
1360 return sdw_handle_dp0_interrupt(slave, slave_status);
1361
1362 addr = SDW_DPN_INT(port);
1363 status = sdw_read(slave, addr);
1364 if (status < 0) {
1365 dev_err(slave->bus->dev,
17ed5bef 1366 "SDW_DPN_INT read failed:%d\n", status);
b0a9c37b
VK
1367
1368 return status;
1369 }
1370
1371 do {
47b85209
PLB
1372 clear = status & ~SDW_DPN_INTERRUPTS;
1373
b0a9c37b 1374 if (status & SDW_DPN_INT_TEST_FAIL) {
17ed5bef 1375 dev_err(&slave->dev, "Test fail for port:%d\n", port);
b0a9c37b
VK
1376 clear |= SDW_DPN_INT_TEST_FAIL;
1377 }
1378
1379 /*
1380 * Assumption: PORT_READY interrupt will be received only
1381 * for ports implementing CP_SM.
1382 */
1383 if (status & SDW_DPN_INT_PORT_READY) {
1384 complete(&slave->port_ready[port]);
1385 clear |= SDW_DPN_INT_PORT_READY;
1386 }
1387
1388 impl_int_mask = SDW_DPN_INT_IMPDEF1 |
1389 SDW_DPN_INT_IMPDEF2 | SDW_DPN_INT_IMPDEF3;
1390
b0a9c37b
VK
1391 if (status & impl_int_mask) {
1392 clear |= impl_int_mask;
1393 *slave_status = clear;
1394 }
1395
47b85209 1396 /* clear the interrupt but don't touch reserved fields */
b0a9c37b
VK
1397 ret = sdw_write(slave, addr, clear);
1398 if (ret < 0) {
1399 dev_err(slave->bus->dev,
17ed5bef 1400 "SDW_DPN_INT write failed:%d\n", ret);
b0a9c37b
VK
1401 return ret;
1402 }
1403
1404 /* Read DPN interrupt again */
1405 status2 = sdw_read(slave, addr);
80cd8f01 1406 if (status2 < 0) {
b0a9c37b 1407 dev_err(slave->bus->dev,
17ed5bef 1408 "SDW_DPN_INT read failed:%d\n", status2);
80cd8f01 1409 return status2;
b0a9c37b 1410 }
6e06a855 1411 /* filter to limit loop to interrupts identified in the first status read */
b0a9c37b
VK
1412 status &= status2;
1413
1414 count++;
1415
1416 /* we can get alerts while processing so keep retrying */
47b85209 1417 } while ((status & SDW_DPN_INTERRUPTS) && (count < SDW_READ_INTR_CLEAR_RETRY));
b0a9c37b
VK
1418
1419 if (count == SDW_READ_INTR_CLEAR_RETRY)
1420 dev_warn(slave->bus->dev, "Reached MAX_RETRY on port read");
1421
1422 return ret;
1423}
1424
1425static int sdw_handle_slave_alerts(struct sdw_slave *slave)
1426{
1427 struct sdw_slave_intr_status slave_intr;
f1fac63a 1428 u8 clear = 0, bit, port_status[15] = {0};
b0a9c37b
VK
1429 int port_num, stat, ret, count = 0;
1430 unsigned long port;
7ffaba04 1431 bool slave_notify;
b7cab9be 1432 u8 sdca_cascade = 0;
b0a9c37b 1433 u8 buf, buf2[2], _buf, _buf2[2];
4724f12c
PLB
1434 bool parity_check;
1435 bool parity_quirk;
b0a9c37b
VK
1436
1437 sdw_modify_slave_status(slave, SDW_SLAVE_ALERT);
1438
aa792935
RW
1439 ret = pm_runtime_get_sync(&slave->dev);
1440 if (ret < 0 && ret != -EACCES) {
1441 dev_err(&slave->dev, "Failed to resume device: %d\n", ret);
1442 pm_runtime_put_noidle(slave->bus->dev);
1443 return ret;
1444 }
1445
f8d0168e 1446 /* Read Intstat 1, Intstat 2 and Intstat 3 registers */
72b16d4a 1447 ret = sdw_read(slave, SDW_SCP_INT1);
b0a9c37b
VK
1448 if (ret < 0) {
1449 dev_err(slave->bus->dev,
17ed5bef 1450 "SDW_SCP_INT1 read failed:%d\n", ret);
aa792935 1451 goto io_err;
b0a9c37b 1452 }
72b16d4a 1453 buf = ret;
b0a9c37b
VK
1454
1455 ret = sdw_nread(slave, SDW_SCP_INTSTAT2, 2, buf2);
1456 if (ret < 0) {
1457 dev_err(slave->bus->dev,
17ed5bef 1458 "SDW_SCP_INT2/3 read failed:%d\n", ret);
aa792935 1459 goto io_err;
b0a9c37b
VK
1460 }
1461
b7cab9be
PLB
1462 if (slave->prop.is_sdca) {
1463 ret = sdw_read(slave, SDW_DP0_INT);
1464 if (ret < 0) {
1465 dev_err(slave->bus->dev,
1466 "SDW_DP0_INT read failed:%d\n", ret);
1467 goto io_err;
1468 }
1469 sdca_cascade = ret & SDW_DP0_SDCA_CASCADE;
1470 }
1471
b0a9c37b 1472 do {
7ffaba04
PLB
1473 slave_notify = false;
1474
b0a9c37b
VK
1475 /*
1476 * Check parity, bus clash and Slave (impl defined)
1477 * interrupt
1478 */
1479 if (buf & SDW_SCP_INT1_PARITY) {
4724f12c
PLB
1480 parity_check = slave->prop.scp_int1_mask & SDW_SCP_INT1_PARITY;
1481 parity_quirk = !slave->first_interrupt_done &&
1482 (slave->prop.quirks & SDW_SLAVE_QUIRKS_INVALID_INITIAL_PARITY);
1483
1484 if (parity_check && !parity_quirk)
310f6dc6 1485 dev_err(&slave->dev, "Parity error detected\n");
b0a9c37b
VK
1486 clear |= SDW_SCP_INT1_PARITY;
1487 }
1488
1489 if (buf & SDW_SCP_INT1_BUS_CLASH) {
310f6dc6
PLB
1490 if (slave->prop.scp_int1_mask & SDW_SCP_INT1_BUS_CLASH)
1491 dev_err(&slave->dev, "Bus clash detected\n");
b0a9c37b
VK
1492 clear |= SDW_SCP_INT1_BUS_CLASH;
1493 }
1494
1495 /*
1496 * When bus clash or parity errors are detected, such errors
1497 * are unlikely to be recoverable errors.
1498 * TODO: In such scenario, reset bus. Make this configurable
1499 * via sysfs property with bus reset being the default.
1500 */
1501
1502 if (buf & SDW_SCP_INT1_IMPL_DEF) {
310f6dc6
PLB
1503 if (slave->prop.scp_int1_mask & SDW_SCP_INT1_IMPL_DEF) {
1504 dev_dbg(&slave->dev, "Slave impl defined interrupt\n");
1505 slave_notify = true;
1506 }
b0a9c37b 1507 clear |= SDW_SCP_INT1_IMPL_DEF;
b0a9c37b
VK
1508 }
1509
b7cab9be
PLB
1510 /* the SDCA interrupts are cleared in the codec driver .interrupt_callback() */
1511 if (sdca_cascade)
1512 slave_notify = true;
1513
b0a9c37b
VK
1514 /* Check port 0 - 3 interrupts */
1515 port = buf & SDW_SCP_INT1_PORT0_3;
1516
1517 /* To get port number corresponding to bits, shift it */
d5826a4b 1518 port = FIELD_GET(SDW_SCP_INT1_PORT0_3, port);
b0a9c37b
VK
1519 for_each_set_bit(bit, &port, 8) {
1520 sdw_handle_port_interrupt(slave, bit,
73ede046 1521 &port_status[bit]);
b0a9c37b
VK
1522 }
1523
1524 /* Check if cascade 2 interrupt is present */
1525 if (buf & SDW_SCP_INT1_SCP2_CASCADE) {
1526 port = buf2[0] & SDW_SCP_INTSTAT2_PORT4_10;
1527 for_each_set_bit(bit, &port, 8) {
1528 /* scp2 ports start from 4 */
1529 port_num = bit + 3;
1530 sdw_handle_port_interrupt(slave,
1531 port_num,
1532 &port_status[port_num]);
1533 }
1534 }
1535
1536 /* now check last cascade */
1537 if (buf2[0] & SDW_SCP_INTSTAT2_SCP3_CASCADE) {
1538 port = buf2[1] & SDW_SCP_INTSTAT3_PORT11_14;
1539 for_each_set_bit(bit, &port, 8) {
1540 /* scp3 ports start from 11 */
1541 port_num = bit + 10;
1542 sdw_handle_port_interrupt(slave,
1543 port_num,
1544 &port_status[port_num]);
1545 }
1546 }
1547
1548 /* Update the Slave driver */
09830d5e
PLB
1549 if (slave_notify && slave->ops &&
1550 slave->ops->interrupt_callback) {
b7cab9be 1551 slave_intr.sdca_cascade = sdca_cascade;
b0a9c37b
VK
1552 slave_intr.control_port = clear;
1553 memcpy(slave_intr.port, &port_status,
73ede046 1554 sizeof(slave_intr.port));
b0a9c37b
VK
1555
1556 slave->ops->interrupt_callback(slave, &slave_intr);
1557 }
1558
1559 /* Ack interrupt */
1560 ret = sdw_write(slave, SDW_SCP_INT1, clear);
1561 if (ret < 0) {
1562 dev_err(slave->bus->dev,
17ed5bef 1563 "SDW_SCP_INT1 write failed:%d\n", ret);
aa792935 1564 goto io_err;
b0a9c37b
VK
1565 }
1566
c2819e19
PLB
1567 /* at this point all initial interrupt sources were handled */
1568 slave->first_interrupt_done = true;
1569
b0a9c37b
VK
1570 /*
1571 * Read status again to ensure no new interrupts arrived
1572 * while servicing interrupts.
1573 */
72b16d4a 1574 ret = sdw_read(slave, SDW_SCP_INT1);
b0a9c37b
VK
1575 if (ret < 0) {
1576 dev_err(slave->bus->dev,
17ed5bef 1577 "SDW_SCP_INT1 read failed:%d\n", ret);
aa792935 1578 goto io_err;
b0a9c37b 1579 }
72b16d4a 1580 _buf = ret;
b0a9c37b
VK
1581
1582 ret = sdw_nread(slave, SDW_SCP_INTSTAT2, 2, _buf2);
1583 if (ret < 0) {
1584 dev_err(slave->bus->dev,
17ed5bef 1585 "SDW_SCP_INT2/3 read failed:%d\n", ret);
aa792935 1586 goto io_err;
b0a9c37b
VK
1587 }
1588
b7cab9be
PLB
1589 if (slave->prop.is_sdca) {
1590 ret = sdw_read(slave, SDW_DP0_INT);
1591 if (ret < 0) {
1592 dev_err(slave->bus->dev,
1593 "SDW_DP0_INT read failed:%d\n", ret);
1594 goto io_err;
1595 }
1596 sdca_cascade = ret & SDW_DP0_SDCA_CASCADE;
1597 }
1598
6e06a855
PLB
1599 /*
1600 * Make sure no interrupts are pending, but filter to limit loop
1601 * to interrupts identified in the first status read
1602 */
b0a9c37b
VK
1603 buf &= _buf;
1604 buf2[0] &= _buf2[0];
1605 buf2[1] &= _buf2[1];
b7cab9be 1606 stat = buf || buf2[0] || buf2[1] || sdca_cascade;
b0a9c37b
VK
1607
1608 /*
1609 * Exit loop if Slave is continuously in ALERT state even
1610 * after servicing the interrupt multiple times.
1611 */
1612 count++;
1613
1614 /* we can get alerts while processing so keep retrying */
1615 } while (stat != 0 && count < SDW_READ_INTR_CLEAR_RETRY);
1616
1617 if (count == SDW_READ_INTR_CLEAR_RETRY)
17ed5bef 1618 dev_warn(slave->bus->dev, "Reached MAX_RETRY on alert read\n");
b0a9c37b 1619
aa792935
RW
1620io_err:
1621 pm_runtime_mark_last_busy(&slave->dev);
1622 pm_runtime_put_autosuspend(&slave->dev);
1623
b0a9c37b
VK
1624 return ret;
1625}
1626
1627static int sdw_update_slave_status(struct sdw_slave *slave,
73ede046 1628 enum sdw_slave_status status)
b0a9c37b 1629{
2140b66b 1630 unsigned long time;
b0a9c37b 1631
2140b66b
PLB
1632 if (!slave->probed) {
1633 /*
1634 * the slave status update is typically handled in an
1635 * interrupt thread, which can race with the driver
1636 * probe, e.g. when a module needs to be loaded.
1637 *
1638 * make sure the probe is complete before updating
1639 * status.
1640 */
1641 time = wait_for_completion_timeout(&slave->probe_complete,
1642 msecs_to_jiffies(DEFAULT_PROBE_TIMEOUT));
1643 if (!time) {
1644 dev_err(&slave->dev, "Probe not complete, timed out\n");
1645 return -ETIMEDOUT;
1646 }
1647 }
1648
1649 if (!slave->ops || !slave->ops->update_status)
1650 return 0;
1651
1652 return slave->ops->update_status(slave, status);
b0a9c37b
VK
1653}
1654
1655/**
1656 * sdw_handle_slave_status() - Handle Slave status
1657 * @bus: SDW bus instance
1658 * @status: Status for all Slave(s)
1659 */
1660int sdw_handle_slave_status(struct sdw_bus *bus,
73ede046 1661 enum sdw_slave_status status[])
b0a9c37b
VK
1662{
1663 enum sdw_slave_status prev_status;
1664 struct sdw_slave *slave;
a90def06 1665 bool attached_initializing;
b0a9c37b
VK
1666 int i, ret = 0;
1667
61061901
PLB
1668 /* first check if any Slaves fell off the bus */
1669 for (i = 1; i <= SDW_MAX_DEVICES; i++) {
1670 mutex_lock(&bus->bus_lock);
1671 if (test_bit(i, bus->assigned) == false) {
1672 mutex_unlock(&bus->bus_lock);
1673 continue;
1674 }
1675 mutex_unlock(&bus->bus_lock);
1676
1677 slave = sdw_get_slave(bus, i);
1678 if (!slave)
1679 continue;
1680
1681 if (status[i] == SDW_SLAVE_UNATTACHED &&
1682 slave->status != SDW_SLAVE_UNATTACHED)
1683 sdw_modify_slave_status(slave, SDW_SLAVE_UNATTACHED);
1684 }
1685
b0a9c37b 1686 if (status[0] == SDW_SLAVE_ATTACHED) {
6e0ac6a6 1687 dev_dbg(bus->dev, "Slave attached, programming device number\n");
b0a9c37b
VK
1688 ret = sdw_program_device_num(bus);
1689 if (ret)
17ed5bef 1690 dev_err(bus->dev, "Slave attach failed: %d\n", ret);
15ed3ea2
PLB
1691 /*
1692 * programming a device number will have side effects,
1693 * so we deal with other devices at a later time
1694 */
1695 return ret;
b0a9c37b
VK
1696 }
1697
1698 /* Continue to check other slave statuses */
1699 for (i = 1; i <= SDW_MAX_DEVICES; i++) {
1700 mutex_lock(&bus->bus_lock);
1701 if (test_bit(i, bus->assigned) == false) {
1702 mutex_unlock(&bus->bus_lock);
1703 continue;
1704 }
1705 mutex_unlock(&bus->bus_lock);
1706
1707 slave = sdw_get_slave(bus, i);
1708 if (!slave)
1709 continue;
1710
a90def06
PLB
1711 attached_initializing = false;
1712
b0a9c37b
VK
1713 switch (status[i]) {
1714 case SDW_SLAVE_UNATTACHED:
1715 if (slave->status == SDW_SLAVE_UNATTACHED)
1716 break;
1717
1718 sdw_modify_slave_status(slave, SDW_SLAVE_UNATTACHED);
1719 break;
1720
1721 case SDW_SLAVE_ALERT:
1722 ret = sdw_handle_slave_alerts(slave);
1723 if (ret)
1724 dev_err(bus->dev,
17ed5bef 1725 "Slave %d alert handling failed: %d\n",
b0a9c37b
VK
1726 i, ret);
1727 break;
1728
1729 case SDW_SLAVE_ATTACHED:
1730 if (slave->status == SDW_SLAVE_ATTACHED)
1731 break;
1732
1733 prev_status = slave->status;
1734 sdw_modify_slave_status(slave, SDW_SLAVE_ATTACHED);
1735
1736 if (prev_status == SDW_SLAVE_ALERT)
1737 break;
1738
a90def06
PLB
1739 attached_initializing = true;
1740
b0a9c37b
VK
1741 ret = sdw_initialize_slave(slave);
1742 if (ret)
1743 dev_err(bus->dev,
17ed5bef 1744 "Slave %d initialization failed: %d\n",
b0a9c37b
VK
1745 i, ret);
1746
1747 break;
1748
1749 default:
17ed5bef 1750 dev_err(bus->dev, "Invalid slave %d status:%d\n",
73ede046 1751 i, status[i]);
b0a9c37b
VK
1752 break;
1753 }
1754
1755 ret = sdw_update_slave_status(slave, status[i]);
1756 if (ret)
1757 dev_err(slave->bus->dev,
17ed5bef 1758 "Update Slave status failed:%d\n", ret);
a90def06
PLB
1759 if (attached_initializing)
1760 complete(&slave->initialization_complete);
b0a9c37b
VK
1761 }
1762
1763 return ret;
1764}
1765EXPORT_SYMBOL(sdw_handle_slave_status);
3ab2ca40
PLB
1766
1767void sdw_clear_slave_status(struct sdw_bus *bus, u32 request)
1768{
1769 struct sdw_slave *slave;
1770 int i;
1771
1772 /* Check all non-zero devices */
1773 for (i = 1; i <= SDW_MAX_DEVICES; i++) {
1774 mutex_lock(&bus->bus_lock);
1775 if (test_bit(i, bus->assigned) == false) {
1776 mutex_unlock(&bus->bus_lock);
1777 continue;
1778 }
1779 mutex_unlock(&bus->bus_lock);
1780
1781 slave = sdw_get_slave(bus, i);
1782 if (!slave)
1783 continue;
1784
c2819e19 1785 if (slave->status != SDW_SLAVE_UNATTACHED) {
3ab2ca40 1786 sdw_modify_slave_status(slave, SDW_SLAVE_UNATTACHED);
c2819e19
PLB
1787 slave->first_interrupt_done = false;
1788 }
3ab2ca40
PLB
1789
1790 /* keep track of request, used in pm_runtime resume */
1791 slave->unattach_request = request;
1792 }
1793}
1794EXPORT_SYMBOL(sdw_clear_slave_status);