]> git.proxmox.com Git - mirror_ubuntu-bionic-kernel.git/blame - drivers/staging/sm7xxfb/sm7xxfb.c
projects / mirror_ubuntu-bionic-kernel.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
staging: sm7xxfb: fix alignment
[mirror_ubuntu-bionic-kernel.git] / drivers / staging / sm7xxfb / sm7xxfb.c
CommitLineData
a8e8f89d
SM		 1/*
2 * Silicon Motion SM7XX frame buffer device
3 *
4 * Copyright (C) 2006 Silicon Motion Technology Corp.
5 * Authors: Ge Wang, gewang@siliconmotion.com
6 * Boyod boyod.yang@siliconmotion.com.cn
7 *
8 * Copyright (C) 2009 Lemote, Inc.
9 * Author: Wu Zhangjin, wuzhangjin@gmail.com
10 *
11 * Copyright (C) 2011 Igalia, S.L.
12 * Author: Javier M. Mellid <jmunhoz@igalia.com>
13 *
14 * This file is subject to the terms and conditions of the GNU General Public
15 * License. See the file COPYING in the main directory of this archive for
16 * more details.
17 *
18 * Framebuffer driver for Silicon Motion SM710, SM712, SM721 and SM722 chips
19 */
20
21#include <linux/io.h>
22#include <linux/fb.h>
23#include <linux/pci.h>
24#include <linux/init.h>
25#include <linux/slab.h>
26#include <linux/uaccess.h>
27#include <linux/module.h>
28#include <linux/console.h>
29#include <linux/screen_info.h>
30
31#ifdef CONFIG_PM
32#include <linux/pm.h>
33#endif
34
35#include "sm7xx.h"
36
37/*
38* Private structure
39*/
40struct smtcfb_info {
41 struct pci_dev *pdev;
cd14ad8b 42 struct fb_info *fb;
a8e8f89d
SM		 43 u16 chip_id;
44 u8 chip_rev_id;
45
46 void __iomem *lfb; /* linear frame buffer */
47 void __iomem *dp_regs; /* drawing processor control regs */
48 void __iomem *vp_regs; /* video processor control regs */
49 void __iomem *cp_regs; /* capture processor control regs */
50 void __iomem *mmio; /* memory map IO port */
51
52 u_int width;
53 u_int height;
54 u_int hz;
55
56 u32 colreg[17];
57};
58
74121898 59void __iomem *smtc_regbaseaddress; /* Memory Map IO starting address */
a8e8f89d
SM		 60
61static struct fb_var_screeninfo smtcfb_var = {
62 .xres = 1024,
63 .yres = 600,
64 .xres_virtual = 1024,
65 .yres_virtual = 600,
66 .bits_per_pixel = 16,
67 .red = {16, 8, 0},
68 .green = {8, 8, 0},
69 .blue = {0, 8, 0},
70 .activate = FB_ACTIVATE_NOW,
71 .height = -1,
72 .width = -1,
73 .vmode = FB_VMODE_NONINTERLACED,
74 .nonstd = 0,
75 .accel_flags = FB_ACCELF_TEXT,
76};
77
78static struct fb_fix_screeninfo smtcfb_fix = {
79 .id = "smXXXfb",
80 .type = FB_TYPE_PACKED_PIXELS,
81 .visual = FB_VISUAL_TRUECOLOR,
82 .line_length = 800 * 3,
83 .accel = FB_ACCEL_SMI_LYNX,
84 .type_aux = 0,
85 .xpanstep = 0,
86 .ypanstep = 0,
87 .ywrapstep = 0,
88};
89
90struct vesa_mode {
91 char index[6];
92 u16 lfb_width;
93 u16 lfb_height;
94 u16 lfb_depth;
95};
96
9d91928c 97static const struct vesa_mode vesa_mode_table[] = {
a8e8f89d
SM		 98 {"0x301", 640, 480, 8},
99 {"0x303", 800, 600, 8},
100 {"0x305", 1024, 768, 8},
101 {"0x307", 1280, 1024, 8},
102
103 {"0x311", 640, 480, 16},
104 {"0x314", 800, 600, 16},
105 {"0x317", 1024, 768, 16},
106 {"0x31A", 1280, 1024, 16},
107
108 {"0x312", 640, 480, 24},
109 {"0x315", 800, 600, 24},
110 {"0x318", 1024, 768, 24},
111 {"0x31B", 1280, 1024, 24},
112};
113
11862b36 114static struct screen_info smtc_scr_info;
a8e8f89d 115
c65434eb
SM		 116static char *mode_option;
117
a8e8f89d 118/* process command line options, get vga parameter */
71ce762f 119static void __init sm7xx_vga_setup(char *options)
a8e8f89d
SM		 120{
121 int i;
122
123 if (!options || !*options)
71ce762f 124 return;
a8e8f89d
SM		 125
126 smtc_scr_info.lfb_width = 0;
127 smtc_scr_info.lfb_height = 0;
128 smtc_scr_info.lfb_depth = 0;
129
130 pr_debug("sm7xx_vga_setup = %s\n", options);
131
132 for (i = 0; i < ARRAY_SIZE(vesa_mode_table); i++) {
133 if (strstr(options, vesa_mode_table[i].index)) {
134 smtc_scr_info.lfb_width = vesa_mode_table[i].lfb_width;
135 smtc_scr_info.lfb_height =
136 vesa_mode_table[i].lfb_height;
137 smtc_scr_info.lfb_depth = vesa_mode_table[i].lfb_depth;
71ce762f 138 return;
a8e8f89d
SM		 139 }
140 }
a8e8f89d 141}
a8e8f89d
SM		 142
143static void sm712_setpalette(int regno, unsigned red, unsigned green,
144 unsigned blue, struct fb_info *info)
145{
146 /* set bit 5:4 = 01 (write LCD RAM only) */
147 smtc_seqw(0x66, (smtc_seqr(0x66) & 0xC3) | 0x10);
148
149 smtc_mmiowb(regno, dac_reg);
150 smtc_mmiowb(red >> 10, dac_val);
151 smtc_mmiowb(green >> 10, dac_val);
152 smtc_mmiowb(blue >> 10, dac_val);
153}
154
155/* chan_to_field
156 *
157 * convert a colour value into a field position
158 *
159 * from pxafb.c
160 */
161
162static inline unsigned int chan_to_field(unsigned int chan,
163 struct fb_bitfield *bf)
164{
165 chan &= 0xffff;
166 chan >>= 16 - bf->length;
167 return chan << bf->offset;
168}
169
170static int smtc_blank(int blank_mode, struct fb_info *info)
171{
172 /* clear DPMS setting */
173 switch (blank_mode) {
174 case FB_BLANK_UNBLANK:
175 /* Screen On: HSync: On, VSync : On */
176 smtc_seqw(0x01, (smtc_seqr(0x01) & (~0x20)));
177 smtc_seqw(0x6a, 0x16);
178 smtc_seqw(0x6b, 0x02);
179 smtc_seqw(0x21, (smtc_seqr(0x21) & 0x77));
180 smtc_seqw(0x22, (smtc_seqr(0x22) & (~0x30)));
181 smtc_seqw(0x23, (smtc_seqr(0x23) & (~0xc0)));
182 smtc_seqw(0x24, (smtc_seqr(0x24) | 0x01));
183 smtc_seqw(0x31, (smtc_seqr(0x31) | 0x03));
184 break;
185 case FB_BLANK_NORMAL:
186 /* Screen Off: HSync: On, VSync : On Soft blank */
187 smtc_seqw(0x01, (smtc_seqr(0x01) & (~0x20)));
188 smtc_seqw(0x6a, 0x16);
189 smtc_seqw(0x6b, 0x02);
190 smtc_seqw(0x22, (smtc_seqr(0x22) & (~0x30)));
191 smtc_seqw(0x23, (smtc_seqr(0x23) & (~0xc0)));
192 smtc_seqw(0x24, (smtc_seqr(0x24) | 0x01));
193 smtc_seqw(0x31, ((smtc_seqr(0x31) & (~0x07)) | 0x00));
194 break;
195 case FB_BLANK_VSYNC_SUSPEND:
196 /* Screen On: HSync: On, VSync : Off */
197 smtc_seqw(0x01, (smtc_seqr(0x01) | 0x20));
198 smtc_seqw(0x20, (smtc_seqr(0x20) & (~0xB0)));
199 smtc_seqw(0x6a, 0x0c);
200 smtc_seqw(0x6b, 0x02);
201 smtc_seqw(0x21, (smtc_seqr(0x21) | 0x88));
202 smtc_seqw(0x22, ((smtc_seqr(0x22) & (~0x30)) | 0x20));
203 smtc_seqw(0x23, ((smtc_seqr(0x23) & (~0xc0)) | 0x20));
204 smtc_seqw(0x24, (smtc_seqr(0x24) & (~0x01)));
205 smtc_seqw(0x31, ((smtc_seqr(0x31) & (~0x07)) | 0x00));
206 smtc_seqw(0x34, (smtc_seqr(0x34) | 0x80));
207 break;
208 case FB_BLANK_HSYNC_SUSPEND:
209 /* Screen On: HSync: Off, VSync : On */
210 smtc_seqw(0x01, (smtc_seqr(0x01) | 0x20));
211 smtc_seqw(0x20, (smtc_seqr(0x20) & (~0xB0)));
212 smtc_seqw(0x6a, 0x0c);
213 smtc_seqw(0x6b, 0x02);
214 smtc_seqw(0x21, (smtc_seqr(0x21) | 0x88));
215 smtc_seqw(0x22, ((smtc_seqr(0x22) & (~0x30)) | 0x10));
216 smtc_seqw(0x23, ((smtc_seqr(0x23) & (~0xc0)) | 0xD8));
217 smtc_seqw(0x24, (smtc_seqr(0x24) & (~0x01)));
218 smtc_seqw(0x31, ((smtc_seqr(0x31) & (~0x07)) | 0x00));
219 smtc_seqw(0x34, (smtc_seqr(0x34) | 0x80));
220 break;
221 case FB_BLANK_POWERDOWN:
222 /* Screen On: HSync: Off, VSync : Off */
223 smtc_seqw(0x01, (smtc_seqr(0x01) | 0x20));
224 smtc_seqw(0x20, (smtc_seqr(0x20) & (~0xB0)));
225 smtc_seqw(0x6a, 0x0c);
226 smtc_seqw(0x6b, 0x02);
227 smtc_seqw(0x21, (smtc_seqr(0x21) | 0x88));
228 smtc_seqw(0x22, ((smtc_seqr(0x22) & (~0x30)) | 0x30));
229 smtc_seqw(0x23, ((smtc_seqr(0x23) & (~0xc0)) | 0xD8));
230 smtc_seqw(0x24, (smtc_seqr(0x24) & (~0x01)));
231 smtc_seqw(0x31, ((smtc_seqr(0x31) & (~0x07)) | 0x00));
232 smtc_seqw(0x34, (smtc_seqr(0x34) | 0x80));
233 break;
234 default:
235 return -EINVAL;
236 }
237
238 return 0;
239}
240
241static int smtc_setcolreg(unsigned regno, unsigned red, unsigned green,
242 unsigned blue, unsigned trans, struct fb_info *info)
243{
244 struct smtcfb_info *sfb;
245 u32 val;
246
247 sfb = info->par;
248
249 if (regno > 255)
250 return 1;
251
cd14ad8b 252 switch (sfb->fb->fix.visual) {
a8e8f89d
SM		 253 case FB_VISUAL_DIRECTCOLOR:
254 case FB_VISUAL_TRUECOLOR:
255 /*
256 * 16/32 bit true-colour, use pseudo-palette for 16 base color
257 */
258 if (regno < 16) {
cd14ad8b
SM		 259 if (sfb->fb->var.bits_per_pixel == 16) {
260 u32 *pal = sfb->fb->pseudo_palette;
a1f6da67 261
cd14ad8b
SM		 262 val = chan_to_field(red, &sfb->fb->var.red);
263 val |= chan_to_field(green,
264 &sfb->fb->var.green);
265 val |= chan_to_field(blue, &sfb->fb->var.blue);
a8e8f89d
SM		 266#ifdef __BIG_ENDIAN
267 pal[regno] =
268 ((red & 0xf800) >> 8) |
269 ((green & 0xe000) >> 13) |
270 ((green & 0x1c00) << 3) |
271 ((blue & 0xf800) >> 3);
272#else
273 pal[regno] = val;
274#endif
275 } else {
cd14ad8b 276 u32 *pal = sfb->fb->pseudo_palette;
a1f6da67 277
cd14ad8b
SM		 278 val = chan_to_field(red, &sfb->fb->var.red);
279 val |= chan_to_field(green,
280 &sfb->fb->var.green);
281 val |= chan_to_field(blue, &sfb->fb->var.blue);
a8e8f89d
SM		 282#ifdef __BIG_ENDIAN
283 val =
284 (val & 0xff00ff00 >> 8) |
285 (val & 0x00ff00ff << 8);
286#endif
287 pal[regno] = val;
288 }
289 }
290 break;
291
292 case FB_VISUAL_PSEUDOCOLOR:
293 /* color depth 8 bit */
294 sm712_setpalette(regno, red, green, blue, info);
295 break;
296
297 default:
298 return 1; /* unknown type */
299 }
300
301 return 0;
a8e8f89d
SM		 302}
303
304#ifdef __BIG_ENDIAN
f5daff3f
SM		 305static ssize_t smtcfb_read(struct fb_info *info, char __user *buf,
306 size_t count, loff_t *ppos)
a8e8f89d
SM		 307{
308 unsigned long p = *ppos;
309
310 u32 *buffer, *dst;
311 u32 __iomem *src;
312 int c, i, cnt = 0, err = 0;
313 unsigned long total_size;
314
315 if (!info || !info->screen_base)
316 return -ENODEV;
317
318 if (info->state != FBINFO_STATE_RUNNING)
319 return -EPERM;
320
321 total_size = info->screen_size;
322
323 if (total_size == 0)
324 total_size = info->fix.smem_len;
325
326 if (p >= total_size)
327 return 0;
328
329 if (count >= total_size)
330 count = total_size;
331
332 if (count + p > total_size)
333 count = total_size - p;
334
335 buffer = kmalloc((count > PAGE_SIZE) ? PAGE_SIZE : count, GFP_KERNEL);
336 if (!buffer)
337 return -ENOMEM;
338
3e4b5598 339 src = (u32 __iomem *)(info->screen_base + p);
a8e8f89d
SM		 340
341 if (info->fbops->fb_sync)
342 info->fbops->fb_sync(info);
343
344 while (count) {
345 c = (count > PAGE_SIZE) ? PAGE_SIZE : count;
346 dst = buffer;
347 for (i = c >> 2; i--;) {
348 *dst = fb_readl(src++);
f5daff3f
SM		 349 *dst = (*dst & 0xff00ff00 >> 8) |
350 (*dst & 0x00ff00ff << 8);
a8e8f89d
SM		 351 dst++;
352 }
353 if (c & 3) {
53f54a48
SM		 354 u8 *dst8 = (u8 *)dst;
355 u8 __iomem *src8 = (u8 __iomem *)src;
a8e8f89d
SM		 356
357 for (i = c & 3; i--;) {
358 if (i & 1) {
359 *dst8++ = fb_readb(++src8);
360 } else {
361 *dst8++ = fb_readb(--src8);
362 src8 += 2;
363 }
364 }
53f54a48 365 src = (u32 __iomem *)src8;
a8e8f89d
SM		 366 }
367
368 if (copy_to_user(buf, buffer, c)) {
369 err = -EFAULT;
370 break;
371 }
372 *ppos += c;
373 buf += c;
374 cnt += c;
375 count -= c;
376 }
377
378 kfree(buffer);
379
380 return (err) ? err : cnt;
381}
382
f5daff3f
SM		 383static ssize_t smtcfb_write(struct fb_info *info, const char __user *buf,
384 size_t count, loff_t *ppos)
a8e8f89d
SM		 385{
386 unsigned long p = *ppos;
387
388 u32 *buffer, *src;
389 u32 __iomem *dst;
390 int c, i, cnt = 0, err = 0;
391 unsigned long total_size;
392
393 if (!info || !info->screen_base)
394 return -ENODEV;
395
396 if (info->state != FBINFO_STATE_RUNNING)
397 return -EPERM;
398
399 total_size = info->screen_size;
400
401 if (total_size == 0)
402 total_size = info->fix.smem_len;
403
404 if (p > total_size)
405 return -EFBIG;
406
407 if (count > total_size) {
408 err = -EFBIG;
409 count = total_size;
410 }
411
412 if (count + p > total_size) {
413 if (!err)
414 err = -ENOSPC;
415
416 count = total_size - p;
417 }
418
419 buffer = kmalloc((count > PAGE_SIZE) ? PAGE_SIZE : count, GFP_KERNEL);
420 if (!buffer)
421 return -ENOMEM;
422
3e4b5598 423 dst = (u32 __iomem *)(info->screen_base + p);
a8e8f89d
SM		 424
425 if (info->fbops->fb_sync)
426 info->fbops->fb_sync(info);
427
428 while (count) {
429 c = (count > PAGE_SIZE) ? PAGE_SIZE : count;
430 src = buffer;
431
432 if (copy_from_user(src, buf, c)) {
433 err = -EFAULT;
434 break;
435 }
436
437 for (i = c >> 2; i--;) {
438 fb_writel((*src & 0xff00ff00 >> 8) |
439 (*src & 0x00ff00ff << 8), dst++);
440 src++;
441 }
442 if (c & 3) {
53f54a48
SM		 443 u8 *src8 = (u8 *)src;
444 u8 __iomem *dst8 = (u8 __iomem *)dst;
a8e8f89d
SM		 445
446 for (i = c & 3; i--;) {
447 if (i & 1) {
448 fb_writeb(*src8++, ++dst8);
449 } else {
450 fb_writeb(*src8++, --dst8);
451 dst8 += 2;
452 }
453 }
53f54a48 454 dst = (u32 __iomem *)dst8;
a8e8f89d
SM		 455 }
456
457 *ppos += c;
458 buf += c;
459 cnt += c;
460 count -= c;
461 }
462
463 kfree(buffer);
464
465 return (cnt) ? cnt : err;
466}
467#endif /* ! __BIG_ENDIAN */
468
469static void sm7xx_set_timing(struct smtcfb_info *sfb)
470{
471 int i = 0, j = 0;
c4d50767 472 u32 m_nscreenstride;
a8e8f89d
SM		 473
474 dev_dbg(&sfb->pdev->dev,
cd14ad8b
SM		 475 "sfb->width=%d sfb->height=%d sfb->fb->var.bits_per_pixel=%d sfb->hz=%d\n",
476 sfb->width, sfb->height, sfb->fb->var.bits_per_pixel, sfb->hz);
a8e8f89d 477
7caf463d 478 for (j = 0; j < ARRAY_SIZE(vgamode); j++) {
c4d50767
SM		 479 if (vgamode[j].mmsizex == sfb->width &&
480 vgamode[j].mmsizey == sfb->height &&
cd14ad8b 481 vgamode[j].bpp == sfb->fb->var.bits_per_pixel &&
c4d50767 482 vgamode[j].hz == sfb->hz) {
a8e8f89d 483 dev_dbg(&sfb->pdev->dev,
c4d50767
SM		 484 "vgamode[j].mmsizex=%d vgamode[j].mmSizeY=%d vgamode[j].bpp=%d vgamode[j].hz=%d\n",
485 vgamode[j].mmsizex, vgamode[j].mmsizey,
486 vgamode[j].bpp, vgamode[j].hz);
a8e8f89d 487
c4d50767 488 dev_dbg(&sfb->pdev->dev, "vgamode index=%d\n", j);
a8e8f89d
SM		 489
490 smtc_mmiowb(0x0, 0x3c6);
491
492 smtc_seqw(0, 0x1);
493
c4d50767 494 smtc_mmiowb(vgamode[j].init_misc, 0x3c2);
a8e8f89d
SM		 495
496 /* init SEQ register SR00 - SR04 */
497 for (i = 0; i < SIZE_SR00_SR04; i++)
c4d50767 498 smtc_seqw(i, vgamode[j].init_sr00_sr04[i]);
a8e8f89d
SM		 499
500 /* init SEQ register SR10 - SR24 */
501 for (i = 0; i < SIZE_SR10_SR24; i++)
502 smtc_seqw(i + 0x10,
c4d50767 503 vgamode[j].init_sr10_sr24[i]);
a8e8f89d
SM		 504
505 /* init SEQ register SR30 - SR75 */
506 for (i = 0; i < SIZE_SR30_SR75; i++)
507 if ((i + 0x30) != 0x62 &&
508 (i + 0x30) != 0x6a &&
509 (i + 0x30) != 0x6b)
510 smtc_seqw(i + 0x30,
c4d50767 511 vgamode[j].init_sr30_sr75[i]);
a8e8f89d
SM		 512
513 /* init SEQ register SR80 - SR93 */
514 for (i = 0; i < SIZE_SR80_SR93; i++)
515 smtc_seqw(i + 0x80,
c4d50767 516 vgamode[j].init_sr80_sr93[i]);
a8e8f89d
SM		 517
518 /* init SEQ register SRA0 - SRAF */
519 for (i = 0; i < SIZE_SRA0_SRAF; i++)
520 smtc_seqw(i + 0xa0,
c4d50767 521 vgamode[j].init_sra0_sraf[i]);
a8e8f89d
SM		 522
523 /* init Graphic register GR00 - GR08 */
524 for (i = 0; i < SIZE_GR00_GR08; i++)
c4d50767 525 smtc_grphw(i, vgamode[j].init_gr00_gr08[i]);
a8e8f89d
SM		 526
527 /* init Attribute register AR00 - AR14 */
528 for (i = 0; i < SIZE_AR00_AR14; i++)
c4d50767 529 smtc_attrw(i, vgamode[j].init_ar00_ar14[i]);
a8e8f89d
SM		 530
531 /* init CRTC register CR00 - CR18 */
532 for (i = 0; i < SIZE_CR00_CR18; i++)
c4d50767 533 smtc_crtcw(i, vgamode[j].init_cr00_cr18[i]);
a8e8f89d
SM		 534
535 /* init CRTC register CR30 - CR4D */
536 for (i = 0; i < SIZE_CR30_CR4D; i++)
537 smtc_crtcw(i + 0x30,
c4d50767 538 vgamode[j].init_cr30_cr4d[i]);
a8e8f89d
SM		 539
540 /* init CRTC register CR90 - CRA7 */
541 for (i = 0; i < SIZE_CR90_CRA7; i++)
542 smtc_crtcw(i + 0x90,
c4d50767 543 vgamode[j].init_cr90_cra7[i]);
a8e8f89d
SM		 544 }
545 }
546 smtc_mmiowb(0x67, 0x3c2);
547
548 /* set VPR registers */
549 writel(0x0, sfb->vp_regs + 0x0C);
550 writel(0x0, sfb->vp_regs + 0x40);
551
552 /* set data width */
f5daff3f 553 m_nscreenstride = (sfb->width * sfb->fb->var.bits_per_pixel) / 64;
cd14ad8b 554 switch (sfb->fb->var.bits_per_pixel) {
a8e8f89d
SM		 555 case 8:
556 writel(0x0, sfb->vp_regs + 0x0);
557 break;
558 case 16:
559 writel(0x00020000, sfb->vp_regs + 0x0);
560 break;
561 case 24:
562 writel(0x00040000, sfb->vp_regs + 0x0);
563 break;
564 case 32:
565 writel(0x00030000, sfb->vp_regs + 0x0);
566 break;
567 }
3e4b5598 568 writel((u32)(((m_nscreenstride + 2) << 16) | m_nscreenstride),
a8e8f89d 569 sfb->vp_regs + 0x10);
a8e8f89d
SM		 570}
571
572static void smtc_set_timing(struct smtcfb_info *sfb)
573{
574 switch (sfb->chip_id) {
575 case 0x710:
576 case 0x712:
577 case 0x720:
578 sm7xx_set_timing(sfb);
579 break;
580 }
581}
582
583static void smtcfb_setmode(struct smtcfb_info *sfb)
584{
cd14ad8b 585 switch (sfb->fb->var.bits_per_pixel) {
a8e8f89d 586 case 32:
cd14ad8b
SM		 587 sfb->fb->fix.visual = FB_VISUAL_TRUECOLOR;
588 sfb->fb->fix.line_length = sfb->fb->var.xres * 4;
589 sfb->fb->var.red.length = 8;
590 sfb->fb->var.green.length = 8;
591 sfb->fb->var.blue.length = 8;
592 sfb->fb->var.red.offset = 16;
593 sfb->fb->var.green.offset = 8;
594 sfb->fb->var.blue.offset = 0;
a8e8f89d
SM		 595 break;
596 case 24:
cd14ad8b
SM		 597 sfb->fb->fix.visual = FB_VISUAL_TRUECOLOR;
598 sfb->fb->fix.line_length = sfb->fb->var.xres * 3;
599 sfb->fb->var.red.length = 8;
600 sfb->fb->var.green.length = 8;
601 sfb->fb->var.blue.length = 8;
602 sfb->fb->var.red.offset = 16;
603 sfb->fb->var.green.offset = 8;
604 sfb->fb->var.blue.offset = 0;
a8e8f89d
SM		 605 break;
606 case 8:
cd14ad8b
SM		 607 sfb->fb->fix.visual = FB_VISUAL_PSEUDOCOLOR;
608 sfb->fb->fix.line_length = sfb->fb->var.xres;
609 sfb->fb->var.red.length = 3;
610 sfb->fb->var.green.length = 3;
611 sfb->fb->var.blue.length = 2;
612 sfb->fb->var.red.offset = 5;
613 sfb->fb->var.green.offset = 2;
614 sfb->fb->var.blue.offset = 0;
a8e8f89d
SM		 615 break;
616 case 16:
617 default:
cd14ad8b
SM		 618 sfb->fb->fix.visual = FB_VISUAL_TRUECOLOR;
619 sfb->fb->fix.line_length = sfb->fb->var.xres * 2;
620 sfb->fb->var.red.length = 5;
621 sfb->fb->var.green.length = 6;
622 sfb->fb->var.blue.length = 5;
623 sfb->fb->var.red.offset = 11;
624 sfb->fb->var.green.offset = 5;
625 sfb->fb->var.blue.offset = 0;
a8e8f89d
SM		 626 break;
627 }
628
cd14ad8b
SM		 629 sfb->width = sfb->fb->var.xres;
630 sfb->height = sfb->fb->var.yres;
a8e8f89d
SM		 631 sfb->hz = 60;
632 smtc_set_timing(sfb);
633}
634
635static int smtc_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
636{
637 /* sanity checks */
638 if (var->xres_virtual < var->xres)
639 var->xres_virtual = var->xres;
640
641 if (var->yres_virtual < var->yres)
642 var->yres_virtual = var->yres;
643
644 /* set valid default bpp */
645 if ((var->bits_per_pixel != 8) && (var->bits_per_pixel != 16) &&
646 (var->bits_per_pixel != 24) && (var->bits_per_pixel != 32))
647 var->bits_per_pixel = 16;
648
649 return 0;
650}
651
652static int smtc_set_par(struct fb_info *info)
653{
654 smtcfb_setmode(info->par);
655
656 return 0;
657}
658
659static struct fb_ops smtcfb_ops = {
660 .owner = THIS_MODULE,
661 .fb_check_var = smtc_check_var,
662 .fb_set_par = smtc_set_par,
663 .fb_setcolreg = smtc_setcolreg,
664 .fb_blank = smtc_blank,
665 .fb_fillrect = cfb_fillrect,
666 .fb_imageblit = cfb_imageblit,
667 .fb_copyarea = cfb_copyarea,
668#ifdef __BIG_ENDIAN
669 .fb_read = smtcfb_read,
670 .fb_write = smtcfb_write,
671#endif
672};
673
a8e8f89d
SM		 674/*
675 * Unmap in the memory mapped IO registers
676 */
677
678static void smtc_unmap_mmio(struct smtcfb_info *sfb)
679{
74121898
SM		 680 if (sfb && smtc_regbaseaddress)
681 smtc_regbaseaddress = NULL;
a8e8f89d
SM		 682}
683
684/*
685 * Map in the screen memory
686 */
687
688static int smtc_map_smem(struct smtcfb_info *sfb,
f049a526 689 struct pci_dev *pdev, u_long smem_len)
a8e8f89d 690{
cd14ad8b 691 sfb->fb->fix.smem_start = pci_resource_start(pdev, 0);
a8e8f89d
SM		 692
693#ifdef __BIG_ENDIAN
cd14ad8b
SM		 694 if (sfb->fb->var.bits_per_pixel == 32)
695 sfb->fb->fix.smem_start += 0x800000;
a8e8f89d
SM		 696#endif
697
cd14ad8b 698 sfb->fb->fix.smem_len = smem_len;
a8e8f89d 699
cd14ad8b 700 sfb->fb->screen_base = sfb->lfb;
a8e8f89d 701
cd14ad8b 702 if (!sfb->fb->screen_base) {
a8e8f89d 703 dev_err(&pdev->dev,
cd14ad8b 704 "%s: unable to map screen memory\n", sfb->fb->fix.id);
a8e8f89d
SM		 705 return -ENOMEM;
706 }
707
708 return 0;
709}
710
711/*
712 * Unmap in the screen memory
713 *
714 */
715static void smtc_unmap_smem(struct smtcfb_info *sfb)
716{
cd14ad8b
SM		 717 if (sfb && sfb->fb->screen_base) {
718 iounmap(sfb->fb->screen_base);
719 sfb->fb->screen_base = NULL;
a8e8f89d
SM		 720 }
721}
722
723/*
724 * We need to wake up the device and make sure its in linear memory mode.
725 */
726static inline void sm7xx_init_hw(void)
727{
728 outb_p(0x18, 0x3c4);
729 outb_p(0x11, 0x3c5);
730}
731
732static int smtcfb_pci_probe(struct pci_dev *pdev,
f049a526 733 const struct pci_device_id *ent)
a8e8f89d
SM		 734{
735 struct smtcfb_info *sfb;
cd14ad8b 736 struct fb_info *info;
a8e8f89d
SM		 737 u_long smem_size = 0x00800000; /* default 8MB */
738 int err;
739 unsigned long mmio_base;
740
c32305b5 741 dev_info(&pdev->dev, "Silicon Motion display driver.\n");
a8e8f89d
SM		 742
743 err = pci_enable_device(pdev); /* enable SMTC chip */
744 if (err)
745 return err;
746
f30a746b
SM		 747 err = pci_request_region(pdev, 0, "sm7xxfb");
748 if (err < 0) {
749 dev_err(&pdev->dev, "cannot reserve framebuffer region\n");
750 goto failed_regions;
751 }
752
a8e8f89d
SM		 753 sprintf(smtcfb_fix.id, "sm%Xfb", ent->device);
754
cd14ad8b
SM		 755 info = framebuffer_alloc(sizeof(*sfb), &pdev->dev);
756 if (!info) {
757 dev_err(&pdev->dev, "framebuffer_alloc failed\n");
a8e8f89d
SM		 758 err = -ENOMEM;
759 goto failed_free;
760 }
761
cd14ad8b
SM		 762 sfb = info->par;
763 sfb->fb = info;
a8e8f89d 764 sfb->chip_id = ent->device;
cd14ad8b
SM		 765 sfb->pdev = pdev;
766 info->flags = FBINFO_FLAG_DEFAULT;
767 info->fbops = &smtcfb_ops;
768 info->fix = smtcfb_fix;
769 info->var = smtcfb_var;
770 info->pseudo_palette = sfb->colreg;
771 info->par = sfb;
a8e8f89d
SM		 772
773 pci_set_drvdata(pdev, sfb);
774
775 sm7xx_init_hw();
776
777 /* get mode parameter from smtc_scr_info */
778 if (smtc_scr_info.lfb_width != 0) {
cd14ad8b
SM		 779 sfb->fb->var.xres = smtc_scr_info.lfb_width;
780 sfb->fb->var.yres = smtc_scr_info.lfb_height;
781 sfb->fb->var.bits_per_pixel = smtc_scr_info.lfb_depth;
a8e8f89d
SM		 782 } else {
783 /* default resolution 1024x600 16bit mode */
cd14ad8b
SM		 784 sfb->fb->var.xres = SCREEN_X_RES;
785 sfb->fb->var.yres = SCREEN_Y_RES;
786 sfb->fb->var.bits_per_pixel = SCREEN_BPP;
a8e8f89d
SM		 787 }
788
789#ifdef __BIG_ENDIAN
cd14ad8b
SM		 790 if (sfb->fb->var.bits_per_pixel == 24)
791 sfb->fb->var.bits_per_pixel = (smtc_scr_info.lfb_depth = 32);
a8e8f89d
SM		 792#endif
793 /* Map address and memory detection */
794 mmio_base = pci_resource_start(pdev, 0);
795 pci_read_config_byte(pdev, PCI_REVISION_ID, &sfb->chip_rev_id);
796
797 switch (sfb->chip_id) {
798 case 0x710:
799 case 0x712:
cd14ad8b
SM		 800 sfb->fb->fix.mmio_start = mmio_base + 0x00400000;
801 sfb->fb->fix.mmio_len = 0x00400000;
a8e8f89d
SM		 802 smem_size = SM712_VIDEOMEMORYSIZE;
803#ifdef __BIG_ENDIAN
804 sfb->lfb = ioremap(mmio_base, 0x00c00000);
805#else
806 sfb->lfb = ioremap(mmio_base, 0x00800000);
807#endif
74121898 808 sfb->mmio = (smtc_regbaseaddress =
a8e8f89d
SM		 809 sfb->lfb + 0x00700000);
810 sfb->dp_regs = sfb->lfb + 0x00408000;
811 sfb->vp_regs = sfb->lfb + 0x0040c000;
812#ifdef __BIG_ENDIAN
cd14ad8b 813 if (sfb->fb->var.bits_per_pixel == 32) {
a8e8f89d 814 sfb->lfb += 0x800000;
c32305b5 815 dev_info(&pdev->dev, "sfb->lfb=%p\n", sfb->lfb);
a8e8f89d
SM		 816 }
817#endif
74121898 818 if (!smtc_regbaseaddress) {
a8e8f89d 819 dev_err(&pdev->dev,
c32305b5 820 "%s: unable to map memory mapped IO!\n",
cd14ad8b 821 sfb->fb->fix.id);
a8e8f89d
SM		 822 err = -ENOMEM;
823 goto failed_fb;
824 }
825
826 /* set MCLK = 14.31818 * (0x16 / 0x2) */
827 smtc_seqw(0x6a, 0x16);
828 smtc_seqw(0x6b, 0x02);
829 smtc_seqw(0x62, 0x3e);
830 /* enable PCI burst */
831 smtc_seqw(0x17, 0x20);
832 /* enable word swap */
833#ifdef __BIG_ENDIAN
cd14ad8b 834 if (sfb->fb->var.bits_per_pixel == 32)
a8e8f89d
SM		 835 smtc_seqw(0x17, 0x30);
836#endif
837 break;
838 case 0x720:
cd14ad8b
SM		 839 sfb->fb->fix.mmio_start = mmio_base;
840 sfb->fb->fix.mmio_len = 0x00200000;
a8e8f89d
SM		 841 smem_size = SM722_VIDEOMEMORYSIZE;
842 sfb->dp_regs = ioremap(mmio_base, 0x00a00000);
843 sfb->lfb = sfb->dp_regs + 0x00200000;
74121898 844 sfb->mmio = (smtc_regbaseaddress =
a8e8f89d
SM		 845 sfb->dp_regs + 0x000c0000);
846 sfb->vp_regs = sfb->dp_regs + 0x800;
847
848 smtc_seqw(0x62, 0xff);
849 smtc_seqw(0x6a, 0x0d);
850 smtc_seqw(0x6b, 0x02);
851 break;
852 default:
853 dev_err(&pdev->dev,
c32305b5 854 "No valid Silicon Motion display chip was detected!\n");
a8e8f89d
SM		 855
856 goto failed_fb;
857 }
858
859 /* can support 32 bpp */
cd14ad8b
SM		 860 if (15 == sfb->fb->var.bits_per_pixel)
861 sfb->fb->var.bits_per_pixel = 16;
a8e8f89d 862
cd14ad8b
SM		 863 sfb->fb->var.xres_virtual = sfb->fb->var.xres;
864 sfb->fb->var.yres_virtual = sfb->fb->var.yres;
a8e8f89d
SM		 865 err = smtc_map_smem(sfb, pdev, smem_size);
866 if (err)
867 goto failed;
868
869 smtcfb_setmode(sfb);
870
cd14ad8b 871 err = register_framebuffer(info);
a8e8f89d
SM		 872 if (err < 0)
873 goto failed;
874
875 dev_info(&pdev->dev,
c32305b5 876 "Silicon Motion SM%X Rev%X primary display mode %dx%d-%d Init Complete.\n",
cd14ad8b
SM		 877 sfb->chip_id, sfb->chip_rev_id, sfb->fb->var.xres,
878 sfb->fb->var.yres, sfb->fb->var.bits_per_pixel);
a8e8f89d
SM		 879
880 return 0;
881
882failed:
c32305b5 883 dev_err(&pdev->dev, "Silicon Motion, Inc. primary display init fail.\n");
a8e8f89d
SM		 884
885 smtc_unmap_smem(sfb);
886 smtc_unmap_mmio(sfb);
887failed_fb:
cd14ad8b 888 framebuffer_release(info);
a8e8f89d
SM		 889
890failed_free:
f30a746b
SM		 891 pci_release_region(pdev, 0);
892
893failed_regions:
a8e8f89d
SM		 894 pci_disable_device(pdev);
895
896 return err;
897}
898
899/*
900 * 0x710 (LynxEM)
901 * 0x712 (LynxEM+)
902 * 0x720 (Lynx3DM, Lynx3DM+)
903 */
904static const struct pci_device_id smtcfb_pci_table[] = {
905 { PCI_DEVICE(0x126f, 0x710), },
906 { PCI_DEVICE(0x126f, 0x712), },
907 { PCI_DEVICE(0x126f, 0x720), },
908 {0,}
909};
910
855fe6ea
SM		 911MODULE_DEVICE_TABLE(pci, smtcfb_pci_table);
912
a8e8f89d
SM		 913static void smtcfb_pci_remove(struct pci_dev *pdev)
914{
915 struct smtcfb_info *sfb;
916
917 sfb = pci_get_drvdata(pdev);
918 smtc_unmap_smem(sfb);
919 smtc_unmap_mmio(sfb);
cd14ad8b
SM		 920 unregister_framebuffer(sfb->fb);
921 framebuffer_release(sfb->fb);
f30a746b 922 pci_release_region(pdev, 0);
f83e775d 923 pci_disable_device(pdev);
a8e8f89d
SM		 924}
925
926#ifdef CONFIG_PM
927static int smtcfb_pci_suspend(struct device *device)
928{
929 struct pci_dev *pdev = to_pci_dev(device);
930 struct smtcfb_info *sfb;
931
932 sfb = pci_get_drvdata(pdev);
933
934 /* set the hw in sleep mode use external clock and self memory refresh
935 * so that we can turn off internal PLLs later on
936 */
937 smtc_seqw(0x20, (smtc_seqr(0x20) | 0xc0));
938 smtc_seqw(0x69, (smtc_seqr(0x69) & 0xf7));
939
940 console_lock();
cd14ad8b 941 fb_set_suspend(sfb->fb, 1);
a8e8f89d
SM		 942 console_unlock();
943
944 /* additionally turn off all function blocks including internal PLLs */
945 smtc_seqw(0x21, 0xff);
946
947 return 0;
948}
949
950static int smtcfb_pci_resume(struct device *device)
951{
952 struct pci_dev *pdev = to_pci_dev(device);
953 struct smtcfb_info *sfb;
954
955 sfb = pci_get_drvdata(pdev);
956
957 /* reinit hardware */
958 sm7xx_init_hw();
959 switch (sfb->chip_id) {
960 case 0x710:
961 case 0x712:
962 /* set MCLK = 14.31818 * (0x16 / 0x2) */
963 smtc_seqw(0x6a, 0x16);
964 smtc_seqw(0x6b, 0x02);
965 smtc_seqw(0x62, 0x3e);
966 /* enable PCI burst */
967 smtc_seqw(0x17, 0x20);
968#ifdef __BIG_ENDIAN
cd14ad8b 969 if (sfb->fb->var.bits_per_pixel == 32)
a8e8f89d
SM		 970 smtc_seqw(0x17, 0x30);
971#endif
972 break;
973 case 0x720:
974 smtc_seqw(0x62, 0xff);
975 smtc_seqw(0x6a, 0x0d);
976 smtc_seqw(0x6b, 0x02);
977 break;
978 }
979
980 smtc_seqw(0x34, (smtc_seqr(0x34) | 0xc0));
981 smtc_seqw(0x33, ((smtc_seqr(0x33) | 0x08) & 0xfb));
982
983 smtcfb_setmode(sfb);
984
985 console_lock();
cd14ad8b 986 fb_set_suspend(sfb->fb, 0);
a8e8f89d
SM		 987 console_unlock();
988
989 return 0;
990}
991
992static SIMPLE_DEV_PM_OPS(sm7xx_pm_ops, smtcfb_pci_suspend, smtcfb_pci_resume);
993#define SM7XX_PM_OPS (&sm7xx_pm_ops)
994
995#else /* !CONFIG_PM */
996
997#define SM7XX_PM_OPS NULL
998
999#endif /* !CONFIG_PM */
1000
1001static struct pci_driver smtcfb_driver = {
1002 .name = "smtcfb",
1003 .id_table = smtcfb_pci_table,
1004 .probe = smtcfb_pci_probe,
1005 .remove = smtcfb_pci_remove,
1006 .driver.pm = SM7XX_PM_OPS,
1007};
1008
c65434eb
SM		 1009static int __init sm712fb_init(void)
1010{
1011#ifndef MODULE
1012 char *option = NULL;
1013
1014 if (fb_get_options("sm712fb", &option))
1015 return -ENODEV;
1016 if (option && *option)
1017 mode_option = option;
1018#endif
1019 sm7xx_vga_setup(mode_option);
1020
1021 return pci_register_driver(&smtcfb_driver);
1022}
1023
1024module_init(sm712fb_init);
1025
1026static void __exit sm712fb_exit(void)
1027{
1028 pci_unregister_driver(&smtcfb_driver);
1029}
1030
1031module_exit(sm712fb_exit);
a8e8f89d
SM		 1032
1033MODULE_AUTHOR("Siliconmotion ");
1034MODULE_DESCRIPTION("Framebuffer driver for SMI Graphic Cards");
1035MODULE_LICENSE("GPL");
ubuntu-bionic-kernel mirror