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[mirror_ubuntu-zesty-kernel.git] / drivers / usb / chipidea / otg.c
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1/*
2 * otg.c - ChipIdea USB IP core OTG driver
3 *
4 * Copyright (C) 2013 Freescale Semiconductor, Inc.
5 *
6 * Author: Peter Chen
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13/*
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14 * This file mainly handles otgsc register, OTG fsm operations for HNP and SRP
15 * are also included.
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16 */
17
18#include <linux/usb/otg.h>
19#include <linux/usb/gadget.h>
20#include <linux/usb/chipidea.h>
21
22#include "ci.h"
23#include "bits.h"
24#include "otg.h"
57677be5 25#include "otg_fsm.h"
c10b4f03 26
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27/**
28 * hw_read_otgsc returns otgsc register bits value.
29 * @mask: bitfield mask
30 */
31u32 hw_read_otgsc(struct ci_hdrc *ci, u32 mask)
32{
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33 struct ci_hdrc_cable *cable;
34 u32 val = hw_read(ci, OP_OTGSC, mask);
35
36 /*
37 * If using extcon framework for VBUS and/or ID signal
38 * detection overwrite OTGSC register value
39 */
40 cable = &ci->platdata->vbus_extcon;
41 if (!IS_ERR(cable->edev)) {
42 if (cable->changed)
43 val |= OTGSC_BSVIS;
44 else
45 val &= ~OTGSC_BSVIS;
46
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47 if (cable->state)
48 val |= OTGSC_BSV;
49 else
50 val &= ~OTGSC_BSV;
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51
52 if (cable->enabled)
53 val |= OTGSC_BSVIE;
54 else
55 val &= ~OTGSC_BSVIE;
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56 }
57
58 cable = &ci->platdata->id_extcon;
59 if (!IS_ERR(cable->edev)) {
60 if (cable->changed)
61 val |= OTGSC_IDIS;
62 else
63 val &= ~OTGSC_IDIS;
64
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65 if (cable->state)
66 val |= OTGSC_ID;
67 else
68 val &= ~OTGSC_ID;
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69
70 if (cable->enabled)
71 val |= OTGSC_IDIE;
72 else
73 val &= ~OTGSC_IDIE;
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74 }
75
632ebfe8 76 return val & mask;
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77}
78
79/**
80 * hw_write_otgsc updates target bits of OTGSC register.
81 * @mask: bitfield mask
82 * @data: to be written
83 */
84void hw_write_otgsc(struct ci_hdrc *ci, u32 mask, u32 data)
85{
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86 struct ci_hdrc_cable *cable;
87
88 cable = &ci->platdata->vbus_extcon;
89 if (!IS_ERR(cable->edev)) {
90 if (data & mask & OTGSC_BSVIS)
91 cable->changed = false;
92
93 /* Don't enable vbus interrupt if using external notifier */
94 if (data & mask & OTGSC_BSVIE) {
95 cable->enabled = true;
96 data &= ~OTGSC_BSVIE;
97 } else if (mask & OTGSC_BSVIE) {
98 cable->enabled = false;
99 }
100 }
101
102 cable = &ci->platdata->id_extcon;
103 if (!IS_ERR(cable->edev)) {
104 if (data & mask & OTGSC_IDIS)
105 cable->changed = false;
106
107 /* Don't enable id interrupt if using external notifier */
108 if (data & mask & OTGSC_IDIE) {
109 cable->enabled = true;
110 data &= ~OTGSC_IDIE;
111 } else if (mask & OTGSC_IDIE) {
112 cable->enabled = false;
113 }
114 }
115
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116 hw_write(ci, OP_OTGSC, mask | OTGSC_INT_STATUS_BITS, data);
117}
118
c10b4f03 119/**
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120 * ci_otg_role - pick role based on ID pin state
121 * @ci: the controller
122 */
123enum ci_role ci_otg_role(struct ci_hdrc *ci)
124{
0c33bf78 125 enum ci_role role = hw_read_otgsc(ci, OTGSC_ID)
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126 ? CI_ROLE_GADGET
127 : CI_ROLE_HOST;
128
129 return role;
130}
131
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132void ci_handle_vbus_change(struct ci_hdrc *ci)
133{
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134 if (!ci->is_otg)
135 return;
136
0c33bf78 137 if (hw_read_otgsc(ci, OTGSC_BSV))
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138 usb_gadget_vbus_connect(&ci->gadget);
139 else
140 usb_gadget_vbus_disconnect(&ci->gadget);
141}
142
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143/**
144 * When we switch to device mode, the vbus value should be lower
145 * than OTGSC_BSV before connecting to host.
146 *
147 * @ci: the controller
148 *
149 * This function returns an error code if timeout
150 */
151static int hw_wait_vbus_lower_bsv(struct ci_hdrc *ci)
152{
153 unsigned long elapse = jiffies + msecs_to_jiffies(5000);
154 u32 mask = OTGSC_BSV;
155
156 while (hw_read_otgsc(ci, mask)) {
157 if (time_after(jiffies, elapse)) {
158 dev_err(ci->dev, "timeout waiting for %08x in OTGSC\n",
159 mask);
160 return -ETIMEDOUT;
161 }
162 msleep(20);
163 }
164
165 return 0;
166}
167
a107f8c5 168static void ci_handle_id_switch(struct ci_hdrc *ci)
cbec6bd5 169{
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170 enum ci_role role = ci_otg_role(ci);
171
172 if (role != ci->role) {
173 dev_dbg(ci->dev, "switching from %s to %s\n",
174 ci_role(ci)->name, ci->roles[role]->name);
175
176 ci_role_stop(ci);
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177
178 if (role == CI_ROLE_GADGET)
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179 /*
180 * wait vbus lower than OTGSC_BSV before connecting
181 * to host
182 */
183 hw_wait_vbus_lower_bsv(ci);
851ce932 184
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185 ci_role_start(ci, role);
186 }
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187}
188/**
189 * ci_otg_work - perform otg (vbus/id) event handle
190 * @work: work struct
191 */
192static void ci_otg_work(struct work_struct *work)
193{
194 struct ci_hdrc *ci = container_of(work, struct ci_hdrc, work);
195
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196 if (ci_otg_is_fsm_mode(ci) && !ci_otg_fsm_work(ci)) {
197 enable_irq(ci->irq);
198 return;
199 }
200
1f874edc 201 pm_runtime_get_sync(ci->dev);
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202 if (ci->id_event) {
203 ci->id_event = false;
204 ci_handle_id_switch(ci);
205 } else if (ci->b_sess_valid_event) {
206 ci->b_sess_valid_event = false;
207 ci_handle_vbus_change(ci);
208 } else
209 dev_err(ci->dev, "unexpected event occurs at %s\n", __func__);
1f874edc 210 pm_runtime_put_sync(ci->dev);
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211
212 enable_irq(ci->irq);
213}
214
a107f8c5 215
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216/**
217 * ci_hdrc_otg_init - initialize otg struct
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218 * ci: the controller
219 */
220int ci_hdrc_otg_init(struct ci_hdrc *ci)
221{
a107f8c5 222 INIT_WORK(&ci->work, ci_otg_work);
d144dfea 223 ci->wq = create_freezable_workqueue("ci_otg");
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224 if (!ci->wq) {
225 dev_err(ci->dev, "can't create workqueue\n");
226 return -ENODEV;
227 }
c10b4f03 228
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229 if (ci_otg_is_fsm_mode(ci))
230 return ci_hdrc_otg_fsm_init(ci);
231
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232 return 0;
233}
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234
235/**
236 * ci_hdrc_otg_destroy - destroy otg struct
237 * ci: the controller
238 */
239void ci_hdrc_otg_destroy(struct ci_hdrc *ci)
240{
241 if (ci->wq) {
242 flush_workqueue(ci->wq);
243 destroy_workqueue(ci->wq);
244 }
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245 /* Disable all OTG irq and clear status */
246 hw_write_otgsc(ci, OTGSC_INT_EN_BITS | OTGSC_INT_STATUS_BITS,
247 OTGSC_INT_STATUS_BITS);
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248 if (ci_otg_is_fsm_mode(ci))
249 ci_hdrc_otg_fsm_remove(ci);
cbec6bd5 250}